1 // SPDX-License-Identifier: GPL-2.0 2 /* Ethernet device driver for Cortina Systems Gemini SoC 3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus 4 * Net Engine and Gigabit Ethernet MAC (GMAC) 5 * This hardware contains a TCP Offload Engine (TOE) but currently the 6 * driver does not make use of it. 7 * 8 * Authors: 9 * Linus Walleij <linus.walleij@linaro.org> 10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT) 11 * Michał Mirosław <mirq-linux@rere.qmqm.pl> 12 * Paulius Zaleckas <paulius.zaleckas@gmail.com> 13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it> 14 * Gary Chen & Ch Hsu Storlink Semiconductor 15 */ 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/spinlock.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/cache.h> 24 #include <linux/interrupt.h> 25 #include <linux/reset.h> 26 #include <linux/clk.h> 27 #include <linux/of.h> 28 #include <linux/of_mdio.h> 29 #include <linux/of_net.h> 30 #include <linux/of_platform.h> 31 #include <linux/etherdevice.h> 32 #include <linux/if_vlan.h> 33 #include <linux/skbuff.h> 34 #include <linux/phy.h> 35 #include <linux/crc32.h> 36 #include <linux/ethtool.h> 37 #include <linux/tcp.h> 38 #include <linux/u64_stats_sync.h> 39 40 #include <linux/in.h> 41 #include <linux/ip.h> 42 #include <linux/ipv6.h> 43 44 #include "gemini.h" 45 46 #define DRV_NAME "gmac-gemini" 47 48 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 49 static int debug = -1; 50 module_param(debug, int, 0); 51 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 52 53 #define HSIZE_8 0x00 54 #define HSIZE_16 0x01 55 #define HSIZE_32 0x02 56 57 #define HBURST_SINGLE 0x00 58 #define HBURST_INCR 0x01 59 #define HBURST_INCR4 0x02 60 #define HBURST_INCR8 0x03 61 62 #define HPROT_DATA_CACHE BIT(0) 63 #define HPROT_PRIVILIGED BIT(1) 64 #define HPROT_BUFFERABLE BIT(2) 65 #define HPROT_CACHABLE BIT(3) 66 67 #define DEFAULT_RX_COALESCE_NSECS 0 68 #define DEFAULT_GMAC_RXQ_ORDER 9 69 #define DEFAULT_GMAC_TXQ_ORDER 8 70 #define DEFAULT_RX_BUF_ORDER 11 71 #define DEFAULT_NAPI_WEIGHT 64 72 #define TX_MAX_FRAGS 16 73 #define TX_QUEUE_NUM 1 /* max: 6 */ 74 #define RX_MAX_ALLOC_ORDER 2 75 76 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \ 77 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT) 78 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \ 79 GMAC0_SWTQ00_FIN_INT_BIT) 80 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT) 81 82 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \ 83 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \ 84 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) 85 86 /** 87 * struct gmac_queue_page - page buffer per-page info 88 */ 89 struct gmac_queue_page { 90 struct page *page; 91 dma_addr_t mapping; 92 }; 93 94 struct gmac_txq { 95 struct gmac_txdesc *ring; 96 struct sk_buff **skb; 97 unsigned int cptr; 98 unsigned int noirq_packets; 99 }; 100 101 struct gemini_ethernet; 102 103 struct gemini_ethernet_port { 104 u8 id; /* 0 or 1 */ 105 106 struct gemini_ethernet *geth; 107 struct net_device *netdev; 108 struct device *dev; 109 void __iomem *dma_base; 110 void __iomem *gmac_base; 111 struct clk *pclk; 112 struct reset_control *reset; 113 int irq; 114 __le32 mac_addr[3]; 115 116 void __iomem *rxq_rwptr; 117 struct gmac_rxdesc *rxq_ring; 118 unsigned int rxq_order; 119 120 struct napi_struct napi; 121 struct hrtimer rx_coalesce_timer; 122 unsigned int rx_coalesce_nsecs; 123 unsigned int freeq_refill; 124 struct gmac_txq txq[TX_QUEUE_NUM]; 125 unsigned int txq_order; 126 unsigned int irq_every_tx_packets; 127 128 dma_addr_t rxq_dma_base; 129 dma_addr_t txq_dma_base; 130 131 unsigned int msg_enable; 132 spinlock_t config_lock; /* Locks config register */ 133 134 struct u64_stats_sync tx_stats_syncp; 135 struct u64_stats_sync rx_stats_syncp; 136 struct u64_stats_sync ir_stats_syncp; 137 138 struct rtnl_link_stats64 stats; 139 u64 hw_stats[RX_STATS_NUM]; 140 u64 rx_stats[RX_STATUS_NUM]; 141 u64 rx_csum_stats[RX_CHKSUM_NUM]; 142 u64 rx_napi_exits; 143 u64 tx_frag_stats[TX_MAX_FRAGS]; 144 u64 tx_frags_linearized; 145 u64 tx_hw_csummed; 146 }; 147 148 struct gemini_ethernet { 149 struct device *dev; 150 void __iomem *base; 151 struct gemini_ethernet_port *port0; 152 struct gemini_ethernet_port *port1; 153 bool initialized; 154 155 spinlock_t irq_lock; /* Locks IRQ-related registers */ 156 unsigned int freeq_order; 157 unsigned int freeq_frag_order; 158 struct gmac_rxdesc *freeq_ring; 159 dma_addr_t freeq_dma_base; 160 struct gmac_queue_page *freeq_pages; 161 unsigned int num_freeq_pages; 162 spinlock_t freeq_lock; /* Locks queue from reentrance */ 163 }; 164 165 #define GMAC_STATS_NUM ( \ 166 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \ 167 TX_MAX_FRAGS + 2) 168 169 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = { 170 "GMAC_IN_DISCARDS", 171 "GMAC_IN_ERRORS", 172 "GMAC_IN_MCAST", 173 "GMAC_IN_BCAST", 174 "GMAC_IN_MAC1", 175 "GMAC_IN_MAC2", 176 "RX_STATUS_GOOD_FRAME", 177 "RX_STATUS_TOO_LONG_GOOD_CRC", 178 "RX_STATUS_RUNT_FRAME", 179 "RX_STATUS_SFD_NOT_FOUND", 180 "RX_STATUS_CRC_ERROR", 181 "RX_STATUS_TOO_LONG_BAD_CRC", 182 "RX_STATUS_ALIGNMENT_ERROR", 183 "RX_STATUS_TOO_LONG_BAD_ALIGN", 184 "RX_STATUS_RX_ERR", 185 "RX_STATUS_DA_FILTERED", 186 "RX_STATUS_BUFFER_FULL", 187 "RX_STATUS_11", 188 "RX_STATUS_12", 189 "RX_STATUS_13", 190 "RX_STATUS_14", 191 "RX_STATUS_15", 192 "RX_CHKSUM_IP_UDP_TCP_OK", 193 "RX_CHKSUM_IP_OK_ONLY", 194 "RX_CHKSUM_NONE", 195 "RX_CHKSUM_3", 196 "RX_CHKSUM_IP_ERR_UNKNOWN", 197 "RX_CHKSUM_IP_ERR", 198 "RX_CHKSUM_TCP_UDP_ERR", 199 "RX_CHKSUM_7", 200 "RX_NAPI_EXITS", 201 "TX_FRAGS[1]", 202 "TX_FRAGS[2]", 203 "TX_FRAGS[3]", 204 "TX_FRAGS[4]", 205 "TX_FRAGS[5]", 206 "TX_FRAGS[6]", 207 "TX_FRAGS[7]", 208 "TX_FRAGS[8]", 209 "TX_FRAGS[9]", 210 "TX_FRAGS[10]", 211 "TX_FRAGS[11]", 212 "TX_FRAGS[12]", 213 "TX_FRAGS[13]", 214 "TX_FRAGS[14]", 215 "TX_FRAGS[15]", 216 "TX_FRAGS[16+]", 217 "TX_FRAGS_LINEARIZED", 218 "TX_HW_CSUMMED", 219 }; 220 221 static void gmac_dump_dma_state(struct net_device *netdev); 222 223 static void gmac_update_config0_reg(struct net_device *netdev, 224 u32 val, u32 vmask) 225 { 226 struct gemini_ethernet_port *port = netdev_priv(netdev); 227 unsigned long flags; 228 u32 reg; 229 230 spin_lock_irqsave(&port->config_lock, flags); 231 232 reg = readl(port->gmac_base + GMAC_CONFIG0); 233 reg = (reg & ~vmask) | val; 234 writel(reg, port->gmac_base + GMAC_CONFIG0); 235 236 spin_unlock_irqrestore(&port->config_lock, flags); 237 } 238 239 static void gmac_enable_tx_rx(struct net_device *netdev) 240 { 241 struct gemini_ethernet_port *port = netdev_priv(netdev); 242 unsigned long flags; 243 u32 reg; 244 245 spin_lock_irqsave(&port->config_lock, flags); 246 247 reg = readl(port->gmac_base + GMAC_CONFIG0); 248 reg &= ~CONFIG0_TX_RX_DISABLE; 249 writel(reg, port->gmac_base + GMAC_CONFIG0); 250 251 spin_unlock_irqrestore(&port->config_lock, flags); 252 } 253 254 static void gmac_disable_tx_rx(struct net_device *netdev) 255 { 256 struct gemini_ethernet_port *port = netdev_priv(netdev); 257 unsigned long flags; 258 u32 val; 259 260 spin_lock_irqsave(&port->config_lock, flags); 261 262 val = readl(port->gmac_base + GMAC_CONFIG0); 263 val |= CONFIG0_TX_RX_DISABLE; 264 writel(val, port->gmac_base + GMAC_CONFIG0); 265 266 spin_unlock_irqrestore(&port->config_lock, flags); 267 268 mdelay(10); /* let GMAC consume packet */ 269 } 270 271 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx) 272 { 273 struct gemini_ethernet_port *port = netdev_priv(netdev); 274 unsigned long flags; 275 u32 val; 276 277 spin_lock_irqsave(&port->config_lock, flags); 278 279 val = readl(port->gmac_base + GMAC_CONFIG0); 280 val &= ~CONFIG0_FLOW_CTL; 281 if (tx) 282 val |= CONFIG0_FLOW_TX; 283 if (rx) 284 val |= CONFIG0_FLOW_RX; 285 writel(val, port->gmac_base + GMAC_CONFIG0); 286 287 spin_unlock_irqrestore(&port->config_lock, flags); 288 } 289 290 static void gmac_speed_set(struct net_device *netdev) 291 { 292 struct gemini_ethernet_port *port = netdev_priv(netdev); 293 struct phy_device *phydev = netdev->phydev; 294 union gmac_status status, old_status; 295 int pause_tx = 0; 296 int pause_rx = 0; 297 298 status.bits32 = readl(port->gmac_base + GMAC_STATUS); 299 old_status.bits32 = status.bits32; 300 status.bits.link = phydev->link; 301 status.bits.duplex = phydev->duplex; 302 303 switch (phydev->speed) { 304 case 1000: 305 status.bits.speed = GMAC_SPEED_1000; 306 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 307 status.bits.mii_rmii = GMAC_PHY_RGMII_1000; 308 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n", 309 phydev_name(phydev)); 310 break; 311 case 100: 312 status.bits.speed = GMAC_SPEED_100; 313 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 314 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 315 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n", 316 phydev_name(phydev)); 317 break; 318 case 10: 319 status.bits.speed = GMAC_SPEED_10; 320 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 321 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 322 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n", 323 phydev_name(phydev)); 324 break; 325 default: 326 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n", 327 phydev->speed, phydev_name(phydev)); 328 } 329 330 if (phydev->duplex == DUPLEX_FULL) { 331 u16 lcladv = phy_read(phydev, MII_ADVERTISE); 332 u16 rmtadv = phy_read(phydev, MII_LPA); 333 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 334 335 if (cap & FLOW_CTRL_RX) 336 pause_rx = 1; 337 if (cap & FLOW_CTRL_TX) 338 pause_tx = 1; 339 } 340 341 gmac_set_flow_control(netdev, pause_tx, pause_rx); 342 343 if (old_status.bits32 == status.bits32) 344 return; 345 346 if (netif_msg_link(port)) { 347 phy_print_status(phydev); 348 netdev_info(netdev, "link flow control: %s\n", 349 phydev->pause 350 ? (phydev->asym_pause ? "tx" : "both") 351 : (phydev->asym_pause ? "rx" : "none") 352 ); 353 } 354 355 gmac_disable_tx_rx(netdev); 356 writel(status.bits32, port->gmac_base + GMAC_STATUS); 357 gmac_enable_tx_rx(netdev); 358 } 359 360 static int gmac_setup_phy(struct net_device *netdev) 361 { 362 struct gemini_ethernet_port *port = netdev_priv(netdev); 363 union gmac_status status = { .bits32 = 0 }; 364 struct device *dev = port->dev; 365 struct phy_device *phy; 366 367 phy = of_phy_get_and_connect(netdev, 368 dev->of_node, 369 gmac_speed_set); 370 if (!phy) 371 return -ENODEV; 372 netdev->phydev = phy; 373 374 phy_set_max_speed(phy, SPEED_1000); 375 phy_support_asym_pause(phy); 376 377 /* set PHY interface type */ 378 switch (phy->interface) { 379 case PHY_INTERFACE_MODE_MII: 380 netdev_dbg(netdev, 381 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 382 status.bits.mii_rmii = GMAC_PHY_MII; 383 break; 384 case PHY_INTERFACE_MODE_GMII: 385 netdev_dbg(netdev, 386 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 387 status.bits.mii_rmii = GMAC_PHY_GMII; 388 break; 389 case PHY_INTERFACE_MODE_RGMII: 390 netdev_dbg(netdev, 391 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n"); 392 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 393 break; 394 default: 395 netdev_err(netdev, "Unsupported MII interface\n"); 396 phy_disconnect(phy); 397 netdev->phydev = NULL; 398 return -EINVAL; 399 } 400 writel(status.bits32, port->gmac_base + GMAC_STATUS); 401 402 if (netif_msg_link(port)) 403 phy_attached_info(phy); 404 405 return 0; 406 } 407 408 /* The maximum frame length is not logically enumerated in the 409 * hardware, so we do a table lookup to find the applicable max 410 * frame length. 411 */ 412 struct gmac_max_framelen { 413 unsigned int max_l3_len; 414 u8 val; 415 }; 416 417 static const struct gmac_max_framelen gmac_maxlens[] = { 418 { 419 .max_l3_len = 1518, 420 .val = CONFIG0_MAXLEN_1518, 421 }, 422 { 423 .max_l3_len = 1522, 424 .val = CONFIG0_MAXLEN_1522, 425 }, 426 { 427 .max_l3_len = 1536, 428 .val = CONFIG0_MAXLEN_1536, 429 }, 430 { 431 .max_l3_len = 1542, 432 .val = CONFIG0_MAXLEN_1542, 433 }, 434 { 435 .max_l3_len = 9212, 436 .val = CONFIG0_MAXLEN_9k, 437 }, 438 { 439 .max_l3_len = 10236, 440 .val = CONFIG0_MAXLEN_10k, 441 }, 442 }; 443 444 static int gmac_pick_rx_max_len(unsigned int max_l3_len) 445 { 446 const struct gmac_max_framelen *maxlen; 447 int maxtot; 448 int i; 449 450 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN; 451 452 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) { 453 maxlen = &gmac_maxlens[i]; 454 if (maxtot <= maxlen->max_l3_len) 455 return maxlen->val; 456 } 457 458 return -1; 459 } 460 461 static int gmac_init(struct net_device *netdev) 462 { 463 struct gemini_ethernet_port *port = netdev_priv(netdev); 464 union gmac_config0 config0 = { .bits = { 465 .dis_tx = 1, 466 .dis_rx = 1, 467 .ipv4_rx_chksum = 1, 468 .ipv6_rx_chksum = 1, 469 .rx_err_detect = 1, 470 .rgmm_edge = 1, 471 .port0_chk_hwq = 1, 472 .port1_chk_hwq = 1, 473 .port0_chk_toeq = 1, 474 .port1_chk_toeq = 1, 475 .port0_chk_classq = 1, 476 .port1_chk_classq = 1, 477 } }; 478 union gmac_ahb_weight ahb_weight = { .bits = { 479 .rx_weight = 1, 480 .tx_weight = 1, 481 .hash_weight = 1, 482 .pre_req = 0x1f, 483 .tq_dv_threshold = 0, 484 } }; 485 union gmac_tx_wcr0 hw_weigh = { .bits = { 486 .hw_tq3 = 1, 487 .hw_tq2 = 1, 488 .hw_tq1 = 1, 489 .hw_tq0 = 1, 490 } }; 491 union gmac_tx_wcr1 sw_weigh = { .bits = { 492 .sw_tq5 = 1, 493 .sw_tq4 = 1, 494 .sw_tq3 = 1, 495 .sw_tq2 = 1, 496 .sw_tq1 = 1, 497 .sw_tq0 = 1, 498 } }; 499 union gmac_config1 config1 = { .bits = { 500 .set_threshold = 16, 501 .rel_threshold = 24, 502 } }; 503 union gmac_config2 config2 = { .bits = { 504 .set_threshold = 16, 505 .rel_threshold = 32, 506 } }; 507 union gmac_config3 config3 = { .bits = { 508 .set_threshold = 0, 509 .rel_threshold = 0, 510 } }; 511 union gmac_config0 tmp; 512 u32 val; 513 514 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu); 515 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 516 config0.bits.reserved = tmp.bits.reserved; 517 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0); 518 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1); 519 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2); 520 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3); 521 522 val = readl(port->dma_base + GMAC_AHB_WEIGHT_REG); 523 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG); 524 525 writel(hw_weigh.bits32, 526 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG); 527 writel(sw_weigh.bits32, 528 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG); 529 530 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER; 531 port->txq_order = DEFAULT_GMAC_TXQ_ORDER; 532 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS; 533 534 /* Mark every quarter of the queue a packet for interrupt 535 * in order to be able to wake up the queue if it was stopped 536 */ 537 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 538 539 return 0; 540 } 541 542 static void gmac_uninit(struct net_device *netdev) 543 { 544 if (netdev->phydev) 545 phy_disconnect(netdev->phydev); 546 } 547 548 static int gmac_setup_txqs(struct net_device *netdev) 549 { 550 struct gemini_ethernet_port *port = netdev_priv(netdev); 551 unsigned int n_txq = netdev->num_tx_queues; 552 struct gemini_ethernet *geth = port->geth; 553 size_t entries = 1 << port->txq_order; 554 struct gmac_txq *txq = port->txq; 555 struct gmac_txdesc *desc_ring; 556 size_t len = n_txq * entries; 557 struct sk_buff **skb_tab; 558 void __iomem *rwptr_reg; 559 unsigned int r; 560 int i; 561 562 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 563 564 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL); 565 if (!skb_tab) 566 return -ENOMEM; 567 568 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring), 569 &port->txq_dma_base, GFP_KERNEL); 570 571 if (!desc_ring) { 572 kfree(skb_tab); 573 return -ENOMEM; 574 } 575 576 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) { 577 dev_warn(geth->dev, "TX queue base is not aligned\n"); 578 dma_free_coherent(geth->dev, len * sizeof(*desc_ring), 579 desc_ring, port->txq_dma_base); 580 kfree(skb_tab); 581 return -ENOMEM; 582 } 583 584 writel(port->txq_dma_base | port->txq_order, 585 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 586 587 for (i = 0; i < n_txq; i++) { 588 txq->ring = desc_ring; 589 txq->skb = skb_tab; 590 txq->noirq_packets = 0; 591 592 r = readw(rwptr_reg); 593 rwptr_reg += 2; 594 writew(r, rwptr_reg); 595 rwptr_reg += 2; 596 txq->cptr = r; 597 598 txq++; 599 desc_ring += entries; 600 skb_tab += entries; 601 } 602 603 return 0; 604 } 605 606 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq, 607 unsigned int r) 608 { 609 struct gemini_ethernet_port *port = netdev_priv(netdev); 610 unsigned int m = (1 << port->txq_order) - 1; 611 struct gemini_ethernet *geth = port->geth; 612 unsigned int c = txq->cptr; 613 union gmac_txdesc_0 word0; 614 union gmac_txdesc_1 word1; 615 unsigned int hwchksum = 0; 616 unsigned long bytes = 0; 617 struct gmac_txdesc *txd; 618 unsigned short nfrags; 619 unsigned int errs = 0; 620 unsigned int pkts = 0; 621 unsigned int word3; 622 dma_addr_t mapping; 623 624 if (c == r) 625 return; 626 627 while (c != r) { 628 txd = txq->ring + c; 629 word0 = txd->word0; 630 word1 = txd->word1; 631 mapping = txd->word2.buf_adr; 632 word3 = txd->word3.bits32; 633 634 dma_unmap_single(geth->dev, mapping, 635 word0.bits.buffer_size, DMA_TO_DEVICE); 636 637 if (word3 & EOF_BIT) 638 dev_kfree_skb(txq->skb[c]); 639 640 c++; 641 c &= m; 642 643 if (!(word3 & SOF_BIT)) 644 continue; 645 646 if (!word0.bits.status_tx_ok) { 647 errs++; 648 continue; 649 } 650 651 pkts++; 652 bytes += txd->word1.bits.byte_count; 653 654 if (word1.bits32 & TSS_CHECKUM_ENABLE) 655 hwchksum++; 656 657 nfrags = word0.bits.desc_count - 1; 658 if (nfrags) { 659 if (nfrags >= TX_MAX_FRAGS) 660 nfrags = TX_MAX_FRAGS - 1; 661 662 u64_stats_update_begin(&port->tx_stats_syncp); 663 port->tx_frag_stats[nfrags]++; 664 u64_stats_update_end(&port->tx_stats_syncp); 665 } 666 } 667 668 u64_stats_update_begin(&port->ir_stats_syncp); 669 port->stats.tx_errors += errs; 670 port->stats.tx_packets += pkts; 671 port->stats.tx_bytes += bytes; 672 port->tx_hw_csummed += hwchksum; 673 u64_stats_update_end(&port->ir_stats_syncp); 674 675 txq->cptr = c; 676 } 677 678 static void gmac_cleanup_txqs(struct net_device *netdev) 679 { 680 struct gemini_ethernet_port *port = netdev_priv(netdev); 681 unsigned int n_txq = netdev->num_tx_queues; 682 struct gemini_ethernet *geth = port->geth; 683 void __iomem *rwptr_reg; 684 unsigned int r, i; 685 686 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 687 688 for (i = 0; i < n_txq; i++) { 689 r = readw(rwptr_reg); 690 rwptr_reg += 2; 691 writew(r, rwptr_reg); 692 rwptr_reg += 2; 693 694 gmac_clean_txq(netdev, port->txq + i, r); 695 } 696 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 697 698 kfree(port->txq->skb); 699 dma_free_coherent(geth->dev, 700 n_txq * sizeof(*port->txq->ring) << port->txq_order, 701 port->txq->ring, port->txq_dma_base); 702 } 703 704 static int gmac_setup_rxq(struct net_device *netdev) 705 { 706 struct gemini_ethernet_port *port = netdev_priv(netdev); 707 struct gemini_ethernet *geth = port->geth; 708 struct nontoe_qhdr __iomem *qhdr; 709 710 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 711 port->rxq_rwptr = &qhdr->word1; 712 713 /* Remap a slew of memory to use for the RX queue */ 714 port->rxq_ring = dma_alloc_coherent(geth->dev, 715 sizeof(*port->rxq_ring) << port->rxq_order, 716 &port->rxq_dma_base, GFP_KERNEL); 717 if (!port->rxq_ring) 718 return -ENOMEM; 719 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) { 720 dev_warn(geth->dev, "RX queue base is not aligned\n"); 721 return -ENOMEM; 722 } 723 724 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0); 725 writel(0, port->rxq_rwptr); 726 return 0; 727 } 728 729 static struct gmac_queue_page * 730 gmac_get_queue_page(struct gemini_ethernet *geth, 731 struct gemini_ethernet_port *port, 732 dma_addr_t addr) 733 { 734 struct gmac_queue_page *gpage; 735 dma_addr_t mapping; 736 int i; 737 738 /* Only look for even pages */ 739 mapping = addr & PAGE_MASK; 740 741 if (!geth->freeq_pages) { 742 dev_err(geth->dev, "try to get page with no page list\n"); 743 return NULL; 744 } 745 746 /* Look up a ring buffer page from virtual mapping */ 747 for (i = 0; i < geth->num_freeq_pages; i++) { 748 gpage = &geth->freeq_pages[i]; 749 if (gpage->mapping == mapping) 750 return gpage; 751 } 752 753 return NULL; 754 } 755 756 static void gmac_cleanup_rxq(struct net_device *netdev) 757 { 758 struct gemini_ethernet_port *port = netdev_priv(netdev); 759 struct gemini_ethernet *geth = port->geth; 760 struct gmac_rxdesc *rxd = port->rxq_ring; 761 static struct gmac_queue_page *gpage; 762 struct nontoe_qhdr __iomem *qhdr; 763 void __iomem *dma_reg; 764 void __iomem *ptr_reg; 765 dma_addr_t mapping; 766 union dma_rwptr rw; 767 unsigned int r, w; 768 769 qhdr = geth->base + 770 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 771 dma_reg = &qhdr->word0; 772 ptr_reg = &qhdr->word1; 773 774 rw.bits32 = readl(ptr_reg); 775 r = rw.bits.rptr; 776 w = rw.bits.wptr; 777 writew(r, ptr_reg + 2); 778 779 writel(0, dma_reg); 780 781 /* Loop from read pointer to write pointer of the RX queue 782 * and free up all pages by the queue. 783 */ 784 while (r != w) { 785 mapping = rxd[r].word2.buf_adr; 786 r++; 787 r &= ((1 << port->rxq_order) - 1); 788 789 if (!mapping) 790 continue; 791 792 /* Freeq pointers are one page off */ 793 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 794 if (!gpage) { 795 dev_err(geth->dev, "could not find page\n"); 796 continue; 797 } 798 /* Release the RX queue reference to the page */ 799 put_page(gpage->page); 800 } 801 802 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order, 803 port->rxq_ring, port->rxq_dma_base); 804 } 805 806 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth, 807 int pn) 808 { 809 struct gmac_rxdesc *freeq_entry; 810 struct gmac_queue_page *gpage; 811 unsigned int fpp_order; 812 unsigned int frag_len; 813 dma_addr_t mapping; 814 struct page *page; 815 int i; 816 817 /* First allocate and DMA map a single page */ 818 page = alloc_page(GFP_ATOMIC); 819 if (!page) 820 return NULL; 821 822 mapping = dma_map_single(geth->dev, page_address(page), 823 PAGE_SIZE, DMA_FROM_DEVICE); 824 if (dma_mapping_error(geth->dev, mapping)) { 825 put_page(page); 826 return NULL; 827 } 828 829 /* The assign the page mapping (physical address) to the buffer address 830 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes, 831 * 4k), and the default RX frag order is 11 (fragments are up 20 2048 832 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus 833 * each page normally needs two entries in the queue. 834 */ 835 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */ 836 fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 837 freeq_entry = geth->freeq_ring + (pn << fpp_order); 838 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n", 839 pn, frag_len, (1 << fpp_order), freeq_entry); 840 for (i = (1 << fpp_order); i > 0; i--) { 841 freeq_entry->word2.buf_adr = mapping; 842 freeq_entry++; 843 mapping += frag_len; 844 } 845 846 /* If the freeq entry already has a page mapped, then unmap it. */ 847 gpage = &geth->freeq_pages[pn]; 848 if (gpage->page) { 849 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 850 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 851 /* This should be the last reference to the page so it gets 852 * released 853 */ 854 put_page(gpage->page); 855 } 856 857 /* Then put our new mapping into the page table */ 858 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n", 859 pn, (unsigned int)mapping, page); 860 gpage->mapping = mapping; 861 gpage->page = page; 862 863 return page; 864 } 865 866 /** 867 * geth_fill_freeq() - Fill the freeq with empty fragments to use 868 * @geth: the ethernet adapter 869 * @refill: whether to reset the queue by filling in all freeq entries or 870 * just refill it, usually the interrupt to refill the queue happens when 871 * the queue is half empty. 872 */ 873 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill) 874 { 875 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 876 unsigned int count = 0; 877 unsigned int pn, epn; 878 unsigned long flags; 879 union dma_rwptr rw; 880 unsigned int m_pn; 881 882 /* Mask for page */ 883 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1; 884 885 spin_lock_irqsave(&geth->freeq_lock, flags); 886 887 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG); 888 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order; 889 epn = (rw.bits.rptr >> fpp_order) - 1; 890 epn &= m_pn; 891 892 /* Loop over the freeq ring buffer entries */ 893 while (pn != epn) { 894 struct gmac_queue_page *gpage; 895 struct page *page; 896 897 gpage = &geth->freeq_pages[pn]; 898 page = gpage->page; 899 900 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n", 901 pn, page_ref_count(page), 1 << fpp_order); 902 903 if (page_ref_count(page) > 1) { 904 unsigned int fl = (pn - epn) & m_pn; 905 906 if (fl > 64 >> fpp_order) 907 break; 908 909 page = geth_freeq_alloc_map_page(geth, pn); 910 if (!page) 911 break; 912 } 913 914 /* Add one reference per fragment in the page */ 915 page_ref_add(page, 1 << fpp_order); 916 count += 1 << fpp_order; 917 pn++; 918 pn &= m_pn; 919 } 920 921 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 922 923 spin_unlock_irqrestore(&geth->freeq_lock, flags); 924 925 return count; 926 } 927 928 static int geth_setup_freeq(struct gemini_ethernet *geth) 929 { 930 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 931 unsigned int frag_len = 1 << geth->freeq_frag_order; 932 unsigned int len = 1 << geth->freeq_order; 933 unsigned int pages = len >> fpp_order; 934 union queue_threshold qt; 935 union dma_skb_size skbsz; 936 unsigned int filled; 937 unsigned int pn; 938 939 geth->freeq_ring = dma_alloc_coherent(geth->dev, 940 sizeof(*geth->freeq_ring) << geth->freeq_order, 941 &geth->freeq_dma_base, GFP_KERNEL); 942 if (!geth->freeq_ring) 943 return -ENOMEM; 944 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) { 945 dev_warn(geth->dev, "queue ring base is not aligned\n"); 946 goto err_freeq; 947 } 948 949 /* Allocate a mapping to page look-up index */ 950 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages), 951 GFP_KERNEL); 952 if (!geth->freeq_pages) 953 goto err_freeq; 954 geth->num_freeq_pages = pages; 955 956 dev_info(geth->dev, "allocate %d pages for queue\n", pages); 957 for (pn = 0; pn < pages; pn++) 958 if (!geth_freeq_alloc_map_page(geth, pn)) 959 goto err_freeq_alloc; 960 961 filled = geth_fill_freeq(geth, false); 962 if (!filled) 963 goto err_freeq_alloc; 964 965 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 966 qt.bits.swfq_empty = 32; 967 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 968 969 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order; 970 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG); 971 writel(geth->freeq_dma_base | geth->freeq_order, 972 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 973 974 return 0; 975 976 err_freeq_alloc: 977 while (pn > 0) { 978 struct gmac_queue_page *gpage; 979 dma_addr_t mapping; 980 981 --pn; 982 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 983 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 984 gpage = &geth->freeq_pages[pn]; 985 put_page(gpage->page); 986 } 987 988 kfree(geth->freeq_pages); 989 err_freeq: 990 dma_free_coherent(geth->dev, 991 sizeof(*geth->freeq_ring) << geth->freeq_order, 992 geth->freeq_ring, geth->freeq_dma_base); 993 geth->freeq_ring = NULL; 994 return -ENOMEM; 995 } 996 997 /** 998 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue 999 * @geth: the Gemini global ethernet state 1000 */ 1001 static void geth_cleanup_freeq(struct gemini_ethernet *geth) 1002 { 1003 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 1004 unsigned int frag_len = 1 << geth->freeq_frag_order; 1005 unsigned int len = 1 << geth->freeq_order; 1006 unsigned int pages = len >> fpp_order; 1007 unsigned int pn; 1008 1009 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG), 1010 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 1011 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 1012 1013 for (pn = 0; pn < pages; pn++) { 1014 struct gmac_queue_page *gpage; 1015 dma_addr_t mapping; 1016 1017 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 1018 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 1019 1020 gpage = &geth->freeq_pages[pn]; 1021 while (page_ref_count(gpage->page) > 0) 1022 put_page(gpage->page); 1023 } 1024 1025 kfree(geth->freeq_pages); 1026 1027 dma_free_coherent(geth->dev, 1028 sizeof(*geth->freeq_ring) << geth->freeq_order, 1029 geth->freeq_ring, geth->freeq_dma_base); 1030 } 1031 1032 /** 1033 * geth_resize_freeq() - resize the software queue depth 1034 * @port: the port requesting the change 1035 * 1036 * This gets called at least once during probe() so the device queue gets 1037 * "resized" from the hardware defaults. Since both ports/net devices share 1038 * the same hardware queue, some synchronization between the ports is 1039 * needed. 1040 */ 1041 static int geth_resize_freeq(struct gemini_ethernet_port *port) 1042 { 1043 struct gemini_ethernet *geth = port->geth; 1044 struct net_device *netdev = port->netdev; 1045 struct gemini_ethernet_port *other_port; 1046 struct net_device *other_netdev; 1047 unsigned int new_size = 0; 1048 unsigned int new_order; 1049 unsigned long flags; 1050 u32 en; 1051 int ret; 1052 1053 if (netdev->dev_id == 0) 1054 other_netdev = geth->port1->netdev; 1055 else 1056 other_netdev = geth->port0->netdev; 1057 1058 if (other_netdev && netif_running(other_netdev)) 1059 return -EBUSY; 1060 1061 new_size = 1 << (port->rxq_order + 1); 1062 netdev_dbg(netdev, "port %d size: %d order %d\n", 1063 netdev->dev_id, 1064 new_size, 1065 port->rxq_order); 1066 if (other_netdev) { 1067 other_port = netdev_priv(other_netdev); 1068 new_size += 1 << (other_port->rxq_order + 1); 1069 netdev_dbg(other_netdev, "port %d size: %d order %d\n", 1070 other_netdev->dev_id, 1071 (1 << (other_port->rxq_order + 1)), 1072 other_port->rxq_order); 1073 } 1074 1075 new_order = min(15, ilog2(new_size - 1) + 1); 1076 dev_dbg(geth->dev, "set shared queue to size %d order %d\n", 1077 new_size, new_order); 1078 if (geth->freeq_order == new_order) 1079 return 0; 1080 1081 spin_lock_irqsave(&geth->irq_lock, flags); 1082 1083 /* Disable the software queue IRQs */ 1084 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1085 en &= ~SWFQ_EMPTY_INT_BIT; 1086 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1087 spin_unlock_irqrestore(&geth->irq_lock, flags); 1088 1089 /* Drop the old queue */ 1090 if (geth->freeq_ring) 1091 geth_cleanup_freeq(geth); 1092 1093 /* Allocate a new queue with the desired order */ 1094 geth->freeq_order = new_order; 1095 ret = geth_setup_freeq(geth); 1096 1097 /* Restart the interrupts - NOTE if this is the first resize 1098 * after probe(), this is where the interrupts get turned on 1099 * in the first place. 1100 */ 1101 spin_lock_irqsave(&geth->irq_lock, flags); 1102 en |= SWFQ_EMPTY_INT_BIT; 1103 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1104 spin_unlock_irqrestore(&geth->irq_lock, flags); 1105 1106 return ret; 1107 } 1108 1109 static void gmac_tx_irq_enable(struct net_device *netdev, 1110 unsigned int txq, int en) 1111 { 1112 struct gemini_ethernet_port *port = netdev_priv(netdev); 1113 struct gemini_ethernet *geth = port->geth; 1114 u32 val, mask; 1115 1116 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id); 1117 1118 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq); 1119 1120 if (en) 1121 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1122 1123 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1124 val = en ? val | mask : val & ~mask; 1125 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1126 } 1127 1128 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num) 1129 { 1130 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num); 1131 1132 gmac_tx_irq_enable(netdev, txq_num, 0); 1133 netif_tx_wake_queue(ntxq); 1134 } 1135 1136 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb, 1137 struct gmac_txq *txq, unsigned short *desc) 1138 { 1139 struct gemini_ethernet_port *port = netdev_priv(netdev); 1140 struct skb_shared_info *skb_si = skb_shinfo(skb); 1141 unsigned short m = (1 << port->txq_order) - 1; 1142 short frag, last_frag = skb_si->nr_frags - 1; 1143 struct gemini_ethernet *geth = port->geth; 1144 unsigned int word1, word3, buflen; 1145 unsigned short w = *desc; 1146 struct gmac_txdesc *txd; 1147 skb_frag_t *skb_frag; 1148 dma_addr_t mapping; 1149 unsigned short mtu; 1150 void *buffer; 1151 1152 mtu = ETH_HLEN; 1153 mtu += netdev->mtu; 1154 if (skb->protocol == htons(ETH_P_8021Q)) 1155 mtu += VLAN_HLEN; 1156 1157 word1 = skb->len; 1158 word3 = SOF_BIT; 1159 1160 if (word1 > mtu) { 1161 word1 |= TSS_MTU_ENABLE_BIT; 1162 word3 |= mtu; 1163 } 1164 1165 if (skb->ip_summed != CHECKSUM_NONE) { 1166 int tcp = 0; 1167 1168 if (skb->protocol == htons(ETH_P_IP)) { 1169 word1 |= TSS_IP_CHKSUM_BIT; 1170 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP; 1171 } else { /* IPv6 */ 1172 word1 |= TSS_IPV6_ENABLE_BIT; 1173 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP; 1174 } 1175 1176 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT; 1177 } 1178 1179 frag = -1; 1180 while (frag <= last_frag) { 1181 if (frag == -1) { 1182 buffer = skb->data; 1183 buflen = skb_headlen(skb); 1184 } else { 1185 skb_frag = skb_si->frags + frag; 1186 buffer = skb_frag_address(skb_frag); 1187 buflen = skb_frag_size(skb_frag); 1188 } 1189 1190 if (frag == last_frag) { 1191 word3 |= EOF_BIT; 1192 txq->skb[w] = skb; 1193 } 1194 1195 mapping = dma_map_single(geth->dev, buffer, buflen, 1196 DMA_TO_DEVICE); 1197 if (dma_mapping_error(geth->dev, mapping)) 1198 goto map_error; 1199 1200 txd = txq->ring + w; 1201 txd->word0.bits32 = buflen; 1202 txd->word1.bits32 = word1; 1203 txd->word2.buf_adr = mapping; 1204 txd->word3.bits32 = word3; 1205 1206 word3 &= MTU_SIZE_BIT_MASK; 1207 w++; 1208 w &= m; 1209 frag++; 1210 } 1211 1212 *desc = w; 1213 return 0; 1214 1215 map_error: 1216 while (w != *desc) { 1217 w--; 1218 w &= m; 1219 1220 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr, 1221 txq->ring[w].word0.bits.buffer_size, 1222 DMA_TO_DEVICE); 1223 } 1224 return -ENOMEM; 1225 } 1226 1227 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb, 1228 struct net_device *netdev) 1229 { 1230 struct gemini_ethernet_port *port = netdev_priv(netdev); 1231 unsigned short m = (1 << port->txq_order) - 1; 1232 struct netdev_queue *ntxq; 1233 unsigned short r, w, d; 1234 void __iomem *ptr_reg; 1235 struct gmac_txq *txq; 1236 int txq_num, nfrags; 1237 union dma_rwptr rw; 1238 1239 if (skb->len >= 0x10000) 1240 goto out_drop_free; 1241 1242 txq_num = skb_get_queue_mapping(skb); 1243 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num); 1244 txq = &port->txq[txq_num]; 1245 ntxq = netdev_get_tx_queue(netdev, txq_num); 1246 nfrags = skb_shinfo(skb)->nr_frags; 1247 1248 rw.bits32 = readl(ptr_reg); 1249 r = rw.bits.rptr; 1250 w = rw.bits.wptr; 1251 1252 d = txq->cptr - w - 1; 1253 d &= m; 1254 1255 if (d < nfrags + 2) { 1256 gmac_clean_txq(netdev, txq, r); 1257 d = txq->cptr - w - 1; 1258 d &= m; 1259 1260 if (d < nfrags + 2) { 1261 netif_tx_stop_queue(ntxq); 1262 1263 d = txq->cptr + nfrags + 16; 1264 d &= m; 1265 txq->ring[d].word3.bits.eofie = 1; 1266 gmac_tx_irq_enable(netdev, txq_num, 1); 1267 1268 u64_stats_update_begin(&port->tx_stats_syncp); 1269 netdev->stats.tx_fifo_errors++; 1270 u64_stats_update_end(&port->tx_stats_syncp); 1271 return NETDEV_TX_BUSY; 1272 } 1273 } 1274 1275 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) { 1276 if (skb_linearize(skb)) 1277 goto out_drop; 1278 1279 u64_stats_update_begin(&port->tx_stats_syncp); 1280 port->tx_frags_linearized++; 1281 u64_stats_update_end(&port->tx_stats_syncp); 1282 1283 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) 1284 goto out_drop_free; 1285 } 1286 1287 writew(w, ptr_reg + 2); 1288 1289 gmac_clean_txq(netdev, txq, r); 1290 return NETDEV_TX_OK; 1291 1292 out_drop_free: 1293 dev_kfree_skb(skb); 1294 out_drop: 1295 u64_stats_update_begin(&port->tx_stats_syncp); 1296 port->stats.tx_dropped++; 1297 u64_stats_update_end(&port->tx_stats_syncp); 1298 return NETDEV_TX_OK; 1299 } 1300 1301 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue) 1302 { 1303 netdev_err(netdev, "Tx timeout\n"); 1304 gmac_dump_dma_state(netdev); 1305 } 1306 1307 static void gmac_enable_irq(struct net_device *netdev, int enable) 1308 { 1309 struct gemini_ethernet_port *port = netdev_priv(netdev); 1310 struct gemini_ethernet *geth = port->geth; 1311 unsigned long flags; 1312 u32 val, mask; 1313 1314 netdev_dbg(netdev, "%s device %d %s\n", __func__, 1315 netdev->dev_id, enable ? "enable" : "disable"); 1316 spin_lock_irqsave(&geth->irq_lock, flags); 1317 1318 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2); 1319 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1320 val = enable ? (val | mask) : (val & ~mask); 1321 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1322 1323 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1324 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1325 val = enable ? (val | mask) : (val & ~mask); 1326 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1327 1328 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8); 1329 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1330 val = enable ? (val | mask) : (val & ~mask); 1331 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1332 1333 spin_unlock_irqrestore(&geth->irq_lock, flags); 1334 } 1335 1336 static void gmac_enable_rx_irq(struct net_device *netdev, int enable) 1337 { 1338 struct gemini_ethernet_port *port = netdev_priv(netdev); 1339 struct gemini_ethernet *geth = port->geth; 1340 unsigned long flags; 1341 u32 val, mask; 1342 1343 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id, 1344 enable ? "enable" : "disable"); 1345 spin_lock_irqsave(&geth->irq_lock, flags); 1346 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1347 1348 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1349 val = enable ? (val | mask) : (val & ~mask); 1350 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1351 1352 spin_unlock_irqrestore(&geth->irq_lock, flags); 1353 } 1354 1355 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port, 1356 union gmac_rxdesc_0 word0, 1357 unsigned int frame_len) 1358 { 1359 unsigned int rx_csum = word0.bits.chksum_status; 1360 unsigned int rx_status = word0.bits.status; 1361 struct sk_buff *skb = NULL; 1362 1363 port->rx_stats[rx_status]++; 1364 port->rx_csum_stats[rx_csum]++; 1365 1366 if (word0.bits.derr || word0.bits.perr || 1367 rx_status || frame_len < ETH_ZLEN || 1368 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) { 1369 port->stats.rx_errors++; 1370 1371 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status)) 1372 port->stats.rx_length_errors++; 1373 if (RX_ERROR_OVER(rx_status)) 1374 port->stats.rx_over_errors++; 1375 if (RX_ERROR_CRC(rx_status)) 1376 port->stats.rx_crc_errors++; 1377 if (RX_ERROR_FRAME(rx_status)) 1378 port->stats.rx_frame_errors++; 1379 return NULL; 1380 } 1381 1382 skb = napi_get_frags(&port->napi); 1383 if (!skb) 1384 goto update_exit; 1385 1386 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK) 1387 skb->ip_summed = CHECKSUM_UNNECESSARY; 1388 1389 update_exit: 1390 port->stats.rx_bytes += frame_len; 1391 port->stats.rx_packets++; 1392 return skb; 1393 } 1394 1395 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget) 1396 { 1397 struct gemini_ethernet_port *port = netdev_priv(netdev); 1398 unsigned short m = (1 << port->rxq_order) - 1; 1399 struct gemini_ethernet *geth = port->geth; 1400 void __iomem *ptr_reg = port->rxq_rwptr; 1401 unsigned int frame_len, frag_len; 1402 struct gmac_rxdesc *rx = NULL; 1403 struct gmac_queue_page *gpage; 1404 static struct sk_buff *skb; 1405 union gmac_rxdesc_0 word0; 1406 union gmac_rxdesc_1 word1; 1407 union gmac_rxdesc_3 word3; 1408 struct page *page = NULL; 1409 unsigned int page_offs; 1410 unsigned short r, w; 1411 union dma_rwptr rw; 1412 dma_addr_t mapping; 1413 int frag_nr = 0; 1414 1415 rw.bits32 = readl(ptr_reg); 1416 /* Reset interrupt as all packages until here are taken into account */ 1417 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id, 1418 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1419 r = rw.bits.rptr; 1420 w = rw.bits.wptr; 1421 1422 while (budget && w != r) { 1423 rx = port->rxq_ring + r; 1424 word0 = rx->word0; 1425 word1 = rx->word1; 1426 mapping = rx->word2.buf_adr; 1427 word3 = rx->word3; 1428 1429 r++; 1430 r &= m; 1431 1432 frag_len = word0.bits.buffer_size; 1433 frame_len = word1.bits.byte_count; 1434 page_offs = mapping & ~PAGE_MASK; 1435 1436 if (!mapping) { 1437 netdev_err(netdev, 1438 "rxq[%u]: HW BUG: zero DMA desc\n", r); 1439 goto err_drop; 1440 } 1441 1442 /* Freeq pointers are one page off */ 1443 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 1444 if (!gpage) { 1445 dev_err(geth->dev, "could not find mapping\n"); 1446 continue; 1447 } 1448 page = gpage->page; 1449 1450 if (word3.bits32 & SOF_BIT) { 1451 if (skb) { 1452 napi_free_frags(&port->napi); 1453 port->stats.rx_dropped++; 1454 } 1455 1456 skb = gmac_skb_if_good_frame(port, word0, frame_len); 1457 if (!skb) 1458 goto err_drop; 1459 1460 page_offs += NET_IP_ALIGN; 1461 frag_len -= NET_IP_ALIGN; 1462 frag_nr = 0; 1463 1464 } else if (!skb) { 1465 put_page(page); 1466 continue; 1467 } 1468 1469 if (word3.bits32 & EOF_BIT) 1470 frag_len = frame_len - skb->len; 1471 1472 /* append page frag to skb */ 1473 if (frag_nr == MAX_SKB_FRAGS) 1474 goto err_drop; 1475 1476 if (frag_len == 0) 1477 netdev_err(netdev, "Received fragment with len = 0\n"); 1478 1479 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len); 1480 skb->len += frag_len; 1481 skb->data_len += frag_len; 1482 skb->truesize += frag_len; 1483 frag_nr++; 1484 1485 if (word3.bits32 & EOF_BIT) { 1486 napi_gro_frags(&port->napi); 1487 skb = NULL; 1488 --budget; 1489 } 1490 continue; 1491 1492 err_drop: 1493 if (skb) { 1494 napi_free_frags(&port->napi); 1495 skb = NULL; 1496 } 1497 1498 if (mapping) 1499 put_page(page); 1500 1501 port->stats.rx_dropped++; 1502 } 1503 1504 writew(r, ptr_reg); 1505 return budget; 1506 } 1507 1508 static int gmac_napi_poll(struct napi_struct *napi, int budget) 1509 { 1510 struct gemini_ethernet_port *port = netdev_priv(napi->dev); 1511 struct gemini_ethernet *geth = port->geth; 1512 unsigned int freeq_threshold; 1513 unsigned int received; 1514 1515 freeq_threshold = 1 << (geth->freeq_order - 1); 1516 u64_stats_update_begin(&port->rx_stats_syncp); 1517 1518 received = gmac_rx(napi->dev, budget); 1519 if (received < budget) { 1520 napi_gro_flush(napi, false); 1521 napi_complete_done(napi, received); 1522 gmac_enable_rx_irq(napi->dev, 1); 1523 ++port->rx_napi_exits; 1524 } 1525 1526 port->freeq_refill += (budget - received); 1527 if (port->freeq_refill > freeq_threshold) { 1528 port->freeq_refill -= freeq_threshold; 1529 geth_fill_freeq(geth, true); 1530 } 1531 1532 u64_stats_update_end(&port->rx_stats_syncp); 1533 return received; 1534 } 1535 1536 static void gmac_dump_dma_state(struct net_device *netdev) 1537 { 1538 struct gemini_ethernet_port *port = netdev_priv(netdev); 1539 struct gemini_ethernet *geth = port->geth; 1540 void __iomem *ptr_reg; 1541 u32 reg[5]; 1542 1543 /* Interrupt status */ 1544 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1545 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1546 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 1547 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 1548 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1549 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1550 reg[0], reg[1], reg[2], reg[3], reg[4]); 1551 1552 /* Interrupt enable */ 1553 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1554 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1555 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 1556 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 1557 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1558 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1559 reg[0], reg[1], reg[2], reg[3], reg[4]); 1560 1561 /* RX DMA status */ 1562 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG); 1563 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG); 1564 reg[2] = GET_RPTR(port->rxq_rwptr); 1565 reg[3] = GET_WPTR(port->rxq_rwptr); 1566 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1567 reg[0], reg[1], reg[2], reg[3]); 1568 1569 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG); 1570 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG); 1571 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG); 1572 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG); 1573 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1574 reg[0], reg[1], reg[2], reg[3]); 1575 1576 /* TX DMA status */ 1577 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 1578 1579 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG); 1580 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG); 1581 reg[2] = GET_RPTR(ptr_reg); 1582 reg[3] = GET_WPTR(ptr_reg); 1583 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1584 reg[0], reg[1], reg[2], reg[3]); 1585 1586 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG); 1587 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG); 1588 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG); 1589 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG); 1590 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1591 reg[0], reg[1], reg[2], reg[3]); 1592 1593 /* FREE queues status */ 1594 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG; 1595 1596 reg[0] = GET_RPTR(ptr_reg); 1597 reg[1] = GET_WPTR(ptr_reg); 1598 1599 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG; 1600 1601 reg[2] = GET_RPTR(ptr_reg); 1602 reg[3] = GET_WPTR(ptr_reg); 1603 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n", 1604 reg[0], reg[1], reg[2], reg[3]); 1605 } 1606 1607 static void gmac_update_hw_stats(struct net_device *netdev) 1608 { 1609 struct gemini_ethernet_port *port = netdev_priv(netdev); 1610 unsigned int rx_discards, rx_mcast, rx_bcast; 1611 struct gemini_ethernet *geth = port->geth; 1612 unsigned long flags; 1613 1614 spin_lock_irqsave(&geth->irq_lock, flags); 1615 u64_stats_update_begin(&port->ir_stats_syncp); 1616 1617 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS); 1618 port->hw_stats[0] += rx_discards; 1619 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS); 1620 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST); 1621 port->hw_stats[2] += rx_mcast; 1622 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST); 1623 port->hw_stats[3] += rx_bcast; 1624 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1); 1625 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2); 1626 1627 port->stats.rx_missed_errors += rx_discards; 1628 port->stats.multicast += rx_mcast; 1629 port->stats.multicast += rx_bcast; 1630 1631 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8), 1632 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1633 1634 u64_stats_update_end(&port->ir_stats_syncp); 1635 spin_unlock_irqrestore(&geth->irq_lock, flags); 1636 } 1637 1638 /** 1639 * gmac_get_intr_flags() - get interrupt status flags for a port from 1640 * @netdev: the net device for the port to get flags from 1641 * @i: the interrupt status register 0..4 1642 */ 1643 static u32 gmac_get_intr_flags(struct net_device *netdev, int i) 1644 { 1645 struct gemini_ethernet_port *port = netdev_priv(netdev); 1646 struct gemini_ethernet *geth = port->geth; 1647 void __iomem *irqif_reg, *irqen_reg; 1648 unsigned int offs, val; 1649 1650 /* Calculate the offset using the stride of the status registers */ 1651 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG - 1652 GLOBAL_INTERRUPT_STATUS_0_REG); 1653 1654 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs; 1655 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs; 1656 1657 val = readl(irqif_reg) & readl(irqen_reg); 1658 return val; 1659 } 1660 1661 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer) 1662 { 1663 struct gemini_ethernet_port *port = 1664 container_of(timer, struct gemini_ethernet_port, 1665 rx_coalesce_timer); 1666 1667 napi_schedule(&port->napi); 1668 return HRTIMER_NORESTART; 1669 } 1670 1671 static irqreturn_t gmac_irq(int irq, void *data) 1672 { 1673 struct gemini_ethernet_port *port; 1674 struct net_device *netdev = data; 1675 struct gemini_ethernet *geth; 1676 u32 val, orr = 0; 1677 1678 port = netdev_priv(netdev); 1679 geth = port->geth; 1680 1681 val = gmac_get_intr_flags(netdev, 0); 1682 orr |= val; 1683 1684 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) { 1685 /* Oh, crap */ 1686 netdev_err(netdev, "hw failure/sw bug\n"); 1687 gmac_dump_dma_state(netdev); 1688 1689 /* don't know how to recover, just reduce losses */ 1690 gmac_enable_irq(netdev, 0); 1691 return IRQ_HANDLED; 1692 } 1693 1694 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6))) 1695 gmac_tx_irq(netdev, 0); 1696 1697 val = gmac_get_intr_flags(netdev, 1); 1698 orr |= val; 1699 1700 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) { 1701 gmac_enable_rx_irq(netdev, 0); 1702 1703 if (!port->rx_coalesce_nsecs) { 1704 napi_schedule(&port->napi); 1705 } else { 1706 ktime_t ktime; 1707 1708 ktime = ktime_set(0, port->rx_coalesce_nsecs); 1709 hrtimer_start(&port->rx_coalesce_timer, ktime, 1710 HRTIMER_MODE_REL); 1711 } 1712 } 1713 1714 val = gmac_get_intr_flags(netdev, 4); 1715 orr |= val; 1716 1717 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8))) 1718 gmac_update_hw_stats(netdev); 1719 1720 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) { 1721 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8), 1722 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1723 1724 spin_lock(&geth->irq_lock); 1725 u64_stats_update_begin(&port->ir_stats_syncp); 1726 ++port->stats.rx_fifo_errors; 1727 u64_stats_update_end(&port->ir_stats_syncp); 1728 spin_unlock(&geth->irq_lock); 1729 } 1730 1731 return orr ? IRQ_HANDLED : IRQ_NONE; 1732 } 1733 1734 static void gmac_start_dma(struct gemini_ethernet_port *port) 1735 { 1736 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1737 union gmac_dma_ctrl dma_ctrl; 1738 1739 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1740 dma_ctrl.bits.rd_enable = 1; 1741 dma_ctrl.bits.td_enable = 1; 1742 dma_ctrl.bits.loopback = 0; 1743 dma_ctrl.bits.drop_small_ack = 0; 1744 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN; 1745 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED; 1746 dma_ctrl.bits.rd_burst_size = HBURST_INCR8; 1747 dma_ctrl.bits.rd_bus = HSIZE_8; 1748 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE; 1749 dma_ctrl.bits.td_burst_size = HBURST_INCR8; 1750 dma_ctrl.bits.td_bus = HSIZE_8; 1751 1752 writel(dma_ctrl.bits32, dma_ctrl_reg); 1753 } 1754 1755 static void gmac_stop_dma(struct gemini_ethernet_port *port) 1756 { 1757 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1758 union gmac_dma_ctrl dma_ctrl; 1759 1760 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1761 dma_ctrl.bits.rd_enable = 0; 1762 dma_ctrl.bits.td_enable = 0; 1763 writel(dma_ctrl.bits32, dma_ctrl_reg); 1764 } 1765 1766 static int gmac_open(struct net_device *netdev) 1767 { 1768 struct gemini_ethernet_port *port = netdev_priv(netdev); 1769 int err; 1770 1771 if (!netdev->phydev) { 1772 err = gmac_setup_phy(netdev); 1773 if (err) { 1774 netif_err(port, ifup, netdev, 1775 "PHY init failed: %d\n", err); 1776 return err; 1777 } 1778 } 1779 1780 err = request_irq(netdev->irq, gmac_irq, 1781 IRQF_SHARED, netdev->name, netdev); 1782 if (err) { 1783 netdev_err(netdev, "no IRQ\n"); 1784 return err; 1785 } 1786 1787 netif_carrier_off(netdev); 1788 phy_start(netdev->phydev); 1789 1790 err = geth_resize_freeq(port); 1791 /* It's fine if it's just busy, the other port has set up 1792 * the freeq in that case. 1793 */ 1794 if (err && (err != -EBUSY)) { 1795 netdev_err(netdev, "could not resize freeq\n"); 1796 goto err_stop_phy; 1797 } 1798 1799 err = gmac_setup_rxq(netdev); 1800 if (err) { 1801 netdev_err(netdev, "could not setup RXQ\n"); 1802 goto err_stop_phy; 1803 } 1804 1805 err = gmac_setup_txqs(netdev); 1806 if (err) { 1807 netdev_err(netdev, "could not setup TXQs\n"); 1808 gmac_cleanup_rxq(netdev); 1809 goto err_stop_phy; 1810 } 1811 1812 napi_enable(&port->napi); 1813 1814 gmac_start_dma(port); 1815 gmac_enable_irq(netdev, 1); 1816 gmac_enable_tx_rx(netdev); 1817 netif_tx_start_all_queues(netdev); 1818 1819 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC, 1820 HRTIMER_MODE_REL); 1821 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired; 1822 1823 netdev_dbg(netdev, "opened\n"); 1824 1825 return 0; 1826 1827 err_stop_phy: 1828 phy_stop(netdev->phydev); 1829 free_irq(netdev->irq, netdev); 1830 return err; 1831 } 1832 1833 static int gmac_stop(struct net_device *netdev) 1834 { 1835 struct gemini_ethernet_port *port = netdev_priv(netdev); 1836 1837 hrtimer_cancel(&port->rx_coalesce_timer); 1838 netif_tx_stop_all_queues(netdev); 1839 gmac_disable_tx_rx(netdev); 1840 gmac_stop_dma(port); 1841 napi_disable(&port->napi); 1842 1843 gmac_enable_irq(netdev, 0); 1844 gmac_cleanup_rxq(netdev); 1845 gmac_cleanup_txqs(netdev); 1846 1847 phy_stop(netdev->phydev); 1848 free_irq(netdev->irq, netdev); 1849 1850 gmac_update_hw_stats(netdev); 1851 return 0; 1852 } 1853 1854 static void gmac_set_rx_mode(struct net_device *netdev) 1855 { 1856 struct gemini_ethernet_port *port = netdev_priv(netdev); 1857 union gmac_rx_fltr filter = { .bits = { 1858 .broadcast = 1, 1859 .multicast = 1, 1860 .unicast = 1, 1861 } }; 1862 struct netdev_hw_addr *ha; 1863 unsigned int bit_nr; 1864 u32 mc_filter[2]; 1865 1866 mc_filter[1] = 0; 1867 mc_filter[0] = 0; 1868 1869 if (netdev->flags & IFF_PROMISC) { 1870 filter.bits.error = 1; 1871 filter.bits.promiscuous = 1; 1872 mc_filter[1] = ~0; 1873 mc_filter[0] = ~0; 1874 } else if (netdev->flags & IFF_ALLMULTI) { 1875 mc_filter[1] = ~0; 1876 mc_filter[0] = ~0; 1877 } else { 1878 netdev_for_each_mc_addr(ha, netdev) { 1879 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f; 1880 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f); 1881 } 1882 } 1883 1884 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0); 1885 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1); 1886 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR); 1887 } 1888 1889 static void gmac_write_mac_address(struct net_device *netdev) 1890 { 1891 struct gemini_ethernet_port *port = netdev_priv(netdev); 1892 __le32 addr[3]; 1893 1894 memset(addr, 0, sizeof(addr)); 1895 memcpy(addr, netdev->dev_addr, ETH_ALEN); 1896 1897 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0); 1898 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1); 1899 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2); 1900 } 1901 1902 static int gmac_set_mac_address(struct net_device *netdev, void *addr) 1903 { 1904 struct sockaddr *sa = addr; 1905 1906 memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN); 1907 gmac_write_mac_address(netdev); 1908 1909 return 0; 1910 } 1911 1912 static void gmac_clear_hw_stats(struct net_device *netdev) 1913 { 1914 struct gemini_ethernet_port *port = netdev_priv(netdev); 1915 1916 readl(port->gmac_base + GMAC_IN_DISCARDS); 1917 readl(port->gmac_base + GMAC_IN_ERRORS); 1918 readl(port->gmac_base + GMAC_IN_MCAST); 1919 readl(port->gmac_base + GMAC_IN_BCAST); 1920 readl(port->gmac_base + GMAC_IN_MAC1); 1921 readl(port->gmac_base + GMAC_IN_MAC2); 1922 } 1923 1924 static void gmac_get_stats64(struct net_device *netdev, 1925 struct rtnl_link_stats64 *stats) 1926 { 1927 struct gemini_ethernet_port *port = netdev_priv(netdev); 1928 unsigned int start; 1929 1930 gmac_update_hw_stats(netdev); 1931 1932 /* Racing with RX NAPI */ 1933 do { 1934 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 1935 1936 stats->rx_packets = port->stats.rx_packets; 1937 stats->rx_bytes = port->stats.rx_bytes; 1938 stats->rx_errors = port->stats.rx_errors; 1939 stats->rx_dropped = port->stats.rx_dropped; 1940 1941 stats->rx_length_errors = port->stats.rx_length_errors; 1942 stats->rx_over_errors = port->stats.rx_over_errors; 1943 stats->rx_crc_errors = port->stats.rx_crc_errors; 1944 stats->rx_frame_errors = port->stats.rx_frame_errors; 1945 1946 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 1947 1948 /* Racing with MIB and TX completion interrupts */ 1949 do { 1950 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 1951 1952 stats->tx_errors = port->stats.tx_errors; 1953 stats->tx_packets = port->stats.tx_packets; 1954 stats->tx_bytes = port->stats.tx_bytes; 1955 1956 stats->multicast = port->stats.multicast; 1957 stats->rx_missed_errors = port->stats.rx_missed_errors; 1958 stats->rx_fifo_errors = port->stats.rx_fifo_errors; 1959 1960 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 1961 1962 /* Racing with hard_start_xmit */ 1963 do { 1964 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 1965 1966 stats->tx_dropped = port->stats.tx_dropped; 1967 1968 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 1969 1970 stats->rx_dropped += stats->rx_missed_errors; 1971 } 1972 1973 static int gmac_change_mtu(struct net_device *netdev, int new_mtu) 1974 { 1975 int max_len = gmac_pick_rx_max_len(new_mtu); 1976 1977 if (max_len < 0) 1978 return -EINVAL; 1979 1980 gmac_disable_tx_rx(netdev); 1981 1982 netdev->mtu = new_mtu; 1983 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT, 1984 CONFIG0_MAXLEN_MASK); 1985 1986 netdev_update_features(netdev); 1987 1988 gmac_enable_tx_rx(netdev); 1989 1990 return 0; 1991 } 1992 1993 static netdev_features_t gmac_fix_features(struct net_device *netdev, 1994 netdev_features_t features) 1995 { 1996 if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK) 1997 features &= ~GMAC_OFFLOAD_FEATURES; 1998 1999 return features; 2000 } 2001 2002 static int gmac_set_features(struct net_device *netdev, 2003 netdev_features_t features) 2004 { 2005 struct gemini_ethernet_port *port = netdev_priv(netdev); 2006 int enable = features & NETIF_F_RXCSUM; 2007 unsigned long flags; 2008 u32 reg; 2009 2010 spin_lock_irqsave(&port->config_lock, flags); 2011 2012 reg = readl(port->gmac_base + GMAC_CONFIG0); 2013 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM; 2014 writel(reg, port->gmac_base + GMAC_CONFIG0); 2015 2016 spin_unlock_irqrestore(&port->config_lock, flags); 2017 return 0; 2018 } 2019 2020 static int gmac_get_sset_count(struct net_device *netdev, int sset) 2021 { 2022 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0; 2023 } 2024 2025 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data) 2026 { 2027 if (stringset != ETH_SS_STATS) 2028 return; 2029 2030 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings)); 2031 } 2032 2033 static void gmac_get_ethtool_stats(struct net_device *netdev, 2034 struct ethtool_stats *estats, u64 *values) 2035 { 2036 struct gemini_ethernet_port *port = netdev_priv(netdev); 2037 unsigned int start; 2038 u64 *p; 2039 int i; 2040 2041 gmac_update_hw_stats(netdev); 2042 2043 /* Racing with MIB interrupt */ 2044 do { 2045 p = values; 2046 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 2047 2048 for (i = 0; i < RX_STATS_NUM; i++) 2049 *p++ = port->hw_stats[i]; 2050 2051 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 2052 values = p; 2053 2054 /* Racing with RX NAPI */ 2055 do { 2056 p = values; 2057 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 2058 2059 for (i = 0; i < RX_STATUS_NUM; i++) 2060 *p++ = port->rx_stats[i]; 2061 for (i = 0; i < RX_CHKSUM_NUM; i++) 2062 *p++ = port->rx_csum_stats[i]; 2063 *p++ = port->rx_napi_exits; 2064 2065 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 2066 values = p; 2067 2068 /* Racing with TX start_xmit */ 2069 do { 2070 p = values; 2071 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 2072 2073 for (i = 0; i < TX_MAX_FRAGS; i++) { 2074 *values++ = port->tx_frag_stats[i]; 2075 port->tx_frag_stats[i] = 0; 2076 } 2077 *values++ = port->tx_frags_linearized; 2078 *values++ = port->tx_hw_csummed; 2079 2080 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 2081 } 2082 2083 static int gmac_get_ksettings(struct net_device *netdev, 2084 struct ethtool_link_ksettings *cmd) 2085 { 2086 if (!netdev->phydev) 2087 return -ENXIO; 2088 phy_ethtool_ksettings_get(netdev->phydev, cmd); 2089 2090 return 0; 2091 } 2092 2093 static int gmac_set_ksettings(struct net_device *netdev, 2094 const struct ethtool_link_ksettings *cmd) 2095 { 2096 if (!netdev->phydev) 2097 return -ENXIO; 2098 return phy_ethtool_ksettings_set(netdev->phydev, cmd); 2099 } 2100 2101 static int gmac_nway_reset(struct net_device *netdev) 2102 { 2103 if (!netdev->phydev) 2104 return -ENXIO; 2105 return phy_start_aneg(netdev->phydev); 2106 } 2107 2108 static void gmac_get_pauseparam(struct net_device *netdev, 2109 struct ethtool_pauseparam *pparam) 2110 { 2111 struct gemini_ethernet_port *port = netdev_priv(netdev); 2112 union gmac_config0 config0; 2113 2114 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 2115 2116 pparam->rx_pause = config0.bits.rx_fc_en; 2117 pparam->tx_pause = config0.bits.tx_fc_en; 2118 pparam->autoneg = true; 2119 } 2120 2121 static void gmac_get_ringparam(struct net_device *netdev, 2122 struct ethtool_ringparam *rp) 2123 { 2124 struct gemini_ethernet_port *port = netdev_priv(netdev); 2125 union gmac_config0 config0; 2126 2127 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 2128 2129 rp->rx_max_pending = 1 << 15; 2130 rp->rx_mini_max_pending = 0; 2131 rp->rx_jumbo_max_pending = 0; 2132 rp->tx_max_pending = 1 << 15; 2133 2134 rp->rx_pending = 1 << port->rxq_order; 2135 rp->rx_mini_pending = 0; 2136 rp->rx_jumbo_pending = 0; 2137 rp->tx_pending = 1 << port->txq_order; 2138 } 2139 2140 static int gmac_set_ringparam(struct net_device *netdev, 2141 struct ethtool_ringparam *rp) 2142 { 2143 struct gemini_ethernet_port *port = netdev_priv(netdev); 2144 int err = 0; 2145 2146 if (netif_running(netdev)) 2147 return -EBUSY; 2148 2149 if (rp->rx_pending) { 2150 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1); 2151 err = geth_resize_freeq(port); 2152 } 2153 if (rp->tx_pending) { 2154 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1); 2155 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 2156 } 2157 2158 return err; 2159 } 2160 2161 static int gmac_get_coalesce(struct net_device *netdev, 2162 struct ethtool_coalesce *ecmd) 2163 { 2164 struct gemini_ethernet_port *port = netdev_priv(netdev); 2165 2166 ecmd->rx_max_coalesced_frames = 1; 2167 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets; 2168 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000; 2169 2170 return 0; 2171 } 2172 2173 static int gmac_set_coalesce(struct net_device *netdev, 2174 struct ethtool_coalesce *ecmd) 2175 { 2176 struct gemini_ethernet_port *port = netdev_priv(netdev); 2177 2178 if (ecmd->tx_max_coalesced_frames < 1) 2179 return -EINVAL; 2180 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order) 2181 return -EINVAL; 2182 2183 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames; 2184 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000; 2185 2186 return 0; 2187 } 2188 2189 static u32 gmac_get_msglevel(struct net_device *netdev) 2190 { 2191 struct gemini_ethernet_port *port = netdev_priv(netdev); 2192 2193 return port->msg_enable; 2194 } 2195 2196 static void gmac_set_msglevel(struct net_device *netdev, u32 level) 2197 { 2198 struct gemini_ethernet_port *port = netdev_priv(netdev); 2199 2200 port->msg_enable = level; 2201 } 2202 2203 static void gmac_get_drvinfo(struct net_device *netdev, 2204 struct ethtool_drvinfo *info) 2205 { 2206 strcpy(info->driver, DRV_NAME); 2207 strcpy(info->bus_info, netdev->dev_id ? "1" : "0"); 2208 } 2209 2210 static const struct net_device_ops gmac_351x_ops = { 2211 .ndo_init = gmac_init, 2212 .ndo_uninit = gmac_uninit, 2213 .ndo_open = gmac_open, 2214 .ndo_stop = gmac_stop, 2215 .ndo_start_xmit = gmac_start_xmit, 2216 .ndo_tx_timeout = gmac_tx_timeout, 2217 .ndo_set_rx_mode = gmac_set_rx_mode, 2218 .ndo_set_mac_address = gmac_set_mac_address, 2219 .ndo_get_stats64 = gmac_get_stats64, 2220 .ndo_change_mtu = gmac_change_mtu, 2221 .ndo_fix_features = gmac_fix_features, 2222 .ndo_set_features = gmac_set_features, 2223 }; 2224 2225 static const struct ethtool_ops gmac_351x_ethtool_ops = { 2226 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS | 2227 ETHTOOL_COALESCE_MAX_FRAMES, 2228 .get_sset_count = gmac_get_sset_count, 2229 .get_strings = gmac_get_strings, 2230 .get_ethtool_stats = gmac_get_ethtool_stats, 2231 .get_link = ethtool_op_get_link, 2232 .get_link_ksettings = gmac_get_ksettings, 2233 .set_link_ksettings = gmac_set_ksettings, 2234 .nway_reset = gmac_nway_reset, 2235 .get_pauseparam = gmac_get_pauseparam, 2236 .get_ringparam = gmac_get_ringparam, 2237 .set_ringparam = gmac_set_ringparam, 2238 .get_coalesce = gmac_get_coalesce, 2239 .set_coalesce = gmac_set_coalesce, 2240 .get_msglevel = gmac_get_msglevel, 2241 .set_msglevel = gmac_set_msglevel, 2242 .get_drvinfo = gmac_get_drvinfo, 2243 }; 2244 2245 static irqreturn_t gemini_port_irq_thread(int irq, void *data) 2246 { 2247 unsigned long irqmask = SWFQ_EMPTY_INT_BIT; 2248 struct gemini_ethernet_port *port = data; 2249 struct gemini_ethernet *geth; 2250 unsigned long flags; 2251 2252 geth = port->geth; 2253 /* The queue is half empty so refill it */ 2254 geth_fill_freeq(geth, true); 2255 2256 spin_lock_irqsave(&geth->irq_lock, flags); 2257 /* ACK queue interrupt */ 2258 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2259 /* Enable queue interrupt again */ 2260 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2261 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2262 spin_unlock_irqrestore(&geth->irq_lock, flags); 2263 2264 return IRQ_HANDLED; 2265 } 2266 2267 static irqreturn_t gemini_port_irq(int irq, void *data) 2268 { 2269 struct gemini_ethernet_port *port = data; 2270 struct gemini_ethernet *geth; 2271 irqreturn_t ret = IRQ_NONE; 2272 u32 val, en; 2273 2274 geth = port->geth; 2275 spin_lock(&geth->irq_lock); 2276 2277 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2278 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2279 2280 if (val & en & SWFQ_EMPTY_INT_BIT) { 2281 /* Disable the queue empty interrupt while we work on 2282 * processing the queue. Also disable overrun interrupts 2283 * as there is not much we can do about it here. 2284 */ 2285 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT 2286 | GMAC1_RX_OVERRUN_INT_BIT); 2287 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2288 ret = IRQ_WAKE_THREAD; 2289 } 2290 2291 spin_unlock(&geth->irq_lock); 2292 2293 return ret; 2294 } 2295 2296 static void gemini_port_remove(struct gemini_ethernet_port *port) 2297 { 2298 if (port->netdev) 2299 unregister_netdev(port->netdev); 2300 clk_disable_unprepare(port->pclk); 2301 geth_cleanup_freeq(port->geth); 2302 } 2303 2304 static void gemini_ethernet_init(struct gemini_ethernet *geth) 2305 { 2306 /* Only do this once both ports are online */ 2307 if (geth->initialized) 2308 return; 2309 if (geth->port0 && geth->port1) 2310 geth->initialized = true; 2311 else 2312 return; 2313 2314 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 2315 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 2316 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 2317 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 2318 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2319 2320 /* Interrupt config: 2321 * 2322 * GMAC0 intr bits ------> int0 ----> eth0 2323 * GMAC1 intr bits ------> int1 ----> eth1 2324 * TOE intr -------------> int1 ----> eth1 2325 * Classification Intr --> int0 ----> eth0 2326 * Default Q0 -----------> int0 ----> eth0 2327 * Default Q1 -----------> int1 ----> eth1 2328 * FreeQ intr -----------> int1 ----> eth1 2329 */ 2330 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG); 2331 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG); 2332 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG); 2333 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG); 2334 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG); 2335 2336 /* edge-triggered interrupts packed to level-triggered one... */ 2337 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 2338 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 2339 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 2340 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 2341 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2342 2343 /* Set up queue */ 2344 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 2345 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG); 2346 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG); 2347 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG); 2348 2349 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER; 2350 /* This makes the queue resize on probe() so that we 2351 * set up and enable the queue IRQ. FIXME: fragile. 2352 */ 2353 geth->freeq_order = 1; 2354 } 2355 2356 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port) 2357 { 2358 port->mac_addr[0] = 2359 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0)); 2360 port->mac_addr[1] = 2361 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1)); 2362 port->mac_addr[2] = 2363 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2)); 2364 } 2365 2366 static int gemini_ethernet_port_probe(struct platform_device *pdev) 2367 { 2368 char *port_names[2] = { "ethernet0", "ethernet1" }; 2369 struct gemini_ethernet_port *port; 2370 struct device *dev = &pdev->dev; 2371 struct gemini_ethernet *geth; 2372 struct net_device *netdev; 2373 struct resource *gmacres; 2374 struct resource *dmares; 2375 struct device *parent; 2376 unsigned int id; 2377 int irq; 2378 int ret; 2379 2380 parent = dev->parent; 2381 geth = dev_get_drvdata(parent); 2382 2383 if (!strcmp(dev_name(dev), "60008000.ethernet-port")) 2384 id = 0; 2385 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port")) 2386 id = 1; 2387 else 2388 return -ENODEV; 2389 2390 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id); 2391 2392 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM); 2393 if (!netdev) { 2394 dev_err(dev, "Can't allocate ethernet device #%d\n", id); 2395 return -ENOMEM; 2396 } 2397 2398 port = netdev_priv(netdev); 2399 SET_NETDEV_DEV(netdev, dev); 2400 port->netdev = netdev; 2401 port->id = id; 2402 port->geth = geth; 2403 port->dev = dev; 2404 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 2405 2406 /* DMA memory */ 2407 dmares = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2408 if (!dmares) { 2409 dev_err(dev, "no DMA resource\n"); 2410 return -ENODEV; 2411 } 2412 port->dma_base = devm_ioremap_resource(dev, dmares); 2413 if (IS_ERR(port->dma_base)) 2414 return PTR_ERR(port->dma_base); 2415 2416 /* GMAC config memory */ 2417 gmacres = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2418 if (!gmacres) { 2419 dev_err(dev, "no GMAC resource\n"); 2420 return -ENODEV; 2421 } 2422 port->gmac_base = devm_ioremap_resource(dev, gmacres); 2423 if (IS_ERR(port->gmac_base)) 2424 return PTR_ERR(port->gmac_base); 2425 2426 /* Interrupt */ 2427 irq = platform_get_irq(pdev, 0); 2428 if (irq <= 0) 2429 return irq ? irq : -ENODEV; 2430 port->irq = irq; 2431 2432 /* Clock the port */ 2433 port->pclk = devm_clk_get(dev, "PCLK"); 2434 if (IS_ERR(port->pclk)) { 2435 dev_err(dev, "no PCLK\n"); 2436 return PTR_ERR(port->pclk); 2437 } 2438 ret = clk_prepare_enable(port->pclk); 2439 if (ret) 2440 return ret; 2441 2442 /* Maybe there is a nice ethernet address we should use */ 2443 gemini_port_save_mac_addr(port); 2444 2445 /* Reset the port */ 2446 port->reset = devm_reset_control_get_exclusive(dev, NULL); 2447 if (IS_ERR(port->reset)) { 2448 dev_err(dev, "no reset\n"); 2449 ret = PTR_ERR(port->reset); 2450 goto unprepare; 2451 } 2452 reset_control_reset(port->reset); 2453 usleep_range(100, 500); 2454 2455 /* Assign pointer in the main state container */ 2456 if (!id) 2457 geth->port0 = port; 2458 else 2459 geth->port1 = port; 2460 2461 /* This will just be done once both ports are up and reset */ 2462 gemini_ethernet_init(geth); 2463 2464 platform_set_drvdata(pdev, port); 2465 2466 /* Set up and register the netdev */ 2467 netdev->dev_id = port->id; 2468 netdev->irq = irq; 2469 netdev->netdev_ops = &gmac_351x_ops; 2470 netdev->ethtool_ops = &gmac_351x_ethtool_ops; 2471 2472 spin_lock_init(&port->config_lock); 2473 gmac_clear_hw_stats(netdev); 2474 2475 netdev->hw_features = GMAC_OFFLOAD_FEATURES; 2476 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO; 2477 /* We can handle jumbo frames up to 10236 bytes so, let's accept 2478 * payloads of 10236 bytes minus VLAN and ethernet header 2479 */ 2480 netdev->min_mtu = ETH_MIN_MTU; 2481 netdev->max_mtu = 10236 - VLAN_ETH_HLEN; 2482 2483 port->freeq_refill = 0; 2484 netif_napi_add(netdev, &port->napi, gmac_napi_poll, 2485 DEFAULT_NAPI_WEIGHT); 2486 2487 if (is_valid_ether_addr((void *)port->mac_addr)) { 2488 memcpy(netdev->dev_addr, port->mac_addr, ETH_ALEN); 2489 } else { 2490 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n", 2491 port->mac_addr[0], port->mac_addr[1], 2492 port->mac_addr[2]); 2493 dev_info(dev, "using a random ethernet address\n"); 2494 eth_random_addr(netdev->dev_addr); 2495 } 2496 gmac_write_mac_address(netdev); 2497 2498 ret = devm_request_threaded_irq(port->dev, 2499 port->irq, 2500 gemini_port_irq, 2501 gemini_port_irq_thread, 2502 IRQF_SHARED, 2503 port_names[port->id], 2504 port); 2505 if (ret) 2506 goto unprepare; 2507 2508 ret = register_netdev(netdev); 2509 if (ret) 2510 goto unprepare; 2511 2512 netdev_info(netdev, 2513 "irq %d, DMA @ 0x%pap, GMAC @ 0x%pap\n", 2514 port->irq, &dmares->start, 2515 &gmacres->start); 2516 ret = gmac_setup_phy(netdev); 2517 if (ret) 2518 netdev_info(netdev, 2519 "PHY init failed, deferring to ifup time\n"); 2520 return 0; 2521 2522 unprepare: 2523 clk_disable_unprepare(port->pclk); 2524 return ret; 2525 } 2526 2527 static int gemini_ethernet_port_remove(struct platform_device *pdev) 2528 { 2529 struct gemini_ethernet_port *port = platform_get_drvdata(pdev); 2530 2531 gemini_port_remove(port); 2532 return 0; 2533 } 2534 2535 static const struct of_device_id gemini_ethernet_port_of_match[] = { 2536 { 2537 .compatible = "cortina,gemini-ethernet-port", 2538 }, 2539 {}, 2540 }; 2541 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match); 2542 2543 static struct platform_driver gemini_ethernet_port_driver = { 2544 .driver = { 2545 .name = "gemini-ethernet-port", 2546 .of_match_table = of_match_ptr(gemini_ethernet_port_of_match), 2547 }, 2548 .probe = gemini_ethernet_port_probe, 2549 .remove = gemini_ethernet_port_remove, 2550 }; 2551 2552 static int gemini_ethernet_probe(struct platform_device *pdev) 2553 { 2554 struct device *dev = &pdev->dev; 2555 struct gemini_ethernet *geth; 2556 unsigned int retry = 5; 2557 struct resource *res; 2558 u32 val; 2559 2560 /* Global registers */ 2561 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL); 2562 if (!geth) 2563 return -ENOMEM; 2564 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2565 if (!res) 2566 return -ENODEV; 2567 geth->base = devm_ioremap_resource(dev, res); 2568 if (IS_ERR(geth->base)) 2569 return PTR_ERR(geth->base); 2570 geth->dev = dev; 2571 2572 /* Wait for ports to stabilize */ 2573 do { 2574 udelay(2); 2575 val = readl(geth->base + GLOBAL_TOE_VERSION_REG); 2576 barrier(); 2577 } while (!val && --retry); 2578 if (!retry) { 2579 dev_err(dev, "failed to reset ethernet\n"); 2580 return -EIO; 2581 } 2582 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n", 2583 (val >> 4) & 0xFFFU, val & 0xFU); 2584 2585 spin_lock_init(&geth->irq_lock); 2586 spin_lock_init(&geth->freeq_lock); 2587 2588 /* The children will use this */ 2589 platform_set_drvdata(pdev, geth); 2590 2591 /* Spawn child devices for the two ports */ 2592 return devm_of_platform_populate(dev); 2593 } 2594 2595 static int gemini_ethernet_remove(struct platform_device *pdev) 2596 { 2597 struct gemini_ethernet *geth = platform_get_drvdata(pdev); 2598 2599 geth_cleanup_freeq(geth); 2600 geth->initialized = false; 2601 2602 return 0; 2603 } 2604 2605 static const struct of_device_id gemini_ethernet_of_match[] = { 2606 { 2607 .compatible = "cortina,gemini-ethernet", 2608 }, 2609 {}, 2610 }; 2611 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match); 2612 2613 static struct platform_driver gemini_ethernet_driver = { 2614 .driver = { 2615 .name = DRV_NAME, 2616 .of_match_table = of_match_ptr(gemini_ethernet_of_match), 2617 }, 2618 .probe = gemini_ethernet_probe, 2619 .remove = gemini_ethernet_remove, 2620 }; 2621 2622 static int __init gemini_ethernet_module_init(void) 2623 { 2624 int ret; 2625 2626 ret = platform_driver_register(&gemini_ethernet_port_driver); 2627 if (ret) 2628 return ret; 2629 2630 ret = platform_driver_register(&gemini_ethernet_driver); 2631 if (ret) { 2632 platform_driver_unregister(&gemini_ethernet_port_driver); 2633 return ret; 2634 } 2635 2636 return 0; 2637 } 2638 module_init(gemini_ethernet_module_init); 2639 2640 static void __exit gemini_ethernet_module_exit(void) 2641 { 2642 platform_driver_unregister(&gemini_ethernet_driver); 2643 platform_driver_unregister(&gemini_ethernet_port_driver); 2644 } 2645 module_exit(gemini_ethernet_module_exit); 2646 2647 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>"); 2648 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver"); 2649 MODULE_LICENSE("GPL"); 2650 MODULE_ALIAS("platform:" DRV_NAME); 2651