1 // SPDX-License-Identifier: GPL-2.0 2 /* Ethernet device driver for Cortina Systems Gemini SoC 3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus 4 * Net Engine and Gigabit Ethernet MAC (GMAC) 5 * This hardware contains a TCP Offload Engine (TOE) but currently the 6 * driver does not make use of it. 7 * 8 * Authors: 9 * Linus Walleij <linus.walleij@linaro.org> 10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT) 11 * Michał Mirosław <mirq-linux@rere.qmqm.pl> 12 * Paulius Zaleckas <paulius.zaleckas@gmail.com> 13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it> 14 * Gary Chen & Ch Hsu Storlink Semiconductor 15 */ 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/spinlock.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/cache.h> 24 #include <linux/interrupt.h> 25 #include <linux/reset.h> 26 #include <linux/clk.h> 27 #include <linux/of.h> 28 #include <linux/of_mdio.h> 29 #include <linux/of_net.h> 30 #include <linux/of_platform.h> 31 #include <linux/etherdevice.h> 32 #include <linux/if_vlan.h> 33 #include <linux/skbuff.h> 34 #include <linux/phy.h> 35 #include <linux/crc32.h> 36 #include <linux/ethtool.h> 37 #include <linux/tcp.h> 38 #include <linux/u64_stats_sync.h> 39 40 #include <linux/in.h> 41 #include <linux/ip.h> 42 #include <linux/ipv6.h> 43 44 #include "gemini.h" 45 46 #define DRV_NAME "gmac-gemini" 47 48 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 49 static int debug = -1; 50 module_param(debug, int, 0); 51 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 52 53 #define HSIZE_8 0x00 54 #define HSIZE_16 0x01 55 #define HSIZE_32 0x02 56 57 #define HBURST_SINGLE 0x00 58 #define HBURST_INCR 0x01 59 #define HBURST_INCR4 0x02 60 #define HBURST_INCR8 0x03 61 62 #define HPROT_DATA_CACHE BIT(0) 63 #define HPROT_PRIVILIGED BIT(1) 64 #define HPROT_BUFFERABLE BIT(2) 65 #define HPROT_CACHABLE BIT(3) 66 67 #define DEFAULT_RX_COALESCE_NSECS 0 68 #define DEFAULT_GMAC_RXQ_ORDER 9 69 #define DEFAULT_GMAC_TXQ_ORDER 8 70 #define DEFAULT_RX_BUF_ORDER 11 71 #define DEFAULT_NAPI_WEIGHT 64 72 #define TX_MAX_FRAGS 16 73 #define TX_QUEUE_NUM 1 /* max: 6 */ 74 #define RX_MAX_ALLOC_ORDER 2 75 76 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \ 77 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT) 78 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \ 79 GMAC0_SWTQ00_FIN_INT_BIT) 80 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT) 81 82 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \ 83 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \ 84 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) 85 86 /** 87 * struct gmac_queue_page - page buffer per-page info 88 */ 89 struct gmac_queue_page { 90 struct page *page; 91 dma_addr_t mapping; 92 }; 93 94 struct gmac_txq { 95 struct gmac_txdesc *ring; 96 struct sk_buff **skb; 97 unsigned int cptr; 98 unsigned int noirq_packets; 99 }; 100 101 struct gemini_ethernet; 102 103 struct gemini_ethernet_port { 104 u8 id; /* 0 or 1 */ 105 106 struct gemini_ethernet *geth; 107 struct net_device *netdev; 108 struct device *dev; 109 void __iomem *dma_base; 110 void __iomem *gmac_base; 111 struct clk *pclk; 112 struct reset_control *reset; 113 int irq; 114 __le32 mac_addr[3]; 115 116 void __iomem *rxq_rwptr; 117 struct gmac_rxdesc *rxq_ring; 118 unsigned int rxq_order; 119 120 struct napi_struct napi; 121 struct hrtimer rx_coalesce_timer; 122 unsigned int rx_coalesce_nsecs; 123 unsigned int freeq_refill; 124 struct gmac_txq txq[TX_QUEUE_NUM]; 125 unsigned int txq_order; 126 unsigned int irq_every_tx_packets; 127 128 dma_addr_t rxq_dma_base; 129 dma_addr_t txq_dma_base; 130 131 unsigned int msg_enable; 132 spinlock_t config_lock; /* Locks config register */ 133 134 struct u64_stats_sync tx_stats_syncp; 135 struct u64_stats_sync rx_stats_syncp; 136 struct u64_stats_sync ir_stats_syncp; 137 138 struct rtnl_link_stats64 stats; 139 u64 hw_stats[RX_STATS_NUM]; 140 u64 rx_stats[RX_STATUS_NUM]; 141 u64 rx_csum_stats[RX_CHKSUM_NUM]; 142 u64 rx_napi_exits; 143 u64 tx_frag_stats[TX_MAX_FRAGS]; 144 u64 tx_frags_linearized; 145 u64 tx_hw_csummed; 146 }; 147 148 struct gemini_ethernet { 149 struct device *dev; 150 void __iomem *base; 151 struct gemini_ethernet_port *port0; 152 struct gemini_ethernet_port *port1; 153 bool initialized; 154 155 spinlock_t irq_lock; /* Locks IRQ-related registers */ 156 unsigned int freeq_order; 157 unsigned int freeq_frag_order; 158 struct gmac_rxdesc *freeq_ring; 159 dma_addr_t freeq_dma_base; 160 struct gmac_queue_page *freeq_pages; 161 unsigned int num_freeq_pages; 162 spinlock_t freeq_lock; /* Locks queue from reentrance */ 163 }; 164 165 #define GMAC_STATS_NUM ( \ 166 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \ 167 TX_MAX_FRAGS + 2) 168 169 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = { 170 "GMAC_IN_DISCARDS", 171 "GMAC_IN_ERRORS", 172 "GMAC_IN_MCAST", 173 "GMAC_IN_BCAST", 174 "GMAC_IN_MAC1", 175 "GMAC_IN_MAC2", 176 "RX_STATUS_GOOD_FRAME", 177 "RX_STATUS_TOO_LONG_GOOD_CRC", 178 "RX_STATUS_RUNT_FRAME", 179 "RX_STATUS_SFD_NOT_FOUND", 180 "RX_STATUS_CRC_ERROR", 181 "RX_STATUS_TOO_LONG_BAD_CRC", 182 "RX_STATUS_ALIGNMENT_ERROR", 183 "RX_STATUS_TOO_LONG_BAD_ALIGN", 184 "RX_STATUS_RX_ERR", 185 "RX_STATUS_DA_FILTERED", 186 "RX_STATUS_BUFFER_FULL", 187 "RX_STATUS_11", 188 "RX_STATUS_12", 189 "RX_STATUS_13", 190 "RX_STATUS_14", 191 "RX_STATUS_15", 192 "RX_CHKSUM_IP_UDP_TCP_OK", 193 "RX_CHKSUM_IP_OK_ONLY", 194 "RX_CHKSUM_NONE", 195 "RX_CHKSUM_3", 196 "RX_CHKSUM_IP_ERR_UNKNOWN", 197 "RX_CHKSUM_IP_ERR", 198 "RX_CHKSUM_TCP_UDP_ERR", 199 "RX_CHKSUM_7", 200 "RX_NAPI_EXITS", 201 "TX_FRAGS[1]", 202 "TX_FRAGS[2]", 203 "TX_FRAGS[3]", 204 "TX_FRAGS[4]", 205 "TX_FRAGS[5]", 206 "TX_FRAGS[6]", 207 "TX_FRAGS[7]", 208 "TX_FRAGS[8]", 209 "TX_FRAGS[9]", 210 "TX_FRAGS[10]", 211 "TX_FRAGS[11]", 212 "TX_FRAGS[12]", 213 "TX_FRAGS[13]", 214 "TX_FRAGS[14]", 215 "TX_FRAGS[15]", 216 "TX_FRAGS[16+]", 217 "TX_FRAGS_LINEARIZED", 218 "TX_HW_CSUMMED", 219 }; 220 221 static void gmac_dump_dma_state(struct net_device *netdev); 222 223 static void gmac_update_config0_reg(struct net_device *netdev, 224 u32 val, u32 vmask) 225 { 226 struct gemini_ethernet_port *port = netdev_priv(netdev); 227 unsigned long flags; 228 u32 reg; 229 230 spin_lock_irqsave(&port->config_lock, flags); 231 232 reg = readl(port->gmac_base + GMAC_CONFIG0); 233 reg = (reg & ~vmask) | val; 234 writel(reg, port->gmac_base + GMAC_CONFIG0); 235 236 spin_unlock_irqrestore(&port->config_lock, flags); 237 } 238 239 static void gmac_enable_tx_rx(struct net_device *netdev) 240 { 241 struct gemini_ethernet_port *port = netdev_priv(netdev); 242 unsigned long flags; 243 u32 reg; 244 245 spin_lock_irqsave(&port->config_lock, flags); 246 247 reg = readl(port->gmac_base + GMAC_CONFIG0); 248 reg &= ~CONFIG0_TX_RX_DISABLE; 249 writel(reg, port->gmac_base + GMAC_CONFIG0); 250 251 spin_unlock_irqrestore(&port->config_lock, flags); 252 } 253 254 static void gmac_disable_tx_rx(struct net_device *netdev) 255 { 256 struct gemini_ethernet_port *port = netdev_priv(netdev); 257 unsigned long flags; 258 u32 val; 259 260 spin_lock_irqsave(&port->config_lock, flags); 261 262 val = readl(port->gmac_base + GMAC_CONFIG0); 263 val |= CONFIG0_TX_RX_DISABLE; 264 writel(val, port->gmac_base + GMAC_CONFIG0); 265 266 spin_unlock_irqrestore(&port->config_lock, flags); 267 268 mdelay(10); /* let GMAC consume packet */ 269 } 270 271 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx) 272 { 273 struct gemini_ethernet_port *port = netdev_priv(netdev); 274 unsigned long flags; 275 u32 val; 276 277 spin_lock_irqsave(&port->config_lock, flags); 278 279 val = readl(port->gmac_base + GMAC_CONFIG0); 280 val &= ~CONFIG0_FLOW_CTL; 281 if (tx) 282 val |= CONFIG0_FLOW_TX; 283 if (rx) 284 val |= CONFIG0_FLOW_RX; 285 writel(val, port->gmac_base + GMAC_CONFIG0); 286 287 spin_unlock_irqrestore(&port->config_lock, flags); 288 } 289 290 static void gmac_speed_set(struct net_device *netdev) 291 { 292 struct gemini_ethernet_port *port = netdev_priv(netdev); 293 struct phy_device *phydev = netdev->phydev; 294 union gmac_status status, old_status; 295 int pause_tx = 0; 296 int pause_rx = 0; 297 298 status.bits32 = readl(port->gmac_base + GMAC_STATUS); 299 old_status.bits32 = status.bits32; 300 status.bits.link = phydev->link; 301 status.bits.duplex = phydev->duplex; 302 303 switch (phydev->speed) { 304 case 1000: 305 status.bits.speed = GMAC_SPEED_1000; 306 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 307 status.bits.mii_rmii = GMAC_PHY_RGMII_1000; 308 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n", 309 phydev_name(phydev)); 310 break; 311 case 100: 312 status.bits.speed = GMAC_SPEED_100; 313 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 314 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 315 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n", 316 phydev_name(phydev)); 317 break; 318 case 10: 319 status.bits.speed = GMAC_SPEED_10; 320 if (phydev->interface == PHY_INTERFACE_MODE_RGMII) 321 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 322 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n", 323 phydev_name(phydev)); 324 break; 325 default: 326 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n", 327 phydev->speed, phydev_name(phydev)); 328 } 329 330 if (phydev->duplex == DUPLEX_FULL) { 331 u16 lcladv = phy_read(phydev, MII_ADVERTISE); 332 u16 rmtadv = phy_read(phydev, MII_LPA); 333 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 334 335 if (cap & FLOW_CTRL_RX) 336 pause_rx = 1; 337 if (cap & FLOW_CTRL_TX) 338 pause_tx = 1; 339 } 340 341 gmac_set_flow_control(netdev, pause_tx, pause_rx); 342 343 if (old_status.bits32 == status.bits32) 344 return; 345 346 if (netif_msg_link(port)) { 347 phy_print_status(phydev); 348 netdev_info(netdev, "link flow control: %s\n", 349 phydev->pause 350 ? (phydev->asym_pause ? "tx" : "both") 351 : (phydev->asym_pause ? "rx" : "none") 352 ); 353 } 354 355 gmac_disable_tx_rx(netdev); 356 writel(status.bits32, port->gmac_base + GMAC_STATUS); 357 gmac_enable_tx_rx(netdev); 358 } 359 360 static int gmac_setup_phy(struct net_device *netdev) 361 { 362 struct gemini_ethernet_port *port = netdev_priv(netdev); 363 union gmac_status status = { .bits32 = 0 }; 364 struct device *dev = port->dev; 365 struct phy_device *phy; 366 367 phy = of_phy_get_and_connect(netdev, 368 dev->of_node, 369 gmac_speed_set); 370 if (!phy) 371 return -ENODEV; 372 netdev->phydev = phy; 373 374 phy_set_max_speed(phy, SPEED_1000); 375 phy_support_asym_pause(phy); 376 377 /* set PHY interface type */ 378 switch (phy->interface) { 379 case PHY_INTERFACE_MODE_MII: 380 netdev_dbg(netdev, 381 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 382 status.bits.mii_rmii = GMAC_PHY_MII; 383 break; 384 case PHY_INTERFACE_MODE_GMII: 385 netdev_dbg(netdev, 386 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n"); 387 status.bits.mii_rmii = GMAC_PHY_GMII; 388 break; 389 case PHY_INTERFACE_MODE_RGMII: 390 netdev_dbg(netdev, 391 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n"); 392 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10; 393 break; 394 default: 395 netdev_err(netdev, "Unsupported MII interface\n"); 396 phy_disconnect(phy); 397 netdev->phydev = NULL; 398 return -EINVAL; 399 } 400 writel(status.bits32, port->gmac_base + GMAC_STATUS); 401 402 if (netif_msg_link(port)) 403 phy_attached_info(phy); 404 405 return 0; 406 } 407 408 /* The maximum frame length is not logically enumerated in the 409 * hardware, so we do a table lookup to find the applicable max 410 * frame length. 411 */ 412 struct gmac_max_framelen { 413 unsigned int max_l3_len; 414 u8 val; 415 }; 416 417 static const struct gmac_max_framelen gmac_maxlens[] = { 418 { 419 .max_l3_len = 1518, 420 .val = CONFIG0_MAXLEN_1518, 421 }, 422 { 423 .max_l3_len = 1522, 424 .val = CONFIG0_MAXLEN_1522, 425 }, 426 { 427 .max_l3_len = 1536, 428 .val = CONFIG0_MAXLEN_1536, 429 }, 430 { 431 .max_l3_len = 1542, 432 .val = CONFIG0_MAXLEN_1542, 433 }, 434 { 435 .max_l3_len = 9212, 436 .val = CONFIG0_MAXLEN_9k, 437 }, 438 { 439 .max_l3_len = 10236, 440 .val = CONFIG0_MAXLEN_10k, 441 }, 442 }; 443 444 static int gmac_pick_rx_max_len(unsigned int max_l3_len) 445 { 446 const struct gmac_max_framelen *maxlen; 447 int maxtot; 448 int i; 449 450 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN; 451 452 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) { 453 maxlen = &gmac_maxlens[i]; 454 if (maxtot <= maxlen->max_l3_len) 455 return maxlen->val; 456 } 457 458 return -1; 459 } 460 461 static int gmac_init(struct net_device *netdev) 462 { 463 struct gemini_ethernet_port *port = netdev_priv(netdev); 464 union gmac_config0 config0 = { .bits = { 465 .dis_tx = 1, 466 .dis_rx = 1, 467 .ipv4_rx_chksum = 1, 468 .ipv6_rx_chksum = 1, 469 .rx_err_detect = 1, 470 .rgmm_edge = 1, 471 .port0_chk_hwq = 1, 472 .port1_chk_hwq = 1, 473 .port0_chk_toeq = 1, 474 .port1_chk_toeq = 1, 475 .port0_chk_classq = 1, 476 .port1_chk_classq = 1, 477 } }; 478 union gmac_ahb_weight ahb_weight = { .bits = { 479 .rx_weight = 1, 480 .tx_weight = 1, 481 .hash_weight = 1, 482 .pre_req = 0x1f, 483 .tq_dv_threshold = 0, 484 } }; 485 union gmac_tx_wcr0 hw_weigh = { .bits = { 486 .hw_tq3 = 1, 487 .hw_tq2 = 1, 488 .hw_tq1 = 1, 489 .hw_tq0 = 1, 490 } }; 491 union gmac_tx_wcr1 sw_weigh = { .bits = { 492 .sw_tq5 = 1, 493 .sw_tq4 = 1, 494 .sw_tq3 = 1, 495 .sw_tq2 = 1, 496 .sw_tq1 = 1, 497 .sw_tq0 = 1, 498 } }; 499 union gmac_config1 config1 = { .bits = { 500 .set_threshold = 16, 501 .rel_threshold = 24, 502 } }; 503 union gmac_config2 config2 = { .bits = { 504 .set_threshold = 16, 505 .rel_threshold = 32, 506 } }; 507 union gmac_config3 config3 = { .bits = { 508 .set_threshold = 0, 509 .rel_threshold = 0, 510 } }; 511 union gmac_config0 tmp; 512 u32 val; 513 514 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu); 515 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 516 config0.bits.reserved = tmp.bits.reserved; 517 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0); 518 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1); 519 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2); 520 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3); 521 522 val = readl(port->dma_base + GMAC_AHB_WEIGHT_REG); 523 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG); 524 525 writel(hw_weigh.bits32, 526 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG); 527 writel(sw_weigh.bits32, 528 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG); 529 530 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER; 531 port->txq_order = DEFAULT_GMAC_TXQ_ORDER; 532 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS; 533 534 /* Mark every quarter of the queue a packet for interrupt 535 * in order to be able to wake up the queue if it was stopped 536 */ 537 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 538 539 return 0; 540 } 541 542 static int gmac_setup_txqs(struct net_device *netdev) 543 { 544 struct gemini_ethernet_port *port = netdev_priv(netdev); 545 unsigned int n_txq = netdev->num_tx_queues; 546 struct gemini_ethernet *geth = port->geth; 547 size_t entries = 1 << port->txq_order; 548 struct gmac_txq *txq = port->txq; 549 struct gmac_txdesc *desc_ring; 550 size_t len = n_txq * entries; 551 struct sk_buff **skb_tab; 552 void __iomem *rwptr_reg; 553 unsigned int r; 554 int i; 555 556 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 557 558 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL); 559 if (!skb_tab) 560 return -ENOMEM; 561 562 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring), 563 &port->txq_dma_base, GFP_KERNEL); 564 565 if (!desc_ring) { 566 kfree(skb_tab); 567 return -ENOMEM; 568 } 569 570 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) { 571 dev_warn(geth->dev, "TX queue base is not aligned\n"); 572 dma_free_coherent(geth->dev, len * sizeof(*desc_ring), 573 desc_ring, port->txq_dma_base); 574 kfree(skb_tab); 575 return -ENOMEM; 576 } 577 578 writel(port->txq_dma_base | port->txq_order, 579 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 580 581 for (i = 0; i < n_txq; i++) { 582 txq->ring = desc_ring; 583 txq->skb = skb_tab; 584 txq->noirq_packets = 0; 585 586 r = readw(rwptr_reg); 587 rwptr_reg += 2; 588 writew(r, rwptr_reg); 589 rwptr_reg += 2; 590 txq->cptr = r; 591 592 txq++; 593 desc_ring += entries; 594 skb_tab += entries; 595 } 596 597 return 0; 598 } 599 600 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq, 601 unsigned int r) 602 { 603 struct gemini_ethernet_port *port = netdev_priv(netdev); 604 unsigned int m = (1 << port->txq_order) - 1; 605 struct gemini_ethernet *geth = port->geth; 606 unsigned int c = txq->cptr; 607 union gmac_txdesc_0 word0; 608 union gmac_txdesc_1 word1; 609 unsigned int hwchksum = 0; 610 unsigned long bytes = 0; 611 struct gmac_txdesc *txd; 612 unsigned short nfrags; 613 unsigned int errs = 0; 614 unsigned int pkts = 0; 615 unsigned int word3; 616 dma_addr_t mapping; 617 618 if (c == r) 619 return; 620 621 while (c != r) { 622 txd = txq->ring + c; 623 word0 = txd->word0; 624 word1 = txd->word1; 625 mapping = txd->word2.buf_adr; 626 word3 = txd->word3.bits32; 627 628 dma_unmap_single(geth->dev, mapping, 629 word0.bits.buffer_size, DMA_TO_DEVICE); 630 631 if (word3 & EOF_BIT) 632 dev_kfree_skb(txq->skb[c]); 633 634 c++; 635 c &= m; 636 637 if (!(word3 & SOF_BIT)) 638 continue; 639 640 if (!word0.bits.status_tx_ok) { 641 errs++; 642 continue; 643 } 644 645 pkts++; 646 bytes += txd->word1.bits.byte_count; 647 648 if (word1.bits32 & TSS_CHECKUM_ENABLE) 649 hwchksum++; 650 651 nfrags = word0.bits.desc_count - 1; 652 if (nfrags) { 653 if (nfrags >= TX_MAX_FRAGS) 654 nfrags = TX_MAX_FRAGS - 1; 655 656 u64_stats_update_begin(&port->tx_stats_syncp); 657 port->tx_frag_stats[nfrags]++; 658 u64_stats_update_end(&port->tx_stats_syncp); 659 } 660 } 661 662 u64_stats_update_begin(&port->ir_stats_syncp); 663 port->stats.tx_errors += errs; 664 port->stats.tx_packets += pkts; 665 port->stats.tx_bytes += bytes; 666 port->tx_hw_csummed += hwchksum; 667 u64_stats_update_end(&port->ir_stats_syncp); 668 669 txq->cptr = c; 670 } 671 672 static void gmac_cleanup_txqs(struct net_device *netdev) 673 { 674 struct gemini_ethernet_port *port = netdev_priv(netdev); 675 unsigned int n_txq = netdev->num_tx_queues; 676 struct gemini_ethernet *geth = port->geth; 677 void __iomem *rwptr_reg; 678 unsigned int r, i; 679 680 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 681 682 for (i = 0; i < n_txq; i++) { 683 r = readw(rwptr_reg); 684 rwptr_reg += 2; 685 writew(r, rwptr_reg); 686 rwptr_reg += 2; 687 688 gmac_clean_txq(netdev, port->txq + i, r); 689 } 690 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG); 691 692 kfree(port->txq->skb); 693 dma_free_coherent(geth->dev, 694 n_txq * sizeof(*port->txq->ring) << port->txq_order, 695 port->txq->ring, port->txq_dma_base); 696 } 697 698 static int gmac_setup_rxq(struct net_device *netdev) 699 { 700 struct gemini_ethernet_port *port = netdev_priv(netdev); 701 struct gemini_ethernet *geth = port->geth; 702 struct nontoe_qhdr __iomem *qhdr; 703 704 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 705 port->rxq_rwptr = &qhdr->word1; 706 707 /* Remap a slew of memory to use for the RX queue */ 708 port->rxq_ring = dma_alloc_coherent(geth->dev, 709 sizeof(*port->rxq_ring) << port->rxq_order, 710 &port->rxq_dma_base, GFP_KERNEL); 711 if (!port->rxq_ring) 712 return -ENOMEM; 713 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) { 714 dev_warn(geth->dev, "RX queue base is not aligned\n"); 715 return -ENOMEM; 716 } 717 718 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0); 719 writel(0, port->rxq_rwptr); 720 return 0; 721 } 722 723 static struct gmac_queue_page * 724 gmac_get_queue_page(struct gemini_ethernet *geth, 725 struct gemini_ethernet_port *port, 726 dma_addr_t addr) 727 { 728 struct gmac_queue_page *gpage; 729 dma_addr_t mapping; 730 int i; 731 732 /* Only look for even pages */ 733 mapping = addr & PAGE_MASK; 734 735 if (!geth->freeq_pages) { 736 dev_err(geth->dev, "try to get page with no page list\n"); 737 return NULL; 738 } 739 740 /* Look up a ring buffer page from virtual mapping */ 741 for (i = 0; i < geth->num_freeq_pages; i++) { 742 gpage = &geth->freeq_pages[i]; 743 if (gpage->mapping == mapping) 744 return gpage; 745 } 746 747 return NULL; 748 } 749 750 static void gmac_cleanup_rxq(struct net_device *netdev) 751 { 752 struct gemini_ethernet_port *port = netdev_priv(netdev); 753 struct gemini_ethernet *geth = port->geth; 754 struct gmac_rxdesc *rxd = port->rxq_ring; 755 static struct gmac_queue_page *gpage; 756 struct nontoe_qhdr __iomem *qhdr; 757 void __iomem *dma_reg; 758 void __iomem *ptr_reg; 759 dma_addr_t mapping; 760 union dma_rwptr rw; 761 unsigned int r, w; 762 763 qhdr = geth->base + 764 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id); 765 dma_reg = &qhdr->word0; 766 ptr_reg = &qhdr->word1; 767 768 rw.bits32 = readl(ptr_reg); 769 r = rw.bits.rptr; 770 w = rw.bits.wptr; 771 writew(r, ptr_reg + 2); 772 773 writel(0, dma_reg); 774 775 /* Loop from read pointer to write pointer of the RX queue 776 * and free up all pages by the queue. 777 */ 778 while (r != w) { 779 mapping = rxd[r].word2.buf_adr; 780 r++; 781 r &= ((1 << port->rxq_order) - 1); 782 783 if (!mapping) 784 continue; 785 786 /* Freeq pointers are one page off */ 787 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 788 if (!gpage) { 789 dev_err(geth->dev, "could not find page\n"); 790 continue; 791 } 792 /* Release the RX queue reference to the page */ 793 put_page(gpage->page); 794 } 795 796 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order, 797 port->rxq_ring, port->rxq_dma_base); 798 } 799 800 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth, 801 int pn) 802 { 803 struct gmac_rxdesc *freeq_entry; 804 struct gmac_queue_page *gpage; 805 unsigned int fpp_order; 806 unsigned int frag_len; 807 dma_addr_t mapping; 808 struct page *page; 809 int i; 810 811 /* First allocate and DMA map a single page */ 812 page = alloc_page(GFP_ATOMIC); 813 if (!page) 814 return NULL; 815 816 mapping = dma_map_single(geth->dev, page_address(page), 817 PAGE_SIZE, DMA_FROM_DEVICE); 818 if (dma_mapping_error(geth->dev, mapping)) { 819 put_page(page); 820 return NULL; 821 } 822 823 /* The assign the page mapping (physical address) to the buffer address 824 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes, 825 * 4k), and the default RX frag order is 11 (fragments are up 20 2048 826 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus 827 * each page normally needs two entries in the queue. 828 */ 829 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */ 830 fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 831 freeq_entry = geth->freeq_ring + (pn << fpp_order); 832 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n", 833 pn, frag_len, (1 << fpp_order), freeq_entry); 834 for (i = (1 << fpp_order); i > 0; i--) { 835 freeq_entry->word2.buf_adr = mapping; 836 freeq_entry++; 837 mapping += frag_len; 838 } 839 840 /* If the freeq entry already has a page mapped, then unmap it. */ 841 gpage = &geth->freeq_pages[pn]; 842 if (gpage->page) { 843 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 844 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 845 /* This should be the last reference to the page so it gets 846 * released 847 */ 848 put_page(gpage->page); 849 } 850 851 /* Then put our new mapping into the page table */ 852 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n", 853 pn, (unsigned int)mapping, page); 854 gpage->mapping = mapping; 855 gpage->page = page; 856 857 return page; 858 } 859 860 /** 861 * geth_fill_freeq() - Fill the freeq with empty fragments to use 862 * @geth: the ethernet adapter 863 * @refill: whether to reset the queue by filling in all freeq entries or 864 * just refill it, usually the interrupt to refill the queue happens when 865 * the queue is half empty. 866 */ 867 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill) 868 { 869 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 870 unsigned int count = 0; 871 unsigned int pn, epn; 872 unsigned long flags; 873 union dma_rwptr rw; 874 unsigned int m_pn; 875 876 /* Mask for page */ 877 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1; 878 879 spin_lock_irqsave(&geth->freeq_lock, flags); 880 881 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG); 882 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order; 883 epn = (rw.bits.rptr >> fpp_order) - 1; 884 epn &= m_pn; 885 886 /* Loop over the freeq ring buffer entries */ 887 while (pn != epn) { 888 struct gmac_queue_page *gpage; 889 struct page *page; 890 891 gpage = &geth->freeq_pages[pn]; 892 page = gpage->page; 893 894 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n", 895 pn, page_ref_count(page), 1 << fpp_order); 896 897 if (page_ref_count(page) > 1) { 898 unsigned int fl = (pn - epn) & m_pn; 899 900 if (fl > 64 >> fpp_order) 901 break; 902 903 page = geth_freeq_alloc_map_page(geth, pn); 904 if (!page) 905 break; 906 } 907 908 /* Add one reference per fragment in the page */ 909 page_ref_add(page, 1 << fpp_order); 910 count += 1 << fpp_order; 911 pn++; 912 pn &= m_pn; 913 } 914 915 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 916 917 spin_unlock_irqrestore(&geth->freeq_lock, flags); 918 919 return count; 920 } 921 922 static int geth_setup_freeq(struct gemini_ethernet *geth) 923 { 924 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 925 unsigned int frag_len = 1 << geth->freeq_frag_order; 926 unsigned int len = 1 << geth->freeq_order; 927 unsigned int pages = len >> fpp_order; 928 union queue_threshold qt; 929 union dma_skb_size skbsz; 930 unsigned int filled; 931 unsigned int pn; 932 933 geth->freeq_ring = dma_alloc_coherent(geth->dev, 934 sizeof(*geth->freeq_ring) << geth->freeq_order, 935 &geth->freeq_dma_base, GFP_KERNEL); 936 if (!geth->freeq_ring) 937 return -ENOMEM; 938 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) { 939 dev_warn(geth->dev, "queue ring base is not aligned\n"); 940 goto err_freeq; 941 } 942 943 /* Allocate a mapping to page look-up index */ 944 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages), 945 GFP_KERNEL); 946 if (!geth->freeq_pages) 947 goto err_freeq; 948 geth->num_freeq_pages = pages; 949 950 dev_info(geth->dev, "allocate %d pages for queue\n", pages); 951 for (pn = 0; pn < pages; pn++) 952 if (!geth_freeq_alloc_map_page(geth, pn)) 953 goto err_freeq_alloc; 954 955 filled = geth_fill_freeq(geth, false); 956 if (!filled) 957 goto err_freeq_alloc; 958 959 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 960 qt.bits.swfq_empty = 32; 961 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG); 962 963 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order; 964 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG); 965 writel(geth->freeq_dma_base | geth->freeq_order, 966 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 967 968 return 0; 969 970 err_freeq_alloc: 971 while (pn > 0) { 972 struct gmac_queue_page *gpage; 973 dma_addr_t mapping; 974 975 --pn; 976 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 977 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 978 gpage = &geth->freeq_pages[pn]; 979 put_page(gpage->page); 980 } 981 982 kfree(geth->freeq_pages); 983 err_freeq: 984 dma_free_coherent(geth->dev, 985 sizeof(*geth->freeq_ring) << geth->freeq_order, 986 geth->freeq_ring, geth->freeq_dma_base); 987 geth->freeq_ring = NULL; 988 return -ENOMEM; 989 } 990 991 /** 992 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue 993 * @geth: the Gemini global ethernet state 994 */ 995 static void geth_cleanup_freeq(struct gemini_ethernet *geth) 996 { 997 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order; 998 unsigned int frag_len = 1 << geth->freeq_frag_order; 999 unsigned int len = 1 << geth->freeq_order; 1000 unsigned int pages = len >> fpp_order; 1001 unsigned int pn; 1002 1003 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG), 1004 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2); 1005 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 1006 1007 for (pn = 0; pn < pages; pn++) { 1008 struct gmac_queue_page *gpage; 1009 dma_addr_t mapping; 1010 1011 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr; 1012 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE); 1013 1014 gpage = &geth->freeq_pages[pn]; 1015 while (page_ref_count(gpage->page) > 0) 1016 put_page(gpage->page); 1017 } 1018 1019 kfree(geth->freeq_pages); 1020 1021 dma_free_coherent(geth->dev, 1022 sizeof(*geth->freeq_ring) << geth->freeq_order, 1023 geth->freeq_ring, geth->freeq_dma_base); 1024 } 1025 1026 /** 1027 * geth_resize_freeq() - resize the software queue depth 1028 * @port: the port requesting the change 1029 * 1030 * This gets called at least once during probe() so the device queue gets 1031 * "resized" from the hardware defaults. Since both ports/net devices share 1032 * the same hardware queue, some synchronization between the ports is 1033 * needed. 1034 */ 1035 static int geth_resize_freeq(struct gemini_ethernet_port *port) 1036 { 1037 struct gemini_ethernet *geth = port->geth; 1038 struct net_device *netdev = port->netdev; 1039 struct gemini_ethernet_port *other_port; 1040 struct net_device *other_netdev; 1041 unsigned int new_size = 0; 1042 unsigned int new_order; 1043 unsigned long flags; 1044 u32 en; 1045 int ret; 1046 1047 if (netdev->dev_id == 0) 1048 other_netdev = geth->port1->netdev; 1049 else 1050 other_netdev = geth->port0->netdev; 1051 1052 if (other_netdev && netif_running(other_netdev)) 1053 return -EBUSY; 1054 1055 new_size = 1 << (port->rxq_order + 1); 1056 netdev_dbg(netdev, "port %d size: %d order %d\n", 1057 netdev->dev_id, 1058 new_size, 1059 port->rxq_order); 1060 if (other_netdev) { 1061 other_port = netdev_priv(other_netdev); 1062 new_size += 1 << (other_port->rxq_order + 1); 1063 netdev_dbg(other_netdev, "port %d size: %d order %d\n", 1064 other_netdev->dev_id, 1065 (1 << (other_port->rxq_order + 1)), 1066 other_port->rxq_order); 1067 } 1068 1069 new_order = min(15, ilog2(new_size - 1) + 1); 1070 dev_dbg(geth->dev, "set shared queue to size %d order %d\n", 1071 new_size, new_order); 1072 if (geth->freeq_order == new_order) 1073 return 0; 1074 1075 spin_lock_irqsave(&geth->irq_lock, flags); 1076 1077 /* Disable the software queue IRQs */ 1078 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1079 en &= ~SWFQ_EMPTY_INT_BIT; 1080 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1081 spin_unlock_irqrestore(&geth->irq_lock, flags); 1082 1083 /* Drop the old queue */ 1084 if (geth->freeq_ring) 1085 geth_cleanup_freeq(geth); 1086 1087 /* Allocate a new queue with the desired order */ 1088 geth->freeq_order = new_order; 1089 ret = geth_setup_freeq(geth); 1090 1091 /* Restart the interrupts - NOTE if this is the first resize 1092 * after probe(), this is where the interrupts get turned on 1093 * in the first place. 1094 */ 1095 spin_lock_irqsave(&geth->irq_lock, flags); 1096 en |= SWFQ_EMPTY_INT_BIT; 1097 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1098 spin_unlock_irqrestore(&geth->irq_lock, flags); 1099 1100 return ret; 1101 } 1102 1103 static void gmac_tx_irq_enable(struct net_device *netdev, 1104 unsigned int txq, int en) 1105 { 1106 struct gemini_ethernet_port *port = netdev_priv(netdev); 1107 struct gemini_ethernet *geth = port->geth; 1108 u32 val, mask; 1109 1110 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id); 1111 1112 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq); 1113 1114 if (en) 1115 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1116 1117 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1118 val = en ? val | mask : val & ~mask; 1119 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1120 } 1121 1122 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num) 1123 { 1124 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num); 1125 1126 gmac_tx_irq_enable(netdev, txq_num, 0); 1127 netif_tx_wake_queue(ntxq); 1128 } 1129 1130 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb, 1131 struct gmac_txq *txq, unsigned short *desc) 1132 { 1133 struct gemini_ethernet_port *port = netdev_priv(netdev); 1134 struct skb_shared_info *skb_si = skb_shinfo(skb); 1135 unsigned short m = (1 << port->txq_order) - 1; 1136 short frag, last_frag = skb_si->nr_frags - 1; 1137 struct gemini_ethernet *geth = port->geth; 1138 unsigned int word1, word3, buflen; 1139 unsigned short w = *desc; 1140 struct gmac_txdesc *txd; 1141 skb_frag_t *skb_frag; 1142 dma_addr_t mapping; 1143 unsigned short mtu; 1144 void *buffer; 1145 1146 mtu = ETH_HLEN; 1147 mtu += netdev->mtu; 1148 if (skb->protocol == htons(ETH_P_8021Q)) 1149 mtu += VLAN_HLEN; 1150 1151 word1 = skb->len; 1152 word3 = SOF_BIT; 1153 1154 if (word1 > mtu) { 1155 word1 |= TSS_MTU_ENABLE_BIT; 1156 word3 |= mtu; 1157 } 1158 1159 if (skb->ip_summed != CHECKSUM_NONE) { 1160 int tcp = 0; 1161 1162 if (skb->protocol == htons(ETH_P_IP)) { 1163 word1 |= TSS_IP_CHKSUM_BIT; 1164 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP; 1165 } else { /* IPv6 */ 1166 word1 |= TSS_IPV6_ENABLE_BIT; 1167 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP; 1168 } 1169 1170 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT; 1171 } 1172 1173 frag = -1; 1174 while (frag <= last_frag) { 1175 if (frag == -1) { 1176 buffer = skb->data; 1177 buflen = skb_headlen(skb); 1178 } else { 1179 skb_frag = skb_si->frags + frag; 1180 buffer = skb_frag_address(skb_frag); 1181 buflen = skb_frag_size(skb_frag); 1182 } 1183 1184 if (frag == last_frag) { 1185 word3 |= EOF_BIT; 1186 txq->skb[w] = skb; 1187 } 1188 1189 mapping = dma_map_single(geth->dev, buffer, buflen, 1190 DMA_TO_DEVICE); 1191 if (dma_mapping_error(geth->dev, mapping)) 1192 goto map_error; 1193 1194 txd = txq->ring + w; 1195 txd->word0.bits32 = buflen; 1196 txd->word1.bits32 = word1; 1197 txd->word2.buf_adr = mapping; 1198 txd->word3.bits32 = word3; 1199 1200 word3 &= MTU_SIZE_BIT_MASK; 1201 w++; 1202 w &= m; 1203 frag++; 1204 } 1205 1206 *desc = w; 1207 return 0; 1208 1209 map_error: 1210 while (w != *desc) { 1211 w--; 1212 w &= m; 1213 1214 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr, 1215 txq->ring[w].word0.bits.buffer_size, 1216 DMA_TO_DEVICE); 1217 } 1218 return -ENOMEM; 1219 } 1220 1221 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb, 1222 struct net_device *netdev) 1223 { 1224 struct gemini_ethernet_port *port = netdev_priv(netdev); 1225 unsigned short m = (1 << port->txq_order) - 1; 1226 struct netdev_queue *ntxq; 1227 unsigned short r, w, d; 1228 void __iomem *ptr_reg; 1229 struct gmac_txq *txq; 1230 int txq_num, nfrags; 1231 union dma_rwptr rw; 1232 1233 if (skb->len >= 0x10000) 1234 goto out_drop_free; 1235 1236 txq_num = skb_get_queue_mapping(skb); 1237 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num); 1238 txq = &port->txq[txq_num]; 1239 ntxq = netdev_get_tx_queue(netdev, txq_num); 1240 nfrags = skb_shinfo(skb)->nr_frags; 1241 1242 rw.bits32 = readl(ptr_reg); 1243 r = rw.bits.rptr; 1244 w = rw.bits.wptr; 1245 1246 d = txq->cptr - w - 1; 1247 d &= m; 1248 1249 if (d < nfrags + 2) { 1250 gmac_clean_txq(netdev, txq, r); 1251 d = txq->cptr - w - 1; 1252 d &= m; 1253 1254 if (d < nfrags + 2) { 1255 netif_tx_stop_queue(ntxq); 1256 1257 d = txq->cptr + nfrags + 16; 1258 d &= m; 1259 txq->ring[d].word3.bits.eofie = 1; 1260 gmac_tx_irq_enable(netdev, txq_num, 1); 1261 1262 u64_stats_update_begin(&port->tx_stats_syncp); 1263 netdev->stats.tx_fifo_errors++; 1264 u64_stats_update_end(&port->tx_stats_syncp); 1265 return NETDEV_TX_BUSY; 1266 } 1267 } 1268 1269 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) { 1270 if (skb_linearize(skb)) 1271 goto out_drop; 1272 1273 u64_stats_update_begin(&port->tx_stats_syncp); 1274 port->tx_frags_linearized++; 1275 u64_stats_update_end(&port->tx_stats_syncp); 1276 1277 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) 1278 goto out_drop_free; 1279 } 1280 1281 writew(w, ptr_reg + 2); 1282 1283 gmac_clean_txq(netdev, txq, r); 1284 return NETDEV_TX_OK; 1285 1286 out_drop_free: 1287 dev_kfree_skb(skb); 1288 out_drop: 1289 u64_stats_update_begin(&port->tx_stats_syncp); 1290 port->stats.tx_dropped++; 1291 u64_stats_update_end(&port->tx_stats_syncp); 1292 return NETDEV_TX_OK; 1293 } 1294 1295 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue) 1296 { 1297 netdev_err(netdev, "Tx timeout\n"); 1298 gmac_dump_dma_state(netdev); 1299 } 1300 1301 static void gmac_enable_irq(struct net_device *netdev, int enable) 1302 { 1303 struct gemini_ethernet_port *port = netdev_priv(netdev); 1304 struct gemini_ethernet *geth = port->geth; 1305 unsigned long flags; 1306 u32 val, mask; 1307 1308 netdev_dbg(netdev, "%s device %d %s\n", __func__, 1309 netdev->dev_id, enable ? "enable" : "disable"); 1310 spin_lock_irqsave(&geth->irq_lock, flags); 1311 1312 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2); 1313 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1314 val = enable ? (val | mask) : (val & ~mask); 1315 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1316 1317 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1318 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1319 val = enable ? (val | mask) : (val & ~mask); 1320 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1321 1322 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8); 1323 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1324 val = enable ? (val | mask) : (val & ~mask); 1325 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1326 1327 spin_unlock_irqrestore(&geth->irq_lock, flags); 1328 } 1329 1330 static void gmac_enable_rx_irq(struct net_device *netdev, int enable) 1331 { 1332 struct gemini_ethernet_port *port = netdev_priv(netdev); 1333 struct gemini_ethernet *geth = port->geth; 1334 unsigned long flags; 1335 u32 val, mask; 1336 1337 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id, 1338 enable ? "enable" : "disable"); 1339 spin_lock_irqsave(&geth->irq_lock, flags); 1340 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id; 1341 1342 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1343 val = enable ? (val | mask) : (val & ~mask); 1344 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1345 1346 spin_unlock_irqrestore(&geth->irq_lock, flags); 1347 } 1348 1349 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port, 1350 union gmac_rxdesc_0 word0, 1351 unsigned int frame_len) 1352 { 1353 unsigned int rx_csum = word0.bits.chksum_status; 1354 unsigned int rx_status = word0.bits.status; 1355 struct sk_buff *skb = NULL; 1356 1357 port->rx_stats[rx_status]++; 1358 port->rx_csum_stats[rx_csum]++; 1359 1360 if (word0.bits.derr || word0.bits.perr || 1361 rx_status || frame_len < ETH_ZLEN || 1362 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) { 1363 port->stats.rx_errors++; 1364 1365 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status)) 1366 port->stats.rx_length_errors++; 1367 if (RX_ERROR_OVER(rx_status)) 1368 port->stats.rx_over_errors++; 1369 if (RX_ERROR_CRC(rx_status)) 1370 port->stats.rx_crc_errors++; 1371 if (RX_ERROR_FRAME(rx_status)) 1372 port->stats.rx_frame_errors++; 1373 return NULL; 1374 } 1375 1376 skb = napi_get_frags(&port->napi); 1377 if (!skb) 1378 goto update_exit; 1379 1380 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK) 1381 skb->ip_summed = CHECKSUM_UNNECESSARY; 1382 1383 update_exit: 1384 port->stats.rx_bytes += frame_len; 1385 port->stats.rx_packets++; 1386 return skb; 1387 } 1388 1389 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget) 1390 { 1391 struct gemini_ethernet_port *port = netdev_priv(netdev); 1392 unsigned short m = (1 << port->rxq_order) - 1; 1393 struct gemini_ethernet *geth = port->geth; 1394 void __iomem *ptr_reg = port->rxq_rwptr; 1395 unsigned int frame_len, frag_len; 1396 struct gmac_rxdesc *rx = NULL; 1397 struct gmac_queue_page *gpage; 1398 static struct sk_buff *skb; 1399 union gmac_rxdesc_0 word0; 1400 union gmac_rxdesc_1 word1; 1401 union gmac_rxdesc_3 word3; 1402 struct page *page = NULL; 1403 unsigned int page_offs; 1404 unsigned short r, w; 1405 union dma_rwptr rw; 1406 dma_addr_t mapping; 1407 int frag_nr = 0; 1408 1409 rw.bits32 = readl(ptr_reg); 1410 /* Reset interrupt as all packages until here are taken into account */ 1411 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id, 1412 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1413 r = rw.bits.rptr; 1414 w = rw.bits.wptr; 1415 1416 while (budget && w != r) { 1417 rx = port->rxq_ring + r; 1418 word0 = rx->word0; 1419 word1 = rx->word1; 1420 mapping = rx->word2.buf_adr; 1421 word3 = rx->word3; 1422 1423 r++; 1424 r &= m; 1425 1426 frag_len = word0.bits.buffer_size; 1427 frame_len = word1.bits.byte_count; 1428 page_offs = mapping & ~PAGE_MASK; 1429 1430 if (!mapping) { 1431 netdev_err(netdev, 1432 "rxq[%u]: HW BUG: zero DMA desc\n", r); 1433 goto err_drop; 1434 } 1435 1436 /* Freeq pointers are one page off */ 1437 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE); 1438 if (!gpage) { 1439 dev_err(geth->dev, "could not find mapping\n"); 1440 continue; 1441 } 1442 page = gpage->page; 1443 1444 if (word3.bits32 & SOF_BIT) { 1445 if (skb) { 1446 napi_free_frags(&port->napi); 1447 port->stats.rx_dropped++; 1448 } 1449 1450 skb = gmac_skb_if_good_frame(port, word0, frame_len); 1451 if (!skb) 1452 goto err_drop; 1453 1454 page_offs += NET_IP_ALIGN; 1455 frag_len -= NET_IP_ALIGN; 1456 frag_nr = 0; 1457 1458 } else if (!skb) { 1459 put_page(page); 1460 continue; 1461 } 1462 1463 if (word3.bits32 & EOF_BIT) 1464 frag_len = frame_len - skb->len; 1465 1466 /* append page frag to skb */ 1467 if (frag_nr == MAX_SKB_FRAGS) 1468 goto err_drop; 1469 1470 if (frag_len == 0) 1471 netdev_err(netdev, "Received fragment with len = 0\n"); 1472 1473 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len); 1474 skb->len += frag_len; 1475 skb->data_len += frag_len; 1476 skb->truesize += frag_len; 1477 frag_nr++; 1478 1479 if (word3.bits32 & EOF_BIT) { 1480 napi_gro_frags(&port->napi); 1481 skb = NULL; 1482 --budget; 1483 } 1484 continue; 1485 1486 err_drop: 1487 if (skb) { 1488 napi_free_frags(&port->napi); 1489 skb = NULL; 1490 } 1491 1492 if (mapping) 1493 put_page(page); 1494 1495 port->stats.rx_dropped++; 1496 } 1497 1498 writew(r, ptr_reg); 1499 return budget; 1500 } 1501 1502 static int gmac_napi_poll(struct napi_struct *napi, int budget) 1503 { 1504 struct gemini_ethernet_port *port = netdev_priv(napi->dev); 1505 struct gemini_ethernet *geth = port->geth; 1506 unsigned int freeq_threshold; 1507 unsigned int received; 1508 1509 freeq_threshold = 1 << (geth->freeq_order - 1); 1510 u64_stats_update_begin(&port->rx_stats_syncp); 1511 1512 received = gmac_rx(napi->dev, budget); 1513 if (received < budget) { 1514 napi_gro_flush(napi, false); 1515 napi_complete_done(napi, received); 1516 gmac_enable_rx_irq(napi->dev, 1); 1517 ++port->rx_napi_exits; 1518 } 1519 1520 port->freeq_refill += (budget - received); 1521 if (port->freeq_refill > freeq_threshold) { 1522 port->freeq_refill -= freeq_threshold; 1523 geth_fill_freeq(geth, true); 1524 } 1525 1526 u64_stats_update_end(&port->rx_stats_syncp); 1527 return received; 1528 } 1529 1530 static void gmac_dump_dma_state(struct net_device *netdev) 1531 { 1532 struct gemini_ethernet_port *port = netdev_priv(netdev); 1533 struct gemini_ethernet *geth = port->geth; 1534 void __iomem *ptr_reg; 1535 u32 reg[5]; 1536 1537 /* Interrupt status */ 1538 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 1539 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 1540 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 1541 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 1542 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1543 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1544 reg[0], reg[1], reg[2], reg[3], reg[4]); 1545 1546 /* Interrupt enable */ 1547 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 1548 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 1549 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 1550 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 1551 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 1552 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 1553 reg[0], reg[1], reg[2], reg[3], reg[4]); 1554 1555 /* RX DMA status */ 1556 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG); 1557 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG); 1558 reg[2] = GET_RPTR(port->rxq_rwptr); 1559 reg[3] = GET_WPTR(port->rxq_rwptr); 1560 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1561 reg[0], reg[1], reg[2], reg[3]); 1562 1563 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG); 1564 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG); 1565 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG); 1566 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG); 1567 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1568 reg[0], reg[1], reg[2], reg[3]); 1569 1570 /* TX DMA status */ 1571 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG; 1572 1573 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG); 1574 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG); 1575 reg[2] = GET_RPTR(ptr_reg); 1576 reg[3] = GET_WPTR(ptr_reg); 1577 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n", 1578 reg[0], reg[1], reg[2], reg[3]); 1579 1580 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG); 1581 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG); 1582 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG); 1583 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG); 1584 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n", 1585 reg[0], reg[1], reg[2], reg[3]); 1586 1587 /* FREE queues status */ 1588 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG; 1589 1590 reg[0] = GET_RPTR(ptr_reg); 1591 reg[1] = GET_WPTR(ptr_reg); 1592 1593 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG; 1594 1595 reg[2] = GET_RPTR(ptr_reg); 1596 reg[3] = GET_WPTR(ptr_reg); 1597 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n", 1598 reg[0], reg[1], reg[2], reg[3]); 1599 } 1600 1601 static void gmac_update_hw_stats(struct net_device *netdev) 1602 { 1603 struct gemini_ethernet_port *port = netdev_priv(netdev); 1604 unsigned int rx_discards, rx_mcast, rx_bcast; 1605 struct gemini_ethernet *geth = port->geth; 1606 unsigned long flags; 1607 1608 spin_lock_irqsave(&geth->irq_lock, flags); 1609 u64_stats_update_begin(&port->ir_stats_syncp); 1610 1611 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS); 1612 port->hw_stats[0] += rx_discards; 1613 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS); 1614 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST); 1615 port->hw_stats[2] += rx_mcast; 1616 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST); 1617 port->hw_stats[3] += rx_bcast; 1618 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1); 1619 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2); 1620 1621 port->stats.rx_missed_errors += rx_discards; 1622 port->stats.multicast += rx_mcast; 1623 port->stats.multicast += rx_bcast; 1624 1625 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8), 1626 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1627 1628 u64_stats_update_end(&port->ir_stats_syncp); 1629 spin_unlock_irqrestore(&geth->irq_lock, flags); 1630 } 1631 1632 /** 1633 * gmac_get_intr_flags() - get interrupt status flags for a port from 1634 * @netdev: the net device for the port to get flags from 1635 * @i: the interrupt status register 0..4 1636 */ 1637 static u32 gmac_get_intr_flags(struct net_device *netdev, int i) 1638 { 1639 struct gemini_ethernet_port *port = netdev_priv(netdev); 1640 struct gemini_ethernet *geth = port->geth; 1641 void __iomem *irqif_reg, *irqen_reg; 1642 unsigned int offs, val; 1643 1644 /* Calculate the offset using the stride of the status registers */ 1645 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG - 1646 GLOBAL_INTERRUPT_STATUS_0_REG); 1647 1648 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs; 1649 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs; 1650 1651 val = readl(irqif_reg) & readl(irqen_reg); 1652 return val; 1653 } 1654 1655 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer) 1656 { 1657 struct gemini_ethernet_port *port = 1658 container_of(timer, struct gemini_ethernet_port, 1659 rx_coalesce_timer); 1660 1661 napi_schedule(&port->napi); 1662 return HRTIMER_NORESTART; 1663 } 1664 1665 static irqreturn_t gmac_irq(int irq, void *data) 1666 { 1667 struct gemini_ethernet_port *port; 1668 struct net_device *netdev = data; 1669 struct gemini_ethernet *geth; 1670 u32 val, orr = 0; 1671 1672 port = netdev_priv(netdev); 1673 geth = port->geth; 1674 1675 val = gmac_get_intr_flags(netdev, 0); 1676 orr |= val; 1677 1678 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) { 1679 /* Oh, crap */ 1680 netdev_err(netdev, "hw failure/sw bug\n"); 1681 gmac_dump_dma_state(netdev); 1682 1683 /* don't know how to recover, just reduce losses */ 1684 gmac_enable_irq(netdev, 0); 1685 return IRQ_HANDLED; 1686 } 1687 1688 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6))) 1689 gmac_tx_irq(netdev, 0); 1690 1691 val = gmac_get_intr_flags(netdev, 1); 1692 orr |= val; 1693 1694 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) { 1695 gmac_enable_rx_irq(netdev, 0); 1696 1697 if (!port->rx_coalesce_nsecs) { 1698 napi_schedule(&port->napi); 1699 } else { 1700 ktime_t ktime; 1701 1702 ktime = ktime_set(0, port->rx_coalesce_nsecs); 1703 hrtimer_start(&port->rx_coalesce_timer, ktime, 1704 HRTIMER_MODE_REL); 1705 } 1706 } 1707 1708 val = gmac_get_intr_flags(netdev, 4); 1709 orr |= val; 1710 1711 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8))) 1712 gmac_update_hw_stats(netdev); 1713 1714 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) { 1715 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8), 1716 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 1717 1718 spin_lock(&geth->irq_lock); 1719 u64_stats_update_begin(&port->ir_stats_syncp); 1720 ++port->stats.rx_fifo_errors; 1721 u64_stats_update_end(&port->ir_stats_syncp); 1722 spin_unlock(&geth->irq_lock); 1723 } 1724 1725 return orr ? IRQ_HANDLED : IRQ_NONE; 1726 } 1727 1728 static void gmac_start_dma(struct gemini_ethernet_port *port) 1729 { 1730 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1731 union gmac_dma_ctrl dma_ctrl; 1732 1733 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1734 dma_ctrl.bits.rd_enable = 1; 1735 dma_ctrl.bits.td_enable = 1; 1736 dma_ctrl.bits.loopback = 0; 1737 dma_ctrl.bits.drop_small_ack = 0; 1738 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN; 1739 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED; 1740 dma_ctrl.bits.rd_burst_size = HBURST_INCR8; 1741 dma_ctrl.bits.rd_bus = HSIZE_8; 1742 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE; 1743 dma_ctrl.bits.td_burst_size = HBURST_INCR8; 1744 dma_ctrl.bits.td_bus = HSIZE_8; 1745 1746 writel(dma_ctrl.bits32, dma_ctrl_reg); 1747 } 1748 1749 static void gmac_stop_dma(struct gemini_ethernet_port *port) 1750 { 1751 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG; 1752 union gmac_dma_ctrl dma_ctrl; 1753 1754 dma_ctrl.bits32 = readl(dma_ctrl_reg); 1755 dma_ctrl.bits.rd_enable = 0; 1756 dma_ctrl.bits.td_enable = 0; 1757 writel(dma_ctrl.bits32, dma_ctrl_reg); 1758 } 1759 1760 static int gmac_open(struct net_device *netdev) 1761 { 1762 struct gemini_ethernet_port *port = netdev_priv(netdev); 1763 int err; 1764 1765 err = request_irq(netdev->irq, gmac_irq, 1766 IRQF_SHARED, netdev->name, netdev); 1767 if (err) { 1768 netdev_err(netdev, "no IRQ\n"); 1769 return err; 1770 } 1771 1772 netif_carrier_off(netdev); 1773 phy_start(netdev->phydev); 1774 1775 err = geth_resize_freeq(port); 1776 /* It's fine if it's just busy, the other port has set up 1777 * the freeq in that case. 1778 */ 1779 if (err && (err != -EBUSY)) { 1780 netdev_err(netdev, "could not resize freeq\n"); 1781 goto err_stop_phy; 1782 } 1783 1784 err = gmac_setup_rxq(netdev); 1785 if (err) { 1786 netdev_err(netdev, "could not setup RXQ\n"); 1787 goto err_stop_phy; 1788 } 1789 1790 err = gmac_setup_txqs(netdev); 1791 if (err) { 1792 netdev_err(netdev, "could not setup TXQs\n"); 1793 gmac_cleanup_rxq(netdev); 1794 goto err_stop_phy; 1795 } 1796 1797 napi_enable(&port->napi); 1798 1799 gmac_start_dma(port); 1800 gmac_enable_irq(netdev, 1); 1801 gmac_enable_tx_rx(netdev); 1802 netif_tx_start_all_queues(netdev); 1803 1804 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC, 1805 HRTIMER_MODE_REL); 1806 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired; 1807 1808 netdev_dbg(netdev, "opened\n"); 1809 1810 return 0; 1811 1812 err_stop_phy: 1813 phy_stop(netdev->phydev); 1814 free_irq(netdev->irq, netdev); 1815 return err; 1816 } 1817 1818 static int gmac_stop(struct net_device *netdev) 1819 { 1820 struct gemini_ethernet_port *port = netdev_priv(netdev); 1821 1822 hrtimer_cancel(&port->rx_coalesce_timer); 1823 netif_tx_stop_all_queues(netdev); 1824 gmac_disable_tx_rx(netdev); 1825 gmac_stop_dma(port); 1826 napi_disable(&port->napi); 1827 1828 gmac_enable_irq(netdev, 0); 1829 gmac_cleanup_rxq(netdev); 1830 gmac_cleanup_txqs(netdev); 1831 1832 phy_stop(netdev->phydev); 1833 free_irq(netdev->irq, netdev); 1834 1835 gmac_update_hw_stats(netdev); 1836 return 0; 1837 } 1838 1839 static void gmac_set_rx_mode(struct net_device *netdev) 1840 { 1841 struct gemini_ethernet_port *port = netdev_priv(netdev); 1842 union gmac_rx_fltr filter = { .bits = { 1843 .broadcast = 1, 1844 .multicast = 1, 1845 .unicast = 1, 1846 } }; 1847 struct netdev_hw_addr *ha; 1848 unsigned int bit_nr; 1849 u32 mc_filter[2]; 1850 1851 mc_filter[1] = 0; 1852 mc_filter[0] = 0; 1853 1854 if (netdev->flags & IFF_PROMISC) { 1855 filter.bits.error = 1; 1856 filter.bits.promiscuous = 1; 1857 mc_filter[1] = ~0; 1858 mc_filter[0] = ~0; 1859 } else if (netdev->flags & IFF_ALLMULTI) { 1860 mc_filter[1] = ~0; 1861 mc_filter[0] = ~0; 1862 } else { 1863 netdev_for_each_mc_addr(ha, netdev) { 1864 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f; 1865 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f); 1866 } 1867 } 1868 1869 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0); 1870 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1); 1871 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR); 1872 } 1873 1874 static void gmac_write_mac_address(struct net_device *netdev) 1875 { 1876 struct gemini_ethernet_port *port = netdev_priv(netdev); 1877 __le32 addr[3]; 1878 1879 memset(addr, 0, sizeof(addr)); 1880 memcpy(addr, netdev->dev_addr, ETH_ALEN); 1881 1882 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0); 1883 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1); 1884 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2); 1885 } 1886 1887 static int gmac_set_mac_address(struct net_device *netdev, void *addr) 1888 { 1889 struct sockaddr *sa = addr; 1890 1891 memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN); 1892 gmac_write_mac_address(netdev); 1893 1894 return 0; 1895 } 1896 1897 static void gmac_clear_hw_stats(struct net_device *netdev) 1898 { 1899 struct gemini_ethernet_port *port = netdev_priv(netdev); 1900 1901 readl(port->gmac_base + GMAC_IN_DISCARDS); 1902 readl(port->gmac_base + GMAC_IN_ERRORS); 1903 readl(port->gmac_base + GMAC_IN_MCAST); 1904 readl(port->gmac_base + GMAC_IN_BCAST); 1905 readl(port->gmac_base + GMAC_IN_MAC1); 1906 readl(port->gmac_base + GMAC_IN_MAC2); 1907 } 1908 1909 static void gmac_get_stats64(struct net_device *netdev, 1910 struct rtnl_link_stats64 *stats) 1911 { 1912 struct gemini_ethernet_port *port = netdev_priv(netdev); 1913 unsigned int start; 1914 1915 gmac_update_hw_stats(netdev); 1916 1917 /* Racing with RX NAPI */ 1918 do { 1919 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 1920 1921 stats->rx_packets = port->stats.rx_packets; 1922 stats->rx_bytes = port->stats.rx_bytes; 1923 stats->rx_errors = port->stats.rx_errors; 1924 stats->rx_dropped = port->stats.rx_dropped; 1925 1926 stats->rx_length_errors = port->stats.rx_length_errors; 1927 stats->rx_over_errors = port->stats.rx_over_errors; 1928 stats->rx_crc_errors = port->stats.rx_crc_errors; 1929 stats->rx_frame_errors = port->stats.rx_frame_errors; 1930 1931 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 1932 1933 /* Racing with MIB and TX completion interrupts */ 1934 do { 1935 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 1936 1937 stats->tx_errors = port->stats.tx_errors; 1938 stats->tx_packets = port->stats.tx_packets; 1939 stats->tx_bytes = port->stats.tx_bytes; 1940 1941 stats->multicast = port->stats.multicast; 1942 stats->rx_missed_errors = port->stats.rx_missed_errors; 1943 stats->rx_fifo_errors = port->stats.rx_fifo_errors; 1944 1945 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 1946 1947 /* Racing with hard_start_xmit */ 1948 do { 1949 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 1950 1951 stats->tx_dropped = port->stats.tx_dropped; 1952 1953 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 1954 1955 stats->rx_dropped += stats->rx_missed_errors; 1956 } 1957 1958 static int gmac_change_mtu(struct net_device *netdev, int new_mtu) 1959 { 1960 int max_len = gmac_pick_rx_max_len(new_mtu); 1961 1962 if (max_len < 0) 1963 return -EINVAL; 1964 1965 gmac_disable_tx_rx(netdev); 1966 1967 netdev->mtu = new_mtu; 1968 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT, 1969 CONFIG0_MAXLEN_MASK); 1970 1971 netdev_update_features(netdev); 1972 1973 gmac_enable_tx_rx(netdev); 1974 1975 return 0; 1976 } 1977 1978 static netdev_features_t gmac_fix_features(struct net_device *netdev, 1979 netdev_features_t features) 1980 { 1981 if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK) 1982 features &= ~GMAC_OFFLOAD_FEATURES; 1983 1984 return features; 1985 } 1986 1987 static int gmac_set_features(struct net_device *netdev, 1988 netdev_features_t features) 1989 { 1990 struct gemini_ethernet_port *port = netdev_priv(netdev); 1991 int enable = features & NETIF_F_RXCSUM; 1992 unsigned long flags; 1993 u32 reg; 1994 1995 spin_lock_irqsave(&port->config_lock, flags); 1996 1997 reg = readl(port->gmac_base + GMAC_CONFIG0); 1998 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM; 1999 writel(reg, port->gmac_base + GMAC_CONFIG0); 2000 2001 spin_unlock_irqrestore(&port->config_lock, flags); 2002 return 0; 2003 } 2004 2005 static int gmac_get_sset_count(struct net_device *netdev, int sset) 2006 { 2007 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0; 2008 } 2009 2010 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data) 2011 { 2012 if (stringset != ETH_SS_STATS) 2013 return; 2014 2015 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings)); 2016 } 2017 2018 static void gmac_get_ethtool_stats(struct net_device *netdev, 2019 struct ethtool_stats *estats, u64 *values) 2020 { 2021 struct gemini_ethernet_port *port = netdev_priv(netdev); 2022 unsigned int start; 2023 u64 *p; 2024 int i; 2025 2026 gmac_update_hw_stats(netdev); 2027 2028 /* Racing with MIB interrupt */ 2029 do { 2030 p = values; 2031 start = u64_stats_fetch_begin(&port->ir_stats_syncp); 2032 2033 for (i = 0; i < RX_STATS_NUM; i++) 2034 *p++ = port->hw_stats[i]; 2035 2036 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start)); 2037 values = p; 2038 2039 /* Racing with RX NAPI */ 2040 do { 2041 p = values; 2042 start = u64_stats_fetch_begin(&port->rx_stats_syncp); 2043 2044 for (i = 0; i < RX_STATUS_NUM; i++) 2045 *p++ = port->rx_stats[i]; 2046 for (i = 0; i < RX_CHKSUM_NUM; i++) 2047 *p++ = port->rx_csum_stats[i]; 2048 *p++ = port->rx_napi_exits; 2049 2050 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start)); 2051 values = p; 2052 2053 /* Racing with TX start_xmit */ 2054 do { 2055 p = values; 2056 start = u64_stats_fetch_begin(&port->tx_stats_syncp); 2057 2058 for (i = 0; i < TX_MAX_FRAGS; i++) { 2059 *values++ = port->tx_frag_stats[i]; 2060 port->tx_frag_stats[i] = 0; 2061 } 2062 *values++ = port->tx_frags_linearized; 2063 *values++ = port->tx_hw_csummed; 2064 2065 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start)); 2066 } 2067 2068 static int gmac_get_ksettings(struct net_device *netdev, 2069 struct ethtool_link_ksettings *cmd) 2070 { 2071 if (!netdev->phydev) 2072 return -ENXIO; 2073 phy_ethtool_ksettings_get(netdev->phydev, cmd); 2074 2075 return 0; 2076 } 2077 2078 static int gmac_set_ksettings(struct net_device *netdev, 2079 const struct ethtool_link_ksettings *cmd) 2080 { 2081 if (!netdev->phydev) 2082 return -ENXIO; 2083 return phy_ethtool_ksettings_set(netdev->phydev, cmd); 2084 } 2085 2086 static int gmac_nway_reset(struct net_device *netdev) 2087 { 2088 if (!netdev->phydev) 2089 return -ENXIO; 2090 return phy_start_aneg(netdev->phydev); 2091 } 2092 2093 static void gmac_get_pauseparam(struct net_device *netdev, 2094 struct ethtool_pauseparam *pparam) 2095 { 2096 struct gemini_ethernet_port *port = netdev_priv(netdev); 2097 union gmac_config0 config0; 2098 2099 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 2100 2101 pparam->rx_pause = config0.bits.rx_fc_en; 2102 pparam->tx_pause = config0.bits.tx_fc_en; 2103 pparam->autoneg = true; 2104 } 2105 2106 static void gmac_get_ringparam(struct net_device *netdev, 2107 struct ethtool_ringparam *rp) 2108 { 2109 struct gemini_ethernet_port *port = netdev_priv(netdev); 2110 union gmac_config0 config0; 2111 2112 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 2113 2114 rp->rx_max_pending = 1 << 15; 2115 rp->rx_mini_max_pending = 0; 2116 rp->rx_jumbo_max_pending = 0; 2117 rp->tx_max_pending = 1 << 15; 2118 2119 rp->rx_pending = 1 << port->rxq_order; 2120 rp->rx_mini_pending = 0; 2121 rp->rx_jumbo_pending = 0; 2122 rp->tx_pending = 1 << port->txq_order; 2123 } 2124 2125 static int gmac_set_ringparam(struct net_device *netdev, 2126 struct ethtool_ringparam *rp) 2127 { 2128 struct gemini_ethernet_port *port = netdev_priv(netdev); 2129 int err = 0; 2130 2131 if (netif_running(netdev)) 2132 return -EBUSY; 2133 2134 if (rp->rx_pending) { 2135 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1); 2136 err = geth_resize_freeq(port); 2137 } 2138 if (rp->tx_pending) { 2139 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1); 2140 port->irq_every_tx_packets = 1 << (port->txq_order - 2); 2141 } 2142 2143 return err; 2144 } 2145 2146 static int gmac_get_coalesce(struct net_device *netdev, 2147 struct ethtool_coalesce *ecmd) 2148 { 2149 struct gemini_ethernet_port *port = netdev_priv(netdev); 2150 2151 ecmd->rx_max_coalesced_frames = 1; 2152 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets; 2153 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000; 2154 2155 return 0; 2156 } 2157 2158 static int gmac_set_coalesce(struct net_device *netdev, 2159 struct ethtool_coalesce *ecmd) 2160 { 2161 struct gemini_ethernet_port *port = netdev_priv(netdev); 2162 2163 if (ecmd->tx_max_coalesced_frames < 1) 2164 return -EINVAL; 2165 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order) 2166 return -EINVAL; 2167 2168 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames; 2169 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000; 2170 2171 return 0; 2172 } 2173 2174 static u32 gmac_get_msglevel(struct net_device *netdev) 2175 { 2176 struct gemini_ethernet_port *port = netdev_priv(netdev); 2177 2178 return port->msg_enable; 2179 } 2180 2181 static void gmac_set_msglevel(struct net_device *netdev, u32 level) 2182 { 2183 struct gemini_ethernet_port *port = netdev_priv(netdev); 2184 2185 port->msg_enable = level; 2186 } 2187 2188 static void gmac_get_drvinfo(struct net_device *netdev, 2189 struct ethtool_drvinfo *info) 2190 { 2191 strcpy(info->driver, DRV_NAME); 2192 strcpy(info->bus_info, netdev->dev_id ? "1" : "0"); 2193 } 2194 2195 static const struct net_device_ops gmac_351x_ops = { 2196 .ndo_init = gmac_init, 2197 .ndo_open = gmac_open, 2198 .ndo_stop = gmac_stop, 2199 .ndo_start_xmit = gmac_start_xmit, 2200 .ndo_tx_timeout = gmac_tx_timeout, 2201 .ndo_set_rx_mode = gmac_set_rx_mode, 2202 .ndo_set_mac_address = gmac_set_mac_address, 2203 .ndo_get_stats64 = gmac_get_stats64, 2204 .ndo_change_mtu = gmac_change_mtu, 2205 .ndo_fix_features = gmac_fix_features, 2206 .ndo_set_features = gmac_set_features, 2207 }; 2208 2209 static const struct ethtool_ops gmac_351x_ethtool_ops = { 2210 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS | 2211 ETHTOOL_COALESCE_MAX_FRAMES, 2212 .get_sset_count = gmac_get_sset_count, 2213 .get_strings = gmac_get_strings, 2214 .get_ethtool_stats = gmac_get_ethtool_stats, 2215 .get_link = ethtool_op_get_link, 2216 .get_link_ksettings = gmac_get_ksettings, 2217 .set_link_ksettings = gmac_set_ksettings, 2218 .nway_reset = gmac_nway_reset, 2219 .get_pauseparam = gmac_get_pauseparam, 2220 .get_ringparam = gmac_get_ringparam, 2221 .set_ringparam = gmac_set_ringparam, 2222 .get_coalesce = gmac_get_coalesce, 2223 .set_coalesce = gmac_set_coalesce, 2224 .get_msglevel = gmac_get_msglevel, 2225 .set_msglevel = gmac_set_msglevel, 2226 .get_drvinfo = gmac_get_drvinfo, 2227 }; 2228 2229 static irqreturn_t gemini_port_irq_thread(int irq, void *data) 2230 { 2231 unsigned long irqmask = SWFQ_EMPTY_INT_BIT; 2232 struct gemini_ethernet_port *port = data; 2233 struct gemini_ethernet *geth; 2234 unsigned long flags; 2235 2236 geth = port->geth; 2237 /* The queue is half empty so refill it */ 2238 geth_fill_freeq(geth, true); 2239 2240 spin_lock_irqsave(&geth->irq_lock, flags); 2241 /* ACK queue interrupt */ 2242 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2243 /* Enable queue interrupt again */ 2244 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2245 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2246 spin_unlock_irqrestore(&geth->irq_lock, flags); 2247 2248 return IRQ_HANDLED; 2249 } 2250 2251 static irqreturn_t gemini_port_irq(int irq, void *data) 2252 { 2253 struct gemini_ethernet_port *port = data; 2254 struct gemini_ethernet *geth; 2255 irqreturn_t ret = IRQ_NONE; 2256 u32 val, en; 2257 2258 geth = port->geth; 2259 spin_lock(&geth->irq_lock); 2260 2261 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2262 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2263 2264 if (val & en & SWFQ_EMPTY_INT_BIT) { 2265 /* Disable the queue empty interrupt while we work on 2266 * processing the queue. Also disable overrun interrupts 2267 * as there is not much we can do about it here. 2268 */ 2269 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT 2270 | GMAC1_RX_OVERRUN_INT_BIT); 2271 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2272 ret = IRQ_WAKE_THREAD; 2273 } 2274 2275 spin_unlock(&geth->irq_lock); 2276 2277 return ret; 2278 } 2279 2280 static void gemini_port_remove(struct gemini_ethernet_port *port) 2281 { 2282 if (port->netdev) { 2283 phy_disconnect(port->netdev->phydev); 2284 unregister_netdev(port->netdev); 2285 } 2286 clk_disable_unprepare(port->pclk); 2287 geth_cleanup_freeq(port->geth); 2288 } 2289 2290 static void gemini_ethernet_init(struct gemini_ethernet *geth) 2291 { 2292 /* Only do this once both ports are online */ 2293 if (geth->initialized) 2294 return; 2295 if (geth->port0 && geth->port1) 2296 geth->initialized = true; 2297 else 2298 return; 2299 2300 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG); 2301 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG); 2302 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG); 2303 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG); 2304 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG); 2305 2306 /* Interrupt config: 2307 * 2308 * GMAC0 intr bits ------> int0 ----> eth0 2309 * GMAC1 intr bits ------> int1 ----> eth1 2310 * TOE intr -------------> int1 ----> eth1 2311 * Classification Intr --> int0 ----> eth0 2312 * Default Q0 -----------> int0 ----> eth0 2313 * Default Q1 -----------> int1 ----> eth1 2314 * FreeQ intr -----------> int1 ----> eth1 2315 */ 2316 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG); 2317 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG); 2318 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG); 2319 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG); 2320 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG); 2321 2322 /* edge-triggered interrupts packed to level-triggered one... */ 2323 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG); 2324 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG); 2325 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG); 2326 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG); 2327 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG); 2328 2329 /* Set up queue */ 2330 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG); 2331 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG); 2332 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG); 2333 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG); 2334 2335 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER; 2336 /* This makes the queue resize on probe() so that we 2337 * set up and enable the queue IRQ. FIXME: fragile. 2338 */ 2339 geth->freeq_order = 1; 2340 } 2341 2342 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port) 2343 { 2344 port->mac_addr[0] = 2345 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0)); 2346 port->mac_addr[1] = 2347 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1)); 2348 port->mac_addr[2] = 2349 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2)); 2350 } 2351 2352 static int gemini_ethernet_port_probe(struct platform_device *pdev) 2353 { 2354 char *port_names[2] = { "ethernet0", "ethernet1" }; 2355 struct gemini_ethernet_port *port; 2356 struct device *dev = &pdev->dev; 2357 struct gemini_ethernet *geth; 2358 struct net_device *netdev; 2359 struct resource *gmacres; 2360 struct resource *dmares; 2361 struct device *parent; 2362 unsigned int id; 2363 int irq; 2364 int ret; 2365 2366 parent = dev->parent; 2367 geth = dev_get_drvdata(parent); 2368 2369 if (!strcmp(dev_name(dev), "60008000.ethernet-port")) 2370 id = 0; 2371 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port")) 2372 id = 1; 2373 else 2374 return -ENODEV; 2375 2376 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id); 2377 2378 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM); 2379 if (!netdev) { 2380 dev_err(dev, "Can't allocate ethernet device #%d\n", id); 2381 return -ENOMEM; 2382 } 2383 2384 port = netdev_priv(netdev); 2385 SET_NETDEV_DEV(netdev, dev); 2386 port->netdev = netdev; 2387 port->id = id; 2388 port->geth = geth; 2389 port->dev = dev; 2390 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 2391 2392 /* DMA memory */ 2393 dmares = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2394 if (!dmares) { 2395 dev_err(dev, "no DMA resource\n"); 2396 return -ENODEV; 2397 } 2398 port->dma_base = devm_ioremap_resource(dev, dmares); 2399 if (IS_ERR(port->dma_base)) 2400 return PTR_ERR(port->dma_base); 2401 2402 /* GMAC config memory */ 2403 gmacres = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2404 if (!gmacres) { 2405 dev_err(dev, "no GMAC resource\n"); 2406 return -ENODEV; 2407 } 2408 port->gmac_base = devm_ioremap_resource(dev, gmacres); 2409 if (IS_ERR(port->gmac_base)) 2410 return PTR_ERR(port->gmac_base); 2411 2412 /* Interrupt */ 2413 irq = platform_get_irq(pdev, 0); 2414 if (irq <= 0) 2415 return irq ? irq : -ENODEV; 2416 port->irq = irq; 2417 2418 /* Clock the port */ 2419 port->pclk = devm_clk_get(dev, "PCLK"); 2420 if (IS_ERR(port->pclk)) { 2421 dev_err(dev, "no PCLK\n"); 2422 return PTR_ERR(port->pclk); 2423 } 2424 ret = clk_prepare_enable(port->pclk); 2425 if (ret) 2426 return ret; 2427 2428 /* Maybe there is a nice ethernet address we should use */ 2429 gemini_port_save_mac_addr(port); 2430 2431 /* Reset the port */ 2432 port->reset = devm_reset_control_get_exclusive(dev, NULL); 2433 if (IS_ERR(port->reset)) { 2434 dev_err(dev, "no reset\n"); 2435 ret = PTR_ERR(port->reset); 2436 goto unprepare; 2437 } 2438 reset_control_reset(port->reset); 2439 usleep_range(100, 500); 2440 2441 /* Assign pointer in the main state container */ 2442 if (!id) 2443 geth->port0 = port; 2444 else 2445 geth->port1 = port; 2446 2447 /* This will just be done once both ports are up and reset */ 2448 gemini_ethernet_init(geth); 2449 2450 platform_set_drvdata(pdev, port); 2451 2452 /* Set up and register the netdev */ 2453 netdev->dev_id = port->id; 2454 netdev->irq = irq; 2455 netdev->netdev_ops = &gmac_351x_ops; 2456 netdev->ethtool_ops = &gmac_351x_ethtool_ops; 2457 2458 spin_lock_init(&port->config_lock); 2459 gmac_clear_hw_stats(netdev); 2460 2461 netdev->hw_features = GMAC_OFFLOAD_FEATURES; 2462 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO; 2463 /* We can handle jumbo frames up to 10236 bytes so, let's accept 2464 * payloads of 10236 bytes minus VLAN and ethernet header 2465 */ 2466 netdev->min_mtu = ETH_MIN_MTU; 2467 netdev->max_mtu = 10236 - VLAN_ETH_HLEN; 2468 2469 port->freeq_refill = 0; 2470 netif_napi_add(netdev, &port->napi, gmac_napi_poll, 2471 DEFAULT_NAPI_WEIGHT); 2472 2473 if (is_valid_ether_addr((void *)port->mac_addr)) { 2474 memcpy(netdev->dev_addr, port->mac_addr, ETH_ALEN); 2475 } else { 2476 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n", 2477 port->mac_addr[0], port->mac_addr[1], 2478 port->mac_addr[2]); 2479 dev_info(dev, "using a random ethernet address\n"); 2480 eth_random_addr(netdev->dev_addr); 2481 } 2482 gmac_write_mac_address(netdev); 2483 2484 ret = devm_request_threaded_irq(port->dev, 2485 port->irq, 2486 gemini_port_irq, 2487 gemini_port_irq_thread, 2488 IRQF_SHARED, 2489 port_names[port->id], 2490 port); 2491 if (ret) 2492 goto unprepare; 2493 2494 ret = gmac_setup_phy(netdev); 2495 if (ret) { 2496 netdev_err(netdev, 2497 "PHY init failed\n"); 2498 goto unprepare; 2499 } 2500 2501 ret = register_netdev(netdev); 2502 if (ret) 2503 goto unprepare; 2504 2505 netdev_info(netdev, 2506 "irq %d, DMA @ 0x%pap, GMAC @ 0x%pap\n", 2507 port->irq, &dmares->start, 2508 &gmacres->start); 2509 return 0; 2510 2511 unprepare: 2512 clk_disable_unprepare(port->pclk); 2513 return ret; 2514 } 2515 2516 static int gemini_ethernet_port_remove(struct platform_device *pdev) 2517 { 2518 struct gemini_ethernet_port *port = platform_get_drvdata(pdev); 2519 2520 gemini_port_remove(port); 2521 2522 return 0; 2523 } 2524 2525 static const struct of_device_id gemini_ethernet_port_of_match[] = { 2526 { 2527 .compatible = "cortina,gemini-ethernet-port", 2528 }, 2529 {}, 2530 }; 2531 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match); 2532 2533 static struct platform_driver gemini_ethernet_port_driver = { 2534 .driver = { 2535 .name = "gemini-ethernet-port", 2536 .of_match_table = of_match_ptr(gemini_ethernet_port_of_match), 2537 }, 2538 .probe = gemini_ethernet_port_probe, 2539 .remove = gemini_ethernet_port_remove, 2540 }; 2541 2542 static int gemini_ethernet_probe(struct platform_device *pdev) 2543 { 2544 struct device *dev = &pdev->dev; 2545 struct gemini_ethernet *geth; 2546 unsigned int retry = 5; 2547 struct resource *res; 2548 u32 val; 2549 2550 /* Global registers */ 2551 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL); 2552 if (!geth) 2553 return -ENOMEM; 2554 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2555 if (!res) 2556 return -ENODEV; 2557 geth->base = devm_ioremap_resource(dev, res); 2558 if (IS_ERR(geth->base)) 2559 return PTR_ERR(geth->base); 2560 geth->dev = dev; 2561 2562 /* Wait for ports to stabilize */ 2563 do { 2564 udelay(2); 2565 val = readl(geth->base + GLOBAL_TOE_VERSION_REG); 2566 barrier(); 2567 } while (!val && --retry); 2568 if (!retry) { 2569 dev_err(dev, "failed to reset ethernet\n"); 2570 return -EIO; 2571 } 2572 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n", 2573 (val >> 4) & 0xFFFU, val & 0xFU); 2574 2575 spin_lock_init(&geth->irq_lock); 2576 spin_lock_init(&geth->freeq_lock); 2577 2578 /* The children will use this */ 2579 platform_set_drvdata(pdev, geth); 2580 2581 /* Spawn child devices for the two ports */ 2582 return devm_of_platform_populate(dev); 2583 } 2584 2585 static int gemini_ethernet_remove(struct platform_device *pdev) 2586 { 2587 struct gemini_ethernet *geth = platform_get_drvdata(pdev); 2588 2589 geth_cleanup_freeq(geth); 2590 geth->initialized = false; 2591 2592 return 0; 2593 } 2594 2595 static const struct of_device_id gemini_ethernet_of_match[] = { 2596 { 2597 .compatible = "cortina,gemini-ethernet", 2598 }, 2599 {}, 2600 }; 2601 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match); 2602 2603 static struct platform_driver gemini_ethernet_driver = { 2604 .driver = { 2605 .name = DRV_NAME, 2606 .of_match_table = of_match_ptr(gemini_ethernet_of_match), 2607 }, 2608 .probe = gemini_ethernet_probe, 2609 .remove = gemini_ethernet_remove, 2610 }; 2611 2612 static int __init gemini_ethernet_module_init(void) 2613 { 2614 int ret; 2615 2616 ret = platform_driver_register(&gemini_ethernet_port_driver); 2617 if (ret) 2618 return ret; 2619 2620 ret = platform_driver_register(&gemini_ethernet_driver); 2621 if (ret) { 2622 platform_driver_unregister(&gemini_ethernet_port_driver); 2623 return ret; 2624 } 2625 2626 return 0; 2627 } 2628 module_init(gemini_ethernet_module_init); 2629 2630 static void __exit gemini_ethernet_module_exit(void) 2631 { 2632 platform_driver_unregister(&gemini_ethernet_driver); 2633 platform_driver_unregister(&gemini_ethernet_port_driver); 2634 } 2635 module_exit(gemini_ethernet_module_exit); 2636 2637 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>"); 2638 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver"); 2639 MODULE_LICENSE("GPL"); 2640 MODULE_ALIAS("platform:" DRV_NAME); 2641