1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/ethtool.h> 35 #include <linux/in.h> 36 #include <linux/ip.h> 37 #include <linux/ipv6.h> 38 #include <linux/tcp.h> 39 #include <linux/rtnetlink.h> 40 #include <linux/prefetch.h> 41 #include <net/ip6_checksum.h> 42 43 #include "cq_enet_desc.h" 44 #include "vnic_dev.h" 45 #include "vnic_intr.h" 46 #include "vnic_stats.h" 47 #include "vnic_vic.h" 48 #include "enic_res.h" 49 #include "enic.h" 50 #include "enic_dev.h" 51 #include "enic_pp.h" 52 53 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 54 #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) 55 #define MAX_TSO (1 << 16) 56 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 57 58 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 59 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 60 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 61 62 /* Supported devices */ 63 static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = { 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 65 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 66 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 67 { 0, } /* end of table */ 68 }; 69 70 MODULE_DESCRIPTION(DRV_DESCRIPTION); 71 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 72 MODULE_LICENSE("GPL"); 73 MODULE_VERSION(DRV_VERSION); 74 MODULE_DEVICE_TABLE(pci, enic_id_table); 75 76 struct enic_stat { 77 char name[ETH_GSTRING_LEN]; 78 unsigned int offset; 79 }; 80 81 #define ENIC_TX_STAT(stat) \ 82 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 } 83 #define ENIC_RX_STAT(stat) \ 84 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 } 85 86 static const struct enic_stat enic_tx_stats[] = { 87 ENIC_TX_STAT(tx_frames_ok), 88 ENIC_TX_STAT(tx_unicast_frames_ok), 89 ENIC_TX_STAT(tx_multicast_frames_ok), 90 ENIC_TX_STAT(tx_broadcast_frames_ok), 91 ENIC_TX_STAT(tx_bytes_ok), 92 ENIC_TX_STAT(tx_unicast_bytes_ok), 93 ENIC_TX_STAT(tx_multicast_bytes_ok), 94 ENIC_TX_STAT(tx_broadcast_bytes_ok), 95 ENIC_TX_STAT(tx_drops), 96 ENIC_TX_STAT(tx_errors), 97 ENIC_TX_STAT(tx_tso), 98 }; 99 100 static const struct enic_stat enic_rx_stats[] = { 101 ENIC_RX_STAT(rx_frames_ok), 102 ENIC_RX_STAT(rx_frames_total), 103 ENIC_RX_STAT(rx_unicast_frames_ok), 104 ENIC_RX_STAT(rx_multicast_frames_ok), 105 ENIC_RX_STAT(rx_broadcast_frames_ok), 106 ENIC_RX_STAT(rx_bytes_ok), 107 ENIC_RX_STAT(rx_unicast_bytes_ok), 108 ENIC_RX_STAT(rx_multicast_bytes_ok), 109 ENIC_RX_STAT(rx_broadcast_bytes_ok), 110 ENIC_RX_STAT(rx_drop), 111 ENIC_RX_STAT(rx_no_bufs), 112 ENIC_RX_STAT(rx_errors), 113 ENIC_RX_STAT(rx_rss), 114 ENIC_RX_STAT(rx_crc_errors), 115 ENIC_RX_STAT(rx_frames_64), 116 ENIC_RX_STAT(rx_frames_127), 117 ENIC_RX_STAT(rx_frames_255), 118 ENIC_RX_STAT(rx_frames_511), 119 ENIC_RX_STAT(rx_frames_1023), 120 ENIC_RX_STAT(rx_frames_1518), 121 ENIC_RX_STAT(rx_frames_to_max), 122 }; 123 124 static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats); 125 static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats); 126 127 int enic_is_dynamic(struct enic *enic) 128 { 129 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 130 } 131 132 int enic_sriov_enabled(struct enic *enic) 133 { 134 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 135 } 136 137 static int enic_is_sriov_vf(struct enic *enic) 138 { 139 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 140 } 141 142 int enic_is_valid_vf(struct enic *enic, int vf) 143 { 144 #ifdef CONFIG_PCI_IOV 145 return vf >= 0 && vf < enic->num_vfs; 146 #else 147 return 0; 148 #endif 149 } 150 151 static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq) 152 { 153 return rq; 154 } 155 156 static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq) 157 { 158 return enic->rq_count + wq; 159 } 160 161 static inline unsigned int enic_legacy_io_intr(void) 162 { 163 return 0; 164 } 165 166 static inline unsigned int enic_legacy_err_intr(void) 167 { 168 return 1; 169 } 170 171 static inline unsigned int enic_legacy_notify_intr(void) 172 { 173 return 2; 174 } 175 176 static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq) 177 { 178 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset; 179 } 180 181 static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq) 182 { 183 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset; 184 } 185 186 static inline unsigned int enic_msix_err_intr(struct enic *enic) 187 { 188 return enic->rq_count + enic->wq_count; 189 } 190 191 static inline unsigned int enic_msix_notify_intr(struct enic *enic) 192 { 193 return enic->rq_count + enic->wq_count + 1; 194 } 195 196 static int enic_get_settings(struct net_device *netdev, 197 struct ethtool_cmd *ecmd) 198 { 199 struct enic *enic = netdev_priv(netdev); 200 201 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE); 202 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE); 203 ecmd->port = PORT_FIBRE; 204 ecmd->transceiver = XCVR_EXTERNAL; 205 206 if (netif_carrier_ok(netdev)) { 207 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev)); 208 ecmd->duplex = DUPLEX_FULL; 209 } else { 210 ethtool_cmd_speed_set(ecmd, -1); 211 ecmd->duplex = -1; 212 } 213 214 ecmd->autoneg = AUTONEG_DISABLE; 215 216 return 0; 217 } 218 219 static void enic_get_drvinfo(struct net_device *netdev, 220 struct ethtool_drvinfo *drvinfo) 221 { 222 struct enic *enic = netdev_priv(netdev); 223 struct vnic_devcmd_fw_info *fw_info; 224 225 enic_dev_fw_info(enic, &fw_info); 226 227 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver)); 228 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version)); 229 strlcpy(drvinfo->fw_version, fw_info->fw_version, 230 sizeof(drvinfo->fw_version)); 231 strlcpy(drvinfo->bus_info, pci_name(enic->pdev), 232 sizeof(drvinfo->bus_info)); 233 } 234 235 static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data) 236 { 237 unsigned int i; 238 239 switch (stringset) { 240 case ETH_SS_STATS: 241 for (i = 0; i < enic_n_tx_stats; i++) { 242 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN); 243 data += ETH_GSTRING_LEN; 244 } 245 for (i = 0; i < enic_n_rx_stats; i++) { 246 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN); 247 data += ETH_GSTRING_LEN; 248 } 249 break; 250 } 251 } 252 253 static int enic_get_sset_count(struct net_device *netdev, int sset) 254 { 255 switch (sset) { 256 case ETH_SS_STATS: 257 return enic_n_tx_stats + enic_n_rx_stats; 258 default: 259 return -EOPNOTSUPP; 260 } 261 } 262 263 static void enic_get_ethtool_stats(struct net_device *netdev, 264 struct ethtool_stats *stats, u64 *data) 265 { 266 struct enic *enic = netdev_priv(netdev); 267 struct vnic_stats *vstats; 268 unsigned int i; 269 270 enic_dev_stats_dump(enic, &vstats); 271 272 for (i = 0; i < enic_n_tx_stats; i++) 273 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset]; 274 for (i = 0; i < enic_n_rx_stats; i++) 275 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset]; 276 } 277 278 static u32 enic_get_msglevel(struct net_device *netdev) 279 { 280 struct enic *enic = netdev_priv(netdev); 281 return enic->msg_enable; 282 } 283 284 static void enic_set_msglevel(struct net_device *netdev, u32 value) 285 { 286 struct enic *enic = netdev_priv(netdev); 287 enic->msg_enable = value; 288 } 289 290 static int enic_get_coalesce(struct net_device *netdev, 291 struct ethtool_coalesce *ecmd) 292 { 293 struct enic *enic = netdev_priv(netdev); 294 295 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs; 296 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs; 297 298 return 0; 299 } 300 301 static int enic_set_coalesce(struct net_device *netdev, 302 struct ethtool_coalesce *ecmd) 303 { 304 struct enic *enic = netdev_priv(netdev); 305 u32 tx_coalesce_usecs; 306 u32 rx_coalesce_usecs; 307 unsigned int i, intr; 308 309 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs, 310 vnic_dev_get_intr_coal_timer_max(enic->vdev)); 311 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs, 312 vnic_dev_get_intr_coal_timer_max(enic->vdev)); 313 314 switch (vnic_dev_get_intr_mode(enic->vdev)) { 315 case VNIC_DEV_INTR_MODE_INTX: 316 if (tx_coalesce_usecs != rx_coalesce_usecs) 317 return -EINVAL; 318 319 intr = enic_legacy_io_intr(); 320 vnic_intr_coalescing_timer_set(&enic->intr[intr], 321 tx_coalesce_usecs); 322 break; 323 case VNIC_DEV_INTR_MODE_MSI: 324 if (tx_coalesce_usecs != rx_coalesce_usecs) 325 return -EINVAL; 326 327 vnic_intr_coalescing_timer_set(&enic->intr[0], 328 tx_coalesce_usecs); 329 break; 330 case VNIC_DEV_INTR_MODE_MSIX: 331 for (i = 0; i < enic->wq_count; i++) { 332 intr = enic_msix_wq_intr(enic, i); 333 vnic_intr_coalescing_timer_set(&enic->intr[intr], 334 tx_coalesce_usecs); 335 } 336 337 for (i = 0; i < enic->rq_count; i++) { 338 intr = enic_msix_rq_intr(enic, i); 339 vnic_intr_coalescing_timer_set(&enic->intr[intr], 340 rx_coalesce_usecs); 341 } 342 343 break; 344 default: 345 break; 346 } 347 348 enic->tx_coalesce_usecs = tx_coalesce_usecs; 349 enic->rx_coalesce_usecs = rx_coalesce_usecs; 350 351 return 0; 352 } 353 354 static const struct ethtool_ops enic_ethtool_ops = { 355 .get_settings = enic_get_settings, 356 .get_drvinfo = enic_get_drvinfo, 357 .get_msglevel = enic_get_msglevel, 358 .set_msglevel = enic_set_msglevel, 359 .get_link = ethtool_op_get_link, 360 .get_strings = enic_get_strings, 361 .get_sset_count = enic_get_sset_count, 362 .get_ethtool_stats = enic_get_ethtool_stats, 363 .get_coalesce = enic_get_coalesce, 364 .set_coalesce = enic_set_coalesce, 365 }; 366 367 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) 368 { 369 struct enic *enic = vnic_dev_priv(wq->vdev); 370 371 if (buf->sop) 372 pci_unmap_single(enic->pdev, buf->dma_addr, 373 buf->len, PCI_DMA_TODEVICE); 374 else 375 pci_unmap_page(enic->pdev, buf->dma_addr, 376 buf->len, PCI_DMA_TODEVICE); 377 378 if (buf->os_buf) 379 dev_kfree_skb_any(buf->os_buf); 380 } 381 382 static void enic_wq_free_buf(struct vnic_wq *wq, 383 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) 384 { 385 enic_free_wq_buf(wq, buf); 386 } 387 388 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 389 u8 type, u16 q_number, u16 completed_index, void *opaque) 390 { 391 struct enic *enic = vnic_dev_priv(vdev); 392 393 spin_lock(&enic->wq_lock[q_number]); 394 395 vnic_wq_service(&enic->wq[q_number], cq_desc, 396 completed_index, enic_wq_free_buf, 397 opaque); 398 399 if (netif_queue_stopped(enic->netdev) && 400 vnic_wq_desc_avail(&enic->wq[q_number]) >= 401 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) 402 netif_wake_queue(enic->netdev); 403 404 spin_unlock(&enic->wq_lock[q_number]); 405 406 return 0; 407 } 408 409 static void enic_log_q_error(struct enic *enic) 410 { 411 unsigned int i; 412 u32 error_status; 413 414 for (i = 0; i < enic->wq_count; i++) { 415 error_status = vnic_wq_error_status(&enic->wq[i]); 416 if (error_status) 417 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 418 i, error_status); 419 } 420 421 for (i = 0; i < enic->rq_count; i++) { 422 error_status = vnic_rq_error_status(&enic->rq[i]); 423 if (error_status) 424 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 425 i, error_status); 426 } 427 } 428 429 static void enic_msglvl_check(struct enic *enic) 430 { 431 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 432 433 if (msg_enable != enic->msg_enable) { 434 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 435 enic->msg_enable, msg_enable); 436 enic->msg_enable = msg_enable; 437 } 438 } 439 440 static void enic_mtu_check(struct enic *enic) 441 { 442 u32 mtu = vnic_dev_mtu(enic->vdev); 443 struct net_device *netdev = enic->netdev; 444 445 if (mtu && mtu != enic->port_mtu) { 446 enic->port_mtu = mtu; 447 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 448 mtu = max_t(int, ENIC_MIN_MTU, 449 min_t(int, ENIC_MAX_MTU, mtu)); 450 if (mtu != netdev->mtu) 451 schedule_work(&enic->change_mtu_work); 452 } else { 453 if (mtu < netdev->mtu) 454 netdev_warn(netdev, 455 "interface MTU (%d) set higher " 456 "than switch port MTU (%d)\n", 457 netdev->mtu, mtu); 458 } 459 } 460 } 461 462 static void enic_link_check(struct enic *enic) 463 { 464 int link_status = vnic_dev_link_status(enic->vdev); 465 int carrier_ok = netif_carrier_ok(enic->netdev); 466 467 if (link_status && !carrier_ok) { 468 netdev_info(enic->netdev, "Link UP\n"); 469 netif_carrier_on(enic->netdev); 470 } else if (!link_status && carrier_ok) { 471 netdev_info(enic->netdev, "Link DOWN\n"); 472 netif_carrier_off(enic->netdev); 473 } 474 } 475 476 static void enic_notify_check(struct enic *enic) 477 { 478 enic_msglvl_check(enic); 479 enic_mtu_check(enic); 480 enic_link_check(enic); 481 } 482 483 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 484 485 static irqreturn_t enic_isr_legacy(int irq, void *data) 486 { 487 struct net_device *netdev = data; 488 struct enic *enic = netdev_priv(netdev); 489 unsigned int io_intr = enic_legacy_io_intr(); 490 unsigned int err_intr = enic_legacy_err_intr(); 491 unsigned int notify_intr = enic_legacy_notify_intr(); 492 u32 pba; 493 494 vnic_intr_mask(&enic->intr[io_intr]); 495 496 pba = vnic_intr_legacy_pba(enic->legacy_pba); 497 if (!pba) { 498 vnic_intr_unmask(&enic->intr[io_intr]); 499 return IRQ_NONE; /* not our interrupt */ 500 } 501 502 if (ENIC_TEST_INTR(pba, notify_intr)) { 503 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 504 enic_notify_check(enic); 505 } 506 507 if (ENIC_TEST_INTR(pba, err_intr)) { 508 vnic_intr_return_all_credits(&enic->intr[err_intr]); 509 enic_log_q_error(enic); 510 /* schedule recovery from WQ/RQ error */ 511 schedule_work(&enic->reset); 512 return IRQ_HANDLED; 513 } 514 515 if (ENIC_TEST_INTR(pba, io_intr)) { 516 if (napi_schedule_prep(&enic->napi[0])) 517 __napi_schedule(&enic->napi[0]); 518 } else { 519 vnic_intr_unmask(&enic->intr[io_intr]); 520 } 521 522 return IRQ_HANDLED; 523 } 524 525 static irqreturn_t enic_isr_msi(int irq, void *data) 526 { 527 struct enic *enic = data; 528 529 /* With MSI, there is no sharing of interrupts, so this is 530 * our interrupt and there is no need to ack it. The device 531 * is not providing per-vector masking, so the OS will not 532 * write to PCI config space to mask/unmask the interrupt. 533 * We're using mask_on_assertion for MSI, so the device 534 * automatically masks the interrupt when the interrupt is 535 * generated. Later, when exiting polling, the interrupt 536 * will be unmasked (see enic_poll). 537 * 538 * Also, the device uses the same PCIe Traffic Class (TC) 539 * for Memory Write data and MSI, so there are no ordering 540 * issues; the MSI will always arrive at the Root Complex 541 * _after_ corresponding Memory Writes (i.e. descriptor 542 * writes). 543 */ 544 545 napi_schedule(&enic->napi[0]); 546 547 return IRQ_HANDLED; 548 } 549 550 static irqreturn_t enic_isr_msix_rq(int irq, void *data) 551 { 552 struct napi_struct *napi = data; 553 554 /* schedule NAPI polling for RQ cleanup */ 555 napi_schedule(napi); 556 557 return IRQ_HANDLED; 558 } 559 560 static irqreturn_t enic_isr_msix_wq(int irq, void *data) 561 { 562 struct enic *enic = data; 563 unsigned int cq = enic_cq_wq(enic, 0); 564 unsigned int intr = enic_msix_wq_intr(enic, 0); 565 unsigned int wq_work_to_do = -1; /* no limit */ 566 unsigned int wq_work_done; 567 568 wq_work_done = vnic_cq_service(&enic->cq[cq], 569 wq_work_to_do, enic_wq_service, NULL); 570 571 vnic_intr_return_credits(&enic->intr[intr], 572 wq_work_done, 573 1 /* unmask intr */, 574 1 /* reset intr timer */); 575 576 return IRQ_HANDLED; 577 } 578 579 static irqreturn_t enic_isr_msix_err(int irq, void *data) 580 { 581 struct enic *enic = data; 582 unsigned int intr = enic_msix_err_intr(enic); 583 584 vnic_intr_return_all_credits(&enic->intr[intr]); 585 586 enic_log_q_error(enic); 587 588 /* schedule recovery from WQ/RQ error */ 589 schedule_work(&enic->reset); 590 591 return IRQ_HANDLED; 592 } 593 594 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 595 { 596 struct enic *enic = data; 597 unsigned int intr = enic_msix_notify_intr(enic); 598 599 vnic_intr_return_all_credits(&enic->intr[intr]); 600 enic_notify_check(enic); 601 602 return IRQ_HANDLED; 603 } 604 605 static inline void enic_queue_wq_skb_cont(struct enic *enic, 606 struct vnic_wq *wq, struct sk_buff *skb, 607 unsigned int len_left, int loopback) 608 { 609 const skb_frag_t *frag; 610 611 /* Queue additional data fragments */ 612 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 613 len_left -= skb_frag_size(frag); 614 enic_queue_wq_desc_cont(wq, skb, 615 skb_frag_dma_map(&enic->pdev->dev, 616 frag, 0, skb_frag_size(frag), 617 DMA_TO_DEVICE), 618 skb_frag_size(frag), 619 (len_left == 0), /* EOP? */ 620 loopback); 621 } 622 } 623 624 static inline void enic_queue_wq_skb_vlan(struct enic *enic, 625 struct vnic_wq *wq, struct sk_buff *skb, 626 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 627 { 628 unsigned int head_len = skb_headlen(skb); 629 unsigned int len_left = skb->len - head_len; 630 int eop = (len_left == 0); 631 632 /* Queue the main skb fragment. The fragments are no larger 633 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 634 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 635 * per fragment is queued. 636 */ 637 enic_queue_wq_desc(wq, skb, 638 pci_map_single(enic->pdev, skb->data, 639 head_len, PCI_DMA_TODEVICE), 640 head_len, 641 vlan_tag_insert, vlan_tag, 642 eop, loopback); 643 644 if (!eop) 645 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 646 } 647 648 static inline void enic_queue_wq_skb_csum_l4(struct enic *enic, 649 struct vnic_wq *wq, struct sk_buff *skb, 650 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 651 { 652 unsigned int head_len = skb_headlen(skb); 653 unsigned int len_left = skb->len - head_len; 654 unsigned int hdr_len = skb_checksum_start_offset(skb); 655 unsigned int csum_offset = hdr_len + skb->csum_offset; 656 int eop = (len_left == 0); 657 658 /* Queue the main skb fragment. The fragments are no larger 659 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 660 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 661 * per fragment is queued. 662 */ 663 enic_queue_wq_desc_csum_l4(wq, skb, 664 pci_map_single(enic->pdev, skb->data, 665 head_len, PCI_DMA_TODEVICE), 666 head_len, 667 csum_offset, 668 hdr_len, 669 vlan_tag_insert, vlan_tag, 670 eop, loopback); 671 672 if (!eop) 673 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 674 } 675 676 static inline void enic_queue_wq_skb_tso(struct enic *enic, 677 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss, 678 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 679 { 680 unsigned int frag_len_left = skb_headlen(skb); 681 unsigned int len_left = skb->len - frag_len_left; 682 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 683 int eop = (len_left == 0); 684 unsigned int len; 685 dma_addr_t dma_addr; 686 unsigned int offset = 0; 687 skb_frag_t *frag; 688 689 /* Preload TCP csum field with IP pseudo hdr calculated 690 * with IP length set to zero. HW will later add in length 691 * to each TCP segment resulting from the TSO. 692 */ 693 694 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 695 ip_hdr(skb)->check = 0; 696 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 697 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 698 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 699 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 700 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 701 } 702 703 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 704 * for the main skb fragment 705 */ 706 while (frag_len_left) { 707 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 708 dma_addr = pci_map_single(enic->pdev, skb->data + offset, 709 len, PCI_DMA_TODEVICE); 710 enic_queue_wq_desc_tso(wq, skb, 711 dma_addr, 712 len, 713 mss, hdr_len, 714 vlan_tag_insert, vlan_tag, 715 eop && (len == frag_len_left), loopback); 716 frag_len_left -= len; 717 offset += len; 718 } 719 720 if (eop) 721 return; 722 723 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 724 * for additional data fragments 725 */ 726 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 727 len_left -= skb_frag_size(frag); 728 frag_len_left = skb_frag_size(frag); 729 offset = 0; 730 731 while (frag_len_left) { 732 len = min(frag_len_left, 733 (unsigned int)WQ_ENET_MAX_DESC_LEN); 734 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 735 offset, len, 736 DMA_TO_DEVICE); 737 enic_queue_wq_desc_cont(wq, skb, 738 dma_addr, 739 len, 740 (len_left == 0) && 741 (len == frag_len_left), /* EOP? */ 742 loopback); 743 frag_len_left -= len; 744 offset += len; 745 } 746 } 747 } 748 749 static inline void enic_queue_wq_skb(struct enic *enic, 750 struct vnic_wq *wq, struct sk_buff *skb) 751 { 752 unsigned int mss = skb_shinfo(skb)->gso_size; 753 unsigned int vlan_tag = 0; 754 int vlan_tag_insert = 0; 755 int loopback = 0; 756 757 if (vlan_tx_tag_present(skb)) { 758 /* VLAN tag from trunking driver */ 759 vlan_tag_insert = 1; 760 vlan_tag = vlan_tx_tag_get(skb); 761 } else if (enic->loop_enable) { 762 vlan_tag = enic->loop_tag; 763 loopback = 1; 764 } 765 766 if (mss) 767 enic_queue_wq_skb_tso(enic, wq, skb, mss, 768 vlan_tag_insert, vlan_tag, loopback); 769 else if (skb->ip_summed == CHECKSUM_PARTIAL) 770 enic_queue_wq_skb_csum_l4(enic, wq, skb, 771 vlan_tag_insert, vlan_tag, loopback); 772 else 773 enic_queue_wq_skb_vlan(enic, wq, skb, 774 vlan_tag_insert, vlan_tag, loopback); 775 } 776 777 /* netif_tx_lock held, process context with BHs disabled, or BH */ 778 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 779 struct net_device *netdev) 780 { 781 struct enic *enic = netdev_priv(netdev); 782 struct vnic_wq *wq = &enic->wq[0]; 783 unsigned long flags; 784 785 if (skb->len <= 0) { 786 dev_kfree_skb(skb); 787 return NETDEV_TX_OK; 788 } 789 790 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 791 * which is very likely. In the off chance it's going to take 792 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 793 */ 794 795 if (skb_shinfo(skb)->gso_size == 0 && 796 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 797 skb_linearize(skb)) { 798 dev_kfree_skb(skb); 799 return NETDEV_TX_OK; 800 } 801 802 spin_lock_irqsave(&enic->wq_lock[0], flags); 803 804 if (vnic_wq_desc_avail(wq) < 805 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 806 netif_stop_queue(netdev); 807 /* This is a hard error, log it */ 808 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 809 spin_unlock_irqrestore(&enic->wq_lock[0], flags); 810 return NETDEV_TX_BUSY; 811 } 812 813 enic_queue_wq_skb(enic, wq, skb); 814 815 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) 816 netif_stop_queue(netdev); 817 818 spin_unlock_irqrestore(&enic->wq_lock[0], flags); 819 820 return NETDEV_TX_OK; 821 } 822 823 /* dev_base_lock rwlock held, nominally process context */ 824 static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev, 825 struct rtnl_link_stats64 *net_stats) 826 { 827 struct enic *enic = netdev_priv(netdev); 828 struct vnic_stats *stats; 829 830 enic_dev_stats_dump(enic, &stats); 831 832 net_stats->tx_packets = stats->tx.tx_frames_ok; 833 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 834 net_stats->tx_errors = stats->tx.tx_errors; 835 net_stats->tx_dropped = stats->tx.tx_drops; 836 837 net_stats->rx_packets = stats->rx.rx_frames_ok; 838 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 839 net_stats->rx_errors = stats->rx.rx_errors; 840 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 841 net_stats->rx_over_errors = enic->rq_truncated_pkts; 842 net_stats->rx_crc_errors = enic->rq_bad_fcs; 843 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 844 845 return net_stats; 846 } 847 848 void enic_reset_addr_lists(struct enic *enic) 849 { 850 enic->mc_count = 0; 851 enic->uc_count = 0; 852 enic->flags = 0; 853 } 854 855 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 856 { 857 struct enic *enic = netdev_priv(netdev); 858 859 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 860 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 861 return -EADDRNOTAVAIL; 862 } else { 863 if (!is_valid_ether_addr(addr)) 864 return -EADDRNOTAVAIL; 865 } 866 867 memcpy(netdev->dev_addr, addr, netdev->addr_len); 868 869 return 0; 870 } 871 872 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 873 { 874 struct enic *enic = netdev_priv(netdev); 875 struct sockaddr *saddr = p; 876 char *addr = saddr->sa_data; 877 int err; 878 879 if (netif_running(enic->netdev)) { 880 err = enic_dev_del_station_addr(enic); 881 if (err) 882 return err; 883 } 884 885 err = enic_set_mac_addr(netdev, addr); 886 if (err) 887 return err; 888 889 if (netif_running(enic->netdev)) { 890 err = enic_dev_add_station_addr(enic); 891 if (err) 892 return err; 893 } 894 895 return err; 896 } 897 898 static int enic_set_mac_address(struct net_device *netdev, void *p) 899 { 900 struct sockaddr *saddr = p; 901 char *addr = saddr->sa_data; 902 struct enic *enic = netdev_priv(netdev); 903 int err; 904 905 err = enic_dev_del_station_addr(enic); 906 if (err) 907 return err; 908 909 err = enic_set_mac_addr(netdev, addr); 910 if (err) 911 return err; 912 913 return enic_dev_add_station_addr(enic); 914 } 915 916 static void enic_update_multicast_addr_list(struct enic *enic) 917 { 918 struct net_device *netdev = enic->netdev; 919 struct netdev_hw_addr *ha; 920 unsigned int mc_count = netdev_mc_count(netdev); 921 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN]; 922 unsigned int i, j; 923 924 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) { 925 netdev_warn(netdev, "Registering only %d out of %d " 926 "multicast addresses\n", 927 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 928 mc_count = ENIC_MULTICAST_PERFECT_FILTERS; 929 } 930 931 /* Is there an easier way? Trying to minimize to 932 * calls to add/del multicast addrs. We keep the 933 * addrs from the last call in enic->mc_addr and 934 * look for changes to add/del. 935 */ 936 937 i = 0; 938 netdev_for_each_mc_addr(ha, netdev) { 939 if (i == mc_count) 940 break; 941 memcpy(mc_addr[i++], ha->addr, ETH_ALEN); 942 } 943 944 for (i = 0; i < enic->mc_count; i++) { 945 for (j = 0; j < mc_count; j++) 946 if (ether_addr_equal(enic->mc_addr[i], mc_addr[j])) 947 break; 948 if (j == mc_count) 949 enic_dev_del_addr(enic, enic->mc_addr[i]); 950 } 951 952 for (i = 0; i < mc_count; i++) { 953 for (j = 0; j < enic->mc_count; j++) 954 if (ether_addr_equal(mc_addr[i], enic->mc_addr[j])) 955 break; 956 if (j == enic->mc_count) 957 enic_dev_add_addr(enic, mc_addr[i]); 958 } 959 960 /* Save the list to compare against next time 961 */ 962 963 for (i = 0; i < mc_count; i++) 964 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN); 965 966 enic->mc_count = mc_count; 967 } 968 969 static void enic_update_unicast_addr_list(struct enic *enic) 970 { 971 struct net_device *netdev = enic->netdev; 972 struct netdev_hw_addr *ha; 973 unsigned int uc_count = netdev_uc_count(netdev); 974 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN]; 975 unsigned int i, j; 976 977 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) { 978 netdev_warn(netdev, "Registering only %d out of %d " 979 "unicast addresses\n", 980 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 981 uc_count = ENIC_UNICAST_PERFECT_FILTERS; 982 } 983 984 /* Is there an easier way? Trying to minimize to 985 * calls to add/del unicast addrs. We keep the 986 * addrs from the last call in enic->uc_addr and 987 * look for changes to add/del. 988 */ 989 990 i = 0; 991 netdev_for_each_uc_addr(ha, netdev) { 992 if (i == uc_count) 993 break; 994 memcpy(uc_addr[i++], ha->addr, ETH_ALEN); 995 } 996 997 for (i = 0; i < enic->uc_count; i++) { 998 for (j = 0; j < uc_count; j++) 999 if (ether_addr_equal(enic->uc_addr[i], uc_addr[j])) 1000 break; 1001 if (j == uc_count) 1002 enic_dev_del_addr(enic, enic->uc_addr[i]); 1003 } 1004 1005 for (i = 0; i < uc_count; i++) { 1006 for (j = 0; j < enic->uc_count; j++) 1007 if (ether_addr_equal(uc_addr[i], enic->uc_addr[j])) 1008 break; 1009 if (j == enic->uc_count) 1010 enic_dev_add_addr(enic, uc_addr[i]); 1011 } 1012 1013 /* Save the list to compare against next time 1014 */ 1015 1016 for (i = 0; i < uc_count; i++) 1017 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN); 1018 1019 enic->uc_count = uc_count; 1020 } 1021 1022 /* netif_tx_lock held, BHs disabled */ 1023 static void enic_set_rx_mode(struct net_device *netdev) 1024 { 1025 struct enic *enic = netdev_priv(netdev); 1026 int directed = 1; 1027 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 1028 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 1029 int promisc = (netdev->flags & IFF_PROMISC) || 1030 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 1031 int allmulti = (netdev->flags & IFF_ALLMULTI) || 1032 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 1033 unsigned int flags = netdev->flags | 1034 (allmulti ? IFF_ALLMULTI : 0) | 1035 (promisc ? IFF_PROMISC : 0); 1036 1037 if (enic->flags != flags) { 1038 enic->flags = flags; 1039 enic_dev_packet_filter(enic, directed, 1040 multicast, broadcast, promisc, allmulti); 1041 } 1042 1043 if (!promisc) { 1044 enic_update_unicast_addr_list(enic); 1045 if (!allmulti) 1046 enic_update_multicast_addr_list(enic); 1047 } 1048 } 1049 1050 /* netif_tx_lock held, BHs disabled */ 1051 static void enic_tx_timeout(struct net_device *netdev) 1052 { 1053 struct enic *enic = netdev_priv(netdev); 1054 schedule_work(&enic->reset); 1055 } 1056 1057 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 1058 { 1059 struct enic *enic = netdev_priv(netdev); 1060 struct enic_port_profile *pp; 1061 int err; 1062 1063 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1064 if (err) 1065 return err; 1066 1067 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 1068 if (vf == PORT_SELF_VF) { 1069 memcpy(pp->vf_mac, mac, ETH_ALEN); 1070 return 0; 1071 } else { 1072 /* 1073 * For sriov vf's set the mac in hw 1074 */ 1075 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 1076 vnic_dev_set_mac_addr, mac); 1077 return enic_dev_status_to_errno(err); 1078 } 1079 } else 1080 return -EINVAL; 1081 } 1082 1083 static int enic_set_vf_port(struct net_device *netdev, int vf, 1084 struct nlattr *port[]) 1085 { 1086 struct enic *enic = netdev_priv(netdev); 1087 struct enic_port_profile prev_pp; 1088 struct enic_port_profile *pp; 1089 int err = 0, restore_pp = 1; 1090 1091 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1092 if (err) 1093 return err; 1094 1095 if (!port[IFLA_PORT_REQUEST]) 1096 return -EOPNOTSUPP; 1097 1098 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 1099 memset(pp, 0, sizeof(*enic->pp)); 1100 1101 pp->set |= ENIC_SET_REQUEST; 1102 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 1103 1104 if (port[IFLA_PORT_PROFILE]) { 1105 pp->set |= ENIC_SET_NAME; 1106 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 1107 PORT_PROFILE_MAX); 1108 } 1109 1110 if (port[IFLA_PORT_INSTANCE_UUID]) { 1111 pp->set |= ENIC_SET_INSTANCE; 1112 memcpy(pp->instance_uuid, 1113 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 1114 } 1115 1116 if (port[IFLA_PORT_HOST_UUID]) { 1117 pp->set |= ENIC_SET_HOST; 1118 memcpy(pp->host_uuid, 1119 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 1120 } 1121 1122 if (vf == PORT_SELF_VF) { 1123 /* Special case handling: mac came from IFLA_VF_MAC */ 1124 if (!is_zero_ether_addr(prev_pp.vf_mac)) 1125 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 1126 1127 if (is_zero_ether_addr(netdev->dev_addr)) 1128 eth_hw_addr_random(netdev); 1129 } else { 1130 /* SR-IOV VF: get mac from adapter */ 1131 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 1132 vnic_dev_get_mac_addr, pp->mac_addr); 1133 if (err) { 1134 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 1135 memcpy(pp, &prev_pp, sizeof(*pp)); 1136 return enic_dev_status_to_errno(err); 1137 } 1138 } 1139 1140 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 1141 if (err) { 1142 if (restore_pp) { 1143 /* Things are still the way they were: Implicit 1144 * DISASSOCIATE failed 1145 */ 1146 memcpy(pp, &prev_pp, sizeof(*pp)); 1147 } else { 1148 memset(pp, 0, sizeof(*pp)); 1149 if (vf == PORT_SELF_VF) 1150 memset(netdev->dev_addr, 0, ETH_ALEN); 1151 } 1152 } else { 1153 /* Set flag to indicate that the port assoc/disassoc 1154 * request has been sent out to fw 1155 */ 1156 pp->set |= ENIC_PORT_REQUEST_APPLIED; 1157 1158 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 1159 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 1160 memset(pp->mac_addr, 0, ETH_ALEN); 1161 if (vf == PORT_SELF_VF) 1162 memset(netdev->dev_addr, 0, ETH_ALEN); 1163 } 1164 } 1165 1166 if (vf == PORT_SELF_VF) 1167 memset(pp->vf_mac, 0, ETH_ALEN); 1168 1169 return err; 1170 } 1171 1172 static int enic_get_vf_port(struct net_device *netdev, int vf, 1173 struct sk_buff *skb) 1174 { 1175 struct enic *enic = netdev_priv(netdev); 1176 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 1177 struct enic_port_profile *pp; 1178 int err; 1179 1180 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1181 if (err) 1182 return err; 1183 1184 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 1185 return -ENODATA; 1186 1187 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 1188 if (err) 1189 return err; 1190 1191 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 1192 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 1193 ((pp->set & ENIC_SET_NAME) && 1194 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 1195 ((pp->set & ENIC_SET_INSTANCE) && 1196 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 1197 pp->instance_uuid)) || 1198 ((pp->set & ENIC_SET_HOST) && 1199 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 1200 goto nla_put_failure; 1201 return 0; 1202 1203 nla_put_failure: 1204 return -EMSGSIZE; 1205 } 1206 1207 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf) 1208 { 1209 struct enic *enic = vnic_dev_priv(rq->vdev); 1210 1211 if (!buf->os_buf) 1212 return; 1213 1214 pci_unmap_single(enic->pdev, buf->dma_addr, 1215 buf->len, PCI_DMA_FROMDEVICE); 1216 dev_kfree_skb_any(buf->os_buf); 1217 } 1218 1219 static int enic_rq_alloc_buf(struct vnic_rq *rq) 1220 { 1221 struct enic *enic = vnic_dev_priv(rq->vdev); 1222 struct net_device *netdev = enic->netdev; 1223 struct sk_buff *skb; 1224 unsigned int len = netdev->mtu + VLAN_ETH_HLEN; 1225 unsigned int os_buf_index = 0; 1226 dma_addr_t dma_addr; 1227 1228 skb = netdev_alloc_skb_ip_align(netdev, len); 1229 if (!skb) 1230 return -ENOMEM; 1231 1232 dma_addr = pci_map_single(enic->pdev, skb->data, 1233 len, PCI_DMA_FROMDEVICE); 1234 1235 enic_queue_rq_desc(rq, skb, os_buf_index, 1236 dma_addr, len); 1237 1238 return 0; 1239 } 1240 1241 static void enic_rq_indicate_buf(struct vnic_rq *rq, 1242 struct cq_desc *cq_desc, struct vnic_rq_buf *buf, 1243 int skipped, void *opaque) 1244 { 1245 struct enic *enic = vnic_dev_priv(rq->vdev); 1246 struct net_device *netdev = enic->netdev; 1247 struct sk_buff *skb; 1248 1249 u8 type, color, eop, sop, ingress_port, vlan_stripped; 1250 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; 1251 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; 1252 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; 1253 u8 packet_error; 1254 u16 q_number, completed_index, bytes_written, vlan_tci, checksum; 1255 u32 rss_hash; 1256 1257 if (skipped) 1258 return; 1259 1260 skb = buf->os_buf; 1261 prefetch(skb->data - NET_IP_ALIGN); 1262 pci_unmap_single(enic->pdev, buf->dma_addr, 1263 buf->len, PCI_DMA_FROMDEVICE); 1264 1265 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, 1266 &type, &color, &q_number, &completed_index, 1267 &ingress_port, &fcoe, &eop, &sop, &rss_type, 1268 &csum_not_calc, &rss_hash, &bytes_written, 1269 &packet_error, &vlan_stripped, &vlan_tci, &checksum, 1270 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error, 1271 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp, 1272 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, 1273 &fcs_ok); 1274 1275 if (packet_error) { 1276 1277 if (!fcs_ok) { 1278 if (bytes_written > 0) 1279 enic->rq_bad_fcs++; 1280 else if (bytes_written == 0) 1281 enic->rq_truncated_pkts++; 1282 } 1283 1284 dev_kfree_skb_any(skb); 1285 1286 return; 1287 } 1288 1289 if (eop && bytes_written > 0) { 1290 1291 /* Good receive 1292 */ 1293 1294 skb_put(skb, bytes_written); 1295 skb->protocol = eth_type_trans(skb, netdev); 1296 1297 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) { 1298 skb->csum = htons(checksum); 1299 skb->ip_summed = CHECKSUM_COMPLETE; 1300 } 1301 1302 if (vlan_stripped) 1303 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci); 1304 1305 if (netdev->features & NETIF_F_GRO) 1306 napi_gro_receive(&enic->napi[q_number], skb); 1307 else 1308 netif_receive_skb(skb); 1309 } else { 1310 1311 /* Buffer overflow 1312 */ 1313 1314 dev_kfree_skb_any(skb); 1315 } 1316 } 1317 1318 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 1319 u8 type, u16 q_number, u16 completed_index, void *opaque) 1320 { 1321 struct enic *enic = vnic_dev_priv(vdev); 1322 1323 vnic_rq_service(&enic->rq[q_number], cq_desc, 1324 completed_index, VNIC_RQ_RETURN_DESC, 1325 enic_rq_indicate_buf, opaque); 1326 1327 return 0; 1328 } 1329 1330 static int enic_poll(struct napi_struct *napi, int budget) 1331 { 1332 struct net_device *netdev = napi->dev; 1333 struct enic *enic = netdev_priv(netdev); 1334 unsigned int cq_rq = enic_cq_rq(enic, 0); 1335 unsigned int cq_wq = enic_cq_wq(enic, 0); 1336 unsigned int intr = enic_legacy_io_intr(); 1337 unsigned int rq_work_to_do = budget; 1338 unsigned int wq_work_to_do = -1; /* no limit */ 1339 unsigned int work_done, rq_work_done, wq_work_done; 1340 int err; 1341 1342 /* Service RQ (first) and WQ 1343 */ 1344 1345 rq_work_done = vnic_cq_service(&enic->cq[cq_rq], 1346 rq_work_to_do, enic_rq_service, NULL); 1347 1348 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], 1349 wq_work_to_do, enic_wq_service, NULL); 1350 1351 /* Accumulate intr event credits for this polling 1352 * cycle. An intr event is the completion of a 1353 * a WQ or RQ packet. 1354 */ 1355 1356 work_done = rq_work_done + wq_work_done; 1357 1358 if (work_done > 0) 1359 vnic_intr_return_credits(&enic->intr[intr], 1360 work_done, 1361 0 /* don't unmask intr */, 1362 0 /* don't reset intr timer */); 1363 1364 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1365 1366 /* Buffer allocation failed. Stay in polling 1367 * mode so we can try to fill the ring again. 1368 */ 1369 1370 if (err) 1371 rq_work_done = rq_work_to_do; 1372 1373 if (rq_work_done < rq_work_to_do) { 1374 1375 /* Some work done, but not enough to stay in polling, 1376 * exit polling 1377 */ 1378 1379 napi_complete(napi); 1380 vnic_intr_unmask(&enic->intr[intr]); 1381 } 1382 1383 return rq_work_done; 1384 } 1385 1386 static int enic_poll_msix(struct napi_struct *napi, int budget) 1387 { 1388 struct net_device *netdev = napi->dev; 1389 struct enic *enic = netdev_priv(netdev); 1390 unsigned int rq = (napi - &enic->napi[0]); 1391 unsigned int cq = enic_cq_rq(enic, rq); 1392 unsigned int intr = enic_msix_rq_intr(enic, rq); 1393 unsigned int work_to_do = budget; 1394 unsigned int work_done; 1395 int err; 1396 1397 /* Service RQ 1398 */ 1399 1400 work_done = vnic_cq_service(&enic->cq[cq], 1401 work_to_do, enic_rq_service, NULL); 1402 1403 /* Return intr event credits for this polling 1404 * cycle. An intr event is the completion of a 1405 * RQ packet. 1406 */ 1407 1408 if (work_done > 0) 1409 vnic_intr_return_credits(&enic->intr[intr], 1410 work_done, 1411 0 /* don't unmask intr */, 1412 0 /* don't reset intr timer */); 1413 1414 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1415 1416 /* Buffer allocation failed. Stay in polling mode 1417 * so we can try to fill the ring again. 1418 */ 1419 1420 if (err) 1421 work_done = work_to_do; 1422 1423 if (work_done < work_to_do) { 1424 1425 /* Some work done, but not enough to stay in polling, 1426 * exit polling 1427 */ 1428 1429 napi_complete(napi); 1430 vnic_intr_unmask(&enic->intr[intr]); 1431 } 1432 1433 return work_done; 1434 } 1435 1436 static void enic_notify_timer(unsigned long data) 1437 { 1438 struct enic *enic = (struct enic *)data; 1439 1440 enic_notify_check(enic); 1441 1442 mod_timer(&enic->notify_timer, 1443 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1444 } 1445 1446 static void enic_free_intr(struct enic *enic) 1447 { 1448 struct net_device *netdev = enic->netdev; 1449 unsigned int i; 1450 1451 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1452 case VNIC_DEV_INTR_MODE_INTX: 1453 free_irq(enic->pdev->irq, netdev); 1454 break; 1455 case VNIC_DEV_INTR_MODE_MSI: 1456 free_irq(enic->pdev->irq, enic); 1457 break; 1458 case VNIC_DEV_INTR_MODE_MSIX: 1459 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1460 if (enic->msix[i].requested) 1461 free_irq(enic->msix_entry[i].vector, 1462 enic->msix[i].devid); 1463 break; 1464 default: 1465 break; 1466 } 1467 } 1468 1469 static int enic_request_intr(struct enic *enic) 1470 { 1471 struct net_device *netdev = enic->netdev; 1472 unsigned int i, intr; 1473 int err = 0; 1474 1475 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1476 1477 case VNIC_DEV_INTR_MODE_INTX: 1478 1479 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1480 IRQF_SHARED, netdev->name, netdev); 1481 break; 1482 1483 case VNIC_DEV_INTR_MODE_MSI: 1484 1485 err = request_irq(enic->pdev->irq, enic_isr_msi, 1486 0, netdev->name, enic); 1487 break; 1488 1489 case VNIC_DEV_INTR_MODE_MSIX: 1490 1491 for (i = 0; i < enic->rq_count; i++) { 1492 intr = enic_msix_rq_intr(enic, i); 1493 snprintf(enic->msix[intr].devname, 1494 sizeof(enic->msix[intr].devname), 1495 "%.11s-rx-%d", netdev->name, i); 1496 enic->msix[intr].isr = enic_isr_msix_rq; 1497 enic->msix[intr].devid = &enic->napi[i]; 1498 } 1499 1500 for (i = 0; i < enic->wq_count; i++) { 1501 intr = enic_msix_wq_intr(enic, i); 1502 snprintf(enic->msix[intr].devname, 1503 sizeof(enic->msix[intr].devname), 1504 "%.11s-tx-%d", netdev->name, i); 1505 enic->msix[intr].isr = enic_isr_msix_wq; 1506 enic->msix[intr].devid = enic; 1507 } 1508 1509 intr = enic_msix_err_intr(enic); 1510 snprintf(enic->msix[intr].devname, 1511 sizeof(enic->msix[intr].devname), 1512 "%.11s-err", netdev->name); 1513 enic->msix[intr].isr = enic_isr_msix_err; 1514 enic->msix[intr].devid = enic; 1515 1516 intr = enic_msix_notify_intr(enic); 1517 snprintf(enic->msix[intr].devname, 1518 sizeof(enic->msix[intr].devname), 1519 "%.11s-notify", netdev->name); 1520 enic->msix[intr].isr = enic_isr_msix_notify; 1521 enic->msix[intr].devid = enic; 1522 1523 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1524 enic->msix[i].requested = 0; 1525 1526 for (i = 0; i < enic->intr_count; i++) { 1527 err = request_irq(enic->msix_entry[i].vector, 1528 enic->msix[i].isr, 0, 1529 enic->msix[i].devname, 1530 enic->msix[i].devid); 1531 if (err) { 1532 enic_free_intr(enic); 1533 break; 1534 } 1535 enic->msix[i].requested = 1; 1536 } 1537 1538 break; 1539 1540 default: 1541 break; 1542 } 1543 1544 return err; 1545 } 1546 1547 static void enic_synchronize_irqs(struct enic *enic) 1548 { 1549 unsigned int i; 1550 1551 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1552 case VNIC_DEV_INTR_MODE_INTX: 1553 case VNIC_DEV_INTR_MODE_MSI: 1554 synchronize_irq(enic->pdev->irq); 1555 break; 1556 case VNIC_DEV_INTR_MODE_MSIX: 1557 for (i = 0; i < enic->intr_count; i++) 1558 synchronize_irq(enic->msix_entry[i].vector); 1559 break; 1560 default: 1561 break; 1562 } 1563 } 1564 1565 static int enic_dev_notify_set(struct enic *enic) 1566 { 1567 int err; 1568 1569 spin_lock(&enic->devcmd_lock); 1570 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1571 case VNIC_DEV_INTR_MODE_INTX: 1572 err = vnic_dev_notify_set(enic->vdev, 1573 enic_legacy_notify_intr()); 1574 break; 1575 case VNIC_DEV_INTR_MODE_MSIX: 1576 err = vnic_dev_notify_set(enic->vdev, 1577 enic_msix_notify_intr(enic)); 1578 break; 1579 default: 1580 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1581 break; 1582 } 1583 spin_unlock(&enic->devcmd_lock); 1584 1585 return err; 1586 } 1587 1588 static void enic_notify_timer_start(struct enic *enic) 1589 { 1590 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1591 case VNIC_DEV_INTR_MODE_MSI: 1592 mod_timer(&enic->notify_timer, jiffies); 1593 break; 1594 default: 1595 /* Using intr for notification for INTx/MSI-X */ 1596 break; 1597 } 1598 } 1599 1600 /* rtnl lock is held, process context */ 1601 static int enic_open(struct net_device *netdev) 1602 { 1603 struct enic *enic = netdev_priv(netdev); 1604 unsigned int i; 1605 int err; 1606 1607 err = enic_request_intr(enic); 1608 if (err) { 1609 netdev_err(netdev, "Unable to request irq.\n"); 1610 return err; 1611 } 1612 1613 err = enic_dev_notify_set(enic); 1614 if (err) { 1615 netdev_err(netdev, 1616 "Failed to alloc notify buffer, aborting.\n"); 1617 goto err_out_free_intr; 1618 } 1619 1620 for (i = 0; i < enic->rq_count; i++) { 1621 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf); 1622 /* Need at least one buffer on ring to get going */ 1623 if (vnic_rq_desc_used(&enic->rq[i]) == 0) { 1624 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1625 err = -ENOMEM; 1626 goto err_out_notify_unset; 1627 } 1628 } 1629 1630 for (i = 0; i < enic->wq_count; i++) 1631 vnic_wq_enable(&enic->wq[i]); 1632 for (i = 0; i < enic->rq_count; i++) 1633 vnic_rq_enable(&enic->rq[i]); 1634 1635 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1636 enic_dev_add_station_addr(enic); 1637 1638 enic_set_rx_mode(netdev); 1639 1640 netif_wake_queue(netdev); 1641 1642 for (i = 0; i < enic->rq_count; i++) 1643 napi_enable(&enic->napi[i]); 1644 1645 enic_dev_enable(enic); 1646 1647 for (i = 0; i < enic->intr_count; i++) 1648 vnic_intr_unmask(&enic->intr[i]); 1649 1650 enic_notify_timer_start(enic); 1651 1652 return 0; 1653 1654 err_out_notify_unset: 1655 enic_dev_notify_unset(enic); 1656 err_out_free_intr: 1657 enic_free_intr(enic); 1658 1659 return err; 1660 } 1661 1662 /* rtnl lock is held, process context */ 1663 static int enic_stop(struct net_device *netdev) 1664 { 1665 struct enic *enic = netdev_priv(netdev); 1666 unsigned int i; 1667 int err; 1668 1669 for (i = 0; i < enic->intr_count; i++) { 1670 vnic_intr_mask(&enic->intr[i]); 1671 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1672 } 1673 1674 enic_synchronize_irqs(enic); 1675 1676 del_timer_sync(&enic->notify_timer); 1677 1678 enic_dev_disable(enic); 1679 1680 for (i = 0; i < enic->rq_count; i++) 1681 napi_disable(&enic->napi[i]); 1682 1683 netif_carrier_off(netdev); 1684 netif_tx_disable(netdev); 1685 1686 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1687 enic_dev_del_station_addr(enic); 1688 1689 for (i = 0; i < enic->wq_count; i++) { 1690 err = vnic_wq_disable(&enic->wq[i]); 1691 if (err) 1692 return err; 1693 } 1694 for (i = 0; i < enic->rq_count; i++) { 1695 err = vnic_rq_disable(&enic->rq[i]); 1696 if (err) 1697 return err; 1698 } 1699 1700 enic_dev_notify_unset(enic); 1701 enic_free_intr(enic); 1702 1703 for (i = 0; i < enic->wq_count; i++) 1704 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 1705 for (i = 0; i < enic->rq_count; i++) 1706 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1707 for (i = 0; i < enic->cq_count; i++) 1708 vnic_cq_clean(&enic->cq[i]); 1709 for (i = 0; i < enic->intr_count; i++) 1710 vnic_intr_clean(&enic->intr[i]); 1711 1712 return 0; 1713 } 1714 1715 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1716 { 1717 struct enic *enic = netdev_priv(netdev); 1718 int running = netif_running(netdev); 1719 1720 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU) 1721 return -EINVAL; 1722 1723 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1724 return -EOPNOTSUPP; 1725 1726 if (running) 1727 enic_stop(netdev); 1728 1729 netdev->mtu = new_mtu; 1730 1731 if (netdev->mtu > enic->port_mtu) 1732 netdev_warn(netdev, 1733 "interface MTU (%d) set higher than port MTU (%d)\n", 1734 netdev->mtu, enic->port_mtu); 1735 1736 if (running) 1737 enic_open(netdev); 1738 1739 return 0; 1740 } 1741 1742 static void enic_change_mtu_work(struct work_struct *work) 1743 { 1744 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1745 struct net_device *netdev = enic->netdev; 1746 int new_mtu = vnic_dev_mtu(enic->vdev); 1747 int err; 1748 unsigned int i; 1749 1750 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu)); 1751 1752 rtnl_lock(); 1753 1754 /* Stop RQ */ 1755 del_timer_sync(&enic->notify_timer); 1756 1757 for (i = 0; i < enic->rq_count; i++) 1758 napi_disable(&enic->napi[i]); 1759 1760 vnic_intr_mask(&enic->intr[0]); 1761 enic_synchronize_irqs(enic); 1762 err = vnic_rq_disable(&enic->rq[0]); 1763 if (err) { 1764 rtnl_unlock(); 1765 netdev_err(netdev, "Unable to disable RQ.\n"); 1766 return; 1767 } 1768 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf); 1769 vnic_cq_clean(&enic->cq[0]); 1770 vnic_intr_clean(&enic->intr[0]); 1771 1772 /* Fill RQ with new_mtu-sized buffers */ 1773 netdev->mtu = new_mtu; 1774 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1775 /* Need at least one buffer on ring to get going */ 1776 if (vnic_rq_desc_used(&enic->rq[0]) == 0) { 1777 rtnl_unlock(); 1778 netdev_err(netdev, "Unable to alloc receive buffers.\n"); 1779 return; 1780 } 1781 1782 /* Start RQ */ 1783 vnic_rq_enable(&enic->rq[0]); 1784 napi_enable(&enic->napi[0]); 1785 vnic_intr_unmask(&enic->intr[0]); 1786 enic_notify_timer_start(enic); 1787 1788 rtnl_unlock(); 1789 1790 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1791 } 1792 1793 #ifdef CONFIG_NET_POLL_CONTROLLER 1794 static void enic_poll_controller(struct net_device *netdev) 1795 { 1796 struct enic *enic = netdev_priv(netdev); 1797 struct vnic_dev *vdev = enic->vdev; 1798 unsigned int i, intr; 1799 1800 switch (vnic_dev_get_intr_mode(vdev)) { 1801 case VNIC_DEV_INTR_MODE_MSIX: 1802 for (i = 0; i < enic->rq_count; i++) { 1803 intr = enic_msix_rq_intr(enic, i); 1804 enic_isr_msix_rq(enic->msix_entry[intr].vector, 1805 &enic->napi[i]); 1806 } 1807 1808 for (i = 0; i < enic->wq_count; i++) { 1809 intr = enic_msix_wq_intr(enic, i); 1810 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic); 1811 } 1812 1813 break; 1814 case VNIC_DEV_INTR_MODE_MSI: 1815 enic_isr_msi(enic->pdev->irq, enic); 1816 break; 1817 case VNIC_DEV_INTR_MODE_INTX: 1818 enic_isr_legacy(enic->pdev->irq, netdev); 1819 break; 1820 default: 1821 break; 1822 } 1823 } 1824 #endif 1825 1826 static int enic_dev_wait(struct vnic_dev *vdev, 1827 int (*start)(struct vnic_dev *, int), 1828 int (*finished)(struct vnic_dev *, int *), 1829 int arg) 1830 { 1831 unsigned long time; 1832 int done; 1833 int err; 1834 1835 BUG_ON(in_interrupt()); 1836 1837 err = start(vdev, arg); 1838 if (err) 1839 return err; 1840 1841 /* Wait for func to complete...2 seconds max 1842 */ 1843 1844 time = jiffies + (HZ * 2); 1845 do { 1846 1847 err = finished(vdev, &done); 1848 if (err) 1849 return err; 1850 1851 if (done) 1852 return 0; 1853 1854 schedule_timeout_uninterruptible(HZ / 10); 1855 1856 } while (time_after(time, jiffies)); 1857 1858 return -ETIMEDOUT; 1859 } 1860 1861 static int enic_dev_open(struct enic *enic) 1862 { 1863 int err; 1864 1865 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1866 vnic_dev_open_done, 0); 1867 if (err) 1868 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1869 err); 1870 1871 return err; 1872 } 1873 1874 static int enic_dev_hang_reset(struct enic *enic) 1875 { 1876 int err; 1877 1878 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 1879 vnic_dev_hang_reset_done, 0); 1880 if (err) 1881 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 1882 err); 1883 1884 return err; 1885 } 1886 1887 static int enic_set_rsskey(struct enic *enic) 1888 { 1889 dma_addr_t rss_key_buf_pa; 1890 union vnic_rss_key *rss_key_buf_va = NULL; 1891 union vnic_rss_key rss_key = { 1892 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}, 1893 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}, 1894 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}, 1895 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}, 1896 }; 1897 int err; 1898 1899 rss_key_buf_va = pci_alloc_consistent(enic->pdev, 1900 sizeof(union vnic_rss_key), &rss_key_buf_pa); 1901 if (!rss_key_buf_va) 1902 return -ENOMEM; 1903 1904 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key)); 1905 1906 spin_lock(&enic->devcmd_lock); 1907 err = enic_set_rss_key(enic, 1908 rss_key_buf_pa, 1909 sizeof(union vnic_rss_key)); 1910 spin_unlock(&enic->devcmd_lock); 1911 1912 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key), 1913 rss_key_buf_va, rss_key_buf_pa); 1914 1915 return err; 1916 } 1917 1918 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 1919 { 1920 dma_addr_t rss_cpu_buf_pa; 1921 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 1922 unsigned int i; 1923 int err; 1924 1925 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev, 1926 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa); 1927 if (!rss_cpu_buf_va) 1928 return -ENOMEM; 1929 1930 for (i = 0; i < (1 << rss_hash_bits); i++) 1931 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 1932 1933 spin_lock(&enic->devcmd_lock); 1934 err = enic_set_rss_cpu(enic, 1935 rss_cpu_buf_pa, 1936 sizeof(union vnic_rss_cpu)); 1937 spin_unlock(&enic->devcmd_lock); 1938 1939 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu), 1940 rss_cpu_buf_va, rss_cpu_buf_pa); 1941 1942 return err; 1943 } 1944 1945 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 1946 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 1947 { 1948 const u8 tso_ipid_split_en = 0; 1949 const u8 ig_vlan_strip_en = 1; 1950 int err; 1951 1952 /* Enable VLAN tag stripping. 1953 */ 1954 1955 spin_lock(&enic->devcmd_lock); 1956 err = enic_set_nic_cfg(enic, 1957 rss_default_cpu, rss_hash_type, 1958 rss_hash_bits, rss_base_cpu, 1959 rss_enable, tso_ipid_split_en, 1960 ig_vlan_strip_en); 1961 spin_unlock(&enic->devcmd_lock); 1962 1963 return err; 1964 } 1965 1966 static int enic_set_rss_nic_cfg(struct enic *enic) 1967 { 1968 struct device *dev = enic_get_dev(enic); 1969 const u8 rss_default_cpu = 0; 1970 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 1971 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 1972 NIC_CFG_RSS_HASH_TYPE_IPV6 | 1973 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 1974 const u8 rss_hash_bits = 7; 1975 const u8 rss_base_cpu = 0; 1976 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 1977 1978 if (rss_enable) { 1979 if (!enic_set_rsskey(enic)) { 1980 if (enic_set_rsscpu(enic, rss_hash_bits)) { 1981 rss_enable = 0; 1982 dev_warn(dev, "RSS disabled, " 1983 "Failed to set RSS cpu indirection table."); 1984 } 1985 } else { 1986 rss_enable = 0; 1987 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 1988 } 1989 } 1990 1991 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 1992 rss_hash_bits, rss_base_cpu, rss_enable); 1993 } 1994 1995 static void enic_reset(struct work_struct *work) 1996 { 1997 struct enic *enic = container_of(work, struct enic, reset); 1998 1999 if (!netif_running(enic->netdev)) 2000 return; 2001 2002 rtnl_lock(); 2003 2004 enic_dev_hang_notify(enic); 2005 enic_stop(enic->netdev); 2006 enic_dev_hang_reset(enic); 2007 enic_reset_addr_lists(enic); 2008 enic_init_vnic_resources(enic); 2009 enic_set_rss_nic_cfg(enic); 2010 enic_dev_set_ig_vlan_rewrite_mode(enic); 2011 enic_open(enic->netdev); 2012 2013 rtnl_unlock(); 2014 } 2015 2016 static int enic_set_intr_mode(struct enic *enic) 2017 { 2018 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX); 2019 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX); 2020 unsigned int i; 2021 2022 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2023 * on system capabilities. 2024 * 2025 * Try MSI-X first 2026 * 2027 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs 2028 * (the second to last INTR is used for WQ/RQ errors) 2029 * (the last INTR is used for notifications) 2030 */ 2031 2032 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2); 2033 for (i = 0; i < n + m + 2; i++) 2034 enic->msix_entry[i].entry = i; 2035 2036 /* Use multiple RQs if RSS is enabled 2037 */ 2038 2039 if (ENIC_SETTING(enic, RSS) && 2040 enic->config.intr_mode < 1 && 2041 enic->rq_count >= n && 2042 enic->wq_count >= m && 2043 enic->cq_count >= n + m && 2044 enic->intr_count >= n + m + 2) { 2045 2046 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) { 2047 2048 enic->rq_count = n; 2049 enic->wq_count = m; 2050 enic->cq_count = n + m; 2051 enic->intr_count = n + m + 2; 2052 2053 vnic_dev_set_intr_mode(enic->vdev, 2054 VNIC_DEV_INTR_MODE_MSIX); 2055 2056 return 0; 2057 } 2058 } 2059 2060 if (enic->config.intr_mode < 1 && 2061 enic->rq_count >= 1 && 2062 enic->wq_count >= m && 2063 enic->cq_count >= 1 + m && 2064 enic->intr_count >= 1 + m + 2) { 2065 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) { 2066 2067 enic->rq_count = 1; 2068 enic->wq_count = m; 2069 enic->cq_count = 1 + m; 2070 enic->intr_count = 1 + m + 2; 2071 2072 vnic_dev_set_intr_mode(enic->vdev, 2073 VNIC_DEV_INTR_MODE_MSIX); 2074 2075 return 0; 2076 } 2077 } 2078 2079 /* Next try MSI 2080 * 2081 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR 2082 */ 2083 2084 if (enic->config.intr_mode < 2 && 2085 enic->rq_count >= 1 && 2086 enic->wq_count >= 1 && 2087 enic->cq_count >= 2 && 2088 enic->intr_count >= 1 && 2089 !pci_enable_msi(enic->pdev)) { 2090 2091 enic->rq_count = 1; 2092 enic->wq_count = 1; 2093 enic->cq_count = 2; 2094 enic->intr_count = 1; 2095 2096 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2097 2098 return 0; 2099 } 2100 2101 /* Next try INTx 2102 * 2103 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs 2104 * (the first INTR is used for WQ/RQ) 2105 * (the second INTR is used for WQ/RQ errors) 2106 * (the last INTR is used for notifications) 2107 */ 2108 2109 if (enic->config.intr_mode < 3 && 2110 enic->rq_count >= 1 && 2111 enic->wq_count >= 1 && 2112 enic->cq_count >= 2 && 2113 enic->intr_count >= 3) { 2114 2115 enic->rq_count = 1; 2116 enic->wq_count = 1; 2117 enic->cq_count = 2; 2118 enic->intr_count = 3; 2119 2120 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2121 2122 return 0; 2123 } 2124 2125 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2126 2127 return -EINVAL; 2128 } 2129 2130 static void enic_clear_intr_mode(struct enic *enic) 2131 { 2132 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2133 case VNIC_DEV_INTR_MODE_MSIX: 2134 pci_disable_msix(enic->pdev); 2135 break; 2136 case VNIC_DEV_INTR_MODE_MSI: 2137 pci_disable_msi(enic->pdev); 2138 break; 2139 default: 2140 break; 2141 } 2142 2143 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2144 } 2145 2146 static const struct net_device_ops enic_netdev_dynamic_ops = { 2147 .ndo_open = enic_open, 2148 .ndo_stop = enic_stop, 2149 .ndo_start_xmit = enic_hard_start_xmit, 2150 .ndo_get_stats64 = enic_get_stats, 2151 .ndo_validate_addr = eth_validate_addr, 2152 .ndo_set_rx_mode = enic_set_rx_mode, 2153 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2154 .ndo_change_mtu = enic_change_mtu, 2155 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2156 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2157 .ndo_tx_timeout = enic_tx_timeout, 2158 .ndo_set_vf_port = enic_set_vf_port, 2159 .ndo_get_vf_port = enic_get_vf_port, 2160 .ndo_set_vf_mac = enic_set_vf_mac, 2161 #ifdef CONFIG_NET_POLL_CONTROLLER 2162 .ndo_poll_controller = enic_poll_controller, 2163 #endif 2164 }; 2165 2166 static const struct net_device_ops enic_netdev_ops = { 2167 .ndo_open = enic_open, 2168 .ndo_stop = enic_stop, 2169 .ndo_start_xmit = enic_hard_start_xmit, 2170 .ndo_get_stats64 = enic_get_stats, 2171 .ndo_validate_addr = eth_validate_addr, 2172 .ndo_set_mac_address = enic_set_mac_address, 2173 .ndo_set_rx_mode = enic_set_rx_mode, 2174 .ndo_change_mtu = enic_change_mtu, 2175 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2176 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2177 .ndo_tx_timeout = enic_tx_timeout, 2178 .ndo_set_vf_port = enic_set_vf_port, 2179 .ndo_get_vf_port = enic_get_vf_port, 2180 .ndo_set_vf_mac = enic_set_vf_mac, 2181 #ifdef CONFIG_NET_POLL_CONTROLLER 2182 .ndo_poll_controller = enic_poll_controller, 2183 #endif 2184 }; 2185 2186 static void enic_dev_deinit(struct enic *enic) 2187 { 2188 unsigned int i; 2189 2190 for (i = 0; i < enic->rq_count; i++) 2191 netif_napi_del(&enic->napi[i]); 2192 2193 enic_free_vnic_resources(enic); 2194 enic_clear_intr_mode(enic); 2195 } 2196 2197 static int enic_dev_init(struct enic *enic) 2198 { 2199 struct device *dev = enic_get_dev(enic); 2200 struct net_device *netdev = enic->netdev; 2201 unsigned int i; 2202 int err; 2203 2204 /* Get interrupt coalesce timer info */ 2205 err = enic_dev_intr_coal_timer_info(enic); 2206 if (err) { 2207 dev_warn(dev, "Using default conversion factor for " 2208 "interrupt coalesce timer\n"); 2209 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2210 } 2211 2212 /* Get vNIC configuration 2213 */ 2214 2215 err = enic_get_vnic_config(enic); 2216 if (err) { 2217 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2218 return err; 2219 } 2220 2221 /* Get available resource counts 2222 */ 2223 2224 enic_get_res_counts(enic); 2225 2226 /* Set interrupt mode based on resource counts and system 2227 * capabilities 2228 */ 2229 2230 err = enic_set_intr_mode(enic); 2231 if (err) { 2232 dev_err(dev, "Failed to set intr mode based on resource " 2233 "counts and system capabilities, aborting\n"); 2234 return err; 2235 } 2236 2237 /* Allocate and configure vNIC resources 2238 */ 2239 2240 err = enic_alloc_vnic_resources(enic); 2241 if (err) { 2242 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2243 goto err_out_free_vnic_resources; 2244 } 2245 2246 enic_init_vnic_resources(enic); 2247 2248 err = enic_set_rss_nic_cfg(enic); 2249 if (err) { 2250 dev_err(dev, "Failed to config nic, aborting\n"); 2251 goto err_out_free_vnic_resources; 2252 } 2253 2254 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2255 default: 2256 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64); 2257 break; 2258 case VNIC_DEV_INTR_MODE_MSIX: 2259 for (i = 0; i < enic->rq_count; i++) 2260 netif_napi_add(netdev, &enic->napi[i], 2261 enic_poll_msix, 64); 2262 break; 2263 } 2264 2265 return 0; 2266 2267 err_out_free_vnic_resources: 2268 enic_clear_intr_mode(enic); 2269 enic_free_vnic_resources(enic); 2270 2271 return err; 2272 } 2273 2274 static void enic_iounmap(struct enic *enic) 2275 { 2276 unsigned int i; 2277 2278 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2279 if (enic->bar[i].vaddr) 2280 iounmap(enic->bar[i].vaddr); 2281 } 2282 2283 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2284 { 2285 struct device *dev = &pdev->dev; 2286 struct net_device *netdev; 2287 struct enic *enic; 2288 int using_dac = 0; 2289 unsigned int i; 2290 int err; 2291 #ifdef CONFIG_PCI_IOV 2292 int pos = 0; 2293 #endif 2294 int num_pps = 1; 2295 2296 /* Allocate net device structure and initialize. Private 2297 * instance data is initialized to zero. 2298 */ 2299 2300 netdev = alloc_etherdev(sizeof(struct enic)); 2301 if (!netdev) 2302 return -ENOMEM; 2303 2304 pci_set_drvdata(pdev, netdev); 2305 2306 SET_NETDEV_DEV(netdev, &pdev->dev); 2307 2308 enic = netdev_priv(netdev); 2309 enic->netdev = netdev; 2310 enic->pdev = pdev; 2311 2312 /* Setup PCI resources 2313 */ 2314 2315 err = pci_enable_device_mem(pdev); 2316 if (err) { 2317 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2318 goto err_out_free_netdev; 2319 } 2320 2321 err = pci_request_regions(pdev, DRV_NAME); 2322 if (err) { 2323 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2324 goto err_out_disable_device; 2325 } 2326 2327 pci_set_master(pdev); 2328 2329 /* Query PCI controller on system for DMA addressing 2330 * limitation for the device. Try 40-bit first, and 2331 * fail to 32-bit. 2332 */ 2333 2334 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40)); 2335 if (err) { 2336 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2337 if (err) { 2338 dev_err(dev, "No usable DMA configuration, aborting\n"); 2339 goto err_out_release_regions; 2340 } 2341 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2342 if (err) { 2343 dev_err(dev, "Unable to obtain %u-bit DMA " 2344 "for consistent allocations, aborting\n", 32); 2345 goto err_out_release_regions; 2346 } 2347 } else { 2348 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)); 2349 if (err) { 2350 dev_err(dev, "Unable to obtain %u-bit DMA " 2351 "for consistent allocations, aborting\n", 40); 2352 goto err_out_release_regions; 2353 } 2354 using_dac = 1; 2355 } 2356 2357 /* Map vNIC resources from BAR0-5 2358 */ 2359 2360 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2361 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2362 continue; 2363 enic->bar[i].len = pci_resource_len(pdev, i); 2364 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2365 if (!enic->bar[i].vaddr) { 2366 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2367 err = -ENODEV; 2368 goto err_out_iounmap; 2369 } 2370 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2371 } 2372 2373 /* Register vNIC device 2374 */ 2375 2376 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2377 ARRAY_SIZE(enic->bar)); 2378 if (!enic->vdev) { 2379 dev_err(dev, "vNIC registration failed, aborting\n"); 2380 err = -ENODEV; 2381 goto err_out_iounmap; 2382 } 2383 2384 #ifdef CONFIG_PCI_IOV 2385 /* Get number of subvnics */ 2386 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2387 if (pos) { 2388 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2389 &enic->num_vfs); 2390 if (enic->num_vfs) { 2391 err = pci_enable_sriov(pdev, enic->num_vfs); 2392 if (err) { 2393 dev_err(dev, "SRIOV enable failed, aborting." 2394 " pci_enable_sriov() returned %d\n", 2395 err); 2396 goto err_out_vnic_unregister; 2397 } 2398 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2399 num_pps = enic->num_vfs; 2400 } 2401 } 2402 #endif 2403 2404 /* Allocate structure for port profiles */ 2405 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL); 2406 if (!enic->pp) { 2407 err = -ENOMEM; 2408 goto err_out_disable_sriov_pp; 2409 } 2410 2411 /* Issue device open to get device in known state 2412 */ 2413 2414 err = enic_dev_open(enic); 2415 if (err) { 2416 dev_err(dev, "vNIC dev open failed, aborting\n"); 2417 goto err_out_disable_sriov; 2418 } 2419 2420 /* Setup devcmd lock 2421 */ 2422 2423 spin_lock_init(&enic->devcmd_lock); 2424 2425 /* 2426 * Set ingress vlan rewrite mode before vnic initialization 2427 */ 2428 2429 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2430 if (err) { 2431 dev_err(dev, 2432 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2433 goto err_out_dev_close; 2434 } 2435 2436 /* Issue device init to initialize the vnic-to-switch link. 2437 * We'll start with carrier off and wait for link UP 2438 * notification later to turn on carrier. We don't need 2439 * to wait here for the vnic-to-switch link initialization 2440 * to complete; link UP notification is the indication that 2441 * the process is complete. 2442 */ 2443 2444 netif_carrier_off(netdev); 2445 2446 /* Do not call dev_init for a dynamic vnic. 2447 * For a dynamic vnic, init_prov_info will be 2448 * called later by an upper layer. 2449 */ 2450 2451 if (!enic_is_dynamic(enic)) { 2452 err = vnic_dev_init(enic->vdev, 0); 2453 if (err) { 2454 dev_err(dev, "vNIC dev init failed, aborting\n"); 2455 goto err_out_dev_close; 2456 } 2457 } 2458 2459 err = enic_dev_init(enic); 2460 if (err) { 2461 dev_err(dev, "Device initialization failed, aborting\n"); 2462 goto err_out_dev_close; 2463 } 2464 2465 /* Setup notification timer, HW reset task, and wq locks 2466 */ 2467 2468 init_timer(&enic->notify_timer); 2469 enic->notify_timer.function = enic_notify_timer; 2470 enic->notify_timer.data = (unsigned long)enic; 2471 2472 INIT_WORK(&enic->reset, enic_reset); 2473 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2474 2475 for (i = 0; i < enic->wq_count; i++) 2476 spin_lock_init(&enic->wq_lock[i]); 2477 2478 /* Register net device 2479 */ 2480 2481 enic->port_mtu = enic->config.mtu; 2482 (void)enic_change_mtu(netdev, enic->port_mtu); 2483 2484 err = enic_set_mac_addr(netdev, enic->mac_addr); 2485 if (err) { 2486 dev_err(dev, "Invalid MAC address, aborting\n"); 2487 goto err_out_dev_deinit; 2488 } 2489 2490 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2491 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2492 2493 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2494 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2495 else 2496 netdev->netdev_ops = &enic_netdev_ops; 2497 2498 netdev->watchdog_timeo = 2 * HZ; 2499 netdev->ethtool_ops = &enic_ethtool_ops; 2500 2501 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2502 if (ENIC_SETTING(enic, LOOP)) { 2503 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2504 enic->loop_enable = 1; 2505 enic->loop_tag = enic->config.loop_tag; 2506 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2507 } 2508 if (ENIC_SETTING(enic, TXCSUM)) 2509 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2510 if (ENIC_SETTING(enic, TSO)) 2511 netdev->hw_features |= NETIF_F_TSO | 2512 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2513 if (ENIC_SETTING(enic, RXCSUM)) 2514 netdev->hw_features |= NETIF_F_RXCSUM; 2515 2516 netdev->features |= netdev->hw_features; 2517 2518 if (using_dac) 2519 netdev->features |= NETIF_F_HIGHDMA; 2520 2521 netdev->priv_flags |= IFF_UNICAST_FLT; 2522 2523 err = register_netdev(netdev); 2524 if (err) { 2525 dev_err(dev, "Cannot register net device, aborting\n"); 2526 goto err_out_dev_deinit; 2527 } 2528 2529 return 0; 2530 2531 err_out_dev_deinit: 2532 enic_dev_deinit(enic); 2533 err_out_dev_close: 2534 vnic_dev_close(enic->vdev); 2535 err_out_disable_sriov: 2536 kfree(enic->pp); 2537 err_out_disable_sriov_pp: 2538 #ifdef CONFIG_PCI_IOV 2539 if (enic_sriov_enabled(enic)) { 2540 pci_disable_sriov(pdev); 2541 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2542 } 2543 err_out_vnic_unregister: 2544 #endif 2545 vnic_dev_unregister(enic->vdev); 2546 err_out_iounmap: 2547 enic_iounmap(enic); 2548 err_out_release_regions: 2549 pci_release_regions(pdev); 2550 err_out_disable_device: 2551 pci_disable_device(pdev); 2552 err_out_free_netdev: 2553 pci_set_drvdata(pdev, NULL); 2554 free_netdev(netdev); 2555 2556 return err; 2557 } 2558 2559 static void enic_remove(struct pci_dev *pdev) 2560 { 2561 struct net_device *netdev = pci_get_drvdata(pdev); 2562 2563 if (netdev) { 2564 struct enic *enic = netdev_priv(netdev); 2565 2566 cancel_work_sync(&enic->reset); 2567 cancel_work_sync(&enic->change_mtu_work); 2568 unregister_netdev(netdev); 2569 enic_dev_deinit(enic); 2570 vnic_dev_close(enic->vdev); 2571 #ifdef CONFIG_PCI_IOV 2572 if (enic_sriov_enabled(enic)) { 2573 pci_disable_sriov(pdev); 2574 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2575 } 2576 #endif 2577 kfree(enic->pp); 2578 vnic_dev_unregister(enic->vdev); 2579 enic_iounmap(enic); 2580 pci_release_regions(pdev); 2581 pci_disable_device(pdev); 2582 pci_set_drvdata(pdev, NULL); 2583 free_netdev(netdev); 2584 } 2585 } 2586 2587 static struct pci_driver enic_driver = { 2588 .name = DRV_NAME, 2589 .id_table = enic_id_table, 2590 .probe = enic_probe, 2591 .remove = enic_remove, 2592 }; 2593 2594 static int __init enic_init_module(void) 2595 { 2596 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION); 2597 2598 return pci_register_driver(&enic_driver); 2599 } 2600 2601 static void __exit enic_cleanup_module(void) 2602 { 2603 pci_unregister_driver(&enic_driver); 2604 } 2605 2606 module_init(enic_init_module); 2607 module_exit(enic_cleanup_module); 2608