1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/in.h> 35 #include <linux/ip.h> 36 #include <linux/ipv6.h> 37 #include <linux/tcp.h> 38 #include <linux/rtnetlink.h> 39 #include <linux/prefetch.h> 40 #include <net/ip6_checksum.h> 41 #include <linux/ktime.h> 42 #include <linux/numa.h> 43 #ifdef CONFIG_RFS_ACCEL 44 #include <linux/cpu_rmap.h> 45 #endif 46 #ifdef CONFIG_NET_RX_BUSY_POLL 47 #include <net/busy_poll.h> 48 #endif 49 #include <linux/crash_dump.h> 50 51 #include "cq_enet_desc.h" 52 #include "vnic_dev.h" 53 #include "vnic_intr.h" 54 #include "vnic_stats.h" 55 #include "vnic_vic.h" 56 #include "enic_res.h" 57 #include "enic.h" 58 #include "enic_dev.h" 59 #include "enic_pp.h" 60 #include "enic_clsf.h" 61 62 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 63 #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) 64 #define MAX_TSO (1 << 16) 65 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 66 67 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 68 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 69 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 70 71 #define RX_COPYBREAK_DEFAULT 256 72 73 /* Supported devices */ 74 static const struct pci_device_id enic_id_table[] = { 75 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 76 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 77 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 78 { 0, } /* end of table */ 79 }; 80 81 MODULE_DESCRIPTION(DRV_DESCRIPTION); 82 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 83 MODULE_LICENSE("GPL"); 84 MODULE_VERSION(DRV_VERSION); 85 MODULE_DEVICE_TABLE(pci, enic_id_table); 86 87 #define ENIC_LARGE_PKT_THRESHOLD 1000 88 #define ENIC_MAX_COALESCE_TIMERS 10 89 /* Interrupt moderation table, which will be used to decide the 90 * coalescing timer values 91 * {rx_rate in Mbps, mapping percentage of the range} 92 */ 93 static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 94 {4000, 0}, 95 {4400, 10}, 96 {5060, 20}, 97 {5230, 30}, 98 {5540, 40}, 99 {5820, 50}, 100 {6120, 60}, 101 {6435, 70}, 102 {6745, 80}, 103 {7000, 90}, 104 {0xFFFFFFFF, 100} 105 }; 106 107 /* This table helps the driver to pick different ranges for rx coalescing 108 * timer depending on the link speed. 109 */ 110 static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 111 {0, 0}, /* 0 - 4 Gbps */ 112 {0, 3}, /* 4 - 10 Gbps */ 113 {3, 6}, /* 10 - 40 Gbps */ 114 }; 115 116 static void enic_init_affinity_hint(struct enic *enic) 117 { 118 int numa_node = dev_to_node(&enic->pdev->dev); 119 int i; 120 121 for (i = 0; i < enic->intr_count; i++) { 122 if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) || 123 (enic->msix[i].affinity_mask && 124 !cpumask_empty(enic->msix[i].affinity_mask))) 125 continue; 126 if (zalloc_cpumask_var(&enic->msix[i].affinity_mask, 127 GFP_KERNEL)) 128 cpumask_set_cpu(cpumask_local_spread(i, numa_node), 129 enic->msix[i].affinity_mask); 130 } 131 } 132 133 static void enic_free_affinity_hint(struct enic *enic) 134 { 135 int i; 136 137 for (i = 0; i < enic->intr_count; i++) { 138 if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i)) 139 continue; 140 free_cpumask_var(enic->msix[i].affinity_mask); 141 } 142 } 143 144 static void enic_set_affinity_hint(struct enic *enic) 145 { 146 int i; 147 int err; 148 149 for (i = 0; i < enic->intr_count; i++) { 150 if (enic_is_err_intr(enic, i) || 151 enic_is_notify_intr(enic, i) || 152 !enic->msix[i].affinity_mask || 153 cpumask_empty(enic->msix[i].affinity_mask)) 154 continue; 155 err = irq_set_affinity_hint(enic->msix_entry[i].vector, 156 enic->msix[i].affinity_mask); 157 if (err) 158 netdev_warn(enic->netdev, "irq_set_affinity_hint failed, err %d\n", 159 err); 160 } 161 162 for (i = 0; i < enic->wq_count; i++) { 163 int wq_intr = enic_msix_wq_intr(enic, i); 164 165 if (enic->msix[wq_intr].affinity_mask && 166 !cpumask_empty(enic->msix[wq_intr].affinity_mask)) 167 netif_set_xps_queue(enic->netdev, 168 enic->msix[wq_intr].affinity_mask, 169 i); 170 } 171 } 172 173 static void enic_unset_affinity_hint(struct enic *enic) 174 { 175 int i; 176 177 for (i = 0; i < enic->intr_count; i++) 178 irq_set_affinity_hint(enic->msix_entry[i].vector, NULL); 179 } 180 181 int enic_is_dynamic(struct enic *enic) 182 { 183 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 184 } 185 186 int enic_sriov_enabled(struct enic *enic) 187 { 188 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 189 } 190 191 static int enic_is_sriov_vf(struct enic *enic) 192 { 193 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 194 } 195 196 int enic_is_valid_vf(struct enic *enic, int vf) 197 { 198 #ifdef CONFIG_PCI_IOV 199 return vf >= 0 && vf < enic->num_vfs; 200 #else 201 return 0; 202 #endif 203 } 204 205 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) 206 { 207 struct enic *enic = vnic_dev_priv(wq->vdev); 208 209 if (buf->sop) 210 pci_unmap_single(enic->pdev, buf->dma_addr, 211 buf->len, PCI_DMA_TODEVICE); 212 else 213 pci_unmap_page(enic->pdev, buf->dma_addr, 214 buf->len, PCI_DMA_TODEVICE); 215 216 if (buf->os_buf) 217 dev_kfree_skb_any(buf->os_buf); 218 } 219 220 static void enic_wq_free_buf(struct vnic_wq *wq, 221 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) 222 { 223 enic_free_wq_buf(wq, buf); 224 } 225 226 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 227 u8 type, u16 q_number, u16 completed_index, void *opaque) 228 { 229 struct enic *enic = vnic_dev_priv(vdev); 230 231 spin_lock(&enic->wq_lock[q_number]); 232 233 vnic_wq_service(&enic->wq[q_number], cq_desc, 234 completed_index, enic_wq_free_buf, 235 opaque); 236 237 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && 238 vnic_wq_desc_avail(&enic->wq[q_number]) >= 239 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) 240 netif_wake_subqueue(enic->netdev, q_number); 241 242 spin_unlock(&enic->wq_lock[q_number]); 243 244 return 0; 245 } 246 247 static bool enic_log_q_error(struct enic *enic) 248 { 249 unsigned int i; 250 u32 error_status; 251 bool err = false; 252 253 for (i = 0; i < enic->wq_count; i++) { 254 error_status = vnic_wq_error_status(&enic->wq[i]); 255 err |= error_status; 256 if (error_status) 257 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 258 i, error_status); 259 } 260 261 for (i = 0; i < enic->rq_count; i++) { 262 error_status = vnic_rq_error_status(&enic->rq[i]); 263 err |= error_status; 264 if (error_status) 265 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 266 i, error_status); 267 } 268 269 return err; 270 } 271 272 static void enic_msglvl_check(struct enic *enic) 273 { 274 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 275 276 if (msg_enable != enic->msg_enable) { 277 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 278 enic->msg_enable, msg_enable); 279 enic->msg_enable = msg_enable; 280 } 281 } 282 283 static void enic_mtu_check(struct enic *enic) 284 { 285 u32 mtu = vnic_dev_mtu(enic->vdev); 286 struct net_device *netdev = enic->netdev; 287 288 if (mtu && mtu != enic->port_mtu) { 289 enic->port_mtu = mtu; 290 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 291 mtu = max_t(int, ENIC_MIN_MTU, 292 min_t(int, ENIC_MAX_MTU, mtu)); 293 if (mtu != netdev->mtu) 294 schedule_work(&enic->change_mtu_work); 295 } else { 296 if (mtu < netdev->mtu) 297 netdev_warn(netdev, 298 "interface MTU (%d) set higher " 299 "than switch port MTU (%d)\n", 300 netdev->mtu, mtu); 301 } 302 } 303 } 304 305 static void enic_link_check(struct enic *enic) 306 { 307 int link_status = vnic_dev_link_status(enic->vdev); 308 int carrier_ok = netif_carrier_ok(enic->netdev); 309 310 if (link_status && !carrier_ok) { 311 netdev_info(enic->netdev, "Link UP\n"); 312 netif_carrier_on(enic->netdev); 313 } else if (!link_status && carrier_ok) { 314 netdev_info(enic->netdev, "Link DOWN\n"); 315 netif_carrier_off(enic->netdev); 316 } 317 } 318 319 static void enic_notify_check(struct enic *enic) 320 { 321 enic_msglvl_check(enic); 322 enic_mtu_check(enic); 323 enic_link_check(enic); 324 } 325 326 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 327 328 static irqreturn_t enic_isr_legacy(int irq, void *data) 329 { 330 struct net_device *netdev = data; 331 struct enic *enic = netdev_priv(netdev); 332 unsigned int io_intr = enic_legacy_io_intr(); 333 unsigned int err_intr = enic_legacy_err_intr(); 334 unsigned int notify_intr = enic_legacy_notify_intr(); 335 u32 pba; 336 337 vnic_intr_mask(&enic->intr[io_intr]); 338 339 pba = vnic_intr_legacy_pba(enic->legacy_pba); 340 if (!pba) { 341 vnic_intr_unmask(&enic->intr[io_intr]); 342 return IRQ_NONE; /* not our interrupt */ 343 } 344 345 if (ENIC_TEST_INTR(pba, notify_intr)) { 346 enic_notify_check(enic); 347 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 348 } 349 350 if (ENIC_TEST_INTR(pba, err_intr)) { 351 vnic_intr_return_all_credits(&enic->intr[err_intr]); 352 enic_log_q_error(enic); 353 /* schedule recovery from WQ/RQ error */ 354 schedule_work(&enic->reset); 355 return IRQ_HANDLED; 356 } 357 358 if (ENIC_TEST_INTR(pba, io_intr)) 359 napi_schedule_irqoff(&enic->napi[0]); 360 else 361 vnic_intr_unmask(&enic->intr[io_intr]); 362 363 return IRQ_HANDLED; 364 } 365 366 static irqreturn_t enic_isr_msi(int irq, void *data) 367 { 368 struct enic *enic = data; 369 370 /* With MSI, there is no sharing of interrupts, so this is 371 * our interrupt and there is no need to ack it. The device 372 * is not providing per-vector masking, so the OS will not 373 * write to PCI config space to mask/unmask the interrupt. 374 * We're using mask_on_assertion for MSI, so the device 375 * automatically masks the interrupt when the interrupt is 376 * generated. Later, when exiting polling, the interrupt 377 * will be unmasked (see enic_poll). 378 * 379 * Also, the device uses the same PCIe Traffic Class (TC) 380 * for Memory Write data and MSI, so there are no ordering 381 * issues; the MSI will always arrive at the Root Complex 382 * _after_ corresponding Memory Writes (i.e. descriptor 383 * writes). 384 */ 385 386 napi_schedule_irqoff(&enic->napi[0]); 387 388 return IRQ_HANDLED; 389 } 390 391 static irqreturn_t enic_isr_msix(int irq, void *data) 392 { 393 struct napi_struct *napi = data; 394 395 napi_schedule_irqoff(napi); 396 397 return IRQ_HANDLED; 398 } 399 400 static irqreturn_t enic_isr_msix_err(int irq, void *data) 401 { 402 struct enic *enic = data; 403 unsigned int intr = enic_msix_err_intr(enic); 404 405 vnic_intr_return_all_credits(&enic->intr[intr]); 406 407 if (enic_log_q_error(enic)) 408 /* schedule recovery from WQ/RQ error */ 409 schedule_work(&enic->reset); 410 411 return IRQ_HANDLED; 412 } 413 414 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 415 { 416 struct enic *enic = data; 417 unsigned int intr = enic_msix_notify_intr(enic); 418 419 enic_notify_check(enic); 420 vnic_intr_return_all_credits(&enic->intr[intr]); 421 422 return IRQ_HANDLED; 423 } 424 425 static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq, 426 struct sk_buff *skb, unsigned int len_left, 427 int loopback) 428 { 429 const skb_frag_t *frag; 430 dma_addr_t dma_addr; 431 432 /* Queue additional data fragments */ 433 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 434 len_left -= skb_frag_size(frag); 435 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0, 436 skb_frag_size(frag), 437 DMA_TO_DEVICE); 438 if (unlikely(enic_dma_map_check(enic, dma_addr))) 439 return -ENOMEM; 440 enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag), 441 (len_left == 0), /* EOP? */ 442 loopback); 443 } 444 445 return 0; 446 } 447 448 static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq, 449 struct sk_buff *skb, int vlan_tag_insert, 450 unsigned int vlan_tag, int loopback) 451 { 452 unsigned int head_len = skb_headlen(skb); 453 unsigned int len_left = skb->len - head_len; 454 int eop = (len_left == 0); 455 dma_addr_t dma_addr; 456 int err = 0; 457 458 dma_addr = pci_map_single(enic->pdev, skb->data, head_len, 459 PCI_DMA_TODEVICE); 460 if (unlikely(enic_dma_map_check(enic, dma_addr))) 461 return -ENOMEM; 462 463 /* Queue the main skb fragment. The fragments are no larger 464 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 465 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 466 * per fragment is queued. 467 */ 468 enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert, 469 vlan_tag, eop, loopback); 470 471 if (!eop) 472 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 473 474 return err; 475 } 476 477 static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq, 478 struct sk_buff *skb, int vlan_tag_insert, 479 unsigned int vlan_tag, int loopback) 480 { 481 unsigned int head_len = skb_headlen(skb); 482 unsigned int len_left = skb->len - head_len; 483 unsigned int hdr_len = skb_checksum_start_offset(skb); 484 unsigned int csum_offset = hdr_len + skb->csum_offset; 485 int eop = (len_left == 0); 486 dma_addr_t dma_addr; 487 int err = 0; 488 489 dma_addr = pci_map_single(enic->pdev, skb->data, head_len, 490 PCI_DMA_TODEVICE); 491 if (unlikely(enic_dma_map_check(enic, dma_addr))) 492 return -ENOMEM; 493 494 /* Queue the main skb fragment. The fragments are no larger 495 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 496 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 497 * per fragment is queued. 498 */ 499 enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset, 500 hdr_len, vlan_tag_insert, vlan_tag, eop, 501 loopback); 502 503 if (!eop) 504 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 505 506 return err; 507 } 508 509 static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq, 510 struct sk_buff *skb, unsigned int mss, 511 int vlan_tag_insert, unsigned int vlan_tag, 512 int loopback) 513 { 514 unsigned int frag_len_left = skb_headlen(skb); 515 unsigned int len_left = skb->len - frag_len_left; 516 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 517 int eop = (len_left == 0); 518 unsigned int len; 519 dma_addr_t dma_addr; 520 unsigned int offset = 0; 521 skb_frag_t *frag; 522 523 /* Preload TCP csum field with IP pseudo hdr calculated 524 * with IP length set to zero. HW will later add in length 525 * to each TCP segment resulting from the TSO. 526 */ 527 528 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 529 ip_hdr(skb)->check = 0; 530 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 531 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 532 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 533 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 534 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 535 } 536 537 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 538 * for the main skb fragment 539 */ 540 while (frag_len_left) { 541 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 542 dma_addr = pci_map_single(enic->pdev, skb->data + offset, len, 543 PCI_DMA_TODEVICE); 544 if (unlikely(enic_dma_map_check(enic, dma_addr))) 545 return -ENOMEM; 546 enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len, 547 vlan_tag_insert, vlan_tag, 548 eop && (len == frag_len_left), loopback); 549 frag_len_left -= len; 550 offset += len; 551 } 552 553 if (eop) 554 return 0; 555 556 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 557 * for additional data fragments 558 */ 559 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 560 len_left -= skb_frag_size(frag); 561 frag_len_left = skb_frag_size(frag); 562 offset = 0; 563 564 while (frag_len_left) { 565 len = min(frag_len_left, 566 (unsigned int)WQ_ENET_MAX_DESC_LEN); 567 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 568 offset, len, 569 DMA_TO_DEVICE); 570 if (unlikely(enic_dma_map_check(enic, dma_addr))) 571 return -ENOMEM; 572 enic_queue_wq_desc_cont(wq, skb, dma_addr, len, 573 (len_left == 0) && 574 (len == frag_len_left),/*EOP*/ 575 loopback); 576 frag_len_left -= len; 577 offset += len; 578 } 579 } 580 581 return 0; 582 } 583 584 static inline void enic_queue_wq_skb(struct enic *enic, 585 struct vnic_wq *wq, struct sk_buff *skb) 586 { 587 unsigned int mss = skb_shinfo(skb)->gso_size; 588 unsigned int vlan_tag = 0; 589 int vlan_tag_insert = 0; 590 int loopback = 0; 591 int err; 592 593 if (skb_vlan_tag_present(skb)) { 594 /* VLAN tag from trunking driver */ 595 vlan_tag_insert = 1; 596 vlan_tag = skb_vlan_tag_get(skb); 597 } else if (enic->loop_enable) { 598 vlan_tag = enic->loop_tag; 599 loopback = 1; 600 } 601 602 if (mss) 603 err = enic_queue_wq_skb_tso(enic, wq, skb, mss, 604 vlan_tag_insert, vlan_tag, 605 loopback); 606 else if (skb->ip_summed == CHECKSUM_PARTIAL) 607 err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert, 608 vlan_tag, loopback); 609 else 610 err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert, 611 vlan_tag, loopback); 612 if (unlikely(err)) { 613 struct vnic_wq_buf *buf; 614 615 buf = wq->to_use->prev; 616 /* while not EOP of previous pkt && queue not empty. 617 * For all non EOP bufs, os_buf is NULL. 618 */ 619 while (!buf->os_buf && (buf->next != wq->to_clean)) { 620 enic_free_wq_buf(wq, buf); 621 wq->ring.desc_avail++; 622 buf = buf->prev; 623 } 624 wq->to_use = buf->next; 625 dev_kfree_skb(skb); 626 } 627 } 628 629 /* netif_tx_lock held, process context with BHs disabled, or BH */ 630 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 631 struct net_device *netdev) 632 { 633 struct enic *enic = netdev_priv(netdev); 634 struct vnic_wq *wq; 635 unsigned int txq_map; 636 struct netdev_queue *txq; 637 638 if (skb->len <= 0) { 639 dev_kfree_skb_any(skb); 640 return NETDEV_TX_OK; 641 } 642 643 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 644 wq = &enic->wq[txq_map]; 645 txq = netdev_get_tx_queue(netdev, txq_map); 646 647 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 648 * which is very likely. In the off chance it's going to take 649 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 650 */ 651 652 if (skb_shinfo(skb)->gso_size == 0 && 653 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 654 skb_linearize(skb)) { 655 dev_kfree_skb_any(skb); 656 return NETDEV_TX_OK; 657 } 658 659 spin_lock(&enic->wq_lock[txq_map]); 660 661 if (vnic_wq_desc_avail(wq) < 662 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 663 netif_tx_stop_queue(txq); 664 /* This is a hard error, log it */ 665 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 666 spin_unlock(&enic->wq_lock[txq_map]); 667 return NETDEV_TX_BUSY; 668 } 669 670 enic_queue_wq_skb(enic, wq, skb); 671 672 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) 673 netif_tx_stop_queue(txq); 674 if (!skb->xmit_more || netif_xmit_stopped(txq)) 675 vnic_wq_doorbell(wq); 676 677 spin_unlock(&enic->wq_lock[txq_map]); 678 679 return NETDEV_TX_OK; 680 } 681 682 /* dev_base_lock rwlock held, nominally process context */ 683 static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev, 684 struct rtnl_link_stats64 *net_stats) 685 { 686 struct enic *enic = netdev_priv(netdev); 687 struct vnic_stats *stats; 688 int err; 689 690 err = enic_dev_stats_dump(enic, &stats); 691 /* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump 692 * For other failures, like devcmd failure, we return previously 693 * recorded stats. 694 */ 695 if (err == -ENOMEM) 696 return net_stats; 697 698 net_stats->tx_packets = stats->tx.tx_frames_ok; 699 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 700 net_stats->tx_errors = stats->tx.tx_errors; 701 net_stats->tx_dropped = stats->tx.tx_drops; 702 703 net_stats->rx_packets = stats->rx.rx_frames_ok; 704 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 705 net_stats->rx_errors = stats->rx.rx_errors; 706 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 707 net_stats->rx_over_errors = enic->rq_truncated_pkts; 708 net_stats->rx_crc_errors = enic->rq_bad_fcs; 709 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 710 711 return net_stats; 712 } 713 714 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 715 { 716 struct enic *enic = netdev_priv(netdev); 717 718 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 719 unsigned int mc_count = netdev_mc_count(netdev); 720 721 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 722 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 723 724 return -ENOSPC; 725 } 726 727 enic_dev_add_addr(enic, mc_addr); 728 enic->mc_count++; 729 730 return 0; 731 } 732 733 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 734 { 735 struct enic *enic = netdev_priv(netdev); 736 737 enic_dev_del_addr(enic, mc_addr); 738 enic->mc_count--; 739 740 return 0; 741 } 742 743 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 744 { 745 struct enic *enic = netdev_priv(netdev); 746 747 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 748 unsigned int uc_count = netdev_uc_count(netdev); 749 750 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 751 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 752 753 return -ENOSPC; 754 } 755 756 enic_dev_add_addr(enic, uc_addr); 757 enic->uc_count++; 758 759 return 0; 760 } 761 762 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 763 { 764 struct enic *enic = netdev_priv(netdev); 765 766 enic_dev_del_addr(enic, uc_addr); 767 enic->uc_count--; 768 769 return 0; 770 } 771 772 void enic_reset_addr_lists(struct enic *enic) 773 { 774 struct net_device *netdev = enic->netdev; 775 776 __dev_uc_unsync(netdev, NULL); 777 __dev_mc_unsync(netdev, NULL); 778 779 enic->mc_count = 0; 780 enic->uc_count = 0; 781 enic->flags = 0; 782 } 783 784 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 785 { 786 struct enic *enic = netdev_priv(netdev); 787 788 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 789 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 790 return -EADDRNOTAVAIL; 791 } else { 792 if (!is_valid_ether_addr(addr)) 793 return -EADDRNOTAVAIL; 794 } 795 796 memcpy(netdev->dev_addr, addr, netdev->addr_len); 797 798 return 0; 799 } 800 801 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 802 { 803 struct enic *enic = netdev_priv(netdev); 804 struct sockaddr *saddr = p; 805 char *addr = saddr->sa_data; 806 int err; 807 808 if (netif_running(enic->netdev)) { 809 err = enic_dev_del_station_addr(enic); 810 if (err) 811 return err; 812 } 813 814 err = enic_set_mac_addr(netdev, addr); 815 if (err) 816 return err; 817 818 if (netif_running(enic->netdev)) { 819 err = enic_dev_add_station_addr(enic); 820 if (err) 821 return err; 822 } 823 824 return err; 825 } 826 827 static int enic_set_mac_address(struct net_device *netdev, void *p) 828 { 829 struct sockaddr *saddr = p; 830 char *addr = saddr->sa_data; 831 struct enic *enic = netdev_priv(netdev); 832 int err; 833 834 err = enic_dev_del_station_addr(enic); 835 if (err) 836 return err; 837 838 err = enic_set_mac_addr(netdev, addr); 839 if (err) 840 return err; 841 842 return enic_dev_add_station_addr(enic); 843 } 844 845 /* netif_tx_lock held, BHs disabled */ 846 static void enic_set_rx_mode(struct net_device *netdev) 847 { 848 struct enic *enic = netdev_priv(netdev); 849 int directed = 1; 850 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 851 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 852 int promisc = (netdev->flags & IFF_PROMISC) || 853 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 854 int allmulti = (netdev->flags & IFF_ALLMULTI) || 855 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 856 unsigned int flags = netdev->flags | 857 (allmulti ? IFF_ALLMULTI : 0) | 858 (promisc ? IFF_PROMISC : 0); 859 860 if (enic->flags != flags) { 861 enic->flags = flags; 862 enic_dev_packet_filter(enic, directed, 863 multicast, broadcast, promisc, allmulti); 864 } 865 866 if (!promisc) { 867 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 868 if (!allmulti) 869 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 870 } 871 } 872 873 /* netif_tx_lock held, BHs disabled */ 874 static void enic_tx_timeout(struct net_device *netdev) 875 { 876 struct enic *enic = netdev_priv(netdev); 877 schedule_work(&enic->tx_hang_reset); 878 } 879 880 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 881 { 882 struct enic *enic = netdev_priv(netdev); 883 struct enic_port_profile *pp; 884 int err; 885 886 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 887 if (err) 888 return err; 889 890 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 891 if (vf == PORT_SELF_VF) { 892 memcpy(pp->vf_mac, mac, ETH_ALEN); 893 return 0; 894 } else { 895 /* 896 * For sriov vf's set the mac in hw 897 */ 898 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 899 vnic_dev_set_mac_addr, mac); 900 return enic_dev_status_to_errno(err); 901 } 902 } else 903 return -EINVAL; 904 } 905 906 static int enic_set_vf_port(struct net_device *netdev, int vf, 907 struct nlattr *port[]) 908 { 909 struct enic *enic = netdev_priv(netdev); 910 struct enic_port_profile prev_pp; 911 struct enic_port_profile *pp; 912 int err = 0, restore_pp = 1; 913 914 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 915 if (err) 916 return err; 917 918 if (!port[IFLA_PORT_REQUEST]) 919 return -EOPNOTSUPP; 920 921 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 922 memset(pp, 0, sizeof(*enic->pp)); 923 924 pp->set |= ENIC_SET_REQUEST; 925 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 926 927 if (port[IFLA_PORT_PROFILE]) { 928 pp->set |= ENIC_SET_NAME; 929 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 930 PORT_PROFILE_MAX); 931 } 932 933 if (port[IFLA_PORT_INSTANCE_UUID]) { 934 pp->set |= ENIC_SET_INSTANCE; 935 memcpy(pp->instance_uuid, 936 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 937 } 938 939 if (port[IFLA_PORT_HOST_UUID]) { 940 pp->set |= ENIC_SET_HOST; 941 memcpy(pp->host_uuid, 942 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 943 } 944 945 if (vf == PORT_SELF_VF) { 946 /* Special case handling: mac came from IFLA_VF_MAC */ 947 if (!is_zero_ether_addr(prev_pp.vf_mac)) 948 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 949 950 if (is_zero_ether_addr(netdev->dev_addr)) 951 eth_hw_addr_random(netdev); 952 } else { 953 /* SR-IOV VF: get mac from adapter */ 954 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 955 vnic_dev_get_mac_addr, pp->mac_addr); 956 if (err) { 957 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 958 memcpy(pp, &prev_pp, sizeof(*pp)); 959 return enic_dev_status_to_errno(err); 960 } 961 } 962 963 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 964 if (err) { 965 if (restore_pp) { 966 /* Things are still the way they were: Implicit 967 * DISASSOCIATE failed 968 */ 969 memcpy(pp, &prev_pp, sizeof(*pp)); 970 } else { 971 memset(pp, 0, sizeof(*pp)); 972 if (vf == PORT_SELF_VF) 973 eth_zero_addr(netdev->dev_addr); 974 } 975 } else { 976 /* Set flag to indicate that the port assoc/disassoc 977 * request has been sent out to fw 978 */ 979 pp->set |= ENIC_PORT_REQUEST_APPLIED; 980 981 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 982 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 983 eth_zero_addr(pp->mac_addr); 984 if (vf == PORT_SELF_VF) 985 eth_zero_addr(netdev->dev_addr); 986 } 987 } 988 989 if (vf == PORT_SELF_VF) 990 eth_zero_addr(pp->vf_mac); 991 992 return err; 993 } 994 995 static int enic_get_vf_port(struct net_device *netdev, int vf, 996 struct sk_buff *skb) 997 { 998 struct enic *enic = netdev_priv(netdev); 999 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 1000 struct enic_port_profile *pp; 1001 int err; 1002 1003 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1004 if (err) 1005 return err; 1006 1007 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 1008 return -ENODATA; 1009 1010 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 1011 if (err) 1012 return err; 1013 1014 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 1015 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 1016 ((pp->set & ENIC_SET_NAME) && 1017 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 1018 ((pp->set & ENIC_SET_INSTANCE) && 1019 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 1020 pp->instance_uuid)) || 1021 ((pp->set & ENIC_SET_HOST) && 1022 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 1023 goto nla_put_failure; 1024 return 0; 1025 1026 nla_put_failure: 1027 return -EMSGSIZE; 1028 } 1029 1030 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf) 1031 { 1032 struct enic *enic = vnic_dev_priv(rq->vdev); 1033 1034 if (!buf->os_buf) 1035 return; 1036 1037 pci_unmap_single(enic->pdev, buf->dma_addr, 1038 buf->len, PCI_DMA_FROMDEVICE); 1039 dev_kfree_skb_any(buf->os_buf); 1040 buf->os_buf = NULL; 1041 } 1042 1043 static int enic_rq_alloc_buf(struct vnic_rq *rq) 1044 { 1045 struct enic *enic = vnic_dev_priv(rq->vdev); 1046 struct net_device *netdev = enic->netdev; 1047 struct sk_buff *skb; 1048 unsigned int len = netdev->mtu + VLAN_ETH_HLEN; 1049 unsigned int os_buf_index = 0; 1050 dma_addr_t dma_addr; 1051 struct vnic_rq_buf *buf = rq->to_use; 1052 1053 if (buf->os_buf) { 1054 enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr, 1055 buf->len); 1056 1057 return 0; 1058 } 1059 skb = netdev_alloc_skb_ip_align(netdev, len); 1060 if (!skb) 1061 return -ENOMEM; 1062 1063 dma_addr = pci_map_single(enic->pdev, skb->data, len, 1064 PCI_DMA_FROMDEVICE); 1065 if (unlikely(enic_dma_map_check(enic, dma_addr))) { 1066 dev_kfree_skb(skb); 1067 return -ENOMEM; 1068 } 1069 1070 enic_queue_rq_desc(rq, skb, os_buf_index, 1071 dma_addr, len); 1072 1073 return 0; 1074 } 1075 1076 static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size, 1077 u32 pkt_len) 1078 { 1079 if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len) 1080 pkt_size->large_pkt_bytes_cnt += pkt_len; 1081 else 1082 pkt_size->small_pkt_bytes_cnt += pkt_len; 1083 } 1084 1085 static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb, 1086 struct vnic_rq_buf *buf, u16 len) 1087 { 1088 struct enic *enic = netdev_priv(netdev); 1089 struct sk_buff *new_skb; 1090 1091 if (len > enic->rx_copybreak) 1092 return false; 1093 new_skb = netdev_alloc_skb_ip_align(netdev, len); 1094 if (!new_skb) 1095 return false; 1096 pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len, 1097 DMA_FROM_DEVICE); 1098 memcpy(new_skb->data, (*skb)->data, len); 1099 *skb = new_skb; 1100 1101 return true; 1102 } 1103 1104 static void enic_rq_indicate_buf(struct vnic_rq *rq, 1105 struct cq_desc *cq_desc, struct vnic_rq_buf *buf, 1106 int skipped, void *opaque) 1107 { 1108 struct enic *enic = vnic_dev_priv(rq->vdev); 1109 struct net_device *netdev = enic->netdev; 1110 struct sk_buff *skb; 1111 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1112 1113 u8 type, color, eop, sop, ingress_port, vlan_stripped; 1114 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; 1115 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; 1116 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; 1117 u8 packet_error; 1118 u16 q_number, completed_index, bytes_written, vlan_tci, checksum; 1119 u32 rss_hash; 1120 1121 if (skipped) 1122 return; 1123 1124 skb = buf->os_buf; 1125 1126 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, 1127 &type, &color, &q_number, &completed_index, 1128 &ingress_port, &fcoe, &eop, &sop, &rss_type, 1129 &csum_not_calc, &rss_hash, &bytes_written, 1130 &packet_error, &vlan_stripped, &vlan_tci, &checksum, 1131 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error, 1132 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp, 1133 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, 1134 &fcs_ok); 1135 1136 if (packet_error) { 1137 1138 if (!fcs_ok) { 1139 if (bytes_written > 0) 1140 enic->rq_bad_fcs++; 1141 else if (bytes_written == 0) 1142 enic->rq_truncated_pkts++; 1143 } 1144 1145 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1146 PCI_DMA_FROMDEVICE); 1147 dev_kfree_skb_any(skb); 1148 buf->os_buf = NULL; 1149 1150 return; 1151 } 1152 1153 if (eop && bytes_written > 0) { 1154 1155 /* Good receive 1156 */ 1157 1158 if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) { 1159 buf->os_buf = NULL; 1160 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1161 PCI_DMA_FROMDEVICE); 1162 } 1163 prefetch(skb->data - NET_IP_ALIGN); 1164 1165 skb_put(skb, bytes_written); 1166 skb->protocol = eth_type_trans(skb, netdev); 1167 skb_record_rx_queue(skb, q_number); 1168 if (netdev->features & NETIF_F_RXHASH) { 1169 switch (rss_type) { 1170 case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4: 1171 case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6: 1172 case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX: 1173 skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4); 1174 break; 1175 case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4: 1176 case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6: 1177 case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX: 1178 skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3); 1179 break; 1180 } 1181 } 1182 1183 /* Hardware does not provide whole packet checksum. It only 1184 * provides pseudo checksum. Since hw validates the packet 1185 * checksum but not provide us the checksum value. use 1186 * CHECSUM_UNNECESSARY. 1187 */ 1188 if ((netdev->features & NETIF_F_RXCSUM) && tcp_udp_csum_ok && 1189 ipv4_csum_ok) 1190 skb->ip_summed = CHECKSUM_UNNECESSARY; 1191 1192 if (vlan_stripped) 1193 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci); 1194 1195 skb_mark_napi_id(skb, &enic->napi[rq->index]); 1196 if (enic_poll_busy_polling(rq) || 1197 !(netdev->features & NETIF_F_GRO)) 1198 netif_receive_skb(skb); 1199 else 1200 napi_gro_receive(&enic->napi[q_number], skb); 1201 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1202 enic_intr_update_pkt_size(&cq->pkt_size_counter, 1203 bytes_written); 1204 } else { 1205 1206 /* Buffer overflow 1207 */ 1208 1209 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1210 PCI_DMA_FROMDEVICE); 1211 dev_kfree_skb_any(skb); 1212 buf->os_buf = NULL; 1213 } 1214 } 1215 1216 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 1217 u8 type, u16 q_number, u16 completed_index, void *opaque) 1218 { 1219 struct enic *enic = vnic_dev_priv(vdev); 1220 1221 vnic_rq_service(&enic->rq[q_number], cq_desc, 1222 completed_index, VNIC_RQ_RETURN_DESC, 1223 enic_rq_indicate_buf, opaque); 1224 1225 return 0; 1226 } 1227 1228 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1229 { 1230 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1231 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1232 u32 timer = cq->tobe_rx_coal_timeval; 1233 1234 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1235 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1236 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1237 } 1238 } 1239 1240 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1241 { 1242 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1243 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1244 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1245 int index; 1246 u32 timer; 1247 u32 range_start; 1248 u32 traffic; 1249 u64 delta; 1250 ktime_t now = ktime_get(); 1251 1252 delta = ktime_us_delta(now, cq->prev_ts); 1253 if (delta < ENIC_AIC_TS_BREAK) 1254 return; 1255 cq->prev_ts = now; 1256 1257 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1258 pkt_size_counter->small_pkt_bytes_cnt; 1259 /* The table takes Mbps 1260 * traffic *= 8 => bits 1261 * traffic *= (10^6 / delta) => bps 1262 * traffic /= 10^6 => Mbps 1263 * 1264 * Combining, traffic *= (8 / delta) 1265 */ 1266 1267 traffic <<= 3; 1268 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1269 1270 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1271 if (traffic < mod_table[index].rx_rate) 1272 break; 1273 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1274 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1275 rx_coal->small_pkt_range_start : 1276 rx_coal->large_pkt_range_start; 1277 timer = range_start + ((rx_coal->range_end - range_start) * 1278 mod_table[index].range_percent / 100); 1279 /* Damping */ 1280 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1281 1282 pkt_size_counter->large_pkt_bytes_cnt = 0; 1283 pkt_size_counter->small_pkt_bytes_cnt = 0; 1284 } 1285 1286 static int enic_poll(struct napi_struct *napi, int budget) 1287 { 1288 struct net_device *netdev = napi->dev; 1289 struct enic *enic = netdev_priv(netdev); 1290 unsigned int cq_rq = enic_cq_rq(enic, 0); 1291 unsigned int cq_wq = enic_cq_wq(enic, 0); 1292 unsigned int intr = enic_legacy_io_intr(); 1293 unsigned int rq_work_to_do = budget; 1294 unsigned int wq_work_to_do = -1; /* no limit */ 1295 unsigned int work_done, rq_work_done = 0, wq_work_done; 1296 int err; 1297 1298 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do, 1299 enic_wq_service, NULL); 1300 1301 if (!enic_poll_lock_napi(&enic->rq[cq_rq])) { 1302 if (wq_work_done > 0) 1303 vnic_intr_return_credits(&enic->intr[intr], 1304 wq_work_done, 1305 0 /* dont unmask intr */, 1306 0 /* dont reset intr timer */); 1307 return budget; 1308 } 1309 1310 if (budget > 0) 1311 rq_work_done = vnic_cq_service(&enic->cq[cq_rq], 1312 rq_work_to_do, enic_rq_service, NULL); 1313 1314 /* Accumulate intr event credits for this polling 1315 * cycle. An intr event is the completion of a 1316 * a WQ or RQ packet. 1317 */ 1318 1319 work_done = rq_work_done + wq_work_done; 1320 1321 if (work_done > 0) 1322 vnic_intr_return_credits(&enic->intr[intr], 1323 work_done, 1324 0 /* don't unmask intr */, 1325 0 /* don't reset intr timer */); 1326 1327 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1328 enic_poll_unlock_napi(&enic->rq[cq_rq], napi); 1329 1330 /* Buffer allocation failed. Stay in polling 1331 * mode so we can try to fill the ring again. 1332 */ 1333 1334 if (err) 1335 rq_work_done = rq_work_to_do; 1336 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1337 /* Call the function which refreshes the intr coalescing timer 1338 * value based on the traffic. 1339 */ 1340 enic_calc_int_moderation(enic, &enic->rq[0]); 1341 1342 if (rq_work_done < rq_work_to_do) { 1343 1344 /* Some work done, but not enough to stay in polling, 1345 * exit polling 1346 */ 1347 1348 napi_complete(napi); 1349 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1350 enic_set_int_moderation(enic, &enic->rq[0]); 1351 vnic_intr_unmask(&enic->intr[intr]); 1352 } 1353 1354 return rq_work_done; 1355 } 1356 1357 #ifdef CONFIG_RFS_ACCEL 1358 static void enic_free_rx_cpu_rmap(struct enic *enic) 1359 { 1360 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap); 1361 enic->netdev->rx_cpu_rmap = NULL; 1362 } 1363 1364 static void enic_set_rx_cpu_rmap(struct enic *enic) 1365 { 1366 int i, res; 1367 1368 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) { 1369 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count); 1370 if (unlikely(!enic->netdev->rx_cpu_rmap)) 1371 return; 1372 for (i = 0; i < enic->rq_count; i++) { 1373 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap, 1374 enic->msix_entry[i].vector); 1375 if (unlikely(res)) { 1376 enic_free_rx_cpu_rmap(enic); 1377 return; 1378 } 1379 } 1380 } 1381 } 1382 1383 #else 1384 1385 static void enic_free_rx_cpu_rmap(struct enic *enic) 1386 { 1387 } 1388 1389 static void enic_set_rx_cpu_rmap(struct enic *enic) 1390 { 1391 } 1392 1393 #endif /* CONFIG_RFS_ACCEL */ 1394 1395 #ifdef CONFIG_NET_RX_BUSY_POLL 1396 static int enic_busy_poll(struct napi_struct *napi) 1397 { 1398 struct net_device *netdev = napi->dev; 1399 struct enic *enic = netdev_priv(netdev); 1400 unsigned int rq = (napi - &enic->napi[0]); 1401 unsigned int cq = enic_cq_rq(enic, rq); 1402 unsigned int intr = enic_msix_rq_intr(enic, rq); 1403 unsigned int work_to_do = -1; /* clean all pkts possible */ 1404 unsigned int work_done; 1405 1406 if (!enic_poll_lock_poll(&enic->rq[rq])) 1407 return LL_FLUSH_BUSY; 1408 work_done = vnic_cq_service(&enic->cq[cq], work_to_do, 1409 enic_rq_service, NULL); 1410 1411 if (work_done > 0) 1412 vnic_intr_return_credits(&enic->intr[intr], 1413 work_done, 0, 0); 1414 vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1415 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1416 enic_calc_int_moderation(enic, &enic->rq[rq]); 1417 enic_poll_unlock_poll(&enic->rq[rq]); 1418 1419 return work_done; 1420 } 1421 #endif /* CONFIG_NET_RX_BUSY_POLL */ 1422 1423 static int enic_poll_msix_wq(struct napi_struct *napi, int budget) 1424 { 1425 struct net_device *netdev = napi->dev; 1426 struct enic *enic = netdev_priv(netdev); 1427 unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count; 1428 struct vnic_wq *wq = &enic->wq[wq_index]; 1429 unsigned int cq; 1430 unsigned int intr; 1431 unsigned int wq_work_to_do = -1; /* clean all desc possible */ 1432 unsigned int wq_work_done; 1433 unsigned int wq_irq; 1434 1435 wq_irq = wq->index; 1436 cq = enic_cq_wq(enic, wq_irq); 1437 intr = enic_msix_wq_intr(enic, wq_irq); 1438 wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do, 1439 enic_wq_service, NULL); 1440 1441 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 1442 0 /* don't unmask intr */, 1443 1 /* reset intr timer */); 1444 if (!wq_work_done) { 1445 napi_complete(napi); 1446 vnic_intr_unmask(&enic->intr[intr]); 1447 return 0; 1448 } 1449 1450 return budget; 1451 } 1452 1453 static int enic_poll_msix_rq(struct napi_struct *napi, int budget) 1454 { 1455 struct net_device *netdev = napi->dev; 1456 struct enic *enic = netdev_priv(netdev); 1457 unsigned int rq = (napi - &enic->napi[0]); 1458 unsigned int cq = enic_cq_rq(enic, rq); 1459 unsigned int intr = enic_msix_rq_intr(enic, rq); 1460 unsigned int work_to_do = budget; 1461 unsigned int work_done = 0; 1462 int err; 1463 1464 if (!enic_poll_lock_napi(&enic->rq[rq])) 1465 return budget; 1466 /* Service RQ 1467 */ 1468 1469 if (budget > 0) 1470 work_done = vnic_cq_service(&enic->cq[cq], 1471 work_to_do, enic_rq_service, NULL); 1472 1473 /* Return intr event credits for this polling 1474 * cycle. An intr event is the completion of a 1475 * RQ packet. 1476 */ 1477 1478 if (work_done > 0) 1479 vnic_intr_return_credits(&enic->intr[intr], 1480 work_done, 1481 0 /* don't unmask intr */, 1482 0 /* don't reset intr timer */); 1483 1484 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1485 1486 /* Buffer allocation failed. Stay in polling mode 1487 * so we can try to fill the ring again. 1488 */ 1489 1490 if (err) 1491 work_done = work_to_do; 1492 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1493 /* Call the function which refreshes the intr coalescing timer 1494 * value based on the traffic. 1495 */ 1496 enic_calc_int_moderation(enic, &enic->rq[rq]); 1497 1498 enic_poll_unlock_napi(&enic->rq[rq], napi); 1499 if (work_done < work_to_do) { 1500 1501 /* Some work done, but not enough to stay in polling, 1502 * exit polling 1503 */ 1504 1505 napi_complete(napi); 1506 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1507 enic_set_int_moderation(enic, &enic->rq[rq]); 1508 vnic_intr_unmask(&enic->intr[intr]); 1509 } 1510 1511 return work_done; 1512 } 1513 1514 static void enic_notify_timer(unsigned long data) 1515 { 1516 struct enic *enic = (struct enic *)data; 1517 1518 enic_notify_check(enic); 1519 1520 mod_timer(&enic->notify_timer, 1521 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1522 } 1523 1524 static void enic_free_intr(struct enic *enic) 1525 { 1526 struct net_device *netdev = enic->netdev; 1527 unsigned int i; 1528 1529 enic_free_rx_cpu_rmap(enic); 1530 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1531 case VNIC_DEV_INTR_MODE_INTX: 1532 free_irq(enic->pdev->irq, netdev); 1533 break; 1534 case VNIC_DEV_INTR_MODE_MSI: 1535 free_irq(enic->pdev->irq, enic); 1536 break; 1537 case VNIC_DEV_INTR_MODE_MSIX: 1538 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1539 if (enic->msix[i].requested) 1540 free_irq(enic->msix_entry[i].vector, 1541 enic->msix[i].devid); 1542 break; 1543 default: 1544 break; 1545 } 1546 } 1547 1548 static int enic_request_intr(struct enic *enic) 1549 { 1550 struct net_device *netdev = enic->netdev; 1551 unsigned int i, intr; 1552 int err = 0; 1553 1554 enic_set_rx_cpu_rmap(enic); 1555 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1556 1557 case VNIC_DEV_INTR_MODE_INTX: 1558 1559 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1560 IRQF_SHARED, netdev->name, netdev); 1561 break; 1562 1563 case VNIC_DEV_INTR_MODE_MSI: 1564 1565 err = request_irq(enic->pdev->irq, enic_isr_msi, 1566 0, netdev->name, enic); 1567 break; 1568 1569 case VNIC_DEV_INTR_MODE_MSIX: 1570 1571 for (i = 0; i < enic->rq_count; i++) { 1572 intr = enic_msix_rq_intr(enic, i); 1573 snprintf(enic->msix[intr].devname, 1574 sizeof(enic->msix[intr].devname), 1575 "%.11s-rx-%u", netdev->name, i); 1576 enic->msix[intr].isr = enic_isr_msix; 1577 enic->msix[intr].devid = &enic->napi[i]; 1578 } 1579 1580 for (i = 0; i < enic->wq_count; i++) { 1581 int wq = enic_cq_wq(enic, i); 1582 1583 intr = enic_msix_wq_intr(enic, i); 1584 snprintf(enic->msix[intr].devname, 1585 sizeof(enic->msix[intr].devname), 1586 "%.11s-tx-%u", netdev->name, i); 1587 enic->msix[intr].isr = enic_isr_msix; 1588 enic->msix[intr].devid = &enic->napi[wq]; 1589 } 1590 1591 intr = enic_msix_err_intr(enic); 1592 snprintf(enic->msix[intr].devname, 1593 sizeof(enic->msix[intr].devname), 1594 "%.11s-err", netdev->name); 1595 enic->msix[intr].isr = enic_isr_msix_err; 1596 enic->msix[intr].devid = enic; 1597 1598 intr = enic_msix_notify_intr(enic); 1599 snprintf(enic->msix[intr].devname, 1600 sizeof(enic->msix[intr].devname), 1601 "%.11s-notify", netdev->name); 1602 enic->msix[intr].isr = enic_isr_msix_notify; 1603 enic->msix[intr].devid = enic; 1604 1605 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1606 enic->msix[i].requested = 0; 1607 1608 for (i = 0; i < enic->intr_count; i++) { 1609 err = request_irq(enic->msix_entry[i].vector, 1610 enic->msix[i].isr, 0, 1611 enic->msix[i].devname, 1612 enic->msix[i].devid); 1613 if (err) { 1614 enic_free_intr(enic); 1615 break; 1616 } 1617 enic->msix[i].requested = 1; 1618 } 1619 1620 break; 1621 1622 default: 1623 break; 1624 } 1625 1626 return err; 1627 } 1628 1629 static void enic_synchronize_irqs(struct enic *enic) 1630 { 1631 unsigned int i; 1632 1633 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1634 case VNIC_DEV_INTR_MODE_INTX: 1635 case VNIC_DEV_INTR_MODE_MSI: 1636 synchronize_irq(enic->pdev->irq); 1637 break; 1638 case VNIC_DEV_INTR_MODE_MSIX: 1639 for (i = 0; i < enic->intr_count; i++) 1640 synchronize_irq(enic->msix_entry[i].vector); 1641 break; 1642 default: 1643 break; 1644 } 1645 } 1646 1647 static void enic_set_rx_coal_setting(struct enic *enic) 1648 { 1649 unsigned int speed; 1650 int index = -1; 1651 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1652 1653 /* 1. Read the link speed from fw 1654 * 2. Pick the default range for the speed 1655 * 3. Update it in enic->rx_coalesce_setting 1656 */ 1657 speed = vnic_dev_port_speed(enic->vdev); 1658 if (ENIC_LINK_SPEED_10G < speed) 1659 index = ENIC_LINK_40G_INDEX; 1660 else if (ENIC_LINK_SPEED_4G < speed) 1661 index = ENIC_LINK_10G_INDEX; 1662 else 1663 index = ENIC_LINK_4G_INDEX; 1664 1665 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 1666 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 1667 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 1668 1669 /* Start with the value provided by UCSM */ 1670 for (index = 0; index < enic->rq_count; index++) 1671 enic->cq[index].cur_rx_coal_timeval = 1672 enic->config.intr_timer_usec; 1673 1674 rx_coal->use_adaptive_rx_coalesce = 1; 1675 } 1676 1677 static int enic_dev_notify_set(struct enic *enic) 1678 { 1679 int err; 1680 1681 spin_lock_bh(&enic->devcmd_lock); 1682 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1683 case VNIC_DEV_INTR_MODE_INTX: 1684 err = vnic_dev_notify_set(enic->vdev, 1685 enic_legacy_notify_intr()); 1686 break; 1687 case VNIC_DEV_INTR_MODE_MSIX: 1688 err = vnic_dev_notify_set(enic->vdev, 1689 enic_msix_notify_intr(enic)); 1690 break; 1691 default: 1692 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1693 break; 1694 } 1695 spin_unlock_bh(&enic->devcmd_lock); 1696 1697 return err; 1698 } 1699 1700 static void enic_notify_timer_start(struct enic *enic) 1701 { 1702 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1703 case VNIC_DEV_INTR_MODE_MSI: 1704 mod_timer(&enic->notify_timer, jiffies); 1705 break; 1706 default: 1707 /* Using intr for notification for INTx/MSI-X */ 1708 break; 1709 } 1710 } 1711 1712 /* rtnl lock is held, process context */ 1713 static int enic_open(struct net_device *netdev) 1714 { 1715 struct enic *enic = netdev_priv(netdev); 1716 unsigned int i; 1717 int err; 1718 1719 err = enic_request_intr(enic); 1720 if (err) { 1721 netdev_err(netdev, "Unable to request irq.\n"); 1722 return err; 1723 } 1724 enic_init_affinity_hint(enic); 1725 enic_set_affinity_hint(enic); 1726 1727 err = enic_dev_notify_set(enic); 1728 if (err) { 1729 netdev_err(netdev, 1730 "Failed to alloc notify buffer, aborting.\n"); 1731 goto err_out_free_intr; 1732 } 1733 1734 for (i = 0; i < enic->rq_count; i++) { 1735 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf); 1736 /* Need at least one buffer on ring to get going */ 1737 if (vnic_rq_desc_used(&enic->rq[i]) == 0) { 1738 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1739 err = -ENOMEM; 1740 goto err_out_free_rq; 1741 } 1742 } 1743 1744 for (i = 0; i < enic->wq_count; i++) 1745 vnic_wq_enable(&enic->wq[i]); 1746 for (i = 0; i < enic->rq_count; i++) 1747 vnic_rq_enable(&enic->rq[i]); 1748 1749 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1750 enic_dev_add_station_addr(enic); 1751 1752 enic_set_rx_mode(netdev); 1753 1754 netif_tx_wake_all_queues(netdev); 1755 1756 for (i = 0; i < enic->rq_count; i++) { 1757 enic_busy_poll_init_lock(&enic->rq[i]); 1758 napi_enable(&enic->napi[i]); 1759 } 1760 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1761 for (i = 0; i < enic->wq_count; i++) 1762 napi_enable(&enic->napi[enic_cq_wq(enic, i)]); 1763 enic_dev_enable(enic); 1764 1765 for (i = 0; i < enic->intr_count; i++) 1766 vnic_intr_unmask(&enic->intr[i]); 1767 1768 enic_notify_timer_start(enic); 1769 enic_rfs_flw_tbl_init(enic); 1770 1771 return 0; 1772 1773 err_out_free_rq: 1774 for (i = 0; i < enic->rq_count; i++) 1775 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1776 enic_dev_notify_unset(enic); 1777 err_out_free_intr: 1778 enic_unset_affinity_hint(enic); 1779 enic_free_intr(enic); 1780 1781 return err; 1782 } 1783 1784 /* rtnl lock is held, process context */ 1785 static int enic_stop(struct net_device *netdev) 1786 { 1787 struct enic *enic = netdev_priv(netdev); 1788 unsigned int i; 1789 int err; 1790 1791 for (i = 0; i < enic->intr_count; i++) { 1792 vnic_intr_mask(&enic->intr[i]); 1793 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1794 } 1795 1796 enic_synchronize_irqs(enic); 1797 1798 del_timer_sync(&enic->notify_timer); 1799 enic_rfs_flw_tbl_free(enic); 1800 1801 enic_dev_disable(enic); 1802 1803 for (i = 0; i < enic->rq_count; i++) { 1804 napi_disable(&enic->napi[i]); 1805 local_bh_disable(); 1806 while (!enic_poll_lock_napi(&enic->rq[i])) 1807 mdelay(1); 1808 local_bh_enable(); 1809 } 1810 1811 netif_carrier_off(netdev); 1812 netif_tx_disable(netdev); 1813 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1814 for (i = 0; i < enic->wq_count; i++) 1815 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1816 1817 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1818 enic_dev_del_station_addr(enic); 1819 1820 for (i = 0; i < enic->wq_count; i++) { 1821 err = vnic_wq_disable(&enic->wq[i]); 1822 if (err) 1823 return err; 1824 } 1825 for (i = 0; i < enic->rq_count; i++) { 1826 err = vnic_rq_disable(&enic->rq[i]); 1827 if (err) 1828 return err; 1829 } 1830 1831 enic_dev_notify_unset(enic); 1832 enic_unset_affinity_hint(enic); 1833 enic_free_intr(enic); 1834 1835 for (i = 0; i < enic->wq_count; i++) 1836 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 1837 for (i = 0; i < enic->rq_count; i++) 1838 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1839 for (i = 0; i < enic->cq_count; i++) 1840 vnic_cq_clean(&enic->cq[i]); 1841 for (i = 0; i < enic->intr_count; i++) 1842 vnic_intr_clean(&enic->intr[i]); 1843 1844 return 0; 1845 } 1846 1847 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1848 { 1849 struct enic *enic = netdev_priv(netdev); 1850 int running = netif_running(netdev); 1851 1852 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1853 return -EOPNOTSUPP; 1854 1855 if (running) 1856 enic_stop(netdev); 1857 1858 netdev->mtu = new_mtu; 1859 1860 if (netdev->mtu > enic->port_mtu) 1861 netdev_warn(netdev, 1862 "interface MTU (%d) set higher than port MTU (%d)\n", 1863 netdev->mtu, enic->port_mtu); 1864 1865 if (running) 1866 enic_open(netdev); 1867 1868 return 0; 1869 } 1870 1871 static void enic_change_mtu_work(struct work_struct *work) 1872 { 1873 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1874 struct net_device *netdev = enic->netdev; 1875 int new_mtu = vnic_dev_mtu(enic->vdev); 1876 int err; 1877 unsigned int i; 1878 1879 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu)); 1880 1881 rtnl_lock(); 1882 1883 /* Stop RQ */ 1884 del_timer_sync(&enic->notify_timer); 1885 1886 for (i = 0; i < enic->rq_count; i++) 1887 napi_disable(&enic->napi[i]); 1888 1889 vnic_intr_mask(&enic->intr[0]); 1890 enic_synchronize_irqs(enic); 1891 err = vnic_rq_disable(&enic->rq[0]); 1892 if (err) { 1893 rtnl_unlock(); 1894 netdev_err(netdev, "Unable to disable RQ.\n"); 1895 return; 1896 } 1897 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf); 1898 vnic_cq_clean(&enic->cq[0]); 1899 vnic_intr_clean(&enic->intr[0]); 1900 1901 /* Fill RQ with new_mtu-sized buffers */ 1902 netdev->mtu = new_mtu; 1903 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1904 /* Need at least one buffer on ring to get going */ 1905 if (vnic_rq_desc_used(&enic->rq[0]) == 0) { 1906 rtnl_unlock(); 1907 netdev_err(netdev, "Unable to alloc receive buffers.\n"); 1908 return; 1909 } 1910 1911 /* Start RQ */ 1912 vnic_rq_enable(&enic->rq[0]); 1913 napi_enable(&enic->napi[0]); 1914 vnic_intr_unmask(&enic->intr[0]); 1915 enic_notify_timer_start(enic); 1916 1917 rtnl_unlock(); 1918 1919 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1920 } 1921 1922 #ifdef CONFIG_NET_POLL_CONTROLLER 1923 static void enic_poll_controller(struct net_device *netdev) 1924 { 1925 struct enic *enic = netdev_priv(netdev); 1926 struct vnic_dev *vdev = enic->vdev; 1927 unsigned int i, intr; 1928 1929 switch (vnic_dev_get_intr_mode(vdev)) { 1930 case VNIC_DEV_INTR_MODE_MSIX: 1931 for (i = 0; i < enic->rq_count; i++) { 1932 intr = enic_msix_rq_intr(enic, i); 1933 enic_isr_msix(enic->msix_entry[intr].vector, 1934 &enic->napi[i]); 1935 } 1936 1937 for (i = 0; i < enic->wq_count; i++) { 1938 intr = enic_msix_wq_intr(enic, i); 1939 enic_isr_msix(enic->msix_entry[intr].vector, 1940 &enic->napi[enic_cq_wq(enic, i)]); 1941 } 1942 1943 break; 1944 case VNIC_DEV_INTR_MODE_MSI: 1945 enic_isr_msi(enic->pdev->irq, enic); 1946 break; 1947 case VNIC_DEV_INTR_MODE_INTX: 1948 enic_isr_legacy(enic->pdev->irq, netdev); 1949 break; 1950 default: 1951 break; 1952 } 1953 } 1954 #endif 1955 1956 static int enic_dev_wait(struct vnic_dev *vdev, 1957 int (*start)(struct vnic_dev *, int), 1958 int (*finished)(struct vnic_dev *, int *), 1959 int arg) 1960 { 1961 unsigned long time; 1962 int done; 1963 int err; 1964 1965 BUG_ON(in_interrupt()); 1966 1967 err = start(vdev, arg); 1968 if (err) 1969 return err; 1970 1971 /* Wait for func to complete...2 seconds max 1972 */ 1973 1974 time = jiffies + (HZ * 2); 1975 do { 1976 1977 err = finished(vdev, &done); 1978 if (err) 1979 return err; 1980 1981 if (done) 1982 return 0; 1983 1984 schedule_timeout_uninterruptible(HZ / 10); 1985 1986 } while (time_after(time, jiffies)); 1987 1988 return -ETIMEDOUT; 1989 } 1990 1991 static int enic_dev_open(struct enic *enic) 1992 { 1993 int err; 1994 1995 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1996 vnic_dev_open_done, 0); 1997 if (err) 1998 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1999 err); 2000 2001 return err; 2002 } 2003 2004 static int enic_dev_soft_reset(struct enic *enic) 2005 { 2006 int err; 2007 2008 err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset, 2009 vnic_dev_soft_reset_done, 0); 2010 if (err) 2011 netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n", 2012 err); 2013 2014 return err; 2015 } 2016 2017 static int enic_dev_hang_reset(struct enic *enic) 2018 { 2019 int err; 2020 2021 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 2022 vnic_dev_hang_reset_done, 0); 2023 if (err) 2024 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 2025 err); 2026 2027 return err; 2028 } 2029 2030 int __enic_set_rsskey(struct enic *enic) 2031 { 2032 union vnic_rss_key *rss_key_buf_va; 2033 dma_addr_t rss_key_buf_pa; 2034 int i, kidx, bidx, err; 2035 2036 rss_key_buf_va = pci_zalloc_consistent(enic->pdev, 2037 sizeof(union vnic_rss_key), 2038 &rss_key_buf_pa); 2039 if (!rss_key_buf_va) 2040 return -ENOMEM; 2041 2042 for (i = 0; i < ENIC_RSS_LEN; i++) { 2043 kidx = i / ENIC_RSS_BYTES_PER_KEY; 2044 bidx = i % ENIC_RSS_BYTES_PER_KEY; 2045 rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i]; 2046 } 2047 spin_lock_bh(&enic->devcmd_lock); 2048 err = enic_set_rss_key(enic, 2049 rss_key_buf_pa, 2050 sizeof(union vnic_rss_key)); 2051 spin_unlock_bh(&enic->devcmd_lock); 2052 2053 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key), 2054 rss_key_buf_va, rss_key_buf_pa); 2055 2056 return err; 2057 } 2058 2059 static int enic_set_rsskey(struct enic *enic) 2060 { 2061 netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN); 2062 2063 return __enic_set_rsskey(enic); 2064 } 2065 2066 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 2067 { 2068 dma_addr_t rss_cpu_buf_pa; 2069 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 2070 unsigned int i; 2071 int err; 2072 2073 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev, 2074 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa); 2075 if (!rss_cpu_buf_va) 2076 return -ENOMEM; 2077 2078 for (i = 0; i < (1 << rss_hash_bits); i++) 2079 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 2080 2081 spin_lock_bh(&enic->devcmd_lock); 2082 err = enic_set_rss_cpu(enic, 2083 rss_cpu_buf_pa, 2084 sizeof(union vnic_rss_cpu)); 2085 spin_unlock_bh(&enic->devcmd_lock); 2086 2087 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu), 2088 rss_cpu_buf_va, rss_cpu_buf_pa); 2089 2090 return err; 2091 } 2092 2093 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 2094 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 2095 { 2096 const u8 tso_ipid_split_en = 0; 2097 const u8 ig_vlan_strip_en = 1; 2098 int err; 2099 2100 /* Enable VLAN tag stripping. 2101 */ 2102 2103 spin_lock_bh(&enic->devcmd_lock); 2104 err = enic_set_nic_cfg(enic, 2105 rss_default_cpu, rss_hash_type, 2106 rss_hash_bits, rss_base_cpu, 2107 rss_enable, tso_ipid_split_en, 2108 ig_vlan_strip_en); 2109 spin_unlock_bh(&enic->devcmd_lock); 2110 2111 return err; 2112 } 2113 2114 static int enic_set_rss_nic_cfg(struct enic *enic) 2115 { 2116 struct device *dev = enic_get_dev(enic); 2117 const u8 rss_default_cpu = 0; 2118 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 2119 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 2120 NIC_CFG_RSS_HASH_TYPE_IPV6 | 2121 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 2122 const u8 rss_hash_bits = 7; 2123 const u8 rss_base_cpu = 0; 2124 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 2125 2126 if (rss_enable) { 2127 if (!enic_set_rsskey(enic)) { 2128 if (enic_set_rsscpu(enic, rss_hash_bits)) { 2129 rss_enable = 0; 2130 dev_warn(dev, "RSS disabled, " 2131 "Failed to set RSS cpu indirection table."); 2132 } 2133 } else { 2134 rss_enable = 0; 2135 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 2136 } 2137 } 2138 2139 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 2140 rss_hash_bits, rss_base_cpu, rss_enable); 2141 } 2142 2143 static void enic_reset(struct work_struct *work) 2144 { 2145 struct enic *enic = container_of(work, struct enic, reset); 2146 2147 if (!netif_running(enic->netdev)) 2148 return; 2149 2150 rtnl_lock(); 2151 2152 spin_lock(&enic->enic_api_lock); 2153 enic_stop(enic->netdev); 2154 enic_dev_soft_reset(enic); 2155 enic_reset_addr_lists(enic); 2156 enic_init_vnic_resources(enic); 2157 enic_set_rss_nic_cfg(enic); 2158 enic_dev_set_ig_vlan_rewrite_mode(enic); 2159 enic_open(enic->netdev); 2160 spin_unlock(&enic->enic_api_lock); 2161 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2162 2163 rtnl_unlock(); 2164 } 2165 2166 static void enic_tx_hang_reset(struct work_struct *work) 2167 { 2168 struct enic *enic = container_of(work, struct enic, tx_hang_reset); 2169 2170 rtnl_lock(); 2171 2172 spin_lock(&enic->enic_api_lock); 2173 enic_dev_hang_notify(enic); 2174 enic_stop(enic->netdev); 2175 enic_dev_hang_reset(enic); 2176 enic_reset_addr_lists(enic); 2177 enic_init_vnic_resources(enic); 2178 enic_set_rss_nic_cfg(enic); 2179 enic_dev_set_ig_vlan_rewrite_mode(enic); 2180 enic_open(enic->netdev); 2181 spin_unlock(&enic->enic_api_lock); 2182 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2183 2184 rtnl_unlock(); 2185 } 2186 2187 static int enic_set_intr_mode(struct enic *enic) 2188 { 2189 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX); 2190 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX); 2191 unsigned int i; 2192 2193 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2194 * on system capabilities. 2195 * 2196 * Try MSI-X first 2197 * 2198 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs 2199 * (the second to last INTR is used for WQ/RQ errors) 2200 * (the last INTR is used for notifications) 2201 */ 2202 2203 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2); 2204 for (i = 0; i < n + m + 2; i++) 2205 enic->msix_entry[i].entry = i; 2206 2207 /* Use multiple RQs if RSS is enabled 2208 */ 2209 2210 if (ENIC_SETTING(enic, RSS) && 2211 enic->config.intr_mode < 1 && 2212 enic->rq_count >= n && 2213 enic->wq_count >= m && 2214 enic->cq_count >= n + m && 2215 enic->intr_count >= n + m + 2) { 2216 2217 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2218 n + m + 2, n + m + 2) > 0) { 2219 2220 enic->rq_count = n; 2221 enic->wq_count = m; 2222 enic->cq_count = n + m; 2223 enic->intr_count = n + m + 2; 2224 2225 vnic_dev_set_intr_mode(enic->vdev, 2226 VNIC_DEV_INTR_MODE_MSIX); 2227 2228 return 0; 2229 } 2230 } 2231 2232 if (enic->config.intr_mode < 1 && 2233 enic->rq_count >= 1 && 2234 enic->wq_count >= m && 2235 enic->cq_count >= 1 + m && 2236 enic->intr_count >= 1 + m + 2) { 2237 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2238 1 + m + 2, 1 + m + 2) > 0) { 2239 2240 enic->rq_count = 1; 2241 enic->wq_count = m; 2242 enic->cq_count = 1 + m; 2243 enic->intr_count = 1 + m + 2; 2244 2245 vnic_dev_set_intr_mode(enic->vdev, 2246 VNIC_DEV_INTR_MODE_MSIX); 2247 2248 return 0; 2249 } 2250 } 2251 2252 /* Next try MSI 2253 * 2254 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR 2255 */ 2256 2257 if (enic->config.intr_mode < 2 && 2258 enic->rq_count >= 1 && 2259 enic->wq_count >= 1 && 2260 enic->cq_count >= 2 && 2261 enic->intr_count >= 1 && 2262 !pci_enable_msi(enic->pdev)) { 2263 2264 enic->rq_count = 1; 2265 enic->wq_count = 1; 2266 enic->cq_count = 2; 2267 enic->intr_count = 1; 2268 2269 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2270 2271 return 0; 2272 } 2273 2274 /* Next try INTx 2275 * 2276 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs 2277 * (the first INTR is used for WQ/RQ) 2278 * (the second INTR is used for WQ/RQ errors) 2279 * (the last INTR is used for notifications) 2280 */ 2281 2282 if (enic->config.intr_mode < 3 && 2283 enic->rq_count >= 1 && 2284 enic->wq_count >= 1 && 2285 enic->cq_count >= 2 && 2286 enic->intr_count >= 3) { 2287 2288 enic->rq_count = 1; 2289 enic->wq_count = 1; 2290 enic->cq_count = 2; 2291 enic->intr_count = 3; 2292 2293 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2294 2295 return 0; 2296 } 2297 2298 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2299 2300 return -EINVAL; 2301 } 2302 2303 static void enic_clear_intr_mode(struct enic *enic) 2304 { 2305 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2306 case VNIC_DEV_INTR_MODE_MSIX: 2307 pci_disable_msix(enic->pdev); 2308 break; 2309 case VNIC_DEV_INTR_MODE_MSI: 2310 pci_disable_msi(enic->pdev); 2311 break; 2312 default: 2313 break; 2314 } 2315 2316 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2317 } 2318 2319 static const struct net_device_ops enic_netdev_dynamic_ops = { 2320 .ndo_open = enic_open, 2321 .ndo_stop = enic_stop, 2322 .ndo_start_xmit = enic_hard_start_xmit, 2323 .ndo_get_stats64 = enic_get_stats, 2324 .ndo_validate_addr = eth_validate_addr, 2325 .ndo_set_rx_mode = enic_set_rx_mode, 2326 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2327 .ndo_change_mtu = enic_change_mtu, 2328 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2329 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2330 .ndo_tx_timeout = enic_tx_timeout, 2331 .ndo_set_vf_port = enic_set_vf_port, 2332 .ndo_get_vf_port = enic_get_vf_port, 2333 .ndo_set_vf_mac = enic_set_vf_mac, 2334 #ifdef CONFIG_NET_POLL_CONTROLLER 2335 .ndo_poll_controller = enic_poll_controller, 2336 #endif 2337 #ifdef CONFIG_RFS_ACCEL 2338 .ndo_rx_flow_steer = enic_rx_flow_steer, 2339 #endif 2340 #ifdef CONFIG_NET_RX_BUSY_POLL 2341 .ndo_busy_poll = enic_busy_poll, 2342 #endif 2343 }; 2344 2345 static const struct net_device_ops enic_netdev_ops = { 2346 .ndo_open = enic_open, 2347 .ndo_stop = enic_stop, 2348 .ndo_start_xmit = enic_hard_start_xmit, 2349 .ndo_get_stats64 = enic_get_stats, 2350 .ndo_validate_addr = eth_validate_addr, 2351 .ndo_set_mac_address = enic_set_mac_address, 2352 .ndo_set_rx_mode = enic_set_rx_mode, 2353 .ndo_change_mtu = enic_change_mtu, 2354 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2355 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2356 .ndo_tx_timeout = enic_tx_timeout, 2357 .ndo_set_vf_port = enic_set_vf_port, 2358 .ndo_get_vf_port = enic_get_vf_port, 2359 .ndo_set_vf_mac = enic_set_vf_mac, 2360 #ifdef CONFIG_NET_POLL_CONTROLLER 2361 .ndo_poll_controller = enic_poll_controller, 2362 #endif 2363 #ifdef CONFIG_RFS_ACCEL 2364 .ndo_rx_flow_steer = enic_rx_flow_steer, 2365 #endif 2366 #ifdef CONFIG_NET_RX_BUSY_POLL 2367 .ndo_busy_poll = enic_busy_poll, 2368 #endif 2369 }; 2370 2371 static void enic_dev_deinit(struct enic *enic) 2372 { 2373 unsigned int i; 2374 2375 for (i = 0; i < enic->rq_count; i++) { 2376 napi_hash_del(&enic->napi[i]); 2377 netif_napi_del(&enic->napi[i]); 2378 } 2379 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 2380 for (i = 0; i < enic->wq_count; i++) 2381 netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]); 2382 2383 enic_free_vnic_resources(enic); 2384 enic_clear_intr_mode(enic); 2385 enic_free_affinity_hint(enic); 2386 } 2387 2388 static void enic_kdump_kernel_config(struct enic *enic) 2389 { 2390 if (is_kdump_kernel()) { 2391 dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n"); 2392 enic->rq_count = 1; 2393 enic->wq_count = 1; 2394 enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS; 2395 enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS; 2396 enic->config.mtu = min_t(u16, 1500, enic->config.mtu); 2397 } 2398 } 2399 2400 static int enic_dev_init(struct enic *enic) 2401 { 2402 struct device *dev = enic_get_dev(enic); 2403 struct net_device *netdev = enic->netdev; 2404 unsigned int i; 2405 int err; 2406 2407 /* Get interrupt coalesce timer info */ 2408 err = enic_dev_intr_coal_timer_info(enic); 2409 if (err) { 2410 dev_warn(dev, "Using default conversion factor for " 2411 "interrupt coalesce timer\n"); 2412 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2413 } 2414 2415 /* Get vNIC configuration 2416 */ 2417 2418 err = enic_get_vnic_config(enic); 2419 if (err) { 2420 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2421 return err; 2422 } 2423 2424 /* Get available resource counts 2425 */ 2426 2427 enic_get_res_counts(enic); 2428 2429 /* modify resource count if we are in kdump_kernel 2430 */ 2431 enic_kdump_kernel_config(enic); 2432 2433 /* Set interrupt mode based on resource counts and system 2434 * capabilities 2435 */ 2436 2437 err = enic_set_intr_mode(enic); 2438 if (err) { 2439 dev_err(dev, "Failed to set intr mode based on resource " 2440 "counts and system capabilities, aborting\n"); 2441 return err; 2442 } 2443 2444 /* Allocate and configure vNIC resources 2445 */ 2446 2447 err = enic_alloc_vnic_resources(enic); 2448 if (err) { 2449 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2450 goto err_out_free_vnic_resources; 2451 } 2452 2453 enic_init_vnic_resources(enic); 2454 2455 err = enic_set_rss_nic_cfg(enic); 2456 if (err) { 2457 dev_err(dev, "Failed to config nic, aborting\n"); 2458 goto err_out_free_vnic_resources; 2459 } 2460 2461 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2462 default: 2463 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64); 2464 break; 2465 case VNIC_DEV_INTR_MODE_MSIX: 2466 for (i = 0; i < enic->rq_count; i++) { 2467 netif_napi_add(netdev, &enic->napi[i], 2468 enic_poll_msix_rq, NAPI_POLL_WEIGHT); 2469 } 2470 for (i = 0; i < enic->wq_count; i++) 2471 netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)], 2472 enic_poll_msix_wq, NAPI_POLL_WEIGHT); 2473 break; 2474 } 2475 2476 return 0; 2477 2478 err_out_free_vnic_resources: 2479 enic_free_affinity_hint(enic); 2480 enic_clear_intr_mode(enic); 2481 enic_free_vnic_resources(enic); 2482 2483 return err; 2484 } 2485 2486 static void enic_iounmap(struct enic *enic) 2487 { 2488 unsigned int i; 2489 2490 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2491 if (enic->bar[i].vaddr) 2492 iounmap(enic->bar[i].vaddr); 2493 } 2494 2495 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2496 { 2497 struct device *dev = &pdev->dev; 2498 struct net_device *netdev; 2499 struct enic *enic; 2500 int using_dac = 0; 2501 unsigned int i; 2502 int err; 2503 #ifdef CONFIG_PCI_IOV 2504 int pos = 0; 2505 #endif 2506 int num_pps = 1; 2507 2508 /* Allocate net device structure and initialize. Private 2509 * instance data is initialized to zero. 2510 */ 2511 2512 netdev = alloc_etherdev_mqs(sizeof(struct enic), 2513 ENIC_RQ_MAX, ENIC_WQ_MAX); 2514 if (!netdev) 2515 return -ENOMEM; 2516 2517 pci_set_drvdata(pdev, netdev); 2518 2519 SET_NETDEV_DEV(netdev, &pdev->dev); 2520 2521 enic = netdev_priv(netdev); 2522 enic->netdev = netdev; 2523 enic->pdev = pdev; 2524 2525 /* Setup PCI resources 2526 */ 2527 2528 err = pci_enable_device_mem(pdev); 2529 if (err) { 2530 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2531 goto err_out_free_netdev; 2532 } 2533 2534 err = pci_request_regions(pdev, DRV_NAME); 2535 if (err) { 2536 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2537 goto err_out_disable_device; 2538 } 2539 2540 pci_set_master(pdev); 2541 2542 /* Query PCI controller on system for DMA addressing 2543 * limitation for the device. Try 64-bit first, and 2544 * fail to 32-bit. 2545 */ 2546 2547 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2548 if (err) { 2549 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2550 if (err) { 2551 dev_err(dev, "No usable DMA configuration, aborting\n"); 2552 goto err_out_release_regions; 2553 } 2554 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2555 if (err) { 2556 dev_err(dev, "Unable to obtain %u-bit DMA " 2557 "for consistent allocations, aborting\n", 32); 2558 goto err_out_release_regions; 2559 } 2560 } else { 2561 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2562 if (err) { 2563 dev_err(dev, "Unable to obtain %u-bit DMA " 2564 "for consistent allocations, aborting\n", 64); 2565 goto err_out_release_regions; 2566 } 2567 using_dac = 1; 2568 } 2569 2570 /* Map vNIC resources from BAR0-5 2571 */ 2572 2573 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2574 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2575 continue; 2576 enic->bar[i].len = pci_resource_len(pdev, i); 2577 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2578 if (!enic->bar[i].vaddr) { 2579 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2580 err = -ENODEV; 2581 goto err_out_iounmap; 2582 } 2583 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2584 } 2585 2586 /* Register vNIC device 2587 */ 2588 2589 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2590 ARRAY_SIZE(enic->bar)); 2591 if (!enic->vdev) { 2592 dev_err(dev, "vNIC registration failed, aborting\n"); 2593 err = -ENODEV; 2594 goto err_out_iounmap; 2595 } 2596 2597 err = vnic_devcmd_init(enic->vdev); 2598 2599 if (err) 2600 goto err_out_vnic_unregister; 2601 2602 #ifdef CONFIG_PCI_IOV 2603 /* Get number of subvnics */ 2604 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2605 if (pos) { 2606 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2607 &enic->num_vfs); 2608 if (enic->num_vfs) { 2609 err = pci_enable_sriov(pdev, enic->num_vfs); 2610 if (err) { 2611 dev_err(dev, "SRIOV enable failed, aborting." 2612 " pci_enable_sriov() returned %d\n", 2613 err); 2614 goto err_out_vnic_unregister; 2615 } 2616 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2617 num_pps = enic->num_vfs; 2618 } 2619 } 2620 #endif 2621 2622 /* Allocate structure for port profiles */ 2623 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL); 2624 if (!enic->pp) { 2625 err = -ENOMEM; 2626 goto err_out_disable_sriov_pp; 2627 } 2628 2629 /* Issue device open to get device in known state 2630 */ 2631 2632 err = enic_dev_open(enic); 2633 if (err) { 2634 dev_err(dev, "vNIC dev open failed, aborting\n"); 2635 goto err_out_disable_sriov; 2636 } 2637 2638 /* Setup devcmd lock 2639 */ 2640 2641 spin_lock_init(&enic->devcmd_lock); 2642 spin_lock_init(&enic->enic_api_lock); 2643 2644 /* 2645 * Set ingress vlan rewrite mode before vnic initialization 2646 */ 2647 2648 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2649 if (err) { 2650 dev_err(dev, 2651 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2652 goto err_out_dev_close; 2653 } 2654 2655 /* Issue device init to initialize the vnic-to-switch link. 2656 * We'll start with carrier off and wait for link UP 2657 * notification later to turn on carrier. We don't need 2658 * to wait here for the vnic-to-switch link initialization 2659 * to complete; link UP notification is the indication that 2660 * the process is complete. 2661 */ 2662 2663 netif_carrier_off(netdev); 2664 2665 /* Do not call dev_init for a dynamic vnic. 2666 * For a dynamic vnic, init_prov_info will be 2667 * called later by an upper layer. 2668 */ 2669 2670 if (!enic_is_dynamic(enic)) { 2671 err = vnic_dev_init(enic->vdev, 0); 2672 if (err) { 2673 dev_err(dev, "vNIC dev init failed, aborting\n"); 2674 goto err_out_dev_close; 2675 } 2676 } 2677 2678 err = enic_dev_init(enic); 2679 if (err) { 2680 dev_err(dev, "Device initialization failed, aborting\n"); 2681 goto err_out_dev_close; 2682 } 2683 2684 netif_set_real_num_tx_queues(netdev, enic->wq_count); 2685 netif_set_real_num_rx_queues(netdev, enic->rq_count); 2686 2687 /* Setup notification timer, HW reset task, and wq locks 2688 */ 2689 2690 init_timer(&enic->notify_timer); 2691 enic->notify_timer.function = enic_notify_timer; 2692 enic->notify_timer.data = (unsigned long)enic; 2693 2694 enic_set_rx_coal_setting(enic); 2695 INIT_WORK(&enic->reset, enic_reset); 2696 INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset); 2697 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2698 2699 for (i = 0; i < enic->wq_count; i++) 2700 spin_lock_init(&enic->wq_lock[i]); 2701 2702 /* Register net device 2703 */ 2704 2705 enic->port_mtu = enic->config.mtu; 2706 (void)enic_change_mtu(netdev, enic->port_mtu); 2707 2708 err = enic_set_mac_addr(netdev, enic->mac_addr); 2709 if (err) { 2710 dev_err(dev, "Invalid MAC address, aborting\n"); 2711 goto err_out_dev_deinit; 2712 } 2713 2714 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2715 /* rx coalesce time already got initialized. This gets used 2716 * if adaptive coal is turned off 2717 */ 2718 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2719 2720 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2721 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2722 else 2723 netdev->netdev_ops = &enic_netdev_ops; 2724 2725 netdev->watchdog_timeo = 2 * HZ; 2726 enic_set_ethtool_ops(netdev); 2727 2728 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2729 if (ENIC_SETTING(enic, LOOP)) { 2730 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2731 enic->loop_enable = 1; 2732 enic->loop_tag = enic->config.loop_tag; 2733 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2734 } 2735 if (ENIC_SETTING(enic, TXCSUM)) 2736 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2737 if (ENIC_SETTING(enic, TSO)) 2738 netdev->hw_features |= NETIF_F_TSO | 2739 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2740 if (ENIC_SETTING(enic, RSS)) 2741 netdev->hw_features |= NETIF_F_RXHASH; 2742 if (ENIC_SETTING(enic, RXCSUM)) 2743 netdev->hw_features |= NETIF_F_RXCSUM; 2744 2745 netdev->features |= netdev->hw_features; 2746 netdev->vlan_features |= netdev->features; 2747 2748 #ifdef CONFIG_RFS_ACCEL 2749 netdev->hw_features |= NETIF_F_NTUPLE; 2750 #endif 2751 2752 if (using_dac) 2753 netdev->features |= NETIF_F_HIGHDMA; 2754 2755 netdev->priv_flags |= IFF_UNICAST_FLT; 2756 2757 /* MTU range: 68 - 9000 */ 2758 netdev->min_mtu = ENIC_MIN_MTU; 2759 netdev->max_mtu = ENIC_MAX_MTU; 2760 2761 err = register_netdev(netdev); 2762 if (err) { 2763 dev_err(dev, "Cannot register net device, aborting\n"); 2764 goto err_out_dev_deinit; 2765 } 2766 enic->rx_copybreak = RX_COPYBREAK_DEFAULT; 2767 2768 return 0; 2769 2770 err_out_dev_deinit: 2771 enic_dev_deinit(enic); 2772 err_out_dev_close: 2773 vnic_dev_close(enic->vdev); 2774 err_out_disable_sriov: 2775 kfree(enic->pp); 2776 err_out_disable_sriov_pp: 2777 #ifdef CONFIG_PCI_IOV 2778 if (enic_sriov_enabled(enic)) { 2779 pci_disable_sriov(pdev); 2780 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2781 } 2782 #endif 2783 err_out_vnic_unregister: 2784 vnic_dev_unregister(enic->vdev); 2785 err_out_iounmap: 2786 enic_iounmap(enic); 2787 err_out_release_regions: 2788 pci_release_regions(pdev); 2789 err_out_disable_device: 2790 pci_disable_device(pdev); 2791 err_out_free_netdev: 2792 free_netdev(netdev); 2793 2794 return err; 2795 } 2796 2797 static void enic_remove(struct pci_dev *pdev) 2798 { 2799 struct net_device *netdev = pci_get_drvdata(pdev); 2800 2801 if (netdev) { 2802 struct enic *enic = netdev_priv(netdev); 2803 2804 cancel_work_sync(&enic->reset); 2805 cancel_work_sync(&enic->change_mtu_work); 2806 unregister_netdev(netdev); 2807 enic_dev_deinit(enic); 2808 vnic_dev_close(enic->vdev); 2809 #ifdef CONFIG_PCI_IOV 2810 if (enic_sriov_enabled(enic)) { 2811 pci_disable_sriov(pdev); 2812 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2813 } 2814 #endif 2815 kfree(enic->pp); 2816 vnic_dev_unregister(enic->vdev); 2817 enic_iounmap(enic); 2818 pci_release_regions(pdev); 2819 pci_disable_device(pdev); 2820 free_netdev(netdev); 2821 } 2822 } 2823 2824 static struct pci_driver enic_driver = { 2825 .name = DRV_NAME, 2826 .id_table = enic_id_table, 2827 .probe = enic_probe, 2828 .remove = enic_remove, 2829 }; 2830 2831 static int __init enic_init_module(void) 2832 { 2833 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION); 2834 2835 return pci_register_driver(&enic_driver); 2836 } 2837 2838 static void __exit enic_cleanup_module(void) 2839 { 2840 pci_unregister_driver(&enic_driver); 2841 } 2842 2843 module_init(enic_init_module); 2844 module_exit(enic_cleanup_module); 2845