1 /*
2  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  *
5  * This program is free software; you may redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; version 2 of the License.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16  * SOFTWARE.
17  *
18  */
19 
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/string.h>
23 #include <linux/errno.h>
24 #include <linux/types.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/workqueue.h>
28 #include <linux/pci.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/if.h>
32 #include <linux/if_ether.h>
33 #include <linux/if_vlan.h>
34 #include <linux/in.h>
35 #include <linux/ip.h>
36 #include <linux/ipv6.h>
37 #include <linux/tcp.h>
38 #include <linux/rtnetlink.h>
39 #include <linux/prefetch.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ktime.h>
42 #include <linux/numa.h>
43 #ifdef CONFIG_RFS_ACCEL
44 #include <linux/cpu_rmap.h>
45 #endif
46 #include <linux/crash_dump.h>
47 #include <net/busy_poll.h>
48 #include <net/vxlan.h>
49 
50 #include "cq_enet_desc.h"
51 #include "vnic_dev.h"
52 #include "vnic_intr.h"
53 #include "vnic_stats.h"
54 #include "vnic_vic.h"
55 #include "enic_res.h"
56 #include "enic.h"
57 #include "enic_dev.h"
58 #include "enic_pp.h"
59 #include "enic_clsf.h"
60 
61 #define ENIC_NOTIFY_TIMER_PERIOD	(2 * HZ)
62 #define WQ_ENET_MAX_DESC_LEN		(1 << WQ_ENET_LEN_BITS)
63 #define MAX_TSO				(1 << 16)
64 #define ENIC_DESC_MAX_SPLITS		(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
65 
66 #define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */
67 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN     0x0044  /* enet dynamic vnic */
68 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */
69 
70 #define RX_COPYBREAK_DEFAULT		256
71 
72 /* Supported devices */
73 static const struct pci_device_id enic_id_table[] = {
74 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
75 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
76 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
77 	{ 0, }	/* end of table */
78 };
79 
80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
81 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
82 MODULE_LICENSE("GPL");
83 MODULE_VERSION(DRV_VERSION);
84 MODULE_DEVICE_TABLE(pci, enic_id_table);
85 
86 #define ENIC_LARGE_PKT_THRESHOLD		1000
87 #define ENIC_MAX_COALESCE_TIMERS		10
88 /*  Interrupt moderation table, which will be used to decide the
89  *  coalescing timer values
90  *  {rx_rate in Mbps, mapping percentage of the range}
91  */
92 static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
93 	{4000,  0},
94 	{4400, 10},
95 	{5060, 20},
96 	{5230, 30},
97 	{5540, 40},
98 	{5820, 50},
99 	{6120, 60},
100 	{6435, 70},
101 	{6745, 80},
102 	{7000, 90},
103 	{0xFFFFFFFF, 100}
104 };
105 
106 /* This table helps the driver to pick different ranges for rx coalescing
107  * timer depending on the link speed.
108  */
109 static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
110 	{0,  0}, /* 0  - 4  Gbps */
111 	{0,  3}, /* 4  - 10 Gbps */
112 	{3,  6}, /* 10 - 40 Gbps */
113 };
114 
115 static void enic_init_affinity_hint(struct enic *enic)
116 {
117 	int numa_node = dev_to_node(&enic->pdev->dev);
118 	int i;
119 
120 	for (i = 0; i < enic->intr_count; i++) {
121 		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) ||
122 		    (enic->msix[i].affinity_mask &&
123 		     !cpumask_empty(enic->msix[i].affinity_mask)))
124 			continue;
125 		if (zalloc_cpumask_var(&enic->msix[i].affinity_mask,
126 				       GFP_KERNEL))
127 			cpumask_set_cpu(cpumask_local_spread(i, numa_node),
128 					enic->msix[i].affinity_mask);
129 	}
130 }
131 
132 static void enic_free_affinity_hint(struct enic *enic)
133 {
134 	int i;
135 
136 	for (i = 0; i < enic->intr_count; i++) {
137 		if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i))
138 			continue;
139 		free_cpumask_var(enic->msix[i].affinity_mask);
140 	}
141 }
142 
143 static void enic_set_affinity_hint(struct enic *enic)
144 {
145 	int i;
146 	int err;
147 
148 	for (i = 0; i < enic->intr_count; i++) {
149 		if (enic_is_err_intr(enic, i)		||
150 		    enic_is_notify_intr(enic, i)	||
151 		    !enic->msix[i].affinity_mask	||
152 		    cpumask_empty(enic->msix[i].affinity_mask))
153 			continue;
154 		err = irq_set_affinity_hint(enic->msix_entry[i].vector,
155 					    enic->msix[i].affinity_mask);
156 		if (err)
157 			netdev_warn(enic->netdev, "irq_set_affinity_hint failed, err %d\n",
158 				    err);
159 	}
160 
161 	for (i = 0; i < enic->wq_count; i++) {
162 		int wq_intr = enic_msix_wq_intr(enic, i);
163 
164 		if (enic->msix[wq_intr].affinity_mask &&
165 		    !cpumask_empty(enic->msix[wq_intr].affinity_mask))
166 			netif_set_xps_queue(enic->netdev,
167 					    enic->msix[wq_intr].affinity_mask,
168 					    i);
169 	}
170 }
171 
172 static void enic_unset_affinity_hint(struct enic *enic)
173 {
174 	int i;
175 
176 	for (i = 0; i < enic->intr_count; i++)
177 		irq_set_affinity_hint(enic->msix_entry[i].vector, NULL);
178 }
179 
180 static void enic_udp_tunnel_add(struct net_device *netdev,
181 				struct udp_tunnel_info *ti)
182 {
183 	struct enic *enic = netdev_priv(netdev);
184 	__be16 port = ti->port;
185 	int err;
186 
187 	spin_lock_bh(&enic->devcmd_lock);
188 
189 	if (ti->type != UDP_TUNNEL_TYPE_VXLAN) {
190 		netdev_info(netdev, "udp_tnl: only vxlan tunnel offload supported");
191 		goto error;
192 	}
193 
194 	if (ti->sa_family != AF_INET) {
195 		netdev_info(netdev, "vxlan: only IPv4 offload supported");
196 		goto error;
197 	}
198 
199 	if (enic->vxlan.vxlan_udp_port_number) {
200 		if (ntohs(port) == enic->vxlan.vxlan_udp_port_number)
201 			netdev_warn(netdev, "vxlan: udp port already offloaded");
202 		else
203 			netdev_info(netdev, "vxlan: offload supported for only one UDP port");
204 
205 		goto error;
206 	}
207 
208 	err = vnic_dev_overlay_offload_cfg(enic->vdev,
209 					   OVERLAY_CFG_VXLAN_PORT_UPDATE,
210 					   ntohs(port));
211 	if (err)
212 		goto error;
213 
214 	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
215 					    enic->vxlan.patch_level);
216 	if (err)
217 		goto error;
218 
219 	enic->vxlan.vxlan_udp_port_number = ntohs(port);
220 
221 	netdev_info(netdev, "vxlan fw-vers-%d: offload enabled for udp port: %d, sa_family: %d ",
222 		    (int)enic->vxlan.patch_level, ntohs(port), ti->sa_family);
223 
224 	goto unlock;
225 
226 error:
227 	netdev_info(netdev, "failed to offload udp port: %d, sa_family: %d, type: %d",
228 		    ntohs(port), ti->sa_family, ti->type);
229 unlock:
230 	spin_unlock_bh(&enic->devcmd_lock);
231 }
232 
233 static void enic_udp_tunnel_del(struct net_device *netdev,
234 				struct udp_tunnel_info *ti)
235 {
236 	struct enic *enic = netdev_priv(netdev);
237 	int err;
238 
239 	spin_lock_bh(&enic->devcmd_lock);
240 
241 	if ((ti->sa_family != AF_INET) ||
242 	    ((ntohs(ti->port) != enic->vxlan.vxlan_udp_port_number)) ||
243 	    (ti->type != UDP_TUNNEL_TYPE_VXLAN)) {
244 		netdev_info(netdev, "udp_tnl: port:%d, sa_family: %d, type: %d not offloaded",
245 			    ntohs(ti->port), ti->sa_family, ti->type);
246 		goto unlock;
247 	}
248 
249 	err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN,
250 					    OVERLAY_OFFLOAD_DISABLE);
251 	if (err) {
252 		netdev_err(netdev, "vxlan: del offload udp port: %d failed",
253 			   ntohs(ti->port));
254 		goto unlock;
255 	}
256 
257 	enic->vxlan.vxlan_udp_port_number = 0;
258 
259 	netdev_info(netdev, "vxlan: del offload udp port %d, family %d\n",
260 		    ntohs(ti->port), ti->sa_family);
261 
262 unlock:
263 	spin_unlock_bh(&enic->devcmd_lock);
264 }
265 
266 static netdev_features_t enic_features_check(struct sk_buff *skb,
267 					     struct net_device *dev,
268 					     netdev_features_t features)
269 {
270 	const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb);
271 	struct enic *enic = netdev_priv(dev);
272 	struct udphdr *udph;
273 	u16 port = 0;
274 	u16 proto;
275 
276 	if (!skb->encapsulation)
277 		return features;
278 
279 	features = vxlan_features_check(skb, features);
280 
281 	/* hardware only supports IPv4 vxlan tunnel */
282 	if (vlan_get_protocol(skb) != htons(ETH_P_IP))
283 		goto out;
284 
285 	/* hardware does not support offload of ipv6 inner pkt */
286 	if (eth->h_proto != ntohs(ETH_P_IP))
287 		goto out;
288 
289 	proto = ip_hdr(skb)->protocol;
290 
291 	if (proto == IPPROTO_UDP) {
292 		udph = udp_hdr(skb);
293 		port = be16_to_cpu(udph->dest);
294 	}
295 
296 	/* HW supports offload of only one UDP port. Remove CSUM and GSO MASK
297 	 * for other UDP port tunnels
298 	 */
299 	if (port  != enic->vxlan.vxlan_udp_port_number)
300 		goto out;
301 
302 	return features;
303 
304 out:
305 	return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
306 }
307 
308 int enic_is_dynamic(struct enic *enic)
309 {
310 	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
311 }
312 
313 int enic_sriov_enabled(struct enic *enic)
314 {
315 	return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
316 }
317 
318 static int enic_is_sriov_vf(struct enic *enic)
319 {
320 	return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
321 }
322 
323 int enic_is_valid_vf(struct enic *enic, int vf)
324 {
325 #ifdef CONFIG_PCI_IOV
326 	return vf >= 0 && vf < enic->num_vfs;
327 #else
328 	return 0;
329 #endif
330 }
331 
332 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
333 {
334 	struct enic *enic = vnic_dev_priv(wq->vdev);
335 
336 	if (buf->sop)
337 		pci_unmap_single(enic->pdev, buf->dma_addr,
338 			buf->len, PCI_DMA_TODEVICE);
339 	else
340 		pci_unmap_page(enic->pdev, buf->dma_addr,
341 			buf->len, PCI_DMA_TODEVICE);
342 
343 	if (buf->os_buf)
344 		dev_kfree_skb_any(buf->os_buf);
345 }
346 
347 static void enic_wq_free_buf(struct vnic_wq *wq,
348 	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
349 {
350 	enic_free_wq_buf(wq, buf);
351 }
352 
353 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
354 	u8 type, u16 q_number, u16 completed_index, void *opaque)
355 {
356 	struct enic *enic = vnic_dev_priv(vdev);
357 
358 	spin_lock(&enic->wq_lock[q_number]);
359 
360 	vnic_wq_service(&enic->wq[q_number], cq_desc,
361 		completed_index, enic_wq_free_buf,
362 		opaque);
363 
364 	if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
365 	    vnic_wq_desc_avail(&enic->wq[q_number]) >=
366 	    (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
367 		netif_wake_subqueue(enic->netdev, q_number);
368 
369 	spin_unlock(&enic->wq_lock[q_number]);
370 
371 	return 0;
372 }
373 
374 static bool enic_log_q_error(struct enic *enic)
375 {
376 	unsigned int i;
377 	u32 error_status;
378 	bool err = false;
379 
380 	for (i = 0; i < enic->wq_count; i++) {
381 		error_status = vnic_wq_error_status(&enic->wq[i]);
382 		err |= error_status;
383 		if (error_status)
384 			netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
385 				i, error_status);
386 	}
387 
388 	for (i = 0; i < enic->rq_count; i++) {
389 		error_status = vnic_rq_error_status(&enic->rq[i]);
390 		err |= error_status;
391 		if (error_status)
392 			netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
393 				i, error_status);
394 	}
395 
396 	return err;
397 }
398 
399 static void enic_msglvl_check(struct enic *enic)
400 {
401 	u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
402 
403 	if (msg_enable != enic->msg_enable) {
404 		netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
405 			enic->msg_enable, msg_enable);
406 		enic->msg_enable = msg_enable;
407 	}
408 }
409 
410 static void enic_mtu_check(struct enic *enic)
411 {
412 	u32 mtu = vnic_dev_mtu(enic->vdev);
413 	struct net_device *netdev = enic->netdev;
414 
415 	if (mtu && mtu != enic->port_mtu) {
416 		enic->port_mtu = mtu;
417 		if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
418 			mtu = max_t(int, ENIC_MIN_MTU,
419 				min_t(int, ENIC_MAX_MTU, mtu));
420 			if (mtu != netdev->mtu)
421 				schedule_work(&enic->change_mtu_work);
422 		} else {
423 			if (mtu < netdev->mtu)
424 				netdev_warn(netdev,
425 					"interface MTU (%d) set higher "
426 					"than switch port MTU (%d)\n",
427 					netdev->mtu, mtu);
428 		}
429 	}
430 }
431 
432 static void enic_link_check(struct enic *enic)
433 {
434 	int link_status = vnic_dev_link_status(enic->vdev);
435 	int carrier_ok = netif_carrier_ok(enic->netdev);
436 
437 	if (link_status && !carrier_ok) {
438 		netdev_info(enic->netdev, "Link UP\n");
439 		netif_carrier_on(enic->netdev);
440 	} else if (!link_status && carrier_ok) {
441 		netdev_info(enic->netdev, "Link DOWN\n");
442 		netif_carrier_off(enic->netdev);
443 	}
444 }
445 
446 static void enic_notify_check(struct enic *enic)
447 {
448 	enic_msglvl_check(enic);
449 	enic_mtu_check(enic);
450 	enic_link_check(enic);
451 }
452 
453 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
454 
455 static irqreturn_t enic_isr_legacy(int irq, void *data)
456 {
457 	struct net_device *netdev = data;
458 	struct enic *enic = netdev_priv(netdev);
459 	unsigned int io_intr = enic_legacy_io_intr();
460 	unsigned int err_intr = enic_legacy_err_intr();
461 	unsigned int notify_intr = enic_legacy_notify_intr();
462 	u32 pba;
463 
464 	vnic_intr_mask(&enic->intr[io_intr]);
465 
466 	pba = vnic_intr_legacy_pba(enic->legacy_pba);
467 	if (!pba) {
468 		vnic_intr_unmask(&enic->intr[io_intr]);
469 		return IRQ_NONE;	/* not our interrupt */
470 	}
471 
472 	if (ENIC_TEST_INTR(pba, notify_intr)) {
473 		enic_notify_check(enic);
474 		vnic_intr_return_all_credits(&enic->intr[notify_intr]);
475 	}
476 
477 	if (ENIC_TEST_INTR(pba, err_intr)) {
478 		vnic_intr_return_all_credits(&enic->intr[err_intr]);
479 		enic_log_q_error(enic);
480 		/* schedule recovery from WQ/RQ error */
481 		schedule_work(&enic->reset);
482 		return IRQ_HANDLED;
483 	}
484 
485 	if (ENIC_TEST_INTR(pba, io_intr))
486 		napi_schedule_irqoff(&enic->napi[0]);
487 	else
488 		vnic_intr_unmask(&enic->intr[io_intr]);
489 
490 	return IRQ_HANDLED;
491 }
492 
493 static irqreturn_t enic_isr_msi(int irq, void *data)
494 {
495 	struct enic *enic = data;
496 
497 	/* With MSI, there is no sharing of interrupts, so this is
498 	 * our interrupt and there is no need to ack it.  The device
499 	 * is not providing per-vector masking, so the OS will not
500 	 * write to PCI config space to mask/unmask the interrupt.
501 	 * We're using mask_on_assertion for MSI, so the device
502 	 * automatically masks the interrupt when the interrupt is
503 	 * generated.  Later, when exiting polling, the interrupt
504 	 * will be unmasked (see enic_poll).
505 	 *
506 	 * Also, the device uses the same PCIe Traffic Class (TC)
507 	 * for Memory Write data and MSI, so there are no ordering
508 	 * issues; the MSI will always arrive at the Root Complex
509 	 * _after_ corresponding Memory Writes (i.e. descriptor
510 	 * writes).
511 	 */
512 
513 	napi_schedule_irqoff(&enic->napi[0]);
514 
515 	return IRQ_HANDLED;
516 }
517 
518 static irqreturn_t enic_isr_msix(int irq, void *data)
519 {
520 	struct napi_struct *napi = data;
521 
522 	napi_schedule_irqoff(napi);
523 
524 	return IRQ_HANDLED;
525 }
526 
527 static irqreturn_t enic_isr_msix_err(int irq, void *data)
528 {
529 	struct enic *enic = data;
530 	unsigned int intr = enic_msix_err_intr(enic);
531 
532 	vnic_intr_return_all_credits(&enic->intr[intr]);
533 
534 	if (enic_log_q_error(enic))
535 		/* schedule recovery from WQ/RQ error */
536 		schedule_work(&enic->reset);
537 
538 	return IRQ_HANDLED;
539 }
540 
541 static irqreturn_t enic_isr_msix_notify(int irq, void *data)
542 {
543 	struct enic *enic = data;
544 	unsigned int intr = enic_msix_notify_intr(enic);
545 
546 	enic_notify_check(enic);
547 	vnic_intr_return_all_credits(&enic->intr[intr]);
548 
549 	return IRQ_HANDLED;
550 }
551 
552 static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq,
553 				  struct sk_buff *skb, unsigned int len_left,
554 				  int loopback)
555 {
556 	const skb_frag_t *frag;
557 	dma_addr_t dma_addr;
558 
559 	/* Queue additional data fragments */
560 	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
561 		len_left -= skb_frag_size(frag);
562 		dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0,
563 					    skb_frag_size(frag),
564 					    DMA_TO_DEVICE);
565 		if (unlikely(enic_dma_map_check(enic, dma_addr)))
566 			return -ENOMEM;
567 		enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag),
568 					(len_left == 0),	/* EOP? */
569 					loopback);
570 	}
571 
572 	return 0;
573 }
574 
575 static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,
576 				  struct sk_buff *skb, int vlan_tag_insert,
577 				  unsigned int vlan_tag, int loopback)
578 {
579 	unsigned int head_len = skb_headlen(skb);
580 	unsigned int len_left = skb->len - head_len;
581 	int eop = (len_left == 0);
582 	dma_addr_t dma_addr;
583 	int err = 0;
584 
585 	dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
586 				  PCI_DMA_TODEVICE);
587 	if (unlikely(enic_dma_map_check(enic, dma_addr)))
588 		return -ENOMEM;
589 
590 	/* Queue the main skb fragment. The fragments are no larger
591 	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
592 	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
593 	 * per fragment is queued.
594 	 */
595 	enic_queue_wq_desc(wq, skb, dma_addr, head_len,	vlan_tag_insert,
596 			   vlan_tag, eop, loopback);
597 
598 	if (!eop)
599 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
600 
601 	return err;
602 }
603 
604 static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,
605 				     struct sk_buff *skb, int vlan_tag_insert,
606 				     unsigned int vlan_tag, int loopback)
607 {
608 	unsigned int head_len = skb_headlen(skb);
609 	unsigned int len_left = skb->len - head_len;
610 	unsigned int hdr_len = skb_checksum_start_offset(skb);
611 	unsigned int csum_offset = hdr_len + skb->csum_offset;
612 	int eop = (len_left == 0);
613 	dma_addr_t dma_addr;
614 	int err = 0;
615 
616 	dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
617 				  PCI_DMA_TODEVICE);
618 	if (unlikely(enic_dma_map_check(enic, dma_addr)))
619 		return -ENOMEM;
620 
621 	/* Queue the main skb fragment. The fragments are no larger
622 	 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
623 	 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
624 	 * per fragment is queued.
625 	 */
626 	enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len,	csum_offset,
627 				   hdr_len, vlan_tag_insert, vlan_tag, eop,
628 				   loopback);
629 
630 	if (!eop)
631 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
632 
633 	return err;
634 }
635 
636 static void enic_preload_tcp_csum_encap(struct sk_buff *skb)
637 {
638 	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
639 		inner_ip_hdr(skb)->check = 0;
640 		inner_tcp_hdr(skb)->check =
641 			~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr,
642 					   inner_ip_hdr(skb)->daddr, 0,
643 					   IPPROTO_TCP, 0);
644 	}
645 }
646 
647 static void enic_preload_tcp_csum(struct sk_buff *skb)
648 {
649 	/* Preload TCP csum field with IP pseudo hdr calculated
650 	 * with IP length set to zero.  HW will later add in length
651 	 * to each TCP segment resulting from the TSO.
652 	 */
653 
654 	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
655 		ip_hdr(skb)->check = 0;
656 		tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
657 			ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
658 	} else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
659 		tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
660 			&ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
661 	}
662 }
663 
664 static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,
665 				 struct sk_buff *skb, unsigned int mss,
666 				 int vlan_tag_insert, unsigned int vlan_tag,
667 				 int loopback)
668 {
669 	unsigned int frag_len_left = skb_headlen(skb);
670 	unsigned int len_left = skb->len - frag_len_left;
671 	int eop = (len_left == 0);
672 	unsigned int offset = 0;
673 	unsigned int hdr_len;
674 	dma_addr_t dma_addr;
675 	unsigned int len;
676 	skb_frag_t *frag;
677 
678 	if (skb->encapsulation) {
679 		hdr_len = skb_inner_transport_header(skb) - skb->data;
680 		hdr_len += inner_tcp_hdrlen(skb);
681 		enic_preload_tcp_csum_encap(skb);
682 	} else {
683 		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
684 		enic_preload_tcp_csum(skb);
685 	}
686 
687 	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
688 	 * for the main skb fragment
689 	 */
690 	while (frag_len_left) {
691 		len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
692 		dma_addr = pci_map_single(enic->pdev, skb->data + offset, len,
693 					  PCI_DMA_TODEVICE);
694 		if (unlikely(enic_dma_map_check(enic, dma_addr)))
695 			return -ENOMEM;
696 		enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len,
697 				       vlan_tag_insert, vlan_tag,
698 				       eop && (len == frag_len_left), loopback);
699 		frag_len_left -= len;
700 		offset += len;
701 	}
702 
703 	if (eop)
704 		return 0;
705 
706 	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors
707 	 * for additional data fragments
708 	 */
709 	for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
710 		len_left -= skb_frag_size(frag);
711 		frag_len_left = skb_frag_size(frag);
712 		offset = 0;
713 
714 		while (frag_len_left) {
715 			len = min(frag_len_left,
716 				(unsigned int)WQ_ENET_MAX_DESC_LEN);
717 			dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
718 						    offset, len,
719 						    DMA_TO_DEVICE);
720 			if (unlikely(enic_dma_map_check(enic, dma_addr)))
721 				return -ENOMEM;
722 			enic_queue_wq_desc_cont(wq, skb, dma_addr, len,
723 						(len_left == 0) &&
724 						 (len == frag_len_left),/*EOP*/
725 						loopback);
726 			frag_len_left -= len;
727 			offset += len;
728 		}
729 	}
730 
731 	return 0;
732 }
733 
734 static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq,
735 					  struct sk_buff *skb,
736 					  int vlan_tag_insert,
737 					  unsigned int vlan_tag, int loopback)
738 {
739 	unsigned int head_len = skb_headlen(skb);
740 	unsigned int len_left = skb->len - head_len;
741 	/* Hardware will overwrite the checksum fields, calculating from
742 	 * scratch and ignoring the value placed by software.
743 	 * Offload mode = 00
744 	 * mss[2], mss[1], mss[0] bits are set
745 	 */
746 	unsigned int mss_or_csum = 7;
747 	int eop = (len_left == 0);
748 	dma_addr_t dma_addr;
749 	int err = 0;
750 
751 	dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
752 				  PCI_DMA_TODEVICE);
753 	if (unlikely(enic_dma_map_check(enic, dma_addr)))
754 		return -ENOMEM;
755 
756 	enic_queue_wq_desc_ex(wq, skb, dma_addr, head_len, mss_or_csum, 0,
757 			      vlan_tag_insert, vlan_tag,
758 			      WQ_ENET_OFFLOAD_MODE_CSUM, eop, 1 /* SOP */, eop,
759 			      loopback);
760 	if (!eop)
761 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
762 
763 	return err;
764 }
765 
766 static inline void enic_queue_wq_skb(struct enic *enic,
767 	struct vnic_wq *wq, struct sk_buff *skb)
768 {
769 	unsigned int mss = skb_shinfo(skb)->gso_size;
770 	unsigned int vlan_tag = 0;
771 	int vlan_tag_insert = 0;
772 	int loopback = 0;
773 	int err;
774 
775 	if (skb_vlan_tag_present(skb)) {
776 		/* VLAN tag from trunking driver */
777 		vlan_tag_insert = 1;
778 		vlan_tag = skb_vlan_tag_get(skb);
779 	} else if (enic->loop_enable) {
780 		vlan_tag = enic->loop_tag;
781 		loopback = 1;
782 	}
783 
784 	if (mss)
785 		err = enic_queue_wq_skb_tso(enic, wq, skb, mss,
786 					    vlan_tag_insert, vlan_tag,
787 					    loopback);
788 	else if (skb->encapsulation)
789 		err = enic_queue_wq_skb_encap(enic, wq, skb, vlan_tag_insert,
790 					      vlan_tag, loopback);
791 	else if	(skb->ip_summed == CHECKSUM_PARTIAL)
792 		err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert,
793 						vlan_tag, loopback);
794 	else
795 		err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert,
796 					     vlan_tag, loopback);
797 	if (unlikely(err)) {
798 		struct vnic_wq_buf *buf;
799 
800 		buf = wq->to_use->prev;
801 		/* while not EOP of previous pkt && queue not empty.
802 		 * For all non EOP bufs, os_buf is NULL.
803 		 */
804 		while (!buf->os_buf && (buf->next != wq->to_clean)) {
805 			enic_free_wq_buf(wq, buf);
806 			wq->ring.desc_avail++;
807 			buf = buf->prev;
808 		}
809 		wq->to_use = buf->next;
810 		dev_kfree_skb(skb);
811 	}
812 }
813 
814 /* netif_tx_lock held, process context with BHs disabled, or BH */
815 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
816 	struct net_device *netdev)
817 {
818 	struct enic *enic = netdev_priv(netdev);
819 	struct vnic_wq *wq;
820 	unsigned int txq_map;
821 	struct netdev_queue *txq;
822 
823 	if (skb->len <= 0) {
824 		dev_kfree_skb_any(skb);
825 		return NETDEV_TX_OK;
826 	}
827 
828 	txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
829 	wq = &enic->wq[txq_map];
830 	txq = netdev_get_tx_queue(netdev, txq_map);
831 
832 	/* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
833 	 * which is very likely.  In the off chance it's going to take
834 	 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
835 	 */
836 
837 	if (skb_shinfo(skb)->gso_size == 0 &&
838 	    skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
839 	    skb_linearize(skb)) {
840 		dev_kfree_skb_any(skb);
841 		return NETDEV_TX_OK;
842 	}
843 
844 	spin_lock(&enic->wq_lock[txq_map]);
845 
846 	if (vnic_wq_desc_avail(wq) <
847 	    skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
848 		netif_tx_stop_queue(txq);
849 		/* This is a hard error, log it */
850 		netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
851 		spin_unlock(&enic->wq_lock[txq_map]);
852 		return NETDEV_TX_BUSY;
853 	}
854 
855 	enic_queue_wq_skb(enic, wq, skb);
856 
857 	if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
858 		netif_tx_stop_queue(txq);
859 	skb_tx_timestamp(skb);
860 	if (!skb->xmit_more || netif_xmit_stopped(txq))
861 		vnic_wq_doorbell(wq);
862 
863 	spin_unlock(&enic->wq_lock[txq_map]);
864 
865 	return NETDEV_TX_OK;
866 }
867 
868 /* dev_base_lock rwlock held, nominally process context */
869 static void enic_get_stats(struct net_device *netdev,
870 			   struct rtnl_link_stats64 *net_stats)
871 {
872 	struct enic *enic = netdev_priv(netdev);
873 	struct vnic_stats *stats;
874 	int err;
875 
876 	err = enic_dev_stats_dump(enic, &stats);
877 	/* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump
878 	 * For other failures, like devcmd failure, we return previously
879 	 * recorded stats.
880 	 */
881 	if (err == -ENOMEM)
882 		return;
883 
884 	net_stats->tx_packets = stats->tx.tx_frames_ok;
885 	net_stats->tx_bytes = stats->tx.tx_bytes_ok;
886 	net_stats->tx_errors = stats->tx.tx_errors;
887 	net_stats->tx_dropped = stats->tx.tx_drops;
888 
889 	net_stats->rx_packets = stats->rx.rx_frames_ok;
890 	net_stats->rx_bytes = stats->rx.rx_bytes_ok;
891 	net_stats->rx_errors = stats->rx.rx_errors;
892 	net_stats->multicast = stats->rx.rx_multicast_frames_ok;
893 	net_stats->rx_over_errors = enic->rq_truncated_pkts;
894 	net_stats->rx_crc_errors = enic->rq_bad_fcs;
895 	net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
896 }
897 
898 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
899 {
900 	struct enic *enic = netdev_priv(netdev);
901 
902 	if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
903 		unsigned int mc_count = netdev_mc_count(netdev);
904 
905 		netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
906 			    ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
907 
908 		return -ENOSPC;
909 	}
910 
911 	enic_dev_add_addr(enic, mc_addr);
912 	enic->mc_count++;
913 
914 	return 0;
915 }
916 
917 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
918 {
919 	struct enic *enic = netdev_priv(netdev);
920 
921 	enic_dev_del_addr(enic, mc_addr);
922 	enic->mc_count--;
923 
924 	return 0;
925 }
926 
927 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
928 {
929 	struct enic *enic = netdev_priv(netdev);
930 
931 	if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
932 		unsigned int uc_count = netdev_uc_count(netdev);
933 
934 		netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
935 			    ENIC_UNICAST_PERFECT_FILTERS, uc_count);
936 
937 		return -ENOSPC;
938 	}
939 
940 	enic_dev_add_addr(enic, uc_addr);
941 	enic->uc_count++;
942 
943 	return 0;
944 }
945 
946 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
947 {
948 	struct enic *enic = netdev_priv(netdev);
949 
950 	enic_dev_del_addr(enic, uc_addr);
951 	enic->uc_count--;
952 
953 	return 0;
954 }
955 
956 void enic_reset_addr_lists(struct enic *enic)
957 {
958 	struct net_device *netdev = enic->netdev;
959 
960 	__dev_uc_unsync(netdev, NULL);
961 	__dev_mc_unsync(netdev, NULL);
962 
963 	enic->mc_count = 0;
964 	enic->uc_count = 0;
965 	enic->flags = 0;
966 }
967 
968 static int enic_set_mac_addr(struct net_device *netdev, char *addr)
969 {
970 	struct enic *enic = netdev_priv(netdev);
971 
972 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
973 		if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
974 			return -EADDRNOTAVAIL;
975 	} else {
976 		if (!is_valid_ether_addr(addr))
977 			return -EADDRNOTAVAIL;
978 	}
979 
980 	memcpy(netdev->dev_addr, addr, netdev->addr_len);
981 
982 	return 0;
983 }
984 
985 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
986 {
987 	struct enic *enic = netdev_priv(netdev);
988 	struct sockaddr *saddr = p;
989 	char *addr = saddr->sa_data;
990 	int err;
991 
992 	if (netif_running(enic->netdev)) {
993 		err = enic_dev_del_station_addr(enic);
994 		if (err)
995 			return err;
996 	}
997 
998 	err = enic_set_mac_addr(netdev, addr);
999 	if (err)
1000 		return err;
1001 
1002 	if (netif_running(enic->netdev)) {
1003 		err = enic_dev_add_station_addr(enic);
1004 		if (err)
1005 			return err;
1006 	}
1007 
1008 	return err;
1009 }
1010 
1011 static int enic_set_mac_address(struct net_device *netdev, void *p)
1012 {
1013 	struct sockaddr *saddr = p;
1014 	char *addr = saddr->sa_data;
1015 	struct enic *enic = netdev_priv(netdev);
1016 	int err;
1017 
1018 	err = enic_dev_del_station_addr(enic);
1019 	if (err)
1020 		return err;
1021 
1022 	err = enic_set_mac_addr(netdev, addr);
1023 	if (err)
1024 		return err;
1025 
1026 	return enic_dev_add_station_addr(enic);
1027 }
1028 
1029 /* netif_tx_lock held, BHs disabled */
1030 static void enic_set_rx_mode(struct net_device *netdev)
1031 {
1032 	struct enic *enic = netdev_priv(netdev);
1033 	int directed = 1;
1034 	int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1035 	int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1036 	int promisc = (netdev->flags & IFF_PROMISC) ||
1037 		netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1038 	int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1039 		netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1040 	unsigned int flags = netdev->flags |
1041 		(allmulti ? IFF_ALLMULTI : 0) |
1042 		(promisc ? IFF_PROMISC : 0);
1043 
1044 	if (enic->flags != flags) {
1045 		enic->flags = flags;
1046 		enic_dev_packet_filter(enic, directed,
1047 			multicast, broadcast, promisc, allmulti);
1048 	}
1049 
1050 	if (!promisc) {
1051 		__dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
1052 		if (!allmulti)
1053 			__dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
1054 	}
1055 }
1056 
1057 /* netif_tx_lock held, BHs disabled */
1058 static void enic_tx_timeout(struct net_device *netdev)
1059 {
1060 	struct enic *enic = netdev_priv(netdev);
1061 	schedule_work(&enic->tx_hang_reset);
1062 }
1063 
1064 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1065 {
1066 	struct enic *enic = netdev_priv(netdev);
1067 	struct enic_port_profile *pp;
1068 	int err;
1069 
1070 	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1071 	if (err)
1072 		return err;
1073 
1074 	if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
1075 		if (vf == PORT_SELF_VF) {
1076 			memcpy(pp->vf_mac, mac, ETH_ALEN);
1077 			return 0;
1078 		} else {
1079 			/*
1080 			 * For sriov vf's set the mac in hw
1081 			 */
1082 			ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1083 				vnic_dev_set_mac_addr, mac);
1084 			return enic_dev_status_to_errno(err);
1085 		}
1086 	} else
1087 		return -EINVAL;
1088 }
1089 
1090 static int enic_set_vf_port(struct net_device *netdev, int vf,
1091 	struct nlattr *port[])
1092 {
1093 	struct enic *enic = netdev_priv(netdev);
1094 	struct enic_port_profile prev_pp;
1095 	struct enic_port_profile *pp;
1096 	int err = 0, restore_pp = 1;
1097 
1098 	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1099 	if (err)
1100 		return err;
1101 
1102 	if (!port[IFLA_PORT_REQUEST])
1103 		return -EOPNOTSUPP;
1104 
1105 	memcpy(&prev_pp, pp, sizeof(*enic->pp));
1106 	memset(pp, 0, sizeof(*enic->pp));
1107 
1108 	pp->set |= ENIC_SET_REQUEST;
1109 	pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1110 
1111 	if (port[IFLA_PORT_PROFILE]) {
1112 		pp->set |= ENIC_SET_NAME;
1113 		memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
1114 			PORT_PROFILE_MAX);
1115 	}
1116 
1117 	if (port[IFLA_PORT_INSTANCE_UUID]) {
1118 		pp->set |= ENIC_SET_INSTANCE;
1119 		memcpy(pp->instance_uuid,
1120 			nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1121 	}
1122 
1123 	if (port[IFLA_PORT_HOST_UUID]) {
1124 		pp->set |= ENIC_SET_HOST;
1125 		memcpy(pp->host_uuid,
1126 			nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1127 	}
1128 
1129 	if (vf == PORT_SELF_VF) {
1130 		/* Special case handling: mac came from IFLA_VF_MAC */
1131 		if (!is_zero_ether_addr(prev_pp.vf_mac))
1132 			memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
1133 
1134 		if (is_zero_ether_addr(netdev->dev_addr))
1135 			eth_hw_addr_random(netdev);
1136 	} else {
1137 		/* SR-IOV VF: get mac from adapter */
1138 		ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
1139 			vnic_dev_get_mac_addr, pp->mac_addr);
1140 		if (err) {
1141 			netdev_err(netdev, "Error getting mac for vf %d\n", vf);
1142 			memcpy(pp, &prev_pp, sizeof(*pp));
1143 			return enic_dev_status_to_errno(err);
1144 		}
1145 	}
1146 
1147 	err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
1148 	if (err) {
1149 		if (restore_pp) {
1150 			/* Things are still the way they were: Implicit
1151 			 * DISASSOCIATE failed
1152 			 */
1153 			memcpy(pp, &prev_pp, sizeof(*pp));
1154 		} else {
1155 			memset(pp, 0, sizeof(*pp));
1156 			if (vf == PORT_SELF_VF)
1157 				eth_zero_addr(netdev->dev_addr);
1158 		}
1159 	} else {
1160 		/* Set flag to indicate that the port assoc/disassoc
1161 		 * request has been sent out to fw
1162 		 */
1163 		pp->set |= ENIC_PORT_REQUEST_APPLIED;
1164 
1165 		/* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1166 		if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1167 			eth_zero_addr(pp->mac_addr);
1168 			if (vf == PORT_SELF_VF)
1169 				eth_zero_addr(netdev->dev_addr);
1170 		}
1171 	}
1172 
1173 	if (vf == PORT_SELF_VF)
1174 		eth_zero_addr(pp->vf_mac);
1175 
1176 	return err;
1177 }
1178 
1179 static int enic_get_vf_port(struct net_device *netdev, int vf,
1180 	struct sk_buff *skb)
1181 {
1182 	struct enic *enic = netdev_priv(netdev);
1183 	u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1184 	struct enic_port_profile *pp;
1185 	int err;
1186 
1187 	ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1188 	if (err)
1189 		return err;
1190 
1191 	if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
1192 		return -ENODATA;
1193 
1194 	err = enic_process_get_pp_request(enic, vf, pp->request, &response);
1195 	if (err)
1196 		return err;
1197 
1198 	if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
1199 	    nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
1200 	    ((pp->set & ENIC_SET_NAME) &&
1201 	     nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
1202 	    ((pp->set & ENIC_SET_INSTANCE) &&
1203 	     nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1204 		     pp->instance_uuid)) ||
1205 	    ((pp->set & ENIC_SET_HOST) &&
1206 	     nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
1207 		goto nla_put_failure;
1208 	return 0;
1209 
1210 nla_put_failure:
1211 	return -EMSGSIZE;
1212 }
1213 
1214 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1215 {
1216 	struct enic *enic = vnic_dev_priv(rq->vdev);
1217 
1218 	if (!buf->os_buf)
1219 		return;
1220 
1221 	pci_unmap_single(enic->pdev, buf->dma_addr,
1222 		buf->len, PCI_DMA_FROMDEVICE);
1223 	dev_kfree_skb_any(buf->os_buf);
1224 	buf->os_buf = NULL;
1225 }
1226 
1227 static int enic_rq_alloc_buf(struct vnic_rq *rq)
1228 {
1229 	struct enic *enic = vnic_dev_priv(rq->vdev);
1230 	struct net_device *netdev = enic->netdev;
1231 	struct sk_buff *skb;
1232 	unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
1233 	unsigned int os_buf_index = 0;
1234 	dma_addr_t dma_addr;
1235 	struct vnic_rq_buf *buf = rq->to_use;
1236 
1237 	if (buf->os_buf) {
1238 		enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr,
1239 				   buf->len);
1240 
1241 		return 0;
1242 	}
1243 	skb = netdev_alloc_skb_ip_align(netdev, len);
1244 	if (!skb)
1245 		return -ENOMEM;
1246 
1247 	dma_addr = pci_map_single(enic->pdev, skb->data, len,
1248 				  PCI_DMA_FROMDEVICE);
1249 	if (unlikely(enic_dma_map_check(enic, dma_addr))) {
1250 		dev_kfree_skb(skb);
1251 		return -ENOMEM;
1252 	}
1253 
1254 	enic_queue_rq_desc(rq, skb, os_buf_index,
1255 		dma_addr, len);
1256 
1257 	return 0;
1258 }
1259 
1260 static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
1261 				      u32 pkt_len)
1262 {
1263 	if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
1264 		pkt_size->large_pkt_bytes_cnt += pkt_len;
1265 	else
1266 		pkt_size->small_pkt_bytes_cnt += pkt_len;
1267 }
1268 
1269 static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,
1270 			     struct vnic_rq_buf *buf, u16 len)
1271 {
1272 	struct enic *enic = netdev_priv(netdev);
1273 	struct sk_buff *new_skb;
1274 
1275 	if (len > enic->rx_copybreak)
1276 		return false;
1277 	new_skb = netdev_alloc_skb_ip_align(netdev, len);
1278 	if (!new_skb)
1279 		return false;
1280 	pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len,
1281 				    DMA_FROM_DEVICE);
1282 	memcpy(new_skb->data, (*skb)->data, len);
1283 	*skb = new_skb;
1284 
1285 	return true;
1286 }
1287 
1288 static void enic_rq_indicate_buf(struct vnic_rq *rq,
1289 	struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1290 	int skipped, void *opaque)
1291 {
1292 	struct enic *enic = vnic_dev_priv(rq->vdev);
1293 	struct net_device *netdev = enic->netdev;
1294 	struct sk_buff *skb;
1295 	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1296 
1297 	u8 type, color, eop, sop, ingress_port, vlan_stripped;
1298 	u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1299 	u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1300 	u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1301 	u8 packet_error;
1302 	u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
1303 	u32 rss_hash;
1304 	bool outer_csum_ok = true, encap = false;
1305 
1306 	if (skipped)
1307 		return;
1308 
1309 	skb = buf->os_buf;
1310 
1311 	cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1312 		&type, &color, &q_number, &completed_index,
1313 		&ingress_port, &fcoe, &eop, &sop, &rss_type,
1314 		&csum_not_calc, &rss_hash, &bytes_written,
1315 		&packet_error, &vlan_stripped, &vlan_tci, &checksum,
1316 		&fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1317 		&fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1318 		&ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1319 		&fcs_ok);
1320 
1321 	if (packet_error) {
1322 
1323 		if (!fcs_ok) {
1324 			if (bytes_written > 0)
1325 				enic->rq_bad_fcs++;
1326 			else if (bytes_written == 0)
1327 				enic->rq_truncated_pkts++;
1328 		}
1329 
1330 		pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
1331 				 PCI_DMA_FROMDEVICE);
1332 		dev_kfree_skb_any(skb);
1333 		buf->os_buf = NULL;
1334 
1335 		return;
1336 	}
1337 
1338 	if (eop && bytes_written > 0) {
1339 
1340 		/* Good receive
1341 		 */
1342 
1343 		if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) {
1344 			buf->os_buf = NULL;
1345 			pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
1346 					 PCI_DMA_FROMDEVICE);
1347 		}
1348 		prefetch(skb->data - NET_IP_ALIGN);
1349 
1350 		skb_put(skb, bytes_written);
1351 		skb->protocol = eth_type_trans(skb, netdev);
1352 		skb_record_rx_queue(skb, q_number);
1353 		if ((netdev->features & NETIF_F_RXHASH) && rss_hash &&
1354 		    (type == 3)) {
1355 			switch (rss_type) {
1356 			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4:
1357 			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6:
1358 			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX:
1359 				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4);
1360 				break;
1361 			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4:
1362 			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6:
1363 			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX:
1364 				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3);
1365 				break;
1366 			}
1367 		}
1368 		if (enic->vxlan.vxlan_udp_port_number) {
1369 			switch (enic->vxlan.patch_level) {
1370 			case 0:
1371 				if (fcoe) {
1372 					encap = true;
1373 					outer_csum_ok = fcoe_fc_crc_ok;
1374 				}
1375 				break;
1376 			case 2:
1377 				if ((type == 7) &&
1378 				    (rss_hash & BIT(0))) {
1379 					encap = true;
1380 					outer_csum_ok = (rss_hash & BIT(1)) &&
1381 							(rss_hash & BIT(2));
1382 				}
1383 				break;
1384 			}
1385 		}
1386 
1387 		/* Hardware does not provide whole packet checksum. It only
1388 		 * provides pseudo checksum. Since hw validates the packet
1389 		 * checksum but not provide us the checksum value. use
1390 		 * CHECSUM_UNNECESSARY.
1391 		 *
1392 		 * In case of encap pkt tcp_udp_csum_ok/tcp_udp_csum_ok is
1393 		 * inner csum_ok. outer_csum_ok is set by hw when outer udp
1394 		 * csum is correct or is zero.
1395 		 */
1396 		if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc &&
1397 		    tcp_udp_csum_ok && ipv4_csum_ok && outer_csum_ok) {
1398 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1399 			skb->csum_level = encap;
1400 		}
1401 
1402 		if (vlan_stripped)
1403 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
1404 
1405 		skb_mark_napi_id(skb, &enic->napi[rq->index]);
1406 		if (!(netdev->features & NETIF_F_GRO))
1407 			netif_receive_skb(skb);
1408 		else
1409 			napi_gro_receive(&enic->napi[q_number], skb);
1410 		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1411 			enic_intr_update_pkt_size(&cq->pkt_size_counter,
1412 						  bytes_written);
1413 	} else {
1414 
1415 		/* Buffer overflow
1416 		 */
1417 
1418 		pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
1419 				 PCI_DMA_FROMDEVICE);
1420 		dev_kfree_skb_any(skb);
1421 		buf->os_buf = NULL;
1422 	}
1423 }
1424 
1425 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1426 	u8 type, u16 q_number, u16 completed_index, void *opaque)
1427 {
1428 	struct enic *enic = vnic_dev_priv(vdev);
1429 
1430 	vnic_rq_service(&enic->rq[q_number], cq_desc,
1431 		completed_index, VNIC_RQ_RETURN_DESC,
1432 		enic_rq_indicate_buf, opaque);
1433 
1434 	return 0;
1435 }
1436 
1437 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
1438 {
1439 	unsigned int intr = enic_msix_rq_intr(enic, rq->index);
1440 	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1441 	u32 timer = cq->tobe_rx_coal_timeval;
1442 
1443 	if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
1444 		vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
1445 		cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
1446 	}
1447 }
1448 
1449 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
1450 {
1451 	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1452 	struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
1453 	struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
1454 	int index;
1455 	u32 timer;
1456 	u32 range_start;
1457 	u32 traffic;
1458 	u64 delta;
1459 	ktime_t now = ktime_get();
1460 
1461 	delta = ktime_us_delta(now, cq->prev_ts);
1462 	if (delta < ENIC_AIC_TS_BREAK)
1463 		return;
1464 	cq->prev_ts = now;
1465 
1466 	traffic = pkt_size_counter->large_pkt_bytes_cnt +
1467 		  pkt_size_counter->small_pkt_bytes_cnt;
1468 	/* The table takes Mbps
1469 	 * traffic *= 8    => bits
1470 	 * traffic *= (10^6 / delta)    => bps
1471 	 * traffic /= 10^6     => Mbps
1472 	 *
1473 	 * Combining, traffic *= (8 / delta)
1474 	 */
1475 
1476 	traffic <<= 3;
1477 	traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;
1478 
1479 	for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
1480 		if (traffic < mod_table[index].rx_rate)
1481 			break;
1482 	range_start = (pkt_size_counter->small_pkt_bytes_cnt >
1483 		       pkt_size_counter->large_pkt_bytes_cnt << 1) ?
1484 		      rx_coal->small_pkt_range_start :
1485 		      rx_coal->large_pkt_range_start;
1486 	timer = range_start + ((rx_coal->range_end - range_start) *
1487 			       mod_table[index].range_percent / 100);
1488 	/* Damping */
1489 	cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;
1490 
1491 	pkt_size_counter->large_pkt_bytes_cnt = 0;
1492 	pkt_size_counter->small_pkt_bytes_cnt = 0;
1493 }
1494 
1495 static int enic_poll(struct napi_struct *napi, int budget)
1496 {
1497 	struct net_device *netdev = napi->dev;
1498 	struct enic *enic = netdev_priv(netdev);
1499 	unsigned int cq_rq = enic_cq_rq(enic, 0);
1500 	unsigned int cq_wq = enic_cq_wq(enic, 0);
1501 	unsigned int intr = enic_legacy_io_intr();
1502 	unsigned int rq_work_to_do = budget;
1503 	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
1504 	unsigned int  work_done, rq_work_done = 0, wq_work_done;
1505 	int err;
1506 
1507 	wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
1508 				       enic_wq_service, NULL);
1509 
1510 	if (budget > 0)
1511 		rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
1512 			rq_work_to_do, enic_rq_service, NULL);
1513 
1514 	/* Accumulate intr event credits for this polling
1515 	 * cycle.  An intr event is the completion of a
1516 	 * a WQ or RQ packet.
1517 	 */
1518 
1519 	work_done = rq_work_done + wq_work_done;
1520 
1521 	if (work_done > 0)
1522 		vnic_intr_return_credits(&enic->intr[intr],
1523 			work_done,
1524 			0 /* don't unmask intr */,
1525 			0 /* don't reset intr timer */);
1526 
1527 	err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1528 
1529 	/* Buffer allocation failed. Stay in polling
1530 	 * mode so we can try to fill the ring again.
1531 	 */
1532 
1533 	if (err)
1534 		rq_work_done = rq_work_to_do;
1535 	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1536 		/* Call the function which refreshes the intr coalescing timer
1537 		 * value based on the traffic.
1538 		 */
1539 		enic_calc_int_moderation(enic, &enic->rq[0]);
1540 
1541 	if ((rq_work_done < budget) && napi_complete_done(napi, rq_work_done)) {
1542 
1543 		/* Some work done, but not enough to stay in polling,
1544 		 * exit polling
1545 		 */
1546 
1547 		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1548 			enic_set_int_moderation(enic, &enic->rq[0]);
1549 		vnic_intr_unmask(&enic->intr[intr]);
1550 	}
1551 
1552 	return rq_work_done;
1553 }
1554 
1555 #ifdef CONFIG_RFS_ACCEL
1556 static void enic_free_rx_cpu_rmap(struct enic *enic)
1557 {
1558 	free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
1559 	enic->netdev->rx_cpu_rmap = NULL;
1560 }
1561 
1562 static void enic_set_rx_cpu_rmap(struct enic *enic)
1563 {
1564 	int i, res;
1565 
1566 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
1567 		enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
1568 		if (unlikely(!enic->netdev->rx_cpu_rmap))
1569 			return;
1570 		for (i = 0; i < enic->rq_count; i++) {
1571 			res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
1572 					       enic->msix_entry[i].vector);
1573 			if (unlikely(res)) {
1574 				enic_free_rx_cpu_rmap(enic);
1575 				return;
1576 			}
1577 		}
1578 	}
1579 }
1580 
1581 #else
1582 
1583 static void enic_free_rx_cpu_rmap(struct enic *enic)
1584 {
1585 }
1586 
1587 static void enic_set_rx_cpu_rmap(struct enic *enic)
1588 {
1589 }
1590 
1591 #endif /* CONFIG_RFS_ACCEL */
1592 
1593 static int enic_poll_msix_wq(struct napi_struct *napi, int budget)
1594 {
1595 	struct net_device *netdev = napi->dev;
1596 	struct enic *enic = netdev_priv(netdev);
1597 	unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count;
1598 	struct vnic_wq *wq = &enic->wq[wq_index];
1599 	unsigned int cq;
1600 	unsigned int intr;
1601 	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;
1602 	unsigned int wq_work_done;
1603 	unsigned int wq_irq;
1604 
1605 	wq_irq = wq->index;
1606 	cq = enic_cq_wq(enic, wq_irq);
1607 	intr = enic_msix_wq_intr(enic, wq_irq);
1608 	wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do,
1609 				       enic_wq_service, NULL);
1610 
1611 	vnic_intr_return_credits(&enic->intr[intr], wq_work_done,
1612 				 0 /* don't unmask intr */,
1613 				 1 /* reset intr timer */);
1614 	if (!wq_work_done) {
1615 		napi_complete(napi);
1616 		vnic_intr_unmask(&enic->intr[intr]);
1617 		return 0;
1618 	}
1619 
1620 	return budget;
1621 }
1622 
1623 static int enic_poll_msix_rq(struct napi_struct *napi, int budget)
1624 {
1625 	struct net_device *netdev = napi->dev;
1626 	struct enic *enic = netdev_priv(netdev);
1627 	unsigned int rq = (napi - &enic->napi[0]);
1628 	unsigned int cq = enic_cq_rq(enic, rq);
1629 	unsigned int intr = enic_msix_rq_intr(enic, rq);
1630 	unsigned int work_to_do = budget;
1631 	unsigned int work_done = 0;
1632 	int err;
1633 
1634 	/* Service RQ
1635 	 */
1636 
1637 	if (budget > 0)
1638 		work_done = vnic_cq_service(&enic->cq[cq],
1639 			work_to_do, enic_rq_service, NULL);
1640 
1641 	/* Return intr event credits for this polling
1642 	 * cycle.  An intr event is the completion of a
1643 	 * RQ packet.
1644 	 */
1645 
1646 	if (work_done > 0)
1647 		vnic_intr_return_credits(&enic->intr[intr],
1648 			work_done,
1649 			0 /* don't unmask intr */,
1650 			0 /* don't reset intr timer */);
1651 
1652 	err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
1653 
1654 	/* Buffer allocation failed. Stay in polling mode
1655 	 * so we can try to fill the ring again.
1656 	 */
1657 
1658 	if (err)
1659 		work_done = work_to_do;
1660 	if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1661 		/* Call the function which refreshes the intr coalescing timer
1662 		 * value based on the traffic.
1663 		 */
1664 		enic_calc_int_moderation(enic, &enic->rq[rq]);
1665 
1666 	if ((work_done < budget) && napi_complete_done(napi, work_done)) {
1667 
1668 		/* Some work done, but not enough to stay in polling,
1669 		 * exit polling
1670 		 */
1671 
1672 		if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
1673 			enic_set_int_moderation(enic, &enic->rq[rq]);
1674 		vnic_intr_unmask(&enic->intr[intr]);
1675 	}
1676 
1677 	return work_done;
1678 }
1679 
1680 static void enic_notify_timer(struct timer_list *t)
1681 {
1682 	struct enic *enic = from_timer(enic, t, notify_timer);
1683 
1684 	enic_notify_check(enic);
1685 
1686 	mod_timer(&enic->notify_timer,
1687 		round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
1688 }
1689 
1690 static void enic_free_intr(struct enic *enic)
1691 {
1692 	struct net_device *netdev = enic->netdev;
1693 	unsigned int i;
1694 
1695 	enic_free_rx_cpu_rmap(enic);
1696 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1697 	case VNIC_DEV_INTR_MODE_INTX:
1698 		free_irq(enic->pdev->irq, netdev);
1699 		break;
1700 	case VNIC_DEV_INTR_MODE_MSI:
1701 		free_irq(enic->pdev->irq, enic);
1702 		break;
1703 	case VNIC_DEV_INTR_MODE_MSIX:
1704 		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1705 			if (enic->msix[i].requested)
1706 				free_irq(enic->msix_entry[i].vector,
1707 					enic->msix[i].devid);
1708 		break;
1709 	default:
1710 		break;
1711 	}
1712 }
1713 
1714 static int enic_request_intr(struct enic *enic)
1715 {
1716 	struct net_device *netdev = enic->netdev;
1717 	unsigned int i, intr;
1718 	int err = 0;
1719 
1720 	enic_set_rx_cpu_rmap(enic);
1721 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1722 
1723 	case VNIC_DEV_INTR_MODE_INTX:
1724 
1725 		err = request_irq(enic->pdev->irq, enic_isr_legacy,
1726 			IRQF_SHARED, netdev->name, netdev);
1727 		break;
1728 
1729 	case VNIC_DEV_INTR_MODE_MSI:
1730 
1731 		err = request_irq(enic->pdev->irq, enic_isr_msi,
1732 			0, netdev->name, enic);
1733 		break;
1734 
1735 	case VNIC_DEV_INTR_MODE_MSIX:
1736 
1737 		for (i = 0; i < enic->rq_count; i++) {
1738 			intr = enic_msix_rq_intr(enic, i);
1739 			snprintf(enic->msix[intr].devname,
1740 				sizeof(enic->msix[intr].devname),
1741 				"%s-rx-%u", netdev->name, i);
1742 			enic->msix[intr].isr = enic_isr_msix;
1743 			enic->msix[intr].devid = &enic->napi[i];
1744 		}
1745 
1746 		for (i = 0; i < enic->wq_count; i++) {
1747 			int wq = enic_cq_wq(enic, i);
1748 
1749 			intr = enic_msix_wq_intr(enic, i);
1750 			snprintf(enic->msix[intr].devname,
1751 				sizeof(enic->msix[intr].devname),
1752 				"%s-tx-%u", netdev->name, i);
1753 			enic->msix[intr].isr = enic_isr_msix;
1754 			enic->msix[intr].devid = &enic->napi[wq];
1755 		}
1756 
1757 		intr = enic_msix_err_intr(enic);
1758 		snprintf(enic->msix[intr].devname,
1759 			sizeof(enic->msix[intr].devname),
1760 			"%s-err", netdev->name);
1761 		enic->msix[intr].isr = enic_isr_msix_err;
1762 		enic->msix[intr].devid = enic;
1763 
1764 		intr = enic_msix_notify_intr(enic);
1765 		snprintf(enic->msix[intr].devname,
1766 			sizeof(enic->msix[intr].devname),
1767 			"%s-notify", netdev->name);
1768 		enic->msix[intr].isr = enic_isr_msix_notify;
1769 		enic->msix[intr].devid = enic;
1770 
1771 		for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1772 			enic->msix[i].requested = 0;
1773 
1774 		for (i = 0; i < enic->intr_count; i++) {
1775 			err = request_irq(enic->msix_entry[i].vector,
1776 				enic->msix[i].isr, 0,
1777 				enic->msix[i].devname,
1778 				enic->msix[i].devid);
1779 			if (err) {
1780 				enic_free_intr(enic);
1781 				break;
1782 			}
1783 			enic->msix[i].requested = 1;
1784 		}
1785 
1786 		break;
1787 
1788 	default:
1789 		break;
1790 	}
1791 
1792 	return err;
1793 }
1794 
1795 static void enic_synchronize_irqs(struct enic *enic)
1796 {
1797 	unsigned int i;
1798 
1799 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1800 	case VNIC_DEV_INTR_MODE_INTX:
1801 	case VNIC_DEV_INTR_MODE_MSI:
1802 		synchronize_irq(enic->pdev->irq);
1803 		break;
1804 	case VNIC_DEV_INTR_MODE_MSIX:
1805 		for (i = 0; i < enic->intr_count; i++)
1806 			synchronize_irq(enic->msix_entry[i].vector);
1807 		break;
1808 	default:
1809 		break;
1810 	}
1811 }
1812 
1813 static void enic_set_rx_coal_setting(struct enic *enic)
1814 {
1815 	unsigned int speed;
1816 	int index = -1;
1817 	struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
1818 
1819 	/* 1. Read the link speed from fw
1820 	 * 2. Pick the default range for the speed
1821 	 * 3. Update it in enic->rx_coalesce_setting
1822 	 */
1823 	speed = vnic_dev_port_speed(enic->vdev);
1824 	if (ENIC_LINK_SPEED_10G < speed)
1825 		index = ENIC_LINK_40G_INDEX;
1826 	else if (ENIC_LINK_SPEED_4G < speed)
1827 		index = ENIC_LINK_10G_INDEX;
1828 	else
1829 		index = ENIC_LINK_4G_INDEX;
1830 
1831 	rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
1832 	rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
1833 	rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;
1834 
1835 	/* Start with the value provided by UCSM */
1836 	for (index = 0; index < enic->rq_count; index++)
1837 		enic->cq[index].cur_rx_coal_timeval =
1838 				enic->config.intr_timer_usec;
1839 
1840 	rx_coal->use_adaptive_rx_coalesce = 1;
1841 }
1842 
1843 static int enic_dev_notify_set(struct enic *enic)
1844 {
1845 	int err;
1846 
1847 	spin_lock_bh(&enic->devcmd_lock);
1848 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1849 	case VNIC_DEV_INTR_MODE_INTX:
1850 		err = vnic_dev_notify_set(enic->vdev,
1851 			enic_legacy_notify_intr());
1852 		break;
1853 	case VNIC_DEV_INTR_MODE_MSIX:
1854 		err = vnic_dev_notify_set(enic->vdev,
1855 			enic_msix_notify_intr(enic));
1856 		break;
1857 	default:
1858 		err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1859 		break;
1860 	}
1861 	spin_unlock_bh(&enic->devcmd_lock);
1862 
1863 	return err;
1864 }
1865 
1866 static void enic_notify_timer_start(struct enic *enic)
1867 {
1868 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
1869 	case VNIC_DEV_INTR_MODE_MSI:
1870 		mod_timer(&enic->notify_timer, jiffies);
1871 		break;
1872 	default:
1873 		/* Using intr for notification for INTx/MSI-X */
1874 		break;
1875 	}
1876 }
1877 
1878 /* rtnl lock is held, process context */
1879 static int enic_open(struct net_device *netdev)
1880 {
1881 	struct enic *enic = netdev_priv(netdev);
1882 	unsigned int i;
1883 	int err;
1884 
1885 	err = enic_request_intr(enic);
1886 	if (err) {
1887 		netdev_err(netdev, "Unable to request irq.\n");
1888 		return err;
1889 	}
1890 	enic_init_affinity_hint(enic);
1891 	enic_set_affinity_hint(enic);
1892 
1893 	err = enic_dev_notify_set(enic);
1894 	if (err) {
1895 		netdev_err(netdev,
1896 			"Failed to alloc notify buffer, aborting.\n");
1897 		goto err_out_free_intr;
1898 	}
1899 
1900 	for (i = 0; i < enic->rq_count; i++) {
1901 		vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
1902 		/* Need at least one buffer on ring to get going */
1903 		if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
1904 			netdev_err(netdev, "Unable to alloc receive buffers\n");
1905 			err = -ENOMEM;
1906 			goto err_out_free_rq;
1907 		}
1908 	}
1909 
1910 	for (i = 0; i < enic->wq_count; i++)
1911 		vnic_wq_enable(&enic->wq[i]);
1912 	for (i = 0; i < enic->rq_count; i++)
1913 		vnic_rq_enable(&enic->rq[i]);
1914 
1915 	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1916 		enic_dev_add_station_addr(enic);
1917 
1918 	enic_set_rx_mode(netdev);
1919 
1920 	netif_tx_wake_all_queues(netdev);
1921 
1922 	for (i = 0; i < enic->rq_count; i++)
1923 		napi_enable(&enic->napi[i]);
1924 
1925 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
1926 		for (i = 0; i < enic->wq_count; i++)
1927 			napi_enable(&enic->napi[enic_cq_wq(enic, i)]);
1928 	enic_dev_enable(enic);
1929 
1930 	for (i = 0; i < enic->intr_count; i++)
1931 		vnic_intr_unmask(&enic->intr[i]);
1932 
1933 	enic_notify_timer_start(enic);
1934 	enic_rfs_flw_tbl_init(enic);
1935 
1936 	return 0;
1937 
1938 err_out_free_rq:
1939 	for (i = 0; i < enic->rq_count; i++)
1940 		vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1941 	enic_dev_notify_unset(enic);
1942 err_out_free_intr:
1943 	enic_unset_affinity_hint(enic);
1944 	enic_free_intr(enic);
1945 
1946 	return err;
1947 }
1948 
1949 /* rtnl lock is held, process context */
1950 static int enic_stop(struct net_device *netdev)
1951 {
1952 	struct enic *enic = netdev_priv(netdev);
1953 	unsigned int i;
1954 	int err;
1955 
1956 	for (i = 0; i < enic->intr_count; i++) {
1957 		vnic_intr_mask(&enic->intr[i]);
1958 		(void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1959 	}
1960 
1961 	enic_synchronize_irqs(enic);
1962 
1963 	del_timer_sync(&enic->notify_timer);
1964 	enic_rfs_flw_tbl_free(enic);
1965 
1966 	enic_dev_disable(enic);
1967 
1968 	for (i = 0; i < enic->rq_count; i++)
1969 		napi_disable(&enic->napi[i]);
1970 
1971 	netif_carrier_off(netdev);
1972 	netif_tx_disable(netdev);
1973 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
1974 		for (i = 0; i < enic->wq_count; i++)
1975 			napi_disable(&enic->napi[enic_cq_wq(enic, i)]);
1976 
1977 	if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
1978 		enic_dev_del_station_addr(enic);
1979 
1980 	for (i = 0; i < enic->wq_count; i++) {
1981 		err = vnic_wq_disable(&enic->wq[i]);
1982 		if (err)
1983 			return err;
1984 	}
1985 	for (i = 0; i < enic->rq_count; i++) {
1986 		err = vnic_rq_disable(&enic->rq[i]);
1987 		if (err)
1988 			return err;
1989 	}
1990 
1991 	enic_dev_notify_unset(enic);
1992 	enic_unset_affinity_hint(enic);
1993 	enic_free_intr(enic);
1994 
1995 	for (i = 0; i < enic->wq_count; i++)
1996 		vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1997 	for (i = 0; i < enic->rq_count; i++)
1998 		vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1999 	for (i = 0; i < enic->cq_count; i++)
2000 		vnic_cq_clean(&enic->cq[i]);
2001 	for (i = 0; i < enic->intr_count; i++)
2002 		vnic_intr_clean(&enic->intr[i]);
2003 
2004 	return 0;
2005 }
2006 
2007 static int enic_change_mtu(struct net_device *netdev, int new_mtu)
2008 {
2009 	struct enic *enic = netdev_priv(netdev);
2010 	int running = netif_running(netdev);
2011 
2012 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2013 		return -EOPNOTSUPP;
2014 
2015 	if (running)
2016 		enic_stop(netdev);
2017 
2018 	netdev->mtu = new_mtu;
2019 
2020 	if (netdev->mtu > enic->port_mtu)
2021 		netdev_warn(netdev,
2022 			"interface MTU (%d) set higher than port MTU (%d)\n",
2023 			netdev->mtu, enic->port_mtu);
2024 
2025 	if (running)
2026 		enic_open(netdev);
2027 
2028 	return 0;
2029 }
2030 
2031 static void enic_change_mtu_work(struct work_struct *work)
2032 {
2033 	struct enic *enic = container_of(work, struct enic, change_mtu_work);
2034 	struct net_device *netdev = enic->netdev;
2035 	int new_mtu = vnic_dev_mtu(enic->vdev);
2036 	int err;
2037 	unsigned int i;
2038 
2039 	new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
2040 
2041 	rtnl_lock();
2042 
2043 	/* Stop RQ */
2044 	del_timer_sync(&enic->notify_timer);
2045 
2046 	for (i = 0; i < enic->rq_count; i++)
2047 		napi_disable(&enic->napi[i]);
2048 
2049 	vnic_intr_mask(&enic->intr[0]);
2050 	enic_synchronize_irqs(enic);
2051 	err = vnic_rq_disable(&enic->rq[0]);
2052 	if (err) {
2053 		rtnl_unlock();
2054 		netdev_err(netdev, "Unable to disable RQ.\n");
2055 		return;
2056 	}
2057 	vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
2058 	vnic_cq_clean(&enic->cq[0]);
2059 	vnic_intr_clean(&enic->intr[0]);
2060 
2061 	/* Fill RQ with new_mtu-sized buffers */
2062 	netdev->mtu = new_mtu;
2063 	vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
2064 	/* Need at least one buffer on ring to get going */
2065 	if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
2066 		rtnl_unlock();
2067 		netdev_err(netdev, "Unable to alloc receive buffers.\n");
2068 		return;
2069 	}
2070 
2071 	/* Start RQ */
2072 	vnic_rq_enable(&enic->rq[0]);
2073 	napi_enable(&enic->napi[0]);
2074 	vnic_intr_unmask(&enic->intr[0]);
2075 	enic_notify_timer_start(enic);
2076 
2077 	rtnl_unlock();
2078 
2079 	netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
2080 }
2081 
2082 #ifdef CONFIG_NET_POLL_CONTROLLER
2083 static void enic_poll_controller(struct net_device *netdev)
2084 {
2085 	struct enic *enic = netdev_priv(netdev);
2086 	struct vnic_dev *vdev = enic->vdev;
2087 	unsigned int i, intr;
2088 
2089 	switch (vnic_dev_get_intr_mode(vdev)) {
2090 	case VNIC_DEV_INTR_MODE_MSIX:
2091 		for (i = 0; i < enic->rq_count; i++) {
2092 			intr = enic_msix_rq_intr(enic, i);
2093 			enic_isr_msix(enic->msix_entry[intr].vector,
2094 				      &enic->napi[i]);
2095 		}
2096 
2097 		for (i = 0; i < enic->wq_count; i++) {
2098 			intr = enic_msix_wq_intr(enic, i);
2099 			enic_isr_msix(enic->msix_entry[intr].vector,
2100 				      &enic->napi[enic_cq_wq(enic, i)]);
2101 		}
2102 
2103 		break;
2104 	case VNIC_DEV_INTR_MODE_MSI:
2105 		enic_isr_msi(enic->pdev->irq, enic);
2106 		break;
2107 	case VNIC_DEV_INTR_MODE_INTX:
2108 		enic_isr_legacy(enic->pdev->irq, netdev);
2109 		break;
2110 	default:
2111 		break;
2112 	}
2113 }
2114 #endif
2115 
2116 static int enic_dev_wait(struct vnic_dev *vdev,
2117 	int (*start)(struct vnic_dev *, int),
2118 	int (*finished)(struct vnic_dev *, int *),
2119 	int arg)
2120 {
2121 	unsigned long time;
2122 	int done;
2123 	int err;
2124 
2125 	BUG_ON(in_interrupt());
2126 
2127 	err = start(vdev, arg);
2128 	if (err)
2129 		return err;
2130 
2131 	/* Wait for func to complete...2 seconds max
2132 	 */
2133 
2134 	time = jiffies + (HZ * 2);
2135 	do {
2136 
2137 		err = finished(vdev, &done);
2138 		if (err)
2139 			return err;
2140 
2141 		if (done)
2142 			return 0;
2143 
2144 		schedule_timeout_uninterruptible(HZ / 10);
2145 
2146 	} while (time_after(time, jiffies));
2147 
2148 	return -ETIMEDOUT;
2149 }
2150 
2151 static int enic_dev_open(struct enic *enic)
2152 {
2153 	int err;
2154 
2155 	err = enic_dev_wait(enic->vdev, vnic_dev_open,
2156 		vnic_dev_open_done, 0);
2157 	if (err)
2158 		dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
2159 			err);
2160 
2161 	return err;
2162 }
2163 
2164 static int enic_dev_soft_reset(struct enic *enic)
2165 {
2166 	int err;
2167 
2168 	err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
2169 			    vnic_dev_soft_reset_done, 0);
2170 	if (err)
2171 		netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n",
2172 			   err);
2173 
2174 	return err;
2175 }
2176 
2177 static int enic_dev_hang_reset(struct enic *enic)
2178 {
2179 	int err;
2180 
2181 	err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
2182 		vnic_dev_hang_reset_done, 0);
2183 	if (err)
2184 		netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
2185 			err);
2186 
2187 	return err;
2188 }
2189 
2190 int __enic_set_rsskey(struct enic *enic)
2191 {
2192 	union vnic_rss_key *rss_key_buf_va;
2193 	dma_addr_t rss_key_buf_pa;
2194 	int i, kidx, bidx, err;
2195 
2196 	rss_key_buf_va = pci_zalloc_consistent(enic->pdev,
2197 					       sizeof(union vnic_rss_key),
2198 					       &rss_key_buf_pa);
2199 	if (!rss_key_buf_va)
2200 		return -ENOMEM;
2201 
2202 	for (i = 0; i < ENIC_RSS_LEN; i++) {
2203 		kidx = i / ENIC_RSS_BYTES_PER_KEY;
2204 		bidx = i % ENIC_RSS_BYTES_PER_KEY;
2205 		rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i];
2206 	}
2207 	spin_lock_bh(&enic->devcmd_lock);
2208 	err = enic_set_rss_key(enic,
2209 		rss_key_buf_pa,
2210 		sizeof(union vnic_rss_key));
2211 	spin_unlock_bh(&enic->devcmd_lock);
2212 
2213 	pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
2214 		rss_key_buf_va, rss_key_buf_pa);
2215 
2216 	return err;
2217 }
2218 
2219 static int enic_set_rsskey(struct enic *enic)
2220 {
2221 	netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN);
2222 
2223 	return __enic_set_rsskey(enic);
2224 }
2225 
2226 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
2227 {
2228 	dma_addr_t rss_cpu_buf_pa;
2229 	union vnic_rss_cpu *rss_cpu_buf_va = NULL;
2230 	unsigned int i;
2231 	int err;
2232 
2233 	rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
2234 		sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
2235 	if (!rss_cpu_buf_va)
2236 		return -ENOMEM;
2237 
2238 	for (i = 0; i < (1 << rss_hash_bits); i++)
2239 		(*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
2240 
2241 	spin_lock_bh(&enic->devcmd_lock);
2242 	err = enic_set_rss_cpu(enic,
2243 		rss_cpu_buf_pa,
2244 		sizeof(union vnic_rss_cpu));
2245 	spin_unlock_bh(&enic->devcmd_lock);
2246 
2247 	pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
2248 		rss_cpu_buf_va, rss_cpu_buf_pa);
2249 
2250 	return err;
2251 }
2252 
2253 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2254 	u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
2255 {
2256 	const u8 tso_ipid_split_en = 0;
2257 	const u8 ig_vlan_strip_en = 1;
2258 	int err;
2259 
2260 	/* Enable VLAN tag stripping.
2261 	*/
2262 
2263 	spin_lock_bh(&enic->devcmd_lock);
2264 	err = enic_set_nic_cfg(enic,
2265 		rss_default_cpu, rss_hash_type,
2266 		rss_hash_bits, rss_base_cpu,
2267 		rss_enable, tso_ipid_split_en,
2268 		ig_vlan_strip_en);
2269 	spin_unlock_bh(&enic->devcmd_lock);
2270 
2271 	return err;
2272 }
2273 
2274 static int enic_set_rss_nic_cfg(struct enic *enic)
2275 {
2276 	struct device *dev = enic_get_dev(enic);
2277 	const u8 rss_default_cpu = 0;
2278 	const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
2279 		NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
2280 		NIC_CFG_RSS_HASH_TYPE_IPV6 |
2281 		NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2282 	const u8 rss_hash_bits = 7;
2283 	const u8 rss_base_cpu = 0;
2284 	u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2285 
2286 	if (rss_enable) {
2287 		if (!enic_set_rsskey(enic)) {
2288 			if (enic_set_rsscpu(enic, rss_hash_bits)) {
2289 				rss_enable = 0;
2290 				dev_warn(dev, "RSS disabled, "
2291 					"Failed to set RSS cpu indirection table.");
2292 			}
2293 		} else {
2294 			rss_enable = 0;
2295 			dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2296 		}
2297 	}
2298 
2299 	return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2300 		rss_hash_bits, rss_base_cpu, rss_enable);
2301 }
2302 
2303 static void enic_reset(struct work_struct *work)
2304 {
2305 	struct enic *enic = container_of(work, struct enic, reset);
2306 
2307 	if (!netif_running(enic->netdev))
2308 		return;
2309 
2310 	rtnl_lock();
2311 
2312 	spin_lock(&enic->enic_api_lock);
2313 	enic_stop(enic->netdev);
2314 	enic_dev_soft_reset(enic);
2315 	enic_reset_addr_lists(enic);
2316 	enic_init_vnic_resources(enic);
2317 	enic_set_rss_nic_cfg(enic);
2318 	enic_dev_set_ig_vlan_rewrite_mode(enic);
2319 	enic_open(enic->netdev);
2320 	spin_unlock(&enic->enic_api_lock);
2321 	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2322 
2323 	rtnl_unlock();
2324 }
2325 
2326 static void enic_tx_hang_reset(struct work_struct *work)
2327 {
2328 	struct enic *enic = container_of(work, struct enic, tx_hang_reset);
2329 
2330 	rtnl_lock();
2331 
2332 	spin_lock(&enic->enic_api_lock);
2333 	enic_dev_hang_notify(enic);
2334 	enic_stop(enic->netdev);
2335 	enic_dev_hang_reset(enic);
2336 	enic_reset_addr_lists(enic);
2337 	enic_init_vnic_resources(enic);
2338 	enic_set_rss_nic_cfg(enic);
2339 	enic_dev_set_ig_vlan_rewrite_mode(enic);
2340 	enic_open(enic->netdev);
2341 	spin_unlock(&enic->enic_api_lock);
2342 	call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
2343 
2344 	rtnl_unlock();
2345 }
2346 
2347 static int enic_set_intr_mode(struct enic *enic)
2348 {
2349 	unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
2350 	unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
2351 	unsigned int i;
2352 
2353 	/* Set interrupt mode (INTx, MSI, MSI-X) depending
2354 	 * on system capabilities.
2355 	 *
2356 	 * Try MSI-X first
2357 	 *
2358 	 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2359 	 * (the second to last INTR is used for WQ/RQ errors)
2360 	 * (the last INTR is used for notifications)
2361 	 */
2362 
2363 	BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2364 	for (i = 0; i < n + m + 2; i++)
2365 		enic->msix_entry[i].entry = i;
2366 
2367 	/* Use multiple RQs if RSS is enabled
2368 	 */
2369 
2370 	if (ENIC_SETTING(enic, RSS) &&
2371 	    enic->config.intr_mode < 1 &&
2372 	    enic->rq_count >= n &&
2373 	    enic->wq_count >= m &&
2374 	    enic->cq_count >= n + m &&
2375 	    enic->intr_count >= n + m + 2) {
2376 
2377 		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2378 					  n + m + 2, n + m + 2) > 0) {
2379 
2380 			enic->rq_count = n;
2381 			enic->wq_count = m;
2382 			enic->cq_count = n + m;
2383 			enic->intr_count = n + m + 2;
2384 
2385 			vnic_dev_set_intr_mode(enic->vdev,
2386 				VNIC_DEV_INTR_MODE_MSIX);
2387 
2388 			return 0;
2389 		}
2390 	}
2391 
2392 	if (enic->config.intr_mode < 1 &&
2393 	    enic->rq_count >= 1 &&
2394 	    enic->wq_count >= m &&
2395 	    enic->cq_count >= 1 + m &&
2396 	    enic->intr_count >= 1 + m + 2) {
2397 		if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
2398 					  1 + m + 2, 1 + m + 2) > 0) {
2399 
2400 			enic->rq_count = 1;
2401 			enic->wq_count = m;
2402 			enic->cq_count = 1 + m;
2403 			enic->intr_count = 1 + m + 2;
2404 
2405 			vnic_dev_set_intr_mode(enic->vdev,
2406 				VNIC_DEV_INTR_MODE_MSIX);
2407 
2408 			return 0;
2409 		}
2410 	}
2411 
2412 	/* Next try MSI
2413 	 *
2414 	 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2415 	 */
2416 
2417 	if (enic->config.intr_mode < 2 &&
2418 	    enic->rq_count >= 1 &&
2419 	    enic->wq_count >= 1 &&
2420 	    enic->cq_count >= 2 &&
2421 	    enic->intr_count >= 1 &&
2422 	    !pci_enable_msi(enic->pdev)) {
2423 
2424 		enic->rq_count = 1;
2425 		enic->wq_count = 1;
2426 		enic->cq_count = 2;
2427 		enic->intr_count = 1;
2428 
2429 		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2430 
2431 		return 0;
2432 	}
2433 
2434 	/* Next try INTx
2435 	 *
2436 	 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2437 	 * (the first INTR is used for WQ/RQ)
2438 	 * (the second INTR is used for WQ/RQ errors)
2439 	 * (the last INTR is used for notifications)
2440 	 */
2441 
2442 	if (enic->config.intr_mode < 3 &&
2443 	    enic->rq_count >= 1 &&
2444 	    enic->wq_count >= 1 &&
2445 	    enic->cq_count >= 2 &&
2446 	    enic->intr_count >= 3) {
2447 
2448 		enic->rq_count = 1;
2449 		enic->wq_count = 1;
2450 		enic->cq_count = 2;
2451 		enic->intr_count = 3;
2452 
2453 		vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2454 
2455 		return 0;
2456 	}
2457 
2458 	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2459 
2460 	return -EINVAL;
2461 }
2462 
2463 static void enic_clear_intr_mode(struct enic *enic)
2464 {
2465 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
2466 	case VNIC_DEV_INTR_MODE_MSIX:
2467 		pci_disable_msix(enic->pdev);
2468 		break;
2469 	case VNIC_DEV_INTR_MODE_MSI:
2470 		pci_disable_msi(enic->pdev);
2471 		break;
2472 	default:
2473 		break;
2474 	}
2475 
2476 	vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2477 }
2478 
2479 static const struct net_device_ops enic_netdev_dynamic_ops = {
2480 	.ndo_open		= enic_open,
2481 	.ndo_stop		= enic_stop,
2482 	.ndo_start_xmit		= enic_hard_start_xmit,
2483 	.ndo_get_stats64	= enic_get_stats,
2484 	.ndo_validate_addr	= eth_validate_addr,
2485 	.ndo_set_rx_mode	= enic_set_rx_mode,
2486 	.ndo_set_mac_address	= enic_set_mac_address_dynamic,
2487 	.ndo_change_mtu		= enic_change_mtu,
2488 	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
2489 	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
2490 	.ndo_tx_timeout		= enic_tx_timeout,
2491 	.ndo_set_vf_port	= enic_set_vf_port,
2492 	.ndo_get_vf_port	= enic_get_vf_port,
2493 	.ndo_set_vf_mac		= enic_set_vf_mac,
2494 #ifdef CONFIG_NET_POLL_CONTROLLER
2495 	.ndo_poll_controller	= enic_poll_controller,
2496 #endif
2497 #ifdef CONFIG_RFS_ACCEL
2498 	.ndo_rx_flow_steer	= enic_rx_flow_steer,
2499 #endif
2500 	.ndo_udp_tunnel_add	= enic_udp_tunnel_add,
2501 	.ndo_udp_tunnel_del	= enic_udp_tunnel_del,
2502 	.ndo_features_check	= enic_features_check,
2503 };
2504 
2505 static const struct net_device_ops enic_netdev_ops = {
2506 	.ndo_open		= enic_open,
2507 	.ndo_stop		= enic_stop,
2508 	.ndo_start_xmit		= enic_hard_start_xmit,
2509 	.ndo_get_stats64	= enic_get_stats,
2510 	.ndo_validate_addr	= eth_validate_addr,
2511 	.ndo_set_mac_address	= enic_set_mac_address,
2512 	.ndo_set_rx_mode	= enic_set_rx_mode,
2513 	.ndo_change_mtu		= enic_change_mtu,
2514 	.ndo_vlan_rx_add_vid	= enic_vlan_rx_add_vid,
2515 	.ndo_vlan_rx_kill_vid	= enic_vlan_rx_kill_vid,
2516 	.ndo_tx_timeout		= enic_tx_timeout,
2517 	.ndo_set_vf_port	= enic_set_vf_port,
2518 	.ndo_get_vf_port	= enic_get_vf_port,
2519 	.ndo_set_vf_mac		= enic_set_vf_mac,
2520 #ifdef CONFIG_NET_POLL_CONTROLLER
2521 	.ndo_poll_controller	= enic_poll_controller,
2522 #endif
2523 #ifdef CONFIG_RFS_ACCEL
2524 	.ndo_rx_flow_steer	= enic_rx_flow_steer,
2525 #endif
2526 	.ndo_udp_tunnel_add	= enic_udp_tunnel_add,
2527 	.ndo_udp_tunnel_del	= enic_udp_tunnel_del,
2528 	.ndo_features_check	= enic_features_check,
2529 };
2530 
2531 static void enic_dev_deinit(struct enic *enic)
2532 {
2533 	unsigned int i;
2534 
2535 	for (i = 0; i < enic->rq_count; i++) {
2536 		napi_hash_del(&enic->napi[i]);
2537 		netif_napi_del(&enic->napi[i]);
2538 	}
2539 	if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
2540 		for (i = 0; i < enic->wq_count; i++)
2541 			netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]);
2542 
2543 	enic_free_vnic_resources(enic);
2544 	enic_clear_intr_mode(enic);
2545 	enic_free_affinity_hint(enic);
2546 }
2547 
2548 static void enic_kdump_kernel_config(struct enic *enic)
2549 {
2550 	if (is_kdump_kernel()) {
2551 		dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");
2552 		enic->rq_count = 1;
2553 		enic->wq_count = 1;
2554 		enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS;
2555 		enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS;
2556 		enic->config.mtu = min_t(u16, 1500, enic->config.mtu);
2557 	}
2558 }
2559 
2560 static int enic_dev_init(struct enic *enic)
2561 {
2562 	struct device *dev = enic_get_dev(enic);
2563 	struct net_device *netdev = enic->netdev;
2564 	unsigned int i;
2565 	int err;
2566 
2567 	/* Get interrupt coalesce timer info */
2568 	err = enic_dev_intr_coal_timer_info(enic);
2569 	if (err) {
2570 		dev_warn(dev, "Using default conversion factor for "
2571 			"interrupt coalesce timer\n");
2572 		vnic_dev_intr_coal_timer_info_default(enic->vdev);
2573 	}
2574 
2575 	/* Get vNIC configuration
2576 	 */
2577 
2578 	err = enic_get_vnic_config(enic);
2579 	if (err) {
2580 		dev_err(dev, "Get vNIC configuration failed, aborting\n");
2581 		return err;
2582 	}
2583 
2584 	/* Get available resource counts
2585 	 */
2586 
2587 	enic_get_res_counts(enic);
2588 
2589 	/* modify resource count if we are in kdump_kernel
2590 	 */
2591 	enic_kdump_kernel_config(enic);
2592 
2593 	/* Set interrupt mode based on resource counts and system
2594 	 * capabilities
2595 	 */
2596 
2597 	err = enic_set_intr_mode(enic);
2598 	if (err) {
2599 		dev_err(dev, "Failed to set intr mode based on resource "
2600 			"counts and system capabilities, aborting\n");
2601 		return err;
2602 	}
2603 
2604 	/* Allocate and configure vNIC resources
2605 	 */
2606 
2607 	err = enic_alloc_vnic_resources(enic);
2608 	if (err) {
2609 		dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
2610 		goto err_out_free_vnic_resources;
2611 	}
2612 
2613 	enic_init_vnic_resources(enic);
2614 
2615 	err = enic_set_rss_nic_cfg(enic);
2616 	if (err) {
2617 		dev_err(dev, "Failed to config nic, aborting\n");
2618 		goto err_out_free_vnic_resources;
2619 	}
2620 
2621 	switch (vnic_dev_get_intr_mode(enic->vdev)) {
2622 	default:
2623 		netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
2624 		break;
2625 	case VNIC_DEV_INTR_MODE_MSIX:
2626 		for (i = 0; i < enic->rq_count; i++) {
2627 			netif_napi_add(netdev, &enic->napi[i],
2628 				enic_poll_msix_rq, NAPI_POLL_WEIGHT);
2629 		}
2630 		for (i = 0; i < enic->wq_count; i++)
2631 			netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)],
2632 				       enic_poll_msix_wq, NAPI_POLL_WEIGHT);
2633 		break;
2634 	}
2635 
2636 	return 0;
2637 
2638 err_out_free_vnic_resources:
2639 	enic_free_affinity_hint(enic);
2640 	enic_clear_intr_mode(enic);
2641 	enic_free_vnic_resources(enic);
2642 
2643 	return err;
2644 }
2645 
2646 static void enic_iounmap(struct enic *enic)
2647 {
2648 	unsigned int i;
2649 
2650 	for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2651 		if (enic->bar[i].vaddr)
2652 			iounmap(enic->bar[i].vaddr);
2653 }
2654 
2655 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2656 {
2657 	struct device *dev = &pdev->dev;
2658 	struct net_device *netdev;
2659 	struct enic *enic;
2660 	int using_dac = 0;
2661 	unsigned int i;
2662 	int err;
2663 #ifdef CONFIG_PCI_IOV
2664 	int pos = 0;
2665 #endif
2666 	int num_pps = 1;
2667 
2668 	/* Allocate net device structure and initialize.  Private
2669 	 * instance data is initialized to zero.
2670 	 */
2671 
2672 	netdev = alloc_etherdev_mqs(sizeof(struct enic),
2673 				    ENIC_RQ_MAX, ENIC_WQ_MAX);
2674 	if (!netdev)
2675 		return -ENOMEM;
2676 
2677 	pci_set_drvdata(pdev, netdev);
2678 
2679 	SET_NETDEV_DEV(netdev, &pdev->dev);
2680 
2681 	enic = netdev_priv(netdev);
2682 	enic->netdev = netdev;
2683 	enic->pdev = pdev;
2684 
2685 	/* Setup PCI resources
2686 	 */
2687 
2688 	err = pci_enable_device_mem(pdev);
2689 	if (err) {
2690 		dev_err(dev, "Cannot enable PCI device, aborting\n");
2691 		goto err_out_free_netdev;
2692 	}
2693 
2694 	err = pci_request_regions(pdev, DRV_NAME);
2695 	if (err) {
2696 		dev_err(dev, "Cannot request PCI regions, aborting\n");
2697 		goto err_out_disable_device;
2698 	}
2699 
2700 	pci_set_master(pdev);
2701 
2702 	/* Query PCI controller on system for DMA addressing
2703 	 * limitation for the device.  Try 64-bit first, and
2704 	 * fail to 32-bit.
2705 	 */
2706 
2707 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2708 	if (err) {
2709 		err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2710 		if (err) {
2711 			dev_err(dev, "No usable DMA configuration, aborting\n");
2712 			goto err_out_release_regions;
2713 		}
2714 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2715 		if (err) {
2716 			dev_err(dev, "Unable to obtain %u-bit DMA "
2717 				"for consistent allocations, aborting\n", 32);
2718 			goto err_out_release_regions;
2719 		}
2720 	} else {
2721 		err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
2722 		if (err) {
2723 			dev_err(dev, "Unable to obtain %u-bit DMA "
2724 				"for consistent allocations, aborting\n", 64);
2725 			goto err_out_release_regions;
2726 		}
2727 		using_dac = 1;
2728 	}
2729 
2730 	/* Map vNIC resources from BAR0-5
2731 	 */
2732 
2733 	for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2734 		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2735 			continue;
2736 		enic->bar[i].len = pci_resource_len(pdev, i);
2737 		enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2738 		if (!enic->bar[i].vaddr) {
2739 			dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
2740 			err = -ENODEV;
2741 			goto err_out_iounmap;
2742 		}
2743 		enic->bar[i].bus_addr = pci_resource_start(pdev, i);
2744 	}
2745 
2746 	/* Register vNIC device
2747 	 */
2748 
2749 	enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2750 		ARRAY_SIZE(enic->bar));
2751 	if (!enic->vdev) {
2752 		dev_err(dev, "vNIC registration failed, aborting\n");
2753 		err = -ENODEV;
2754 		goto err_out_iounmap;
2755 	}
2756 
2757 	err = vnic_devcmd_init(enic->vdev);
2758 
2759 	if (err)
2760 		goto err_out_vnic_unregister;
2761 
2762 #ifdef CONFIG_PCI_IOV
2763 	/* Get number of subvnics */
2764 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2765 	if (pos) {
2766 		pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2767 			&enic->num_vfs);
2768 		if (enic->num_vfs) {
2769 			err = pci_enable_sriov(pdev, enic->num_vfs);
2770 			if (err) {
2771 				dev_err(dev, "SRIOV enable failed, aborting."
2772 					" pci_enable_sriov() returned %d\n",
2773 					err);
2774 				goto err_out_vnic_unregister;
2775 			}
2776 			enic->priv_flags |= ENIC_SRIOV_ENABLED;
2777 			num_pps = enic->num_vfs;
2778 		}
2779 	}
2780 #endif
2781 
2782 	/* Allocate structure for port profiles */
2783 	enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
2784 	if (!enic->pp) {
2785 		err = -ENOMEM;
2786 		goto err_out_disable_sriov_pp;
2787 	}
2788 
2789 	/* Issue device open to get device in known state
2790 	 */
2791 
2792 	err = enic_dev_open(enic);
2793 	if (err) {
2794 		dev_err(dev, "vNIC dev open failed, aborting\n");
2795 		goto err_out_disable_sriov;
2796 	}
2797 
2798 	/* Setup devcmd lock
2799 	 */
2800 
2801 	spin_lock_init(&enic->devcmd_lock);
2802 	spin_lock_init(&enic->enic_api_lock);
2803 
2804 	/*
2805 	 * Set ingress vlan rewrite mode before vnic initialization
2806 	 */
2807 
2808 	err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2809 	if (err) {
2810 		dev_err(dev,
2811 			"Failed to set ingress vlan rewrite mode, aborting.\n");
2812 		goto err_out_dev_close;
2813 	}
2814 
2815 	/* Issue device init to initialize the vnic-to-switch link.
2816 	 * We'll start with carrier off and wait for link UP
2817 	 * notification later to turn on carrier.  We don't need
2818 	 * to wait here for the vnic-to-switch link initialization
2819 	 * to complete; link UP notification is the indication that
2820 	 * the process is complete.
2821 	 */
2822 
2823 	netif_carrier_off(netdev);
2824 
2825 	/* Do not call dev_init for a dynamic vnic.
2826 	 * For a dynamic vnic, init_prov_info will be
2827 	 * called later by an upper layer.
2828 	 */
2829 
2830 	if (!enic_is_dynamic(enic)) {
2831 		err = vnic_dev_init(enic->vdev, 0);
2832 		if (err) {
2833 			dev_err(dev, "vNIC dev init failed, aborting\n");
2834 			goto err_out_dev_close;
2835 		}
2836 	}
2837 
2838 	err = enic_dev_init(enic);
2839 	if (err) {
2840 		dev_err(dev, "Device initialization failed, aborting\n");
2841 		goto err_out_dev_close;
2842 	}
2843 
2844 	netif_set_real_num_tx_queues(netdev, enic->wq_count);
2845 	netif_set_real_num_rx_queues(netdev, enic->rq_count);
2846 
2847 	/* Setup notification timer, HW reset task, and wq locks
2848 	 */
2849 
2850 	timer_setup(&enic->notify_timer, enic_notify_timer, 0);
2851 
2852 	enic_set_rx_coal_setting(enic);
2853 	INIT_WORK(&enic->reset, enic_reset);
2854 	INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset);
2855 	INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
2856 
2857 	for (i = 0; i < enic->wq_count; i++)
2858 		spin_lock_init(&enic->wq_lock[i]);
2859 
2860 	/* Register net device
2861 	 */
2862 
2863 	enic->port_mtu = enic->config.mtu;
2864 	(void)enic_change_mtu(netdev, enic->port_mtu);
2865 
2866 	err = enic_set_mac_addr(netdev, enic->mac_addr);
2867 	if (err) {
2868 		dev_err(dev, "Invalid MAC address, aborting\n");
2869 		goto err_out_dev_deinit;
2870 	}
2871 
2872 	enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2873 	/* rx coalesce time already got initialized. This gets used
2874 	 * if adaptive coal is turned off
2875 	 */
2876 	enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2877 
2878 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
2879 		netdev->netdev_ops = &enic_netdev_dynamic_ops;
2880 	else
2881 		netdev->netdev_ops = &enic_netdev_ops;
2882 
2883 	netdev->watchdog_timeo = 2 * HZ;
2884 	enic_set_ethtool_ops(netdev);
2885 
2886 	netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
2887 	if (ENIC_SETTING(enic, LOOP)) {
2888 		netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2889 		enic->loop_enable = 1;
2890 		enic->loop_tag = enic->config.loop_tag;
2891 		dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2892 	}
2893 	if (ENIC_SETTING(enic, TXCSUM))
2894 		netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2895 	if (ENIC_SETTING(enic, TSO))
2896 		netdev->hw_features |= NETIF_F_TSO |
2897 			NETIF_F_TSO6 | NETIF_F_TSO_ECN;
2898 	if (ENIC_SETTING(enic, RSS))
2899 		netdev->hw_features |= NETIF_F_RXHASH;
2900 	if (ENIC_SETTING(enic, RXCSUM))
2901 		netdev->hw_features |= NETIF_F_RXCSUM;
2902 	if (ENIC_SETTING(enic, VXLAN)) {
2903 		u64 patch_level;
2904 
2905 		netdev->hw_enc_features |= NETIF_F_RXCSUM		|
2906 					   NETIF_F_TSO			|
2907 					   NETIF_F_TSO_ECN		|
2908 					   NETIF_F_GSO_UDP_TUNNEL	|
2909 					   NETIF_F_HW_CSUM		|
2910 					   NETIF_F_GSO_UDP_TUNNEL_CSUM;
2911 		netdev->hw_features |= netdev->hw_enc_features;
2912 		/* get bit mask from hw about supported offload bit level
2913 		 * BIT(0) = fw supports patch_level 0
2914 		 *	    fcoe bit = encap
2915 		 *	    fcoe_fc_crc_ok = outer csum ok
2916 		 * BIT(1) = always set by fw
2917 		 * BIT(2) = fw supports patch_level 2
2918 		 *	    BIT(0) in rss_hash = encap
2919 		 *	    BIT(1,2) in rss_hash = outer_ip_csum_ok/
2920 		 *				   outer_tcp_csum_ok
2921 		 * used in enic_rq_indicate_buf
2922 		 */
2923 		err = vnic_dev_get_supported_feature_ver(enic->vdev,
2924 							 VIC_FEATURE_VXLAN,
2925 							 &patch_level);
2926 		if (err)
2927 			patch_level = 0;
2928 		/* mask bits that are supported by driver
2929 		 */
2930 		patch_level &= BIT_ULL(0) | BIT_ULL(2);
2931 		patch_level = fls(patch_level);
2932 		patch_level = patch_level ? patch_level - 1 : 0;
2933 		enic->vxlan.patch_level = patch_level;
2934 	}
2935 
2936 	netdev->features |= netdev->hw_features;
2937 	netdev->vlan_features |= netdev->features;
2938 
2939 #ifdef CONFIG_RFS_ACCEL
2940 	netdev->hw_features |= NETIF_F_NTUPLE;
2941 #endif
2942 
2943 	if (using_dac)
2944 		netdev->features |= NETIF_F_HIGHDMA;
2945 
2946 	netdev->priv_flags |= IFF_UNICAST_FLT;
2947 
2948 	/* MTU range: 68 - 9000 */
2949 	netdev->min_mtu = ENIC_MIN_MTU;
2950 	netdev->max_mtu = ENIC_MAX_MTU;
2951 
2952 	err = register_netdev(netdev);
2953 	if (err) {
2954 		dev_err(dev, "Cannot register net device, aborting\n");
2955 		goto err_out_dev_deinit;
2956 	}
2957 	enic->rx_copybreak = RX_COPYBREAK_DEFAULT;
2958 
2959 	return 0;
2960 
2961 err_out_dev_deinit:
2962 	enic_dev_deinit(enic);
2963 err_out_dev_close:
2964 	vnic_dev_close(enic->vdev);
2965 err_out_disable_sriov:
2966 	kfree(enic->pp);
2967 err_out_disable_sriov_pp:
2968 #ifdef CONFIG_PCI_IOV
2969 	if (enic_sriov_enabled(enic)) {
2970 		pci_disable_sriov(pdev);
2971 		enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2972 	}
2973 #endif
2974 err_out_vnic_unregister:
2975 	vnic_dev_unregister(enic->vdev);
2976 err_out_iounmap:
2977 	enic_iounmap(enic);
2978 err_out_release_regions:
2979 	pci_release_regions(pdev);
2980 err_out_disable_device:
2981 	pci_disable_device(pdev);
2982 err_out_free_netdev:
2983 	free_netdev(netdev);
2984 
2985 	return err;
2986 }
2987 
2988 static void enic_remove(struct pci_dev *pdev)
2989 {
2990 	struct net_device *netdev = pci_get_drvdata(pdev);
2991 
2992 	if (netdev) {
2993 		struct enic *enic = netdev_priv(netdev);
2994 
2995 		cancel_work_sync(&enic->reset);
2996 		cancel_work_sync(&enic->change_mtu_work);
2997 		unregister_netdev(netdev);
2998 		enic_dev_deinit(enic);
2999 		vnic_dev_close(enic->vdev);
3000 #ifdef CONFIG_PCI_IOV
3001 		if (enic_sriov_enabled(enic)) {
3002 			pci_disable_sriov(pdev);
3003 			enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
3004 		}
3005 #endif
3006 		kfree(enic->pp);
3007 		vnic_dev_unregister(enic->vdev);
3008 		enic_iounmap(enic);
3009 		pci_release_regions(pdev);
3010 		pci_disable_device(pdev);
3011 		free_netdev(netdev);
3012 	}
3013 }
3014 
3015 static struct pci_driver enic_driver = {
3016 	.name = DRV_NAME,
3017 	.id_table = enic_id_table,
3018 	.probe = enic_probe,
3019 	.remove = enic_remove,
3020 };
3021 
3022 static int __init enic_init_module(void)
3023 {
3024 	pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
3025 
3026 	return pci_register_driver(&enic_driver);
3027 }
3028 
3029 static void __exit enic_cleanup_module(void)
3030 {
3031 	pci_unregister_driver(&enic_driver);
3032 }
3033 
3034 module_init(enic_init_module);
3035 module_exit(enic_cleanup_module);
3036