1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/in.h> 35 #include <linux/ip.h> 36 #include <linux/ipv6.h> 37 #include <linux/tcp.h> 38 #include <linux/rtnetlink.h> 39 #include <linux/prefetch.h> 40 #include <net/ip6_checksum.h> 41 #include <linux/ktime.h> 42 43 #include "cq_enet_desc.h" 44 #include "vnic_dev.h" 45 #include "vnic_intr.h" 46 #include "vnic_stats.h" 47 #include "vnic_vic.h" 48 #include "enic_res.h" 49 #include "enic.h" 50 #include "enic_dev.h" 51 #include "enic_pp.h" 52 53 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 54 #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) 55 #define MAX_TSO (1 << 16) 56 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 57 58 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 59 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 60 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 61 62 /* Supported devices */ 63 static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = { 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 65 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 66 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 67 { 0, } /* end of table */ 68 }; 69 70 MODULE_DESCRIPTION(DRV_DESCRIPTION); 71 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 72 MODULE_LICENSE("GPL"); 73 MODULE_VERSION(DRV_VERSION); 74 MODULE_DEVICE_TABLE(pci, enic_id_table); 75 76 #define ENIC_LARGE_PKT_THRESHOLD 1000 77 #define ENIC_MAX_COALESCE_TIMERS 10 78 /* Interrupt moderation table, which will be used to decide the 79 * coalescing timer values 80 * {rx_rate in Mbps, mapping percentage of the range} 81 */ 82 struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 83 {4000, 0}, 84 {4400, 10}, 85 {5060, 20}, 86 {5230, 30}, 87 {5540, 40}, 88 {5820, 50}, 89 {6120, 60}, 90 {6435, 70}, 91 {6745, 80}, 92 {7000, 90}, 93 {0xFFFFFFFF, 100} 94 }; 95 96 /* This table helps the driver to pick different ranges for rx coalescing 97 * timer depending on the link speed. 98 */ 99 struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 100 {0, 0}, /* 0 - 4 Gbps */ 101 {0, 3}, /* 4 - 10 Gbps */ 102 {3, 6}, /* 10 - 40 Gbps */ 103 }; 104 105 int enic_is_dynamic(struct enic *enic) 106 { 107 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 108 } 109 110 int enic_sriov_enabled(struct enic *enic) 111 { 112 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 113 } 114 115 static int enic_is_sriov_vf(struct enic *enic) 116 { 117 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 118 } 119 120 int enic_is_valid_vf(struct enic *enic, int vf) 121 { 122 #ifdef CONFIG_PCI_IOV 123 return vf >= 0 && vf < enic->num_vfs; 124 #else 125 return 0; 126 #endif 127 } 128 129 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) 130 { 131 struct enic *enic = vnic_dev_priv(wq->vdev); 132 133 if (buf->sop) 134 pci_unmap_single(enic->pdev, buf->dma_addr, 135 buf->len, PCI_DMA_TODEVICE); 136 else 137 pci_unmap_page(enic->pdev, buf->dma_addr, 138 buf->len, PCI_DMA_TODEVICE); 139 140 if (buf->os_buf) 141 dev_kfree_skb_any(buf->os_buf); 142 } 143 144 static void enic_wq_free_buf(struct vnic_wq *wq, 145 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) 146 { 147 enic_free_wq_buf(wq, buf); 148 } 149 150 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 151 u8 type, u16 q_number, u16 completed_index, void *opaque) 152 { 153 struct enic *enic = vnic_dev_priv(vdev); 154 155 spin_lock(&enic->wq_lock[q_number]); 156 157 vnic_wq_service(&enic->wq[q_number], cq_desc, 158 completed_index, enic_wq_free_buf, 159 opaque); 160 161 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && 162 vnic_wq_desc_avail(&enic->wq[q_number]) >= 163 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) 164 netif_wake_subqueue(enic->netdev, q_number); 165 166 spin_unlock(&enic->wq_lock[q_number]); 167 168 return 0; 169 } 170 171 static void enic_log_q_error(struct enic *enic) 172 { 173 unsigned int i; 174 u32 error_status; 175 176 for (i = 0; i < enic->wq_count; i++) { 177 error_status = vnic_wq_error_status(&enic->wq[i]); 178 if (error_status) 179 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 180 i, error_status); 181 } 182 183 for (i = 0; i < enic->rq_count; i++) { 184 error_status = vnic_rq_error_status(&enic->rq[i]); 185 if (error_status) 186 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 187 i, error_status); 188 } 189 } 190 191 static void enic_msglvl_check(struct enic *enic) 192 { 193 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 194 195 if (msg_enable != enic->msg_enable) { 196 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 197 enic->msg_enable, msg_enable); 198 enic->msg_enable = msg_enable; 199 } 200 } 201 202 static void enic_mtu_check(struct enic *enic) 203 { 204 u32 mtu = vnic_dev_mtu(enic->vdev); 205 struct net_device *netdev = enic->netdev; 206 207 if (mtu && mtu != enic->port_mtu) { 208 enic->port_mtu = mtu; 209 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 210 mtu = max_t(int, ENIC_MIN_MTU, 211 min_t(int, ENIC_MAX_MTU, mtu)); 212 if (mtu != netdev->mtu) 213 schedule_work(&enic->change_mtu_work); 214 } else { 215 if (mtu < netdev->mtu) 216 netdev_warn(netdev, 217 "interface MTU (%d) set higher " 218 "than switch port MTU (%d)\n", 219 netdev->mtu, mtu); 220 } 221 } 222 } 223 224 static void enic_link_check(struct enic *enic) 225 { 226 int link_status = vnic_dev_link_status(enic->vdev); 227 int carrier_ok = netif_carrier_ok(enic->netdev); 228 229 if (link_status && !carrier_ok) { 230 netdev_info(enic->netdev, "Link UP\n"); 231 netif_carrier_on(enic->netdev); 232 } else if (!link_status && carrier_ok) { 233 netdev_info(enic->netdev, "Link DOWN\n"); 234 netif_carrier_off(enic->netdev); 235 } 236 } 237 238 static void enic_notify_check(struct enic *enic) 239 { 240 enic_msglvl_check(enic); 241 enic_mtu_check(enic); 242 enic_link_check(enic); 243 } 244 245 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 246 247 static irqreturn_t enic_isr_legacy(int irq, void *data) 248 { 249 struct net_device *netdev = data; 250 struct enic *enic = netdev_priv(netdev); 251 unsigned int io_intr = enic_legacy_io_intr(); 252 unsigned int err_intr = enic_legacy_err_intr(); 253 unsigned int notify_intr = enic_legacy_notify_intr(); 254 u32 pba; 255 256 vnic_intr_mask(&enic->intr[io_intr]); 257 258 pba = vnic_intr_legacy_pba(enic->legacy_pba); 259 if (!pba) { 260 vnic_intr_unmask(&enic->intr[io_intr]); 261 return IRQ_NONE; /* not our interrupt */ 262 } 263 264 if (ENIC_TEST_INTR(pba, notify_intr)) { 265 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 266 enic_notify_check(enic); 267 } 268 269 if (ENIC_TEST_INTR(pba, err_intr)) { 270 vnic_intr_return_all_credits(&enic->intr[err_intr]); 271 enic_log_q_error(enic); 272 /* schedule recovery from WQ/RQ error */ 273 schedule_work(&enic->reset); 274 return IRQ_HANDLED; 275 } 276 277 if (ENIC_TEST_INTR(pba, io_intr)) { 278 if (napi_schedule_prep(&enic->napi[0])) 279 __napi_schedule(&enic->napi[0]); 280 } else { 281 vnic_intr_unmask(&enic->intr[io_intr]); 282 } 283 284 return IRQ_HANDLED; 285 } 286 287 static irqreturn_t enic_isr_msi(int irq, void *data) 288 { 289 struct enic *enic = data; 290 291 /* With MSI, there is no sharing of interrupts, so this is 292 * our interrupt and there is no need to ack it. The device 293 * is not providing per-vector masking, so the OS will not 294 * write to PCI config space to mask/unmask the interrupt. 295 * We're using mask_on_assertion for MSI, so the device 296 * automatically masks the interrupt when the interrupt is 297 * generated. Later, when exiting polling, the interrupt 298 * will be unmasked (see enic_poll). 299 * 300 * Also, the device uses the same PCIe Traffic Class (TC) 301 * for Memory Write data and MSI, so there are no ordering 302 * issues; the MSI will always arrive at the Root Complex 303 * _after_ corresponding Memory Writes (i.e. descriptor 304 * writes). 305 */ 306 307 napi_schedule(&enic->napi[0]); 308 309 return IRQ_HANDLED; 310 } 311 312 static irqreturn_t enic_isr_msix_rq(int irq, void *data) 313 { 314 struct napi_struct *napi = data; 315 316 /* schedule NAPI polling for RQ cleanup */ 317 napi_schedule(napi); 318 319 return IRQ_HANDLED; 320 } 321 322 static irqreturn_t enic_isr_msix_wq(int irq, void *data) 323 { 324 struct enic *enic = data; 325 unsigned int cq; 326 unsigned int intr; 327 unsigned int wq_work_to_do = -1; /* no limit */ 328 unsigned int wq_work_done; 329 unsigned int wq_irq; 330 331 wq_irq = (u32)irq - enic->msix_entry[enic_msix_wq_intr(enic, 0)].vector; 332 cq = enic_cq_wq(enic, wq_irq); 333 intr = enic_msix_wq_intr(enic, wq_irq); 334 335 wq_work_done = vnic_cq_service(&enic->cq[cq], 336 wq_work_to_do, enic_wq_service, NULL); 337 338 vnic_intr_return_credits(&enic->intr[intr], 339 wq_work_done, 340 1 /* unmask intr */, 341 1 /* reset intr timer */); 342 343 return IRQ_HANDLED; 344 } 345 346 static irqreturn_t enic_isr_msix_err(int irq, void *data) 347 { 348 struct enic *enic = data; 349 unsigned int intr = enic_msix_err_intr(enic); 350 351 vnic_intr_return_all_credits(&enic->intr[intr]); 352 353 enic_log_q_error(enic); 354 355 /* schedule recovery from WQ/RQ error */ 356 schedule_work(&enic->reset); 357 358 return IRQ_HANDLED; 359 } 360 361 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 362 { 363 struct enic *enic = data; 364 unsigned int intr = enic_msix_notify_intr(enic); 365 366 vnic_intr_return_all_credits(&enic->intr[intr]); 367 enic_notify_check(enic); 368 369 return IRQ_HANDLED; 370 } 371 372 static inline void enic_queue_wq_skb_cont(struct enic *enic, 373 struct vnic_wq *wq, struct sk_buff *skb, 374 unsigned int len_left, int loopback) 375 { 376 const skb_frag_t *frag; 377 378 /* Queue additional data fragments */ 379 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 380 len_left -= skb_frag_size(frag); 381 enic_queue_wq_desc_cont(wq, skb, 382 skb_frag_dma_map(&enic->pdev->dev, 383 frag, 0, skb_frag_size(frag), 384 DMA_TO_DEVICE), 385 skb_frag_size(frag), 386 (len_left == 0), /* EOP? */ 387 loopback); 388 } 389 } 390 391 static inline void enic_queue_wq_skb_vlan(struct enic *enic, 392 struct vnic_wq *wq, struct sk_buff *skb, 393 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 394 { 395 unsigned int head_len = skb_headlen(skb); 396 unsigned int len_left = skb->len - head_len; 397 int eop = (len_left == 0); 398 399 /* Queue the main skb fragment. The fragments are no larger 400 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 401 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 402 * per fragment is queued. 403 */ 404 enic_queue_wq_desc(wq, skb, 405 pci_map_single(enic->pdev, skb->data, 406 head_len, PCI_DMA_TODEVICE), 407 head_len, 408 vlan_tag_insert, vlan_tag, 409 eop, loopback); 410 411 if (!eop) 412 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 413 } 414 415 static inline void enic_queue_wq_skb_csum_l4(struct enic *enic, 416 struct vnic_wq *wq, struct sk_buff *skb, 417 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 418 { 419 unsigned int head_len = skb_headlen(skb); 420 unsigned int len_left = skb->len - head_len; 421 unsigned int hdr_len = skb_checksum_start_offset(skb); 422 unsigned int csum_offset = hdr_len + skb->csum_offset; 423 int eop = (len_left == 0); 424 425 /* Queue the main skb fragment. The fragments are no larger 426 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 427 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 428 * per fragment is queued. 429 */ 430 enic_queue_wq_desc_csum_l4(wq, skb, 431 pci_map_single(enic->pdev, skb->data, 432 head_len, PCI_DMA_TODEVICE), 433 head_len, 434 csum_offset, 435 hdr_len, 436 vlan_tag_insert, vlan_tag, 437 eop, loopback); 438 439 if (!eop) 440 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 441 } 442 443 static inline void enic_queue_wq_skb_tso(struct enic *enic, 444 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss, 445 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 446 { 447 unsigned int frag_len_left = skb_headlen(skb); 448 unsigned int len_left = skb->len - frag_len_left; 449 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 450 int eop = (len_left == 0); 451 unsigned int len; 452 dma_addr_t dma_addr; 453 unsigned int offset = 0; 454 skb_frag_t *frag; 455 456 /* Preload TCP csum field with IP pseudo hdr calculated 457 * with IP length set to zero. HW will later add in length 458 * to each TCP segment resulting from the TSO. 459 */ 460 461 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 462 ip_hdr(skb)->check = 0; 463 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 464 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 465 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 466 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 467 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 468 } 469 470 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 471 * for the main skb fragment 472 */ 473 while (frag_len_left) { 474 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 475 dma_addr = pci_map_single(enic->pdev, skb->data + offset, 476 len, PCI_DMA_TODEVICE); 477 enic_queue_wq_desc_tso(wq, skb, 478 dma_addr, 479 len, 480 mss, hdr_len, 481 vlan_tag_insert, vlan_tag, 482 eop && (len == frag_len_left), loopback); 483 frag_len_left -= len; 484 offset += len; 485 } 486 487 if (eop) 488 return; 489 490 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 491 * for additional data fragments 492 */ 493 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 494 len_left -= skb_frag_size(frag); 495 frag_len_left = skb_frag_size(frag); 496 offset = 0; 497 498 while (frag_len_left) { 499 len = min(frag_len_left, 500 (unsigned int)WQ_ENET_MAX_DESC_LEN); 501 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 502 offset, len, 503 DMA_TO_DEVICE); 504 enic_queue_wq_desc_cont(wq, skb, 505 dma_addr, 506 len, 507 (len_left == 0) && 508 (len == frag_len_left), /* EOP? */ 509 loopback); 510 frag_len_left -= len; 511 offset += len; 512 } 513 } 514 } 515 516 static inline void enic_queue_wq_skb(struct enic *enic, 517 struct vnic_wq *wq, struct sk_buff *skb) 518 { 519 unsigned int mss = skb_shinfo(skb)->gso_size; 520 unsigned int vlan_tag = 0; 521 int vlan_tag_insert = 0; 522 int loopback = 0; 523 524 if (vlan_tx_tag_present(skb)) { 525 /* VLAN tag from trunking driver */ 526 vlan_tag_insert = 1; 527 vlan_tag = vlan_tx_tag_get(skb); 528 } else if (enic->loop_enable) { 529 vlan_tag = enic->loop_tag; 530 loopback = 1; 531 } 532 533 if (mss) 534 enic_queue_wq_skb_tso(enic, wq, skb, mss, 535 vlan_tag_insert, vlan_tag, loopback); 536 else if (skb->ip_summed == CHECKSUM_PARTIAL) 537 enic_queue_wq_skb_csum_l4(enic, wq, skb, 538 vlan_tag_insert, vlan_tag, loopback); 539 else 540 enic_queue_wq_skb_vlan(enic, wq, skb, 541 vlan_tag_insert, vlan_tag, loopback); 542 } 543 544 /* netif_tx_lock held, process context with BHs disabled, or BH */ 545 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 546 struct net_device *netdev) 547 { 548 struct enic *enic = netdev_priv(netdev); 549 struct vnic_wq *wq; 550 unsigned long flags; 551 unsigned int txq_map; 552 553 if (skb->len <= 0) { 554 dev_kfree_skb_any(skb); 555 return NETDEV_TX_OK; 556 } 557 558 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 559 wq = &enic->wq[txq_map]; 560 561 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 562 * which is very likely. In the off chance it's going to take 563 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 564 */ 565 566 if (skb_shinfo(skb)->gso_size == 0 && 567 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 568 skb_linearize(skb)) { 569 dev_kfree_skb_any(skb); 570 return NETDEV_TX_OK; 571 } 572 573 spin_lock_irqsave(&enic->wq_lock[txq_map], flags); 574 575 if (vnic_wq_desc_avail(wq) < 576 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 577 netif_tx_stop_queue(netdev_get_tx_queue(netdev, txq_map)); 578 /* This is a hard error, log it */ 579 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 580 spin_unlock_irqrestore(&enic->wq_lock[txq_map], flags); 581 return NETDEV_TX_BUSY; 582 } 583 584 enic_queue_wq_skb(enic, wq, skb); 585 586 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) 587 netif_tx_stop_queue(netdev_get_tx_queue(netdev, txq_map)); 588 589 spin_unlock_irqrestore(&enic->wq_lock[txq_map], flags); 590 591 return NETDEV_TX_OK; 592 } 593 594 /* dev_base_lock rwlock held, nominally process context */ 595 static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev, 596 struct rtnl_link_stats64 *net_stats) 597 { 598 struct enic *enic = netdev_priv(netdev); 599 struct vnic_stats *stats; 600 601 enic_dev_stats_dump(enic, &stats); 602 603 net_stats->tx_packets = stats->tx.tx_frames_ok; 604 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 605 net_stats->tx_errors = stats->tx.tx_errors; 606 net_stats->tx_dropped = stats->tx.tx_drops; 607 608 net_stats->rx_packets = stats->rx.rx_frames_ok; 609 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 610 net_stats->rx_errors = stats->rx.rx_errors; 611 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 612 net_stats->rx_over_errors = enic->rq_truncated_pkts; 613 net_stats->rx_crc_errors = enic->rq_bad_fcs; 614 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 615 616 return net_stats; 617 } 618 619 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 620 { 621 struct enic *enic = netdev_priv(netdev); 622 623 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 624 unsigned int mc_count = netdev_mc_count(netdev); 625 626 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 627 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 628 629 return -ENOSPC; 630 } 631 632 enic_dev_add_addr(enic, mc_addr); 633 enic->mc_count++; 634 635 return 0; 636 } 637 638 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 639 { 640 struct enic *enic = netdev_priv(netdev); 641 642 enic_dev_del_addr(enic, mc_addr); 643 enic->mc_count--; 644 645 return 0; 646 } 647 648 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 649 { 650 struct enic *enic = netdev_priv(netdev); 651 652 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 653 unsigned int uc_count = netdev_uc_count(netdev); 654 655 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 656 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 657 658 return -ENOSPC; 659 } 660 661 enic_dev_add_addr(enic, uc_addr); 662 enic->uc_count++; 663 664 return 0; 665 } 666 667 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 668 { 669 struct enic *enic = netdev_priv(netdev); 670 671 enic_dev_del_addr(enic, uc_addr); 672 enic->uc_count--; 673 674 return 0; 675 } 676 677 void enic_reset_addr_lists(struct enic *enic) 678 { 679 struct net_device *netdev = enic->netdev; 680 681 __dev_uc_unsync(netdev, NULL); 682 __dev_mc_unsync(netdev, NULL); 683 684 enic->mc_count = 0; 685 enic->uc_count = 0; 686 enic->flags = 0; 687 } 688 689 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 690 { 691 struct enic *enic = netdev_priv(netdev); 692 693 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 694 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 695 return -EADDRNOTAVAIL; 696 } else { 697 if (!is_valid_ether_addr(addr)) 698 return -EADDRNOTAVAIL; 699 } 700 701 memcpy(netdev->dev_addr, addr, netdev->addr_len); 702 703 return 0; 704 } 705 706 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 707 { 708 struct enic *enic = netdev_priv(netdev); 709 struct sockaddr *saddr = p; 710 char *addr = saddr->sa_data; 711 int err; 712 713 if (netif_running(enic->netdev)) { 714 err = enic_dev_del_station_addr(enic); 715 if (err) 716 return err; 717 } 718 719 err = enic_set_mac_addr(netdev, addr); 720 if (err) 721 return err; 722 723 if (netif_running(enic->netdev)) { 724 err = enic_dev_add_station_addr(enic); 725 if (err) 726 return err; 727 } 728 729 return err; 730 } 731 732 static int enic_set_mac_address(struct net_device *netdev, void *p) 733 { 734 struct sockaddr *saddr = p; 735 char *addr = saddr->sa_data; 736 struct enic *enic = netdev_priv(netdev); 737 int err; 738 739 err = enic_dev_del_station_addr(enic); 740 if (err) 741 return err; 742 743 err = enic_set_mac_addr(netdev, addr); 744 if (err) 745 return err; 746 747 return enic_dev_add_station_addr(enic); 748 } 749 750 /* netif_tx_lock held, BHs disabled */ 751 static void enic_set_rx_mode(struct net_device *netdev) 752 { 753 struct enic *enic = netdev_priv(netdev); 754 int directed = 1; 755 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 756 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 757 int promisc = (netdev->flags & IFF_PROMISC) || 758 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 759 int allmulti = (netdev->flags & IFF_ALLMULTI) || 760 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 761 unsigned int flags = netdev->flags | 762 (allmulti ? IFF_ALLMULTI : 0) | 763 (promisc ? IFF_PROMISC : 0); 764 765 if (enic->flags != flags) { 766 enic->flags = flags; 767 enic_dev_packet_filter(enic, directed, 768 multicast, broadcast, promisc, allmulti); 769 } 770 771 if (!promisc) { 772 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 773 if (!allmulti) 774 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 775 } 776 } 777 778 /* netif_tx_lock held, BHs disabled */ 779 static void enic_tx_timeout(struct net_device *netdev) 780 { 781 struct enic *enic = netdev_priv(netdev); 782 schedule_work(&enic->reset); 783 } 784 785 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 786 { 787 struct enic *enic = netdev_priv(netdev); 788 struct enic_port_profile *pp; 789 int err; 790 791 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 792 if (err) 793 return err; 794 795 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 796 if (vf == PORT_SELF_VF) { 797 memcpy(pp->vf_mac, mac, ETH_ALEN); 798 return 0; 799 } else { 800 /* 801 * For sriov vf's set the mac in hw 802 */ 803 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 804 vnic_dev_set_mac_addr, mac); 805 return enic_dev_status_to_errno(err); 806 } 807 } else 808 return -EINVAL; 809 } 810 811 static int enic_set_vf_port(struct net_device *netdev, int vf, 812 struct nlattr *port[]) 813 { 814 struct enic *enic = netdev_priv(netdev); 815 struct enic_port_profile prev_pp; 816 struct enic_port_profile *pp; 817 int err = 0, restore_pp = 1; 818 819 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 820 if (err) 821 return err; 822 823 if (!port[IFLA_PORT_REQUEST]) 824 return -EOPNOTSUPP; 825 826 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 827 memset(pp, 0, sizeof(*enic->pp)); 828 829 pp->set |= ENIC_SET_REQUEST; 830 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 831 832 if (port[IFLA_PORT_PROFILE]) { 833 pp->set |= ENIC_SET_NAME; 834 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 835 PORT_PROFILE_MAX); 836 } 837 838 if (port[IFLA_PORT_INSTANCE_UUID]) { 839 pp->set |= ENIC_SET_INSTANCE; 840 memcpy(pp->instance_uuid, 841 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 842 } 843 844 if (port[IFLA_PORT_HOST_UUID]) { 845 pp->set |= ENIC_SET_HOST; 846 memcpy(pp->host_uuid, 847 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 848 } 849 850 if (vf == PORT_SELF_VF) { 851 /* Special case handling: mac came from IFLA_VF_MAC */ 852 if (!is_zero_ether_addr(prev_pp.vf_mac)) 853 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 854 855 if (is_zero_ether_addr(netdev->dev_addr)) 856 eth_hw_addr_random(netdev); 857 } else { 858 /* SR-IOV VF: get mac from adapter */ 859 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 860 vnic_dev_get_mac_addr, pp->mac_addr); 861 if (err) { 862 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 863 memcpy(pp, &prev_pp, sizeof(*pp)); 864 return enic_dev_status_to_errno(err); 865 } 866 } 867 868 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 869 if (err) { 870 if (restore_pp) { 871 /* Things are still the way they were: Implicit 872 * DISASSOCIATE failed 873 */ 874 memcpy(pp, &prev_pp, sizeof(*pp)); 875 } else { 876 memset(pp, 0, sizeof(*pp)); 877 if (vf == PORT_SELF_VF) 878 memset(netdev->dev_addr, 0, ETH_ALEN); 879 } 880 } else { 881 /* Set flag to indicate that the port assoc/disassoc 882 * request has been sent out to fw 883 */ 884 pp->set |= ENIC_PORT_REQUEST_APPLIED; 885 886 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 887 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 888 memset(pp->mac_addr, 0, ETH_ALEN); 889 if (vf == PORT_SELF_VF) 890 memset(netdev->dev_addr, 0, ETH_ALEN); 891 } 892 } 893 894 if (vf == PORT_SELF_VF) 895 memset(pp->vf_mac, 0, ETH_ALEN); 896 897 return err; 898 } 899 900 static int enic_get_vf_port(struct net_device *netdev, int vf, 901 struct sk_buff *skb) 902 { 903 struct enic *enic = netdev_priv(netdev); 904 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 905 struct enic_port_profile *pp; 906 int err; 907 908 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 909 if (err) 910 return err; 911 912 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 913 return -ENODATA; 914 915 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 916 if (err) 917 return err; 918 919 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 920 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 921 ((pp->set & ENIC_SET_NAME) && 922 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 923 ((pp->set & ENIC_SET_INSTANCE) && 924 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 925 pp->instance_uuid)) || 926 ((pp->set & ENIC_SET_HOST) && 927 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 928 goto nla_put_failure; 929 return 0; 930 931 nla_put_failure: 932 return -EMSGSIZE; 933 } 934 935 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf) 936 { 937 struct enic *enic = vnic_dev_priv(rq->vdev); 938 939 if (!buf->os_buf) 940 return; 941 942 pci_unmap_single(enic->pdev, buf->dma_addr, 943 buf->len, PCI_DMA_FROMDEVICE); 944 dev_kfree_skb_any(buf->os_buf); 945 } 946 947 static int enic_rq_alloc_buf(struct vnic_rq *rq) 948 { 949 struct enic *enic = vnic_dev_priv(rq->vdev); 950 struct net_device *netdev = enic->netdev; 951 struct sk_buff *skb; 952 unsigned int len = netdev->mtu + VLAN_ETH_HLEN; 953 unsigned int os_buf_index = 0; 954 dma_addr_t dma_addr; 955 956 skb = netdev_alloc_skb_ip_align(netdev, len); 957 if (!skb) 958 return -ENOMEM; 959 960 dma_addr = pci_map_single(enic->pdev, skb->data, 961 len, PCI_DMA_FROMDEVICE); 962 963 enic_queue_rq_desc(rq, skb, os_buf_index, 964 dma_addr, len); 965 966 return 0; 967 } 968 969 static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size, 970 u32 pkt_len) 971 { 972 if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len) 973 pkt_size->large_pkt_bytes_cnt += pkt_len; 974 else 975 pkt_size->small_pkt_bytes_cnt += pkt_len; 976 } 977 978 static void enic_rq_indicate_buf(struct vnic_rq *rq, 979 struct cq_desc *cq_desc, struct vnic_rq_buf *buf, 980 int skipped, void *opaque) 981 { 982 struct enic *enic = vnic_dev_priv(rq->vdev); 983 struct net_device *netdev = enic->netdev; 984 struct sk_buff *skb; 985 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 986 987 u8 type, color, eop, sop, ingress_port, vlan_stripped; 988 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; 989 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; 990 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; 991 u8 packet_error; 992 u16 q_number, completed_index, bytes_written, vlan_tci, checksum; 993 u32 rss_hash; 994 995 if (skipped) 996 return; 997 998 skb = buf->os_buf; 999 prefetch(skb->data - NET_IP_ALIGN); 1000 pci_unmap_single(enic->pdev, buf->dma_addr, 1001 buf->len, PCI_DMA_FROMDEVICE); 1002 1003 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, 1004 &type, &color, &q_number, &completed_index, 1005 &ingress_port, &fcoe, &eop, &sop, &rss_type, 1006 &csum_not_calc, &rss_hash, &bytes_written, 1007 &packet_error, &vlan_stripped, &vlan_tci, &checksum, 1008 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error, 1009 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp, 1010 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, 1011 &fcs_ok); 1012 1013 if (packet_error) { 1014 1015 if (!fcs_ok) { 1016 if (bytes_written > 0) 1017 enic->rq_bad_fcs++; 1018 else if (bytes_written == 0) 1019 enic->rq_truncated_pkts++; 1020 } 1021 1022 dev_kfree_skb_any(skb); 1023 1024 return; 1025 } 1026 1027 if (eop && bytes_written > 0) { 1028 1029 /* Good receive 1030 */ 1031 1032 skb_put(skb, bytes_written); 1033 skb->protocol = eth_type_trans(skb, netdev); 1034 skb_record_rx_queue(skb, q_number); 1035 if (netdev->features & NETIF_F_RXHASH) { 1036 skb_set_hash(skb, rss_hash, 1037 (rss_type & 1038 (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX | 1039 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 | 1040 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ? 1041 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 1042 } 1043 1044 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) { 1045 skb->csum = htons(checksum); 1046 skb->ip_summed = CHECKSUM_COMPLETE; 1047 } 1048 1049 if (vlan_stripped) 1050 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci); 1051 1052 if (netdev->features & NETIF_F_GRO) 1053 napi_gro_receive(&enic->napi[q_number], skb); 1054 else 1055 netif_receive_skb(skb); 1056 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1057 enic_intr_update_pkt_size(&cq->pkt_size_counter, 1058 bytes_written); 1059 } else { 1060 1061 /* Buffer overflow 1062 */ 1063 1064 dev_kfree_skb_any(skb); 1065 } 1066 } 1067 1068 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 1069 u8 type, u16 q_number, u16 completed_index, void *opaque) 1070 { 1071 struct enic *enic = vnic_dev_priv(vdev); 1072 1073 vnic_rq_service(&enic->rq[q_number], cq_desc, 1074 completed_index, VNIC_RQ_RETURN_DESC, 1075 enic_rq_indicate_buf, opaque); 1076 1077 return 0; 1078 } 1079 1080 static int enic_poll(struct napi_struct *napi, int budget) 1081 { 1082 struct net_device *netdev = napi->dev; 1083 struct enic *enic = netdev_priv(netdev); 1084 unsigned int cq_rq = enic_cq_rq(enic, 0); 1085 unsigned int cq_wq = enic_cq_wq(enic, 0); 1086 unsigned int intr = enic_legacy_io_intr(); 1087 unsigned int rq_work_to_do = budget; 1088 unsigned int wq_work_to_do = -1; /* no limit */ 1089 unsigned int work_done, rq_work_done = 0, wq_work_done; 1090 int err; 1091 1092 /* Service RQ (first) and WQ 1093 */ 1094 1095 if (budget > 0) 1096 rq_work_done = vnic_cq_service(&enic->cq[cq_rq], 1097 rq_work_to_do, enic_rq_service, NULL); 1098 1099 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], 1100 wq_work_to_do, enic_wq_service, NULL); 1101 1102 /* Accumulate intr event credits for this polling 1103 * cycle. An intr event is the completion of a 1104 * a WQ or RQ packet. 1105 */ 1106 1107 work_done = rq_work_done + wq_work_done; 1108 1109 if (work_done > 0) 1110 vnic_intr_return_credits(&enic->intr[intr], 1111 work_done, 1112 0 /* don't unmask intr */, 1113 0 /* don't reset intr timer */); 1114 1115 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1116 1117 /* Buffer allocation failed. Stay in polling 1118 * mode so we can try to fill the ring again. 1119 */ 1120 1121 if (err) 1122 rq_work_done = rq_work_to_do; 1123 1124 if (rq_work_done < rq_work_to_do) { 1125 1126 /* Some work done, but not enough to stay in polling, 1127 * exit polling 1128 */ 1129 1130 napi_complete(napi); 1131 vnic_intr_unmask(&enic->intr[intr]); 1132 } 1133 1134 return rq_work_done; 1135 } 1136 1137 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1138 { 1139 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1140 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1141 u32 timer = cq->tobe_rx_coal_timeval; 1142 1143 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1144 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1145 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1146 } 1147 } 1148 1149 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1150 { 1151 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1152 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1153 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1154 int index; 1155 u32 timer; 1156 u32 range_start; 1157 u32 traffic; 1158 u64 delta; 1159 ktime_t now = ktime_get(); 1160 1161 delta = ktime_us_delta(now, cq->prev_ts); 1162 if (delta < ENIC_AIC_TS_BREAK) 1163 return; 1164 cq->prev_ts = now; 1165 1166 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1167 pkt_size_counter->small_pkt_bytes_cnt; 1168 /* The table takes Mbps 1169 * traffic *= 8 => bits 1170 * traffic *= (10^6 / delta) => bps 1171 * traffic /= 10^6 => Mbps 1172 * 1173 * Combining, traffic *= (8 / delta) 1174 */ 1175 1176 traffic <<= 3; 1177 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1178 1179 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1180 if (traffic < mod_table[index].rx_rate) 1181 break; 1182 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1183 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1184 rx_coal->small_pkt_range_start : 1185 rx_coal->large_pkt_range_start; 1186 timer = range_start + ((rx_coal->range_end - range_start) * 1187 mod_table[index].range_percent / 100); 1188 /* Damping */ 1189 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1190 1191 pkt_size_counter->large_pkt_bytes_cnt = 0; 1192 pkt_size_counter->small_pkt_bytes_cnt = 0; 1193 } 1194 1195 static int enic_poll_msix(struct napi_struct *napi, int budget) 1196 { 1197 struct net_device *netdev = napi->dev; 1198 struct enic *enic = netdev_priv(netdev); 1199 unsigned int rq = (napi - &enic->napi[0]); 1200 unsigned int cq = enic_cq_rq(enic, rq); 1201 unsigned int intr = enic_msix_rq_intr(enic, rq); 1202 unsigned int work_to_do = budget; 1203 unsigned int work_done = 0; 1204 int err; 1205 1206 /* Service RQ 1207 */ 1208 1209 if (budget > 0) 1210 work_done = vnic_cq_service(&enic->cq[cq], 1211 work_to_do, enic_rq_service, NULL); 1212 1213 /* Return intr event credits for this polling 1214 * cycle. An intr event is the completion of a 1215 * RQ packet. 1216 */ 1217 1218 if (work_done > 0) 1219 vnic_intr_return_credits(&enic->intr[intr], 1220 work_done, 1221 0 /* don't unmask intr */, 1222 0 /* don't reset intr timer */); 1223 1224 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1225 1226 /* Buffer allocation failed. Stay in polling mode 1227 * so we can try to fill the ring again. 1228 */ 1229 1230 if (err) 1231 work_done = work_to_do; 1232 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1233 /* Call the function which refreshes 1234 * the intr coalescing timer value based on 1235 * the traffic. This is supported only in 1236 * the case of MSI-x mode 1237 */ 1238 enic_calc_int_moderation(enic, &enic->rq[rq]); 1239 1240 if (work_done < work_to_do) { 1241 1242 /* Some work done, but not enough to stay in polling, 1243 * exit polling 1244 */ 1245 1246 napi_complete(napi); 1247 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1248 enic_set_int_moderation(enic, &enic->rq[rq]); 1249 vnic_intr_unmask(&enic->intr[intr]); 1250 } 1251 1252 return work_done; 1253 } 1254 1255 static void enic_notify_timer(unsigned long data) 1256 { 1257 struct enic *enic = (struct enic *)data; 1258 1259 enic_notify_check(enic); 1260 1261 mod_timer(&enic->notify_timer, 1262 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1263 } 1264 1265 static void enic_free_intr(struct enic *enic) 1266 { 1267 struct net_device *netdev = enic->netdev; 1268 unsigned int i; 1269 1270 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1271 case VNIC_DEV_INTR_MODE_INTX: 1272 free_irq(enic->pdev->irq, netdev); 1273 break; 1274 case VNIC_DEV_INTR_MODE_MSI: 1275 free_irq(enic->pdev->irq, enic); 1276 break; 1277 case VNIC_DEV_INTR_MODE_MSIX: 1278 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1279 if (enic->msix[i].requested) 1280 free_irq(enic->msix_entry[i].vector, 1281 enic->msix[i].devid); 1282 break; 1283 default: 1284 break; 1285 } 1286 } 1287 1288 static int enic_request_intr(struct enic *enic) 1289 { 1290 struct net_device *netdev = enic->netdev; 1291 unsigned int i, intr; 1292 int err = 0; 1293 1294 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1295 1296 case VNIC_DEV_INTR_MODE_INTX: 1297 1298 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1299 IRQF_SHARED, netdev->name, netdev); 1300 break; 1301 1302 case VNIC_DEV_INTR_MODE_MSI: 1303 1304 err = request_irq(enic->pdev->irq, enic_isr_msi, 1305 0, netdev->name, enic); 1306 break; 1307 1308 case VNIC_DEV_INTR_MODE_MSIX: 1309 1310 for (i = 0; i < enic->rq_count; i++) { 1311 intr = enic_msix_rq_intr(enic, i); 1312 snprintf(enic->msix[intr].devname, 1313 sizeof(enic->msix[intr].devname), 1314 "%.11s-rx-%d", netdev->name, i); 1315 enic->msix[intr].isr = enic_isr_msix_rq; 1316 enic->msix[intr].devid = &enic->napi[i]; 1317 } 1318 1319 for (i = 0; i < enic->wq_count; i++) { 1320 intr = enic_msix_wq_intr(enic, i); 1321 snprintf(enic->msix[intr].devname, 1322 sizeof(enic->msix[intr].devname), 1323 "%.11s-tx-%d", netdev->name, i); 1324 enic->msix[intr].isr = enic_isr_msix_wq; 1325 enic->msix[intr].devid = enic; 1326 } 1327 1328 intr = enic_msix_err_intr(enic); 1329 snprintf(enic->msix[intr].devname, 1330 sizeof(enic->msix[intr].devname), 1331 "%.11s-err", netdev->name); 1332 enic->msix[intr].isr = enic_isr_msix_err; 1333 enic->msix[intr].devid = enic; 1334 1335 intr = enic_msix_notify_intr(enic); 1336 snprintf(enic->msix[intr].devname, 1337 sizeof(enic->msix[intr].devname), 1338 "%.11s-notify", netdev->name); 1339 enic->msix[intr].isr = enic_isr_msix_notify; 1340 enic->msix[intr].devid = enic; 1341 1342 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1343 enic->msix[i].requested = 0; 1344 1345 for (i = 0; i < enic->intr_count; i++) { 1346 err = request_irq(enic->msix_entry[i].vector, 1347 enic->msix[i].isr, 0, 1348 enic->msix[i].devname, 1349 enic->msix[i].devid); 1350 if (err) { 1351 enic_free_intr(enic); 1352 break; 1353 } 1354 enic->msix[i].requested = 1; 1355 } 1356 1357 break; 1358 1359 default: 1360 break; 1361 } 1362 1363 return err; 1364 } 1365 1366 static void enic_synchronize_irqs(struct enic *enic) 1367 { 1368 unsigned int i; 1369 1370 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1371 case VNIC_DEV_INTR_MODE_INTX: 1372 case VNIC_DEV_INTR_MODE_MSI: 1373 synchronize_irq(enic->pdev->irq); 1374 break; 1375 case VNIC_DEV_INTR_MODE_MSIX: 1376 for (i = 0; i < enic->intr_count; i++) 1377 synchronize_irq(enic->msix_entry[i].vector); 1378 break; 1379 default: 1380 break; 1381 } 1382 } 1383 1384 static void enic_set_rx_coal_setting(struct enic *enic) 1385 { 1386 unsigned int speed; 1387 int index = -1; 1388 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1389 1390 /* If intr mode is not MSIX, do not do adaptive coalescing */ 1391 if (VNIC_DEV_INTR_MODE_MSIX != vnic_dev_get_intr_mode(enic->vdev)) { 1392 netdev_info(enic->netdev, "INTR mode is not MSIX, Not initializing adaptive coalescing"); 1393 return; 1394 } 1395 1396 /* 1. Read the link speed from fw 1397 * 2. Pick the default range for the speed 1398 * 3. Update it in enic->rx_coalesce_setting 1399 */ 1400 speed = vnic_dev_port_speed(enic->vdev); 1401 if (ENIC_LINK_SPEED_10G < speed) 1402 index = ENIC_LINK_40G_INDEX; 1403 else if (ENIC_LINK_SPEED_4G < speed) 1404 index = ENIC_LINK_10G_INDEX; 1405 else 1406 index = ENIC_LINK_4G_INDEX; 1407 1408 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 1409 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 1410 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 1411 1412 /* Start with the value provided by UCSM */ 1413 for (index = 0; index < enic->rq_count; index++) 1414 enic->cq[index].cur_rx_coal_timeval = 1415 enic->config.intr_timer_usec; 1416 1417 rx_coal->use_adaptive_rx_coalesce = 1; 1418 } 1419 1420 static int enic_dev_notify_set(struct enic *enic) 1421 { 1422 int err; 1423 1424 spin_lock(&enic->devcmd_lock); 1425 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1426 case VNIC_DEV_INTR_MODE_INTX: 1427 err = vnic_dev_notify_set(enic->vdev, 1428 enic_legacy_notify_intr()); 1429 break; 1430 case VNIC_DEV_INTR_MODE_MSIX: 1431 err = vnic_dev_notify_set(enic->vdev, 1432 enic_msix_notify_intr(enic)); 1433 break; 1434 default: 1435 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1436 break; 1437 } 1438 spin_unlock(&enic->devcmd_lock); 1439 1440 return err; 1441 } 1442 1443 static void enic_notify_timer_start(struct enic *enic) 1444 { 1445 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1446 case VNIC_DEV_INTR_MODE_MSI: 1447 mod_timer(&enic->notify_timer, jiffies); 1448 break; 1449 default: 1450 /* Using intr for notification for INTx/MSI-X */ 1451 break; 1452 } 1453 } 1454 1455 /* rtnl lock is held, process context */ 1456 static int enic_open(struct net_device *netdev) 1457 { 1458 struct enic *enic = netdev_priv(netdev); 1459 unsigned int i; 1460 int err; 1461 1462 err = enic_request_intr(enic); 1463 if (err) { 1464 netdev_err(netdev, "Unable to request irq.\n"); 1465 return err; 1466 } 1467 1468 err = enic_dev_notify_set(enic); 1469 if (err) { 1470 netdev_err(netdev, 1471 "Failed to alloc notify buffer, aborting.\n"); 1472 goto err_out_free_intr; 1473 } 1474 1475 for (i = 0; i < enic->rq_count; i++) { 1476 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf); 1477 /* Need at least one buffer on ring to get going */ 1478 if (vnic_rq_desc_used(&enic->rq[i]) == 0) { 1479 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1480 err = -ENOMEM; 1481 goto err_out_notify_unset; 1482 } 1483 } 1484 1485 for (i = 0; i < enic->wq_count; i++) 1486 vnic_wq_enable(&enic->wq[i]); 1487 for (i = 0; i < enic->rq_count; i++) 1488 vnic_rq_enable(&enic->rq[i]); 1489 1490 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1491 enic_dev_add_station_addr(enic); 1492 1493 enic_set_rx_mode(netdev); 1494 1495 netif_tx_wake_all_queues(netdev); 1496 1497 for (i = 0; i < enic->rq_count; i++) 1498 napi_enable(&enic->napi[i]); 1499 1500 enic_dev_enable(enic); 1501 1502 for (i = 0; i < enic->intr_count; i++) 1503 vnic_intr_unmask(&enic->intr[i]); 1504 1505 enic_notify_timer_start(enic); 1506 1507 return 0; 1508 1509 err_out_notify_unset: 1510 enic_dev_notify_unset(enic); 1511 err_out_free_intr: 1512 enic_free_intr(enic); 1513 1514 return err; 1515 } 1516 1517 /* rtnl lock is held, process context */ 1518 static int enic_stop(struct net_device *netdev) 1519 { 1520 struct enic *enic = netdev_priv(netdev); 1521 unsigned int i; 1522 int err; 1523 1524 for (i = 0; i < enic->intr_count; i++) { 1525 vnic_intr_mask(&enic->intr[i]); 1526 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1527 } 1528 1529 enic_synchronize_irqs(enic); 1530 1531 del_timer_sync(&enic->notify_timer); 1532 1533 enic_dev_disable(enic); 1534 1535 for (i = 0; i < enic->rq_count; i++) 1536 napi_disable(&enic->napi[i]); 1537 1538 netif_carrier_off(netdev); 1539 netif_tx_disable(netdev); 1540 1541 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1542 enic_dev_del_station_addr(enic); 1543 1544 for (i = 0; i < enic->wq_count; i++) { 1545 err = vnic_wq_disable(&enic->wq[i]); 1546 if (err) 1547 return err; 1548 } 1549 for (i = 0; i < enic->rq_count; i++) { 1550 err = vnic_rq_disable(&enic->rq[i]); 1551 if (err) 1552 return err; 1553 } 1554 1555 enic_dev_notify_unset(enic); 1556 enic_free_intr(enic); 1557 1558 for (i = 0; i < enic->wq_count; i++) 1559 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 1560 for (i = 0; i < enic->rq_count; i++) 1561 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1562 for (i = 0; i < enic->cq_count; i++) 1563 vnic_cq_clean(&enic->cq[i]); 1564 for (i = 0; i < enic->intr_count; i++) 1565 vnic_intr_clean(&enic->intr[i]); 1566 1567 return 0; 1568 } 1569 1570 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1571 { 1572 struct enic *enic = netdev_priv(netdev); 1573 int running = netif_running(netdev); 1574 1575 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU) 1576 return -EINVAL; 1577 1578 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1579 return -EOPNOTSUPP; 1580 1581 if (running) 1582 enic_stop(netdev); 1583 1584 netdev->mtu = new_mtu; 1585 1586 if (netdev->mtu > enic->port_mtu) 1587 netdev_warn(netdev, 1588 "interface MTU (%d) set higher than port MTU (%d)\n", 1589 netdev->mtu, enic->port_mtu); 1590 1591 if (running) 1592 enic_open(netdev); 1593 1594 return 0; 1595 } 1596 1597 static void enic_change_mtu_work(struct work_struct *work) 1598 { 1599 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1600 struct net_device *netdev = enic->netdev; 1601 int new_mtu = vnic_dev_mtu(enic->vdev); 1602 int err; 1603 unsigned int i; 1604 1605 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu)); 1606 1607 rtnl_lock(); 1608 1609 /* Stop RQ */ 1610 del_timer_sync(&enic->notify_timer); 1611 1612 for (i = 0; i < enic->rq_count; i++) 1613 napi_disable(&enic->napi[i]); 1614 1615 vnic_intr_mask(&enic->intr[0]); 1616 enic_synchronize_irqs(enic); 1617 err = vnic_rq_disable(&enic->rq[0]); 1618 if (err) { 1619 rtnl_unlock(); 1620 netdev_err(netdev, "Unable to disable RQ.\n"); 1621 return; 1622 } 1623 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf); 1624 vnic_cq_clean(&enic->cq[0]); 1625 vnic_intr_clean(&enic->intr[0]); 1626 1627 /* Fill RQ with new_mtu-sized buffers */ 1628 netdev->mtu = new_mtu; 1629 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1630 /* Need at least one buffer on ring to get going */ 1631 if (vnic_rq_desc_used(&enic->rq[0]) == 0) { 1632 rtnl_unlock(); 1633 netdev_err(netdev, "Unable to alloc receive buffers.\n"); 1634 return; 1635 } 1636 1637 /* Start RQ */ 1638 vnic_rq_enable(&enic->rq[0]); 1639 napi_enable(&enic->napi[0]); 1640 vnic_intr_unmask(&enic->intr[0]); 1641 enic_notify_timer_start(enic); 1642 1643 rtnl_unlock(); 1644 1645 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1646 } 1647 1648 #ifdef CONFIG_NET_POLL_CONTROLLER 1649 static void enic_poll_controller(struct net_device *netdev) 1650 { 1651 struct enic *enic = netdev_priv(netdev); 1652 struct vnic_dev *vdev = enic->vdev; 1653 unsigned int i, intr; 1654 1655 switch (vnic_dev_get_intr_mode(vdev)) { 1656 case VNIC_DEV_INTR_MODE_MSIX: 1657 for (i = 0; i < enic->rq_count; i++) { 1658 intr = enic_msix_rq_intr(enic, i); 1659 enic_isr_msix_rq(enic->msix_entry[intr].vector, 1660 &enic->napi[i]); 1661 } 1662 1663 for (i = 0; i < enic->wq_count; i++) { 1664 intr = enic_msix_wq_intr(enic, i); 1665 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic); 1666 } 1667 1668 break; 1669 case VNIC_DEV_INTR_MODE_MSI: 1670 enic_isr_msi(enic->pdev->irq, enic); 1671 break; 1672 case VNIC_DEV_INTR_MODE_INTX: 1673 enic_isr_legacy(enic->pdev->irq, netdev); 1674 break; 1675 default: 1676 break; 1677 } 1678 } 1679 #endif 1680 1681 static int enic_dev_wait(struct vnic_dev *vdev, 1682 int (*start)(struct vnic_dev *, int), 1683 int (*finished)(struct vnic_dev *, int *), 1684 int arg) 1685 { 1686 unsigned long time; 1687 int done; 1688 int err; 1689 1690 BUG_ON(in_interrupt()); 1691 1692 err = start(vdev, arg); 1693 if (err) 1694 return err; 1695 1696 /* Wait for func to complete...2 seconds max 1697 */ 1698 1699 time = jiffies + (HZ * 2); 1700 do { 1701 1702 err = finished(vdev, &done); 1703 if (err) 1704 return err; 1705 1706 if (done) 1707 return 0; 1708 1709 schedule_timeout_uninterruptible(HZ / 10); 1710 1711 } while (time_after(time, jiffies)); 1712 1713 return -ETIMEDOUT; 1714 } 1715 1716 static int enic_dev_open(struct enic *enic) 1717 { 1718 int err; 1719 1720 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1721 vnic_dev_open_done, 0); 1722 if (err) 1723 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1724 err); 1725 1726 return err; 1727 } 1728 1729 static int enic_dev_hang_reset(struct enic *enic) 1730 { 1731 int err; 1732 1733 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 1734 vnic_dev_hang_reset_done, 0); 1735 if (err) 1736 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 1737 err); 1738 1739 return err; 1740 } 1741 1742 static int enic_set_rsskey(struct enic *enic) 1743 { 1744 dma_addr_t rss_key_buf_pa; 1745 union vnic_rss_key *rss_key_buf_va = NULL; 1746 union vnic_rss_key rss_key = { 1747 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}, 1748 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}, 1749 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}, 1750 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}, 1751 }; 1752 int err; 1753 1754 rss_key_buf_va = pci_alloc_consistent(enic->pdev, 1755 sizeof(union vnic_rss_key), &rss_key_buf_pa); 1756 if (!rss_key_buf_va) 1757 return -ENOMEM; 1758 1759 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key)); 1760 1761 spin_lock(&enic->devcmd_lock); 1762 err = enic_set_rss_key(enic, 1763 rss_key_buf_pa, 1764 sizeof(union vnic_rss_key)); 1765 spin_unlock(&enic->devcmd_lock); 1766 1767 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key), 1768 rss_key_buf_va, rss_key_buf_pa); 1769 1770 return err; 1771 } 1772 1773 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 1774 { 1775 dma_addr_t rss_cpu_buf_pa; 1776 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 1777 unsigned int i; 1778 int err; 1779 1780 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev, 1781 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa); 1782 if (!rss_cpu_buf_va) 1783 return -ENOMEM; 1784 1785 for (i = 0; i < (1 << rss_hash_bits); i++) 1786 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 1787 1788 spin_lock(&enic->devcmd_lock); 1789 err = enic_set_rss_cpu(enic, 1790 rss_cpu_buf_pa, 1791 sizeof(union vnic_rss_cpu)); 1792 spin_unlock(&enic->devcmd_lock); 1793 1794 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu), 1795 rss_cpu_buf_va, rss_cpu_buf_pa); 1796 1797 return err; 1798 } 1799 1800 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 1801 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 1802 { 1803 const u8 tso_ipid_split_en = 0; 1804 const u8 ig_vlan_strip_en = 1; 1805 int err; 1806 1807 /* Enable VLAN tag stripping. 1808 */ 1809 1810 spin_lock(&enic->devcmd_lock); 1811 err = enic_set_nic_cfg(enic, 1812 rss_default_cpu, rss_hash_type, 1813 rss_hash_bits, rss_base_cpu, 1814 rss_enable, tso_ipid_split_en, 1815 ig_vlan_strip_en); 1816 spin_unlock(&enic->devcmd_lock); 1817 1818 return err; 1819 } 1820 1821 static int enic_set_rss_nic_cfg(struct enic *enic) 1822 { 1823 struct device *dev = enic_get_dev(enic); 1824 const u8 rss_default_cpu = 0; 1825 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 1826 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 1827 NIC_CFG_RSS_HASH_TYPE_IPV6 | 1828 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 1829 const u8 rss_hash_bits = 7; 1830 const u8 rss_base_cpu = 0; 1831 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 1832 1833 if (rss_enable) { 1834 if (!enic_set_rsskey(enic)) { 1835 if (enic_set_rsscpu(enic, rss_hash_bits)) { 1836 rss_enable = 0; 1837 dev_warn(dev, "RSS disabled, " 1838 "Failed to set RSS cpu indirection table."); 1839 } 1840 } else { 1841 rss_enable = 0; 1842 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 1843 } 1844 } 1845 1846 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 1847 rss_hash_bits, rss_base_cpu, rss_enable); 1848 } 1849 1850 static void enic_reset(struct work_struct *work) 1851 { 1852 struct enic *enic = container_of(work, struct enic, reset); 1853 1854 if (!netif_running(enic->netdev)) 1855 return; 1856 1857 rtnl_lock(); 1858 1859 spin_lock(&enic->enic_api_lock); 1860 enic_dev_hang_notify(enic); 1861 enic_stop(enic->netdev); 1862 enic_dev_hang_reset(enic); 1863 enic_reset_addr_lists(enic); 1864 enic_init_vnic_resources(enic); 1865 enic_set_rss_nic_cfg(enic); 1866 enic_dev_set_ig_vlan_rewrite_mode(enic); 1867 enic_open(enic->netdev); 1868 spin_unlock(&enic->enic_api_lock); 1869 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 1870 1871 rtnl_unlock(); 1872 } 1873 1874 static int enic_set_intr_mode(struct enic *enic) 1875 { 1876 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX); 1877 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX); 1878 unsigned int i; 1879 1880 /* Set interrupt mode (INTx, MSI, MSI-X) depending 1881 * on system capabilities. 1882 * 1883 * Try MSI-X first 1884 * 1885 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs 1886 * (the second to last INTR is used for WQ/RQ errors) 1887 * (the last INTR is used for notifications) 1888 */ 1889 1890 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2); 1891 for (i = 0; i < n + m + 2; i++) 1892 enic->msix_entry[i].entry = i; 1893 1894 /* Use multiple RQs if RSS is enabled 1895 */ 1896 1897 if (ENIC_SETTING(enic, RSS) && 1898 enic->config.intr_mode < 1 && 1899 enic->rq_count >= n && 1900 enic->wq_count >= m && 1901 enic->cq_count >= n + m && 1902 enic->intr_count >= n + m + 2) { 1903 1904 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 1905 n + m + 2, n + m + 2) > 0) { 1906 1907 enic->rq_count = n; 1908 enic->wq_count = m; 1909 enic->cq_count = n + m; 1910 enic->intr_count = n + m + 2; 1911 1912 vnic_dev_set_intr_mode(enic->vdev, 1913 VNIC_DEV_INTR_MODE_MSIX); 1914 1915 return 0; 1916 } 1917 } 1918 1919 if (enic->config.intr_mode < 1 && 1920 enic->rq_count >= 1 && 1921 enic->wq_count >= m && 1922 enic->cq_count >= 1 + m && 1923 enic->intr_count >= 1 + m + 2) { 1924 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 1925 1 + m + 2, 1 + m + 2) > 0) { 1926 1927 enic->rq_count = 1; 1928 enic->wq_count = m; 1929 enic->cq_count = 1 + m; 1930 enic->intr_count = 1 + m + 2; 1931 1932 vnic_dev_set_intr_mode(enic->vdev, 1933 VNIC_DEV_INTR_MODE_MSIX); 1934 1935 return 0; 1936 } 1937 } 1938 1939 /* Next try MSI 1940 * 1941 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR 1942 */ 1943 1944 if (enic->config.intr_mode < 2 && 1945 enic->rq_count >= 1 && 1946 enic->wq_count >= 1 && 1947 enic->cq_count >= 2 && 1948 enic->intr_count >= 1 && 1949 !pci_enable_msi(enic->pdev)) { 1950 1951 enic->rq_count = 1; 1952 enic->wq_count = 1; 1953 enic->cq_count = 2; 1954 enic->intr_count = 1; 1955 1956 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 1957 1958 return 0; 1959 } 1960 1961 /* Next try INTx 1962 * 1963 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs 1964 * (the first INTR is used for WQ/RQ) 1965 * (the second INTR is used for WQ/RQ errors) 1966 * (the last INTR is used for notifications) 1967 */ 1968 1969 if (enic->config.intr_mode < 3 && 1970 enic->rq_count >= 1 && 1971 enic->wq_count >= 1 && 1972 enic->cq_count >= 2 && 1973 enic->intr_count >= 3) { 1974 1975 enic->rq_count = 1; 1976 enic->wq_count = 1; 1977 enic->cq_count = 2; 1978 enic->intr_count = 3; 1979 1980 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 1981 1982 return 0; 1983 } 1984 1985 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 1986 1987 return -EINVAL; 1988 } 1989 1990 static void enic_clear_intr_mode(struct enic *enic) 1991 { 1992 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1993 case VNIC_DEV_INTR_MODE_MSIX: 1994 pci_disable_msix(enic->pdev); 1995 break; 1996 case VNIC_DEV_INTR_MODE_MSI: 1997 pci_disable_msi(enic->pdev); 1998 break; 1999 default: 2000 break; 2001 } 2002 2003 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2004 } 2005 2006 static const struct net_device_ops enic_netdev_dynamic_ops = { 2007 .ndo_open = enic_open, 2008 .ndo_stop = enic_stop, 2009 .ndo_start_xmit = enic_hard_start_xmit, 2010 .ndo_get_stats64 = enic_get_stats, 2011 .ndo_validate_addr = eth_validate_addr, 2012 .ndo_set_rx_mode = enic_set_rx_mode, 2013 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2014 .ndo_change_mtu = enic_change_mtu, 2015 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2016 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2017 .ndo_tx_timeout = enic_tx_timeout, 2018 .ndo_set_vf_port = enic_set_vf_port, 2019 .ndo_get_vf_port = enic_get_vf_port, 2020 .ndo_set_vf_mac = enic_set_vf_mac, 2021 #ifdef CONFIG_NET_POLL_CONTROLLER 2022 .ndo_poll_controller = enic_poll_controller, 2023 #endif 2024 }; 2025 2026 static const struct net_device_ops enic_netdev_ops = { 2027 .ndo_open = enic_open, 2028 .ndo_stop = enic_stop, 2029 .ndo_start_xmit = enic_hard_start_xmit, 2030 .ndo_get_stats64 = enic_get_stats, 2031 .ndo_validate_addr = eth_validate_addr, 2032 .ndo_set_mac_address = enic_set_mac_address, 2033 .ndo_set_rx_mode = enic_set_rx_mode, 2034 .ndo_change_mtu = enic_change_mtu, 2035 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2036 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2037 .ndo_tx_timeout = enic_tx_timeout, 2038 .ndo_set_vf_port = enic_set_vf_port, 2039 .ndo_get_vf_port = enic_get_vf_port, 2040 .ndo_set_vf_mac = enic_set_vf_mac, 2041 #ifdef CONFIG_NET_POLL_CONTROLLER 2042 .ndo_poll_controller = enic_poll_controller, 2043 #endif 2044 }; 2045 2046 static void enic_dev_deinit(struct enic *enic) 2047 { 2048 unsigned int i; 2049 2050 for (i = 0; i < enic->rq_count; i++) 2051 netif_napi_del(&enic->napi[i]); 2052 2053 enic_free_vnic_resources(enic); 2054 enic_clear_intr_mode(enic); 2055 } 2056 2057 static int enic_dev_init(struct enic *enic) 2058 { 2059 struct device *dev = enic_get_dev(enic); 2060 struct net_device *netdev = enic->netdev; 2061 unsigned int i; 2062 int err; 2063 2064 /* Get interrupt coalesce timer info */ 2065 err = enic_dev_intr_coal_timer_info(enic); 2066 if (err) { 2067 dev_warn(dev, "Using default conversion factor for " 2068 "interrupt coalesce timer\n"); 2069 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2070 } 2071 2072 /* Get vNIC configuration 2073 */ 2074 2075 err = enic_get_vnic_config(enic); 2076 if (err) { 2077 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2078 return err; 2079 } 2080 2081 /* Get available resource counts 2082 */ 2083 2084 enic_get_res_counts(enic); 2085 2086 /* Set interrupt mode based on resource counts and system 2087 * capabilities 2088 */ 2089 2090 err = enic_set_intr_mode(enic); 2091 if (err) { 2092 dev_err(dev, "Failed to set intr mode based on resource " 2093 "counts and system capabilities, aborting\n"); 2094 return err; 2095 } 2096 2097 /* Allocate and configure vNIC resources 2098 */ 2099 2100 err = enic_alloc_vnic_resources(enic); 2101 if (err) { 2102 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2103 goto err_out_free_vnic_resources; 2104 } 2105 2106 enic_init_vnic_resources(enic); 2107 2108 err = enic_set_rss_nic_cfg(enic); 2109 if (err) { 2110 dev_err(dev, "Failed to config nic, aborting\n"); 2111 goto err_out_free_vnic_resources; 2112 } 2113 2114 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2115 default: 2116 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64); 2117 break; 2118 case VNIC_DEV_INTR_MODE_MSIX: 2119 for (i = 0; i < enic->rq_count; i++) 2120 netif_napi_add(netdev, &enic->napi[i], 2121 enic_poll_msix, 64); 2122 break; 2123 } 2124 2125 return 0; 2126 2127 err_out_free_vnic_resources: 2128 enic_clear_intr_mode(enic); 2129 enic_free_vnic_resources(enic); 2130 2131 return err; 2132 } 2133 2134 static void enic_iounmap(struct enic *enic) 2135 { 2136 unsigned int i; 2137 2138 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2139 if (enic->bar[i].vaddr) 2140 iounmap(enic->bar[i].vaddr); 2141 } 2142 2143 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2144 { 2145 struct device *dev = &pdev->dev; 2146 struct net_device *netdev; 2147 struct enic *enic; 2148 int using_dac = 0; 2149 unsigned int i; 2150 int err; 2151 #ifdef CONFIG_PCI_IOV 2152 int pos = 0; 2153 #endif 2154 int num_pps = 1; 2155 2156 /* Allocate net device structure and initialize. Private 2157 * instance data is initialized to zero. 2158 */ 2159 2160 netdev = alloc_etherdev_mqs(sizeof(struct enic), 2161 ENIC_RQ_MAX, ENIC_WQ_MAX); 2162 if (!netdev) 2163 return -ENOMEM; 2164 2165 pci_set_drvdata(pdev, netdev); 2166 2167 SET_NETDEV_DEV(netdev, &pdev->dev); 2168 2169 enic = netdev_priv(netdev); 2170 enic->netdev = netdev; 2171 enic->pdev = pdev; 2172 2173 /* Setup PCI resources 2174 */ 2175 2176 err = pci_enable_device_mem(pdev); 2177 if (err) { 2178 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2179 goto err_out_free_netdev; 2180 } 2181 2182 err = pci_request_regions(pdev, DRV_NAME); 2183 if (err) { 2184 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2185 goto err_out_disable_device; 2186 } 2187 2188 pci_set_master(pdev); 2189 2190 /* Query PCI controller on system for DMA addressing 2191 * limitation for the device. Try 64-bit first, and 2192 * fail to 32-bit. 2193 */ 2194 2195 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2196 if (err) { 2197 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2198 if (err) { 2199 dev_err(dev, "No usable DMA configuration, aborting\n"); 2200 goto err_out_release_regions; 2201 } 2202 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2203 if (err) { 2204 dev_err(dev, "Unable to obtain %u-bit DMA " 2205 "for consistent allocations, aborting\n", 32); 2206 goto err_out_release_regions; 2207 } 2208 } else { 2209 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2210 if (err) { 2211 dev_err(dev, "Unable to obtain %u-bit DMA " 2212 "for consistent allocations, aborting\n", 64); 2213 goto err_out_release_regions; 2214 } 2215 using_dac = 1; 2216 } 2217 2218 /* Map vNIC resources from BAR0-5 2219 */ 2220 2221 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2222 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2223 continue; 2224 enic->bar[i].len = pci_resource_len(pdev, i); 2225 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2226 if (!enic->bar[i].vaddr) { 2227 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2228 err = -ENODEV; 2229 goto err_out_iounmap; 2230 } 2231 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2232 } 2233 2234 /* Register vNIC device 2235 */ 2236 2237 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2238 ARRAY_SIZE(enic->bar)); 2239 if (!enic->vdev) { 2240 dev_err(dev, "vNIC registration failed, aborting\n"); 2241 err = -ENODEV; 2242 goto err_out_iounmap; 2243 } 2244 2245 #ifdef CONFIG_PCI_IOV 2246 /* Get number of subvnics */ 2247 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2248 if (pos) { 2249 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2250 &enic->num_vfs); 2251 if (enic->num_vfs) { 2252 err = pci_enable_sriov(pdev, enic->num_vfs); 2253 if (err) { 2254 dev_err(dev, "SRIOV enable failed, aborting." 2255 " pci_enable_sriov() returned %d\n", 2256 err); 2257 goto err_out_vnic_unregister; 2258 } 2259 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2260 num_pps = enic->num_vfs; 2261 } 2262 } 2263 #endif 2264 2265 /* Allocate structure for port profiles */ 2266 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL); 2267 if (!enic->pp) { 2268 err = -ENOMEM; 2269 goto err_out_disable_sriov_pp; 2270 } 2271 2272 /* Issue device open to get device in known state 2273 */ 2274 2275 err = enic_dev_open(enic); 2276 if (err) { 2277 dev_err(dev, "vNIC dev open failed, aborting\n"); 2278 goto err_out_disable_sriov; 2279 } 2280 2281 /* Setup devcmd lock 2282 */ 2283 2284 spin_lock_init(&enic->devcmd_lock); 2285 spin_lock_init(&enic->enic_api_lock); 2286 2287 /* 2288 * Set ingress vlan rewrite mode before vnic initialization 2289 */ 2290 2291 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2292 if (err) { 2293 dev_err(dev, 2294 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2295 goto err_out_dev_close; 2296 } 2297 2298 /* Issue device init to initialize the vnic-to-switch link. 2299 * We'll start with carrier off and wait for link UP 2300 * notification later to turn on carrier. We don't need 2301 * to wait here for the vnic-to-switch link initialization 2302 * to complete; link UP notification is the indication that 2303 * the process is complete. 2304 */ 2305 2306 netif_carrier_off(netdev); 2307 2308 /* Do not call dev_init for a dynamic vnic. 2309 * For a dynamic vnic, init_prov_info will be 2310 * called later by an upper layer. 2311 */ 2312 2313 if (!enic_is_dynamic(enic)) { 2314 err = vnic_dev_init(enic->vdev, 0); 2315 if (err) { 2316 dev_err(dev, "vNIC dev init failed, aborting\n"); 2317 goto err_out_dev_close; 2318 } 2319 } 2320 2321 err = enic_dev_init(enic); 2322 if (err) { 2323 dev_err(dev, "Device initialization failed, aborting\n"); 2324 goto err_out_dev_close; 2325 } 2326 2327 netif_set_real_num_tx_queues(netdev, enic->wq_count); 2328 netif_set_real_num_rx_queues(netdev, enic->rq_count); 2329 2330 /* Setup notification timer, HW reset task, and wq locks 2331 */ 2332 2333 init_timer(&enic->notify_timer); 2334 enic->notify_timer.function = enic_notify_timer; 2335 enic->notify_timer.data = (unsigned long)enic; 2336 2337 enic_set_rx_coal_setting(enic); 2338 INIT_WORK(&enic->reset, enic_reset); 2339 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2340 2341 for (i = 0; i < enic->wq_count; i++) 2342 spin_lock_init(&enic->wq_lock[i]); 2343 2344 /* Register net device 2345 */ 2346 2347 enic->port_mtu = enic->config.mtu; 2348 (void)enic_change_mtu(netdev, enic->port_mtu); 2349 2350 err = enic_set_mac_addr(netdev, enic->mac_addr); 2351 if (err) { 2352 dev_err(dev, "Invalid MAC address, aborting\n"); 2353 goto err_out_dev_deinit; 2354 } 2355 2356 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2357 /* rx coalesce time already got initialized. This gets used 2358 * if adaptive coal is turned off 2359 */ 2360 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2361 2362 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2363 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2364 else 2365 netdev->netdev_ops = &enic_netdev_ops; 2366 2367 netdev->watchdog_timeo = 2 * HZ; 2368 enic_set_ethtool_ops(netdev); 2369 2370 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2371 if (ENIC_SETTING(enic, LOOP)) { 2372 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2373 enic->loop_enable = 1; 2374 enic->loop_tag = enic->config.loop_tag; 2375 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2376 } 2377 if (ENIC_SETTING(enic, TXCSUM)) 2378 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2379 if (ENIC_SETTING(enic, TSO)) 2380 netdev->hw_features |= NETIF_F_TSO | 2381 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2382 if (ENIC_SETTING(enic, RSS)) 2383 netdev->hw_features |= NETIF_F_RXHASH; 2384 if (ENIC_SETTING(enic, RXCSUM)) 2385 netdev->hw_features |= NETIF_F_RXCSUM; 2386 2387 netdev->features |= netdev->hw_features; 2388 2389 if (using_dac) 2390 netdev->features |= NETIF_F_HIGHDMA; 2391 2392 netdev->priv_flags |= IFF_UNICAST_FLT; 2393 2394 err = register_netdev(netdev); 2395 if (err) { 2396 dev_err(dev, "Cannot register net device, aborting\n"); 2397 goto err_out_dev_deinit; 2398 } 2399 2400 return 0; 2401 2402 err_out_dev_deinit: 2403 enic_dev_deinit(enic); 2404 err_out_dev_close: 2405 vnic_dev_close(enic->vdev); 2406 err_out_disable_sriov: 2407 kfree(enic->pp); 2408 err_out_disable_sriov_pp: 2409 #ifdef CONFIG_PCI_IOV 2410 if (enic_sriov_enabled(enic)) { 2411 pci_disable_sriov(pdev); 2412 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2413 } 2414 err_out_vnic_unregister: 2415 #endif 2416 vnic_dev_unregister(enic->vdev); 2417 err_out_iounmap: 2418 enic_iounmap(enic); 2419 err_out_release_regions: 2420 pci_release_regions(pdev); 2421 err_out_disable_device: 2422 pci_disable_device(pdev); 2423 err_out_free_netdev: 2424 free_netdev(netdev); 2425 2426 return err; 2427 } 2428 2429 static void enic_remove(struct pci_dev *pdev) 2430 { 2431 struct net_device *netdev = pci_get_drvdata(pdev); 2432 2433 if (netdev) { 2434 struct enic *enic = netdev_priv(netdev); 2435 2436 cancel_work_sync(&enic->reset); 2437 cancel_work_sync(&enic->change_mtu_work); 2438 unregister_netdev(netdev); 2439 enic_dev_deinit(enic); 2440 vnic_dev_close(enic->vdev); 2441 #ifdef CONFIG_PCI_IOV 2442 if (enic_sriov_enabled(enic)) { 2443 pci_disable_sriov(pdev); 2444 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2445 } 2446 #endif 2447 kfree(enic->pp); 2448 vnic_dev_unregister(enic->vdev); 2449 enic_iounmap(enic); 2450 pci_release_regions(pdev); 2451 pci_disable_device(pdev); 2452 free_netdev(netdev); 2453 } 2454 } 2455 2456 static struct pci_driver enic_driver = { 2457 .name = DRV_NAME, 2458 .id_table = enic_id_table, 2459 .probe = enic_probe, 2460 .remove = enic_remove, 2461 }; 2462 2463 static int __init enic_init_module(void) 2464 { 2465 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION); 2466 2467 return pci_register_driver(&enic_driver); 2468 } 2469 2470 static void __exit enic_cleanup_module(void) 2471 { 2472 pci_unregister_driver(&enic_driver); 2473 } 2474 2475 module_init(enic_init_module); 2476 module_exit(enic_cleanup_module); 2477