1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #ifndef _ENIC_H_ 21 #define _ENIC_H_ 22 23 #include "vnic_enet.h" 24 #include "vnic_dev.h" 25 #include "vnic_wq.h" 26 #include "vnic_rq.h" 27 #include "vnic_cq.h" 28 #include "vnic_intr.h" 29 #include "vnic_stats.h" 30 #include "vnic_nic.h" 31 #include "vnic_rss.h" 32 33 #define DRV_NAME "enic" 34 #define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" 35 #define DRV_VERSION "2.1.1.39" 36 #define DRV_COPYRIGHT "Copyright 2008-2011 Cisco Systems, Inc" 37 38 #define ENIC_BARS_MAX 6 39 40 #define ENIC_WQ_MAX 1 41 #define ENIC_RQ_MAX 8 42 #define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX) 43 #define ENIC_INTR_MAX (ENIC_CQ_MAX + 2) 44 45 struct enic_msix_entry { 46 int requested; 47 char devname[IFNAMSIZ]; 48 irqreturn_t (*isr)(int, void *); 49 void *devid; 50 }; 51 52 /* priv_flags */ 53 #define ENIC_SRIOV_ENABLED (1 << 0) 54 55 /* enic port profile set flags */ 56 #define ENIC_PORT_REQUEST_APPLIED (1 << 0) 57 #define ENIC_SET_REQUEST (1 << 1) 58 #define ENIC_SET_NAME (1 << 2) 59 #define ENIC_SET_INSTANCE (1 << 3) 60 #define ENIC_SET_HOST (1 << 4) 61 62 struct enic_port_profile { 63 u32 set; 64 u8 request; 65 char name[PORT_PROFILE_MAX]; 66 u8 instance_uuid[PORT_UUID_MAX]; 67 u8 host_uuid[PORT_UUID_MAX]; 68 u8 vf_mac[ETH_ALEN]; 69 u8 mac_addr[ETH_ALEN]; 70 }; 71 72 /* Per-instance private data structure */ 73 struct enic { 74 struct net_device *netdev; 75 struct pci_dev *pdev; 76 struct vnic_enet_config config; 77 struct vnic_dev_bar bar[ENIC_BARS_MAX]; 78 struct vnic_dev *vdev; 79 struct timer_list notify_timer; 80 struct work_struct reset; 81 struct work_struct change_mtu_work; 82 struct msix_entry msix_entry[ENIC_INTR_MAX]; 83 struct enic_msix_entry msix[ENIC_INTR_MAX]; 84 u32 msg_enable; 85 spinlock_t devcmd_lock; 86 u8 mac_addr[ETH_ALEN]; 87 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN]; 88 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN]; 89 unsigned int flags; 90 unsigned int priv_flags; 91 unsigned int mc_count; 92 unsigned int uc_count; 93 u32 port_mtu; 94 u32 rx_coalesce_usecs; 95 u32 tx_coalesce_usecs; 96 #ifdef CONFIG_PCI_IOV 97 u16 num_vfs; 98 #endif 99 struct enic_port_profile *pp; 100 101 /* work queue cache line section */ 102 ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX]; 103 spinlock_t wq_lock[ENIC_WQ_MAX]; 104 unsigned int wq_count; 105 u16 loop_enable; 106 u16 loop_tag; 107 108 /* receive queue cache line section */ 109 ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX]; 110 unsigned int rq_count; 111 u64 rq_truncated_pkts; 112 u64 rq_bad_fcs; 113 struct napi_struct napi[ENIC_RQ_MAX]; 114 115 /* interrupt resource cache line section */ 116 ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX]; 117 unsigned int intr_count; 118 u32 __iomem *legacy_pba; /* memory-mapped */ 119 120 /* completion queue cache line section */ 121 ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX]; 122 unsigned int cq_count; 123 }; 124 125 static inline struct device *enic_get_dev(struct enic *enic) 126 { 127 return &(enic->pdev->dev); 128 } 129 130 void enic_reset_addr_lists(struct enic *enic); 131 int enic_sriov_enabled(struct enic *enic); 132 int enic_is_valid_vf(struct enic *enic, int vf); 133 int enic_is_dynamic(struct enic *enic); 134 135 #endif /* _ENIC_H_ */ 136