1a6a5580cSJeff Kirsher /* 2a6a5580cSJeff Kirsher * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3a6a5580cSJeff Kirsher * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4a6a5580cSJeff Kirsher * 5a6a5580cSJeff Kirsher * This program is free software; you may redistribute it and/or modify 6a6a5580cSJeff Kirsher * it under the terms of the GNU General Public License as published by 7a6a5580cSJeff Kirsher * the Free Software Foundation; version 2 of the License. 8a6a5580cSJeff Kirsher * 9a6a5580cSJeff Kirsher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10a6a5580cSJeff Kirsher * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11a6a5580cSJeff Kirsher * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12a6a5580cSJeff Kirsher * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13a6a5580cSJeff Kirsher * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14a6a5580cSJeff Kirsher * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15a6a5580cSJeff Kirsher * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16a6a5580cSJeff Kirsher * SOFTWARE. 17a6a5580cSJeff Kirsher * 18a6a5580cSJeff Kirsher */ 19a6a5580cSJeff Kirsher 20a6a5580cSJeff Kirsher #ifndef _ENIC_H_ 21a6a5580cSJeff Kirsher #define _ENIC_H_ 22a6a5580cSJeff Kirsher 23a6a5580cSJeff Kirsher #include "vnic_enet.h" 24a6a5580cSJeff Kirsher #include "vnic_dev.h" 25a6a5580cSJeff Kirsher #include "vnic_wq.h" 26a6a5580cSJeff Kirsher #include "vnic_rq.h" 27a6a5580cSJeff Kirsher #include "vnic_cq.h" 28a6a5580cSJeff Kirsher #include "vnic_intr.h" 29a6a5580cSJeff Kirsher #include "vnic_stats.h" 30a6a5580cSJeff Kirsher #include "vnic_nic.h" 31a6a5580cSJeff Kirsher #include "vnic_rss.h" 32fef1f07cSJosh Boyer #include <linux/irq.h> 33a6a5580cSJeff Kirsher 34a6a5580cSJeff Kirsher #define DRV_NAME "enic" 35a6a5580cSJeff Kirsher #define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" 363f255dccSGovindarajulu Varadarajan #define DRV_VERSION "2.1.1.83" 3792e2b469SNeel Patel #define DRV_COPYRIGHT "Copyright 2008-2013 Cisco Systems, Inc" 38a6a5580cSJeff Kirsher 39a6a5580cSJeff Kirsher #define ENIC_BARS_MAX 6 40a6a5580cSJeff Kirsher 41822473b6Sgovindarajulu.v #define ENIC_WQ_MAX 8 4263da93d9SNeel Patel #define ENIC_RQ_MAX 8 43a6a5580cSJeff Kirsher #define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX) 44a6a5580cSJeff Kirsher #define ENIC_INTR_MAX (ENIC_CQ_MAX + 2) 45a6a5580cSJeff Kirsher 467c2ce6e6SSujith Sankar #define ENIC_AIC_LARGE_PKT_DIFF 3 477c2ce6e6SSujith Sankar 48a6a5580cSJeff Kirsher struct enic_msix_entry { 49a6a5580cSJeff Kirsher int requested; 50a6a5580cSJeff Kirsher char devname[IFNAMSIZ]; 51a6a5580cSJeff Kirsher irqreturn_t (*isr)(int, void *); 52a6a5580cSJeff Kirsher void *devid; 53a6a5580cSJeff Kirsher }; 54a6a5580cSJeff Kirsher 557c2ce6e6SSujith Sankar /* Store only the lower range. Higher range is given by fw. */ 567c2ce6e6SSujith Sankar struct enic_intr_mod_range { 577c2ce6e6SSujith Sankar u32 small_pkt_range_start; 587c2ce6e6SSujith Sankar u32 large_pkt_range_start; 597c2ce6e6SSujith Sankar }; 607c2ce6e6SSujith Sankar 617c2ce6e6SSujith Sankar struct enic_intr_mod_table { 627c2ce6e6SSujith Sankar u32 rx_rate; 637c2ce6e6SSujith Sankar u32 range_percent; 647c2ce6e6SSujith Sankar }; 657c2ce6e6SSujith Sankar 667c2ce6e6SSujith Sankar #define ENIC_MAX_LINK_SPEEDS 3 677c2ce6e6SSujith Sankar #define ENIC_LINK_SPEED_10G 10000 687c2ce6e6SSujith Sankar #define ENIC_LINK_SPEED_4G 4000 697c2ce6e6SSujith Sankar #define ENIC_LINK_40G_INDEX 2 707c2ce6e6SSujith Sankar #define ENIC_LINK_10G_INDEX 1 717c2ce6e6SSujith Sankar #define ENIC_LINK_4G_INDEX 0 727c2ce6e6SSujith Sankar #define ENIC_RX_COALESCE_RANGE_END 125 737c2ce6e6SSujith Sankar #define ENIC_AIC_TS_BREAK 100 747c2ce6e6SSujith Sankar 757c2ce6e6SSujith Sankar struct enic_rx_coal { 767c2ce6e6SSujith Sankar u32 small_pkt_range_start; 777c2ce6e6SSujith Sankar u32 large_pkt_range_start; 787c2ce6e6SSujith Sankar u32 range_end; 797c2ce6e6SSujith Sankar u32 use_adaptive_rx_coalesce; 807c2ce6e6SSujith Sankar }; 817c2ce6e6SSujith Sankar 828749b427SRoopa Prabhu /* priv_flags */ 838749b427SRoopa Prabhu #define ENIC_SRIOV_ENABLED (1 << 0) 848749b427SRoopa Prabhu 858749b427SRoopa Prabhu /* enic port profile set flags */ 86a6a5580cSJeff Kirsher #define ENIC_PORT_REQUEST_APPLIED (1 << 0) 87a6a5580cSJeff Kirsher #define ENIC_SET_REQUEST (1 << 1) 88a6a5580cSJeff Kirsher #define ENIC_SET_NAME (1 << 2) 89a6a5580cSJeff Kirsher #define ENIC_SET_INSTANCE (1 << 3) 90a6a5580cSJeff Kirsher #define ENIC_SET_HOST (1 << 4) 91a6a5580cSJeff Kirsher 92a6a5580cSJeff Kirsher struct enic_port_profile { 93a6a5580cSJeff Kirsher u32 set; 94a6a5580cSJeff Kirsher u8 request; 95a6a5580cSJeff Kirsher char name[PORT_PROFILE_MAX]; 96a6a5580cSJeff Kirsher u8 instance_uuid[PORT_UUID_MAX]; 97a6a5580cSJeff Kirsher u8 host_uuid[PORT_UUID_MAX]; 98a6a5580cSJeff Kirsher u8 vf_mac[ETH_ALEN]; 99a6a5580cSJeff Kirsher u8 mac_addr[ETH_ALEN]; 100a6a5580cSJeff Kirsher }; 101a6a5580cSJeff Kirsher 102a145df23SGovindarajulu Varadarajan /* enic_rfs_fltr_node - rfs filter node in hash table 103a145df23SGovindarajulu Varadarajan * @@keys: IPv4 5 tuple 104a145df23SGovindarajulu Varadarajan * @flow_id: flow_id of clsf filter provided by kernel 105a145df23SGovindarajulu Varadarajan * @fltr_id: filter id of clsf filter returned by adaptor 106a145df23SGovindarajulu Varadarajan * @rq_id: desired rq index 107a145df23SGovindarajulu Varadarajan * @node: hlist_node 108a145df23SGovindarajulu Varadarajan */ 109a145df23SGovindarajulu Varadarajan struct enic_rfs_fltr_node { 110a145df23SGovindarajulu Varadarajan struct flow_keys keys; 111a145df23SGovindarajulu Varadarajan u32 flow_id; 112a145df23SGovindarajulu Varadarajan u16 fltr_id; 113a145df23SGovindarajulu Varadarajan u16 rq_id; 114a145df23SGovindarajulu Varadarajan struct hlist_node node; 115a145df23SGovindarajulu Varadarajan }; 116a145df23SGovindarajulu Varadarajan 117a145df23SGovindarajulu Varadarajan /* enic_rfs_flw_tbl - rfs flow table 118a145df23SGovindarajulu Varadarajan * @max: Maximum number of filters vNIC supports 119a145df23SGovindarajulu Varadarajan * @free: Number of free filters available 120a145df23SGovindarajulu Varadarajan * @toclean: hash table index to clean next 121a145df23SGovindarajulu Varadarajan * @ht_head: hash table list head 122a145df23SGovindarajulu Varadarajan * @lock: spin lock 123a145df23SGovindarajulu Varadarajan * @rfs_may_expire: timer function for enic_rps_may_expire_flow 124a145df23SGovindarajulu Varadarajan */ 125a145df23SGovindarajulu Varadarajan struct enic_rfs_flw_tbl { 126a145df23SGovindarajulu Varadarajan u16 max; 127a145df23SGovindarajulu Varadarajan int free; 128a145df23SGovindarajulu Varadarajan 129a145df23SGovindarajulu Varadarajan #define ENIC_RFS_FLW_BITSHIFT (10) 130a145df23SGovindarajulu Varadarajan #define ENIC_RFS_FLW_MASK ((1 << ENIC_RFS_FLW_BITSHIFT) - 1) 131a145df23SGovindarajulu Varadarajan u16 toclean:ENIC_RFS_FLW_BITSHIFT; 132a145df23SGovindarajulu Varadarajan struct hlist_head ht_head[1 << ENIC_RFS_FLW_BITSHIFT]; 133a145df23SGovindarajulu Varadarajan spinlock_t lock; 134a145df23SGovindarajulu Varadarajan struct timer_list rfs_may_expire; 135a145df23SGovindarajulu Varadarajan }; 136a145df23SGovindarajulu Varadarajan 137a6a5580cSJeff Kirsher /* Per-instance private data structure */ 138a6a5580cSJeff Kirsher struct enic { 139a6a5580cSJeff Kirsher struct net_device *netdev; 140a6a5580cSJeff Kirsher struct pci_dev *pdev; 141a6a5580cSJeff Kirsher struct vnic_enet_config config; 142a6a5580cSJeff Kirsher struct vnic_dev_bar bar[ENIC_BARS_MAX]; 143a6a5580cSJeff Kirsher struct vnic_dev *vdev; 144a6a5580cSJeff Kirsher struct timer_list notify_timer; 145a6a5580cSJeff Kirsher struct work_struct reset; 146a6a5580cSJeff Kirsher struct work_struct change_mtu_work; 147a6a5580cSJeff Kirsher struct msix_entry msix_entry[ENIC_INTR_MAX]; 148a6a5580cSJeff Kirsher struct enic_msix_entry msix[ENIC_INTR_MAX]; 149a6a5580cSJeff Kirsher u32 msg_enable; 150a6a5580cSJeff Kirsher spinlock_t devcmd_lock; 151a6a5580cSJeff Kirsher u8 mac_addr[ETH_ALEN]; 152a6a5580cSJeff Kirsher unsigned int flags; 1538749b427SRoopa Prabhu unsigned int priv_flags; 154a6a5580cSJeff Kirsher unsigned int mc_count; 155a6a5580cSJeff Kirsher unsigned int uc_count; 156a6a5580cSJeff Kirsher u32 port_mtu; 1577c2ce6e6SSujith Sankar struct enic_rx_coal rx_coalesce_setting; 158a6a5580cSJeff Kirsher u32 rx_coalesce_usecs; 159a6a5580cSJeff Kirsher u32 tx_coalesce_usecs; 1608749b427SRoopa Prabhu #ifdef CONFIG_PCI_IOV 161413708bbSDan Carpenter u16 num_vfs; 1628749b427SRoopa Prabhu #endif 1630b038566SNeel Patel spinlock_t enic_api_lock; 1643f192795SRoopa Prabhu struct enic_port_profile *pp; 165a6a5580cSJeff Kirsher 166a6a5580cSJeff Kirsher /* work queue cache line section */ 167a6a5580cSJeff Kirsher ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX]; 168a6a5580cSJeff Kirsher spinlock_t wq_lock[ENIC_WQ_MAX]; 169a6a5580cSJeff Kirsher unsigned int wq_count; 170a6a5580cSJeff Kirsher u16 loop_enable; 171a6a5580cSJeff Kirsher u16 loop_tag; 172a6a5580cSJeff Kirsher 173a6a5580cSJeff Kirsher /* receive queue cache line section */ 174a6a5580cSJeff Kirsher ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX]; 175a6a5580cSJeff Kirsher unsigned int rq_count; 176a6a5580cSJeff Kirsher u64 rq_truncated_pkts; 177a6a5580cSJeff Kirsher u64 rq_bad_fcs; 1784cfe8785SGovindarajulu Varadarajan struct napi_struct napi[ENIC_RQ_MAX + ENIC_WQ_MAX]; 179a6a5580cSJeff Kirsher 180a6a5580cSJeff Kirsher /* interrupt resource cache line section */ 181a6a5580cSJeff Kirsher ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX]; 182a6a5580cSJeff Kirsher unsigned int intr_count; 183a6a5580cSJeff Kirsher u32 __iomem *legacy_pba; /* memory-mapped */ 184a6a5580cSJeff Kirsher 185a6a5580cSJeff Kirsher /* completion queue cache line section */ 186a6a5580cSJeff Kirsher ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX]; 187a6a5580cSJeff Kirsher unsigned int cq_count; 188a145df23SGovindarajulu Varadarajan struct enic_rfs_flw_tbl rfs_h; 189a03bb56eSGovindarajulu Varadarajan u32 rx_copybreak; 1904f675eb2SGovindarajulu Varadarajan u8 rss_key[ENIC_RSS_LEN]; 19158feff07SGovindarajulu Varadarajan struct vnic_gen_stats gen_stats; 192a6a5580cSJeff Kirsher }; 193a6a5580cSJeff Kirsher 194a6a5580cSJeff Kirsher static inline struct device *enic_get_dev(struct enic *enic) 195a6a5580cSJeff Kirsher { 196a6a5580cSJeff Kirsher return &(enic->pdev->dev); 197a6a5580cSJeff Kirsher } 198a6a5580cSJeff Kirsher 199f13bbc2fSNeel Patel static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq) 200f13bbc2fSNeel Patel { 201f13bbc2fSNeel Patel return rq; 202f13bbc2fSNeel Patel } 203f13bbc2fSNeel Patel 204f13bbc2fSNeel Patel static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq) 205f13bbc2fSNeel Patel { 206f13bbc2fSNeel Patel return enic->rq_count + wq; 207f13bbc2fSNeel Patel } 208f13bbc2fSNeel Patel 209f13bbc2fSNeel Patel static inline unsigned int enic_legacy_io_intr(void) 210f13bbc2fSNeel Patel { 211f13bbc2fSNeel Patel return 0; 212f13bbc2fSNeel Patel } 213f13bbc2fSNeel Patel 214f13bbc2fSNeel Patel static inline unsigned int enic_legacy_err_intr(void) 215f13bbc2fSNeel Patel { 216f13bbc2fSNeel Patel return 1; 217f13bbc2fSNeel Patel } 218f13bbc2fSNeel Patel 219f13bbc2fSNeel Patel static inline unsigned int enic_legacy_notify_intr(void) 220f13bbc2fSNeel Patel { 221f13bbc2fSNeel Patel return 2; 222f13bbc2fSNeel Patel } 223f13bbc2fSNeel Patel 224f13bbc2fSNeel Patel static inline unsigned int enic_msix_rq_intr(struct enic *enic, 225f13bbc2fSNeel Patel unsigned int rq) 226f13bbc2fSNeel Patel { 227f13bbc2fSNeel Patel return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset; 228f13bbc2fSNeel Patel } 229f13bbc2fSNeel Patel 230f13bbc2fSNeel Patel static inline unsigned int enic_msix_wq_intr(struct enic *enic, 231f13bbc2fSNeel Patel unsigned int wq) 232f13bbc2fSNeel Patel { 233f13bbc2fSNeel Patel return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset; 234f13bbc2fSNeel Patel } 235f13bbc2fSNeel Patel 236f13bbc2fSNeel Patel static inline unsigned int enic_msix_err_intr(struct enic *enic) 237f13bbc2fSNeel Patel { 238f13bbc2fSNeel Patel return enic->rq_count + enic->wq_count; 239f13bbc2fSNeel Patel } 240f13bbc2fSNeel Patel 241f13bbc2fSNeel Patel static inline unsigned int enic_msix_notify_intr(struct enic *enic) 242f13bbc2fSNeel Patel { 243f13bbc2fSNeel Patel return enic->rq_count + enic->wq_count + 1; 244f13bbc2fSNeel Patel } 245f13bbc2fSNeel Patel 246065df159SGovindarajulu Varadarajan static inline int enic_dma_map_check(struct enic *enic, dma_addr_t dma_addr) 247065df159SGovindarajulu Varadarajan { 248065df159SGovindarajulu Varadarajan if (unlikely(pci_dma_mapping_error(enic->pdev, dma_addr))) { 249065df159SGovindarajulu Varadarajan net_warn_ratelimited("%s: PCI dma mapping failed!\n", 250065df159SGovindarajulu Varadarajan enic->netdev->name); 25158feff07SGovindarajulu Varadarajan enic->gen_stats.dma_map_error++; 252065df159SGovindarajulu Varadarajan 253065df159SGovindarajulu Varadarajan return -ENOMEM; 254065df159SGovindarajulu Varadarajan } 255065df159SGovindarajulu Varadarajan 256065df159SGovindarajulu Varadarajan return 0; 257065df159SGovindarajulu Varadarajan } 258065df159SGovindarajulu Varadarajan 259a6a5580cSJeff Kirsher void enic_reset_addr_lists(struct enic *enic); 2608749b427SRoopa Prabhu int enic_sriov_enabled(struct enic *enic); 261889d13f5SRoopa Prabhu int enic_is_valid_vf(struct enic *enic, int vf); 2623f192795SRoopa Prabhu int enic_is_dynamic(struct enic *enic); 263f13bbc2fSNeel Patel void enic_set_ethtool_ops(struct net_device *netdev); 2644f675eb2SGovindarajulu Varadarajan int __enic_set_rsskey(struct enic *enic); 265a6a5580cSJeff Kirsher 266a6a5580cSJeff Kirsher #endif /* _ENIC_H_ */ 267