1 /* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36 #include <linux/pci.h> 37 38 #include "t4vf_common.h" 39 #include "t4vf_defs.h" 40 41 #include "../cxgb4/t4_regs.h" 42 #include "../cxgb4/t4fw_api.h" 43 44 /* 45 * Wait for the device to become ready (signified by our "who am I" register 46 * returning a value other than all 1's). Return an error if it doesn't 47 * become ready ... 48 */ 49 int t4vf_wait_dev_ready(struct adapter *adapter) 50 { 51 const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; 52 const u32 notready1 = 0xffffffff; 53 const u32 notready2 = 0xeeeeeeee; 54 u32 val; 55 56 val = t4_read_reg(adapter, whoami); 57 if (val != notready1 && val != notready2) 58 return 0; 59 msleep(500); 60 val = t4_read_reg(adapter, whoami); 61 if (val != notready1 && val != notready2) 62 return 0; 63 else 64 return -EIO; 65 } 66 67 /* 68 * Get the reply to a mailbox command and store it in @rpl in big-endian order 69 * (since the firmware data structures are specified in a big-endian layout). 70 */ 71 static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, 72 u32 mbox_data) 73 { 74 for ( ; size; size -= 8, mbox_data += 8) 75 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); 76 } 77 78 /* 79 * Dump contents of mailbox with a leading tag. 80 */ 81 static void dump_mbox(struct adapter *adapter, const char *tag, u32 mbox_data) 82 { 83 dev_err(adapter->pdev_dev, 84 "mbox %s: %llx %llx %llx %llx %llx %llx %llx %llx\n", tag, 85 (unsigned long long)t4_read_reg64(adapter, mbox_data + 0), 86 (unsigned long long)t4_read_reg64(adapter, mbox_data + 8), 87 (unsigned long long)t4_read_reg64(adapter, mbox_data + 16), 88 (unsigned long long)t4_read_reg64(adapter, mbox_data + 24), 89 (unsigned long long)t4_read_reg64(adapter, mbox_data + 32), 90 (unsigned long long)t4_read_reg64(adapter, mbox_data + 40), 91 (unsigned long long)t4_read_reg64(adapter, mbox_data + 48), 92 (unsigned long long)t4_read_reg64(adapter, mbox_data + 56)); 93 } 94 95 /** 96 * t4vf_wr_mbox_core - send a command to FW through the mailbox 97 * @adapter: the adapter 98 * @cmd: the command to write 99 * @size: command length in bytes 100 * @rpl: where to optionally store the reply 101 * @sleep_ok: if true we may sleep while awaiting command completion 102 * 103 * Sends the given command to FW through the mailbox and waits for the 104 * FW to execute the command. If @rpl is not %NULL it is used to store 105 * the FW's reply to the command. The command and its optional reply 106 * are of the same length. FW can take up to 500 ms to respond. 107 * @sleep_ok determines whether we may sleep while awaiting the response. 108 * If sleeping is allowed we use progressive backoff otherwise we spin. 109 * 110 * The return value is 0 on success or a negative errno on failure. A 111 * failure can happen either because we are not able to execute the 112 * command or FW executes it but signals an error. In the latter case 113 * the return value is the error code indicated by FW (negated). 114 */ 115 int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 116 void *rpl, bool sleep_ok) 117 { 118 static const int delay[] = { 119 1, 1, 3, 5, 10, 10, 20, 50, 100 120 }; 121 122 u32 v; 123 int i, ms, delay_idx; 124 const __be64 *p; 125 u32 mbox_data = T4VF_MBDATA_BASE_ADDR; 126 u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; 127 128 /* 129 * Commands must be multiples of 16 bytes in length and may not be 130 * larger than the size of the Mailbox Data register array. 131 */ 132 if ((size % 16) != 0 || 133 size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) 134 return -EINVAL; 135 136 /* 137 * Loop trying to get ownership of the mailbox. Return an error 138 * if we can't gain ownership. 139 */ 140 v = MBOWNER_GET(t4_read_reg(adapter, mbox_ctl)); 141 for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) 142 v = MBOWNER_GET(t4_read_reg(adapter, mbox_ctl)); 143 if (v != MBOX_OWNER_DRV) 144 return v == MBOX_OWNER_FW ? -EBUSY : -ETIMEDOUT; 145 146 /* 147 * Write the command array into the Mailbox Data register array and 148 * transfer ownership of the mailbox to the firmware. 149 * 150 * For the VFs, the Mailbox Data "registers" are actually backed by 151 * T4's "MA" interface rather than PL Registers (as is the case for 152 * the PFs). Because these are in different coherency domains, the 153 * write to the VF's PL-register-backed Mailbox Control can race in 154 * front of the writes to the MA-backed VF Mailbox Data "registers". 155 * So we need to do a read-back on at least one byte of the VF Mailbox 156 * Data registers before doing the write to the VF Mailbox Control 157 * register. 158 */ 159 for (i = 0, p = cmd; i < size; i += 8) 160 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); 161 t4_read_reg(adapter, mbox_data); /* flush write */ 162 163 t4_write_reg(adapter, mbox_ctl, 164 MBMSGVALID | MBOWNER(MBOX_OWNER_FW)); 165 t4_read_reg(adapter, mbox_ctl); /* flush write */ 166 167 /* 168 * Spin waiting for firmware to acknowledge processing our command. 169 */ 170 delay_idx = 0; 171 ms = delay[0]; 172 173 for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { 174 if (sleep_ok) { 175 ms = delay[delay_idx]; 176 if (delay_idx < ARRAY_SIZE(delay) - 1) 177 delay_idx++; 178 msleep(ms); 179 } else 180 mdelay(ms); 181 182 /* 183 * If we're the owner, see if this is the reply we wanted. 184 */ 185 v = t4_read_reg(adapter, mbox_ctl); 186 if (MBOWNER_GET(v) == MBOX_OWNER_DRV) { 187 /* 188 * If the Message Valid bit isn't on, revoke ownership 189 * of the mailbox and continue waiting for our reply. 190 */ 191 if ((v & MBMSGVALID) == 0) { 192 t4_write_reg(adapter, mbox_ctl, 193 MBOWNER(MBOX_OWNER_NONE)); 194 continue; 195 } 196 197 /* 198 * We now have our reply. Extract the command return 199 * value, copy the reply back to our caller's buffer 200 * (if specified) and revoke ownership of the mailbox. 201 * We return the (negated) firmware command return 202 * code (this depends on FW_SUCCESS == 0). 203 */ 204 205 /* return value in low-order little-endian word */ 206 v = t4_read_reg(adapter, mbox_data); 207 if (FW_CMD_RETVAL_G(v)) 208 dump_mbox(adapter, "FW Error", mbox_data); 209 210 if (rpl) { 211 /* request bit in high-order BE word */ 212 WARN_ON((be32_to_cpu(*(const u32 *)cmd) 213 & FW_CMD_REQUEST_F) == 0); 214 get_mbox_rpl(adapter, rpl, size, mbox_data); 215 WARN_ON((be32_to_cpu(*(u32 *)rpl) 216 & FW_CMD_REQUEST_F) != 0); 217 } 218 t4_write_reg(adapter, mbox_ctl, 219 MBOWNER(MBOX_OWNER_NONE)); 220 return -FW_CMD_RETVAL_G(v); 221 } 222 } 223 224 /* 225 * We timed out. Return the error ... 226 */ 227 dump_mbox(adapter, "FW Timeout", mbox_data); 228 return -ETIMEDOUT; 229 } 230 231 /** 232 * hash_mac_addr - return the hash value of a MAC address 233 * @addr: the 48-bit Ethernet MAC address 234 * 235 * Hashes a MAC address according to the hash function used by hardware 236 * inexact (hash) address matching. 237 */ 238 static int hash_mac_addr(const u8 *addr) 239 { 240 u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2]; 241 u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5]; 242 a ^= b; 243 a ^= (a >> 12); 244 a ^= (a >> 6); 245 return a & 0x3f; 246 } 247 248 /** 249 * init_link_config - initialize a link's SW state 250 * @lc: structure holding the link state 251 * @caps: link capabilities 252 * 253 * Initializes the SW state maintained for each link, including the link's 254 * capabilities and default speed/flow-control/autonegotiation settings. 255 */ 256 static void init_link_config(struct link_config *lc, unsigned int caps) 257 { 258 lc->supported = caps; 259 lc->requested_speed = 0; 260 lc->speed = 0; 261 lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; 262 if (lc->supported & SUPPORTED_Autoneg) { 263 lc->advertising = lc->supported; 264 lc->autoneg = AUTONEG_ENABLE; 265 lc->requested_fc |= PAUSE_AUTONEG; 266 } else { 267 lc->advertising = 0; 268 lc->autoneg = AUTONEG_DISABLE; 269 } 270 } 271 272 /** 273 * t4vf_port_init - initialize port hardware/software state 274 * @adapter: the adapter 275 * @pidx: the adapter port index 276 */ 277 int t4vf_port_init(struct adapter *adapter, int pidx) 278 { 279 struct port_info *pi = adap2pinfo(adapter, pidx); 280 struct fw_vi_cmd vi_cmd, vi_rpl; 281 struct fw_port_cmd port_cmd, port_rpl; 282 int v; 283 u32 word; 284 285 /* 286 * Execute a VI Read command to get our Virtual Interface information 287 * like MAC address, etc. 288 */ 289 memset(&vi_cmd, 0, sizeof(vi_cmd)); 290 vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 291 FW_CMD_REQUEST_F | 292 FW_CMD_READ_F); 293 vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); 294 vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); 295 v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); 296 if (v) 297 return v; 298 299 BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); 300 pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); 301 t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); 302 303 /* 304 * If we don't have read access to our port information, we're done 305 * now. Otherwise, execute a PORT Read command to get it ... 306 */ 307 if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) 308 return 0; 309 310 memset(&port_cmd, 0, sizeof(port_cmd)); 311 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 312 FW_CMD_REQUEST_F | 313 FW_CMD_READ_F | 314 FW_PORT_CMD_PORTID_V(pi->port_id)); 315 port_cmd.action_to_len16 = 316 cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) | 317 FW_LEN16(port_cmd)); 318 v = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); 319 if (v) 320 return v; 321 322 v = 0; 323 word = be16_to_cpu(port_rpl.u.info.pcap); 324 if (word & FW_PORT_CAP_SPEED_100M) 325 v |= SUPPORTED_100baseT_Full; 326 if (word & FW_PORT_CAP_SPEED_1G) 327 v |= SUPPORTED_1000baseT_Full; 328 if (word & FW_PORT_CAP_SPEED_10G) 329 v |= SUPPORTED_10000baseT_Full; 330 if (word & FW_PORT_CAP_SPEED_40G) 331 v |= SUPPORTED_40000baseSR4_Full; 332 if (word & FW_PORT_CAP_ANEG) 333 v |= SUPPORTED_Autoneg; 334 init_link_config(&pi->link_cfg, v); 335 336 return 0; 337 } 338 339 /** 340 * t4vf_fw_reset - issue a reset to FW 341 * @adapter: the adapter 342 * 343 * Issues a reset command to FW. For a Physical Function this would 344 * result in the Firmware reseting all of its state. For a Virtual 345 * Function this just resets the state associated with the VF. 346 */ 347 int t4vf_fw_reset(struct adapter *adapter) 348 { 349 struct fw_reset_cmd cmd; 350 351 memset(&cmd, 0, sizeof(cmd)); 352 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | 353 FW_CMD_WRITE_F); 354 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 355 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 356 } 357 358 /** 359 * t4vf_query_params - query FW or device parameters 360 * @adapter: the adapter 361 * @nparams: the number of parameters 362 * @params: the parameter names 363 * @vals: the parameter values 364 * 365 * Reads the values of firmware or device parameters. Up to 7 parameters 366 * can be queried at once. 367 */ 368 static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, 369 const u32 *params, u32 *vals) 370 { 371 int i, ret; 372 struct fw_params_cmd cmd, rpl; 373 struct fw_params_param *p; 374 size_t len16; 375 376 if (nparams > 7) 377 return -EINVAL; 378 379 memset(&cmd, 0, sizeof(cmd)); 380 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 381 FW_CMD_REQUEST_F | 382 FW_CMD_READ_F); 383 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 384 param[nparams].mnem), 16); 385 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 386 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) 387 p->mnem = htonl(*params++); 388 389 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 390 if (ret == 0) 391 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) 392 *vals++ = be32_to_cpu(p->val); 393 return ret; 394 } 395 396 /** 397 * t4vf_set_params - sets FW or device parameters 398 * @adapter: the adapter 399 * @nparams: the number of parameters 400 * @params: the parameter names 401 * @vals: the parameter values 402 * 403 * Sets the values of firmware or device parameters. Up to 7 parameters 404 * can be specified at once. 405 */ 406 int t4vf_set_params(struct adapter *adapter, unsigned int nparams, 407 const u32 *params, const u32 *vals) 408 { 409 int i; 410 struct fw_params_cmd cmd; 411 struct fw_params_param *p; 412 size_t len16; 413 414 if (nparams > 7) 415 return -EINVAL; 416 417 memset(&cmd, 0, sizeof(cmd)); 418 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 419 FW_CMD_REQUEST_F | 420 FW_CMD_WRITE_F); 421 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 422 param[nparams]), 16); 423 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 424 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { 425 p->mnem = cpu_to_be32(*params++); 426 p->val = cpu_to_be32(*vals++); 427 } 428 429 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 430 } 431 432 /** 433 * t4_bar2_sge_qregs - return BAR2 SGE Queue register information 434 * @adapter: the adapter 435 * @qid: the Queue ID 436 * @qtype: the Ingress or Egress type for @qid 437 * @pbar2_qoffset: BAR2 Queue Offset 438 * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues 439 * 440 * Returns the BAR2 SGE Queue Registers information associated with the 441 * indicated Absolute Queue ID. These are passed back in return value 442 * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue 443 * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. 444 * 445 * This may return an error which indicates that BAR2 SGE Queue 446 * registers aren't available. If an error is not returned, then the 447 * following values are returned: 448 * 449 * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers 450 * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid 451 * 452 * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which 453 * require the "Inferred Queue ID" ability may be used. E.g. the 454 * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, 455 * then these "Inferred Queue ID" register may not be used. 456 */ 457 int t4_bar2_sge_qregs(struct adapter *adapter, 458 unsigned int qid, 459 enum t4_bar2_qtype qtype, 460 u64 *pbar2_qoffset, 461 unsigned int *pbar2_qid) 462 { 463 unsigned int page_shift, page_size, qpp_shift, qpp_mask; 464 u64 bar2_page_offset, bar2_qoffset; 465 unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; 466 467 /* T4 doesn't support BAR2 SGE Queue registers. 468 */ 469 if (is_t4(adapter->params.chip)) 470 return -EINVAL; 471 472 /* Get our SGE Page Size parameters. 473 */ 474 page_shift = adapter->params.sge.sge_vf_hps + 10; 475 page_size = 1 << page_shift; 476 477 /* Get the right Queues per Page parameters for our Queue. 478 */ 479 qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS 480 ? adapter->params.sge.sge_vf_eq_qpp 481 : adapter->params.sge.sge_vf_iq_qpp); 482 qpp_mask = (1 << qpp_shift) - 1; 483 484 /* Calculate the basics of the BAR2 SGE Queue register area: 485 * o The BAR2 page the Queue registers will be in. 486 * o The BAR2 Queue ID. 487 * o The BAR2 Queue ID Offset into the BAR2 page. 488 */ 489 bar2_page_offset = ((qid >> qpp_shift) << page_shift); 490 bar2_qid = qid & qpp_mask; 491 bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; 492 493 /* If the BAR2 Queue ID Offset is less than the Page Size, then the 494 * hardware will infer the Absolute Queue ID simply from the writes to 495 * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a 496 * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply 497 * write to the first BAR2 SGE Queue Area within the BAR2 Page with 498 * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID 499 * from the BAR2 Page and BAR2 Queue ID. 500 * 501 * One important censequence of this is that some BAR2 SGE registers 502 * have a "Queue ID" field and we can write the BAR2 SGE Queue ID 503 * there. But other registers synthesize the SGE Queue ID purely 504 * from the writes to the registers -- the Write Combined Doorbell 505 * Buffer is a good example. These BAR2 SGE Registers are only 506 * available for those BAR2 SGE Register areas where the SGE Absolute 507 * Queue ID can be inferred from simple writes. 508 */ 509 bar2_qoffset = bar2_page_offset; 510 bar2_qinferred = (bar2_qid_offset < page_size); 511 if (bar2_qinferred) { 512 bar2_qoffset += bar2_qid_offset; 513 bar2_qid = 0; 514 } 515 516 *pbar2_qoffset = bar2_qoffset; 517 *pbar2_qid = bar2_qid; 518 return 0; 519 } 520 521 /** 522 * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters 523 * @adapter: the adapter 524 * 525 * Retrieves various core SGE parameters in the form of hardware SGE 526 * register values. The caller is responsible for decoding these as 527 * needed. The SGE parameters are stored in @adapter->params.sge. 528 */ 529 int t4vf_get_sge_params(struct adapter *adapter) 530 { 531 struct sge_params *sge_params = &adapter->params.sge; 532 u32 params[7], vals[7]; 533 int v; 534 535 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 536 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL)); 537 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 538 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE)); 539 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 540 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0)); 541 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 542 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1)); 543 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 544 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1)); 545 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 546 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3)); 547 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 548 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5)); 549 v = t4vf_query_params(adapter, 7, params, vals); 550 if (v) 551 return v; 552 sge_params->sge_control = vals[0]; 553 sge_params->sge_host_page_size = vals[1]; 554 sge_params->sge_fl_buffer_size[0] = vals[2]; 555 sge_params->sge_fl_buffer_size[1] = vals[3]; 556 sge_params->sge_timer_value_0_and_1 = vals[4]; 557 sge_params->sge_timer_value_2_and_3 = vals[5]; 558 sge_params->sge_timer_value_4_and_5 = vals[6]; 559 560 /* T4 uses a single control field to specify both the PCIe Padding and 561 * Packing Boundary. T5 introduced the ability to specify these 562 * separately with the Padding Boundary in SGE_CONTROL and and Packing 563 * Boundary in SGE_CONTROL2. So for T5 and later we need to grab 564 * SGE_CONTROL in order to determine how ingress packet data will be 565 * laid out in Packed Buffer Mode. Unfortunately, older versions of 566 * the firmware won't let us retrieve SGE_CONTROL2 so if we get a 567 * failure grabbing it we throw an error since we can't figure out the 568 * right value. 569 */ 570 if (!is_t4(adapter->params.chip)) { 571 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 572 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); 573 v = t4vf_query_params(adapter, 1, params, vals); 574 if (v != FW_SUCCESS) { 575 dev_err(adapter->pdev_dev, 576 "Unable to get SGE Control2; " 577 "probably old firmware.\n"); 578 return v; 579 } 580 sge_params->sge_control2 = vals[0]; 581 } 582 583 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 584 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD)); 585 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 586 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL)); 587 v = t4vf_query_params(adapter, 2, params, vals); 588 if (v) 589 return v; 590 sge_params->sge_ingress_rx_threshold = vals[0]; 591 sge_params->sge_congestion_control = vals[1]; 592 593 /* For T5 and later we want to use the new BAR2 Doorbells. 594 * Unfortunately, older firmware didn't allow the this register to be 595 * read. 596 */ 597 if (!is_t4(adapter->params.chip)) { 598 u32 whoami; 599 unsigned int pf, s_hps, s_qpp; 600 601 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 602 FW_PARAMS_PARAM_XYZ_V( 603 SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); 604 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 605 FW_PARAMS_PARAM_XYZ_V( 606 SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); 607 v = t4vf_query_params(adapter, 2, params, vals); 608 if (v != FW_SUCCESS) { 609 dev_warn(adapter->pdev_dev, 610 "Unable to get VF SGE Queues/Page; " 611 "probably old firmware.\n"); 612 return v; 613 } 614 sge_params->sge_egress_queues_per_page = vals[0]; 615 sge_params->sge_ingress_queues_per_page = vals[1]; 616 617 /* We need the Queues/Page for our VF. This is based on the 618 * PF from which we're instantiated and is indexed in the 619 * register we just read. Do it once here so other code in 620 * the driver can just use it. 621 */ 622 whoami = t4_read_reg(adapter, 623 T4VF_PL_BASE_ADDR + A_PL_VF_WHOAMI); 624 pf = SOURCEPF_GET(whoami); 625 626 s_hps = (HOSTPAGESIZEPF0_S + 627 (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); 628 sge_params->sge_vf_hps = 629 ((sge_params->sge_host_page_size >> s_hps) 630 & HOSTPAGESIZEPF0_M); 631 632 s_qpp = (QUEUESPERPAGEPF0_S + 633 (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); 634 sge_params->sge_vf_eq_qpp = 635 ((sge_params->sge_egress_queues_per_page >> s_qpp) 636 & QUEUESPERPAGEPF0_MASK); 637 sge_params->sge_vf_iq_qpp = 638 ((sge_params->sge_ingress_queues_per_page >> s_qpp) 639 & QUEUESPERPAGEPF0_MASK); 640 } 641 642 return 0; 643 } 644 645 /** 646 * t4vf_get_vpd_params - retrieve device VPD paremeters 647 * @adapter: the adapter 648 * 649 * Retrives various device Vital Product Data parameters. The parameters 650 * are stored in @adapter->params.vpd. 651 */ 652 int t4vf_get_vpd_params(struct adapter *adapter) 653 { 654 struct vpd_params *vpd_params = &adapter->params.vpd; 655 u32 params[7], vals[7]; 656 int v; 657 658 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 659 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); 660 v = t4vf_query_params(adapter, 1, params, vals); 661 if (v) 662 return v; 663 vpd_params->cclk = vals[0]; 664 665 return 0; 666 } 667 668 /** 669 * t4vf_get_dev_params - retrieve device paremeters 670 * @adapter: the adapter 671 * 672 * Retrives various device parameters. The parameters are stored in 673 * @adapter->params.dev. 674 */ 675 int t4vf_get_dev_params(struct adapter *adapter) 676 { 677 struct dev_params *dev_params = &adapter->params.dev; 678 u32 params[7], vals[7]; 679 int v; 680 681 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 682 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); 683 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 684 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); 685 v = t4vf_query_params(adapter, 2, params, vals); 686 if (v) 687 return v; 688 dev_params->fwrev = vals[0]; 689 dev_params->tprev = vals[1]; 690 691 return 0; 692 } 693 694 /** 695 * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration 696 * @adapter: the adapter 697 * 698 * Retrieves global RSS mode and parameters with which we have to live 699 * and stores them in the @adapter's RSS parameters. 700 */ 701 int t4vf_get_rss_glb_config(struct adapter *adapter) 702 { 703 struct rss_params *rss = &adapter->params.rss; 704 struct fw_rss_glb_config_cmd cmd, rpl; 705 int v; 706 707 /* 708 * Execute an RSS Global Configuration read command to retrieve 709 * our RSS configuration. 710 */ 711 memset(&cmd, 0, sizeof(cmd)); 712 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | 713 FW_CMD_REQUEST_F | 714 FW_CMD_READ_F); 715 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 716 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 717 if (v) 718 return v; 719 720 /* 721 * Transate the big-endian RSS Global Configuration into our 722 * cpu-endian format based on the RSS mode. We also do first level 723 * filtering at this point to weed out modes which don't support 724 * VF Drivers ... 725 */ 726 rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( 727 be32_to_cpu(rpl.u.manual.mode_pkd)); 728 switch (rss->mode) { 729 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 730 u32 word = be32_to_cpu( 731 rpl.u.basicvirtual.synmapen_to_hashtoeplitz); 732 733 rss->u.basicvirtual.synmapen = 734 ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); 735 rss->u.basicvirtual.syn4tupenipv6 = 736 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); 737 rss->u.basicvirtual.syn2tupenipv6 = 738 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); 739 rss->u.basicvirtual.syn4tupenipv4 = 740 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); 741 rss->u.basicvirtual.syn2tupenipv4 = 742 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); 743 744 rss->u.basicvirtual.ofdmapen = 745 ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); 746 747 rss->u.basicvirtual.tnlmapen = 748 ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); 749 rss->u.basicvirtual.tnlalllookup = 750 ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); 751 752 rss->u.basicvirtual.hashtoeplitz = 753 ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); 754 755 /* we need at least Tunnel Map Enable to be set */ 756 if (!rss->u.basicvirtual.tnlmapen) 757 return -EINVAL; 758 break; 759 } 760 761 default: 762 /* all unknown/unsupported RSS modes result in an error */ 763 return -EINVAL; 764 } 765 766 return 0; 767 } 768 769 /** 770 * t4vf_get_vfres - retrieve VF resource limits 771 * @adapter: the adapter 772 * 773 * Retrieves configured resource limits and capabilities for a virtual 774 * function. The results are stored in @adapter->vfres. 775 */ 776 int t4vf_get_vfres(struct adapter *adapter) 777 { 778 struct vf_resources *vfres = &adapter->params.vfres; 779 struct fw_pfvf_cmd cmd, rpl; 780 int v; 781 u32 word; 782 783 /* 784 * Execute PFVF Read command to get VF resource limits; bail out early 785 * with error on command failure. 786 */ 787 memset(&cmd, 0, sizeof(cmd)); 788 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | 789 FW_CMD_REQUEST_F | 790 FW_CMD_READ_F); 791 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 792 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 793 if (v) 794 return v; 795 796 /* 797 * Extract VF resource limits and return success. 798 */ 799 word = be32_to_cpu(rpl.niqflint_niq); 800 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); 801 vfres->niq = FW_PFVF_CMD_NIQ_G(word); 802 803 word = be32_to_cpu(rpl.type_to_neq); 804 vfres->neq = FW_PFVF_CMD_NEQ_G(word); 805 vfres->pmask = FW_PFVF_CMD_PMASK_G(word); 806 807 word = be32_to_cpu(rpl.tc_to_nexactf); 808 vfres->tc = FW_PFVF_CMD_TC_G(word); 809 vfres->nvi = FW_PFVF_CMD_NVI_G(word); 810 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); 811 812 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 813 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); 814 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); 815 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); 816 817 return 0; 818 } 819 820 /** 821 * t4vf_read_rss_vi_config - read a VI's RSS configuration 822 * @adapter: the adapter 823 * @viid: Virtual Interface ID 824 * @config: pointer to host-native VI RSS Configuration buffer 825 * 826 * Reads the Virtual Interface's RSS configuration information and 827 * translates it into CPU-native format. 828 */ 829 int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, 830 union rss_vi_config *config) 831 { 832 struct fw_rss_vi_config_cmd cmd, rpl; 833 int v; 834 835 memset(&cmd, 0, sizeof(cmd)); 836 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 837 FW_CMD_REQUEST_F | 838 FW_CMD_READ_F | 839 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 840 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 841 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 842 if (v) 843 return v; 844 845 switch (adapter->params.rss.mode) { 846 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 847 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); 848 849 config->basicvirtual.ip6fourtupen = 850 ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); 851 config->basicvirtual.ip6twotupen = 852 ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); 853 config->basicvirtual.ip4fourtupen = 854 ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); 855 config->basicvirtual.ip4twotupen = 856 ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); 857 config->basicvirtual.udpen = 858 ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); 859 config->basicvirtual.defaultq = 860 FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); 861 break; 862 } 863 864 default: 865 return -EINVAL; 866 } 867 868 return 0; 869 } 870 871 /** 872 * t4vf_write_rss_vi_config - write a VI's RSS configuration 873 * @adapter: the adapter 874 * @viid: Virtual Interface ID 875 * @config: pointer to host-native VI RSS Configuration buffer 876 * 877 * Write the Virtual Interface's RSS configuration information 878 * (translating it into firmware-native format before writing). 879 */ 880 int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, 881 union rss_vi_config *config) 882 { 883 struct fw_rss_vi_config_cmd cmd, rpl; 884 885 memset(&cmd, 0, sizeof(cmd)); 886 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 887 FW_CMD_REQUEST_F | 888 FW_CMD_WRITE_F | 889 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 890 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 891 switch (adapter->params.rss.mode) { 892 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 893 u32 word = 0; 894 895 if (config->basicvirtual.ip6fourtupen) 896 word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; 897 if (config->basicvirtual.ip6twotupen) 898 word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; 899 if (config->basicvirtual.ip4fourtupen) 900 word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; 901 if (config->basicvirtual.ip4twotupen) 902 word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; 903 if (config->basicvirtual.udpen) 904 word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; 905 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( 906 config->basicvirtual.defaultq); 907 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); 908 break; 909 } 910 911 default: 912 return -EINVAL; 913 } 914 915 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 916 } 917 918 /** 919 * t4vf_config_rss_range - configure a portion of the RSS mapping table 920 * @adapter: the adapter 921 * @viid: Virtual Interface of RSS Table Slice 922 * @start: starting entry in the table to write 923 * @n: how many table entries to write 924 * @rspq: values for the "Response Queue" (Ingress Queue) lookup table 925 * @nrspq: number of values in @rspq 926 * 927 * Programs the selected part of the VI's RSS mapping table with the 928 * provided values. If @nrspq < @n the supplied values are used repeatedly 929 * until the full table range is populated. 930 * 931 * The caller must ensure the values in @rspq are in the range 0..1023. 932 */ 933 int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, 934 int start, int n, const u16 *rspq, int nrspq) 935 { 936 const u16 *rsp = rspq; 937 const u16 *rsp_end = rspq+nrspq; 938 struct fw_rss_ind_tbl_cmd cmd; 939 940 /* 941 * Initialize firmware command template to write the RSS table. 942 */ 943 memset(&cmd, 0, sizeof(cmd)); 944 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | 945 FW_CMD_REQUEST_F | 946 FW_CMD_WRITE_F | 947 FW_RSS_IND_TBL_CMD_VIID_V(viid)); 948 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 949 950 /* 951 * Each firmware RSS command can accommodate up to 32 RSS Ingress 952 * Queue Identifiers. These Ingress Queue IDs are packed three to 953 * a 32-bit word as 10-bit values with the upper remaining 2 bits 954 * reserved. 955 */ 956 while (n > 0) { 957 __be32 *qp = &cmd.iq0_to_iq2; 958 int nq = min(n, 32); 959 int ret; 960 961 /* 962 * Set up the firmware RSS command header to send the next 963 * "nq" Ingress Queue IDs to the firmware. 964 */ 965 cmd.niqid = cpu_to_be16(nq); 966 cmd.startidx = cpu_to_be16(start); 967 968 /* 969 * "nq" more done for the start of the next loop. 970 */ 971 start += nq; 972 n -= nq; 973 974 /* 975 * While there are still Ingress Queue IDs to stuff into the 976 * current firmware RSS command, retrieve them from the 977 * Ingress Queue ID array and insert them into the command. 978 */ 979 while (nq > 0) { 980 /* 981 * Grab up to the next 3 Ingress Queue IDs (wrapping 982 * around the Ingress Queue ID array if necessary) and 983 * insert them into the firmware RSS command at the 984 * current 3-tuple position within the commad. 985 */ 986 u16 qbuf[3]; 987 u16 *qbp = qbuf; 988 int nqbuf = min(3, nq); 989 990 nq -= nqbuf; 991 qbuf[0] = qbuf[1] = qbuf[2] = 0; 992 while (nqbuf) { 993 nqbuf--; 994 *qbp++ = *rsp++; 995 if (rsp >= rsp_end) 996 rsp = rspq; 997 } 998 *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | 999 FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | 1000 FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); 1001 } 1002 1003 /* 1004 * Send this portion of the RRS table update to the firmware; 1005 * bail out on any errors. 1006 */ 1007 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1008 if (ret) 1009 return ret; 1010 } 1011 return 0; 1012 } 1013 1014 /** 1015 * t4vf_alloc_vi - allocate a virtual interface on a port 1016 * @adapter: the adapter 1017 * @port_id: physical port associated with the VI 1018 * 1019 * Allocate a new Virtual Interface and bind it to the indicated 1020 * physical port. Return the new Virtual Interface Identifier on 1021 * success, or a [negative] error number on failure. 1022 */ 1023 int t4vf_alloc_vi(struct adapter *adapter, int port_id) 1024 { 1025 struct fw_vi_cmd cmd, rpl; 1026 int v; 1027 1028 /* 1029 * Execute a VI command to allocate Virtual Interface and return its 1030 * VIID. 1031 */ 1032 memset(&cmd, 0, sizeof(cmd)); 1033 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1034 FW_CMD_REQUEST_F | 1035 FW_CMD_WRITE_F | 1036 FW_CMD_EXEC_F); 1037 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1038 FW_VI_CMD_ALLOC_F); 1039 cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); 1040 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1041 if (v) 1042 return v; 1043 1044 return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); 1045 } 1046 1047 /** 1048 * t4vf_free_vi -- free a virtual interface 1049 * @adapter: the adapter 1050 * @viid: the virtual interface identifier 1051 * 1052 * Free a previously allocated Virtual Interface. Return an error on 1053 * failure. 1054 */ 1055 int t4vf_free_vi(struct adapter *adapter, int viid) 1056 { 1057 struct fw_vi_cmd cmd; 1058 1059 /* 1060 * Execute a VI command to free the Virtual Interface. 1061 */ 1062 memset(&cmd, 0, sizeof(cmd)); 1063 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1064 FW_CMD_REQUEST_F | 1065 FW_CMD_EXEC_F); 1066 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1067 FW_VI_CMD_FREE_F); 1068 cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); 1069 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1070 } 1071 1072 /** 1073 * t4vf_enable_vi - enable/disable a virtual interface 1074 * @adapter: the adapter 1075 * @viid: the Virtual Interface ID 1076 * @rx_en: 1=enable Rx, 0=disable Rx 1077 * @tx_en: 1=enable Tx, 0=disable Tx 1078 * 1079 * Enables/disables a virtual interface. 1080 */ 1081 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, 1082 bool rx_en, bool tx_en) 1083 { 1084 struct fw_vi_enable_cmd cmd; 1085 1086 memset(&cmd, 0, sizeof(cmd)); 1087 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1088 FW_CMD_REQUEST_F | 1089 FW_CMD_EXEC_F | 1090 FW_VI_ENABLE_CMD_VIID_V(viid)); 1091 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | 1092 FW_VI_ENABLE_CMD_EEN_V(tx_en) | 1093 FW_LEN16(cmd)); 1094 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1095 } 1096 1097 /** 1098 * t4vf_identify_port - identify a VI's port by blinking its LED 1099 * @adapter: the adapter 1100 * @viid: the Virtual Interface ID 1101 * @nblinks: how many times to blink LED at 2.5 Hz 1102 * 1103 * Identifies a VI's port by blinking its LED. 1104 */ 1105 int t4vf_identify_port(struct adapter *adapter, unsigned int viid, 1106 unsigned int nblinks) 1107 { 1108 struct fw_vi_enable_cmd cmd; 1109 1110 memset(&cmd, 0, sizeof(cmd)); 1111 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1112 FW_CMD_REQUEST_F | 1113 FW_CMD_EXEC_F | 1114 FW_VI_ENABLE_CMD_VIID_V(viid)); 1115 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | 1116 FW_LEN16(cmd)); 1117 cmd.blinkdur = cpu_to_be16(nblinks); 1118 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1119 } 1120 1121 /** 1122 * t4vf_set_rxmode - set Rx properties of a virtual interface 1123 * @adapter: the adapter 1124 * @viid: the VI id 1125 * @mtu: the new MTU or -1 for no change 1126 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change 1127 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change 1128 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change 1129 * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, 1130 * -1 no change 1131 * 1132 * Sets Rx properties of a virtual interface. 1133 */ 1134 int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, 1135 int mtu, int promisc, int all_multi, int bcast, int vlanex, 1136 bool sleep_ok) 1137 { 1138 struct fw_vi_rxmode_cmd cmd; 1139 1140 /* convert to FW values */ 1141 if (mtu < 0) 1142 mtu = FW_VI_RXMODE_CMD_MTU_M; 1143 if (promisc < 0) 1144 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; 1145 if (all_multi < 0) 1146 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; 1147 if (bcast < 0) 1148 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; 1149 if (vlanex < 0) 1150 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; 1151 1152 memset(&cmd, 0, sizeof(cmd)); 1153 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | 1154 FW_CMD_REQUEST_F | 1155 FW_CMD_WRITE_F | 1156 FW_VI_RXMODE_CMD_VIID_V(viid)); 1157 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1158 cmd.mtu_to_vlanexen = 1159 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | 1160 FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | 1161 FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | 1162 FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | 1163 FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); 1164 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1165 } 1166 1167 /** 1168 * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses 1169 * @adapter: the adapter 1170 * @viid: the Virtual Interface Identifier 1171 * @free: if true any existing filters for this VI id are first removed 1172 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1173 * @addr: the MAC address(es) 1174 * @idx: where to store the index of each allocated filter 1175 * @hash: pointer to hash address filter bitmap 1176 * @sleep_ok: call is allowed to sleep 1177 * 1178 * Allocates an exact-match filter for each of the supplied addresses and 1179 * sets it to the corresponding address. If @idx is not %NULL it should 1180 * have at least @naddr entries, each of which will be set to the index of 1181 * the filter allocated for the corresponding MAC address. If a filter 1182 * could not be allocated for an address its index is set to 0xffff. 1183 * If @hash is not %NULL addresses that fail to allocate an exact filter 1184 * are hashed and update the hash filter bitmap pointed at by @hash. 1185 * 1186 * Returns a negative error number or the number of filters allocated. 1187 */ 1188 int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, 1189 unsigned int naddr, const u8 **addr, u16 *idx, 1190 u64 *hash, bool sleep_ok) 1191 { 1192 int offset, ret = 0; 1193 unsigned nfilters = 0; 1194 unsigned int rem = naddr; 1195 struct fw_vi_mac_cmd cmd, rpl; 1196 unsigned int max_naddr = is_t4(adapter->params.chip) ? 1197 NUM_MPS_CLS_SRAM_L_INSTANCES : 1198 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1199 1200 if (naddr > max_naddr) 1201 return -EINVAL; 1202 1203 for (offset = 0; offset < naddr; /**/) { 1204 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) 1205 ? rem 1206 : ARRAY_SIZE(cmd.u.exact)); 1207 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1208 u.exact[fw_naddr]), 16); 1209 struct fw_vi_mac_exact *p; 1210 int i; 1211 1212 memset(&cmd, 0, sizeof(cmd)); 1213 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1214 FW_CMD_REQUEST_F | 1215 FW_CMD_WRITE_F | 1216 (free ? FW_CMD_EXEC_F : 0) | 1217 FW_VI_MAC_CMD_VIID_V(viid)); 1218 cmd.freemacs_to_len16 = 1219 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | 1220 FW_CMD_LEN16_V(len16)); 1221 1222 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1223 p->valid_to_idx = cpu_to_be16( 1224 FW_VI_MAC_CMD_VALID_F | 1225 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); 1226 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1227 } 1228 1229 1230 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, 1231 sleep_ok); 1232 if (ret && ret != -ENOMEM) 1233 break; 1234 1235 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { 1236 u16 index = FW_VI_MAC_CMD_IDX_G( 1237 be16_to_cpu(p->valid_to_idx)); 1238 1239 if (idx) 1240 idx[offset+i] = 1241 (index >= max_naddr 1242 ? 0xffff 1243 : index); 1244 if (index < max_naddr) 1245 nfilters++; 1246 else if (hash) 1247 *hash |= (1ULL << hash_mac_addr(addr[offset+i])); 1248 } 1249 1250 free = false; 1251 offset += fw_naddr; 1252 rem -= fw_naddr; 1253 } 1254 1255 /* 1256 * If there were no errors or we merely ran out of room in our MAC 1257 * address arena, return the number of filters actually written. 1258 */ 1259 if (ret == 0 || ret == -ENOMEM) 1260 ret = nfilters; 1261 return ret; 1262 } 1263 1264 /** 1265 * t4vf_change_mac - modifies the exact-match filter for a MAC address 1266 * @adapter: the adapter 1267 * @viid: the Virtual Interface ID 1268 * @idx: index of existing filter for old value of MAC address, or -1 1269 * @addr: the new MAC address value 1270 * @persist: if idx < 0, the new MAC allocation should be persistent 1271 * 1272 * Modifies an exact-match filter and sets it to the new MAC address. 1273 * Note that in general it is not possible to modify the value of a given 1274 * filter so the generic way to modify an address filter is to free the 1275 * one being used by the old address value and allocate a new filter for 1276 * the new address value. @idx can be -1 if the address is a new 1277 * addition. 1278 * 1279 * Returns a negative error number or the index of the filter with the new 1280 * MAC value. 1281 */ 1282 int t4vf_change_mac(struct adapter *adapter, unsigned int viid, 1283 int idx, const u8 *addr, bool persist) 1284 { 1285 int ret; 1286 struct fw_vi_mac_cmd cmd, rpl; 1287 struct fw_vi_mac_exact *p = &cmd.u.exact[0]; 1288 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1289 u.exact[1]), 16); 1290 unsigned int max_naddr = is_t4(adapter->params.chip) ? 1291 NUM_MPS_CLS_SRAM_L_INSTANCES : 1292 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1293 1294 /* 1295 * If this is a new allocation, determine whether it should be 1296 * persistent (across a "freemacs" operation) or not. 1297 */ 1298 if (idx < 0) 1299 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; 1300 1301 memset(&cmd, 0, sizeof(cmd)); 1302 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1303 FW_CMD_REQUEST_F | 1304 FW_CMD_WRITE_F | 1305 FW_VI_MAC_CMD_VIID_V(viid)); 1306 cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1307 p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | 1308 FW_VI_MAC_CMD_IDX_V(idx)); 1309 memcpy(p->macaddr, addr, sizeof(p->macaddr)); 1310 1311 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1312 if (ret == 0) { 1313 p = &rpl.u.exact[0]; 1314 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); 1315 if (ret >= max_naddr) 1316 ret = -ENOMEM; 1317 } 1318 return ret; 1319 } 1320 1321 /** 1322 * t4vf_set_addr_hash - program the MAC inexact-match hash filter 1323 * @adapter: the adapter 1324 * @viid: the Virtual Interface Identifier 1325 * @ucast: whether the hash filter should also match unicast addresses 1326 * @vec: the value to be written to the hash filter 1327 * @sleep_ok: call is allowed to sleep 1328 * 1329 * Sets the 64-bit inexact-match hash filter for a virtual interface. 1330 */ 1331 int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, 1332 bool ucast, u64 vec, bool sleep_ok) 1333 { 1334 struct fw_vi_mac_cmd cmd; 1335 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1336 u.exact[0]), 16); 1337 1338 memset(&cmd, 0, sizeof(cmd)); 1339 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1340 FW_CMD_REQUEST_F | 1341 FW_CMD_WRITE_F | 1342 FW_VI_ENABLE_CMD_VIID_V(viid)); 1343 cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | 1344 FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | 1345 FW_CMD_LEN16_V(len16)); 1346 cmd.u.hash.hashvec = cpu_to_be64(vec); 1347 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1348 } 1349 1350 /** 1351 * t4vf_get_port_stats - collect "port" statistics 1352 * @adapter: the adapter 1353 * @pidx: the port index 1354 * @s: the stats structure to fill 1355 * 1356 * Collect statistics for the "port"'s Virtual Interface. 1357 */ 1358 int t4vf_get_port_stats(struct adapter *adapter, int pidx, 1359 struct t4vf_port_stats *s) 1360 { 1361 struct port_info *pi = adap2pinfo(adapter, pidx); 1362 struct fw_vi_stats_vf fwstats; 1363 unsigned int rem = VI_VF_NUM_STATS; 1364 __be64 *fwsp = (__be64 *)&fwstats; 1365 1366 /* 1367 * Grab the Virtual Interface statistics a chunk at a time via mailbox 1368 * commands. We could use a Work Request and get all of them at once 1369 * but that's an asynchronous interface which is awkward to use. 1370 */ 1371 while (rem) { 1372 unsigned int ix = VI_VF_NUM_STATS - rem; 1373 unsigned int nstats = min(6U, rem); 1374 struct fw_vi_stats_cmd cmd, rpl; 1375 size_t len = (offsetof(struct fw_vi_stats_cmd, u) + 1376 sizeof(struct fw_vi_stats_ctl)); 1377 size_t len16 = DIV_ROUND_UP(len, 16); 1378 int ret; 1379 1380 memset(&cmd, 0, sizeof(cmd)); 1381 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | 1382 FW_VI_STATS_CMD_VIID_V(pi->viid) | 1383 FW_CMD_REQUEST_F | 1384 FW_CMD_READ_F); 1385 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1386 cmd.u.ctl.nstats_ix = 1387 cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | 1388 FW_VI_STATS_CMD_NSTATS_V(nstats)); 1389 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); 1390 if (ret) 1391 return ret; 1392 1393 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); 1394 1395 rem -= nstats; 1396 fwsp += nstats; 1397 } 1398 1399 /* 1400 * Translate firmware statistics into host native statistics. 1401 */ 1402 s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); 1403 s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); 1404 s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); 1405 s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); 1406 s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); 1407 s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); 1408 s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); 1409 s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); 1410 s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); 1411 1412 s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); 1413 s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); 1414 s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); 1415 s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); 1416 s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); 1417 s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); 1418 1419 s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); 1420 1421 return 0; 1422 } 1423 1424 /** 1425 * t4vf_iq_free - free an ingress queue and its free lists 1426 * @adapter: the adapter 1427 * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) 1428 * @iqid: ingress queue ID 1429 * @fl0id: FL0 queue ID or 0xffff if no attached FL0 1430 * @fl1id: FL1 queue ID or 0xffff if no attached FL1 1431 * 1432 * Frees an ingress queue and its associated free lists, if any. 1433 */ 1434 int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, 1435 unsigned int iqid, unsigned int fl0id, unsigned int fl1id) 1436 { 1437 struct fw_iq_cmd cmd; 1438 1439 memset(&cmd, 0, sizeof(cmd)); 1440 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | 1441 FW_CMD_REQUEST_F | 1442 FW_CMD_EXEC_F); 1443 cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | 1444 FW_LEN16(cmd)); 1445 cmd.type_to_iqandstindex = 1446 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); 1447 1448 cmd.iqid = cpu_to_be16(iqid); 1449 cmd.fl0id = cpu_to_be16(fl0id); 1450 cmd.fl1id = cpu_to_be16(fl1id); 1451 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1452 } 1453 1454 /** 1455 * t4vf_eth_eq_free - free an Ethernet egress queue 1456 * @adapter: the adapter 1457 * @eqid: egress queue ID 1458 * 1459 * Frees an Ethernet egress queue. 1460 */ 1461 int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) 1462 { 1463 struct fw_eq_eth_cmd cmd; 1464 1465 memset(&cmd, 0, sizeof(cmd)); 1466 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | 1467 FW_CMD_REQUEST_F | 1468 FW_CMD_EXEC_F); 1469 cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | 1470 FW_LEN16(cmd)); 1471 cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); 1472 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1473 } 1474 1475 /** 1476 * t4vf_handle_fw_rpl - process a firmware reply message 1477 * @adapter: the adapter 1478 * @rpl: start of the firmware message 1479 * 1480 * Processes a firmware message, such as link state change messages. 1481 */ 1482 int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) 1483 { 1484 const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; 1485 u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); 1486 1487 switch (opcode) { 1488 case FW_PORT_CMD: { 1489 /* 1490 * Link/module state change message. 1491 */ 1492 const struct fw_port_cmd *port_cmd = 1493 (const struct fw_port_cmd *)rpl; 1494 u32 word; 1495 int action, port_id, link_ok, speed, fc, pidx; 1496 1497 /* 1498 * Extract various fields from port status change message. 1499 */ 1500 action = FW_PORT_CMD_ACTION_G( 1501 be32_to_cpu(port_cmd->action_to_len16)); 1502 if (action != FW_PORT_ACTION_GET_PORT_INFO) { 1503 dev_err(adapter->pdev_dev, 1504 "Unknown firmware PORT reply action %x\n", 1505 action); 1506 break; 1507 } 1508 1509 port_id = FW_PORT_CMD_PORTID_G( 1510 be32_to_cpu(port_cmd->op_to_portid)); 1511 1512 word = be32_to_cpu(port_cmd->u.info.lstatus_to_modtype); 1513 link_ok = (word & FW_PORT_CMD_LSTATUS_F) != 0; 1514 speed = 0; 1515 fc = 0; 1516 if (word & FW_PORT_CMD_RXPAUSE_F) 1517 fc |= PAUSE_RX; 1518 if (word & FW_PORT_CMD_TXPAUSE_F) 1519 fc |= PAUSE_TX; 1520 if (word & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) 1521 speed = 100; 1522 else if (word & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) 1523 speed = 1000; 1524 else if (word & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) 1525 speed = 10000; 1526 else if (word & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) 1527 speed = 40000; 1528 1529 /* 1530 * Scan all of our "ports" (Virtual Interfaces) looking for 1531 * those bound to the physical port which has changed. If 1532 * our recorded state doesn't match the current state, 1533 * signal that change to the OS code. 1534 */ 1535 for_each_port(adapter, pidx) { 1536 struct port_info *pi = adap2pinfo(adapter, pidx); 1537 struct link_config *lc; 1538 1539 if (pi->port_id != port_id) 1540 continue; 1541 1542 lc = &pi->link_cfg; 1543 if (link_ok != lc->link_ok || speed != lc->speed || 1544 fc != lc->fc) { 1545 /* something changed */ 1546 lc->link_ok = link_ok; 1547 lc->speed = speed; 1548 lc->fc = fc; 1549 t4vf_os_link_changed(adapter, pidx, link_ok); 1550 } 1551 } 1552 break; 1553 } 1554 1555 default: 1556 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", 1557 opcode); 1558 } 1559 return 0; 1560 } 1561 1562 /** 1563 */ 1564 int t4vf_prep_adapter(struct adapter *adapter) 1565 { 1566 int err; 1567 unsigned int chipid; 1568 1569 /* Wait for the device to become ready before proceeding ... 1570 */ 1571 err = t4vf_wait_dev_ready(adapter); 1572 if (err) 1573 return err; 1574 1575 /* Default port and clock for debugging in case we can't reach 1576 * firmware. 1577 */ 1578 adapter->params.nports = 1; 1579 adapter->params.vfres.pmask = 1; 1580 adapter->params.vpd.cclk = 50000; 1581 1582 adapter->params.chip = 0; 1583 switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { 1584 case CHELSIO_T4: 1585 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); 1586 break; 1587 1588 case CHELSIO_T5: 1589 chipid = G_REV(t4_read_reg(adapter, A_PL_VF_REV)); 1590 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); 1591 break; 1592 } 1593 1594 return 0; 1595 } 1596