1 /* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36 #include <linux/pci.h> 37 38 #include "t4vf_common.h" 39 #include "t4vf_defs.h" 40 41 #include "../cxgb4/t4_regs.h" 42 #include "../cxgb4/t4_values.h" 43 #include "../cxgb4/t4fw_api.h" 44 45 /* 46 * Wait for the device to become ready (signified by our "who am I" register 47 * returning a value other than all 1's). Return an error if it doesn't 48 * become ready ... 49 */ 50 int t4vf_wait_dev_ready(struct adapter *adapter) 51 { 52 const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; 53 const u32 notready1 = 0xffffffff; 54 const u32 notready2 = 0xeeeeeeee; 55 u32 val; 56 57 val = t4_read_reg(adapter, whoami); 58 if (val != notready1 && val != notready2) 59 return 0; 60 msleep(500); 61 val = t4_read_reg(adapter, whoami); 62 if (val != notready1 && val != notready2) 63 return 0; 64 else 65 return -EIO; 66 } 67 68 /* 69 * Get the reply to a mailbox command and store it in @rpl in big-endian order 70 * (since the firmware data structures are specified in a big-endian layout). 71 */ 72 static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, 73 u32 mbox_data) 74 { 75 for ( ; size; size -= 8, mbox_data += 8) 76 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); 77 } 78 79 /** 80 * t4vf_record_mbox - record a Firmware Mailbox Command/Reply in the log 81 * @adapter: the adapter 82 * @cmd: the Firmware Mailbox Command or Reply 83 * @size: command length in bytes 84 * @access: the time (ms) needed to access the Firmware Mailbox 85 * @execute: the time (ms) the command spent being executed 86 */ 87 static void t4vf_record_mbox(struct adapter *adapter, const __be64 *cmd, 88 int size, int access, int execute) 89 { 90 struct mbox_cmd_log *log = adapter->mbox_log; 91 struct mbox_cmd *entry; 92 int i; 93 94 entry = mbox_cmd_log_entry(log, log->cursor++); 95 if (log->cursor == log->size) 96 log->cursor = 0; 97 98 for (i = 0; i < size / 8; i++) 99 entry->cmd[i] = be64_to_cpu(cmd[i]); 100 while (i < MBOX_LEN / 8) 101 entry->cmd[i++] = 0; 102 entry->timestamp = jiffies; 103 entry->seqno = log->seqno++; 104 entry->access = access; 105 entry->execute = execute; 106 } 107 108 /** 109 * t4vf_wr_mbox_core - send a command to FW through the mailbox 110 * @adapter: the adapter 111 * @cmd: the command to write 112 * @size: command length in bytes 113 * @rpl: where to optionally store the reply 114 * @sleep_ok: if true we may sleep while awaiting command completion 115 * 116 * Sends the given command to FW through the mailbox and waits for the 117 * FW to execute the command. If @rpl is not %NULL it is used to store 118 * the FW's reply to the command. The command and its optional reply 119 * are of the same length. FW can take up to 500 ms to respond. 120 * @sleep_ok determines whether we may sleep while awaiting the response. 121 * If sleeping is allowed we use progressive backoff otherwise we spin. 122 * 123 * The return value is 0 on success or a negative errno on failure. A 124 * failure can happen either because we are not able to execute the 125 * command or FW executes it but signals an error. In the latter case 126 * the return value is the error code indicated by FW (negated). 127 */ 128 int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 129 void *rpl, bool sleep_ok) 130 { 131 static const int delay[] = { 132 1, 1, 3, 5, 10, 10, 20, 50, 100 133 }; 134 135 u16 access = 0, execute = 0; 136 u32 v, mbox_data; 137 int i, ms, delay_idx, ret; 138 const __be64 *p; 139 u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; 140 u32 cmd_op = FW_CMD_OP_G(be32_to_cpu(((struct fw_cmd_hdr *)cmd)->hi)); 141 __be64 cmd_rpl[MBOX_LEN / 8]; 142 struct mbox_list entry; 143 144 /* In T6, mailbox size is changed to 128 bytes to avoid 145 * invalidating the entire prefetch buffer. 146 */ 147 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 148 mbox_data = T4VF_MBDATA_BASE_ADDR; 149 else 150 mbox_data = T6VF_MBDATA_BASE_ADDR; 151 152 /* 153 * Commands must be multiples of 16 bytes in length and may not be 154 * larger than the size of the Mailbox Data register array. 155 */ 156 if ((size % 16) != 0 || 157 size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) 158 return -EINVAL; 159 160 /* Queue ourselves onto the mailbox access list. When our entry is at 161 * the front of the list, we have rights to access the mailbox. So we 162 * wait [for a while] till we're at the front [or bail out with an 163 * EBUSY] ... 164 */ 165 spin_lock(&adapter->mbox_lock); 166 list_add_tail(&entry.list, &adapter->mlist.list); 167 spin_unlock(&adapter->mbox_lock); 168 169 delay_idx = 0; 170 ms = delay[0]; 171 172 for (i = 0; ; i += ms) { 173 /* If we've waited too long, return a busy indication. This 174 * really ought to be based on our initial position in the 175 * mailbox access list but this is a start. We very rearely 176 * contend on access to the mailbox ... 177 */ 178 if (i > FW_CMD_MAX_TIMEOUT) { 179 spin_lock(&adapter->mbox_lock); 180 list_del(&entry.list); 181 spin_unlock(&adapter->mbox_lock); 182 ret = -EBUSY; 183 t4vf_record_mbox(adapter, cmd, size, access, ret); 184 return ret; 185 } 186 187 /* If we're at the head, break out and start the mailbox 188 * protocol. 189 */ 190 if (list_first_entry(&adapter->mlist.list, struct mbox_list, 191 list) == &entry) 192 break; 193 194 /* Delay for a bit before checking again ... */ 195 if (sleep_ok) { 196 ms = delay[delay_idx]; /* last element may repeat */ 197 if (delay_idx < ARRAY_SIZE(delay) - 1) 198 delay_idx++; 199 msleep(ms); 200 } else { 201 mdelay(ms); 202 } 203 } 204 205 /* 206 * Loop trying to get ownership of the mailbox. Return an error 207 * if we can't gain ownership. 208 */ 209 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 210 for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) 211 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 212 if (v != MBOX_OWNER_DRV) { 213 spin_lock(&adapter->mbox_lock); 214 list_del(&entry.list); 215 spin_unlock(&adapter->mbox_lock); 216 ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT; 217 t4vf_record_mbox(adapter, cmd, size, access, ret); 218 return ret; 219 } 220 221 /* 222 * Write the command array into the Mailbox Data register array and 223 * transfer ownership of the mailbox to the firmware. 224 * 225 * For the VFs, the Mailbox Data "registers" are actually backed by 226 * T4's "MA" interface rather than PL Registers (as is the case for 227 * the PFs). Because these are in different coherency domains, the 228 * write to the VF's PL-register-backed Mailbox Control can race in 229 * front of the writes to the MA-backed VF Mailbox Data "registers". 230 * So we need to do a read-back on at least one byte of the VF Mailbox 231 * Data registers before doing the write to the VF Mailbox Control 232 * register. 233 */ 234 if (cmd_op != FW_VI_STATS_CMD) 235 t4vf_record_mbox(adapter, cmd, size, access, 0); 236 for (i = 0, p = cmd; i < size; i += 8) 237 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); 238 t4_read_reg(adapter, mbox_data); /* flush write */ 239 240 t4_write_reg(adapter, mbox_ctl, 241 MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); 242 t4_read_reg(adapter, mbox_ctl); /* flush write */ 243 244 /* 245 * Spin waiting for firmware to acknowledge processing our command. 246 */ 247 delay_idx = 0; 248 ms = delay[0]; 249 250 for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { 251 if (sleep_ok) { 252 ms = delay[delay_idx]; 253 if (delay_idx < ARRAY_SIZE(delay) - 1) 254 delay_idx++; 255 msleep(ms); 256 } else 257 mdelay(ms); 258 259 /* 260 * If we're the owner, see if this is the reply we wanted. 261 */ 262 v = t4_read_reg(adapter, mbox_ctl); 263 if (MBOWNER_G(v) == MBOX_OWNER_DRV) { 264 /* 265 * If the Message Valid bit isn't on, revoke ownership 266 * of the mailbox and continue waiting for our reply. 267 */ 268 if ((v & MBMSGVALID_F) == 0) { 269 t4_write_reg(adapter, mbox_ctl, 270 MBOWNER_V(MBOX_OWNER_NONE)); 271 continue; 272 } 273 274 /* 275 * We now have our reply. Extract the command return 276 * value, copy the reply back to our caller's buffer 277 * (if specified) and revoke ownership of the mailbox. 278 * We return the (negated) firmware command return 279 * code (this depends on FW_SUCCESS == 0). 280 */ 281 get_mbox_rpl(adapter, cmd_rpl, size, mbox_data); 282 283 /* return value in low-order little-endian word */ 284 v = be64_to_cpu(cmd_rpl[0]); 285 286 if (rpl) { 287 /* request bit in high-order BE word */ 288 WARN_ON((be32_to_cpu(*(const __be32 *)cmd) 289 & FW_CMD_REQUEST_F) == 0); 290 memcpy(rpl, cmd_rpl, size); 291 WARN_ON((be32_to_cpu(*(__be32 *)rpl) 292 & FW_CMD_REQUEST_F) != 0); 293 } 294 t4_write_reg(adapter, mbox_ctl, 295 MBOWNER_V(MBOX_OWNER_NONE)); 296 execute = i + ms; 297 if (cmd_op != FW_VI_STATS_CMD) 298 t4vf_record_mbox(adapter, cmd_rpl, size, access, 299 execute); 300 spin_lock(&adapter->mbox_lock); 301 list_del(&entry.list); 302 spin_unlock(&adapter->mbox_lock); 303 return -FW_CMD_RETVAL_G(v); 304 } 305 } 306 307 /* We timed out. Return the error ... */ 308 ret = -ETIMEDOUT; 309 t4vf_record_mbox(adapter, cmd, size, access, ret); 310 spin_lock(&adapter->mbox_lock); 311 list_del(&entry.list); 312 spin_unlock(&adapter->mbox_lock); 313 return ret; 314 } 315 316 #define ADVERT_MASK (FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_M) | \ 317 FW_PORT_CAP32_ANEG) 318 319 /** 320 * fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits 321 * @caps16: a 16-bit Port Capabilities value 322 * 323 * Returns the equivalent 32-bit Port Capabilities value. 324 */ 325 static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16) 326 { 327 fw_port_cap32_t caps32 = 0; 328 329 #define CAP16_TO_CAP32(__cap) \ 330 do { \ 331 if (caps16 & FW_PORT_CAP_##__cap) \ 332 caps32 |= FW_PORT_CAP32_##__cap; \ 333 } while (0) 334 335 CAP16_TO_CAP32(SPEED_100M); 336 CAP16_TO_CAP32(SPEED_1G); 337 CAP16_TO_CAP32(SPEED_25G); 338 CAP16_TO_CAP32(SPEED_10G); 339 CAP16_TO_CAP32(SPEED_40G); 340 CAP16_TO_CAP32(SPEED_100G); 341 CAP16_TO_CAP32(FC_RX); 342 CAP16_TO_CAP32(FC_TX); 343 CAP16_TO_CAP32(ANEG); 344 CAP16_TO_CAP32(MDIAUTO); 345 CAP16_TO_CAP32(MDISTRAIGHT); 346 CAP16_TO_CAP32(FEC_RS); 347 CAP16_TO_CAP32(FEC_BASER_RS); 348 CAP16_TO_CAP32(802_3_PAUSE); 349 CAP16_TO_CAP32(802_3_ASM_DIR); 350 351 #undef CAP16_TO_CAP32 352 353 return caps32; 354 } 355 356 /* Translate Firmware Pause specification to Common Code */ 357 static inline enum cc_pause fwcap_to_cc_pause(fw_port_cap32_t fw_pause) 358 { 359 enum cc_pause cc_pause = 0; 360 361 if (fw_pause & FW_PORT_CAP32_FC_RX) 362 cc_pause |= PAUSE_RX; 363 if (fw_pause & FW_PORT_CAP32_FC_TX) 364 cc_pause |= PAUSE_TX; 365 366 return cc_pause; 367 } 368 369 /* Translate Firmware Forward Error Correction specification to Common Code */ 370 static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec) 371 { 372 enum cc_fec cc_fec = 0; 373 374 if (fw_fec & FW_PORT_CAP32_FEC_RS) 375 cc_fec |= FEC_RS; 376 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 377 cc_fec |= FEC_BASER_RS; 378 379 return cc_fec; 380 } 381 382 /** 383 * Return the highest speed set in the port capabilities, in Mb/s. 384 */ 385 static unsigned int fwcap_to_speed(fw_port_cap32_t caps) 386 { 387 #define TEST_SPEED_RETURN(__caps_speed, __speed) \ 388 do { \ 389 if (caps & FW_PORT_CAP32_SPEED_##__caps_speed) \ 390 return __speed; \ 391 } while (0) 392 393 TEST_SPEED_RETURN(400G, 400000); 394 TEST_SPEED_RETURN(200G, 200000); 395 TEST_SPEED_RETURN(100G, 100000); 396 TEST_SPEED_RETURN(50G, 50000); 397 TEST_SPEED_RETURN(40G, 40000); 398 TEST_SPEED_RETURN(25G, 25000); 399 TEST_SPEED_RETURN(10G, 10000); 400 TEST_SPEED_RETURN(1G, 1000); 401 TEST_SPEED_RETURN(100M, 100); 402 403 #undef TEST_SPEED_RETURN 404 405 return 0; 406 } 407 408 /** 409 * fwcap_to_fwspeed - return highest speed in Port Capabilities 410 * @acaps: advertised Port Capabilities 411 * 412 * Get the highest speed for the port from the advertised Port 413 * Capabilities. It will be either the highest speed from the list of 414 * speeds or whatever user has set using ethtool. 415 */ 416 static fw_port_cap32_t fwcap_to_fwspeed(fw_port_cap32_t acaps) 417 { 418 #define TEST_SPEED_RETURN(__caps_speed) \ 419 do { \ 420 if (acaps & FW_PORT_CAP32_SPEED_##__caps_speed) \ 421 return FW_PORT_CAP32_SPEED_##__caps_speed; \ 422 } while (0) 423 424 TEST_SPEED_RETURN(400G); 425 TEST_SPEED_RETURN(200G); 426 TEST_SPEED_RETURN(100G); 427 TEST_SPEED_RETURN(50G); 428 TEST_SPEED_RETURN(40G); 429 TEST_SPEED_RETURN(25G); 430 TEST_SPEED_RETURN(10G); 431 TEST_SPEED_RETURN(1G); 432 TEST_SPEED_RETURN(100M); 433 434 #undef TEST_SPEED_RETURN 435 return 0; 436 } 437 438 /* 439 * init_link_config - initialize a link's SW state 440 * @lc: structure holding the link state 441 * @pcaps: link Port Capabilities 442 * @acaps: link current Advertised Port Capabilities 443 * 444 * Initializes the SW state maintained for each link, including the link's 445 * capabilities and default speed/flow-control/autonegotiation settings. 446 */ 447 static void init_link_config(struct link_config *lc, 448 fw_port_cap32_t pcaps, 449 fw_port_cap32_t acaps) 450 { 451 lc->pcaps = pcaps; 452 lc->lpacaps = 0; 453 lc->speed_caps = 0; 454 lc->speed = 0; 455 lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; 456 457 /* For Forward Error Control, we default to whatever the Firmware 458 * tells us the Link is currently advertising. 459 */ 460 lc->auto_fec = fwcap_to_cc_fec(acaps); 461 lc->requested_fec = FEC_AUTO; 462 lc->fec = lc->auto_fec; 463 464 /* If the Port is capable of Auto-Negtotiation, initialize it as 465 * "enabled" and copy over all of the Physical Port Capabilities 466 * to the Advertised Port Capabilities. Otherwise mark it as 467 * Auto-Negotiate disabled and select the highest supported speed 468 * for the link. Note parallel structure in t4_link_l1cfg_core() 469 * and t4_handle_get_port_info(). 470 */ 471 if (lc->pcaps & FW_PORT_CAP32_ANEG) { 472 lc->acaps = acaps & ADVERT_MASK; 473 lc->autoneg = AUTONEG_ENABLE; 474 lc->requested_fc |= PAUSE_AUTONEG; 475 } else { 476 lc->acaps = 0; 477 lc->autoneg = AUTONEG_DISABLE; 478 lc->speed_caps = fwcap_to_fwspeed(acaps); 479 } 480 } 481 482 /** 483 * t4vf_port_init - initialize port hardware/software state 484 * @adapter: the adapter 485 * @pidx: the adapter port index 486 */ 487 int t4vf_port_init(struct adapter *adapter, int pidx) 488 { 489 struct port_info *pi = adap2pinfo(adapter, pidx); 490 unsigned int fw_caps = adapter->params.fw_caps_support; 491 struct fw_vi_cmd vi_cmd, vi_rpl; 492 struct fw_port_cmd port_cmd, port_rpl; 493 enum fw_port_type port_type; 494 int mdio_addr; 495 fw_port_cap32_t pcaps, acaps; 496 int ret; 497 498 /* If we haven't yet determined whether we're talking to Firmware 499 * which knows the new 32-bit Port Capabilities, it's time to find 500 * out now. This will also tell new Firmware to send us Port Status 501 * Updates using the new 32-bit Port Capabilities version of the 502 * Port Information message. 503 */ 504 if (fw_caps == FW_CAPS_UNKNOWN) { 505 u32 param, val; 506 507 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | 508 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_PORT_CAPS32)); 509 val = 1; 510 ret = t4vf_set_params(adapter, 1, ¶m, &val); 511 fw_caps = (ret == 0 ? FW_CAPS32 : FW_CAPS16); 512 adapter->params.fw_caps_support = fw_caps; 513 } 514 515 /* 516 * Execute a VI Read command to get our Virtual Interface information 517 * like MAC address, etc. 518 */ 519 memset(&vi_cmd, 0, sizeof(vi_cmd)); 520 vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 521 FW_CMD_REQUEST_F | 522 FW_CMD_READ_F); 523 vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); 524 vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); 525 ret = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); 526 if (ret != FW_SUCCESS) 527 return ret; 528 529 BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); 530 pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); 531 t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); 532 533 /* 534 * If we don't have read access to our port information, we're done 535 * now. Otherwise, execute a PORT Read command to get it ... 536 */ 537 if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) 538 return 0; 539 540 memset(&port_cmd, 0, sizeof(port_cmd)); 541 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 542 FW_CMD_REQUEST_F | 543 FW_CMD_READ_F | 544 FW_PORT_CMD_PORTID_V(pi->port_id)); 545 port_cmd.action_to_len16 = cpu_to_be32( 546 FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16 547 ? FW_PORT_ACTION_GET_PORT_INFO 548 : FW_PORT_ACTION_GET_PORT_INFO32) | 549 FW_LEN16(port_cmd)); 550 ret = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); 551 if (ret != FW_SUCCESS) 552 return ret; 553 554 /* Extract the various fields from the Port Information message. */ 555 if (fw_caps == FW_CAPS16) { 556 u32 lstatus = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype); 557 558 port_type = FW_PORT_CMD_PTYPE_G(lstatus); 559 mdio_addr = ((lstatus & FW_PORT_CMD_MDIOCAP_F) 560 ? FW_PORT_CMD_MDIOADDR_G(lstatus) 561 : -1); 562 pcaps = fwcaps16_to_caps32(be16_to_cpu(port_rpl.u.info.pcap)); 563 acaps = fwcaps16_to_caps32(be16_to_cpu(port_rpl.u.info.acap)); 564 } else { 565 u32 lstatus32 = 566 be32_to_cpu(port_rpl.u.info32.lstatus32_to_cbllen32); 567 568 port_type = FW_PORT_CMD_PORTTYPE32_G(lstatus32); 569 mdio_addr = ((lstatus32 & FW_PORT_CMD_MDIOCAP32_F) 570 ? FW_PORT_CMD_MDIOADDR32_G(lstatus32) 571 : -1); 572 pcaps = be32_to_cpu(port_rpl.u.info32.pcaps32); 573 acaps = be32_to_cpu(port_rpl.u.info32.acaps32); 574 } 575 576 pi->port_type = port_type; 577 pi->mdio_addr = mdio_addr; 578 pi->mod_type = FW_PORT_MOD_TYPE_NA; 579 580 init_link_config(&pi->link_cfg, pcaps, acaps); 581 return 0; 582 } 583 584 /** 585 * t4vf_fw_reset - issue a reset to FW 586 * @adapter: the adapter 587 * 588 * Issues a reset command to FW. For a Physical Function this would 589 * result in the Firmware resetting all of its state. For a Virtual 590 * Function this just resets the state associated with the VF. 591 */ 592 int t4vf_fw_reset(struct adapter *adapter) 593 { 594 struct fw_reset_cmd cmd; 595 596 memset(&cmd, 0, sizeof(cmd)); 597 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | 598 FW_CMD_WRITE_F); 599 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 600 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 601 } 602 603 /** 604 * t4vf_query_params - query FW or device parameters 605 * @adapter: the adapter 606 * @nparams: the number of parameters 607 * @params: the parameter names 608 * @vals: the parameter values 609 * 610 * Reads the values of firmware or device parameters. Up to 7 parameters 611 * can be queried at once. 612 */ 613 static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, 614 const u32 *params, u32 *vals) 615 { 616 int i, ret; 617 struct fw_params_cmd cmd, rpl; 618 struct fw_params_param *p; 619 size_t len16; 620 621 if (nparams > 7) 622 return -EINVAL; 623 624 memset(&cmd, 0, sizeof(cmd)); 625 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 626 FW_CMD_REQUEST_F | 627 FW_CMD_READ_F); 628 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 629 param[nparams].mnem), 16); 630 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 631 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) 632 p->mnem = htonl(*params++); 633 634 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 635 if (ret == 0) 636 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) 637 *vals++ = be32_to_cpu(p->val); 638 return ret; 639 } 640 641 /** 642 * t4vf_set_params - sets FW or device parameters 643 * @adapter: the adapter 644 * @nparams: the number of parameters 645 * @params: the parameter names 646 * @vals: the parameter values 647 * 648 * Sets the values of firmware or device parameters. Up to 7 parameters 649 * can be specified at once. 650 */ 651 int t4vf_set_params(struct adapter *adapter, unsigned int nparams, 652 const u32 *params, const u32 *vals) 653 { 654 int i; 655 struct fw_params_cmd cmd; 656 struct fw_params_param *p; 657 size_t len16; 658 659 if (nparams > 7) 660 return -EINVAL; 661 662 memset(&cmd, 0, sizeof(cmd)); 663 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 664 FW_CMD_REQUEST_F | 665 FW_CMD_WRITE_F); 666 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 667 param[nparams]), 16); 668 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 669 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { 670 p->mnem = cpu_to_be32(*params++); 671 p->val = cpu_to_be32(*vals++); 672 } 673 674 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 675 } 676 677 /** 678 * t4vf_fl_pkt_align - return the fl packet alignment 679 * @adapter: the adapter 680 * 681 * T4 has a single field to specify the packing and padding boundary. 682 * T5 onwards has separate fields for this and hence the alignment for 683 * next packet offset is maximum of these two. And T6 changes the 684 * Ingress Padding Boundary Shift, so it's all a mess and it's best 685 * if we put this in low-level Common Code ... 686 * 687 */ 688 int t4vf_fl_pkt_align(struct adapter *adapter) 689 { 690 u32 sge_control, sge_control2; 691 unsigned int ingpadboundary, ingpackboundary, fl_align, ingpad_shift; 692 693 sge_control = adapter->params.sge.sge_control; 694 695 /* T4 uses a single control field to specify both the PCIe Padding and 696 * Packing Boundary. T5 introduced the ability to specify these 697 * separately. The actual Ingress Packet Data alignment boundary 698 * within Packed Buffer Mode is the maximum of these two 699 * specifications. (Note that it makes no real practical sense to 700 * have the Pading Boudary be larger than the Packing Boundary but you 701 * could set the chip up that way and, in fact, legacy T4 code would 702 * end doing this because it would initialize the Padding Boundary and 703 * leave the Packing Boundary initialized to 0 (16 bytes).) 704 * Padding Boundary values in T6 starts from 8B, 705 * where as it is 32B for T4 and T5. 706 */ 707 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 708 ingpad_shift = INGPADBOUNDARY_SHIFT_X; 709 else 710 ingpad_shift = T6_INGPADBOUNDARY_SHIFT_X; 711 712 ingpadboundary = 1 << (INGPADBOUNDARY_G(sge_control) + ingpad_shift); 713 714 fl_align = ingpadboundary; 715 if (!is_t4(adapter->params.chip)) { 716 /* T5 has a different interpretation of one of the PCIe Packing 717 * Boundary values. 718 */ 719 sge_control2 = adapter->params.sge.sge_control2; 720 ingpackboundary = INGPACKBOUNDARY_G(sge_control2); 721 if (ingpackboundary == INGPACKBOUNDARY_16B_X) 722 ingpackboundary = 16; 723 else 724 ingpackboundary = 1 << (ingpackboundary + 725 INGPACKBOUNDARY_SHIFT_X); 726 727 fl_align = max(ingpadboundary, ingpackboundary); 728 } 729 return fl_align; 730 } 731 732 /** 733 * t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information 734 * @adapter: the adapter 735 * @qid: the Queue ID 736 * @qtype: the Ingress or Egress type for @qid 737 * @pbar2_qoffset: BAR2 Queue Offset 738 * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues 739 * 740 * Returns the BAR2 SGE Queue Registers information associated with the 741 * indicated Absolute Queue ID. These are passed back in return value 742 * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue 743 * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. 744 * 745 * This may return an error which indicates that BAR2 SGE Queue 746 * registers aren't available. If an error is not returned, then the 747 * following values are returned: 748 * 749 * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers 750 * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid 751 * 752 * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which 753 * require the "Inferred Queue ID" ability may be used. E.g. the 754 * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, 755 * then these "Inferred Queue ID" register may not be used. 756 */ 757 int t4vf_bar2_sge_qregs(struct adapter *adapter, 758 unsigned int qid, 759 enum t4_bar2_qtype qtype, 760 u64 *pbar2_qoffset, 761 unsigned int *pbar2_qid) 762 { 763 unsigned int page_shift, page_size, qpp_shift, qpp_mask; 764 u64 bar2_page_offset, bar2_qoffset; 765 unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; 766 767 /* T4 doesn't support BAR2 SGE Queue registers. 768 */ 769 if (is_t4(adapter->params.chip)) 770 return -EINVAL; 771 772 /* Get our SGE Page Size parameters. 773 */ 774 page_shift = adapter->params.sge.sge_vf_hps + 10; 775 page_size = 1 << page_shift; 776 777 /* Get the right Queues per Page parameters for our Queue. 778 */ 779 qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS 780 ? adapter->params.sge.sge_vf_eq_qpp 781 : adapter->params.sge.sge_vf_iq_qpp); 782 qpp_mask = (1 << qpp_shift) - 1; 783 784 /* Calculate the basics of the BAR2 SGE Queue register area: 785 * o The BAR2 page the Queue registers will be in. 786 * o The BAR2 Queue ID. 787 * o The BAR2 Queue ID Offset into the BAR2 page. 788 */ 789 bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift); 790 bar2_qid = qid & qpp_mask; 791 bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; 792 793 /* If the BAR2 Queue ID Offset is less than the Page Size, then the 794 * hardware will infer the Absolute Queue ID simply from the writes to 795 * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a 796 * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply 797 * write to the first BAR2 SGE Queue Area within the BAR2 Page with 798 * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID 799 * from the BAR2 Page and BAR2 Queue ID. 800 * 801 * One important censequence of this is that some BAR2 SGE registers 802 * have a "Queue ID" field and we can write the BAR2 SGE Queue ID 803 * there. But other registers synthesize the SGE Queue ID purely 804 * from the writes to the registers -- the Write Combined Doorbell 805 * Buffer is a good example. These BAR2 SGE Registers are only 806 * available for those BAR2 SGE Register areas where the SGE Absolute 807 * Queue ID can be inferred from simple writes. 808 */ 809 bar2_qoffset = bar2_page_offset; 810 bar2_qinferred = (bar2_qid_offset < page_size); 811 if (bar2_qinferred) { 812 bar2_qoffset += bar2_qid_offset; 813 bar2_qid = 0; 814 } 815 816 *pbar2_qoffset = bar2_qoffset; 817 *pbar2_qid = bar2_qid; 818 return 0; 819 } 820 821 unsigned int t4vf_get_pf_from_vf(struct adapter *adapter) 822 { 823 u32 whoami; 824 825 whoami = t4_read_reg(adapter, T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A); 826 return (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? 827 SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami)); 828 } 829 830 /** 831 * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters 832 * @adapter: the adapter 833 * 834 * Retrieves various core SGE parameters in the form of hardware SGE 835 * register values. The caller is responsible for decoding these as 836 * needed. The SGE parameters are stored in @adapter->params.sge. 837 */ 838 int t4vf_get_sge_params(struct adapter *adapter) 839 { 840 struct sge_params *sge_params = &adapter->params.sge; 841 u32 params[7], vals[7]; 842 int v; 843 844 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 845 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A)); 846 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 847 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A)); 848 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 849 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A)); 850 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 851 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A)); 852 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 853 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A)); 854 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 855 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A)); 856 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 857 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A)); 858 v = t4vf_query_params(adapter, 7, params, vals); 859 if (v) 860 return v; 861 sge_params->sge_control = vals[0]; 862 sge_params->sge_host_page_size = vals[1]; 863 sge_params->sge_fl_buffer_size[0] = vals[2]; 864 sge_params->sge_fl_buffer_size[1] = vals[3]; 865 sge_params->sge_timer_value_0_and_1 = vals[4]; 866 sge_params->sge_timer_value_2_and_3 = vals[5]; 867 sge_params->sge_timer_value_4_and_5 = vals[6]; 868 869 /* T4 uses a single control field to specify both the PCIe Padding and 870 * Packing Boundary. T5 introduced the ability to specify these 871 * separately with the Padding Boundary in SGE_CONTROL and and Packing 872 * Boundary in SGE_CONTROL2. So for T5 and later we need to grab 873 * SGE_CONTROL in order to determine how ingress packet data will be 874 * laid out in Packed Buffer Mode. Unfortunately, older versions of 875 * the firmware won't let us retrieve SGE_CONTROL2 so if we get a 876 * failure grabbing it we throw an error since we can't figure out the 877 * right value. 878 */ 879 if (!is_t4(adapter->params.chip)) { 880 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 881 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); 882 v = t4vf_query_params(adapter, 1, params, vals); 883 if (v != FW_SUCCESS) { 884 dev_err(adapter->pdev_dev, 885 "Unable to get SGE Control2; " 886 "probably old firmware.\n"); 887 return v; 888 } 889 sge_params->sge_control2 = vals[0]; 890 } 891 892 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 893 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A)); 894 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 895 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A)); 896 v = t4vf_query_params(adapter, 2, params, vals); 897 if (v) 898 return v; 899 sge_params->sge_ingress_rx_threshold = vals[0]; 900 sge_params->sge_congestion_control = vals[1]; 901 902 /* For T5 and later we want to use the new BAR2 Doorbells. 903 * Unfortunately, older firmware didn't allow the this register to be 904 * read. 905 */ 906 if (!is_t4(adapter->params.chip)) { 907 unsigned int pf, s_hps, s_qpp; 908 909 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 910 FW_PARAMS_PARAM_XYZ_V( 911 SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); 912 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 913 FW_PARAMS_PARAM_XYZ_V( 914 SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); 915 v = t4vf_query_params(adapter, 2, params, vals); 916 if (v != FW_SUCCESS) { 917 dev_warn(adapter->pdev_dev, 918 "Unable to get VF SGE Queues/Page; " 919 "probably old firmware.\n"); 920 return v; 921 } 922 sge_params->sge_egress_queues_per_page = vals[0]; 923 sge_params->sge_ingress_queues_per_page = vals[1]; 924 925 /* We need the Queues/Page for our VF. This is based on the 926 * PF from which we're instantiated and is indexed in the 927 * register we just read. Do it once here so other code in 928 * the driver can just use it. 929 */ 930 pf = t4vf_get_pf_from_vf(adapter); 931 s_hps = (HOSTPAGESIZEPF0_S + 932 (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); 933 sge_params->sge_vf_hps = 934 ((sge_params->sge_host_page_size >> s_hps) 935 & HOSTPAGESIZEPF0_M); 936 937 s_qpp = (QUEUESPERPAGEPF0_S + 938 (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); 939 sge_params->sge_vf_eq_qpp = 940 ((sge_params->sge_egress_queues_per_page >> s_qpp) 941 & QUEUESPERPAGEPF0_M); 942 sge_params->sge_vf_iq_qpp = 943 ((sge_params->sge_ingress_queues_per_page >> s_qpp) 944 & QUEUESPERPAGEPF0_M); 945 } 946 947 return 0; 948 } 949 950 /** 951 * t4vf_get_vpd_params - retrieve device VPD paremeters 952 * @adapter: the adapter 953 * 954 * Retrives various device Vital Product Data parameters. The parameters 955 * are stored in @adapter->params.vpd. 956 */ 957 int t4vf_get_vpd_params(struct adapter *adapter) 958 { 959 struct vpd_params *vpd_params = &adapter->params.vpd; 960 u32 params[7], vals[7]; 961 int v; 962 963 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 964 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); 965 v = t4vf_query_params(adapter, 1, params, vals); 966 if (v) 967 return v; 968 vpd_params->cclk = vals[0]; 969 970 return 0; 971 } 972 973 /** 974 * t4vf_get_dev_params - retrieve device paremeters 975 * @adapter: the adapter 976 * 977 * Retrives various device parameters. The parameters are stored in 978 * @adapter->params.dev. 979 */ 980 int t4vf_get_dev_params(struct adapter *adapter) 981 { 982 struct dev_params *dev_params = &adapter->params.dev; 983 u32 params[7], vals[7]; 984 int v; 985 986 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 987 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); 988 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 989 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); 990 v = t4vf_query_params(adapter, 2, params, vals); 991 if (v) 992 return v; 993 dev_params->fwrev = vals[0]; 994 dev_params->tprev = vals[1]; 995 996 return 0; 997 } 998 999 /** 1000 * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration 1001 * @adapter: the adapter 1002 * 1003 * Retrieves global RSS mode and parameters with which we have to live 1004 * and stores them in the @adapter's RSS parameters. 1005 */ 1006 int t4vf_get_rss_glb_config(struct adapter *adapter) 1007 { 1008 struct rss_params *rss = &adapter->params.rss; 1009 struct fw_rss_glb_config_cmd cmd, rpl; 1010 int v; 1011 1012 /* 1013 * Execute an RSS Global Configuration read command to retrieve 1014 * our RSS configuration. 1015 */ 1016 memset(&cmd, 0, sizeof(cmd)); 1017 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | 1018 FW_CMD_REQUEST_F | 1019 FW_CMD_READ_F); 1020 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1021 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1022 if (v) 1023 return v; 1024 1025 /* 1026 * Transate the big-endian RSS Global Configuration into our 1027 * cpu-endian format based on the RSS mode. We also do first level 1028 * filtering at this point to weed out modes which don't support 1029 * VF Drivers ... 1030 */ 1031 rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( 1032 be32_to_cpu(rpl.u.manual.mode_pkd)); 1033 switch (rss->mode) { 1034 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1035 u32 word = be32_to_cpu( 1036 rpl.u.basicvirtual.synmapen_to_hashtoeplitz); 1037 1038 rss->u.basicvirtual.synmapen = 1039 ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); 1040 rss->u.basicvirtual.syn4tupenipv6 = 1041 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); 1042 rss->u.basicvirtual.syn2tupenipv6 = 1043 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); 1044 rss->u.basicvirtual.syn4tupenipv4 = 1045 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); 1046 rss->u.basicvirtual.syn2tupenipv4 = 1047 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); 1048 1049 rss->u.basicvirtual.ofdmapen = 1050 ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); 1051 1052 rss->u.basicvirtual.tnlmapen = 1053 ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); 1054 rss->u.basicvirtual.tnlalllookup = 1055 ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); 1056 1057 rss->u.basicvirtual.hashtoeplitz = 1058 ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); 1059 1060 /* we need at least Tunnel Map Enable to be set */ 1061 if (!rss->u.basicvirtual.tnlmapen) 1062 return -EINVAL; 1063 break; 1064 } 1065 1066 default: 1067 /* all unknown/unsupported RSS modes result in an error */ 1068 return -EINVAL; 1069 } 1070 1071 return 0; 1072 } 1073 1074 /** 1075 * t4vf_get_vfres - retrieve VF resource limits 1076 * @adapter: the adapter 1077 * 1078 * Retrieves configured resource limits and capabilities for a virtual 1079 * function. The results are stored in @adapter->vfres. 1080 */ 1081 int t4vf_get_vfres(struct adapter *adapter) 1082 { 1083 struct vf_resources *vfres = &adapter->params.vfres; 1084 struct fw_pfvf_cmd cmd, rpl; 1085 int v; 1086 u32 word; 1087 1088 /* 1089 * Execute PFVF Read command to get VF resource limits; bail out early 1090 * with error on command failure. 1091 */ 1092 memset(&cmd, 0, sizeof(cmd)); 1093 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | 1094 FW_CMD_REQUEST_F | 1095 FW_CMD_READ_F); 1096 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1097 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1098 if (v) 1099 return v; 1100 1101 /* 1102 * Extract VF resource limits and return success. 1103 */ 1104 word = be32_to_cpu(rpl.niqflint_niq); 1105 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); 1106 vfres->niq = FW_PFVF_CMD_NIQ_G(word); 1107 1108 word = be32_to_cpu(rpl.type_to_neq); 1109 vfres->neq = FW_PFVF_CMD_NEQ_G(word); 1110 vfres->pmask = FW_PFVF_CMD_PMASK_G(word); 1111 1112 word = be32_to_cpu(rpl.tc_to_nexactf); 1113 vfres->tc = FW_PFVF_CMD_TC_G(word); 1114 vfres->nvi = FW_PFVF_CMD_NVI_G(word); 1115 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); 1116 1117 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 1118 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); 1119 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); 1120 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); 1121 1122 return 0; 1123 } 1124 1125 /** 1126 * t4vf_read_rss_vi_config - read a VI's RSS configuration 1127 * @adapter: the adapter 1128 * @viid: Virtual Interface ID 1129 * @config: pointer to host-native VI RSS Configuration buffer 1130 * 1131 * Reads the Virtual Interface's RSS configuration information and 1132 * translates it into CPU-native format. 1133 */ 1134 int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, 1135 union rss_vi_config *config) 1136 { 1137 struct fw_rss_vi_config_cmd cmd, rpl; 1138 int v; 1139 1140 memset(&cmd, 0, sizeof(cmd)); 1141 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 1142 FW_CMD_REQUEST_F | 1143 FW_CMD_READ_F | 1144 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 1145 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1146 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1147 if (v) 1148 return v; 1149 1150 switch (adapter->params.rss.mode) { 1151 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1152 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); 1153 1154 config->basicvirtual.ip6fourtupen = 1155 ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); 1156 config->basicvirtual.ip6twotupen = 1157 ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); 1158 config->basicvirtual.ip4fourtupen = 1159 ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); 1160 config->basicvirtual.ip4twotupen = 1161 ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); 1162 config->basicvirtual.udpen = 1163 ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); 1164 config->basicvirtual.defaultq = 1165 FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); 1166 break; 1167 } 1168 1169 default: 1170 return -EINVAL; 1171 } 1172 1173 return 0; 1174 } 1175 1176 /** 1177 * t4vf_write_rss_vi_config - write a VI's RSS configuration 1178 * @adapter: the adapter 1179 * @viid: Virtual Interface ID 1180 * @config: pointer to host-native VI RSS Configuration buffer 1181 * 1182 * Write the Virtual Interface's RSS configuration information 1183 * (translating it into firmware-native format before writing). 1184 */ 1185 int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, 1186 union rss_vi_config *config) 1187 { 1188 struct fw_rss_vi_config_cmd cmd, rpl; 1189 1190 memset(&cmd, 0, sizeof(cmd)); 1191 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 1192 FW_CMD_REQUEST_F | 1193 FW_CMD_WRITE_F | 1194 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 1195 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1196 switch (adapter->params.rss.mode) { 1197 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 1198 u32 word = 0; 1199 1200 if (config->basicvirtual.ip6fourtupen) 1201 word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; 1202 if (config->basicvirtual.ip6twotupen) 1203 word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; 1204 if (config->basicvirtual.ip4fourtupen) 1205 word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; 1206 if (config->basicvirtual.ip4twotupen) 1207 word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; 1208 if (config->basicvirtual.udpen) 1209 word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; 1210 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( 1211 config->basicvirtual.defaultq); 1212 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); 1213 break; 1214 } 1215 1216 default: 1217 return -EINVAL; 1218 } 1219 1220 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1221 } 1222 1223 /** 1224 * t4vf_config_rss_range - configure a portion of the RSS mapping table 1225 * @adapter: the adapter 1226 * @viid: Virtual Interface of RSS Table Slice 1227 * @start: starting entry in the table to write 1228 * @n: how many table entries to write 1229 * @rspq: values for the "Response Queue" (Ingress Queue) lookup table 1230 * @nrspq: number of values in @rspq 1231 * 1232 * Programs the selected part of the VI's RSS mapping table with the 1233 * provided values. If @nrspq < @n the supplied values are used repeatedly 1234 * until the full table range is populated. 1235 * 1236 * The caller must ensure the values in @rspq are in the range 0..1023. 1237 */ 1238 int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, 1239 int start, int n, const u16 *rspq, int nrspq) 1240 { 1241 const u16 *rsp = rspq; 1242 const u16 *rsp_end = rspq+nrspq; 1243 struct fw_rss_ind_tbl_cmd cmd; 1244 1245 /* 1246 * Initialize firmware command template to write the RSS table. 1247 */ 1248 memset(&cmd, 0, sizeof(cmd)); 1249 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | 1250 FW_CMD_REQUEST_F | 1251 FW_CMD_WRITE_F | 1252 FW_RSS_IND_TBL_CMD_VIID_V(viid)); 1253 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1254 1255 /* 1256 * Each firmware RSS command can accommodate up to 32 RSS Ingress 1257 * Queue Identifiers. These Ingress Queue IDs are packed three to 1258 * a 32-bit word as 10-bit values with the upper remaining 2 bits 1259 * reserved. 1260 */ 1261 while (n > 0) { 1262 __be32 *qp = &cmd.iq0_to_iq2; 1263 int nq = min(n, 32); 1264 int ret; 1265 1266 /* 1267 * Set up the firmware RSS command header to send the next 1268 * "nq" Ingress Queue IDs to the firmware. 1269 */ 1270 cmd.niqid = cpu_to_be16(nq); 1271 cmd.startidx = cpu_to_be16(start); 1272 1273 /* 1274 * "nq" more done for the start of the next loop. 1275 */ 1276 start += nq; 1277 n -= nq; 1278 1279 /* 1280 * While there are still Ingress Queue IDs to stuff into the 1281 * current firmware RSS command, retrieve them from the 1282 * Ingress Queue ID array and insert them into the command. 1283 */ 1284 while (nq > 0) { 1285 /* 1286 * Grab up to the next 3 Ingress Queue IDs (wrapping 1287 * around the Ingress Queue ID array if necessary) and 1288 * insert them into the firmware RSS command at the 1289 * current 3-tuple position within the commad. 1290 */ 1291 u16 qbuf[3]; 1292 u16 *qbp = qbuf; 1293 int nqbuf = min(3, nq); 1294 1295 nq -= nqbuf; 1296 qbuf[0] = qbuf[1] = qbuf[2] = 0; 1297 while (nqbuf) { 1298 nqbuf--; 1299 *qbp++ = *rsp++; 1300 if (rsp >= rsp_end) 1301 rsp = rspq; 1302 } 1303 *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | 1304 FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | 1305 FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); 1306 } 1307 1308 /* 1309 * Send this portion of the RRS table update to the firmware; 1310 * bail out on any errors. 1311 */ 1312 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1313 if (ret) 1314 return ret; 1315 } 1316 return 0; 1317 } 1318 1319 /** 1320 * t4vf_alloc_vi - allocate a virtual interface on a port 1321 * @adapter: the adapter 1322 * @port_id: physical port associated with the VI 1323 * 1324 * Allocate a new Virtual Interface and bind it to the indicated 1325 * physical port. Return the new Virtual Interface Identifier on 1326 * success, or a [negative] error number on failure. 1327 */ 1328 int t4vf_alloc_vi(struct adapter *adapter, int port_id) 1329 { 1330 struct fw_vi_cmd cmd, rpl; 1331 int v; 1332 1333 /* 1334 * Execute a VI command to allocate Virtual Interface and return its 1335 * VIID. 1336 */ 1337 memset(&cmd, 0, sizeof(cmd)); 1338 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1339 FW_CMD_REQUEST_F | 1340 FW_CMD_WRITE_F | 1341 FW_CMD_EXEC_F); 1342 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1343 FW_VI_CMD_ALLOC_F); 1344 cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); 1345 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1346 if (v) 1347 return v; 1348 1349 return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); 1350 } 1351 1352 /** 1353 * t4vf_free_vi -- free a virtual interface 1354 * @adapter: the adapter 1355 * @viid: the virtual interface identifier 1356 * 1357 * Free a previously allocated Virtual Interface. Return an error on 1358 * failure. 1359 */ 1360 int t4vf_free_vi(struct adapter *adapter, int viid) 1361 { 1362 struct fw_vi_cmd cmd; 1363 1364 /* 1365 * Execute a VI command to free the Virtual Interface. 1366 */ 1367 memset(&cmd, 0, sizeof(cmd)); 1368 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1369 FW_CMD_REQUEST_F | 1370 FW_CMD_EXEC_F); 1371 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1372 FW_VI_CMD_FREE_F); 1373 cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); 1374 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1375 } 1376 1377 /** 1378 * t4vf_enable_vi - enable/disable a virtual interface 1379 * @adapter: the adapter 1380 * @viid: the Virtual Interface ID 1381 * @rx_en: 1=enable Rx, 0=disable Rx 1382 * @tx_en: 1=enable Tx, 0=disable Tx 1383 * 1384 * Enables/disables a virtual interface. 1385 */ 1386 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, 1387 bool rx_en, bool tx_en) 1388 { 1389 struct fw_vi_enable_cmd cmd; 1390 1391 memset(&cmd, 0, sizeof(cmd)); 1392 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1393 FW_CMD_REQUEST_F | 1394 FW_CMD_EXEC_F | 1395 FW_VI_ENABLE_CMD_VIID_V(viid)); 1396 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | 1397 FW_VI_ENABLE_CMD_EEN_V(tx_en) | 1398 FW_LEN16(cmd)); 1399 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1400 } 1401 1402 /** 1403 * t4vf_enable_pi - enable/disable a Port's virtual interface 1404 * @adapter: the adapter 1405 * @pi: the Port Information structure 1406 * @rx_en: 1=enable Rx, 0=disable Rx 1407 * @tx_en: 1=enable Tx, 0=disable Tx 1408 * 1409 * Enables/disables a Port's virtual interface. If the Virtual 1410 * Interface enable/disable operation is successful, we notify the 1411 * OS-specific code of a potential Link Status change via the OS Contract 1412 * API t4vf_os_link_changed(). 1413 */ 1414 int t4vf_enable_pi(struct adapter *adapter, struct port_info *pi, 1415 bool rx_en, bool tx_en) 1416 { 1417 int ret = t4vf_enable_vi(adapter, pi->viid, rx_en, tx_en); 1418 1419 if (ret) 1420 return ret; 1421 t4vf_os_link_changed(adapter, pi->pidx, 1422 rx_en && tx_en && pi->link_cfg.link_ok); 1423 return 0; 1424 } 1425 1426 /** 1427 * t4vf_identify_port - identify a VI's port by blinking its LED 1428 * @adapter: the adapter 1429 * @viid: the Virtual Interface ID 1430 * @nblinks: how many times to blink LED at 2.5 Hz 1431 * 1432 * Identifies a VI's port by blinking its LED. 1433 */ 1434 int t4vf_identify_port(struct adapter *adapter, unsigned int viid, 1435 unsigned int nblinks) 1436 { 1437 struct fw_vi_enable_cmd cmd; 1438 1439 memset(&cmd, 0, sizeof(cmd)); 1440 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1441 FW_CMD_REQUEST_F | 1442 FW_CMD_EXEC_F | 1443 FW_VI_ENABLE_CMD_VIID_V(viid)); 1444 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | 1445 FW_LEN16(cmd)); 1446 cmd.blinkdur = cpu_to_be16(nblinks); 1447 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1448 } 1449 1450 /** 1451 * t4vf_set_rxmode - set Rx properties of a virtual interface 1452 * @adapter: the adapter 1453 * @viid: the VI id 1454 * @mtu: the new MTU or -1 for no change 1455 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change 1456 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change 1457 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change 1458 * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, 1459 * -1 no change 1460 * 1461 * Sets Rx properties of a virtual interface. 1462 */ 1463 int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, 1464 int mtu, int promisc, int all_multi, int bcast, int vlanex, 1465 bool sleep_ok) 1466 { 1467 struct fw_vi_rxmode_cmd cmd; 1468 1469 /* convert to FW values */ 1470 if (mtu < 0) 1471 mtu = FW_VI_RXMODE_CMD_MTU_M; 1472 if (promisc < 0) 1473 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; 1474 if (all_multi < 0) 1475 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; 1476 if (bcast < 0) 1477 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; 1478 if (vlanex < 0) 1479 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; 1480 1481 memset(&cmd, 0, sizeof(cmd)); 1482 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | 1483 FW_CMD_REQUEST_F | 1484 FW_CMD_WRITE_F | 1485 FW_VI_RXMODE_CMD_VIID_V(viid)); 1486 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1487 cmd.mtu_to_vlanexen = 1488 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | 1489 FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | 1490 FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | 1491 FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | 1492 FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); 1493 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1494 } 1495 1496 /** 1497 * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses 1498 * @adapter: the adapter 1499 * @viid: the Virtual Interface Identifier 1500 * @free: if true any existing filters for this VI id are first removed 1501 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1502 * @addr: the MAC address(es) 1503 * @idx: where to store the index of each allocated filter 1504 * @hash: pointer to hash address filter bitmap 1505 * @sleep_ok: call is allowed to sleep 1506 * 1507 * Allocates an exact-match filter for each of the supplied addresses and 1508 * sets it to the corresponding address. If @idx is not %NULL it should 1509 * have at least @naddr entries, each of which will be set to the index of 1510 * the filter allocated for the corresponding MAC address. If a filter 1511 * could not be allocated for an address its index is set to 0xffff. 1512 * If @hash is not %NULL addresses that fail to allocate an exact filter 1513 * are hashed and update the hash filter bitmap pointed at by @hash. 1514 * 1515 * Returns a negative error number or the number of filters allocated. 1516 */ 1517 int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, 1518 unsigned int naddr, const u8 **addr, u16 *idx, 1519 u64 *hash, bool sleep_ok) 1520 { 1521 int offset, ret = 0; 1522 unsigned nfilters = 0; 1523 unsigned int rem = naddr; 1524 struct fw_vi_mac_cmd cmd, rpl; 1525 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1526 1527 if (naddr > max_naddr) 1528 return -EINVAL; 1529 1530 for (offset = 0; offset < naddr; /**/) { 1531 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) 1532 ? rem 1533 : ARRAY_SIZE(cmd.u.exact)); 1534 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1535 u.exact[fw_naddr]), 16); 1536 struct fw_vi_mac_exact *p; 1537 int i; 1538 1539 memset(&cmd, 0, sizeof(cmd)); 1540 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1541 FW_CMD_REQUEST_F | 1542 FW_CMD_WRITE_F | 1543 (free ? FW_CMD_EXEC_F : 0) | 1544 FW_VI_MAC_CMD_VIID_V(viid)); 1545 cmd.freemacs_to_len16 = 1546 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | 1547 FW_CMD_LEN16_V(len16)); 1548 1549 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1550 p->valid_to_idx = cpu_to_be16( 1551 FW_VI_MAC_CMD_VALID_F | 1552 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); 1553 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1554 } 1555 1556 1557 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, 1558 sleep_ok); 1559 if (ret && ret != -ENOMEM) 1560 break; 1561 1562 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { 1563 u16 index = FW_VI_MAC_CMD_IDX_G( 1564 be16_to_cpu(p->valid_to_idx)); 1565 1566 if (idx) 1567 idx[offset+i] = 1568 (index >= max_naddr 1569 ? 0xffff 1570 : index); 1571 if (index < max_naddr) 1572 nfilters++; 1573 else if (hash) 1574 *hash |= (1ULL << hash_mac_addr(addr[offset+i])); 1575 } 1576 1577 free = false; 1578 offset += fw_naddr; 1579 rem -= fw_naddr; 1580 } 1581 1582 /* 1583 * If there were no errors or we merely ran out of room in our MAC 1584 * address arena, return the number of filters actually written. 1585 */ 1586 if (ret == 0 || ret == -ENOMEM) 1587 ret = nfilters; 1588 return ret; 1589 } 1590 1591 /** 1592 * t4vf_free_mac_filt - frees exact-match filters of given MAC addresses 1593 * @adapter: the adapter 1594 * @viid: the VI id 1595 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1596 * @addr: the MAC address(es) 1597 * @sleep_ok: call is allowed to sleep 1598 * 1599 * Frees the exact-match filter for each of the supplied addresses 1600 * 1601 * Returns a negative error number or the number of filters freed. 1602 */ 1603 int t4vf_free_mac_filt(struct adapter *adapter, unsigned int viid, 1604 unsigned int naddr, const u8 **addr, bool sleep_ok) 1605 { 1606 int offset, ret = 0; 1607 struct fw_vi_mac_cmd cmd; 1608 unsigned int nfilters = 0; 1609 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1610 unsigned int rem = naddr; 1611 1612 if (naddr > max_naddr) 1613 return -EINVAL; 1614 1615 for (offset = 0; offset < (int)naddr ; /**/) { 1616 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) ? 1617 rem : ARRAY_SIZE(cmd.u.exact)); 1618 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1619 u.exact[fw_naddr]), 16); 1620 struct fw_vi_mac_exact *p; 1621 int i; 1622 1623 memset(&cmd, 0, sizeof(cmd)); 1624 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1625 FW_CMD_REQUEST_F | 1626 FW_CMD_WRITE_F | 1627 FW_CMD_EXEC_V(0) | 1628 FW_VI_MAC_CMD_VIID_V(viid)); 1629 cmd.freemacs_to_len16 = 1630 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(0) | 1631 FW_CMD_LEN16_V(len16)); 1632 1633 for (i = 0, p = cmd.u.exact; i < (int)fw_naddr; i++, p++) { 1634 p->valid_to_idx = cpu_to_be16( 1635 FW_VI_MAC_CMD_VALID_F | 1636 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_MAC_BASED_FREE)); 1637 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1638 } 1639 1640 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &cmd, 1641 sleep_ok); 1642 if (ret) 1643 break; 1644 1645 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1646 u16 index = FW_VI_MAC_CMD_IDX_G( 1647 be16_to_cpu(p->valid_to_idx)); 1648 1649 if (index < max_naddr) 1650 nfilters++; 1651 } 1652 1653 offset += fw_naddr; 1654 rem -= fw_naddr; 1655 } 1656 1657 if (ret == 0) 1658 ret = nfilters; 1659 return ret; 1660 } 1661 1662 /** 1663 * t4vf_change_mac - modifies the exact-match filter for a MAC address 1664 * @adapter: the adapter 1665 * @viid: the Virtual Interface ID 1666 * @idx: index of existing filter for old value of MAC address, or -1 1667 * @addr: the new MAC address value 1668 * @persist: if idx < 0, the new MAC allocation should be persistent 1669 * 1670 * Modifies an exact-match filter and sets it to the new MAC address. 1671 * Note that in general it is not possible to modify the value of a given 1672 * filter so the generic way to modify an address filter is to free the 1673 * one being used by the old address value and allocate a new filter for 1674 * the new address value. @idx can be -1 if the address is a new 1675 * addition. 1676 * 1677 * Returns a negative error number or the index of the filter with the new 1678 * MAC value. 1679 */ 1680 int t4vf_change_mac(struct adapter *adapter, unsigned int viid, 1681 int idx, const u8 *addr, bool persist) 1682 { 1683 int ret; 1684 struct fw_vi_mac_cmd cmd, rpl; 1685 struct fw_vi_mac_exact *p = &cmd.u.exact[0]; 1686 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1687 u.exact[1]), 16); 1688 unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size; 1689 1690 /* 1691 * If this is a new allocation, determine whether it should be 1692 * persistent (across a "freemacs" operation) or not. 1693 */ 1694 if (idx < 0) 1695 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; 1696 1697 memset(&cmd, 0, sizeof(cmd)); 1698 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1699 FW_CMD_REQUEST_F | 1700 FW_CMD_WRITE_F | 1701 FW_VI_MAC_CMD_VIID_V(viid)); 1702 cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1703 p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | 1704 FW_VI_MAC_CMD_IDX_V(idx)); 1705 memcpy(p->macaddr, addr, sizeof(p->macaddr)); 1706 1707 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1708 if (ret == 0) { 1709 p = &rpl.u.exact[0]; 1710 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); 1711 if (ret >= max_mac_addr) 1712 ret = -ENOMEM; 1713 } 1714 return ret; 1715 } 1716 1717 /** 1718 * t4vf_set_addr_hash - program the MAC inexact-match hash filter 1719 * @adapter: the adapter 1720 * @viid: the Virtual Interface Identifier 1721 * @ucast: whether the hash filter should also match unicast addresses 1722 * @vec: the value to be written to the hash filter 1723 * @sleep_ok: call is allowed to sleep 1724 * 1725 * Sets the 64-bit inexact-match hash filter for a virtual interface. 1726 */ 1727 int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, 1728 bool ucast, u64 vec, bool sleep_ok) 1729 { 1730 struct fw_vi_mac_cmd cmd; 1731 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1732 u.exact[0]), 16); 1733 1734 memset(&cmd, 0, sizeof(cmd)); 1735 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1736 FW_CMD_REQUEST_F | 1737 FW_CMD_WRITE_F | 1738 FW_VI_ENABLE_CMD_VIID_V(viid)); 1739 cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | 1740 FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | 1741 FW_CMD_LEN16_V(len16)); 1742 cmd.u.hash.hashvec = cpu_to_be64(vec); 1743 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1744 } 1745 1746 /** 1747 * t4vf_get_port_stats - collect "port" statistics 1748 * @adapter: the adapter 1749 * @pidx: the port index 1750 * @s: the stats structure to fill 1751 * 1752 * Collect statistics for the "port"'s Virtual Interface. 1753 */ 1754 int t4vf_get_port_stats(struct adapter *adapter, int pidx, 1755 struct t4vf_port_stats *s) 1756 { 1757 struct port_info *pi = adap2pinfo(adapter, pidx); 1758 struct fw_vi_stats_vf fwstats; 1759 unsigned int rem = VI_VF_NUM_STATS; 1760 __be64 *fwsp = (__be64 *)&fwstats; 1761 1762 /* 1763 * Grab the Virtual Interface statistics a chunk at a time via mailbox 1764 * commands. We could use a Work Request and get all of them at once 1765 * but that's an asynchronous interface which is awkward to use. 1766 */ 1767 while (rem) { 1768 unsigned int ix = VI_VF_NUM_STATS - rem; 1769 unsigned int nstats = min(6U, rem); 1770 struct fw_vi_stats_cmd cmd, rpl; 1771 size_t len = (offsetof(struct fw_vi_stats_cmd, u) + 1772 sizeof(struct fw_vi_stats_ctl)); 1773 size_t len16 = DIV_ROUND_UP(len, 16); 1774 int ret; 1775 1776 memset(&cmd, 0, sizeof(cmd)); 1777 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | 1778 FW_VI_STATS_CMD_VIID_V(pi->viid) | 1779 FW_CMD_REQUEST_F | 1780 FW_CMD_READ_F); 1781 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1782 cmd.u.ctl.nstats_ix = 1783 cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | 1784 FW_VI_STATS_CMD_NSTATS_V(nstats)); 1785 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); 1786 if (ret) 1787 return ret; 1788 1789 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); 1790 1791 rem -= nstats; 1792 fwsp += nstats; 1793 } 1794 1795 /* 1796 * Translate firmware statistics into host native statistics. 1797 */ 1798 s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); 1799 s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); 1800 s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); 1801 s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); 1802 s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); 1803 s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); 1804 s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); 1805 s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); 1806 s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); 1807 1808 s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); 1809 s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); 1810 s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); 1811 s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); 1812 s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); 1813 s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); 1814 1815 s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); 1816 1817 return 0; 1818 } 1819 1820 /** 1821 * t4vf_iq_free - free an ingress queue and its free lists 1822 * @adapter: the adapter 1823 * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) 1824 * @iqid: ingress queue ID 1825 * @fl0id: FL0 queue ID or 0xffff if no attached FL0 1826 * @fl1id: FL1 queue ID or 0xffff if no attached FL1 1827 * 1828 * Frees an ingress queue and its associated free lists, if any. 1829 */ 1830 int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, 1831 unsigned int iqid, unsigned int fl0id, unsigned int fl1id) 1832 { 1833 struct fw_iq_cmd cmd; 1834 1835 memset(&cmd, 0, sizeof(cmd)); 1836 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | 1837 FW_CMD_REQUEST_F | 1838 FW_CMD_EXEC_F); 1839 cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | 1840 FW_LEN16(cmd)); 1841 cmd.type_to_iqandstindex = 1842 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); 1843 1844 cmd.iqid = cpu_to_be16(iqid); 1845 cmd.fl0id = cpu_to_be16(fl0id); 1846 cmd.fl1id = cpu_to_be16(fl1id); 1847 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1848 } 1849 1850 /** 1851 * t4vf_eth_eq_free - free an Ethernet egress queue 1852 * @adapter: the adapter 1853 * @eqid: egress queue ID 1854 * 1855 * Frees an Ethernet egress queue. 1856 */ 1857 int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) 1858 { 1859 struct fw_eq_eth_cmd cmd; 1860 1861 memset(&cmd, 0, sizeof(cmd)); 1862 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | 1863 FW_CMD_REQUEST_F | 1864 FW_CMD_EXEC_F); 1865 cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | 1866 FW_LEN16(cmd)); 1867 cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); 1868 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1869 } 1870 1871 /** 1872 * t4vf_link_down_rc_str - return a string for a Link Down Reason Code 1873 * @link_down_rc: Link Down Reason Code 1874 * 1875 * Returns a string representation of the Link Down Reason Code. 1876 */ 1877 static const char *t4vf_link_down_rc_str(unsigned char link_down_rc) 1878 { 1879 static const char * const reason[] = { 1880 "Link Down", 1881 "Remote Fault", 1882 "Auto-negotiation Failure", 1883 "Reserved", 1884 "Insufficient Airflow", 1885 "Unable To Determine Reason", 1886 "No RX Signal Detected", 1887 "Reserved", 1888 }; 1889 1890 if (link_down_rc >= ARRAY_SIZE(reason)) 1891 return "Bad Reason Code"; 1892 1893 return reason[link_down_rc]; 1894 } 1895 1896 /** 1897 * t4vf_handle_get_port_info - process a FW reply message 1898 * @pi: the port info 1899 * @rpl: start of the FW message 1900 * 1901 * Processes a GET_PORT_INFO FW reply message. 1902 */ 1903 static void t4vf_handle_get_port_info(struct port_info *pi, 1904 const struct fw_port_cmd *cmd) 1905 { 1906 int action = FW_PORT_CMD_ACTION_G(be32_to_cpu(cmd->action_to_len16)); 1907 struct adapter *adapter = pi->adapter; 1908 struct link_config *lc = &pi->link_cfg; 1909 int link_ok, linkdnrc; 1910 enum fw_port_type port_type; 1911 enum fw_port_module_type mod_type; 1912 unsigned int speed, fc, fec; 1913 fw_port_cap32_t pcaps, acaps, lpacaps, linkattr; 1914 1915 /* Extract the various fields from the Port Information message. */ 1916 switch (action) { 1917 case FW_PORT_ACTION_GET_PORT_INFO: { 1918 u32 lstatus = be32_to_cpu(cmd->u.info.lstatus_to_modtype); 1919 1920 link_ok = (lstatus & FW_PORT_CMD_LSTATUS_F) != 0; 1921 linkdnrc = FW_PORT_CMD_LINKDNRC_G(lstatus); 1922 port_type = FW_PORT_CMD_PTYPE_G(lstatus); 1923 mod_type = FW_PORT_CMD_MODTYPE_G(lstatus); 1924 pcaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.pcap)); 1925 acaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.acap)); 1926 lpacaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.lpacap)); 1927 1928 /* Unfortunately the format of the Link Status in the old 1929 * 16-bit Port Information message isn't the same as the 1930 * 16-bit Port Capabilities bitfield used everywhere else ... 1931 */ 1932 linkattr = 0; 1933 if (lstatus & FW_PORT_CMD_RXPAUSE_F) 1934 linkattr |= FW_PORT_CAP32_FC_RX; 1935 if (lstatus & FW_PORT_CMD_TXPAUSE_F) 1936 linkattr |= FW_PORT_CAP32_FC_TX; 1937 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) 1938 linkattr |= FW_PORT_CAP32_SPEED_100M; 1939 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) 1940 linkattr |= FW_PORT_CAP32_SPEED_1G; 1941 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) 1942 linkattr |= FW_PORT_CAP32_SPEED_10G; 1943 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G)) 1944 linkattr |= FW_PORT_CAP32_SPEED_25G; 1945 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) 1946 linkattr |= FW_PORT_CAP32_SPEED_40G; 1947 if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G)) 1948 linkattr |= FW_PORT_CAP32_SPEED_100G; 1949 1950 break; 1951 } 1952 1953 case FW_PORT_ACTION_GET_PORT_INFO32: { 1954 u32 lstatus32; 1955 1956 lstatus32 = be32_to_cpu(cmd->u.info32.lstatus32_to_cbllen32); 1957 link_ok = (lstatus32 & FW_PORT_CMD_LSTATUS32_F) != 0; 1958 linkdnrc = FW_PORT_CMD_LINKDNRC32_G(lstatus32); 1959 port_type = FW_PORT_CMD_PORTTYPE32_G(lstatus32); 1960 mod_type = FW_PORT_CMD_MODTYPE32_G(lstatus32); 1961 pcaps = be32_to_cpu(cmd->u.info32.pcaps32); 1962 acaps = be32_to_cpu(cmd->u.info32.acaps32); 1963 lpacaps = be32_to_cpu(cmd->u.info32.lpacaps32); 1964 linkattr = be32_to_cpu(cmd->u.info32.linkattr32); 1965 break; 1966 } 1967 1968 default: 1969 dev_err(adapter->pdev_dev, "Handle Port Information: Bad Command/Action %#x\n", 1970 be32_to_cpu(cmd->action_to_len16)); 1971 return; 1972 } 1973 1974 fec = fwcap_to_cc_fec(acaps); 1975 fc = fwcap_to_cc_pause(linkattr); 1976 speed = fwcap_to_speed(linkattr); 1977 1978 if (mod_type != pi->mod_type) { 1979 /* When a new Transceiver Module is inserted, the Firmware 1980 * will examine any Forward Error Correction parameters 1981 * present in the Transceiver Module i2c EPROM and determine 1982 * the supported and recommended FEC settings from those 1983 * based on IEEE 802.3 standards. We always record the 1984 * IEEE 802.3 recommended "automatic" settings. 1985 */ 1986 lc->auto_fec = fec; 1987 1988 /* Some versions of the early T6 Firmware "cheated" when 1989 * handling different Transceiver Modules by changing the 1990 * underlaying Port Type reported to the Host Drivers. As 1991 * such we need to capture whatever Port Type the Firmware 1992 * sends us and record it in case it's different from what we 1993 * were told earlier. Unfortunately, since Firmware is 1994 * forever, we'll need to keep this code here forever, but in 1995 * later T6 Firmware it should just be an assignment of the 1996 * same value already recorded. 1997 */ 1998 pi->port_type = port_type; 1999 2000 pi->mod_type = mod_type; 2001 t4vf_os_portmod_changed(adapter, pi->pidx); 2002 } 2003 2004 if (link_ok != lc->link_ok || speed != lc->speed || 2005 fc != lc->fc || fec != lc->fec) { /* something changed */ 2006 if (!link_ok && lc->link_ok) { 2007 lc->link_down_rc = linkdnrc; 2008 dev_warn(adapter->pdev_dev, "Port %d link down, reason: %s\n", 2009 pi->port_id, t4vf_link_down_rc_str(linkdnrc)); 2010 } 2011 lc->link_ok = link_ok; 2012 lc->speed = speed; 2013 lc->fc = fc; 2014 lc->fec = fec; 2015 2016 lc->pcaps = pcaps; 2017 lc->lpacaps = lpacaps; 2018 lc->acaps = acaps & ADVERT_MASK; 2019 2020 /* If we're not physically capable of Auto-Negotiation, note 2021 * this as Auto-Negotiation disabled. Otherwise, we track 2022 * what Auto-Negotiation settings we have. Note parallel 2023 * structure in init_link_config(). 2024 */ 2025 if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) { 2026 lc->autoneg = AUTONEG_DISABLE; 2027 } else if (lc->acaps & FW_PORT_CAP32_ANEG) { 2028 lc->autoneg = AUTONEG_ENABLE; 2029 } else { 2030 /* When Autoneg is disabled, user needs to set 2031 * single speed. 2032 * Similar to cxgb4_ethtool.c: set_link_ksettings 2033 */ 2034 lc->acaps = 0; 2035 lc->speed_caps = fwcap_to_speed(acaps); 2036 lc->autoneg = AUTONEG_DISABLE; 2037 } 2038 2039 t4vf_os_link_changed(adapter, pi->pidx, link_ok); 2040 } 2041 } 2042 2043 /** 2044 * t4vf_update_port_info - retrieve and update port information if changed 2045 * @pi: the port_info 2046 * 2047 * We issue a Get Port Information Command to the Firmware and, if 2048 * successful, we check to see if anything is different from what we 2049 * last recorded and update things accordingly. 2050 */ 2051 int t4vf_update_port_info(struct port_info *pi) 2052 { 2053 unsigned int fw_caps = pi->adapter->params.fw_caps_support; 2054 struct fw_port_cmd port_cmd; 2055 int ret; 2056 2057 memset(&port_cmd, 0, sizeof(port_cmd)); 2058 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 2059 FW_CMD_REQUEST_F | FW_CMD_READ_F | 2060 FW_PORT_CMD_PORTID_V(pi->port_id)); 2061 port_cmd.action_to_len16 = cpu_to_be32( 2062 FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16 2063 ? FW_PORT_ACTION_GET_PORT_INFO 2064 : FW_PORT_ACTION_GET_PORT_INFO32) | 2065 FW_LEN16(port_cmd)); 2066 ret = t4vf_wr_mbox(pi->adapter, &port_cmd, sizeof(port_cmd), 2067 &port_cmd); 2068 if (ret) 2069 return ret; 2070 t4vf_handle_get_port_info(pi, &port_cmd); 2071 return 0; 2072 } 2073 2074 /** 2075 * t4vf_handle_fw_rpl - process a firmware reply message 2076 * @adapter: the adapter 2077 * @rpl: start of the firmware message 2078 * 2079 * Processes a firmware message, such as link state change messages. 2080 */ 2081 int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) 2082 { 2083 const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; 2084 u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); 2085 2086 switch (opcode) { 2087 case FW_PORT_CMD: { 2088 /* 2089 * Link/module state change message. 2090 */ 2091 const struct fw_port_cmd *port_cmd = 2092 (const struct fw_port_cmd *)rpl; 2093 int action = FW_PORT_CMD_ACTION_G( 2094 be32_to_cpu(port_cmd->action_to_len16)); 2095 int port_id, pidx; 2096 2097 if (action != FW_PORT_ACTION_GET_PORT_INFO && 2098 action != FW_PORT_ACTION_GET_PORT_INFO32) { 2099 dev_err(adapter->pdev_dev, 2100 "Unknown firmware PORT reply action %x\n", 2101 action); 2102 break; 2103 } 2104 2105 port_id = FW_PORT_CMD_PORTID_G( 2106 be32_to_cpu(port_cmd->op_to_portid)); 2107 for_each_port(adapter, pidx) { 2108 struct port_info *pi = adap2pinfo(adapter, pidx); 2109 2110 if (pi->port_id != port_id) 2111 continue; 2112 t4vf_handle_get_port_info(pi, port_cmd); 2113 } 2114 break; 2115 } 2116 2117 default: 2118 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", 2119 opcode); 2120 } 2121 return 0; 2122 } 2123 2124 /** 2125 */ 2126 int t4vf_prep_adapter(struct adapter *adapter) 2127 { 2128 int err; 2129 unsigned int chipid; 2130 2131 /* Wait for the device to become ready before proceeding ... 2132 */ 2133 err = t4vf_wait_dev_ready(adapter); 2134 if (err) 2135 return err; 2136 2137 /* Default port and clock for debugging in case we can't reach 2138 * firmware. 2139 */ 2140 adapter->params.nports = 1; 2141 adapter->params.vfres.pmask = 1; 2142 adapter->params.vpd.cclk = 50000; 2143 2144 adapter->params.chip = 0; 2145 switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { 2146 case CHELSIO_T4: 2147 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); 2148 adapter->params.arch.sge_fl_db = DBPRIO_F; 2149 adapter->params.arch.mps_tcam_size = 2150 NUM_MPS_CLS_SRAM_L_INSTANCES; 2151 break; 2152 2153 case CHELSIO_T5: 2154 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 2155 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); 2156 adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F; 2157 adapter->params.arch.mps_tcam_size = 2158 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 2159 break; 2160 2161 case CHELSIO_T6: 2162 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 2163 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid); 2164 adapter->params.arch.sge_fl_db = 0; 2165 adapter->params.arch.mps_tcam_size = 2166 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 2167 break; 2168 } 2169 2170 return 0; 2171 } 2172 2173 /** 2174 * t4vf_get_vf_mac_acl - Get the MAC address to be set to 2175 * the VI of this VF. 2176 * @adapter: The adapter 2177 * @pf: The pf associated with vf 2178 * @naddr: the number of ACL MAC addresses returned in addr 2179 * @addr: Placeholder for MAC addresses 2180 * 2181 * Find the MAC address to be set to the VF's VI. The requested MAC address 2182 * is from the host OS via callback in the PF driver. 2183 */ 2184 int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int pf, 2185 unsigned int *naddr, u8 *addr) 2186 { 2187 struct fw_acl_mac_cmd cmd; 2188 int ret; 2189 2190 memset(&cmd, 0, sizeof(cmd)); 2191 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_ACL_MAC_CMD) | 2192 FW_CMD_REQUEST_F | 2193 FW_CMD_READ_F); 2194 cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd)); 2195 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &cmd); 2196 if (ret) 2197 return ret; 2198 2199 if (cmd.nmac < *naddr) 2200 *naddr = cmd.nmac; 2201 2202 switch (pf) { 2203 case 3: 2204 memcpy(addr, cmd.macaddr3, sizeof(cmd.macaddr3)); 2205 break; 2206 case 2: 2207 memcpy(addr, cmd.macaddr2, sizeof(cmd.macaddr2)); 2208 break; 2209 case 1: 2210 memcpy(addr, cmd.macaddr1, sizeof(cmd.macaddr1)); 2211 break; 2212 case 0: 2213 memcpy(addr, cmd.macaddr0, sizeof(cmd.macaddr0)); 2214 break; 2215 } 2216 2217 return ret; 2218 } 2219 2220 /** 2221 * t4vf_get_vf_vlan_acl - Get the VLAN ID to be set to 2222 * the VI of this VF. 2223 * @adapter: The adapter 2224 * 2225 * Find the VLAN ID to be set to the VF's VI. The requested VLAN ID 2226 * is from the host OS via callback in the PF driver. 2227 */ 2228 int t4vf_get_vf_vlan_acl(struct adapter *adapter) 2229 { 2230 struct fw_acl_vlan_cmd cmd; 2231 int vlan = 0; 2232 int ret = 0; 2233 2234 cmd.op_to_vfn = htonl(FW_CMD_OP_V(FW_ACL_VLAN_CMD) | 2235 FW_CMD_REQUEST_F | FW_CMD_READ_F); 2236 2237 /* Note: Do not enable the ACL */ 2238 cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd)); 2239 2240 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &cmd); 2241 2242 if (!ret) 2243 vlan = be16_to_cpu(cmd.vlanid[0]); 2244 2245 return vlan; 2246 } 2247