1 /* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36 #include <linux/pci.h> 37 38 #include "t4vf_common.h" 39 #include "t4vf_defs.h" 40 41 #include "../cxgb4/t4_regs.h" 42 #include "../cxgb4/t4_values.h" 43 #include "../cxgb4/t4fw_api.h" 44 45 /* 46 * Wait for the device to become ready (signified by our "who am I" register 47 * returning a value other than all 1's). Return an error if it doesn't 48 * become ready ... 49 */ 50 int t4vf_wait_dev_ready(struct adapter *adapter) 51 { 52 const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; 53 const u32 notready1 = 0xffffffff; 54 const u32 notready2 = 0xeeeeeeee; 55 u32 val; 56 57 val = t4_read_reg(adapter, whoami); 58 if (val != notready1 && val != notready2) 59 return 0; 60 msleep(500); 61 val = t4_read_reg(adapter, whoami); 62 if (val != notready1 && val != notready2) 63 return 0; 64 else 65 return -EIO; 66 } 67 68 /* 69 * Get the reply to a mailbox command and store it in @rpl in big-endian order 70 * (since the firmware data structures are specified in a big-endian layout). 71 */ 72 static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, 73 u32 mbox_data) 74 { 75 for ( ; size; size -= 8, mbox_data += 8) 76 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); 77 } 78 79 /** 80 * t4vf_record_mbox - record a Firmware Mailbox Command/Reply in the log 81 * @adapter: the adapter 82 * @cmd: the Firmware Mailbox Command or Reply 83 * @size: command length in bytes 84 * @access: the time (ms) needed to access the Firmware Mailbox 85 * @execute: the time (ms) the command spent being executed 86 */ 87 static void t4vf_record_mbox(struct adapter *adapter, const __be64 *cmd, 88 int size, int access, int execute) 89 { 90 struct mbox_cmd_log *log = adapter->mbox_log; 91 struct mbox_cmd *entry; 92 int i; 93 94 entry = mbox_cmd_log_entry(log, log->cursor++); 95 if (log->cursor == log->size) 96 log->cursor = 0; 97 98 for (i = 0; i < size / 8; i++) 99 entry->cmd[i] = be64_to_cpu(cmd[i]); 100 while (i < MBOX_LEN / 8) 101 entry->cmd[i++] = 0; 102 entry->timestamp = jiffies; 103 entry->seqno = log->seqno++; 104 entry->access = access; 105 entry->execute = execute; 106 } 107 108 /** 109 * t4vf_wr_mbox_core - send a command to FW through the mailbox 110 * @adapter: the adapter 111 * @cmd: the command to write 112 * @size: command length in bytes 113 * @rpl: where to optionally store the reply 114 * @sleep_ok: if true we may sleep while awaiting command completion 115 * 116 * Sends the given command to FW through the mailbox and waits for the 117 * FW to execute the command. If @rpl is not %NULL it is used to store 118 * the FW's reply to the command. The command and its optional reply 119 * are of the same length. FW can take up to 500 ms to respond. 120 * @sleep_ok determines whether we may sleep while awaiting the response. 121 * If sleeping is allowed we use progressive backoff otherwise we spin. 122 * 123 * The return value is 0 on success or a negative errno on failure. A 124 * failure can happen either because we are not able to execute the 125 * command or FW executes it but signals an error. In the latter case 126 * the return value is the error code indicated by FW (negated). 127 */ 128 int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 129 void *rpl, bool sleep_ok) 130 { 131 static const int delay[] = { 132 1, 1, 3, 5, 10, 10, 20, 50, 100 133 }; 134 135 u16 access = 0, execute = 0; 136 u32 v, mbox_data; 137 int i, ms, delay_idx, ret; 138 const __be64 *p; 139 u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; 140 u32 cmd_op = FW_CMD_OP_G(be32_to_cpu(((struct fw_cmd_hdr *)cmd)->hi)); 141 __be64 cmd_rpl[MBOX_LEN / 8]; 142 143 /* In T6, mailbox size is changed to 128 bytes to avoid 144 * invalidating the entire prefetch buffer. 145 */ 146 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 147 mbox_data = T4VF_MBDATA_BASE_ADDR; 148 else 149 mbox_data = T6VF_MBDATA_BASE_ADDR; 150 151 /* 152 * Commands must be multiples of 16 bytes in length and may not be 153 * larger than the size of the Mailbox Data register array. 154 */ 155 if ((size % 16) != 0 || 156 size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) 157 return -EINVAL; 158 159 /* 160 * Loop trying to get ownership of the mailbox. Return an error 161 * if we can't gain ownership. 162 */ 163 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 164 for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) 165 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 166 if (v != MBOX_OWNER_DRV) { 167 ret = (v == MBOX_OWNER_FW) ? -EBUSY : -ETIMEDOUT; 168 t4vf_record_mbox(adapter, cmd, size, access, ret); 169 return ret; 170 } 171 172 /* 173 * Write the command array into the Mailbox Data register array and 174 * transfer ownership of the mailbox to the firmware. 175 * 176 * For the VFs, the Mailbox Data "registers" are actually backed by 177 * T4's "MA" interface rather than PL Registers (as is the case for 178 * the PFs). Because these are in different coherency domains, the 179 * write to the VF's PL-register-backed Mailbox Control can race in 180 * front of the writes to the MA-backed VF Mailbox Data "registers". 181 * So we need to do a read-back on at least one byte of the VF Mailbox 182 * Data registers before doing the write to the VF Mailbox Control 183 * register. 184 */ 185 if (cmd_op != FW_VI_STATS_CMD) 186 t4vf_record_mbox(adapter, cmd, size, access, 0); 187 for (i = 0, p = cmd; i < size; i += 8) 188 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); 189 t4_read_reg(adapter, mbox_data); /* flush write */ 190 191 t4_write_reg(adapter, mbox_ctl, 192 MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); 193 t4_read_reg(adapter, mbox_ctl); /* flush write */ 194 195 /* 196 * Spin waiting for firmware to acknowledge processing our command. 197 */ 198 delay_idx = 0; 199 ms = delay[0]; 200 201 for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { 202 if (sleep_ok) { 203 ms = delay[delay_idx]; 204 if (delay_idx < ARRAY_SIZE(delay) - 1) 205 delay_idx++; 206 msleep(ms); 207 } else 208 mdelay(ms); 209 210 /* 211 * If we're the owner, see if this is the reply we wanted. 212 */ 213 v = t4_read_reg(adapter, mbox_ctl); 214 if (MBOWNER_G(v) == MBOX_OWNER_DRV) { 215 /* 216 * If the Message Valid bit isn't on, revoke ownership 217 * of the mailbox and continue waiting for our reply. 218 */ 219 if ((v & MBMSGVALID_F) == 0) { 220 t4_write_reg(adapter, mbox_ctl, 221 MBOWNER_V(MBOX_OWNER_NONE)); 222 continue; 223 } 224 225 /* 226 * We now have our reply. Extract the command return 227 * value, copy the reply back to our caller's buffer 228 * (if specified) and revoke ownership of the mailbox. 229 * We return the (negated) firmware command return 230 * code (this depends on FW_SUCCESS == 0). 231 */ 232 get_mbox_rpl(adapter, cmd_rpl, size, mbox_data); 233 234 /* return value in low-order little-endian word */ 235 v = be64_to_cpu(cmd_rpl[0]); 236 237 if (rpl) { 238 /* request bit in high-order BE word */ 239 WARN_ON((be32_to_cpu(*(const __be32 *)cmd) 240 & FW_CMD_REQUEST_F) == 0); 241 memcpy(rpl, cmd_rpl, size); 242 WARN_ON((be32_to_cpu(*(__be32 *)rpl) 243 & FW_CMD_REQUEST_F) != 0); 244 } 245 t4_write_reg(adapter, mbox_ctl, 246 MBOWNER_V(MBOX_OWNER_NONE)); 247 execute = i + ms; 248 if (cmd_op != FW_VI_STATS_CMD) 249 t4vf_record_mbox(adapter, cmd_rpl, size, access, 250 execute); 251 return -FW_CMD_RETVAL_G(v); 252 } 253 } 254 255 /* We timed out. Return the error ... */ 256 ret = -ETIMEDOUT; 257 t4vf_record_mbox(adapter, cmd, size, access, ret); 258 return ret; 259 } 260 261 #define ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\ 262 FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G | \ 263 FW_PORT_CAP_SPEED_100G | FW_PORT_CAP_ANEG) 264 265 /** 266 * init_link_config - initialize a link's SW state 267 * @lc: structure holding the link state 268 * @caps: link capabilities 269 * 270 * Initializes the SW state maintained for each link, including the link's 271 * capabilities and default speed/flow-control/autonegotiation settings. 272 */ 273 static void init_link_config(struct link_config *lc, unsigned int caps) 274 { 275 lc->supported = caps; 276 lc->requested_speed = 0; 277 lc->speed = 0; 278 lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; 279 if (lc->supported & FW_PORT_CAP_ANEG) { 280 lc->advertising = lc->supported & ADVERT_MASK; 281 lc->autoneg = AUTONEG_ENABLE; 282 lc->requested_fc |= PAUSE_AUTONEG; 283 } else { 284 lc->advertising = 0; 285 lc->autoneg = AUTONEG_DISABLE; 286 } 287 } 288 289 /** 290 * t4vf_port_init - initialize port hardware/software state 291 * @adapter: the adapter 292 * @pidx: the adapter port index 293 */ 294 int t4vf_port_init(struct adapter *adapter, int pidx) 295 { 296 struct port_info *pi = adap2pinfo(adapter, pidx); 297 struct fw_vi_cmd vi_cmd, vi_rpl; 298 struct fw_port_cmd port_cmd, port_rpl; 299 int v; 300 301 /* 302 * Execute a VI Read command to get our Virtual Interface information 303 * like MAC address, etc. 304 */ 305 memset(&vi_cmd, 0, sizeof(vi_cmd)); 306 vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 307 FW_CMD_REQUEST_F | 308 FW_CMD_READ_F); 309 vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); 310 vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); 311 v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); 312 if (v) 313 return v; 314 315 BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); 316 pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); 317 t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); 318 319 /* 320 * If we don't have read access to our port information, we're done 321 * now. Otherwise, execute a PORT Read command to get it ... 322 */ 323 if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) 324 return 0; 325 326 memset(&port_cmd, 0, sizeof(port_cmd)); 327 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 328 FW_CMD_REQUEST_F | 329 FW_CMD_READ_F | 330 FW_PORT_CMD_PORTID_V(pi->port_id)); 331 port_cmd.action_to_len16 = 332 cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) | 333 FW_LEN16(port_cmd)); 334 v = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); 335 if (v) 336 return v; 337 338 v = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype); 339 pi->mdio_addr = (v & FW_PORT_CMD_MDIOCAP_F) ? 340 FW_PORT_CMD_MDIOADDR_G(v) : -1; 341 pi->port_type = FW_PORT_CMD_PTYPE_G(v); 342 pi->mod_type = FW_PORT_MOD_TYPE_NA; 343 344 init_link_config(&pi->link_cfg, be16_to_cpu(port_rpl.u.info.pcap)); 345 346 return 0; 347 } 348 349 /** 350 * t4vf_fw_reset - issue a reset to FW 351 * @adapter: the adapter 352 * 353 * Issues a reset command to FW. For a Physical Function this would 354 * result in the Firmware resetting all of its state. For a Virtual 355 * Function this just resets the state associated with the VF. 356 */ 357 int t4vf_fw_reset(struct adapter *adapter) 358 { 359 struct fw_reset_cmd cmd; 360 361 memset(&cmd, 0, sizeof(cmd)); 362 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | 363 FW_CMD_WRITE_F); 364 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 365 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 366 } 367 368 /** 369 * t4vf_query_params - query FW or device parameters 370 * @adapter: the adapter 371 * @nparams: the number of parameters 372 * @params: the parameter names 373 * @vals: the parameter values 374 * 375 * Reads the values of firmware or device parameters. Up to 7 parameters 376 * can be queried at once. 377 */ 378 static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, 379 const u32 *params, u32 *vals) 380 { 381 int i, ret; 382 struct fw_params_cmd cmd, rpl; 383 struct fw_params_param *p; 384 size_t len16; 385 386 if (nparams > 7) 387 return -EINVAL; 388 389 memset(&cmd, 0, sizeof(cmd)); 390 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 391 FW_CMD_REQUEST_F | 392 FW_CMD_READ_F); 393 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 394 param[nparams].mnem), 16); 395 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 396 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) 397 p->mnem = htonl(*params++); 398 399 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 400 if (ret == 0) 401 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) 402 *vals++ = be32_to_cpu(p->val); 403 return ret; 404 } 405 406 /** 407 * t4vf_set_params - sets FW or device parameters 408 * @adapter: the adapter 409 * @nparams: the number of parameters 410 * @params: the parameter names 411 * @vals: the parameter values 412 * 413 * Sets the values of firmware or device parameters. Up to 7 parameters 414 * can be specified at once. 415 */ 416 int t4vf_set_params(struct adapter *adapter, unsigned int nparams, 417 const u32 *params, const u32 *vals) 418 { 419 int i; 420 struct fw_params_cmd cmd; 421 struct fw_params_param *p; 422 size_t len16; 423 424 if (nparams > 7) 425 return -EINVAL; 426 427 memset(&cmd, 0, sizeof(cmd)); 428 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 429 FW_CMD_REQUEST_F | 430 FW_CMD_WRITE_F); 431 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 432 param[nparams]), 16); 433 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 434 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { 435 p->mnem = cpu_to_be32(*params++); 436 p->val = cpu_to_be32(*vals++); 437 } 438 439 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 440 } 441 442 /** 443 * t4vf_fl_pkt_align - return the fl packet alignment 444 * @adapter: the adapter 445 * 446 * T4 has a single field to specify the packing and padding boundary. 447 * T5 onwards has separate fields for this and hence the alignment for 448 * next packet offset is maximum of these two. And T6 changes the 449 * Ingress Padding Boundary Shift, so it's all a mess and it's best 450 * if we put this in low-level Common Code ... 451 * 452 */ 453 int t4vf_fl_pkt_align(struct adapter *adapter) 454 { 455 u32 sge_control, sge_control2; 456 unsigned int ingpadboundary, ingpackboundary, fl_align, ingpad_shift; 457 458 sge_control = adapter->params.sge.sge_control; 459 460 /* T4 uses a single control field to specify both the PCIe Padding and 461 * Packing Boundary. T5 introduced the ability to specify these 462 * separately. The actual Ingress Packet Data alignment boundary 463 * within Packed Buffer Mode is the maximum of these two 464 * specifications. (Note that it makes no real practical sense to 465 * have the Pading Boudary be larger than the Packing Boundary but you 466 * could set the chip up that way and, in fact, legacy T4 code would 467 * end doing this because it would initialize the Padding Boundary and 468 * leave the Packing Boundary initialized to 0 (16 bytes).) 469 * Padding Boundary values in T6 starts from 8B, 470 * where as it is 32B for T4 and T5. 471 */ 472 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 473 ingpad_shift = INGPADBOUNDARY_SHIFT_X; 474 else 475 ingpad_shift = T6_INGPADBOUNDARY_SHIFT_X; 476 477 ingpadboundary = 1 << (INGPADBOUNDARY_G(sge_control) + ingpad_shift); 478 479 fl_align = ingpadboundary; 480 if (!is_t4(adapter->params.chip)) { 481 /* T5 has a different interpretation of one of the PCIe Packing 482 * Boundary values. 483 */ 484 sge_control2 = adapter->params.sge.sge_control2; 485 ingpackboundary = INGPACKBOUNDARY_G(sge_control2); 486 if (ingpackboundary == INGPACKBOUNDARY_16B_X) 487 ingpackboundary = 16; 488 else 489 ingpackboundary = 1 << (ingpackboundary + 490 INGPACKBOUNDARY_SHIFT_X); 491 492 fl_align = max(ingpadboundary, ingpackboundary); 493 } 494 return fl_align; 495 } 496 497 /** 498 * t4vf_bar2_sge_qregs - return BAR2 SGE Queue register information 499 * @adapter: the adapter 500 * @qid: the Queue ID 501 * @qtype: the Ingress or Egress type for @qid 502 * @pbar2_qoffset: BAR2 Queue Offset 503 * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues 504 * 505 * Returns the BAR2 SGE Queue Registers information associated with the 506 * indicated Absolute Queue ID. These are passed back in return value 507 * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue 508 * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. 509 * 510 * This may return an error which indicates that BAR2 SGE Queue 511 * registers aren't available. If an error is not returned, then the 512 * following values are returned: 513 * 514 * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers 515 * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid 516 * 517 * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which 518 * require the "Inferred Queue ID" ability may be used. E.g. the 519 * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, 520 * then these "Inferred Queue ID" register may not be used. 521 */ 522 int t4vf_bar2_sge_qregs(struct adapter *adapter, 523 unsigned int qid, 524 enum t4_bar2_qtype qtype, 525 u64 *pbar2_qoffset, 526 unsigned int *pbar2_qid) 527 { 528 unsigned int page_shift, page_size, qpp_shift, qpp_mask; 529 u64 bar2_page_offset, bar2_qoffset; 530 unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; 531 532 /* T4 doesn't support BAR2 SGE Queue registers. 533 */ 534 if (is_t4(adapter->params.chip)) 535 return -EINVAL; 536 537 /* Get our SGE Page Size parameters. 538 */ 539 page_shift = adapter->params.sge.sge_vf_hps + 10; 540 page_size = 1 << page_shift; 541 542 /* Get the right Queues per Page parameters for our Queue. 543 */ 544 qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS 545 ? adapter->params.sge.sge_vf_eq_qpp 546 : adapter->params.sge.sge_vf_iq_qpp); 547 qpp_mask = (1 << qpp_shift) - 1; 548 549 /* Calculate the basics of the BAR2 SGE Queue register area: 550 * o The BAR2 page the Queue registers will be in. 551 * o The BAR2 Queue ID. 552 * o The BAR2 Queue ID Offset into the BAR2 page. 553 */ 554 bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift); 555 bar2_qid = qid & qpp_mask; 556 bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; 557 558 /* If the BAR2 Queue ID Offset is less than the Page Size, then the 559 * hardware will infer the Absolute Queue ID simply from the writes to 560 * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a 561 * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply 562 * write to the first BAR2 SGE Queue Area within the BAR2 Page with 563 * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID 564 * from the BAR2 Page and BAR2 Queue ID. 565 * 566 * One important censequence of this is that some BAR2 SGE registers 567 * have a "Queue ID" field and we can write the BAR2 SGE Queue ID 568 * there. But other registers synthesize the SGE Queue ID purely 569 * from the writes to the registers -- the Write Combined Doorbell 570 * Buffer is a good example. These BAR2 SGE Registers are only 571 * available for those BAR2 SGE Register areas where the SGE Absolute 572 * Queue ID can be inferred from simple writes. 573 */ 574 bar2_qoffset = bar2_page_offset; 575 bar2_qinferred = (bar2_qid_offset < page_size); 576 if (bar2_qinferred) { 577 bar2_qoffset += bar2_qid_offset; 578 bar2_qid = 0; 579 } 580 581 *pbar2_qoffset = bar2_qoffset; 582 *pbar2_qid = bar2_qid; 583 return 0; 584 } 585 586 /** 587 * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters 588 * @adapter: the adapter 589 * 590 * Retrieves various core SGE parameters in the form of hardware SGE 591 * register values. The caller is responsible for decoding these as 592 * needed. The SGE parameters are stored in @adapter->params.sge. 593 */ 594 int t4vf_get_sge_params(struct adapter *adapter) 595 { 596 struct sge_params *sge_params = &adapter->params.sge; 597 u32 params[7], vals[7]; 598 int v; 599 600 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 601 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A)); 602 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 603 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A)); 604 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 605 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A)); 606 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 607 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A)); 608 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 609 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A)); 610 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 611 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A)); 612 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 613 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A)); 614 v = t4vf_query_params(adapter, 7, params, vals); 615 if (v) 616 return v; 617 sge_params->sge_control = vals[0]; 618 sge_params->sge_host_page_size = vals[1]; 619 sge_params->sge_fl_buffer_size[0] = vals[2]; 620 sge_params->sge_fl_buffer_size[1] = vals[3]; 621 sge_params->sge_timer_value_0_and_1 = vals[4]; 622 sge_params->sge_timer_value_2_and_3 = vals[5]; 623 sge_params->sge_timer_value_4_and_5 = vals[6]; 624 625 /* T4 uses a single control field to specify both the PCIe Padding and 626 * Packing Boundary. T5 introduced the ability to specify these 627 * separately with the Padding Boundary in SGE_CONTROL and and Packing 628 * Boundary in SGE_CONTROL2. So for T5 and later we need to grab 629 * SGE_CONTROL in order to determine how ingress packet data will be 630 * laid out in Packed Buffer Mode. Unfortunately, older versions of 631 * the firmware won't let us retrieve SGE_CONTROL2 so if we get a 632 * failure grabbing it we throw an error since we can't figure out the 633 * right value. 634 */ 635 if (!is_t4(adapter->params.chip)) { 636 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 637 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); 638 v = t4vf_query_params(adapter, 1, params, vals); 639 if (v != FW_SUCCESS) { 640 dev_err(adapter->pdev_dev, 641 "Unable to get SGE Control2; " 642 "probably old firmware.\n"); 643 return v; 644 } 645 sge_params->sge_control2 = vals[0]; 646 } 647 648 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 649 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A)); 650 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 651 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A)); 652 v = t4vf_query_params(adapter, 2, params, vals); 653 if (v) 654 return v; 655 sge_params->sge_ingress_rx_threshold = vals[0]; 656 sge_params->sge_congestion_control = vals[1]; 657 658 /* For T5 and later we want to use the new BAR2 Doorbells. 659 * Unfortunately, older firmware didn't allow the this register to be 660 * read. 661 */ 662 if (!is_t4(adapter->params.chip)) { 663 u32 whoami; 664 unsigned int pf, s_hps, s_qpp; 665 666 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 667 FW_PARAMS_PARAM_XYZ_V( 668 SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); 669 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 670 FW_PARAMS_PARAM_XYZ_V( 671 SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); 672 v = t4vf_query_params(adapter, 2, params, vals); 673 if (v != FW_SUCCESS) { 674 dev_warn(adapter->pdev_dev, 675 "Unable to get VF SGE Queues/Page; " 676 "probably old firmware.\n"); 677 return v; 678 } 679 sge_params->sge_egress_queues_per_page = vals[0]; 680 sge_params->sge_ingress_queues_per_page = vals[1]; 681 682 /* We need the Queues/Page for our VF. This is based on the 683 * PF from which we're instantiated and is indexed in the 684 * register we just read. Do it once here so other code in 685 * the driver can just use it. 686 */ 687 whoami = t4_read_reg(adapter, 688 T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A); 689 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? 690 SOURCEPF_G(whoami) : T6_SOURCEPF_G(whoami); 691 692 s_hps = (HOSTPAGESIZEPF0_S + 693 (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); 694 sge_params->sge_vf_hps = 695 ((sge_params->sge_host_page_size >> s_hps) 696 & HOSTPAGESIZEPF0_M); 697 698 s_qpp = (QUEUESPERPAGEPF0_S + 699 (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); 700 sge_params->sge_vf_eq_qpp = 701 ((sge_params->sge_egress_queues_per_page >> s_qpp) 702 & QUEUESPERPAGEPF0_M); 703 sge_params->sge_vf_iq_qpp = 704 ((sge_params->sge_ingress_queues_per_page >> s_qpp) 705 & QUEUESPERPAGEPF0_M); 706 } 707 708 return 0; 709 } 710 711 /** 712 * t4vf_get_vpd_params - retrieve device VPD paremeters 713 * @adapter: the adapter 714 * 715 * Retrives various device Vital Product Data parameters. The parameters 716 * are stored in @adapter->params.vpd. 717 */ 718 int t4vf_get_vpd_params(struct adapter *adapter) 719 { 720 struct vpd_params *vpd_params = &adapter->params.vpd; 721 u32 params[7], vals[7]; 722 int v; 723 724 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 725 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); 726 v = t4vf_query_params(adapter, 1, params, vals); 727 if (v) 728 return v; 729 vpd_params->cclk = vals[0]; 730 731 return 0; 732 } 733 734 /** 735 * t4vf_get_dev_params - retrieve device paremeters 736 * @adapter: the adapter 737 * 738 * Retrives various device parameters. The parameters are stored in 739 * @adapter->params.dev. 740 */ 741 int t4vf_get_dev_params(struct adapter *adapter) 742 { 743 struct dev_params *dev_params = &adapter->params.dev; 744 u32 params[7], vals[7]; 745 int v; 746 747 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 748 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); 749 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 750 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); 751 v = t4vf_query_params(adapter, 2, params, vals); 752 if (v) 753 return v; 754 dev_params->fwrev = vals[0]; 755 dev_params->tprev = vals[1]; 756 757 return 0; 758 } 759 760 /** 761 * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration 762 * @adapter: the adapter 763 * 764 * Retrieves global RSS mode and parameters with which we have to live 765 * and stores them in the @adapter's RSS parameters. 766 */ 767 int t4vf_get_rss_glb_config(struct adapter *adapter) 768 { 769 struct rss_params *rss = &adapter->params.rss; 770 struct fw_rss_glb_config_cmd cmd, rpl; 771 int v; 772 773 /* 774 * Execute an RSS Global Configuration read command to retrieve 775 * our RSS configuration. 776 */ 777 memset(&cmd, 0, sizeof(cmd)); 778 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | 779 FW_CMD_REQUEST_F | 780 FW_CMD_READ_F); 781 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 782 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 783 if (v) 784 return v; 785 786 /* 787 * Transate the big-endian RSS Global Configuration into our 788 * cpu-endian format based on the RSS mode. We also do first level 789 * filtering at this point to weed out modes which don't support 790 * VF Drivers ... 791 */ 792 rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( 793 be32_to_cpu(rpl.u.manual.mode_pkd)); 794 switch (rss->mode) { 795 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 796 u32 word = be32_to_cpu( 797 rpl.u.basicvirtual.synmapen_to_hashtoeplitz); 798 799 rss->u.basicvirtual.synmapen = 800 ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); 801 rss->u.basicvirtual.syn4tupenipv6 = 802 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); 803 rss->u.basicvirtual.syn2tupenipv6 = 804 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); 805 rss->u.basicvirtual.syn4tupenipv4 = 806 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); 807 rss->u.basicvirtual.syn2tupenipv4 = 808 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); 809 810 rss->u.basicvirtual.ofdmapen = 811 ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); 812 813 rss->u.basicvirtual.tnlmapen = 814 ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); 815 rss->u.basicvirtual.tnlalllookup = 816 ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); 817 818 rss->u.basicvirtual.hashtoeplitz = 819 ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); 820 821 /* we need at least Tunnel Map Enable to be set */ 822 if (!rss->u.basicvirtual.tnlmapen) 823 return -EINVAL; 824 break; 825 } 826 827 default: 828 /* all unknown/unsupported RSS modes result in an error */ 829 return -EINVAL; 830 } 831 832 return 0; 833 } 834 835 /** 836 * t4vf_get_vfres - retrieve VF resource limits 837 * @adapter: the adapter 838 * 839 * Retrieves configured resource limits and capabilities for a virtual 840 * function. The results are stored in @adapter->vfres. 841 */ 842 int t4vf_get_vfres(struct adapter *adapter) 843 { 844 struct vf_resources *vfres = &adapter->params.vfres; 845 struct fw_pfvf_cmd cmd, rpl; 846 int v; 847 u32 word; 848 849 /* 850 * Execute PFVF Read command to get VF resource limits; bail out early 851 * with error on command failure. 852 */ 853 memset(&cmd, 0, sizeof(cmd)); 854 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | 855 FW_CMD_REQUEST_F | 856 FW_CMD_READ_F); 857 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 858 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 859 if (v) 860 return v; 861 862 /* 863 * Extract VF resource limits and return success. 864 */ 865 word = be32_to_cpu(rpl.niqflint_niq); 866 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); 867 vfres->niq = FW_PFVF_CMD_NIQ_G(word); 868 869 word = be32_to_cpu(rpl.type_to_neq); 870 vfres->neq = FW_PFVF_CMD_NEQ_G(word); 871 vfres->pmask = FW_PFVF_CMD_PMASK_G(word); 872 873 word = be32_to_cpu(rpl.tc_to_nexactf); 874 vfres->tc = FW_PFVF_CMD_TC_G(word); 875 vfres->nvi = FW_PFVF_CMD_NVI_G(word); 876 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); 877 878 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 879 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); 880 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); 881 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); 882 883 return 0; 884 } 885 886 /** 887 * t4vf_read_rss_vi_config - read a VI's RSS configuration 888 * @adapter: the adapter 889 * @viid: Virtual Interface ID 890 * @config: pointer to host-native VI RSS Configuration buffer 891 * 892 * Reads the Virtual Interface's RSS configuration information and 893 * translates it into CPU-native format. 894 */ 895 int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, 896 union rss_vi_config *config) 897 { 898 struct fw_rss_vi_config_cmd cmd, rpl; 899 int v; 900 901 memset(&cmd, 0, sizeof(cmd)); 902 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 903 FW_CMD_REQUEST_F | 904 FW_CMD_READ_F | 905 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 906 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 907 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 908 if (v) 909 return v; 910 911 switch (adapter->params.rss.mode) { 912 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 913 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); 914 915 config->basicvirtual.ip6fourtupen = 916 ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); 917 config->basicvirtual.ip6twotupen = 918 ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); 919 config->basicvirtual.ip4fourtupen = 920 ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); 921 config->basicvirtual.ip4twotupen = 922 ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); 923 config->basicvirtual.udpen = 924 ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); 925 config->basicvirtual.defaultq = 926 FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); 927 break; 928 } 929 930 default: 931 return -EINVAL; 932 } 933 934 return 0; 935 } 936 937 /** 938 * t4vf_write_rss_vi_config - write a VI's RSS configuration 939 * @adapter: the adapter 940 * @viid: Virtual Interface ID 941 * @config: pointer to host-native VI RSS Configuration buffer 942 * 943 * Write the Virtual Interface's RSS configuration information 944 * (translating it into firmware-native format before writing). 945 */ 946 int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, 947 union rss_vi_config *config) 948 { 949 struct fw_rss_vi_config_cmd cmd, rpl; 950 951 memset(&cmd, 0, sizeof(cmd)); 952 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 953 FW_CMD_REQUEST_F | 954 FW_CMD_WRITE_F | 955 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 956 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 957 switch (adapter->params.rss.mode) { 958 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 959 u32 word = 0; 960 961 if (config->basicvirtual.ip6fourtupen) 962 word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; 963 if (config->basicvirtual.ip6twotupen) 964 word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; 965 if (config->basicvirtual.ip4fourtupen) 966 word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; 967 if (config->basicvirtual.ip4twotupen) 968 word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; 969 if (config->basicvirtual.udpen) 970 word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; 971 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( 972 config->basicvirtual.defaultq); 973 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); 974 break; 975 } 976 977 default: 978 return -EINVAL; 979 } 980 981 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 982 } 983 984 /** 985 * t4vf_config_rss_range - configure a portion of the RSS mapping table 986 * @adapter: the adapter 987 * @viid: Virtual Interface of RSS Table Slice 988 * @start: starting entry in the table to write 989 * @n: how many table entries to write 990 * @rspq: values for the "Response Queue" (Ingress Queue) lookup table 991 * @nrspq: number of values in @rspq 992 * 993 * Programs the selected part of the VI's RSS mapping table with the 994 * provided values. If @nrspq < @n the supplied values are used repeatedly 995 * until the full table range is populated. 996 * 997 * The caller must ensure the values in @rspq are in the range 0..1023. 998 */ 999 int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, 1000 int start, int n, const u16 *rspq, int nrspq) 1001 { 1002 const u16 *rsp = rspq; 1003 const u16 *rsp_end = rspq+nrspq; 1004 struct fw_rss_ind_tbl_cmd cmd; 1005 1006 /* 1007 * Initialize firmware command template to write the RSS table. 1008 */ 1009 memset(&cmd, 0, sizeof(cmd)); 1010 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | 1011 FW_CMD_REQUEST_F | 1012 FW_CMD_WRITE_F | 1013 FW_RSS_IND_TBL_CMD_VIID_V(viid)); 1014 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1015 1016 /* 1017 * Each firmware RSS command can accommodate up to 32 RSS Ingress 1018 * Queue Identifiers. These Ingress Queue IDs are packed three to 1019 * a 32-bit word as 10-bit values with the upper remaining 2 bits 1020 * reserved. 1021 */ 1022 while (n > 0) { 1023 __be32 *qp = &cmd.iq0_to_iq2; 1024 int nq = min(n, 32); 1025 int ret; 1026 1027 /* 1028 * Set up the firmware RSS command header to send the next 1029 * "nq" Ingress Queue IDs to the firmware. 1030 */ 1031 cmd.niqid = cpu_to_be16(nq); 1032 cmd.startidx = cpu_to_be16(start); 1033 1034 /* 1035 * "nq" more done for the start of the next loop. 1036 */ 1037 start += nq; 1038 n -= nq; 1039 1040 /* 1041 * While there are still Ingress Queue IDs to stuff into the 1042 * current firmware RSS command, retrieve them from the 1043 * Ingress Queue ID array and insert them into the command. 1044 */ 1045 while (nq > 0) { 1046 /* 1047 * Grab up to the next 3 Ingress Queue IDs (wrapping 1048 * around the Ingress Queue ID array if necessary) and 1049 * insert them into the firmware RSS command at the 1050 * current 3-tuple position within the commad. 1051 */ 1052 u16 qbuf[3]; 1053 u16 *qbp = qbuf; 1054 int nqbuf = min(3, nq); 1055 1056 nq -= nqbuf; 1057 qbuf[0] = qbuf[1] = qbuf[2] = 0; 1058 while (nqbuf) { 1059 nqbuf--; 1060 *qbp++ = *rsp++; 1061 if (rsp >= rsp_end) 1062 rsp = rspq; 1063 } 1064 *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | 1065 FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | 1066 FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); 1067 } 1068 1069 /* 1070 * Send this portion of the RRS table update to the firmware; 1071 * bail out on any errors. 1072 */ 1073 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1074 if (ret) 1075 return ret; 1076 } 1077 return 0; 1078 } 1079 1080 /** 1081 * t4vf_alloc_vi - allocate a virtual interface on a port 1082 * @adapter: the adapter 1083 * @port_id: physical port associated with the VI 1084 * 1085 * Allocate a new Virtual Interface and bind it to the indicated 1086 * physical port. Return the new Virtual Interface Identifier on 1087 * success, or a [negative] error number on failure. 1088 */ 1089 int t4vf_alloc_vi(struct adapter *adapter, int port_id) 1090 { 1091 struct fw_vi_cmd cmd, rpl; 1092 int v; 1093 1094 /* 1095 * Execute a VI command to allocate Virtual Interface and return its 1096 * VIID. 1097 */ 1098 memset(&cmd, 0, sizeof(cmd)); 1099 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1100 FW_CMD_REQUEST_F | 1101 FW_CMD_WRITE_F | 1102 FW_CMD_EXEC_F); 1103 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1104 FW_VI_CMD_ALLOC_F); 1105 cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); 1106 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1107 if (v) 1108 return v; 1109 1110 return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); 1111 } 1112 1113 /** 1114 * t4vf_free_vi -- free a virtual interface 1115 * @adapter: the adapter 1116 * @viid: the virtual interface identifier 1117 * 1118 * Free a previously allocated Virtual Interface. Return an error on 1119 * failure. 1120 */ 1121 int t4vf_free_vi(struct adapter *adapter, int viid) 1122 { 1123 struct fw_vi_cmd cmd; 1124 1125 /* 1126 * Execute a VI command to free the Virtual Interface. 1127 */ 1128 memset(&cmd, 0, sizeof(cmd)); 1129 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1130 FW_CMD_REQUEST_F | 1131 FW_CMD_EXEC_F); 1132 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1133 FW_VI_CMD_FREE_F); 1134 cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); 1135 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1136 } 1137 1138 /** 1139 * t4vf_enable_vi - enable/disable a virtual interface 1140 * @adapter: the adapter 1141 * @viid: the Virtual Interface ID 1142 * @rx_en: 1=enable Rx, 0=disable Rx 1143 * @tx_en: 1=enable Tx, 0=disable Tx 1144 * 1145 * Enables/disables a virtual interface. 1146 */ 1147 int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, 1148 bool rx_en, bool tx_en) 1149 { 1150 struct fw_vi_enable_cmd cmd; 1151 1152 memset(&cmd, 0, sizeof(cmd)); 1153 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1154 FW_CMD_REQUEST_F | 1155 FW_CMD_EXEC_F | 1156 FW_VI_ENABLE_CMD_VIID_V(viid)); 1157 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | 1158 FW_VI_ENABLE_CMD_EEN_V(tx_en) | 1159 FW_LEN16(cmd)); 1160 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1161 } 1162 1163 /** 1164 * t4vf_identify_port - identify a VI's port by blinking its LED 1165 * @adapter: the adapter 1166 * @viid: the Virtual Interface ID 1167 * @nblinks: how many times to blink LED at 2.5 Hz 1168 * 1169 * Identifies a VI's port by blinking its LED. 1170 */ 1171 int t4vf_identify_port(struct adapter *adapter, unsigned int viid, 1172 unsigned int nblinks) 1173 { 1174 struct fw_vi_enable_cmd cmd; 1175 1176 memset(&cmd, 0, sizeof(cmd)); 1177 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1178 FW_CMD_REQUEST_F | 1179 FW_CMD_EXEC_F | 1180 FW_VI_ENABLE_CMD_VIID_V(viid)); 1181 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | 1182 FW_LEN16(cmd)); 1183 cmd.blinkdur = cpu_to_be16(nblinks); 1184 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1185 } 1186 1187 /** 1188 * t4vf_set_rxmode - set Rx properties of a virtual interface 1189 * @adapter: the adapter 1190 * @viid: the VI id 1191 * @mtu: the new MTU or -1 for no change 1192 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change 1193 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change 1194 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change 1195 * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, 1196 * -1 no change 1197 * 1198 * Sets Rx properties of a virtual interface. 1199 */ 1200 int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, 1201 int mtu, int promisc, int all_multi, int bcast, int vlanex, 1202 bool sleep_ok) 1203 { 1204 struct fw_vi_rxmode_cmd cmd; 1205 1206 /* convert to FW values */ 1207 if (mtu < 0) 1208 mtu = FW_VI_RXMODE_CMD_MTU_M; 1209 if (promisc < 0) 1210 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; 1211 if (all_multi < 0) 1212 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; 1213 if (bcast < 0) 1214 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; 1215 if (vlanex < 0) 1216 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; 1217 1218 memset(&cmd, 0, sizeof(cmd)); 1219 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | 1220 FW_CMD_REQUEST_F | 1221 FW_CMD_WRITE_F | 1222 FW_VI_RXMODE_CMD_VIID_V(viid)); 1223 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1224 cmd.mtu_to_vlanexen = 1225 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | 1226 FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | 1227 FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | 1228 FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | 1229 FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); 1230 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1231 } 1232 1233 /** 1234 * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses 1235 * @adapter: the adapter 1236 * @viid: the Virtual Interface Identifier 1237 * @free: if true any existing filters for this VI id are first removed 1238 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1239 * @addr: the MAC address(es) 1240 * @idx: where to store the index of each allocated filter 1241 * @hash: pointer to hash address filter bitmap 1242 * @sleep_ok: call is allowed to sleep 1243 * 1244 * Allocates an exact-match filter for each of the supplied addresses and 1245 * sets it to the corresponding address. If @idx is not %NULL it should 1246 * have at least @naddr entries, each of which will be set to the index of 1247 * the filter allocated for the corresponding MAC address. If a filter 1248 * could not be allocated for an address its index is set to 0xffff. 1249 * If @hash is not %NULL addresses that fail to allocate an exact filter 1250 * are hashed and update the hash filter bitmap pointed at by @hash. 1251 * 1252 * Returns a negative error number or the number of filters allocated. 1253 */ 1254 int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, 1255 unsigned int naddr, const u8 **addr, u16 *idx, 1256 u64 *hash, bool sleep_ok) 1257 { 1258 int offset, ret = 0; 1259 unsigned nfilters = 0; 1260 unsigned int rem = naddr; 1261 struct fw_vi_mac_cmd cmd, rpl; 1262 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1263 1264 if (naddr > max_naddr) 1265 return -EINVAL; 1266 1267 for (offset = 0; offset < naddr; /**/) { 1268 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) 1269 ? rem 1270 : ARRAY_SIZE(cmd.u.exact)); 1271 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1272 u.exact[fw_naddr]), 16); 1273 struct fw_vi_mac_exact *p; 1274 int i; 1275 1276 memset(&cmd, 0, sizeof(cmd)); 1277 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1278 FW_CMD_REQUEST_F | 1279 FW_CMD_WRITE_F | 1280 (free ? FW_CMD_EXEC_F : 0) | 1281 FW_VI_MAC_CMD_VIID_V(viid)); 1282 cmd.freemacs_to_len16 = 1283 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | 1284 FW_CMD_LEN16_V(len16)); 1285 1286 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1287 p->valid_to_idx = cpu_to_be16( 1288 FW_VI_MAC_CMD_VALID_F | 1289 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); 1290 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1291 } 1292 1293 1294 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, 1295 sleep_ok); 1296 if (ret && ret != -ENOMEM) 1297 break; 1298 1299 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { 1300 u16 index = FW_VI_MAC_CMD_IDX_G( 1301 be16_to_cpu(p->valid_to_idx)); 1302 1303 if (idx) 1304 idx[offset+i] = 1305 (index >= max_naddr 1306 ? 0xffff 1307 : index); 1308 if (index < max_naddr) 1309 nfilters++; 1310 else if (hash) 1311 *hash |= (1ULL << hash_mac_addr(addr[offset+i])); 1312 } 1313 1314 free = false; 1315 offset += fw_naddr; 1316 rem -= fw_naddr; 1317 } 1318 1319 /* 1320 * If there were no errors or we merely ran out of room in our MAC 1321 * address arena, return the number of filters actually written. 1322 */ 1323 if (ret == 0 || ret == -ENOMEM) 1324 ret = nfilters; 1325 return ret; 1326 } 1327 1328 /** 1329 * t4vf_free_mac_filt - frees exact-match filters of given MAC addresses 1330 * @adapter: the adapter 1331 * @viid: the VI id 1332 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1333 * @addr: the MAC address(es) 1334 * @sleep_ok: call is allowed to sleep 1335 * 1336 * Frees the exact-match filter for each of the supplied addresses 1337 * 1338 * Returns a negative error number or the number of filters freed. 1339 */ 1340 int t4vf_free_mac_filt(struct adapter *adapter, unsigned int viid, 1341 unsigned int naddr, const u8 **addr, bool sleep_ok) 1342 { 1343 int offset, ret = 0; 1344 struct fw_vi_mac_cmd cmd; 1345 unsigned int nfilters = 0; 1346 unsigned int max_naddr = adapter->params.arch.mps_tcam_size; 1347 unsigned int rem = naddr; 1348 1349 if (naddr > max_naddr) 1350 return -EINVAL; 1351 1352 for (offset = 0; offset < (int)naddr ; /**/) { 1353 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) ? 1354 rem : ARRAY_SIZE(cmd.u.exact)); 1355 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1356 u.exact[fw_naddr]), 16); 1357 struct fw_vi_mac_exact *p; 1358 int i; 1359 1360 memset(&cmd, 0, sizeof(cmd)); 1361 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1362 FW_CMD_REQUEST_F | 1363 FW_CMD_WRITE_F | 1364 FW_CMD_EXEC_V(0) | 1365 FW_VI_MAC_CMD_VIID_V(viid)); 1366 cmd.freemacs_to_len16 = 1367 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(0) | 1368 FW_CMD_LEN16_V(len16)); 1369 1370 for (i = 0, p = cmd.u.exact; i < (int)fw_naddr; i++, p++) { 1371 p->valid_to_idx = cpu_to_be16( 1372 FW_VI_MAC_CMD_VALID_F | 1373 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_MAC_BASED_FREE)); 1374 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1375 } 1376 1377 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &cmd, 1378 sleep_ok); 1379 if (ret) 1380 break; 1381 1382 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1383 u16 index = FW_VI_MAC_CMD_IDX_G( 1384 be16_to_cpu(p->valid_to_idx)); 1385 1386 if (index < max_naddr) 1387 nfilters++; 1388 } 1389 1390 offset += fw_naddr; 1391 rem -= fw_naddr; 1392 } 1393 1394 if (ret == 0) 1395 ret = nfilters; 1396 return ret; 1397 } 1398 1399 /** 1400 * t4vf_change_mac - modifies the exact-match filter for a MAC address 1401 * @adapter: the adapter 1402 * @viid: the Virtual Interface ID 1403 * @idx: index of existing filter for old value of MAC address, or -1 1404 * @addr: the new MAC address value 1405 * @persist: if idx < 0, the new MAC allocation should be persistent 1406 * 1407 * Modifies an exact-match filter and sets it to the new MAC address. 1408 * Note that in general it is not possible to modify the value of a given 1409 * filter so the generic way to modify an address filter is to free the 1410 * one being used by the old address value and allocate a new filter for 1411 * the new address value. @idx can be -1 if the address is a new 1412 * addition. 1413 * 1414 * Returns a negative error number or the index of the filter with the new 1415 * MAC value. 1416 */ 1417 int t4vf_change_mac(struct adapter *adapter, unsigned int viid, 1418 int idx, const u8 *addr, bool persist) 1419 { 1420 int ret; 1421 struct fw_vi_mac_cmd cmd, rpl; 1422 struct fw_vi_mac_exact *p = &cmd.u.exact[0]; 1423 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1424 u.exact[1]), 16); 1425 unsigned int max_mac_addr = adapter->params.arch.mps_tcam_size; 1426 1427 /* 1428 * If this is a new allocation, determine whether it should be 1429 * persistent (across a "freemacs" operation) or not. 1430 */ 1431 if (idx < 0) 1432 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; 1433 1434 memset(&cmd, 0, sizeof(cmd)); 1435 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1436 FW_CMD_REQUEST_F | 1437 FW_CMD_WRITE_F | 1438 FW_VI_MAC_CMD_VIID_V(viid)); 1439 cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1440 p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | 1441 FW_VI_MAC_CMD_IDX_V(idx)); 1442 memcpy(p->macaddr, addr, sizeof(p->macaddr)); 1443 1444 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1445 if (ret == 0) { 1446 p = &rpl.u.exact[0]; 1447 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); 1448 if (ret >= max_mac_addr) 1449 ret = -ENOMEM; 1450 } 1451 return ret; 1452 } 1453 1454 /** 1455 * t4vf_set_addr_hash - program the MAC inexact-match hash filter 1456 * @adapter: the adapter 1457 * @viid: the Virtual Interface Identifier 1458 * @ucast: whether the hash filter should also match unicast addresses 1459 * @vec: the value to be written to the hash filter 1460 * @sleep_ok: call is allowed to sleep 1461 * 1462 * Sets the 64-bit inexact-match hash filter for a virtual interface. 1463 */ 1464 int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, 1465 bool ucast, u64 vec, bool sleep_ok) 1466 { 1467 struct fw_vi_mac_cmd cmd; 1468 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1469 u.exact[0]), 16); 1470 1471 memset(&cmd, 0, sizeof(cmd)); 1472 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1473 FW_CMD_REQUEST_F | 1474 FW_CMD_WRITE_F | 1475 FW_VI_ENABLE_CMD_VIID_V(viid)); 1476 cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | 1477 FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | 1478 FW_CMD_LEN16_V(len16)); 1479 cmd.u.hash.hashvec = cpu_to_be64(vec); 1480 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1481 } 1482 1483 /** 1484 * t4vf_get_port_stats - collect "port" statistics 1485 * @adapter: the adapter 1486 * @pidx: the port index 1487 * @s: the stats structure to fill 1488 * 1489 * Collect statistics for the "port"'s Virtual Interface. 1490 */ 1491 int t4vf_get_port_stats(struct adapter *adapter, int pidx, 1492 struct t4vf_port_stats *s) 1493 { 1494 struct port_info *pi = adap2pinfo(adapter, pidx); 1495 struct fw_vi_stats_vf fwstats; 1496 unsigned int rem = VI_VF_NUM_STATS; 1497 __be64 *fwsp = (__be64 *)&fwstats; 1498 1499 /* 1500 * Grab the Virtual Interface statistics a chunk at a time via mailbox 1501 * commands. We could use a Work Request and get all of them at once 1502 * but that's an asynchronous interface which is awkward to use. 1503 */ 1504 while (rem) { 1505 unsigned int ix = VI_VF_NUM_STATS - rem; 1506 unsigned int nstats = min(6U, rem); 1507 struct fw_vi_stats_cmd cmd, rpl; 1508 size_t len = (offsetof(struct fw_vi_stats_cmd, u) + 1509 sizeof(struct fw_vi_stats_ctl)); 1510 size_t len16 = DIV_ROUND_UP(len, 16); 1511 int ret; 1512 1513 memset(&cmd, 0, sizeof(cmd)); 1514 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | 1515 FW_VI_STATS_CMD_VIID_V(pi->viid) | 1516 FW_CMD_REQUEST_F | 1517 FW_CMD_READ_F); 1518 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1519 cmd.u.ctl.nstats_ix = 1520 cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | 1521 FW_VI_STATS_CMD_NSTATS_V(nstats)); 1522 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); 1523 if (ret) 1524 return ret; 1525 1526 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); 1527 1528 rem -= nstats; 1529 fwsp += nstats; 1530 } 1531 1532 /* 1533 * Translate firmware statistics into host native statistics. 1534 */ 1535 s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); 1536 s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); 1537 s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); 1538 s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); 1539 s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); 1540 s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); 1541 s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); 1542 s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); 1543 s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); 1544 1545 s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); 1546 s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); 1547 s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); 1548 s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); 1549 s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); 1550 s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); 1551 1552 s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); 1553 1554 return 0; 1555 } 1556 1557 /** 1558 * t4vf_iq_free - free an ingress queue and its free lists 1559 * @adapter: the adapter 1560 * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) 1561 * @iqid: ingress queue ID 1562 * @fl0id: FL0 queue ID or 0xffff if no attached FL0 1563 * @fl1id: FL1 queue ID or 0xffff if no attached FL1 1564 * 1565 * Frees an ingress queue and its associated free lists, if any. 1566 */ 1567 int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, 1568 unsigned int iqid, unsigned int fl0id, unsigned int fl1id) 1569 { 1570 struct fw_iq_cmd cmd; 1571 1572 memset(&cmd, 0, sizeof(cmd)); 1573 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | 1574 FW_CMD_REQUEST_F | 1575 FW_CMD_EXEC_F); 1576 cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | 1577 FW_LEN16(cmd)); 1578 cmd.type_to_iqandstindex = 1579 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); 1580 1581 cmd.iqid = cpu_to_be16(iqid); 1582 cmd.fl0id = cpu_to_be16(fl0id); 1583 cmd.fl1id = cpu_to_be16(fl1id); 1584 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1585 } 1586 1587 /** 1588 * t4vf_eth_eq_free - free an Ethernet egress queue 1589 * @adapter: the adapter 1590 * @eqid: egress queue ID 1591 * 1592 * Frees an Ethernet egress queue. 1593 */ 1594 int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) 1595 { 1596 struct fw_eq_eth_cmd cmd; 1597 1598 memset(&cmd, 0, sizeof(cmd)); 1599 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | 1600 FW_CMD_REQUEST_F | 1601 FW_CMD_EXEC_F); 1602 cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | 1603 FW_LEN16(cmd)); 1604 cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); 1605 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1606 } 1607 1608 /** 1609 * t4vf_handle_fw_rpl - process a firmware reply message 1610 * @adapter: the adapter 1611 * @rpl: start of the firmware message 1612 * 1613 * Processes a firmware message, such as link state change messages. 1614 */ 1615 int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) 1616 { 1617 const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; 1618 u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); 1619 1620 switch (opcode) { 1621 case FW_PORT_CMD: { 1622 /* 1623 * Link/module state change message. 1624 */ 1625 const struct fw_port_cmd *port_cmd = 1626 (const struct fw_port_cmd *)rpl; 1627 u32 stat, mod; 1628 int action, port_id, link_ok, speed, fc, pidx; 1629 1630 /* 1631 * Extract various fields from port status change message. 1632 */ 1633 action = FW_PORT_CMD_ACTION_G( 1634 be32_to_cpu(port_cmd->action_to_len16)); 1635 if (action != FW_PORT_ACTION_GET_PORT_INFO) { 1636 dev_err(adapter->pdev_dev, 1637 "Unknown firmware PORT reply action %x\n", 1638 action); 1639 break; 1640 } 1641 1642 port_id = FW_PORT_CMD_PORTID_G( 1643 be32_to_cpu(port_cmd->op_to_portid)); 1644 1645 stat = be32_to_cpu(port_cmd->u.info.lstatus_to_modtype); 1646 link_ok = (stat & FW_PORT_CMD_LSTATUS_F) != 0; 1647 speed = 0; 1648 fc = 0; 1649 if (stat & FW_PORT_CMD_RXPAUSE_F) 1650 fc |= PAUSE_RX; 1651 if (stat & FW_PORT_CMD_TXPAUSE_F) 1652 fc |= PAUSE_TX; 1653 if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) 1654 speed = 100; 1655 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) 1656 speed = 1000; 1657 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) 1658 speed = 10000; 1659 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) 1660 speed = 40000; 1661 1662 /* 1663 * Scan all of our "ports" (Virtual Interfaces) looking for 1664 * those bound to the physical port which has changed. If 1665 * our recorded state doesn't match the current state, 1666 * signal that change to the OS code. 1667 */ 1668 for_each_port(adapter, pidx) { 1669 struct port_info *pi = adap2pinfo(adapter, pidx); 1670 struct link_config *lc; 1671 1672 if (pi->port_id != port_id) 1673 continue; 1674 1675 lc = &pi->link_cfg; 1676 1677 mod = FW_PORT_CMD_MODTYPE_G(stat); 1678 if (mod != pi->mod_type) { 1679 pi->mod_type = mod; 1680 t4vf_os_portmod_changed(adapter, pidx); 1681 } 1682 1683 if (link_ok != lc->link_ok || speed != lc->speed || 1684 fc != lc->fc) { 1685 /* something changed */ 1686 lc->link_ok = link_ok; 1687 lc->speed = speed; 1688 lc->fc = fc; 1689 lc->supported = 1690 be16_to_cpu(port_cmd->u.info.pcap); 1691 t4vf_os_link_changed(adapter, pidx, link_ok); 1692 } 1693 } 1694 break; 1695 } 1696 1697 default: 1698 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", 1699 opcode); 1700 } 1701 return 0; 1702 } 1703 1704 /** 1705 */ 1706 int t4vf_prep_adapter(struct adapter *adapter) 1707 { 1708 int err; 1709 unsigned int chipid; 1710 1711 /* Wait for the device to become ready before proceeding ... 1712 */ 1713 err = t4vf_wait_dev_ready(adapter); 1714 if (err) 1715 return err; 1716 1717 /* Default port and clock for debugging in case we can't reach 1718 * firmware. 1719 */ 1720 adapter->params.nports = 1; 1721 adapter->params.vfres.pmask = 1; 1722 adapter->params.vpd.cclk = 50000; 1723 1724 adapter->params.chip = 0; 1725 switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { 1726 case CHELSIO_T4: 1727 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); 1728 adapter->params.arch.sge_fl_db = DBPRIO_F; 1729 adapter->params.arch.mps_tcam_size = 1730 NUM_MPS_CLS_SRAM_L_INSTANCES; 1731 break; 1732 1733 case CHELSIO_T5: 1734 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 1735 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); 1736 adapter->params.arch.sge_fl_db = DBPRIO_F | DBTYPE_F; 1737 adapter->params.arch.mps_tcam_size = 1738 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1739 break; 1740 1741 case CHELSIO_T6: 1742 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 1743 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T6, chipid); 1744 adapter->params.arch.sge_fl_db = 0; 1745 adapter->params.arch.mps_tcam_size = 1746 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1747 break; 1748 } 1749 1750 return 0; 1751 } 1752