1 /* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36 /* 37 * This file should not be included directly. Include t4vf_common.h instead. 38 */ 39 40 #ifndef __CXGB4VF_ADAPTER_H__ 41 #define __CXGB4VF_ADAPTER_H__ 42 43 #include <linux/interrupt.h> 44 #include <linux/pci.h> 45 #include <linux/spinlock.h> 46 #include <linux/skbuff.h> 47 #include <linux/if_ether.h> 48 #include <linux/netdevice.h> 49 50 #include "../cxgb4/t4_hw.h" 51 52 /* 53 * Constants of the implementation. 54 */ 55 enum { 56 MAX_NPORTS = 1, /* max # of "ports" */ 57 MAX_PORT_QSETS = 8, /* max # of Queue Sets / "port" */ 58 MAX_ETH_QSETS = MAX_NPORTS*MAX_PORT_QSETS, 59 60 /* 61 * MSI-X interrupt index usage. 62 */ 63 MSIX_FW = 0, /* MSI-X index for firmware Q */ 64 MSIX_IQFLINT = 1, /* MSI-X index base for Ingress Qs */ 65 MSIX_EXTRAS = 1, 66 MSIX_ENTRIES = MAX_ETH_QSETS + MSIX_EXTRAS, 67 68 /* 69 * The maximum number of Ingress and Egress Queues is determined by 70 * the maximum number of "Queue Sets" which we support plus any 71 * ancillary queues. Each "Queue Set" requires one Ingress Queue 72 * for RX Packet Ingress Event notifications and two Egress Queues for 73 * a Free List and an Ethernet TX list. 74 */ 75 INGQ_EXTRAS = 2, /* firmware event queue and */ 76 /* forwarded interrupts */ 77 MAX_INGQ = MAX_ETH_QSETS+INGQ_EXTRAS, 78 MAX_EGRQ = MAX_ETH_QSETS*2, 79 }; 80 81 /* 82 * Forward structure definition references. 83 */ 84 struct adapter; 85 struct sge_eth_rxq; 86 struct sge_rspq; 87 88 /* 89 * Per-"port" information. This is really per-Virtual Interface information 90 * but the use of the "port" nomanclature makes it easier to go back and forth 91 * between the PF and VF drivers ... 92 */ 93 struct port_info { 94 struct adapter *adapter; /* our adapter */ 95 u16 viid; /* virtual interface ID */ 96 s16 xact_addr_filt; /* index of our MAC address filter */ 97 u16 rss_size; /* size of VI's RSS table slice */ 98 u8 pidx; /* index into adapter port[] */ 99 u8 port_id; /* physical port ID */ 100 u8 nqsets; /* # of "Queue Sets" */ 101 u8 first_qset; /* index of first "Queue Set" */ 102 struct link_config link_cfg; /* physical port configuration */ 103 }; 104 105 /* 106 * Scatter Gather Engine resources for the "adapter". Our ingress and egress 107 * queues are organized into "Queue Sets" with one ingress and one egress 108 * queue per Queue Set. These Queue Sets are aportionable between the "ports" 109 * (Virtual Interfaces). One extra ingress queue is used to receive 110 * asynchronous messages from the firmware. Note that the "Queue IDs" that we 111 * use here are really "Relative Queue IDs" which are returned as part of the 112 * firmware command to allocate queues. These queue IDs are relative to the 113 * absolute Queue ID base of the section of the Queue ID space allocated to 114 * the PF/VF. 115 */ 116 117 /* 118 * SGE free-list queue state. 119 */ 120 struct rx_sw_desc; 121 struct sge_fl { 122 unsigned int avail; /* # of available RX buffers */ 123 unsigned int pend_cred; /* new buffers since last FL DB ring */ 124 unsigned int cidx; /* consumer index */ 125 unsigned int pidx; /* producer index */ 126 unsigned long alloc_failed; /* # of buffer allocation failures */ 127 unsigned long large_alloc_failed; 128 unsigned long starving; /* # of times FL was found starving */ 129 130 /* 131 * Write-once/infrequently fields. 132 * ------------------------------- 133 */ 134 135 unsigned int cntxt_id; /* SGE relative QID for the free list */ 136 unsigned int abs_id; /* SGE absolute QID for the free list */ 137 unsigned int size; /* capacity of free list */ 138 struct rx_sw_desc *sdesc; /* address of SW RX descriptor ring */ 139 __be64 *desc; /* address of HW RX descriptor ring */ 140 dma_addr_t addr; /* PCI bus address of hardware ring */ 141 void __iomem *bar2_addr; /* address of BAR2 Queue registers */ 142 unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */ 143 }; 144 145 /* 146 * An ingress packet gather list. 147 */ 148 struct pkt_gl { 149 struct page_frag frags[MAX_SKB_FRAGS]; 150 void *va; /* virtual address of first byte */ 151 unsigned int nfrags; /* # of fragments */ 152 unsigned int tot_len; /* total length of fragments */ 153 }; 154 155 typedef int (*rspq_handler_t)(struct sge_rspq *, const __be64 *, 156 const struct pkt_gl *); 157 158 /* 159 * State for an SGE Response Queue. 160 */ 161 struct sge_rspq { 162 struct napi_struct napi; /* NAPI scheduling control */ 163 const __be64 *cur_desc; /* current descriptor in queue */ 164 unsigned int cidx; /* consumer index */ 165 u8 gen; /* current generation bit */ 166 u8 next_intr_params; /* holdoff params for next interrupt */ 167 int offset; /* offset into current FL buffer */ 168 169 unsigned int unhandled_irqs; /* bogus interrupts */ 170 171 /* 172 * Write-once/infrequently fields. 173 * ------------------------------- 174 */ 175 176 u8 intr_params; /* interrupt holdoff parameters */ 177 u8 pktcnt_idx; /* interrupt packet threshold */ 178 u8 idx; /* queue index within its group */ 179 u16 cntxt_id; /* SGE rel QID for the response Q */ 180 u16 abs_id; /* SGE abs QID for the response Q */ 181 __be64 *desc; /* address of hardware response ring */ 182 dma_addr_t phys_addr; /* PCI bus address of ring */ 183 void __iomem *bar2_addr; /* address of BAR2 Queue registers */ 184 unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */ 185 unsigned int iqe_len; /* entry size */ 186 unsigned int size; /* capcity of response Q */ 187 struct adapter *adapter; /* our adapter */ 188 struct net_device *netdev; /* associated net device */ 189 rspq_handler_t handler; /* the handler for this response Q */ 190 }; 191 192 /* 193 * Ethernet queue statistics 194 */ 195 struct sge_eth_stats { 196 unsigned long pkts; /* # of ethernet packets */ 197 unsigned long lro_pkts; /* # of LRO super packets */ 198 unsigned long lro_merged; /* # of wire packets merged by LRO */ 199 unsigned long rx_cso; /* # of Rx checksum offloads */ 200 unsigned long vlan_ex; /* # of Rx VLAN extractions */ 201 unsigned long rx_drops; /* # of packets dropped due to no mem */ 202 }; 203 204 /* 205 * State for an Ethernet Receive Queue. 206 */ 207 struct sge_eth_rxq { 208 struct sge_rspq rspq; /* Response Queue */ 209 struct sge_fl fl; /* Free List */ 210 struct sge_eth_stats stats; /* receive statistics */ 211 }; 212 213 /* 214 * SGE Transmit Queue state. This contains all of the resources associated 215 * with the hardware status of a TX Queue which is a circular ring of hardware 216 * TX Descriptors. For convenience, it also contains a pointer to a parallel 217 * "Software Descriptor" array but we don't know anything about it here other 218 * than its type name. 219 */ 220 struct tx_desc { 221 /* 222 * Egress Queues are measured in units of SGE_EQ_IDXSIZE by the 223 * hardware: Sizes, Producer and Consumer indices, etc. 224 */ 225 __be64 flit[SGE_EQ_IDXSIZE/sizeof(__be64)]; 226 }; 227 struct tx_sw_desc; 228 struct sge_txq { 229 unsigned int in_use; /* # of in-use TX descriptors */ 230 unsigned int size; /* # of descriptors */ 231 unsigned int cidx; /* SW consumer index */ 232 unsigned int pidx; /* producer index */ 233 unsigned long stops; /* # of times queue has been stopped */ 234 unsigned long restarts; /* # of queue restarts */ 235 236 /* 237 * Write-once/infrequently fields. 238 * ------------------------------- 239 */ 240 241 unsigned int cntxt_id; /* SGE relative QID for the TX Q */ 242 unsigned int abs_id; /* SGE absolute QID for the TX Q */ 243 struct tx_desc *desc; /* address of HW TX descriptor ring */ 244 struct tx_sw_desc *sdesc; /* address of SW TX descriptor ring */ 245 struct sge_qstat *stat; /* queue status entry */ 246 dma_addr_t phys_addr; /* PCI bus address of hardware ring */ 247 void __iomem *bar2_addr; /* address of BAR2 Queue registers */ 248 unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */ 249 }; 250 251 /* 252 * State for an Ethernet Transmit Queue. 253 */ 254 struct sge_eth_txq { 255 struct sge_txq q; /* SGE TX Queue */ 256 struct netdev_queue *txq; /* associated netdev TX queue */ 257 unsigned long tso; /* # of TSO requests */ 258 unsigned long tx_cso; /* # of TX checksum offloads */ 259 unsigned long vlan_ins; /* # of TX VLAN insertions */ 260 unsigned long mapping_err; /* # of I/O MMU packet mapping errors */ 261 }; 262 263 /* 264 * The complete set of Scatter/Gather Engine resources. 265 */ 266 struct sge { 267 /* 268 * Our "Queue Sets" ... 269 */ 270 struct sge_eth_txq ethtxq[MAX_ETH_QSETS]; 271 struct sge_eth_rxq ethrxq[MAX_ETH_QSETS]; 272 273 /* 274 * Extra ingress queues for asynchronous firmware events and 275 * forwarded interrupts (when in MSI mode). 276 */ 277 struct sge_rspq fw_evtq ____cacheline_aligned_in_smp; 278 279 struct sge_rspq intrq ____cacheline_aligned_in_smp; 280 spinlock_t intrq_lock; 281 282 /* 283 * State for managing "starving Free Lists" -- Free Lists which have 284 * fallen below a certain threshold of buffers available to the 285 * hardware and attempts to refill them up to that threshold have 286 * failed. We have a regular "slow tick" timer process which will 287 * make periodic attempts to refill these starving Free Lists ... 288 */ 289 DECLARE_BITMAP(starving_fl, MAX_EGRQ); 290 struct timer_list rx_timer; 291 292 /* 293 * State for cleaning up completed TX descriptors. 294 */ 295 struct timer_list tx_timer; 296 297 /* 298 * Write-once/infrequently fields. 299 * ------------------------------- 300 */ 301 302 u16 max_ethqsets; /* # of available Ethernet queue sets */ 303 u16 ethqsets; /* # of active Ethernet queue sets */ 304 u16 ethtxq_rover; /* Tx queue to clean up next */ 305 u16 timer_val[SGE_NTIMERS]; /* interrupt holdoff timer array */ 306 u8 counter_val[SGE_NCOUNTERS]; /* interrupt RX threshold array */ 307 308 /* Decoded Adapter Parameters. 309 */ 310 u32 fl_pg_order; /* large page allocation size */ 311 u32 stat_len; /* length of status page at ring end */ 312 u32 pktshift; /* padding between CPL & packet data */ 313 u32 fl_align; /* response queue message alignment */ 314 u32 fl_starve_thres; /* Free List starvation threshold */ 315 316 /* 317 * Reverse maps from Absolute Queue IDs to associated queue pointers. 318 * The absolute Queue IDs are in a compact range which start at a 319 * [potentially large] Base Queue ID. We perform the reverse map by 320 * first converting the Absolute Queue ID into a Relative Queue ID by 321 * subtracting off the Base Queue ID and then use a Relative Queue ID 322 * indexed table to get the pointer to the corresponding software 323 * queue structure. 324 */ 325 unsigned int egr_base; 326 unsigned int ingr_base; 327 void *egr_map[MAX_EGRQ]; 328 struct sge_rspq *ingr_map[MAX_INGQ]; 329 }; 330 331 /* 332 * Utility macros to convert Absolute- to Relative-Queue indices and Egress- 333 * and Ingress-Queues. The EQ_MAP() and IQ_MAP() macros which provide 334 * pointers to Ingress- and Egress-Queues can be used as both L- and R-values 335 */ 336 #define EQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->egr_base)) 337 #define IQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->ingr_base)) 338 339 #define EQ_MAP(s, abs_id) ((s)->egr_map[EQ_IDX(s, abs_id)]) 340 #define IQ_MAP(s, abs_id) ((s)->ingr_map[IQ_IDX(s, abs_id)]) 341 342 /* 343 * Macro to iterate across Queue Sets ("rxq" is a historic misnomer). 344 */ 345 #define for_each_ethrxq(sge, iter) \ 346 for (iter = 0; iter < (sge)->ethqsets; iter++) 347 348 /* 349 * Per-"adapter" (Virtual Function) information. 350 */ 351 struct adapter { 352 /* PCI resources */ 353 void __iomem *regs; 354 void __iomem *bar2; 355 struct pci_dev *pdev; 356 struct device *pdev_dev; 357 358 /* "adapter" resources */ 359 unsigned long registered_device_map; 360 unsigned long open_device_map; 361 unsigned long flags; 362 struct adapter_params params; 363 364 /* queue and interrupt resources */ 365 struct { 366 unsigned short vec; 367 char desc[22]; 368 } msix_info[MSIX_ENTRIES]; 369 struct sge sge; 370 371 /* Linux network device resources */ 372 struct net_device *port[MAX_NPORTS]; 373 const char *name; 374 unsigned int msg_enable; 375 376 /* debugfs resources */ 377 struct dentry *debugfs_root; 378 379 /* various locks */ 380 spinlock_t stats_lock; 381 }; 382 383 enum { /* adapter flags */ 384 FULL_INIT_DONE = (1UL << 0), 385 USING_MSI = (1UL << 1), 386 USING_MSIX = (1UL << 2), 387 QUEUES_BOUND = (1UL << 3), 388 }; 389 390 /* 391 * The following register read/write routine definitions are required by 392 * the common code. 393 */ 394 395 /** 396 * t4_read_reg - read a HW register 397 * @adapter: the adapter 398 * @reg_addr: the register address 399 * 400 * Returns the 32-bit value of the given HW register. 401 */ 402 static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr) 403 { 404 return readl(adapter->regs + reg_addr); 405 } 406 407 /** 408 * t4_write_reg - write a HW register 409 * @adapter: the adapter 410 * @reg_addr: the register address 411 * @val: the value to write 412 * 413 * Write a 32-bit value into the given HW register. 414 */ 415 static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) 416 { 417 writel(val, adapter->regs + reg_addr); 418 } 419 420 #ifndef readq 421 static inline u64 readq(const volatile void __iomem *addr) 422 { 423 return readl(addr) + ((u64)readl(addr + 4) << 32); 424 } 425 426 static inline void writeq(u64 val, volatile void __iomem *addr) 427 { 428 writel(val, addr); 429 writel(val >> 32, addr + 4); 430 } 431 #endif 432 433 /** 434 * t4_read_reg64 - read a 64-bit HW register 435 * @adapter: the adapter 436 * @reg_addr: the register address 437 * 438 * Returns the 64-bit value of the given HW register. 439 */ 440 static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr) 441 { 442 return readq(adapter->regs + reg_addr); 443 } 444 445 /** 446 * t4_write_reg64 - write a 64-bit HW register 447 * @adapter: the adapter 448 * @reg_addr: the register address 449 * @val: the value to write 450 * 451 * Write a 64-bit value into the given HW register. 452 */ 453 static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr, 454 u64 val) 455 { 456 writeq(val, adapter->regs + reg_addr); 457 } 458 459 /** 460 * port_name - return the string name of a port 461 * @adapter: the adapter 462 * @pidx: the port index 463 * 464 * Return the string name of the selected port. 465 */ 466 static inline const char *port_name(struct adapter *adapter, int pidx) 467 { 468 return adapter->port[pidx]->name; 469 } 470 471 /** 472 * t4_os_set_hw_addr - store a port's MAC address in SW 473 * @adapter: the adapter 474 * @pidx: the port index 475 * @hw_addr: the Ethernet address 476 * 477 * Store the Ethernet address of the given port in SW. Called by the common 478 * code when it retrieves a port's Ethernet address from EEPROM. 479 */ 480 static inline void t4_os_set_hw_addr(struct adapter *adapter, int pidx, 481 u8 hw_addr[]) 482 { 483 memcpy(adapter->port[pidx]->dev_addr, hw_addr, ETH_ALEN); 484 } 485 486 /** 487 * netdev2pinfo - return the port_info structure associated with a net_device 488 * @dev: the netdev 489 * 490 * Return the struct port_info associated with a net_device 491 */ 492 static inline struct port_info *netdev2pinfo(const struct net_device *dev) 493 { 494 return netdev_priv(dev); 495 } 496 497 /** 498 * adap2pinfo - return the port_info of a port 499 * @adap: the adapter 500 * @pidx: the port index 501 * 502 * Return the port_info structure for the adapter. 503 */ 504 static inline struct port_info *adap2pinfo(struct adapter *adapter, int pidx) 505 { 506 return netdev_priv(adapter->port[pidx]); 507 } 508 509 /** 510 * netdev2adap - return the adapter structure associated with a net_device 511 * @dev: the netdev 512 * 513 * Return the struct adapter associated with a net_device 514 */ 515 static inline struct adapter *netdev2adap(const struct net_device *dev) 516 { 517 return netdev2pinfo(dev)->adapter; 518 } 519 520 /* 521 * OS "Callback" function declarations. These are functions that the OS code 522 * is "contracted" to provide for the common code. 523 */ 524 void t4vf_os_link_changed(struct adapter *, int, int); 525 526 /* 527 * SGE function prototype declarations. 528 */ 529 int t4vf_sge_alloc_rxq(struct adapter *, struct sge_rspq *, bool, 530 struct net_device *, int, 531 struct sge_fl *, rspq_handler_t); 532 int t4vf_sge_alloc_eth_txq(struct adapter *, struct sge_eth_txq *, 533 struct net_device *, struct netdev_queue *, 534 unsigned int); 535 void t4vf_free_sge_resources(struct adapter *); 536 537 int t4vf_eth_xmit(struct sk_buff *, struct net_device *); 538 int t4vf_ethrx_handler(struct sge_rspq *, const __be64 *, 539 const struct pkt_gl *); 540 541 irq_handler_t t4vf_intr_handler(struct adapter *); 542 irqreturn_t t4vf_sge_intr_msix(int, void *); 543 544 int t4vf_sge_init(struct adapter *); 545 void t4vf_sge_start(struct adapter *); 546 void t4vf_sge_stop(struct adapter *); 547 548 #endif /* __CXGB4VF_ADAPTER_H__ */ 549