1 /*
2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
3  *
4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #ifndef __T4_MSG_H
36 #define __T4_MSG_H
37 
38 #include <linux/types.h>
39 
40 enum {
41 	CPL_PASS_OPEN_REQ     = 0x1,
42 	CPL_PASS_ACCEPT_RPL   = 0x2,
43 	CPL_ACT_OPEN_REQ      = 0x3,
44 	CPL_SET_TCB_FIELD     = 0x5,
45 	CPL_GET_TCB           = 0x6,
46 	CPL_CLOSE_CON_REQ     = 0x8,
47 	CPL_CLOSE_LISTSRV_REQ = 0x9,
48 	CPL_ABORT_REQ         = 0xA,
49 	CPL_ABORT_RPL         = 0xB,
50 	CPL_RX_DATA_ACK       = 0xD,
51 	CPL_TX_PKT            = 0xE,
52 	CPL_L2T_WRITE_REQ     = 0x12,
53 	CPL_SMT_WRITE_REQ     = 0x14,
54 	CPL_TID_RELEASE       = 0x1A,
55 	CPL_SRQ_TABLE_REQ     = 0x1C,
56 	CPL_TX_DATA_ISO	      = 0x1F,
57 
58 	CPL_CLOSE_LISTSRV_RPL = 0x20,
59 	CPL_L2T_WRITE_RPL     = 0x23,
60 	CPL_PASS_OPEN_RPL     = 0x24,
61 	CPL_ACT_OPEN_RPL      = 0x25,
62 	CPL_PEER_CLOSE        = 0x26,
63 	CPL_ABORT_REQ_RSS     = 0x2B,
64 	CPL_ABORT_RPL_RSS     = 0x2D,
65 	CPL_SMT_WRITE_RPL     = 0x2E,
66 
67 	CPL_RX_PHYS_ADDR      = 0x30,
68 	CPL_CLOSE_CON_RPL     = 0x32,
69 	CPL_ISCSI_HDR         = 0x33,
70 	CPL_RDMA_CQE          = 0x35,
71 	CPL_RDMA_CQE_READ_RSP = 0x36,
72 	CPL_RDMA_CQE_ERR      = 0x37,
73 	CPL_RX_DATA           = 0x39,
74 	CPL_SET_TCB_RPL       = 0x3A,
75 	CPL_RX_PKT            = 0x3B,
76 	CPL_RX_DDP_COMPLETE   = 0x3F,
77 
78 	CPL_ACT_ESTABLISH     = 0x40,
79 	CPL_PASS_ESTABLISH    = 0x41,
80 	CPL_RX_DATA_DDP       = 0x42,
81 	CPL_PASS_ACCEPT_REQ   = 0x44,
82 	CPL_RX_ISCSI_CMP      = 0x45,
83 	CPL_TRACE_PKT_T5      = 0x48,
84 	CPL_RX_ISCSI_DDP      = 0x49,
85 	CPL_RX_TLS_CMP        = 0x4E,
86 
87 	CPL_RDMA_READ_REQ     = 0x60,
88 
89 	CPL_PASS_OPEN_REQ6    = 0x81,
90 	CPL_ACT_OPEN_REQ6     = 0x83,
91 
92 	CPL_TX_TLS_PDU        = 0x88,
93 	CPL_TX_TLS_SFO        = 0x89,
94 	CPL_TX_SEC_PDU        = 0x8A,
95 	CPL_TX_TLS_ACK        = 0x8B,
96 
97 	CPL_RDMA_TERMINATE    = 0xA2,
98 	CPL_RDMA_WRITE        = 0xA4,
99 	CPL_SGE_EGR_UPDATE    = 0xA5,
100 	CPL_RX_MPS_PKT        = 0xAF,
101 
102 	CPL_TRACE_PKT         = 0xB0,
103 	CPL_TLS_DATA          = 0xB1,
104 	CPL_ISCSI_DATA	      = 0xB2,
105 
106 	CPL_FW4_MSG           = 0xC0,
107 	CPL_FW4_PLD           = 0xC1,
108 	CPL_FW4_ACK           = 0xC3,
109 	CPL_SRQ_TABLE_RPL     = 0xCC,
110 
111 	CPL_RX_PHYS_DSGL      = 0xD0,
112 
113 	CPL_FW6_MSG           = 0xE0,
114 	CPL_FW6_PLD           = 0xE1,
115 	CPL_TX_TNL_LSO        = 0xEC,
116 	CPL_TX_PKT_LSO        = 0xED,
117 	CPL_TX_PKT_XT         = 0xEE,
118 
119 	NUM_CPL_CMDS
120 };
121 
122 enum CPL_error {
123 	CPL_ERR_NONE               = 0,
124 	CPL_ERR_TCAM_PARITY        = 1,
125 	CPL_ERR_TCAM_MISS          = 2,
126 	CPL_ERR_TCAM_FULL          = 3,
127 	CPL_ERR_BAD_LENGTH         = 15,
128 	CPL_ERR_BAD_ROUTE          = 18,
129 	CPL_ERR_CONN_RESET         = 20,
130 	CPL_ERR_CONN_EXIST_SYNRECV = 21,
131 	CPL_ERR_CONN_EXIST         = 22,
132 	CPL_ERR_ARP_MISS           = 23,
133 	CPL_ERR_BAD_SYN            = 24,
134 	CPL_ERR_CONN_TIMEDOUT      = 30,
135 	CPL_ERR_XMIT_TIMEDOUT      = 31,
136 	CPL_ERR_PERSIST_TIMEDOUT   = 32,
137 	CPL_ERR_FINWAIT2_TIMEDOUT  = 33,
138 	CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
139 	CPL_ERR_RTX_NEG_ADVICE     = 35,
140 	CPL_ERR_PERSIST_NEG_ADVICE = 36,
141 	CPL_ERR_KEEPALV_NEG_ADVICE = 37,
142 	CPL_ERR_ABORT_FAILED       = 42,
143 	CPL_ERR_IWARP_FLM          = 50,
144 	CPL_CONTAINS_READ_RPL      = 60,
145 	CPL_CONTAINS_WRITE_RPL     = 61,
146 };
147 
148 enum {
149 	CPL_CONN_POLICY_AUTO = 0,
150 	CPL_CONN_POLICY_ASK  = 1,
151 	CPL_CONN_POLICY_FILTER = 2,
152 	CPL_CONN_POLICY_DENY = 3
153 };
154 
155 enum {
156 	ULP_MODE_NONE          = 0,
157 	ULP_MODE_ISCSI         = 2,
158 	ULP_MODE_RDMA          = 4,
159 	ULP_MODE_TCPDDP	       = 5,
160 	ULP_MODE_FCOE          = 6,
161 	ULP_MODE_TLS           = 8,
162 };
163 
164 enum {
165 	ULP_CRC_HEADER = 1 << 0,
166 	ULP_CRC_DATA   = 1 << 1
167 };
168 
169 enum {
170 	CPL_ABORT_SEND_RST = 0,
171 	CPL_ABORT_NO_RST,
172 };
173 
174 enum {                     /* TX_PKT_XT checksum types */
175 	TX_CSUM_TCP    = 0,
176 	TX_CSUM_UDP    = 1,
177 	TX_CSUM_CRC16  = 4,
178 	TX_CSUM_CRC32  = 5,
179 	TX_CSUM_CRC32C = 6,
180 	TX_CSUM_FCOE   = 7,
181 	TX_CSUM_TCPIP  = 8,
182 	TX_CSUM_UDPIP  = 9,
183 	TX_CSUM_TCPIP6 = 10,
184 	TX_CSUM_UDPIP6 = 11,
185 	TX_CSUM_IP     = 12,
186 };
187 
188 union opcode_tid {
189 	__be32 opcode_tid;
190 	u8 opcode;
191 };
192 
193 #define CPL_OPCODE_S    24
194 #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S)
195 #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF)
196 #define TID_G(x)    ((x) & 0xFFFFFF)
197 
198 /* tid is assumed to be 24-bits */
199 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE_V(opcode) | (tid))
200 
201 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
202 
203 /* extract the TID from a CPL command */
204 #define GET_TID(cmd) (TID_G(be32_to_cpu(OPCODE_TID(cmd))))
205 
206 /* partitioning of TID fields that also carry a queue id */
207 #define TID_TID_S    0
208 #define TID_TID_M    0x3fff
209 #define TID_TID_V(x) ((x) << TID_TID_S)
210 #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M)
211 
212 #define TID_QID_S    14
213 #define TID_QID_M    0x3ff
214 #define TID_QID_V(x) ((x) << TID_QID_S)
215 #define TID_QID_G(x) (((x) >> TID_QID_S) & TID_QID_M)
216 
217 struct rss_header {
218 	u8 opcode;
219 #if defined(__LITTLE_ENDIAN_BITFIELD)
220 	u8 channel:2;
221 	u8 filter_hit:1;
222 	u8 filter_tid:1;
223 	u8 hash_type:2;
224 	u8 ipv6:1;
225 	u8 send2fw:1;
226 #else
227 	u8 send2fw:1;
228 	u8 ipv6:1;
229 	u8 hash_type:2;
230 	u8 filter_tid:1;
231 	u8 filter_hit:1;
232 	u8 channel:2;
233 #endif
234 	__be16 qid;
235 	__be32 hash_val;
236 };
237 
238 struct work_request_hdr {
239 	__be32 wr_hi;
240 	__be32 wr_mid;
241 	__be64 wr_lo;
242 };
243 
244 /* wr_hi fields */
245 #define WR_OP_S    24
246 #define WR_OP_V(x) ((__u64)(x) << WR_OP_S)
247 
248 #define WR_HDR struct work_request_hdr wr
249 
250 /* option 0 fields */
251 #define TX_CHAN_S    2
252 #define TX_CHAN_V(x) ((x) << TX_CHAN_S)
253 
254 #define ULP_MODE_S    8
255 #define ULP_MODE_V(x) ((x) << ULP_MODE_S)
256 
257 #define RCV_BUFSIZ_S    12
258 #define RCV_BUFSIZ_M    0x3FFU
259 #define RCV_BUFSIZ_V(x) ((x) << RCV_BUFSIZ_S)
260 
261 #define SMAC_SEL_S    28
262 #define SMAC_SEL_V(x) ((__u64)(x) << SMAC_SEL_S)
263 
264 #define L2T_IDX_S    36
265 #define L2T_IDX_V(x) ((__u64)(x) << L2T_IDX_S)
266 
267 #define WND_SCALE_S    50
268 #define WND_SCALE_V(x) ((__u64)(x) << WND_SCALE_S)
269 
270 #define KEEP_ALIVE_S    54
271 #define KEEP_ALIVE_V(x) ((__u64)(x) << KEEP_ALIVE_S)
272 #define KEEP_ALIVE_F    KEEP_ALIVE_V(1ULL)
273 
274 #define MSS_IDX_S    60
275 #define MSS_IDX_M    0xF
276 #define MSS_IDX_V(x) ((__u64)(x) << MSS_IDX_S)
277 #define MSS_IDX_G(x) (((x) >> MSS_IDX_S) & MSS_IDX_M)
278 
279 /* option 2 fields */
280 #define RSS_QUEUE_S    0
281 #define RSS_QUEUE_M    0x3FF
282 #define RSS_QUEUE_V(x) ((x) << RSS_QUEUE_S)
283 #define RSS_QUEUE_G(x) (((x) >> RSS_QUEUE_S) & RSS_QUEUE_M)
284 
285 #define RSS_QUEUE_VALID_S    10
286 #define RSS_QUEUE_VALID_V(x) ((x) << RSS_QUEUE_VALID_S)
287 #define RSS_QUEUE_VALID_F    RSS_QUEUE_VALID_V(1U)
288 
289 #define RX_FC_DISABLE_S    20
290 #define RX_FC_DISABLE_V(x) ((x) << RX_FC_DISABLE_S)
291 #define RX_FC_DISABLE_F    RX_FC_DISABLE_V(1U)
292 
293 #define RX_FC_VALID_S    22
294 #define RX_FC_VALID_V(x) ((x) << RX_FC_VALID_S)
295 #define RX_FC_VALID_F    RX_FC_VALID_V(1U)
296 
297 #define RX_CHANNEL_S    26
298 #define RX_CHANNEL_V(x) ((x) << RX_CHANNEL_S)
299 #define RX_CHANNEL_F	RX_CHANNEL_V(1U)
300 
301 #define WND_SCALE_EN_S    28
302 #define WND_SCALE_EN_V(x) ((x) << WND_SCALE_EN_S)
303 #define WND_SCALE_EN_F    WND_SCALE_EN_V(1U)
304 
305 #define T5_OPT_2_VALID_S    31
306 #define T5_OPT_2_VALID_V(x) ((x) << T5_OPT_2_VALID_S)
307 #define T5_OPT_2_VALID_F    T5_OPT_2_VALID_V(1U)
308 
309 struct cpl_pass_open_req {
310 	WR_HDR;
311 	union opcode_tid ot;
312 	__be16 local_port;
313 	__be16 peer_port;
314 	__be32 local_ip;
315 	__be32 peer_ip;
316 	__be64 opt0;
317 	__be64 opt1;
318 };
319 
320 /* option 0 fields */
321 #define NO_CONG_S    4
322 #define NO_CONG_V(x) ((x) << NO_CONG_S)
323 #define NO_CONG_F    NO_CONG_V(1U)
324 
325 #define DELACK_S    5
326 #define DELACK_V(x) ((x) << DELACK_S)
327 #define DELACK_F    DELACK_V(1U)
328 
329 #define NON_OFFLOAD_S		7
330 #define NON_OFFLOAD_V(x)	((x) << NON_OFFLOAD_S)
331 #define NON_OFFLOAD_F		NON_OFFLOAD_V(1U)
332 
333 #define DSCP_S    22
334 #define DSCP_M    0x3F
335 #define DSCP_V(x) ((x) << DSCP_S)
336 #define DSCP_G(x) (((x) >> DSCP_S) & DSCP_M)
337 
338 #define TCAM_BYPASS_S    48
339 #define TCAM_BYPASS_V(x) ((__u64)(x) << TCAM_BYPASS_S)
340 #define TCAM_BYPASS_F    TCAM_BYPASS_V(1ULL)
341 
342 #define NAGLE_S    49
343 #define NAGLE_V(x) ((__u64)(x) << NAGLE_S)
344 #define NAGLE_F    NAGLE_V(1ULL)
345 
346 /* option 1 fields */
347 #define SYN_RSS_ENABLE_S    0
348 #define SYN_RSS_ENABLE_V(x) ((x) << SYN_RSS_ENABLE_S)
349 #define SYN_RSS_ENABLE_F    SYN_RSS_ENABLE_V(1U)
350 
351 #define SYN_RSS_QUEUE_S    2
352 #define SYN_RSS_QUEUE_V(x) ((x) << SYN_RSS_QUEUE_S)
353 
354 #define CONN_POLICY_S    22
355 #define CONN_POLICY_V(x) ((x) << CONN_POLICY_S)
356 
357 struct cpl_pass_open_req6 {
358 	WR_HDR;
359 	union opcode_tid ot;
360 	__be16 local_port;
361 	__be16 peer_port;
362 	__be64 local_ip_hi;
363 	__be64 local_ip_lo;
364 	__be64 peer_ip_hi;
365 	__be64 peer_ip_lo;
366 	__be64 opt0;
367 	__be64 opt1;
368 };
369 
370 struct cpl_pass_open_rpl {
371 	union opcode_tid ot;
372 	u8 rsvd[3];
373 	u8 status;
374 };
375 
376 struct tcp_options {
377 	__be16 mss;
378 	__u8 wsf;
379 #if defined(__LITTLE_ENDIAN_BITFIELD)
380 	__u8:4;
381 	__u8 unknown:1;
382 	__u8:1;
383 	__u8 sack:1;
384 	__u8 tstamp:1;
385 #else
386 	__u8 tstamp:1;
387 	__u8 sack:1;
388 	__u8:1;
389 	__u8 unknown:1;
390 	__u8:4;
391 #endif
392 };
393 
394 struct cpl_pass_accept_req {
395 	union opcode_tid ot;
396 	__be16 rsvd;
397 	__be16 len;
398 	__be32 hdr_len;
399 	__be16 vlan;
400 	__be16 l2info;
401 	__be32 tos_stid;
402 	struct tcp_options tcpopt;
403 };
404 
405 /* cpl_pass_accept_req.hdr_len fields */
406 #define SYN_RX_CHAN_S    0
407 #define SYN_RX_CHAN_M    0xF
408 #define SYN_RX_CHAN_V(x) ((x) << SYN_RX_CHAN_S)
409 #define SYN_RX_CHAN_G(x) (((x) >> SYN_RX_CHAN_S) & SYN_RX_CHAN_M)
410 
411 #define TCP_HDR_LEN_S    10
412 #define TCP_HDR_LEN_M    0x3F
413 #define TCP_HDR_LEN_V(x) ((x) << TCP_HDR_LEN_S)
414 #define TCP_HDR_LEN_G(x) (((x) >> TCP_HDR_LEN_S) & TCP_HDR_LEN_M)
415 
416 #define IP_HDR_LEN_S    16
417 #define IP_HDR_LEN_M    0x3FF
418 #define IP_HDR_LEN_V(x) ((x) << IP_HDR_LEN_S)
419 #define IP_HDR_LEN_G(x) (((x) >> IP_HDR_LEN_S) & IP_HDR_LEN_M)
420 
421 #define ETH_HDR_LEN_S    26
422 #define ETH_HDR_LEN_M    0x1F
423 #define ETH_HDR_LEN_V(x) ((x) << ETH_HDR_LEN_S)
424 #define ETH_HDR_LEN_G(x) (((x) >> ETH_HDR_LEN_S) & ETH_HDR_LEN_M)
425 
426 /* cpl_pass_accept_req.l2info fields */
427 #define SYN_MAC_IDX_S    0
428 #define SYN_MAC_IDX_M    0x1FF
429 #define SYN_MAC_IDX_V(x) ((x) << SYN_MAC_IDX_S)
430 #define SYN_MAC_IDX_G(x) (((x) >> SYN_MAC_IDX_S) & SYN_MAC_IDX_M)
431 
432 #define SYN_XACT_MATCH_S    9
433 #define SYN_XACT_MATCH_V(x) ((x) << SYN_XACT_MATCH_S)
434 #define SYN_XACT_MATCH_F    SYN_XACT_MATCH_V(1U)
435 
436 #define SYN_INTF_S    12
437 #define SYN_INTF_M    0xF
438 #define SYN_INTF_V(x) ((x) << SYN_INTF_S)
439 #define SYN_INTF_G(x) (((x) >> SYN_INTF_S) & SYN_INTF_M)
440 
441 enum {                     /* TCP congestion control algorithms */
442 	CONG_ALG_RENO,
443 	CONG_ALG_TAHOE,
444 	CONG_ALG_NEWRENO,
445 	CONG_ALG_HIGHSPEED
446 };
447 
448 #define CONG_CNTRL_S    14
449 #define CONG_CNTRL_M    0x3
450 #define CONG_CNTRL_V(x) ((x) << CONG_CNTRL_S)
451 #define CONG_CNTRL_G(x) (((x) >> CONG_CNTRL_S) & CONG_CNTRL_M)
452 
453 #define T5_ISS_S    18
454 #define T5_ISS_V(x) ((x) << T5_ISS_S)
455 #define T5_ISS_F    T5_ISS_V(1U)
456 
457 struct cpl_pass_accept_rpl {
458 	WR_HDR;
459 	union opcode_tid ot;
460 	__be32 opt2;
461 	__be64 opt0;
462 };
463 
464 /* option 2 fields */
465 #define RX_COALESCE_VALID_S    11
466 #define RX_COALESCE_VALID_V(x) ((x) << RX_COALESCE_VALID_S)
467 #define RX_COALESCE_VALID_F    RX_COALESCE_VALID_V(1U)
468 
469 #define RX_COALESCE_S    12
470 #define RX_COALESCE_V(x) ((x) << RX_COALESCE_S)
471 
472 #define PACE_S    16
473 #define PACE_V(x) ((x) << PACE_S)
474 
475 #define TX_QUEUE_S    23
476 #define TX_QUEUE_M    0x7
477 #define TX_QUEUE_V(x) ((x) << TX_QUEUE_S)
478 #define TX_QUEUE_G(x) (((x) >> TX_QUEUE_S) & TX_QUEUE_M)
479 
480 #define CCTRL_ECN_S    27
481 #define CCTRL_ECN_V(x) ((x) << CCTRL_ECN_S)
482 #define CCTRL_ECN_F    CCTRL_ECN_V(1U)
483 
484 #define TSTAMPS_EN_S    29
485 #define TSTAMPS_EN_V(x) ((x) << TSTAMPS_EN_S)
486 #define TSTAMPS_EN_F    TSTAMPS_EN_V(1U)
487 
488 #define SACK_EN_S    30
489 #define SACK_EN_V(x) ((x) << SACK_EN_S)
490 #define SACK_EN_F    SACK_EN_V(1U)
491 
492 struct cpl_t5_pass_accept_rpl {
493 	WR_HDR;
494 	union opcode_tid ot;
495 	__be32 opt2;
496 	__be64 opt0;
497 	__be32 iss;
498 	__be32 rsvd;
499 };
500 
501 struct cpl_act_open_req {
502 	WR_HDR;
503 	union opcode_tid ot;
504 	__be16 local_port;
505 	__be16 peer_port;
506 	__be32 local_ip;
507 	__be32 peer_ip;
508 	__be64 opt0;
509 	__be32 params;
510 	__be32 opt2;
511 };
512 
513 #define FILTER_TUPLE_S  24
514 #define FILTER_TUPLE_M  0xFFFFFFFFFF
515 #define FILTER_TUPLE_V(x) ((x) << FILTER_TUPLE_S)
516 #define FILTER_TUPLE_G(x) (((x) >> FILTER_TUPLE_S) & FILTER_TUPLE_M)
517 struct cpl_t5_act_open_req {
518 	WR_HDR;
519 	union opcode_tid ot;
520 	__be16 local_port;
521 	__be16 peer_port;
522 	__be32 local_ip;
523 	__be32 peer_ip;
524 	__be64 opt0;
525 	__be32 rsvd;
526 	__be32 opt2;
527 	__be64 params;
528 };
529 
530 struct cpl_t6_act_open_req {
531 	WR_HDR;
532 	union opcode_tid ot;
533 	__be16 local_port;
534 	__be16 peer_port;
535 	__be32 local_ip;
536 	__be32 peer_ip;
537 	__be64 opt0;
538 	__be32 rsvd;
539 	__be32 opt2;
540 	__be64 params;
541 	__be32 rsvd2;
542 	__be32 opt3;
543 };
544 
545 struct cpl_act_open_req6 {
546 	WR_HDR;
547 	union opcode_tid ot;
548 	__be16 local_port;
549 	__be16 peer_port;
550 	__be64 local_ip_hi;
551 	__be64 local_ip_lo;
552 	__be64 peer_ip_hi;
553 	__be64 peer_ip_lo;
554 	__be64 opt0;
555 	__be32 params;
556 	__be32 opt2;
557 };
558 
559 struct cpl_t5_act_open_req6 {
560 	WR_HDR;
561 	union opcode_tid ot;
562 	__be16 local_port;
563 	__be16 peer_port;
564 	__be64 local_ip_hi;
565 	__be64 local_ip_lo;
566 	__be64 peer_ip_hi;
567 	__be64 peer_ip_lo;
568 	__be64 opt0;
569 	__be32 rsvd;
570 	__be32 opt2;
571 	__be64 params;
572 };
573 
574 struct cpl_t6_act_open_req6 {
575 	WR_HDR;
576 	union opcode_tid ot;
577 	__be16 local_port;
578 	__be16 peer_port;
579 	__be64 local_ip_hi;
580 	__be64 local_ip_lo;
581 	__be64 peer_ip_hi;
582 	__be64 peer_ip_lo;
583 	__be64 opt0;
584 	__be32 rsvd;
585 	__be32 opt2;
586 	__be64 params;
587 	__be32 rsvd2;
588 	__be32 opt3;
589 };
590 
591 struct cpl_act_open_rpl {
592 	union opcode_tid ot;
593 	__be32 atid_status;
594 };
595 
596 /* cpl_act_open_rpl.atid_status fields */
597 #define AOPEN_STATUS_S    0
598 #define AOPEN_STATUS_M    0xFF
599 #define AOPEN_STATUS_G(x) (((x) >> AOPEN_STATUS_S) & AOPEN_STATUS_M)
600 
601 #define AOPEN_ATID_S    8
602 #define AOPEN_ATID_M    0xFFFFFF
603 #define AOPEN_ATID_G(x) (((x) >> AOPEN_ATID_S) & AOPEN_ATID_M)
604 
605 struct cpl_pass_establish {
606 	union opcode_tid ot;
607 	__be32 rsvd;
608 	__be32 tos_stid;
609 	__be16 mac_idx;
610 	__be16 tcp_opt;
611 	__be32 snd_isn;
612 	__be32 rcv_isn;
613 };
614 
615 /* cpl_pass_establish.tos_stid fields */
616 #define PASS_OPEN_TID_S    0
617 #define PASS_OPEN_TID_M    0xFFFFFF
618 #define PASS_OPEN_TID_V(x) ((x) << PASS_OPEN_TID_S)
619 #define PASS_OPEN_TID_G(x) (((x) >> PASS_OPEN_TID_S) & PASS_OPEN_TID_M)
620 
621 #define PASS_OPEN_TOS_S    24
622 #define PASS_OPEN_TOS_M    0xFF
623 #define PASS_OPEN_TOS_V(x) ((x) << PASS_OPEN_TOS_S)
624 #define PASS_OPEN_TOS_G(x) (((x) >> PASS_OPEN_TOS_S) & PASS_OPEN_TOS_M)
625 
626 /* cpl_pass_establish.tcp_opt fields (also applies to act_open_establish) */
627 #define TCPOPT_WSCALE_OK_S	5
628 #define TCPOPT_WSCALE_OK_M	0x1
629 #define TCPOPT_WSCALE_OK_G(x)	\
630 	(((x) >> TCPOPT_WSCALE_OK_S) & TCPOPT_WSCALE_OK_M)
631 
632 #define TCPOPT_SACK_S		6
633 #define TCPOPT_SACK_M		0x1
634 #define TCPOPT_SACK_G(x)	(((x) >> TCPOPT_SACK_S) & TCPOPT_SACK_M)
635 
636 #define TCPOPT_TSTAMP_S		7
637 #define TCPOPT_TSTAMP_M		0x1
638 #define TCPOPT_TSTAMP_G(x)	(((x) >> TCPOPT_TSTAMP_S) & TCPOPT_TSTAMP_M)
639 
640 #define TCPOPT_SND_WSCALE_S	8
641 #define TCPOPT_SND_WSCALE_M	0xF
642 #define TCPOPT_SND_WSCALE_G(x)	\
643 	(((x) >> TCPOPT_SND_WSCALE_S) & TCPOPT_SND_WSCALE_M)
644 
645 #define TCPOPT_MSS_S	12
646 #define TCPOPT_MSS_M	0xF
647 #define TCPOPT_MSS_G(x)	(((x) >> TCPOPT_MSS_S) & TCPOPT_MSS_M)
648 
649 #define T6_TCP_HDR_LEN_S   8
650 #define T6_TCP_HDR_LEN_V(x) ((x) << T6_TCP_HDR_LEN_S)
651 #define T6_TCP_HDR_LEN_G(x) (((x) >> T6_TCP_HDR_LEN_S) & TCP_HDR_LEN_M)
652 
653 #define T6_IP_HDR_LEN_S    14
654 #define T6_IP_HDR_LEN_V(x) ((x) << T6_IP_HDR_LEN_S)
655 #define T6_IP_HDR_LEN_G(x) (((x) >> T6_IP_HDR_LEN_S) & IP_HDR_LEN_M)
656 
657 #define T6_ETH_HDR_LEN_S    24
658 #define T6_ETH_HDR_LEN_M    0xFF
659 #define T6_ETH_HDR_LEN_V(x) ((x) << T6_ETH_HDR_LEN_S)
660 #define T6_ETH_HDR_LEN_G(x) (((x) >> T6_ETH_HDR_LEN_S) & T6_ETH_HDR_LEN_M)
661 
662 struct cpl_act_establish {
663 	union opcode_tid ot;
664 	__be32 rsvd;
665 	__be32 tos_atid;
666 	__be16 mac_idx;
667 	__be16 tcp_opt;
668 	__be32 snd_isn;
669 	__be32 rcv_isn;
670 };
671 
672 struct cpl_get_tcb {
673 	WR_HDR;
674 	union opcode_tid ot;
675 	__be16 reply_ctrl;
676 	__be16 cookie;
677 };
678 
679 /* cpl_get_tcb.reply_ctrl fields */
680 #define QUEUENO_S    0
681 #define QUEUENO_V(x) ((x) << QUEUENO_S)
682 
683 #define REPLY_CHAN_S    14
684 #define REPLY_CHAN_V(x) ((x) << REPLY_CHAN_S)
685 #define REPLY_CHAN_F    REPLY_CHAN_V(1U)
686 
687 #define NO_REPLY_S    15
688 #define NO_REPLY_V(x) ((x) << NO_REPLY_S)
689 #define NO_REPLY_F    NO_REPLY_V(1U)
690 
691 struct cpl_set_tcb_field {
692 	WR_HDR;
693 	union opcode_tid ot;
694 	__be16 reply_ctrl;
695 	__be16 word_cookie;
696 	__be64 mask;
697 	__be64 val;
698 };
699 
700 /* cpl_set_tcb_field.word_cookie fields */
701 #define TCB_WORD_S	0
702 #define TCB_WORD_V(x)	((x) << TCB_WORD_S)
703 
704 #define TCB_COOKIE_S    5
705 #define TCB_COOKIE_M    0x7
706 #define TCB_COOKIE_V(x) ((x) << TCB_COOKIE_S)
707 #define TCB_COOKIE_G(x) (((x) >> TCB_COOKIE_S) & TCB_COOKIE_M)
708 
709 struct cpl_set_tcb_rpl {
710 	union opcode_tid ot;
711 	__be16 rsvd;
712 	u8 cookie;
713 	u8 status;
714 	__be64 oldval;
715 };
716 
717 struct cpl_close_con_req {
718 	WR_HDR;
719 	union opcode_tid ot;
720 	__be32 rsvd;
721 };
722 
723 struct cpl_close_con_rpl {
724 	union opcode_tid ot;
725 	u8 rsvd[3];
726 	u8 status;
727 	__be32 snd_nxt;
728 	__be32 rcv_nxt;
729 };
730 
731 struct cpl_close_listsvr_req {
732 	WR_HDR;
733 	union opcode_tid ot;
734 	__be16 reply_ctrl;
735 	__be16 rsvd;
736 };
737 
738 /* additional cpl_close_listsvr_req.reply_ctrl field */
739 #define LISTSVR_IPV6_S    14
740 #define LISTSVR_IPV6_V(x) ((x) << LISTSVR_IPV6_S)
741 #define LISTSVR_IPV6_F    LISTSVR_IPV6_V(1U)
742 
743 struct cpl_close_listsvr_rpl {
744 	union opcode_tid ot;
745 	u8 rsvd[3];
746 	u8 status;
747 };
748 
749 struct cpl_abort_req_rss {
750 	union opcode_tid ot;
751 	u8 rsvd[3];
752 	u8 status;
753 };
754 
755 struct cpl_abort_req_rss6 {
756 	union opcode_tid ot;
757 	__be32 srqidx_status;
758 };
759 
760 #define ABORT_RSS_STATUS_S    0
761 #define ABORT_RSS_STATUS_M    0xff
762 #define ABORT_RSS_STATUS_V(x) ((x) << ABORT_RSS_STATUS_S)
763 #define ABORT_RSS_STATUS_G(x) (((x) >> ABORT_RSS_STATUS_S) & ABORT_RSS_STATUS_M)
764 
765 #define ABORT_RSS_SRQIDX_S    8
766 #define ABORT_RSS_SRQIDX_M    0xffffff
767 #define ABORT_RSS_SRQIDX_V(x) ((x) << ABORT_RSS_SRQIDX_S)
768 #define ABORT_RSS_SRQIDX_G(x) (((x) >> ABORT_RSS_SRQIDX_S) & ABORT_RSS_SRQIDX_M)
769 
770 struct cpl_abort_req {
771 	WR_HDR;
772 	union opcode_tid ot;
773 	__be32 rsvd0;
774 	u8 rsvd1;
775 	u8 cmd;
776 	u8 rsvd2[6];
777 };
778 
779 struct cpl_abort_rpl_rss {
780 	union opcode_tid ot;
781 	u8 rsvd[3];
782 	u8 status;
783 };
784 
785 struct cpl_abort_rpl_rss6 {
786 	union opcode_tid ot;
787 	__be32 srqidx_status;
788 };
789 
790 struct cpl_abort_rpl {
791 	WR_HDR;
792 	union opcode_tid ot;
793 	__be32 rsvd0;
794 	u8 rsvd1;
795 	u8 cmd;
796 	u8 rsvd2[6];
797 };
798 
799 struct cpl_peer_close {
800 	union opcode_tid ot;
801 	__be32 rcv_nxt;
802 };
803 
804 struct cpl_tid_release {
805 	WR_HDR;
806 	union opcode_tid ot;
807 	__be32 rsvd;
808 };
809 
810 struct cpl_tx_pkt_core {
811 	__be32 ctrl0;
812 	__be16 pack;
813 	__be16 len;
814 	__be64 ctrl1;
815 };
816 
817 struct cpl_tx_pkt {
818 	WR_HDR;
819 	struct cpl_tx_pkt_core c;
820 };
821 
822 #define cpl_tx_pkt_xt cpl_tx_pkt
823 
824 /* cpl_tx_pkt_core.ctrl0 fields */
825 #define TXPKT_VF_S    0
826 #define TXPKT_VF_V(x) ((x) << TXPKT_VF_S)
827 
828 #define TXPKT_PF_S    8
829 #define TXPKT_PF_V(x) ((x) << TXPKT_PF_S)
830 
831 #define TXPKT_VF_VLD_S    11
832 #define TXPKT_VF_VLD_V(x) ((x) << TXPKT_VF_VLD_S)
833 #define TXPKT_VF_VLD_F    TXPKT_VF_VLD_V(1U)
834 
835 #define TXPKT_OVLAN_IDX_S    12
836 #define TXPKT_OVLAN_IDX_V(x) ((x) << TXPKT_OVLAN_IDX_S)
837 
838 #define TXPKT_T5_OVLAN_IDX_S	12
839 #define TXPKT_T5_OVLAN_IDX_V(x)	((x) << TXPKT_T5_OVLAN_IDX_S)
840 
841 #define TXPKT_INTF_S    16
842 #define TXPKT_INTF_V(x) ((x) << TXPKT_INTF_S)
843 
844 #define TXPKT_INS_OVLAN_S    21
845 #define TXPKT_INS_OVLAN_V(x) ((x) << TXPKT_INS_OVLAN_S)
846 #define TXPKT_INS_OVLAN_F    TXPKT_INS_OVLAN_V(1U)
847 
848 #define TXPKT_TSTAMP_S    23
849 #define TXPKT_TSTAMP_V(x) ((x) << TXPKT_TSTAMP_S)
850 #define TXPKT_TSTAMP_F    TXPKT_TSTAMP_V(1ULL)
851 
852 #define TXPKT_OPCODE_S    24
853 #define TXPKT_OPCODE_V(x) ((x) << TXPKT_OPCODE_S)
854 
855 /* cpl_tx_pkt_core.ctrl1 fields */
856 #define TXPKT_CSUM_END_S    12
857 #define TXPKT_CSUM_END_V(x) ((x) << TXPKT_CSUM_END_S)
858 
859 #define TXPKT_CSUM_START_S    20
860 #define TXPKT_CSUM_START_V(x) ((x) << TXPKT_CSUM_START_S)
861 
862 #define TXPKT_IPHDR_LEN_S    20
863 #define TXPKT_IPHDR_LEN_V(x) ((__u64)(x) << TXPKT_IPHDR_LEN_S)
864 
865 #define TXPKT_CSUM_LOC_S    30
866 #define TXPKT_CSUM_LOC_V(x) ((__u64)(x) << TXPKT_CSUM_LOC_S)
867 
868 #define TXPKT_ETHHDR_LEN_S    34
869 #define TXPKT_ETHHDR_LEN_V(x) ((__u64)(x) << TXPKT_ETHHDR_LEN_S)
870 
871 #define T6_TXPKT_ETHHDR_LEN_S    32
872 #define T6_TXPKT_ETHHDR_LEN_V(x) ((__u64)(x) << T6_TXPKT_ETHHDR_LEN_S)
873 
874 #define TXPKT_CSUM_TYPE_S    40
875 #define TXPKT_CSUM_TYPE_V(x) ((__u64)(x) << TXPKT_CSUM_TYPE_S)
876 
877 #define TXPKT_VLAN_S    44
878 #define TXPKT_VLAN_V(x) ((__u64)(x) << TXPKT_VLAN_S)
879 
880 #define TXPKT_VLAN_VLD_S    60
881 #define TXPKT_VLAN_VLD_V(x) ((__u64)(x) << TXPKT_VLAN_VLD_S)
882 #define TXPKT_VLAN_VLD_F    TXPKT_VLAN_VLD_V(1ULL)
883 
884 #define TXPKT_IPCSUM_DIS_S    62
885 #define TXPKT_IPCSUM_DIS_V(x) ((__u64)(x) << TXPKT_IPCSUM_DIS_S)
886 #define TXPKT_IPCSUM_DIS_F    TXPKT_IPCSUM_DIS_V(1ULL)
887 
888 #define TXPKT_L4CSUM_DIS_S    63
889 #define TXPKT_L4CSUM_DIS_V(x) ((__u64)(x) << TXPKT_L4CSUM_DIS_S)
890 #define TXPKT_L4CSUM_DIS_F    TXPKT_L4CSUM_DIS_V(1ULL)
891 
892 struct cpl_tx_pkt_lso_core {
893 	__be32 lso_ctrl;
894 	__be16 ipid_ofst;
895 	__be16 mss;
896 	__be32 seqno_offset;
897 	__be32 len;
898 	/* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
899 };
900 
901 /* cpl_tx_pkt_lso_core.lso_ctrl fields */
902 #define LSO_TCPHDR_LEN_S    0
903 #define LSO_TCPHDR_LEN_V(x) ((x) << LSO_TCPHDR_LEN_S)
904 
905 #define LSO_IPHDR_LEN_S    4
906 #define LSO_IPHDR_LEN_V(x) ((x) << LSO_IPHDR_LEN_S)
907 
908 #define LSO_ETHHDR_LEN_S    16
909 #define LSO_ETHHDR_LEN_V(x) ((x) << LSO_ETHHDR_LEN_S)
910 
911 #define LSO_IPV6_S    20
912 #define LSO_IPV6_V(x) ((x) << LSO_IPV6_S)
913 #define LSO_IPV6_F    LSO_IPV6_V(1U)
914 
915 #define LSO_LAST_SLICE_S    22
916 #define LSO_LAST_SLICE_V(x) ((x) << LSO_LAST_SLICE_S)
917 #define LSO_LAST_SLICE_F    LSO_LAST_SLICE_V(1U)
918 
919 #define LSO_FIRST_SLICE_S    23
920 #define LSO_FIRST_SLICE_V(x) ((x) << LSO_FIRST_SLICE_S)
921 #define LSO_FIRST_SLICE_F    LSO_FIRST_SLICE_V(1U)
922 
923 #define LSO_OPCODE_S    24
924 #define LSO_OPCODE_V(x) ((x) << LSO_OPCODE_S)
925 
926 #define LSO_T5_XFER_SIZE_S	   0
927 #define LSO_T5_XFER_SIZE_V(x) ((x) << LSO_T5_XFER_SIZE_S)
928 
929 struct cpl_tx_pkt_lso {
930 	WR_HDR;
931 	struct cpl_tx_pkt_lso_core c;
932 	/* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
933 };
934 
935 struct cpl_iscsi_hdr {
936 	union opcode_tid ot;
937 	__be16 pdu_len_ddp;
938 	__be16 len;
939 	__be32 seq;
940 	__be16 urg;
941 	u8 rsvd;
942 	u8 status;
943 };
944 
945 /* cpl_iscsi_hdr.pdu_len_ddp fields */
946 #define ISCSI_PDU_LEN_S    0
947 #define ISCSI_PDU_LEN_M    0x7FFF
948 #define ISCSI_PDU_LEN_V(x) ((x) << ISCSI_PDU_LEN_S)
949 #define ISCSI_PDU_LEN_G(x) (((x) >> ISCSI_PDU_LEN_S) & ISCSI_PDU_LEN_M)
950 
951 #define ISCSI_DDP_S    15
952 #define ISCSI_DDP_V(x) ((x) << ISCSI_DDP_S)
953 #define ISCSI_DDP_F    ISCSI_DDP_V(1U)
954 
955 struct cpl_rx_data_ddp {
956 	union opcode_tid ot;
957 	__be16 urg;
958 	__be16 len;
959 	__be32 seq;
960 	union {
961 		__be32 nxt_seq;
962 		__be32 ddp_report;
963 	};
964 	__be32 ulp_crc;
965 	__be32 ddpvld;
966 };
967 
968 #define cpl_rx_iscsi_ddp cpl_rx_data_ddp
969 
970 struct cpl_iscsi_data {
971 	union opcode_tid ot;
972 	__u8 rsvd0[2];
973 	__be16 len;
974 	__be32 seq;
975 	__be16 urg;
976 	__u8 rsvd1;
977 	__u8 status;
978 };
979 
980 struct cpl_rx_iscsi_cmp {
981 	union opcode_tid ot;
982 	__be16 pdu_len_ddp;
983 	__be16 len;
984 	__be32 seq;
985 	__be16 urg;
986 	__u8 rsvd;
987 	__u8 status;
988 	__be32 ulp_crc;
989 	__be32 ddpvld;
990 };
991 
992 struct cpl_tx_data_iso {
993 	__be32 op_to_scsi;
994 	__u8   reserved1;
995 	__u8   ahs_len;
996 	__be16 mpdu;
997 	__be32 burst_size;
998 	__be32 len;
999 	__be32 reserved2_seglen_offset;
1000 	__be32 datasn_offset;
1001 	__be32 buffer_offset;
1002 	__be32 reserved3;
1003 
1004 	/* encapsulated CPL_TX_DATA follows here */
1005 };
1006 
1007 /* cpl_tx_data_iso.op_to_scsi fields */
1008 #define CPL_TX_DATA_ISO_OP_S	24
1009 #define CPL_TX_DATA_ISO_OP_M	0xff
1010 #define CPL_TX_DATA_ISO_OP_V(x)	((x) << CPL_TX_DATA_ISO_OP_S)
1011 #define CPL_TX_DATA_ISO_OP_G(x)	\
1012 	(((x) >> CPL_TX_DATA_ISO_OP_S) & CPL_TX_DATA_ISO_OP_M)
1013 
1014 #define CPL_TX_DATA_ISO_FIRST_S		23
1015 #define CPL_TX_DATA_ISO_FIRST_M		0x1
1016 #define CPL_TX_DATA_ISO_FIRST_V(x)	((x) << CPL_TX_DATA_ISO_FIRST_S)
1017 #define CPL_TX_DATA_ISO_FIRST_G(x)	\
1018 	(((x) >> CPL_TX_DATA_ISO_FIRST_S) & CPL_TX_DATA_ISO_FIRST_M)
1019 #define CPL_TX_DATA_ISO_FIRST_F	CPL_TX_DATA_ISO_FIRST_V(1U)
1020 
1021 #define CPL_TX_DATA_ISO_LAST_S		22
1022 #define CPL_TX_DATA_ISO_LAST_M		0x1
1023 #define CPL_TX_DATA_ISO_LAST_V(x)	((x) << CPL_TX_DATA_ISO_LAST_S)
1024 #define CPL_TX_DATA_ISO_LAST_G(x)	\
1025 	(((x) >> CPL_TX_DATA_ISO_LAST_S) & CPL_TX_DATA_ISO_LAST_M)
1026 #define CPL_TX_DATA_ISO_LAST_F	CPL_TX_DATA_ISO_LAST_V(1U)
1027 
1028 #define CPL_TX_DATA_ISO_CPLHDRLEN_S	21
1029 #define CPL_TX_DATA_ISO_CPLHDRLEN_M	0x1
1030 #define CPL_TX_DATA_ISO_CPLHDRLEN_V(x)	((x) << CPL_TX_DATA_ISO_CPLHDRLEN_S)
1031 #define CPL_TX_DATA_ISO_CPLHDRLEN_G(x)	\
1032 	(((x) >> CPL_TX_DATA_ISO_CPLHDRLEN_S) & CPL_TX_DATA_ISO_CPLHDRLEN_M)
1033 #define CPL_TX_DATA_ISO_CPLHDRLEN_F	CPL_TX_DATA_ISO_CPLHDRLEN_V(1U)
1034 
1035 #define CPL_TX_DATA_ISO_HDRCRC_S	20
1036 #define CPL_TX_DATA_ISO_HDRCRC_M	0x1
1037 #define CPL_TX_DATA_ISO_HDRCRC_V(x)	((x) << CPL_TX_DATA_ISO_HDRCRC_S)
1038 #define CPL_TX_DATA_ISO_HDRCRC_G(x)	\
1039 	(((x) >> CPL_TX_DATA_ISO_HDRCRC_S) & CPL_TX_DATA_ISO_HDRCRC_M)
1040 #define CPL_TX_DATA_ISO_HDRCRC_F	CPL_TX_DATA_ISO_HDRCRC_V(1U)
1041 
1042 #define CPL_TX_DATA_ISO_PLDCRC_S	19
1043 #define CPL_TX_DATA_ISO_PLDCRC_M	0x1
1044 #define CPL_TX_DATA_ISO_PLDCRC_V(x)	((x) << CPL_TX_DATA_ISO_PLDCRC_S)
1045 #define CPL_TX_DATA_ISO_PLDCRC_G(x)	\
1046 	(((x) >> CPL_TX_DATA_ISO_PLDCRC_S) & CPL_TX_DATA_ISO_PLDCRC_M)
1047 #define CPL_TX_DATA_ISO_PLDCRC_F	CPL_TX_DATA_ISO_PLDCRC_V(1U)
1048 
1049 #define CPL_TX_DATA_ISO_IMMEDIATE_S	18
1050 #define CPL_TX_DATA_ISO_IMMEDIATE_M	0x1
1051 #define CPL_TX_DATA_ISO_IMMEDIATE_V(x)	((x) << CPL_TX_DATA_ISO_IMMEDIATE_S)
1052 #define CPL_TX_DATA_ISO_IMMEDIATE_G(x)	\
1053 	(((x) >> CPL_TX_DATA_ISO_IMMEDIATE_S) & CPL_TX_DATA_ISO_IMMEDIATE_M)
1054 #define CPL_TX_DATA_ISO_IMMEDIATE_F	CPL_TX_DATA_ISO_IMMEDIATE_V(1U)
1055 
1056 #define CPL_TX_DATA_ISO_SCSI_S		16
1057 #define CPL_TX_DATA_ISO_SCSI_M		0x3
1058 #define CPL_TX_DATA_ISO_SCSI_V(x)	((x) << CPL_TX_DATA_ISO_SCSI_S)
1059 #define CPL_TX_DATA_ISO_SCSI_G(x)	\
1060 	(((x) >> CPL_TX_DATA_ISO_SCSI_S) & CPL_TX_DATA_ISO_SCSI_M)
1061 
1062 /* cpl_tx_data_iso.reserved2_seglen_offset fields */
1063 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_S		0
1064 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_M		0xffffff
1065 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_V(x)	\
1066 	((x) << CPL_TX_DATA_ISO_SEGLEN_OFFSET_S)
1067 #define CPL_TX_DATA_ISO_SEGLEN_OFFSET_G(x)	\
1068 	(((x) >> CPL_TX_DATA_ISO_SEGLEN_OFFSET_S) & \
1069 	 CPL_TX_DATA_ISO_SEGLEN_OFFSET_M)
1070 
1071 struct cpl_rx_data {
1072 	union opcode_tid ot;
1073 	__be16 rsvd;
1074 	__be16 len;
1075 	__be32 seq;
1076 	__be16 urg;
1077 #if defined(__LITTLE_ENDIAN_BITFIELD)
1078 	u8 dack_mode:2;
1079 	u8 psh:1;
1080 	u8 heartbeat:1;
1081 	u8 ddp_off:1;
1082 	u8 :3;
1083 #else
1084 	u8 :3;
1085 	u8 ddp_off:1;
1086 	u8 heartbeat:1;
1087 	u8 psh:1;
1088 	u8 dack_mode:2;
1089 #endif
1090 	u8 status;
1091 };
1092 
1093 struct cpl_rx_data_ack {
1094 	WR_HDR;
1095 	union opcode_tid ot;
1096 	__be32 credit_dack;
1097 };
1098 
1099 /* cpl_rx_data_ack.ack_seq fields */
1100 #define RX_CREDITS_S    0
1101 #define RX_CREDITS_V(x) ((x) << RX_CREDITS_S)
1102 
1103 #define RX_FORCE_ACK_S    28
1104 #define RX_FORCE_ACK_V(x) ((x) << RX_FORCE_ACK_S)
1105 #define RX_FORCE_ACK_F    RX_FORCE_ACK_V(1U)
1106 
1107 #define RX_DACK_MODE_S    29
1108 #define RX_DACK_MODE_M    0x3
1109 #define RX_DACK_MODE_V(x) ((x) << RX_DACK_MODE_S)
1110 #define RX_DACK_MODE_G(x) (((x) >> RX_DACK_MODE_S) & RX_DACK_MODE_M)
1111 
1112 #define RX_DACK_CHANGE_S    31
1113 #define RX_DACK_CHANGE_V(x) ((x) << RX_DACK_CHANGE_S)
1114 #define RX_DACK_CHANGE_F    RX_DACK_CHANGE_V(1U)
1115 
1116 struct cpl_rx_pkt {
1117 	struct rss_header rsshdr;
1118 	u8 opcode;
1119 #if defined(__LITTLE_ENDIAN_BITFIELD)
1120 	u8 iff:4;
1121 	u8 csum_calc:1;
1122 	u8 ipmi_pkt:1;
1123 	u8 vlan_ex:1;
1124 	u8 ip_frag:1;
1125 #else
1126 	u8 ip_frag:1;
1127 	u8 vlan_ex:1;
1128 	u8 ipmi_pkt:1;
1129 	u8 csum_calc:1;
1130 	u8 iff:4;
1131 #endif
1132 	__be16 csum;
1133 	__be16 vlan;
1134 	__be16 len;
1135 	__be32 l2info;
1136 	__be16 hdr_len;
1137 	__be16 err_vec;
1138 };
1139 
1140 #define RX_T6_ETHHDR_LEN_M    0xFF
1141 #define RX_T6_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_T6_ETHHDR_LEN_M)
1142 
1143 #define RXF_PSH_S    20
1144 #define RXF_PSH_V(x) ((x) << RXF_PSH_S)
1145 #define RXF_PSH_F    RXF_PSH_V(1U)
1146 
1147 #define RXF_SYN_S    21
1148 #define RXF_SYN_V(x) ((x) << RXF_SYN_S)
1149 #define RXF_SYN_F    RXF_SYN_V(1U)
1150 
1151 #define RXF_UDP_S    22
1152 #define RXF_UDP_V(x) ((x) << RXF_UDP_S)
1153 #define RXF_UDP_F    RXF_UDP_V(1U)
1154 
1155 #define RXF_TCP_S    23
1156 #define RXF_TCP_V(x) ((x) << RXF_TCP_S)
1157 #define RXF_TCP_F    RXF_TCP_V(1U)
1158 
1159 #define RXF_IP_S    24
1160 #define RXF_IP_V(x) ((x) << RXF_IP_S)
1161 #define RXF_IP_F    RXF_IP_V(1U)
1162 
1163 #define RXF_IP6_S    25
1164 #define RXF_IP6_V(x) ((x) << RXF_IP6_S)
1165 #define RXF_IP6_F    RXF_IP6_V(1U)
1166 
1167 #define RXF_SYN_COOKIE_S    26
1168 #define RXF_SYN_COOKIE_V(x) ((x) << RXF_SYN_COOKIE_S)
1169 #define RXF_SYN_COOKIE_F    RXF_SYN_COOKIE_V(1U)
1170 
1171 #define RXF_FCOE_S    26
1172 #define RXF_FCOE_V(x) ((x) << RXF_FCOE_S)
1173 #define RXF_FCOE_F    RXF_FCOE_V(1U)
1174 
1175 #define RXF_LRO_S    27
1176 #define RXF_LRO_V(x) ((x) << RXF_LRO_S)
1177 #define RXF_LRO_F    RXF_LRO_V(1U)
1178 
1179 /* rx_pkt.l2info fields */
1180 #define RX_ETHHDR_LEN_S    0
1181 #define RX_ETHHDR_LEN_M    0x1F
1182 #define RX_ETHHDR_LEN_V(x) ((x) << RX_ETHHDR_LEN_S)
1183 #define RX_ETHHDR_LEN_G(x) (((x) >> RX_ETHHDR_LEN_S) & RX_ETHHDR_LEN_M)
1184 
1185 #define RX_T5_ETHHDR_LEN_S    0
1186 #define RX_T5_ETHHDR_LEN_M    0x3F
1187 #define RX_T5_ETHHDR_LEN_V(x) ((x) << RX_T5_ETHHDR_LEN_S)
1188 #define RX_T5_ETHHDR_LEN_G(x) (((x) >> RX_T5_ETHHDR_LEN_S) & RX_T5_ETHHDR_LEN_M)
1189 
1190 #define RX_MACIDX_S    8
1191 #define RX_MACIDX_M    0x1FF
1192 #define RX_MACIDX_V(x) ((x) << RX_MACIDX_S)
1193 #define RX_MACIDX_G(x) (((x) >> RX_MACIDX_S) & RX_MACIDX_M)
1194 
1195 #define RXF_SYN_S    21
1196 #define RXF_SYN_V(x) ((x) << RXF_SYN_S)
1197 #define RXF_SYN_F    RXF_SYN_V(1U)
1198 
1199 #define RX_CHAN_S    28
1200 #define RX_CHAN_M    0xF
1201 #define RX_CHAN_V(x) ((x) << RX_CHAN_S)
1202 #define RX_CHAN_G(x) (((x) >> RX_CHAN_S) & RX_CHAN_M)
1203 
1204 /* rx_pkt.hdr_len fields */
1205 #define RX_TCPHDR_LEN_S    0
1206 #define RX_TCPHDR_LEN_M    0x3F
1207 #define RX_TCPHDR_LEN_V(x) ((x) << RX_TCPHDR_LEN_S)
1208 #define RX_TCPHDR_LEN_G(x) (((x) >> RX_TCPHDR_LEN_S) & RX_TCPHDR_LEN_M)
1209 
1210 #define RX_IPHDR_LEN_S    6
1211 #define RX_IPHDR_LEN_M    0x3FF
1212 #define RX_IPHDR_LEN_V(x) ((x) << RX_IPHDR_LEN_S)
1213 #define RX_IPHDR_LEN_G(x) (((x) >> RX_IPHDR_LEN_S) & RX_IPHDR_LEN_M)
1214 
1215 /* rx_pkt.err_vec fields */
1216 #define RXERR_CSUM_S    13
1217 #define RXERR_CSUM_V(x) ((x) << RXERR_CSUM_S)
1218 #define RXERR_CSUM_F    RXERR_CSUM_V(1U)
1219 
1220 #define T6_COMPR_RXERR_LEN_S    1
1221 #define T6_COMPR_RXERR_LEN_V(x) ((x) << T6_COMPR_RXERR_LEN_S)
1222 #define T6_COMPR_RXERR_LEN_F    T6_COMPR_RXERR_LEN_V(1U)
1223 
1224 #define T6_COMPR_RXERR_VEC_S    0
1225 #define T6_COMPR_RXERR_VEC_M    0x3F
1226 #define T6_COMPR_RXERR_VEC_V(x) ((x) << T6_COMPR_RXERR_LEN_S)
1227 #define T6_COMPR_RXERR_VEC_G(x) \
1228 		(((x) >> T6_COMPR_RXERR_VEC_S) & T6_COMPR_RXERR_VEC_M)
1229 
1230 /* Logical OR of RX_ERROR_CSUM, RX_ERROR_CSIP */
1231 #define T6_COMPR_RXERR_SUM_S    4
1232 #define T6_COMPR_RXERR_SUM_V(x) ((x) << T6_COMPR_RXERR_SUM_S)
1233 #define T6_COMPR_RXERR_SUM_F    T6_COMPR_RXERR_SUM_V(1U)
1234 
1235 #define T6_RX_TNLHDR_LEN_S    8
1236 #define T6_RX_TNLHDR_LEN_M    0xFF
1237 #define T6_RX_TNLHDR_LEN_V(x) ((x) << T6_RX_TNLHDR_LEN_S)
1238 #define T6_RX_TNLHDR_LEN_G(x) (((x) >> T6_RX_TNLHDR_LEN_S) & T6_RX_TNLHDR_LEN_M)
1239 
1240 struct cpl_trace_pkt {
1241 	u8 opcode;
1242 	u8 intf;
1243 #if defined(__LITTLE_ENDIAN_BITFIELD)
1244 	u8 runt:4;
1245 	u8 filter_hit:4;
1246 	u8 :6;
1247 	u8 err:1;
1248 	u8 trunc:1;
1249 #else
1250 	u8 filter_hit:4;
1251 	u8 runt:4;
1252 	u8 trunc:1;
1253 	u8 err:1;
1254 	u8 :6;
1255 #endif
1256 	__be16 rsvd;
1257 	__be16 len;
1258 	__be64 tstamp;
1259 };
1260 
1261 struct cpl_t5_trace_pkt {
1262 	__u8 opcode;
1263 	__u8 intf;
1264 #if defined(__LITTLE_ENDIAN_BITFIELD)
1265 	__u8 runt:4;
1266 	__u8 filter_hit:4;
1267 	__u8:6;
1268 	__u8 err:1;
1269 	__u8 trunc:1;
1270 #else
1271 	__u8 filter_hit:4;
1272 	__u8 runt:4;
1273 	__u8 trunc:1;
1274 	__u8 err:1;
1275 	__u8:6;
1276 #endif
1277 	__be16 rsvd;
1278 	__be16 len;
1279 	__be64 tstamp;
1280 	__be64 rsvd1;
1281 };
1282 
1283 struct cpl_l2t_write_req {
1284 	WR_HDR;
1285 	union opcode_tid ot;
1286 	__be16 params;
1287 	__be16 l2t_idx;
1288 	__be16 vlan;
1289 	u8 dst_mac[6];
1290 };
1291 
1292 /* cpl_l2t_write_req.params fields */
1293 #define L2T_W_INFO_S    2
1294 #define L2T_W_INFO_V(x) ((x) << L2T_W_INFO_S)
1295 
1296 #define L2T_W_PORT_S    8
1297 #define L2T_W_PORT_V(x) ((x) << L2T_W_PORT_S)
1298 
1299 #define L2T_W_NOREPLY_S    15
1300 #define L2T_W_NOREPLY_V(x) ((x) << L2T_W_NOREPLY_S)
1301 #define L2T_W_NOREPLY_F    L2T_W_NOREPLY_V(1U)
1302 
1303 #define CPL_L2T_VLAN_NONE 0xfff
1304 
1305 struct cpl_l2t_write_rpl {
1306 	union opcode_tid ot;
1307 	u8 status;
1308 	u8 rsvd[3];
1309 };
1310 
1311 struct cpl_smt_write_req {
1312 	WR_HDR;
1313 	union opcode_tid ot;
1314 	__be32 params;
1315 	__be16 pfvf1;
1316 	u8 src_mac1[6];
1317 	__be16 pfvf0;
1318 	u8 src_mac0[6];
1319 };
1320 
1321 struct cpl_t6_smt_write_req {
1322 	WR_HDR;
1323 	union opcode_tid ot;
1324 	__be32 params;
1325 	__be64 tag;
1326 	__be16 pfvf0;
1327 	u8 src_mac0[6];
1328 	__be32 local_ip;
1329 	__be32 rsvd;
1330 };
1331 
1332 struct cpl_smt_write_rpl {
1333 	union opcode_tid ot;
1334 	u8 status;
1335 	u8 rsvd[3];
1336 };
1337 
1338 /* cpl_smt_{read,write}_req.params fields */
1339 #define SMTW_OVLAN_IDX_S	16
1340 #define SMTW_OVLAN_IDX_V(x)	((x) << SMTW_OVLAN_IDX_S)
1341 
1342 #define SMTW_IDX_S	20
1343 #define SMTW_IDX_V(x)	((x) << SMTW_IDX_S)
1344 
1345 #define SMTW_NORPL_S	31
1346 #define SMTW_NORPL_V(x)	((x) << SMTW_NORPL_S)
1347 #define SMTW_NORPL_F	SMTW_NORPL_V(1U)
1348 
1349 struct cpl_rdma_terminate {
1350 	union opcode_tid ot;
1351 	__be16 rsvd;
1352 	__be16 len;
1353 };
1354 
1355 struct cpl_sge_egr_update {
1356 	__be32 opcode_qid;
1357 	__be16 cidx;
1358 	__be16 pidx;
1359 };
1360 
1361 /* cpl_sge_egr_update.ot fields */
1362 #define EGR_QID_S    0
1363 #define EGR_QID_M    0x1FFFF
1364 #define EGR_QID_G(x) (((x) >> EGR_QID_S) & EGR_QID_M)
1365 
1366 /* cpl_fw*.type values */
1367 enum {
1368 	FW_TYPE_CMD_RPL = 0,
1369 	FW_TYPE_WR_RPL = 1,
1370 	FW_TYPE_CQE = 2,
1371 	FW_TYPE_OFLD_CONNECTION_WR_RPL = 3,
1372 	FW_TYPE_RSSCPL = 4,
1373 };
1374 
1375 struct cpl_fw4_pld {
1376 	u8 opcode;
1377 	u8 rsvd0[3];
1378 	u8 type;
1379 	u8 rsvd1;
1380 	__be16 len;
1381 	__be64 data;
1382 	__be64 rsvd2;
1383 };
1384 
1385 struct cpl_fw6_pld {
1386 	u8 opcode;
1387 	u8 rsvd[5];
1388 	__be16 len;
1389 	__be64 data[4];
1390 };
1391 
1392 struct cpl_fw4_msg {
1393 	u8 opcode;
1394 	u8 type;
1395 	__be16 rsvd0;
1396 	__be32 rsvd1;
1397 	__be64 data[2];
1398 };
1399 
1400 struct cpl_fw4_ack {
1401 	union opcode_tid ot;
1402 	u8 credits;
1403 	u8 rsvd0[2];
1404 	u8 seq_vld;
1405 	__be32 snd_nxt;
1406 	__be32 snd_una;
1407 	__be64 rsvd1;
1408 };
1409 
1410 enum {
1411 	CPL_FW4_ACK_FLAGS_SEQVAL	= 0x1,	/* seqn valid */
1412 	CPL_FW4_ACK_FLAGS_CH		= 0x2,	/* channel change complete */
1413 	CPL_FW4_ACK_FLAGS_FLOWC		= 0x4,	/* fw_flowc_wr complete */
1414 };
1415 
1416 struct cpl_fw6_msg {
1417 	u8 opcode;
1418 	u8 type;
1419 	__be16 rsvd0;
1420 	__be32 rsvd1;
1421 	__be64 data[4];
1422 };
1423 
1424 /* cpl_fw6_msg.type values */
1425 enum {
1426 	FW6_TYPE_CMD_RPL = 0,
1427 	FW6_TYPE_WR_RPL = 1,
1428 	FW6_TYPE_CQE = 2,
1429 	FW6_TYPE_OFLD_CONNECTION_WR_RPL = 3,
1430 	FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL,
1431 };
1432 
1433 struct cpl_fw6_msg_ofld_connection_wr_rpl {
1434 	__u64   cookie;
1435 	__be32  tid;    /* or atid in case of active failure */
1436 	__u8    t_state;
1437 	__u8    retval;
1438 	__u8    rsvd[2];
1439 };
1440 
1441 struct cpl_tx_data {
1442 	union opcode_tid ot;
1443 	__be32 len;
1444 	__be32 rsvd;
1445 	__be32 flags;
1446 };
1447 
1448 /* cpl_tx_data.flags field */
1449 #define TX_FORCE_S	13
1450 #define TX_FORCE_V(x)	((x) << TX_FORCE_S)
1451 
1452 #define T6_TX_FORCE_S		20
1453 #define T6_TX_FORCE_V(x)	((x) << T6_TX_FORCE_S)
1454 #define T6_TX_FORCE_F		T6_TX_FORCE_V(1U)
1455 
1456 #define TX_URG_S    16
1457 #define TX_URG_V(x) ((x) << TX_URG_S)
1458 
1459 #define TX_SHOVE_S    14
1460 #define TX_SHOVE_V(x) ((x) << TX_SHOVE_S)
1461 
1462 #define TX_ULP_MODE_S    10
1463 #define TX_ULP_MODE_M    0x7
1464 #define TX_ULP_MODE_V(x) ((x) << TX_ULP_MODE_S)
1465 #define TX_ULP_MODE_G(x) (((x) >> TX_ULP_MODE_S) & TX_ULP_MODE_M)
1466 
1467 enum {
1468 	ULP_TX_MEM_READ = 2,
1469 	ULP_TX_MEM_WRITE = 3,
1470 	ULP_TX_PKT = 4
1471 };
1472 
1473 enum {
1474 	ULP_TX_SC_NOOP = 0x80,
1475 	ULP_TX_SC_IMM  = 0x81,
1476 	ULP_TX_SC_DSGL = 0x82,
1477 	ULP_TX_SC_ISGL = 0x83,
1478 	ULP_TX_SC_MEMRD = 0x86
1479 };
1480 
1481 #define ULPTX_CMD_S    24
1482 #define ULPTX_CMD_V(x) ((x) << ULPTX_CMD_S)
1483 
1484 #define ULPTX_LEN16_S    0
1485 #define ULPTX_LEN16_M    0xFF
1486 #define ULPTX_LEN16_V(x) ((x) << ULPTX_LEN16_S)
1487 
1488 #define ULP_TX_SC_MORE_S 23
1489 #define ULP_TX_SC_MORE_V(x) ((x) << ULP_TX_SC_MORE_S)
1490 #define ULP_TX_SC_MORE_F  ULP_TX_SC_MORE_V(1U)
1491 
1492 struct ulptx_sge_pair {
1493 	__be32 len[2];
1494 	__be64 addr[2];
1495 };
1496 
1497 struct ulptx_sgl {
1498 	__be32 cmd_nsge;
1499 	__be32 len0;
1500 	__be64 addr0;
1501 	struct ulptx_sge_pair sge[0];
1502 };
1503 
1504 struct ulptx_idata {
1505 	__be32 cmd_more;
1506 	__be32 len;
1507 };
1508 
1509 struct ulp_txpkt {
1510 	__be32 cmd_dest;
1511 	__be32 len;
1512 };
1513 
1514 #define ULPTX_CMD_S    24
1515 #define ULPTX_CMD_M    0xFF
1516 #define ULPTX_CMD_V(x) ((x) << ULPTX_CMD_S)
1517 
1518 #define ULPTX_NSGE_S    0
1519 #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S)
1520 
1521 #define ULPTX_MORE_S	23
1522 #define ULPTX_MORE_V(x)	((x) << ULPTX_MORE_S)
1523 #define ULPTX_MORE_F	ULPTX_MORE_V(1U)
1524 
1525 #define ULP_TXPKT_DEST_S    16
1526 #define ULP_TXPKT_DEST_M    0x3
1527 #define ULP_TXPKT_DEST_V(x) ((x) << ULP_TXPKT_DEST_S)
1528 
1529 #define ULP_TXPKT_FID_S     4
1530 #define ULP_TXPKT_FID_M     0x7ff
1531 #define ULP_TXPKT_FID_V(x)  ((x) << ULP_TXPKT_FID_S)
1532 
1533 #define ULP_TXPKT_RO_S      3
1534 #define ULP_TXPKT_RO_V(x) ((x) << ULP_TXPKT_RO_S)
1535 #define ULP_TXPKT_RO_F ULP_TXPKT_RO_V(1U)
1536 
1537 enum cpl_tx_tnl_lso_type {
1538 	TX_TNL_TYPE_OPAQUE,
1539 	TX_TNL_TYPE_NVGRE,
1540 	TX_TNL_TYPE_VXLAN,
1541 	TX_TNL_TYPE_GENEVE,
1542 };
1543 
1544 struct cpl_tx_tnl_lso {
1545 	__be32 op_to_IpIdSplitOut;
1546 	__be16 IpIdOffsetOut;
1547 	__be16 UdpLenSetOut_to_TnlHdrLen;
1548 	__be64 r1;
1549 	__be32 Flow_to_TcpHdrLen;
1550 	__be16 IpIdOffset;
1551 	__be16 IpIdSplit_to_Mss;
1552 	__be32 TCPSeqOffset;
1553 	__be32 EthLenOffset_Size;
1554 	/* encapsulated CPL (TX_PKT_XT) follows here */
1555 };
1556 
1557 #define CPL_TX_TNL_LSO_OPCODE_S		24
1558 #define CPL_TX_TNL_LSO_OPCODE_M		0xff
1559 #define CPL_TX_TNL_LSO_OPCODE_V(x)      ((x) << CPL_TX_TNL_LSO_OPCODE_S)
1560 #define CPL_TX_TNL_LSO_OPCODE_G(x)      \
1561 	(((x) >> CPL_TX_TNL_LSO_OPCODE_S) & CPL_TX_TNL_LSO_OPCODE_M)
1562 
1563 #define CPL_TX_TNL_LSO_FIRST_S		23
1564 #define CPL_TX_TNL_LSO_FIRST_M		0x1
1565 #define CPL_TX_TNL_LSO_FIRST_V(x)	((x) << CPL_TX_TNL_LSO_FIRST_S)
1566 #define CPL_TX_TNL_LSO_FIRST_G(x)	\
1567 	(((x) >> CPL_TX_TNL_LSO_FIRST_S) & CPL_TX_TNL_LSO_FIRST_M)
1568 #define CPL_TX_TNL_LSO_FIRST_F		CPL_TX_TNL_LSO_FIRST_V(1U)
1569 
1570 #define CPL_TX_TNL_LSO_LAST_S		22
1571 #define CPL_TX_TNL_LSO_LAST_M		0x1
1572 #define CPL_TX_TNL_LSO_LAST_V(x)	((x) << CPL_TX_TNL_LSO_LAST_S)
1573 #define CPL_TX_TNL_LSO_LAST_G(x)	\
1574 	(((x) >> CPL_TX_TNL_LSO_LAST_S) & CPL_TX_TNL_LSO_LAST_M)
1575 #define CPL_TX_TNL_LSO_LAST_F		CPL_TX_TNL_LSO_LAST_V(1U)
1576 
1577 #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_S	21
1578 #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_M	0x1
1579 #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_V(x) \
1580 	((x) << CPL_TX_TNL_LSO_ETHHDRLENXOUT_S)
1581 #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_G(x) \
1582 	(((x) >> CPL_TX_TNL_LSO_ETHHDRLENXOUT_S) & \
1583 	 CPL_TX_TNL_LSO_ETHHDRLENXOUT_M)
1584 #define CPL_TX_TNL_LSO_ETHHDRLENXOUT_F CPL_TX_TNL_LSO_ETHHDRLENXOUT_V(1U)
1585 
1586 #define CPL_TX_TNL_LSO_IPV6OUT_S	20
1587 #define CPL_TX_TNL_LSO_IPV6OUT_M	0x1
1588 #define CPL_TX_TNL_LSO_IPV6OUT_V(x)	((x) << CPL_TX_TNL_LSO_IPV6OUT_S)
1589 #define CPL_TX_TNL_LSO_IPV6OUT_G(x)	\
1590 	(((x) >> CPL_TX_TNL_LSO_IPV6OUT_S) & CPL_TX_TNL_LSO_IPV6OUT_M)
1591 #define CPL_TX_TNL_LSO_IPV6OUT_F        CPL_TX_TNL_LSO_IPV6OUT_V(1U)
1592 
1593 #define CPL_TX_TNL_LSO_ETHHDRLEN_S	16
1594 #define CPL_TX_TNL_LSO_ETHHDRLEN_M	0xf
1595 #define CPL_TX_TNL_LSO_ETHHDRLEN_V(x)	((x) << CPL_TX_TNL_LSO_ETHHDRLEN_S)
1596 #define CPL_TX_TNL_LSO_ETHHDRLEN_G(x)	\
1597 	(((x) >> CPL_TX_TNL_LSO_ETHHDRLEN_S) & CPL_TX_TNL_LSO_ETHHDRLEN_M)
1598 
1599 #define CPL_TX_TNL_LSO_IPHDRLEN_S	4
1600 #define CPL_TX_TNL_LSO_IPHDRLEN_M	0xfff
1601 #define CPL_TX_TNL_LSO_IPHDRLEN_V(x)	((x) << CPL_TX_TNL_LSO_IPHDRLEN_S)
1602 #define CPL_TX_TNL_LSO_IPHDRLEN_G(x)    \
1603 	(((x) >> CPL_TX_TNL_LSO_IPHDRLEN_S) & CPL_TX_TNL_LSO_IPHDRLEN_M)
1604 
1605 #define CPL_TX_TNL_LSO_TCPHDRLEN_S	0
1606 #define CPL_TX_TNL_LSO_TCPHDRLEN_M	0xf
1607 #define CPL_TX_TNL_LSO_TCPHDRLEN_V(x)	((x) << CPL_TX_TNL_LSO_TCPHDRLEN_S)
1608 #define CPL_TX_TNL_LSO_TCPHDRLEN_G(x)   \
1609 	(((x) >> CPL_TX_TNL_LSO_TCPHDRLEN_S) & CPL_TX_TNL_LSO_TCPHDRLEN_M)
1610 
1611 #define CPL_TX_TNL_LSO_MSS_S            0
1612 #define CPL_TX_TNL_LSO_MSS_M            0x3fff
1613 #define CPL_TX_TNL_LSO_MSS_V(x)         ((x) << CPL_TX_TNL_LSO_MSS_S)
1614 #define CPL_TX_TNL_LSO_MSS_G(x)         \
1615 	(((x) >> CPL_TX_TNL_LSO_MSS_S) & CPL_TX_TNL_LSO_MSS_M)
1616 
1617 #define CPL_TX_TNL_LSO_SIZE_S		0
1618 #define CPL_TX_TNL_LSO_SIZE_M		0xfffffff
1619 #define CPL_TX_TNL_LSO_SIZE_V(x)	((x) << CPL_TX_TNL_LSO_SIZE_S)
1620 #define CPL_TX_TNL_LSO_SIZE_G(x)	\
1621 	(((x) >> CPL_TX_TNL_LSO_SIZE_S) & CPL_TX_TNL_LSO_SIZE_M)
1622 
1623 #define CPL_TX_TNL_LSO_ETHHDRLENOUT_S   16
1624 #define CPL_TX_TNL_LSO_ETHHDRLENOUT_M   0xf
1625 #define CPL_TX_TNL_LSO_ETHHDRLENOUT_V(x) \
1626 	((x) << CPL_TX_TNL_LSO_ETHHDRLENOUT_S)
1627 #define CPL_TX_TNL_LSO_ETHHDRLENOUT_G(x) \
1628 	(((x) >> CPL_TX_TNL_LSO_ETHHDRLENOUT_S) & CPL_TX_TNL_LSO_ETHHDRLENOUT_M)
1629 
1630 #define CPL_TX_TNL_LSO_IPHDRLENOUT_S    4
1631 #define CPL_TX_TNL_LSO_IPHDRLENOUT_M    0xfff
1632 #define CPL_TX_TNL_LSO_IPHDRLENOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRLENOUT_S)
1633 #define CPL_TX_TNL_LSO_IPHDRLENOUT_G(x) \
1634 	(((x) >> CPL_TX_TNL_LSO_IPHDRLENOUT_S) & CPL_TX_TNL_LSO_IPHDRLENOUT_M)
1635 
1636 #define CPL_TX_TNL_LSO_IPHDRCHKOUT_S    3
1637 #define CPL_TX_TNL_LSO_IPHDRCHKOUT_M    0x1
1638 #define CPL_TX_TNL_LSO_IPHDRCHKOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPHDRCHKOUT_S)
1639 #define CPL_TX_TNL_LSO_IPHDRCHKOUT_G(x) \
1640 	(((x) >> CPL_TX_TNL_LSO_IPHDRCHKOUT_S) & CPL_TX_TNL_LSO_IPHDRCHKOUT_M)
1641 #define CPL_TX_TNL_LSO_IPHDRCHKOUT_F    CPL_TX_TNL_LSO_IPHDRCHKOUT_V(1U)
1642 
1643 #define CPL_TX_TNL_LSO_IPLENSETOUT_S	2
1644 #define CPL_TX_TNL_LSO_IPLENSETOUT_M	0x1
1645 #define CPL_TX_TNL_LSO_IPLENSETOUT_V(x) ((x) << CPL_TX_TNL_LSO_IPLENSETOUT_S)
1646 #define CPL_TX_TNL_LSO_IPLENSETOUT_G(x) \
1647 	(((x) >> CPL_TX_TNL_LSO_IPLENSETOUT_S) & CPL_TX_TNL_LSO_IPLENSETOUT_M)
1648 #define CPL_TX_TNL_LSO_IPLENSETOUT_F	CPL_TX_TNL_LSO_IPLENSETOUT_V(1U)
1649 
1650 #define CPL_TX_TNL_LSO_IPIDINCOUT_S	1
1651 #define CPL_TX_TNL_LSO_IPIDINCOUT_M	0x1
1652 #define CPL_TX_TNL_LSO_IPIDINCOUT_V(x)  ((x) << CPL_TX_TNL_LSO_IPIDINCOUT_S)
1653 #define CPL_TX_TNL_LSO_IPIDINCOUT_G(x)  \
1654 	(((x) >> CPL_TX_TNL_LSO_IPIDINCOUT_S) & CPL_TX_TNL_LSO_IPIDINCOUT_M)
1655 #define CPL_TX_TNL_LSO_IPIDINCOUT_F     CPL_TX_TNL_LSO_IPIDINCOUT_V(1U)
1656 
1657 #define CPL_TX_TNL_LSO_UDPCHKCLROUT_S   14
1658 #define CPL_TX_TNL_LSO_UDPCHKCLROUT_M   0x1
1659 #define CPL_TX_TNL_LSO_UDPCHKCLROUT_V(x) \
1660 	((x) << CPL_TX_TNL_LSO_UDPCHKCLROUT_S)
1661 #define CPL_TX_TNL_LSO_UDPCHKCLROUT_G(x) \
1662 	(((x) >> CPL_TX_TNL_LSO_UDPCHKCLROUT_S) & \
1663 	 CPL_TX_TNL_LSO_UDPCHKCLROUT_M)
1664 #define CPL_TX_TNL_LSO_UDPCHKCLROUT_F   CPL_TX_TNL_LSO_UDPCHKCLROUT_V(1U)
1665 
1666 #define CPL_TX_TNL_LSO_UDPLENSETOUT_S   15
1667 #define CPL_TX_TNL_LSO_UDPLENSETOUT_M   0x1
1668 #define CPL_TX_TNL_LSO_UDPLENSETOUT_V(x) \
1669 	((x) << CPL_TX_TNL_LSO_UDPLENSETOUT_S)
1670 #define CPL_TX_TNL_LSO_UDPLENSETOUT_G(x) \
1671 	(((x) >> CPL_TX_TNL_LSO_UDPLENSETOUT_S) & \
1672 	 CPL_TX_TNL_LSO_UDPLENSETOUT_M)
1673 #define CPL_TX_TNL_LSO_UDPLENSETOUT_F   CPL_TX_TNL_LSO_UDPLENSETOUT_V(1U)
1674 
1675 #define CPL_TX_TNL_LSO_TNLTYPE_S	12
1676 #define CPL_TX_TNL_LSO_TNLTYPE_M	0x3
1677 #define CPL_TX_TNL_LSO_TNLTYPE_V(x)	((x) << CPL_TX_TNL_LSO_TNLTYPE_S)
1678 #define CPL_TX_TNL_LSO_TNLTYPE_G(x)	\
1679 	(((x) >> CPL_TX_TNL_LSO_TNLTYPE_S) & CPL_TX_TNL_LSO_TNLTYPE_M)
1680 
1681 #define S_CPL_TX_TNL_LSO_ETHHDRLEN	16
1682 #define M_CPL_TX_TNL_LSO_ETHHDRLEN	0xf
1683 #define V_CPL_TX_TNL_LSO_ETHHDRLEN(x)	((x) << S_CPL_TX_TNL_LSO_ETHHDRLEN)
1684 #define G_CPL_TX_TNL_LSO_ETHHDRLEN(x)	\
1685 	(((x) >> S_CPL_TX_TNL_LSO_ETHHDRLEN) & M_CPL_TX_TNL_LSO_ETHHDRLEN)
1686 
1687 #define CPL_TX_TNL_LSO_TNLHDRLEN_S      0
1688 #define CPL_TX_TNL_LSO_TNLHDRLEN_M      0xfff
1689 #define CPL_TX_TNL_LSO_TNLHDRLEN_V(x)	((x) << CPL_TX_TNL_LSO_TNLHDRLEN_S)
1690 #define CPL_TX_TNL_LSO_TNLHDRLEN_G(x)   \
1691 	(((x) >> CPL_TX_TNL_LSO_TNLHDRLEN_S) & CPL_TX_TNL_LSO_TNLHDRLEN_M)
1692 
1693 #define CPL_TX_TNL_LSO_IPV6_S		20
1694 #define CPL_TX_TNL_LSO_IPV6_M		0x1
1695 #define CPL_TX_TNL_LSO_IPV6_V(x)	((x) << CPL_TX_TNL_LSO_IPV6_S)
1696 #define CPL_TX_TNL_LSO_IPV6_G(x)	\
1697 	(((x) >> CPL_TX_TNL_LSO_IPV6_S) & CPL_TX_TNL_LSO_IPV6_M)
1698 #define CPL_TX_TNL_LSO_IPV6_F		CPL_TX_TNL_LSO_IPV6_V(1U)
1699 
1700 #define ULP_TX_SC_MORE_S 23
1701 #define ULP_TX_SC_MORE_V(x) ((x) << ULP_TX_SC_MORE_S)
1702 #define ULP_TX_SC_MORE_F  ULP_TX_SC_MORE_V(1U)
1703 
1704 struct ulp_mem_io {
1705 	WR_HDR;
1706 	__be32 cmd;
1707 	__be32 len16;             /* command length */
1708 	__be32 dlen;              /* data length in 32-byte units */
1709 	__be32 lock_addr;
1710 };
1711 
1712 #define ULP_MEMIO_LOCK_S    31
1713 #define ULP_MEMIO_LOCK_V(x) ((x) << ULP_MEMIO_LOCK_S)
1714 #define ULP_MEMIO_LOCK_F    ULP_MEMIO_LOCK_V(1U)
1715 
1716 /* additional ulp_mem_io.cmd fields */
1717 #define ULP_MEMIO_ORDER_S    23
1718 #define ULP_MEMIO_ORDER_V(x) ((x) << ULP_MEMIO_ORDER_S)
1719 #define ULP_MEMIO_ORDER_F    ULP_MEMIO_ORDER_V(1U)
1720 
1721 #define T5_ULP_MEMIO_IMM_S    23
1722 #define T5_ULP_MEMIO_IMM_V(x) ((x) << T5_ULP_MEMIO_IMM_S)
1723 #define T5_ULP_MEMIO_IMM_F    T5_ULP_MEMIO_IMM_V(1U)
1724 
1725 #define T5_ULP_MEMIO_ORDER_S    22
1726 #define T5_ULP_MEMIO_ORDER_V(x) ((x) << T5_ULP_MEMIO_ORDER_S)
1727 #define T5_ULP_MEMIO_ORDER_F    T5_ULP_MEMIO_ORDER_V(1U)
1728 
1729 #define T5_ULP_MEMIO_FID_S	4
1730 #define T5_ULP_MEMIO_FID_M	0x7ff
1731 #define T5_ULP_MEMIO_FID_V(x)	((x) << T5_ULP_MEMIO_FID_S)
1732 
1733 /* ulp_mem_io.lock_addr fields */
1734 #define ULP_MEMIO_ADDR_S    0
1735 #define ULP_MEMIO_ADDR_V(x) ((x) << ULP_MEMIO_ADDR_S)
1736 
1737 /* ulp_mem_io.dlen fields */
1738 #define ULP_MEMIO_DATA_LEN_S    0
1739 #define ULP_MEMIO_DATA_LEN_V(x) ((x) << ULP_MEMIO_DATA_LEN_S)
1740 
1741 #define ULPTX_NSGE_S    0
1742 #define ULPTX_NSGE_M    0xFFFF
1743 #define ULPTX_NSGE_V(x) ((x) << ULPTX_NSGE_S)
1744 #define ULPTX_NSGE_G(x) (((x) >> ULPTX_NSGE_S) & ULPTX_NSGE_M)
1745 
1746 struct ulptx_sc_memrd {
1747 	__be32 cmd_to_len;
1748 	__be32 addr;
1749 };
1750 
1751 #define ULP_TXPKT_DATAMODIFY_S       23
1752 #define ULP_TXPKT_DATAMODIFY_M       0x1
1753 #define ULP_TXPKT_DATAMODIFY_V(x)    ((x) << ULP_TXPKT_DATAMODIFY_S)
1754 #define ULP_TXPKT_DATAMODIFY_G(x)    \
1755 	(((x) >> ULP_TXPKT_DATAMODIFY_S) & ULP_TXPKT_DATAMODIFY__M)
1756 #define ULP_TXPKT_DATAMODIFY_F       ULP_TXPKT_DATAMODIFY_V(1U)
1757 
1758 #define ULP_TXPKT_CHANNELID_S        22
1759 #define ULP_TXPKT_CHANNELID_M        0x1
1760 #define ULP_TXPKT_CHANNELID_V(x)     ((x) << ULP_TXPKT_CHANNELID_S)
1761 #define ULP_TXPKT_CHANNELID_G(x)     \
1762 	(((x) >> ULP_TXPKT_CHANNELID_S) & ULP_TXPKT_CHANNELID_M)
1763 #define ULP_TXPKT_CHANNELID_F        ULP_TXPKT_CHANNELID_V(1U)
1764 
1765 #define SCMD_SEQ_NO_CTRL_S      29
1766 #define SCMD_SEQ_NO_CTRL_M      0x3
1767 #define SCMD_SEQ_NO_CTRL_V(x)   ((x) << SCMD_SEQ_NO_CTRL_S)
1768 #define SCMD_SEQ_NO_CTRL_G(x)   \
1769 	(((x) >> SCMD_SEQ_NO_CTRL_S) & SCMD_SEQ_NO_CTRL_M)
1770 
1771 /* StsFieldPrsnt- Status field at the end of the TLS PDU */
1772 #define SCMD_STATUS_PRESENT_S   28
1773 #define SCMD_STATUS_PRESENT_M   0x1
1774 #define SCMD_STATUS_PRESENT_V(x)    ((x) << SCMD_STATUS_PRESENT_S)
1775 #define SCMD_STATUS_PRESENT_G(x)    \
1776 	(((x) >> SCMD_STATUS_PRESENT_S) & SCMD_STATUS_PRESENT_M)
1777 #define SCMD_STATUS_PRESENT_F   SCMD_STATUS_PRESENT_V(1U)
1778 
1779 /* ProtoVersion - Protocol Version 0: 1.2, 1:1.1, 2:DTLS, 3:Generic,
1780  * 3-15: Reserved.
1781  */
1782 #define SCMD_PROTO_VERSION_S    24
1783 #define SCMD_PROTO_VERSION_M    0xf
1784 #define SCMD_PROTO_VERSION_V(x) ((x) << SCMD_PROTO_VERSION_S)
1785 #define SCMD_PROTO_VERSION_G(x) \
1786 	(((x) >> SCMD_PROTO_VERSION_S) & SCMD_PROTO_VERSION_M)
1787 
1788 /* EncDecCtrl - Encryption/Decryption Control. 0: Encrypt, 1: Decrypt */
1789 #define SCMD_ENC_DEC_CTRL_S     23
1790 #define SCMD_ENC_DEC_CTRL_M     0x1
1791 #define SCMD_ENC_DEC_CTRL_V(x)  ((x) << SCMD_ENC_DEC_CTRL_S)
1792 #define SCMD_ENC_DEC_CTRL_G(x)  \
1793 	(((x) >> SCMD_ENC_DEC_CTRL_S) & SCMD_ENC_DEC_CTRL_M)
1794 #define SCMD_ENC_DEC_CTRL_F SCMD_ENC_DEC_CTRL_V(1U)
1795 
1796 /* CipherAuthSeqCtrl - Cipher Authentication Sequence Control. */
1797 #define SCMD_CIPH_AUTH_SEQ_CTRL_S       22
1798 #define SCMD_CIPH_AUTH_SEQ_CTRL_M       0x1
1799 #define SCMD_CIPH_AUTH_SEQ_CTRL_V(x)    \
1800 	((x) << SCMD_CIPH_AUTH_SEQ_CTRL_S)
1801 #define SCMD_CIPH_AUTH_SEQ_CTRL_G(x)    \
1802 	(((x) >> SCMD_CIPH_AUTH_SEQ_CTRL_S) & SCMD_CIPH_AUTH_SEQ_CTRL_M)
1803 #define SCMD_CIPH_AUTH_SEQ_CTRL_F   SCMD_CIPH_AUTH_SEQ_CTRL_V(1U)
1804 
1805 /* CiphMode -  Cipher Mode. 0: NOP, 1:AES-CBC, 2:AES-GCM, 3:AES-CTR,
1806  * 4:Generic-AES, 5-15: Reserved.
1807  */
1808 #define SCMD_CIPH_MODE_S    18
1809 #define SCMD_CIPH_MODE_M    0xf
1810 #define SCMD_CIPH_MODE_V(x) ((x) << SCMD_CIPH_MODE_S)
1811 #define SCMD_CIPH_MODE_G(x) \
1812 	(((x) >> SCMD_CIPH_MODE_S) & SCMD_CIPH_MODE_M)
1813 
1814 /* AuthMode - Auth Mode. 0: NOP, 1:SHA1, 2:SHA2-224, 3:SHA2-256
1815  * 4-15: Reserved
1816  */
1817 #define SCMD_AUTH_MODE_S    14
1818 #define SCMD_AUTH_MODE_M    0xf
1819 #define SCMD_AUTH_MODE_V(x) ((x) << SCMD_AUTH_MODE_S)
1820 #define SCMD_AUTH_MODE_G(x) \
1821 	(((x) >> SCMD_AUTH_MODE_S) & SCMD_AUTH_MODE_M)
1822 
1823 /* HmacCtrl - HMAC Control. 0:NOP, 1:No truncation, 2:Support HMAC Truncation
1824  * per RFC 4366, 3:IPSec 96 bits, 4-7:Reserved
1825  */
1826 #define SCMD_HMAC_CTRL_S    11
1827 #define SCMD_HMAC_CTRL_M    0x7
1828 #define SCMD_HMAC_CTRL_V(x) ((x) << SCMD_HMAC_CTRL_S)
1829 #define SCMD_HMAC_CTRL_G(x) \
1830 	(((x) >> SCMD_HMAC_CTRL_S) & SCMD_HMAC_CTRL_M)
1831 
1832 /* IvSize - IV size in units of 2 bytes */
1833 #define SCMD_IV_SIZE_S  7
1834 #define SCMD_IV_SIZE_M  0xf
1835 #define SCMD_IV_SIZE_V(x)   ((x) << SCMD_IV_SIZE_S)
1836 #define SCMD_IV_SIZE_G(x)   \
1837 	(((x) >> SCMD_IV_SIZE_S) & SCMD_IV_SIZE_M)
1838 
1839 /* NumIVs - Number of IVs */
1840 #define SCMD_NUM_IVS_S  0
1841 #define SCMD_NUM_IVS_M  0x7f
1842 #define SCMD_NUM_IVS_V(x)   ((x) << SCMD_NUM_IVS_S)
1843 #define SCMD_NUM_IVS_G(x)   \
1844 	(((x) >> SCMD_NUM_IVS_S) & SCMD_NUM_IVS_M)
1845 
1846 /* EnbDbgId - If this is enabled upper 20 (63:44) bits if SeqNumber
1847  * (below) are used as Cid (connection id for debug status), these
1848  * bits are padded to zero for forming the 64 bit
1849  * sequence number for TLS
1850  */
1851 #define SCMD_ENB_DBGID_S  31
1852 #define SCMD_ENB_DBGID_M  0x1
1853 #define SCMD_ENB_DBGID_V(x)   ((x) << SCMD_ENB_DBGID_S)
1854 #define SCMD_ENB_DBGID_G(x)   \
1855 	(((x) >> SCMD_ENB_DBGID_S) & SCMD_ENB_DBGID_M)
1856 
1857 /* IV generation in SW. */
1858 #define SCMD_IV_GEN_CTRL_S      30
1859 #define SCMD_IV_GEN_CTRL_M      0x1
1860 #define SCMD_IV_GEN_CTRL_V(x)   ((x) << SCMD_IV_GEN_CTRL_S)
1861 #define SCMD_IV_GEN_CTRL_G(x)   \
1862 	(((x) >> SCMD_IV_GEN_CTRL_S) & SCMD_IV_GEN_CTRL_M)
1863 #define SCMD_IV_GEN_CTRL_F  SCMD_IV_GEN_CTRL_V(1U)
1864 
1865 /* More frags */
1866 #define SCMD_MORE_FRAGS_S   20
1867 #define SCMD_MORE_FRAGS_M   0x1
1868 #define SCMD_MORE_FRAGS_V(x)    ((x) << SCMD_MORE_FRAGS_S)
1869 #define SCMD_MORE_FRAGS_G(x)    (((x) >> SCMD_MORE_FRAGS_S) & SCMD_MORE_FRAGS_M)
1870 
1871 /*last frag */
1872 #define SCMD_LAST_FRAG_S    19
1873 #define SCMD_LAST_FRAG_M    0x1
1874 #define SCMD_LAST_FRAG_V(x) ((x) << SCMD_LAST_FRAG_S)
1875 #define SCMD_LAST_FRAG_G(x) (((x) >> SCMD_LAST_FRAG_S) & SCMD_LAST_FRAG_M)
1876 
1877 /* TlsCompPdu */
1878 #define SCMD_TLS_COMPPDU_S    18
1879 #define SCMD_TLS_COMPPDU_M    0x1
1880 #define SCMD_TLS_COMPPDU_V(x) ((x) << SCMD_TLS_COMPPDU_S)
1881 #define SCMD_TLS_COMPPDU_G(x) (((x) >> SCMD_TLS_COMPPDU_S) & SCMD_TLS_COMPPDU_M)
1882 
1883 /* KeyCntxtInline - Key context inline after the scmd  OR PayloadOnly*/
1884 #define SCMD_KEY_CTX_INLINE_S   17
1885 #define SCMD_KEY_CTX_INLINE_M   0x1
1886 #define SCMD_KEY_CTX_INLINE_V(x)    ((x) << SCMD_KEY_CTX_INLINE_S)
1887 #define SCMD_KEY_CTX_INLINE_G(x)    \
1888 	(((x) >> SCMD_KEY_CTX_INLINE_S) & SCMD_KEY_CTX_INLINE_M)
1889 #define SCMD_KEY_CTX_INLINE_F   SCMD_KEY_CTX_INLINE_V(1U)
1890 
1891 /* TLSFragEnable - 0: Host created TLS PDUs, 1: TLS Framgmentation in ASIC */
1892 #define SCMD_TLS_FRAG_ENABLE_S  16
1893 #define SCMD_TLS_FRAG_ENABLE_M  0x1
1894 #define SCMD_TLS_FRAG_ENABLE_V(x)   ((x) << SCMD_TLS_FRAG_ENABLE_S)
1895 #define SCMD_TLS_FRAG_ENABLE_G(x)   \
1896 	(((x) >> SCMD_TLS_FRAG_ENABLE_S) & SCMD_TLS_FRAG_ENABLE_M)
1897 #define SCMD_TLS_FRAG_ENABLE_F  SCMD_TLS_FRAG_ENABLE_V(1U)
1898 
1899 /* MacOnly - Only send the MAC and discard PDU. This is valid for hash only
1900  * modes, in this case TLS_TX  will drop the PDU and only
1901  * send back the MAC bytes.
1902  */
1903 #define SCMD_MAC_ONLY_S 15
1904 #define SCMD_MAC_ONLY_M 0x1
1905 #define SCMD_MAC_ONLY_V(x)  ((x) << SCMD_MAC_ONLY_S)
1906 #define SCMD_MAC_ONLY_G(x)  \
1907 	(((x) >> SCMD_MAC_ONLY_S) & SCMD_MAC_ONLY_M)
1908 #define SCMD_MAC_ONLY_F SCMD_MAC_ONLY_V(1U)
1909 
1910 /* AadIVDrop - Drop the AAD and IV fields. Useful in protocols
1911  * which have complex AAD and IV formations Eg:AES-CCM
1912  */
1913 #define SCMD_AADIVDROP_S 14
1914 #define SCMD_AADIVDROP_M 0x1
1915 #define SCMD_AADIVDROP_V(x)  ((x) << SCMD_AADIVDROP_S)
1916 #define SCMD_AADIVDROP_G(x)  \
1917 	(((x) >> SCMD_AADIVDROP_S) & SCMD_AADIVDROP_M)
1918 #define SCMD_AADIVDROP_F SCMD_AADIVDROP_V(1U)
1919 
1920 /* HdrLength - Length of all headers excluding TLS header
1921  * present before start of crypto PDU/payload.
1922  */
1923 #define SCMD_HDR_LEN_S  0
1924 #define SCMD_HDR_LEN_M  0x3fff
1925 #define SCMD_HDR_LEN_V(x)   ((x) << SCMD_HDR_LEN_S)
1926 #define SCMD_HDR_LEN_G(x)   \
1927 	(((x) >> SCMD_HDR_LEN_S) & SCMD_HDR_LEN_M)
1928 
1929 struct cpl_tx_sec_pdu {
1930 	__be32 op_ivinsrtofst;
1931 	__be32 pldlen;
1932 	__be32 aadstart_cipherstop_hi;
1933 	__be32 cipherstop_lo_authinsert;
1934 	__be32 seqno_numivs;
1935 	__be32 ivgen_hdrlen;
1936 	__be64 scmd1;
1937 };
1938 
1939 #define CPL_TX_SEC_PDU_OPCODE_S     24
1940 #define CPL_TX_SEC_PDU_OPCODE_M     0xff
1941 #define CPL_TX_SEC_PDU_OPCODE_V(x)  ((x) << CPL_TX_SEC_PDU_OPCODE_S)
1942 #define CPL_TX_SEC_PDU_OPCODE_G(x)  \
1943 	(((x) >> CPL_TX_SEC_PDU_OPCODE_S) & CPL_TX_SEC_PDU_OPCODE_M)
1944 
1945 /* RX Channel Id */
1946 #define CPL_TX_SEC_PDU_RXCHID_S  22
1947 #define CPL_TX_SEC_PDU_RXCHID_M  0x1
1948 #define CPL_TX_SEC_PDU_RXCHID_V(x)   ((x) << CPL_TX_SEC_PDU_RXCHID_S)
1949 #define CPL_TX_SEC_PDU_RXCHID_G(x)   \
1950 	(((x) >> CPL_TX_SEC_PDU_RXCHID_S) & CPL_TX_SEC_PDU_RXCHID_M)
1951 #define CPL_TX_SEC_PDU_RXCHID_F  CPL_TX_SEC_PDU_RXCHID_V(1U)
1952 
1953 /* Ack Follows */
1954 #define CPL_TX_SEC_PDU_ACKFOLLOWS_S  21
1955 #define CPL_TX_SEC_PDU_ACKFOLLOWS_M  0x1
1956 #define CPL_TX_SEC_PDU_ACKFOLLOWS_V(x)   ((x) << CPL_TX_SEC_PDU_ACKFOLLOWS_S)
1957 #define CPL_TX_SEC_PDU_ACKFOLLOWS_G(x)   \
1958 	(((x) >> CPL_TX_SEC_PDU_ACKFOLLOWS_S) & CPL_TX_SEC_PDU_ACKFOLLOWS_M)
1959 #define CPL_TX_SEC_PDU_ACKFOLLOWS_F  CPL_TX_SEC_PDU_ACKFOLLOWS_V(1U)
1960 
1961 /* Loopback bit in cpl_tx_sec_pdu */
1962 #define CPL_TX_SEC_PDU_ULPTXLPBK_S  20
1963 #define CPL_TX_SEC_PDU_ULPTXLPBK_M  0x1
1964 #define CPL_TX_SEC_PDU_ULPTXLPBK_V(x)   ((x) << CPL_TX_SEC_PDU_ULPTXLPBK_S)
1965 #define CPL_TX_SEC_PDU_ULPTXLPBK_G(x)   \
1966 	(((x) >> CPL_TX_SEC_PDU_ULPTXLPBK_S) & CPL_TX_SEC_PDU_ULPTXLPBK_M)
1967 #define CPL_TX_SEC_PDU_ULPTXLPBK_F  CPL_TX_SEC_PDU_ULPTXLPBK_V(1U)
1968 
1969 /* Length of cpl header encapsulated */
1970 #define CPL_TX_SEC_PDU_CPLLEN_S     16
1971 #define CPL_TX_SEC_PDU_CPLLEN_M     0xf
1972 #define CPL_TX_SEC_PDU_CPLLEN_V(x)  ((x) << CPL_TX_SEC_PDU_CPLLEN_S)
1973 #define CPL_TX_SEC_PDU_CPLLEN_G(x)  \
1974 	(((x) >> CPL_TX_SEC_PDU_CPLLEN_S) & CPL_TX_SEC_PDU_CPLLEN_M)
1975 
1976 /* PlaceHolder */
1977 #define CPL_TX_SEC_PDU_PLACEHOLDER_S    10
1978 #define CPL_TX_SEC_PDU_PLACEHOLDER_M    0x1
1979 #define CPL_TX_SEC_PDU_PLACEHOLDER_V(x) ((x) << CPL_TX_SEC_PDU_PLACEHOLDER_S)
1980 #define CPL_TX_SEC_PDU_PLACEHOLDER_G(x) \
1981 	(((x) >> CPL_TX_SEC_PDU_PLACEHOLDER_S) & \
1982 	 CPL_TX_SEC_PDU_PLACEHOLDER_M)
1983 
1984 /* IvInsrtOffset: Insertion location for IV */
1985 #define CPL_TX_SEC_PDU_IVINSRTOFST_S    0
1986 #define CPL_TX_SEC_PDU_IVINSRTOFST_M    0x3ff
1987 #define CPL_TX_SEC_PDU_IVINSRTOFST_V(x) ((x) << CPL_TX_SEC_PDU_IVINSRTOFST_S)
1988 #define CPL_TX_SEC_PDU_IVINSRTOFST_G(x) \
1989 	(((x) >> CPL_TX_SEC_PDU_IVINSRTOFST_S) & \
1990 	 CPL_TX_SEC_PDU_IVINSRTOFST_M)
1991 
1992 /* AadStartOffset: Offset in bytes for AAD start from
1993  * the first byte following the pkt headers (0-255 bytes)
1994  */
1995 #define CPL_TX_SEC_PDU_AADSTART_S   24
1996 #define CPL_TX_SEC_PDU_AADSTART_M   0xff
1997 #define CPL_TX_SEC_PDU_AADSTART_V(x)    ((x) << CPL_TX_SEC_PDU_AADSTART_S)
1998 #define CPL_TX_SEC_PDU_AADSTART_G(x)    \
1999 	(((x) >> CPL_TX_SEC_PDU_AADSTART_S) & \
2000 	 CPL_TX_SEC_PDU_AADSTART_M)
2001 
2002 /* AadStopOffset: offset in bytes for AAD stop/end from the first byte following
2003  * the pkt headers (0-511 bytes)
2004  */
2005 #define CPL_TX_SEC_PDU_AADSTOP_S    15
2006 #define CPL_TX_SEC_PDU_AADSTOP_M    0x1ff
2007 #define CPL_TX_SEC_PDU_AADSTOP_V(x) ((x) << CPL_TX_SEC_PDU_AADSTOP_S)
2008 #define CPL_TX_SEC_PDU_AADSTOP_G(x) \
2009 	(((x) >> CPL_TX_SEC_PDU_AADSTOP_S) & CPL_TX_SEC_PDU_AADSTOP_M)
2010 
2011 /* CipherStartOffset: offset in bytes for encryption/decryption start from the
2012  * first byte following the pkt headers (0-1023 bytes)
2013  */
2014 #define CPL_TX_SEC_PDU_CIPHERSTART_S    5
2015 #define CPL_TX_SEC_PDU_CIPHERSTART_M    0x3ff
2016 #define CPL_TX_SEC_PDU_CIPHERSTART_V(x) ((x) << CPL_TX_SEC_PDU_CIPHERSTART_S)
2017 #define CPL_TX_SEC_PDU_CIPHERSTART_G(x) \
2018 	(((x) >> CPL_TX_SEC_PDU_CIPHERSTART_S) & \
2019 	 CPL_TX_SEC_PDU_CIPHERSTART_M)
2020 
2021 /* CipherStopOffset: offset in bytes for encryption/decryption end
2022  * from end of the payload of this command (0-511 bytes)
2023  */
2024 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_S      0
2025 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_M      0x1f
2026 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_V(x)   \
2027 	((x) << CPL_TX_SEC_PDU_CIPHERSTOP_HI_S)
2028 #define CPL_TX_SEC_PDU_CIPHERSTOP_HI_G(x)   \
2029 	(((x) >> CPL_TX_SEC_PDU_CIPHERSTOP_HI_S) & \
2030 	 CPL_TX_SEC_PDU_CIPHERSTOP_HI_M)
2031 
2032 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_S      28
2033 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_M      0xf
2034 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_V(x)   \
2035 	((x) << CPL_TX_SEC_PDU_CIPHERSTOP_LO_S)
2036 #define CPL_TX_SEC_PDU_CIPHERSTOP_LO_G(x)   \
2037 	(((x) >> CPL_TX_SEC_PDU_CIPHERSTOP_LO_S) & \
2038 	 CPL_TX_SEC_PDU_CIPHERSTOP_LO_M)
2039 
2040 /* AuthStartOffset: offset in bytes for authentication start from
2041  * the first byte following the pkt headers (0-1023)
2042  */
2043 #define CPL_TX_SEC_PDU_AUTHSTART_S  18
2044 #define CPL_TX_SEC_PDU_AUTHSTART_M  0x3ff
2045 #define CPL_TX_SEC_PDU_AUTHSTART_V(x)   ((x) << CPL_TX_SEC_PDU_AUTHSTART_S)
2046 #define CPL_TX_SEC_PDU_AUTHSTART_G(x)   \
2047 	(((x) >> CPL_TX_SEC_PDU_AUTHSTART_S) & \
2048 	 CPL_TX_SEC_PDU_AUTHSTART_M)
2049 
2050 /* AuthStopOffset: offset in bytes for authentication
2051  * end from end of the payload of this command (0-511 Bytes)
2052  */
2053 #define CPL_TX_SEC_PDU_AUTHSTOP_S   9
2054 #define CPL_TX_SEC_PDU_AUTHSTOP_M   0x1ff
2055 #define CPL_TX_SEC_PDU_AUTHSTOP_V(x)    ((x) << CPL_TX_SEC_PDU_AUTHSTOP_S)
2056 #define CPL_TX_SEC_PDU_AUTHSTOP_G(x)    \
2057 	(((x) >> CPL_TX_SEC_PDU_AUTHSTOP_S) & \
2058 	 CPL_TX_SEC_PDU_AUTHSTOP_M)
2059 
2060 /* AuthInsrtOffset: offset in bytes for authentication insertion
2061  * from end of the payload of this command (0-511 bytes)
2062  */
2063 #define CPL_TX_SEC_PDU_AUTHINSERT_S 0
2064 #define CPL_TX_SEC_PDU_AUTHINSERT_M 0x1ff
2065 #define CPL_TX_SEC_PDU_AUTHINSERT_V(x)  ((x) << CPL_TX_SEC_PDU_AUTHINSERT_S)
2066 #define CPL_TX_SEC_PDU_AUTHINSERT_G(x)  \
2067 	(((x) >> CPL_TX_SEC_PDU_AUTHINSERT_S) & \
2068 	 CPL_TX_SEC_PDU_AUTHINSERT_M)
2069 
2070 struct cpl_rx_phys_dsgl {
2071 	__be32 op_to_tid;
2072 	__be32 pcirlxorder_to_noofsgentr;
2073 	struct rss_header rss_hdr_int;
2074 };
2075 
2076 #define CPL_RX_PHYS_DSGL_OPCODE_S       24
2077 #define CPL_RX_PHYS_DSGL_OPCODE_M       0xff
2078 #define CPL_RX_PHYS_DSGL_OPCODE_V(x)    ((x) << CPL_RX_PHYS_DSGL_OPCODE_S)
2079 #define CPL_RX_PHYS_DSGL_OPCODE_G(x)    \
2080 	(((x) >> CPL_RX_PHYS_DSGL_OPCODE_S) & CPL_RX_PHYS_DSGL_OPCODE_M)
2081 
2082 #define CPL_RX_PHYS_DSGL_ISRDMA_S       23
2083 #define CPL_RX_PHYS_DSGL_ISRDMA_M       0x1
2084 #define CPL_RX_PHYS_DSGL_ISRDMA_V(x)    ((x) << CPL_RX_PHYS_DSGL_ISRDMA_S)
2085 #define CPL_RX_PHYS_DSGL_ISRDMA_G(x)    \
2086 	(((x) >> CPL_RX_PHYS_DSGL_ISRDMA_S) & CPL_RX_PHYS_DSGL_ISRDMA_M)
2087 #define CPL_RX_PHYS_DSGL_ISRDMA_F       CPL_RX_PHYS_DSGL_ISRDMA_V(1U)
2088 
2089 #define CPL_RX_PHYS_DSGL_RSVD1_S        20
2090 #define CPL_RX_PHYS_DSGL_RSVD1_M        0x7
2091 #define CPL_RX_PHYS_DSGL_RSVD1_V(x)     ((x) << CPL_RX_PHYS_DSGL_RSVD1_S)
2092 #define CPL_RX_PHYS_DSGL_RSVD1_G(x)     \
2093 	(((x) >> CPL_RX_PHYS_DSGL_RSVD1_S) & \
2094 	 CPL_RX_PHYS_DSGL_RSVD1_M)
2095 
2096 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_S          31
2097 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_M          0x1
2098 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_V(x)       \
2099 	((x) << CPL_RX_PHYS_DSGL_PCIRLXORDER_S)
2100 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_G(x)       \
2101 	(((x) >> CPL_RX_PHYS_DSGL_PCIRLXORDER_S) & \
2102 	 CPL_RX_PHYS_DSGL_PCIRLXORDER_M)
2103 #define CPL_RX_PHYS_DSGL_PCIRLXORDER_F  CPL_RX_PHYS_DSGL_PCIRLXORDER_V(1U)
2104 
2105 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_S           30
2106 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_M           0x1
2107 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_V(x)        \
2108 	((x) << CPL_RX_PHYS_DSGL_PCINOSNOOP_S)
2109 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_G(x)        \
2110 	(((x) >> CPL_RX_PHYS_DSGL_PCINOSNOOP_S) & \
2111 	 CPL_RX_PHYS_DSGL_PCINOSNOOP_M)
2112 
2113 #define CPL_RX_PHYS_DSGL_PCINOSNOOP_F   CPL_RX_PHYS_DSGL_PCINOSNOOP_V(1U)
2114 
2115 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_S          29
2116 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_M          0x1
2117 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_V(x)       \
2118 	((x) << CPL_RX_PHYS_DSGL_PCITPHNTENB_S)
2119 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_G(x)       \
2120 	(((x) >> CPL_RX_PHYS_DSGL_PCITPHNTENB_S) & \
2121 	 CPL_RX_PHYS_DSGL_PCITPHNTENB_M)
2122 #define CPL_RX_PHYS_DSGL_PCITPHNTENB_F  CPL_RX_PHYS_DSGL_PCITPHNTENB_V(1U)
2123 
2124 #define CPL_RX_PHYS_DSGL_PCITPHNT_S     27
2125 #define CPL_RX_PHYS_DSGL_PCITPHNT_M     0x3
2126 #define CPL_RX_PHYS_DSGL_PCITPHNT_V(x)  ((x) << CPL_RX_PHYS_DSGL_PCITPHNT_S)
2127 #define CPL_RX_PHYS_DSGL_PCITPHNT_G(x)  \
2128 	(((x) >> CPL_RX_PHYS_DSGL_PCITPHNT_S) & \
2129 	 CPL_RX_PHYS_DSGL_PCITPHNT_M)
2130 
2131 #define CPL_RX_PHYS_DSGL_DCAID_S        16
2132 #define CPL_RX_PHYS_DSGL_DCAID_M        0x7ff
2133 #define CPL_RX_PHYS_DSGL_DCAID_V(x)     ((x) << CPL_RX_PHYS_DSGL_DCAID_S)
2134 #define CPL_RX_PHYS_DSGL_DCAID_G(x)     \
2135 	(((x) >> CPL_RX_PHYS_DSGL_DCAID_S) & \
2136 	 CPL_RX_PHYS_DSGL_DCAID_M)
2137 
2138 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_S           0
2139 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_M           0xffff
2140 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_V(x)        \
2141 	((x) << CPL_RX_PHYS_DSGL_NOOFSGENTR_S)
2142 #define CPL_RX_PHYS_DSGL_NOOFSGENTR_G(x)        \
2143 	(((x) >> CPL_RX_PHYS_DSGL_NOOFSGENTR_S) & \
2144 	 CPL_RX_PHYS_DSGL_NOOFSGENTR_M)
2145 
2146 struct cpl_rx_mps_pkt {
2147 	__be32 op_to_r1_hi;
2148 	__be32 r1_lo_length;
2149 };
2150 
2151 #define CPL_RX_MPS_PKT_OP_S     24
2152 #define CPL_RX_MPS_PKT_OP_M     0xff
2153 #define CPL_RX_MPS_PKT_OP_V(x)  ((x) << CPL_RX_MPS_PKT_OP_S)
2154 #define CPL_RX_MPS_PKT_OP_G(x)  \
2155 	(((x) >> CPL_RX_MPS_PKT_OP_S) & CPL_RX_MPS_PKT_OP_M)
2156 
2157 #define CPL_RX_MPS_PKT_TYPE_S           20
2158 #define CPL_RX_MPS_PKT_TYPE_M           0xf
2159 #define CPL_RX_MPS_PKT_TYPE_V(x)        ((x) << CPL_RX_MPS_PKT_TYPE_S)
2160 #define CPL_RX_MPS_PKT_TYPE_G(x)        \
2161 	(((x) >> CPL_RX_MPS_PKT_TYPE_S) & CPL_RX_MPS_PKT_TYPE_M)
2162 
2163 enum {
2164 	X_CPL_RX_MPS_PKT_TYPE_PAUSE = 1 << 0,
2165 	X_CPL_RX_MPS_PKT_TYPE_PPP   = 1 << 1,
2166 	X_CPL_RX_MPS_PKT_TYPE_QFC   = 1 << 2,
2167 	X_CPL_RX_MPS_PKT_TYPE_PTP   = 1 << 3
2168 };
2169 
2170 struct cpl_srq_table_req {
2171 	WR_HDR;
2172 	union opcode_tid ot;
2173 	__u8 status;
2174 	__u8 rsvd[2];
2175 	__u8 idx;
2176 	__be64 rsvd_pdid;
2177 	__be32 qlen_qbase;
2178 	__be16 cur_msn;
2179 	__be16 max_msn;
2180 };
2181 
2182 struct cpl_srq_table_rpl {
2183 	union opcode_tid ot;
2184 	__u8 status;
2185 	__u8 rsvd[2];
2186 	__u8 idx;
2187 	__be64 rsvd_pdid;
2188 	__be32 qlen_qbase;
2189 	__be16 cur_msn;
2190 	__be16 max_msn;
2191 };
2192 
2193 /* cpl_srq_table_{req,rpl}.params fields */
2194 #define SRQT_QLEN_S   28
2195 #define SRQT_QLEN_M   0xF
2196 #define SRQT_QLEN_V(x) ((x) << SRQT_QLEN_S)
2197 #define SRQT_QLEN_G(x) (((x) >> SRQT_QLEN_S) & SRQT_QLEN_M)
2198 
2199 #define SRQT_QBASE_S    0
2200 #define SRQT_QBASE_M   0x3FFFFFF
2201 #define SRQT_QBASE_V(x) ((x) << SRQT_QBASE_S)
2202 #define SRQT_QBASE_G(x) (((x) >> SRQT_QBASE_S) & SRQT_QBASE_M)
2203 
2204 #define SRQT_PDID_S    0
2205 #define SRQT_PDID_M   0xFF
2206 #define SRQT_PDID_V(x) ((x) << SRQT_PDID_S)
2207 #define SRQT_PDID_G(x) (((x) >> SRQT_PDID_S) & SRQT_PDID_M)
2208 
2209 #define SRQT_IDX_S    0
2210 #define SRQT_IDX_M    0xF
2211 #define SRQT_IDX_V(x) ((x) << SRQT_IDX_S)
2212 #define SRQT_IDX_G(x) (((x) >> SRQT_IDX_S) & SRQT_IDX_M)
2213 
2214 struct cpl_tx_tls_sfo {
2215 	__be32 op_to_seg_len;
2216 	__be32 pld_len;
2217 	__be32 type_protover;
2218 	__be32 r1_lo;
2219 	__be32 seqno_numivs;
2220 	__be32 ivgen_hdrlen;
2221 	__be64 scmd1;
2222 };
2223 
2224 /* cpl_tx_tls_sfo macros */
2225 #define CPL_TX_TLS_SFO_OPCODE_S         24
2226 #define CPL_TX_TLS_SFO_OPCODE_V(x)      ((x) << CPL_TX_TLS_SFO_OPCODE_S)
2227 
2228 #define CPL_TX_TLS_SFO_DATA_TYPE_S      20
2229 #define CPL_TX_TLS_SFO_DATA_TYPE_V(x)   ((x) << CPL_TX_TLS_SFO_DATA_TYPE_S)
2230 
2231 #define CPL_TX_TLS_SFO_CPL_LEN_S        16
2232 #define CPL_TX_TLS_SFO_CPL_LEN_V(x)     ((x) << CPL_TX_TLS_SFO_CPL_LEN_S)
2233 
2234 #define CPL_TX_TLS_SFO_SEG_LEN_S        0
2235 #define CPL_TX_TLS_SFO_SEG_LEN_M        0xffff
2236 #define CPL_TX_TLS_SFO_SEG_LEN_V(x)     ((x) << CPL_TX_TLS_SFO_SEG_LEN_S)
2237 #define CPL_TX_TLS_SFO_SEG_LEN_G(x)     \
2238 	(((x) >> CPL_TX_TLS_SFO_SEG_LEN_S) & CPL_TX_TLS_SFO_SEG_LEN_M)
2239 
2240 #define CPL_TX_TLS_SFO_TYPE_S           24
2241 #define CPL_TX_TLS_SFO_TYPE_M           0xff
2242 #define CPL_TX_TLS_SFO_TYPE_V(x)        ((x) << CPL_TX_TLS_SFO_TYPE_S)
2243 #define CPL_TX_TLS_SFO_TYPE_G(x)        \
2244 	(((x) >> CPL_TX_TLS_SFO_TYPE_S) & CPL_TX_TLS_SFO_TYPE_M)
2245 
2246 #define CPL_TX_TLS_SFO_PROTOVER_S       8
2247 #define CPL_TX_TLS_SFO_PROTOVER_M       0xffff
2248 #define CPL_TX_TLS_SFO_PROTOVER_V(x)    ((x) << CPL_TX_TLS_SFO_PROTOVER_S)
2249 #define CPL_TX_TLS_SFO_PROTOVER_G(x)    \
2250 	(((x) >> CPL_TX_TLS_SFO_PROTOVER_S) & CPL_TX_TLS_SFO_PROTOVER_M)
2251 
2252 struct cpl_tls_data {
2253 	struct rss_header rsshdr;
2254 	union opcode_tid ot;
2255 	__be32 length_pkd;
2256 	__be32 seq;
2257 	__be32 r1;
2258 };
2259 
2260 #define CPL_TLS_DATA_OPCODE_S           24
2261 #define CPL_TLS_DATA_OPCODE_M           0xff
2262 #define CPL_TLS_DATA_OPCODE_V(x)        ((x) << CPL_TLS_DATA_OPCODE_S)
2263 #define CPL_TLS_DATA_OPCODE_G(x)        \
2264 	(((x) >> CPL_TLS_DATA_OPCODE_S) & CPL_TLS_DATA_OPCODE_M)
2265 
2266 #define CPL_TLS_DATA_TID_S              0
2267 #define CPL_TLS_DATA_TID_M              0xffffff
2268 #define CPL_TLS_DATA_TID_V(x)           ((x) << CPL_TLS_DATA_TID_S)
2269 #define CPL_TLS_DATA_TID_G(x)           \
2270 	(((x) >> CPL_TLS_DATA_TID_S) & CPL_TLS_DATA_TID_M)
2271 
2272 #define CPL_TLS_DATA_LENGTH_S           0
2273 #define CPL_TLS_DATA_LENGTH_M           0xffff
2274 #define CPL_TLS_DATA_LENGTH_V(x)        ((x) << CPL_TLS_DATA_LENGTH_S)
2275 #define CPL_TLS_DATA_LENGTH_G(x)        \
2276 	(((x) >> CPL_TLS_DATA_LENGTH_S) & CPL_TLS_DATA_LENGTH_M)
2277 
2278 struct cpl_rx_tls_cmp {
2279 	struct rss_header rsshdr;
2280 	union opcode_tid ot;
2281 	__be32 pdulength_length;
2282 	__be32 seq;
2283 	__be32 ddp_report;
2284 	__be32 r;
2285 	__be32 ddp_valid;
2286 };
2287 
2288 #define CPL_RX_TLS_CMP_OPCODE_S         24
2289 #define CPL_RX_TLS_CMP_OPCODE_M         0xff
2290 #define CPL_RX_TLS_CMP_OPCODE_V(x)      ((x) << CPL_RX_TLS_CMP_OPCODE_S)
2291 #define CPL_RX_TLS_CMP_OPCODE_G(x)      \
2292 	(((x) >> CPL_RX_TLS_CMP_OPCODE_S) & CPL_RX_TLS_CMP_OPCODE_M)
2293 
2294 #define CPL_RX_TLS_CMP_TID_S            0
2295 #define CPL_RX_TLS_CMP_TID_M            0xffffff
2296 #define CPL_RX_TLS_CMP_TID_V(x)         ((x) << CPL_RX_TLS_CMP_TID_S)
2297 #define CPL_RX_TLS_CMP_TID_G(x)         \
2298 	(((x) >> CPL_RX_TLS_CMP_TID_S) & CPL_RX_TLS_CMP_TID_M)
2299 
2300 #define CPL_RX_TLS_CMP_PDULENGTH_S      16
2301 #define CPL_RX_TLS_CMP_PDULENGTH_M      0xffff
2302 #define CPL_RX_TLS_CMP_PDULENGTH_V(x)   ((x) << CPL_RX_TLS_CMP_PDULENGTH_S)
2303 #define CPL_RX_TLS_CMP_PDULENGTH_G(x)   \
2304 	(((x) >> CPL_RX_TLS_CMP_PDULENGTH_S) & CPL_RX_TLS_CMP_PDULENGTH_M)
2305 
2306 #define CPL_RX_TLS_CMP_LENGTH_S         0
2307 #define CPL_RX_TLS_CMP_LENGTH_M         0xffff
2308 #define CPL_RX_TLS_CMP_LENGTH_V(x)      ((x) << CPL_RX_TLS_CMP_LENGTH_S)
2309 #define CPL_RX_TLS_CMP_LENGTH_G(x)      \
2310 	(((x) >> CPL_RX_TLS_CMP_LENGTH_S) & CPL_RX_TLS_CMP_LENGTH_M)
2311 #endif  /* __T4_MSG_H */
2312