1 /* 2 * This file is part of the Chelsio T4 Ethernet driver for Linux. 3 * 4 * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef __T4_MSG_H 36 #define __T4_MSG_H 37 38 #include <linux/types.h> 39 40 enum { 41 CPL_PASS_OPEN_REQ = 0x1, 42 CPL_PASS_ACCEPT_RPL = 0x2, 43 CPL_ACT_OPEN_REQ = 0x3, 44 CPL_SET_TCB_FIELD = 0x5, 45 CPL_GET_TCB = 0x6, 46 CPL_CLOSE_CON_REQ = 0x8, 47 CPL_CLOSE_LISTSRV_REQ = 0x9, 48 CPL_ABORT_REQ = 0xA, 49 CPL_ABORT_RPL = 0xB, 50 CPL_RX_DATA_ACK = 0xD, 51 CPL_TX_PKT = 0xE, 52 CPL_L2T_WRITE_REQ = 0x12, 53 CPL_TID_RELEASE = 0x1A, 54 55 CPL_CLOSE_LISTSRV_RPL = 0x20, 56 CPL_L2T_WRITE_RPL = 0x23, 57 CPL_PASS_OPEN_RPL = 0x24, 58 CPL_ACT_OPEN_RPL = 0x25, 59 CPL_PEER_CLOSE = 0x26, 60 CPL_ABORT_REQ_RSS = 0x2B, 61 CPL_ABORT_RPL_RSS = 0x2D, 62 63 CPL_CLOSE_CON_RPL = 0x32, 64 CPL_ISCSI_HDR = 0x33, 65 CPL_RDMA_CQE = 0x35, 66 CPL_RDMA_CQE_READ_RSP = 0x36, 67 CPL_RDMA_CQE_ERR = 0x37, 68 CPL_RX_DATA = 0x39, 69 CPL_SET_TCB_RPL = 0x3A, 70 CPL_RX_PKT = 0x3B, 71 CPL_RX_DDP_COMPLETE = 0x3F, 72 73 CPL_ACT_ESTABLISH = 0x40, 74 CPL_PASS_ESTABLISH = 0x41, 75 CPL_RX_DATA_DDP = 0x42, 76 CPL_PASS_ACCEPT_REQ = 0x44, 77 78 CPL_RDMA_READ_REQ = 0x60, 79 80 CPL_PASS_OPEN_REQ6 = 0x81, 81 CPL_ACT_OPEN_REQ6 = 0x83, 82 83 CPL_RDMA_TERMINATE = 0xA2, 84 CPL_RDMA_WRITE = 0xA4, 85 CPL_SGE_EGR_UPDATE = 0xA5, 86 87 CPL_TRACE_PKT = 0xB0, 88 89 CPL_FW4_MSG = 0xC0, 90 CPL_FW4_PLD = 0xC1, 91 CPL_FW4_ACK = 0xC3, 92 93 CPL_FW6_MSG = 0xE0, 94 CPL_FW6_PLD = 0xE1, 95 CPL_TX_PKT_LSO = 0xED, 96 CPL_TX_PKT_XT = 0xEE, 97 98 NUM_CPL_CMDS 99 }; 100 101 enum CPL_error { 102 CPL_ERR_NONE = 0, 103 CPL_ERR_TCAM_FULL = 3, 104 CPL_ERR_BAD_LENGTH = 15, 105 CPL_ERR_BAD_ROUTE = 18, 106 CPL_ERR_CONN_RESET = 20, 107 CPL_ERR_CONN_EXIST_SYNRECV = 21, 108 CPL_ERR_CONN_EXIST = 22, 109 CPL_ERR_ARP_MISS = 23, 110 CPL_ERR_BAD_SYN = 24, 111 CPL_ERR_CONN_TIMEDOUT = 30, 112 CPL_ERR_XMIT_TIMEDOUT = 31, 113 CPL_ERR_PERSIST_TIMEDOUT = 32, 114 CPL_ERR_FINWAIT2_TIMEDOUT = 33, 115 CPL_ERR_KEEPALIVE_TIMEDOUT = 34, 116 CPL_ERR_RTX_NEG_ADVICE = 35, 117 CPL_ERR_PERSIST_NEG_ADVICE = 36, 118 CPL_ERR_ABORT_FAILED = 42, 119 CPL_ERR_IWARP_FLM = 50, 120 }; 121 122 enum { 123 ULP_MODE_NONE = 0, 124 ULP_MODE_ISCSI = 2, 125 ULP_MODE_RDMA = 4, 126 ULP_MODE_TCPDDP = 5, 127 ULP_MODE_FCOE = 6, 128 }; 129 130 enum { 131 ULP_CRC_HEADER = 1 << 0, 132 ULP_CRC_DATA = 1 << 1 133 }; 134 135 enum { 136 CPL_ABORT_SEND_RST = 0, 137 CPL_ABORT_NO_RST, 138 }; 139 140 enum { /* TX_PKT_XT checksum types */ 141 TX_CSUM_TCP = 0, 142 TX_CSUM_UDP = 1, 143 TX_CSUM_CRC16 = 4, 144 TX_CSUM_CRC32 = 5, 145 TX_CSUM_CRC32C = 6, 146 TX_CSUM_FCOE = 7, 147 TX_CSUM_TCPIP = 8, 148 TX_CSUM_UDPIP = 9, 149 TX_CSUM_TCPIP6 = 10, 150 TX_CSUM_UDPIP6 = 11, 151 TX_CSUM_IP = 12, 152 }; 153 154 union opcode_tid { 155 __be32 opcode_tid; 156 u8 opcode; 157 }; 158 159 #define CPL_OPCODE(x) ((x) << 24) 160 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid)) 161 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid) 162 #define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF) 163 164 /* partitioning of TID fields that also carry a queue id */ 165 #define GET_TID_TID(x) ((x) & 0x3fff) 166 #define GET_TID_QID(x) (((x) >> 14) & 0x3ff) 167 #define TID_QID(x) ((x) << 14) 168 169 struct rss_header { 170 u8 opcode; 171 #if defined(__LITTLE_ENDIAN_BITFIELD) 172 u8 channel:2; 173 u8 filter_hit:1; 174 u8 filter_tid:1; 175 u8 hash_type:2; 176 u8 ipv6:1; 177 u8 send2fw:1; 178 #else 179 u8 send2fw:1; 180 u8 ipv6:1; 181 u8 hash_type:2; 182 u8 filter_tid:1; 183 u8 filter_hit:1; 184 u8 channel:2; 185 #endif 186 __be16 qid; 187 __be32 hash_val; 188 }; 189 190 struct work_request_hdr { 191 __be32 wr_hi; 192 __be32 wr_mid; 193 __be64 wr_lo; 194 }; 195 196 /* wr_hi fields */ 197 #define S_WR_OP 24 198 #define V_WR_OP(x) ((__u64)(x) << S_WR_OP) 199 200 #define WR_HDR struct work_request_hdr wr 201 202 /* option 0 fields */ 203 #define S_MSS_IDX 60 204 #define M_MSS_IDX 0xF 205 #define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX) 206 #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX) 207 208 /* option 2 fields */ 209 #define S_RSS_QUEUE 0 210 #define M_RSS_QUEUE 0x3FF 211 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE) 212 #define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE) 213 214 struct cpl_pass_open_req { 215 WR_HDR; 216 union opcode_tid ot; 217 __be16 local_port; 218 __be16 peer_port; 219 __be32 local_ip; 220 __be32 peer_ip; 221 __be64 opt0; 222 #define TX_CHAN(x) ((x) << 2) 223 #define NO_CONG(x) ((x) << 4) 224 #define DELACK(x) ((x) << 5) 225 #define ULP_MODE(x) ((x) << 8) 226 #define RCV_BUFSIZ(x) ((x) << 12) 227 #define DSCP(x) ((x) << 22) 228 #define SMAC_SEL(x) ((u64)(x) << 28) 229 #define L2T_IDX(x) ((u64)(x) << 36) 230 #define TCAM_BYPASS(x) ((u64)(x) << 48) 231 #define NAGLE(x) ((u64)(x) << 49) 232 #define WND_SCALE(x) ((u64)(x) << 50) 233 #define KEEP_ALIVE(x) ((u64)(x) << 54) 234 #define MSS_IDX(x) ((u64)(x) << 60) 235 __be64 opt1; 236 #define SYN_RSS_ENABLE (1 << 0) 237 #define SYN_RSS_QUEUE(x) ((x) << 2) 238 #define CONN_POLICY_ASK (1 << 22) 239 }; 240 241 struct cpl_pass_open_req6 { 242 WR_HDR; 243 union opcode_tid ot; 244 __be16 local_port; 245 __be16 peer_port; 246 __be64 local_ip_hi; 247 __be64 local_ip_lo; 248 __be64 peer_ip_hi; 249 __be64 peer_ip_lo; 250 __be64 opt0; 251 __be64 opt1; 252 }; 253 254 struct cpl_pass_open_rpl { 255 union opcode_tid ot; 256 u8 rsvd[3]; 257 u8 status; 258 }; 259 260 struct cpl_pass_accept_rpl { 261 WR_HDR; 262 union opcode_tid ot; 263 __be32 opt2; 264 #define RSS_QUEUE(x) ((x) << 0) 265 #define RSS_QUEUE_VALID (1 << 10) 266 #define RX_COALESCE_VALID(x) ((x) << 11) 267 #define RX_COALESCE(x) ((x) << 12) 268 #define PACE(x) ((x) << 16) 269 #define TX_QUEUE(x) ((x) << 23) 270 #define RX_CHANNEL(x) ((x) << 26) 271 #define CCTRL_ECN(x) ((x) << 27) 272 #define WND_SCALE_EN(x) ((x) << 28) 273 #define TSTAMPS_EN(x) ((x) << 29) 274 #define SACK_EN(x) ((x) << 30) 275 __be64 opt0; 276 }; 277 278 struct cpl_act_open_req { 279 WR_HDR; 280 union opcode_tid ot; 281 __be16 local_port; 282 __be16 peer_port; 283 __be32 local_ip; 284 __be32 peer_ip; 285 __be64 opt0; 286 __be32 params; 287 __be32 opt2; 288 }; 289 290 struct cpl_act_open_req6 { 291 WR_HDR; 292 union opcode_tid ot; 293 __be16 local_port; 294 __be16 peer_port; 295 __be64 local_ip_hi; 296 __be64 local_ip_lo; 297 __be64 peer_ip_hi; 298 __be64 peer_ip_lo; 299 __be64 opt0; 300 __be32 params; 301 __be32 opt2; 302 }; 303 304 struct cpl_act_open_rpl { 305 union opcode_tid ot; 306 __be32 atid_status; 307 #define GET_AOPEN_STATUS(x) ((x) & 0xff) 308 #define GET_AOPEN_ATID(x) (((x) >> 8) & 0xffffff) 309 }; 310 311 struct cpl_pass_establish { 312 union opcode_tid ot; 313 __be32 rsvd; 314 __be32 tos_stid; 315 #define PASS_OPEN_TID(x) ((x) << 0) 316 #define PASS_OPEN_TOS(x) ((x) << 24) 317 #define GET_PASS_OPEN_TID(x) (((x) >> 0) & 0xFFFFFF) 318 #define GET_POPEN_TID(x) ((x) & 0xffffff) 319 #define GET_POPEN_TOS(x) (((x) >> 24) & 0xff) 320 __be16 mac_idx; 321 __be16 tcp_opt; 322 #define GET_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1) 323 #define GET_TCPOPT_SACK(x) (((x) >> 6) & 1) 324 #define GET_TCPOPT_TSTAMP(x) (((x) >> 7) & 1) 325 #define GET_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf) 326 #define GET_TCPOPT_MSS(x) (((x) >> 12) & 0xf) 327 __be32 snd_isn; 328 __be32 rcv_isn; 329 }; 330 331 struct cpl_act_establish { 332 union opcode_tid ot; 333 __be32 rsvd; 334 __be32 tos_atid; 335 __be16 mac_idx; 336 __be16 tcp_opt; 337 __be32 snd_isn; 338 __be32 rcv_isn; 339 }; 340 341 struct cpl_get_tcb { 342 WR_HDR; 343 union opcode_tid ot; 344 __be16 reply_ctrl; 345 #define QUEUENO(x) ((x) << 0) 346 #define REPLY_CHAN(x) ((x) << 14) 347 #define NO_REPLY(x) ((x) << 15) 348 __be16 cookie; 349 }; 350 351 struct cpl_set_tcb_field { 352 WR_HDR; 353 union opcode_tid ot; 354 __be16 reply_ctrl; 355 __be16 word_cookie; 356 #define TCB_WORD(x) ((x) << 0) 357 #define TCB_COOKIE(x) ((x) << 5) 358 #define GET_TCB_COOKIE(x) (((x) >> 5) & 7) 359 __be64 mask; 360 __be64 val; 361 }; 362 363 struct cpl_set_tcb_rpl { 364 union opcode_tid ot; 365 __be16 rsvd; 366 u8 cookie; 367 u8 status; 368 __be64 oldval; 369 }; 370 371 struct cpl_close_con_req { 372 WR_HDR; 373 union opcode_tid ot; 374 __be32 rsvd; 375 }; 376 377 struct cpl_close_con_rpl { 378 union opcode_tid ot; 379 u8 rsvd[3]; 380 u8 status; 381 __be32 snd_nxt; 382 __be32 rcv_nxt; 383 }; 384 385 struct cpl_close_listsvr_req { 386 WR_HDR; 387 union opcode_tid ot; 388 __be16 reply_ctrl; 389 #define LISTSVR_IPV6 (1 << 14) 390 __be16 rsvd; 391 }; 392 393 struct cpl_close_listsvr_rpl { 394 union opcode_tid ot; 395 u8 rsvd[3]; 396 u8 status; 397 }; 398 399 struct cpl_abort_req_rss { 400 union opcode_tid ot; 401 u8 rsvd[3]; 402 u8 status; 403 }; 404 405 struct cpl_abort_req { 406 WR_HDR; 407 union opcode_tid ot; 408 __be32 rsvd0; 409 u8 rsvd1; 410 u8 cmd; 411 u8 rsvd2[6]; 412 }; 413 414 struct cpl_abort_rpl_rss { 415 union opcode_tid ot; 416 u8 rsvd[3]; 417 u8 status; 418 }; 419 420 struct cpl_abort_rpl { 421 WR_HDR; 422 union opcode_tid ot; 423 __be32 rsvd0; 424 u8 rsvd1; 425 u8 cmd; 426 u8 rsvd2[6]; 427 }; 428 429 struct cpl_peer_close { 430 union opcode_tid ot; 431 __be32 rcv_nxt; 432 }; 433 434 struct cpl_tid_release { 435 WR_HDR; 436 union opcode_tid ot; 437 __be32 rsvd; 438 }; 439 440 struct cpl_tx_pkt_core { 441 __be32 ctrl0; 442 #define TXPKT_VF(x) ((x) << 0) 443 #define TXPKT_PF(x) ((x) << 8) 444 #define TXPKT_VF_VLD (1 << 11) 445 #define TXPKT_OVLAN_IDX(x) ((x) << 12) 446 #define TXPKT_INTF(x) ((x) << 16) 447 #define TXPKT_INS_OVLAN (1 << 21) 448 #define TXPKT_OPCODE(x) ((x) << 24) 449 __be16 pack; 450 __be16 len; 451 __be64 ctrl1; 452 #define TXPKT_CSUM_END(x) ((x) << 12) 453 #define TXPKT_CSUM_START(x) ((x) << 20) 454 #define TXPKT_IPHDR_LEN(x) ((u64)(x) << 20) 455 #define TXPKT_CSUM_LOC(x) ((u64)(x) << 30) 456 #define TXPKT_ETHHDR_LEN(x) ((u64)(x) << 34) 457 #define TXPKT_CSUM_TYPE(x) ((u64)(x) << 40) 458 #define TXPKT_VLAN(x) ((u64)(x) << 44) 459 #define TXPKT_VLAN_VLD (1ULL << 60) 460 #define TXPKT_IPCSUM_DIS (1ULL << 62) 461 #define TXPKT_L4CSUM_DIS (1ULL << 63) 462 }; 463 464 struct cpl_tx_pkt { 465 WR_HDR; 466 struct cpl_tx_pkt_core c; 467 }; 468 469 #define cpl_tx_pkt_xt cpl_tx_pkt 470 471 struct cpl_tx_pkt_lso_core { 472 __be32 lso_ctrl; 473 #define LSO_TCPHDR_LEN(x) ((x) << 0) 474 #define LSO_IPHDR_LEN(x) ((x) << 4) 475 #define LSO_ETHHDR_LEN(x) ((x) << 16) 476 #define LSO_IPV6(x) ((x) << 20) 477 #define LSO_LAST_SLICE (1 << 22) 478 #define LSO_FIRST_SLICE (1 << 23) 479 #define LSO_OPCODE(x) ((x) << 24) 480 __be16 ipid_ofst; 481 __be16 mss; 482 __be32 seqno_offset; 483 __be32 len; 484 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 485 }; 486 487 struct cpl_tx_pkt_lso { 488 WR_HDR; 489 struct cpl_tx_pkt_lso_core c; 490 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 491 }; 492 493 struct cpl_iscsi_hdr { 494 union opcode_tid ot; 495 __be16 pdu_len_ddp; 496 #define ISCSI_PDU_LEN(x) ((x) & 0x7FFF) 497 #define ISCSI_DDP (1 << 15) 498 __be16 len; 499 __be32 seq; 500 __be16 urg; 501 u8 rsvd; 502 u8 status; 503 }; 504 505 struct cpl_rx_data { 506 union opcode_tid ot; 507 __be16 rsvd; 508 __be16 len; 509 __be32 seq; 510 __be16 urg; 511 #if defined(__LITTLE_ENDIAN_BITFIELD) 512 u8 dack_mode:2; 513 u8 psh:1; 514 u8 heartbeat:1; 515 u8 ddp_off:1; 516 u8 :3; 517 #else 518 u8 :3; 519 u8 ddp_off:1; 520 u8 heartbeat:1; 521 u8 psh:1; 522 u8 dack_mode:2; 523 #endif 524 u8 status; 525 }; 526 527 struct cpl_rx_data_ack { 528 WR_HDR; 529 union opcode_tid ot; 530 __be32 credit_dack; 531 #define RX_CREDITS(x) ((x) << 0) 532 #define RX_FORCE_ACK(x) ((x) << 28) 533 }; 534 535 struct cpl_rx_pkt { 536 struct rss_header rsshdr; 537 u8 opcode; 538 #if defined(__LITTLE_ENDIAN_BITFIELD) 539 u8 iff:4; 540 u8 csum_calc:1; 541 u8 ipmi_pkt:1; 542 u8 vlan_ex:1; 543 u8 ip_frag:1; 544 #else 545 u8 ip_frag:1; 546 u8 vlan_ex:1; 547 u8 ipmi_pkt:1; 548 u8 csum_calc:1; 549 u8 iff:4; 550 #endif 551 __be16 csum; 552 __be16 vlan; 553 __be16 len; 554 __be32 l2info; 555 #define RXF_UDP (1 << 22) 556 #define RXF_TCP (1 << 23) 557 #define RXF_IP (1 << 24) 558 #define RXF_IP6 (1 << 25) 559 __be16 hdr_len; 560 __be16 err_vec; 561 }; 562 563 /* rx_pkt.l2info fields */ 564 #define S_RX_ETHHDR_LEN 0 565 #define M_RX_ETHHDR_LEN 0x1F 566 #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) 567 #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) 568 569 #define S_RX_MACIDX 8 570 #define M_RX_MACIDX 0x1FF 571 #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) 572 #define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX) 573 574 #define S_RXF_SYN 21 575 #define V_RXF_SYN(x) ((x) << S_RXF_SYN) 576 #define F_RXF_SYN V_RXF_SYN(1U) 577 578 #define S_RX_CHAN 28 579 #define M_RX_CHAN 0xF 580 #define V_RX_CHAN(x) ((x) << S_RX_CHAN) 581 #define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN) 582 583 /* rx_pkt.hdr_len fields */ 584 #define S_RX_TCPHDR_LEN 0 585 #define M_RX_TCPHDR_LEN 0x3F 586 #define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN) 587 #define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN) 588 589 #define S_RX_IPHDR_LEN 6 590 #define M_RX_IPHDR_LEN 0x3FF 591 #define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN) 592 #define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN) 593 594 struct cpl_trace_pkt { 595 u8 opcode; 596 u8 intf; 597 #if defined(__LITTLE_ENDIAN_BITFIELD) 598 u8 runt:4; 599 u8 filter_hit:4; 600 u8 :6; 601 u8 err:1; 602 u8 trunc:1; 603 #else 604 u8 filter_hit:4; 605 u8 runt:4; 606 u8 trunc:1; 607 u8 err:1; 608 u8 :6; 609 #endif 610 __be16 rsvd; 611 __be16 len; 612 __be64 tstamp; 613 }; 614 615 struct cpl_l2t_write_req { 616 WR_HDR; 617 union opcode_tid ot; 618 __be16 params; 619 #define L2T_W_INFO(x) ((x) << 2) 620 #define L2T_W_PORT(x) ((x) << 8) 621 #define L2T_W_NOREPLY(x) ((x) << 15) 622 __be16 l2t_idx; 623 __be16 vlan; 624 u8 dst_mac[6]; 625 }; 626 627 struct cpl_l2t_write_rpl { 628 union opcode_tid ot; 629 u8 status; 630 u8 rsvd[3]; 631 }; 632 633 struct cpl_rdma_terminate { 634 union opcode_tid ot; 635 __be16 rsvd; 636 __be16 len; 637 }; 638 639 struct cpl_sge_egr_update { 640 __be32 opcode_qid; 641 #define EGR_QID(x) ((x) & 0x1FFFF) 642 __be16 cidx; 643 __be16 pidx; 644 }; 645 646 struct cpl_fw4_pld { 647 u8 opcode; 648 u8 rsvd0[3]; 649 u8 type; 650 u8 rsvd1; 651 __be16 len; 652 __be64 data; 653 __be64 rsvd2; 654 }; 655 656 struct cpl_fw6_pld { 657 u8 opcode; 658 u8 rsvd[5]; 659 __be16 len; 660 __be64 data[4]; 661 }; 662 663 struct cpl_fw4_msg { 664 u8 opcode; 665 u8 type; 666 __be16 rsvd0; 667 __be32 rsvd1; 668 __be64 data[2]; 669 }; 670 671 struct cpl_fw4_ack { 672 union opcode_tid ot; 673 u8 credits; 674 u8 rsvd0[2]; 675 u8 seq_vld; 676 __be32 snd_nxt; 677 __be32 snd_una; 678 __be64 rsvd1; 679 }; 680 681 struct cpl_fw6_msg { 682 u8 opcode; 683 u8 type; 684 __be16 rsvd0; 685 __be32 rsvd1; 686 __be64 data[4]; 687 }; 688 689 /* cpl_fw6_msg.type values */ 690 enum { 691 FW6_TYPE_CMD_RPL = 0, 692 FW6_TYPE_WR_RPL = 1, 693 FW6_TYPE_CQE = 2, 694 FW6_TYPE_OFLD_CONNECTION_WR_RPL = 3, 695 }; 696 697 struct cpl_fw6_msg_ofld_connection_wr_rpl { 698 __u64 cookie; 699 __be32 tid; /* or atid in case of active failure */ 700 __u8 t_state; 701 __u8 retval; 702 __u8 rsvd[2]; 703 }; 704 705 enum { 706 ULP_TX_MEM_READ = 2, 707 ULP_TX_MEM_WRITE = 3, 708 ULP_TX_PKT = 4 709 }; 710 711 enum { 712 ULP_TX_SC_NOOP = 0x80, 713 ULP_TX_SC_IMM = 0x81, 714 ULP_TX_SC_DSGL = 0x82, 715 ULP_TX_SC_ISGL = 0x83 716 }; 717 718 struct ulptx_sge_pair { 719 __be32 len[2]; 720 __be64 addr[2]; 721 }; 722 723 struct ulptx_sgl { 724 __be32 cmd_nsge; 725 #define ULPTX_CMD(x) ((x) << 24) 726 #define ULPTX_NSGE(x) ((x) << 0) 727 #define ULPTX_MORE (1U << 23) 728 __be32 len0; 729 __be64 addr0; 730 struct ulptx_sge_pair sge[0]; 731 }; 732 733 struct ulp_mem_io { 734 WR_HDR; 735 __be32 cmd; 736 #define ULP_MEMIO_ORDER(x) ((x) << 23) 737 __be32 len16; /* command length */ 738 __be32 dlen; /* data length in 32-byte units */ 739 #define ULP_MEMIO_DATA_LEN(x) ((x) << 0) 740 __be32 lock_addr; 741 #define ULP_MEMIO_ADDR(x) ((x) << 0) 742 #define ULP_MEMIO_LOCK(x) ((x) << 31) 743 }; 744 745 #endif /* __T4_MSG_H */ 746