1 /* 2 * This file is part of the Chelsio T4 Ethernet driver for Linux. 3 * 4 * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef __T4_MSG_H 36 #define __T4_MSG_H 37 38 #include <linux/types.h> 39 40 enum { 41 CPL_PASS_OPEN_REQ = 0x1, 42 CPL_PASS_ACCEPT_RPL = 0x2, 43 CPL_ACT_OPEN_REQ = 0x3, 44 CPL_SET_TCB_FIELD = 0x5, 45 CPL_GET_TCB = 0x6, 46 CPL_CLOSE_CON_REQ = 0x8, 47 CPL_CLOSE_LISTSRV_REQ = 0x9, 48 CPL_ABORT_REQ = 0xA, 49 CPL_ABORT_RPL = 0xB, 50 CPL_RX_DATA_ACK = 0xD, 51 CPL_TX_PKT = 0xE, 52 CPL_L2T_WRITE_REQ = 0x12, 53 CPL_TID_RELEASE = 0x1A, 54 55 CPL_CLOSE_LISTSRV_RPL = 0x20, 56 CPL_L2T_WRITE_RPL = 0x23, 57 CPL_PASS_OPEN_RPL = 0x24, 58 CPL_ACT_OPEN_RPL = 0x25, 59 CPL_PEER_CLOSE = 0x26, 60 CPL_ABORT_REQ_RSS = 0x2B, 61 CPL_ABORT_RPL_RSS = 0x2D, 62 63 CPL_CLOSE_CON_RPL = 0x32, 64 CPL_ISCSI_HDR = 0x33, 65 CPL_RDMA_CQE = 0x35, 66 CPL_RDMA_CQE_READ_RSP = 0x36, 67 CPL_RDMA_CQE_ERR = 0x37, 68 CPL_RX_DATA = 0x39, 69 CPL_SET_TCB_RPL = 0x3A, 70 CPL_RX_PKT = 0x3B, 71 CPL_RX_DDP_COMPLETE = 0x3F, 72 73 CPL_ACT_ESTABLISH = 0x40, 74 CPL_PASS_ESTABLISH = 0x41, 75 CPL_RX_DATA_DDP = 0x42, 76 CPL_PASS_ACCEPT_REQ = 0x44, 77 CPL_TRACE_PKT_T5 = 0x48, 78 79 CPL_RDMA_READ_REQ = 0x60, 80 81 CPL_PASS_OPEN_REQ6 = 0x81, 82 CPL_ACT_OPEN_REQ6 = 0x83, 83 84 CPL_RDMA_TERMINATE = 0xA2, 85 CPL_RDMA_WRITE = 0xA4, 86 CPL_SGE_EGR_UPDATE = 0xA5, 87 88 CPL_TRACE_PKT = 0xB0, 89 90 CPL_FW4_MSG = 0xC0, 91 CPL_FW4_PLD = 0xC1, 92 CPL_FW4_ACK = 0xC3, 93 94 CPL_FW6_MSG = 0xE0, 95 CPL_FW6_PLD = 0xE1, 96 CPL_TX_PKT_LSO = 0xED, 97 CPL_TX_PKT_XT = 0xEE, 98 99 NUM_CPL_CMDS 100 }; 101 102 enum CPL_error { 103 CPL_ERR_NONE = 0, 104 CPL_ERR_TCAM_FULL = 3, 105 CPL_ERR_BAD_LENGTH = 15, 106 CPL_ERR_BAD_ROUTE = 18, 107 CPL_ERR_CONN_RESET = 20, 108 CPL_ERR_CONN_EXIST_SYNRECV = 21, 109 CPL_ERR_CONN_EXIST = 22, 110 CPL_ERR_ARP_MISS = 23, 111 CPL_ERR_BAD_SYN = 24, 112 CPL_ERR_CONN_TIMEDOUT = 30, 113 CPL_ERR_XMIT_TIMEDOUT = 31, 114 CPL_ERR_PERSIST_TIMEDOUT = 32, 115 CPL_ERR_FINWAIT2_TIMEDOUT = 33, 116 CPL_ERR_KEEPALIVE_TIMEDOUT = 34, 117 CPL_ERR_RTX_NEG_ADVICE = 35, 118 CPL_ERR_PERSIST_NEG_ADVICE = 36, 119 CPL_ERR_KEEPALV_NEG_ADVICE = 37, 120 CPL_ERR_ABORT_FAILED = 42, 121 CPL_ERR_IWARP_FLM = 50, 122 }; 123 124 enum { 125 ULP_MODE_NONE = 0, 126 ULP_MODE_ISCSI = 2, 127 ULP_MODE_RDMA = 4, 128 ULP_MODE_TCPDDP = 5, 129 ULP_MODE_FCOE = 6, 130 }; 131 132 enum { 133 ULP_CRC_HEADER = 1 << 0, 134 ULP_CRC_DATA = 1 << 1 135 }; 136 137 enum { 138 CPL_ABORT_SEND_RST = 0, 139 CPL_ABORT_NO_RST, 140 }; 141 142 enum { /* TX_PKT_XT checksum types */ 143 TX_CSUM_TCP = 0, 144 TX_CSUM_UDP = 1, 145 TX_CSUM_CRC16 = 4, 146 TX_CSUM_CRC32 = 5, 147 TX_CSUM_CRC32C = 6, 148 TX_CSUM_FCOE = 7, 149 TX_CSUM_TCPIP = 8, 150 TX_CSUM_UDPIP = 9, 151 TX_CSUM_TCPIP6 = 10, 152 TX_CSUM_UDPIP6 = 11, 153 TX_CSUM_IP = 12, 154 }; 155 156 union opcode_tid { 157 __be32 opcode_tid; 158 u8 opcode; 159 }; 160 161 #define CPL_OPCODE(x) ((x) << 24) 162 #define G_CPL_OPCODE(x) (((x) >> 24) & 0xFF) 163 #define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid)) 164 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid) 165 #define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF) 166 167 /* partitioning of TID fields that also carry a queue id */ 168 #define GET_TID_TID(x) ((x) & 0x3fff) 169 #define GET_TID_QID(x) (((x) >> 14) & 0x3ff) 170 #define TID_QID(x) ((x) << 14) 171 172 struct rss_header { 173 u8 opcode; 174 #if defined(__LITTLE_ENDIAN_BITFIELD) 175 u8 channel:2; 176 u8 filter_hit:1; 177 u8 filter_tid:1; 178 u8 hash_type:2; 179 u8 ipv6:1; 180 u8 send2fw:1; 181 #else 182 u8 send2fw:1; 183 u8 ipv6:1; 184 u8 hash_type:2; 185 u8 filter_tid:1; 186 u8 filter_hit:1; 187 u8 channel:2; 188 #endif 189 __be16 qid; 190 __be32 hash_val; 191 }; 192 193 struct work_request_hdr { 194 __be32 wr_hi; 195 __be32 wr_mid; 196 __be64 wr_lo; 197 }; 198 199 /* wr_hi fields */ 200 #define S_WR_OP 24 201 #define V_WR_OP(x) ((__u64)(x) << S_WR_OP) 202 203 #define WR_HDR struct work_request_hdr wr 204 205 /* option 0 fields */ 206 #define S_MSS_IDX 60 207 #define M_MSS_IDX 0xF 208 #define V_MSS_IDX(x) ((__u64)(x) << S_MSS_IDX) 209 #define G_MSS_IDX(x) (((x) >> S_MSS_IDX) & M_MSS_IDX) 210 211 /* option 2 fields */ 212 #define S_RSS_QUEUE 0 213 #define M_RSS_QUEUE 0x3FF 214 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE) 215 #define G_RSS_QUEUE(x) (((x) >> S_RSS_QUEUE) & M_RSS_QUEUE) 216 217 struct cpl_pass_open_req { 218 WR_HDR; 219 union opcode_tid ot; 220 __be16 local_port; 221 __be16 peer_port; 222 __be32 local_ip; 223 __be32 peer_ip; 224 __be64 opt0; 225 #define TX_CHAN(x) ((x) << 2) 226 #define NO_CONG(x) ((x) << 4) 227 #define DELACK(x) ((x) << 5) 228 #define ULP_MODE(x) ((x) << 8) 229 #define RCV_BUFSIZ(x) ((x) << 12) 230 #define RCV_BUFSIZ_MASK 0x3FFU 231 #define DSCP(x) ((x) << 22) 232 #define SMAC_SEL(x) ((u64)(x) << 28) 233 #define L2T_IDX(x) ((u64)(x) << 36) 234 #define TCAM_BYPASS(x) ((u64)(x) << 48) 235 #define NAGLE(x) ((u64)(x) << 49) 236 #define WND_SCALE(x) ((u64)(x) << 50) 237 #define KEEP_ALIVE(x) ((u64)(x) << 54) 238 #define MSS_IDX(x) ((u64)(x) << 60) 239 __be64 opt1; 240 #define SYN_RSS_ENABLE (1 << 0) 241 #define SYN_RSS_QUEUE(x) ((x) << 2) 242 #define CONN_POLICY_ASK (1 << 22) 243 }; 244 245 struct cpl_pass_open_req6 { 246 WR_HDR; 247 union opcode_tid ot; 248 __be16 local_port; 249 __be16 peer_port; 250 __be64 local_ip_hi; 251 __be64 local_ip_lo; 252 __be64 peer_ip_hi; 253 __be64 peer_ip_lo; 254 __be64 opt0; 255 __be64 opt1; 256 }; 257 258 struct cpl_pass_open_rpl { 259 union opcode_tid ot; 260 u8 rsvd[3]; 261 u8 status; 262 }; 263 264 struct cpl_pass_accept_rpl { 265 WR_HDR; 266 union opcode_tid ot; 267 __be32 opt2; 268 #define RSS_QUEUE(x) ((x) << 0) 269 #define RSS_QUEUE_VALID (1 << 10) 270 #define RX_COALESCE_VALID(x) ((x) << 11) 271 #define RX_COALESCE(x) ((x) << 12) 272 #define PACE(x) ((x) << 16) 273 #define TX_QUEUE(x) ((x) << 23) 274 #define RX_CHANNEL(x) ((x) << 26) 275 #define CCTRL_ECN(x) ((x) << 27) 276 #define WND_SCALE_EN(x) ((x) << 28) 277 #define TSTAMPS_EN(x) ((x) << 29) 278 #define SACK_EN(x) ((x) << 30) 279 __be64 opt0; 280 }; 281 282 struct cpl_t5_pass_accept_rpl { 283 WR_HDR; 284 union opcode_tid ot; 285 __be32 opt2; 286 __be64 opt0; 287 __be32 iss; 288 __be32 rsvd; 289 }; 290 291 struct cpl_act_open_req { 292 WR_HDR; 293 union opcode_tid ot; 294 __be16 local_port; 295 __be16 peer_port; 296 __be32 local_ip; 297 __be32 peer_ip; 298 __be64 opt0; 299 __be32 params; 300 __be32 opt2; 301 }; 302 303 #define S_FILTER_TUPLE 24 304 #define M_FILTER_TUPLE 0xFFFFFFFFFF 305 #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE) 306 #define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE) 307 struct cpl_t5_act_open_req { 308 WR_HDR; 309 union opcode_tid ot; 310 __be16 local_port; 311 __be16 peer_port; 312 __be32 local_ip; 313 __be32 peer_ip; 314 __be64 opt0; 315 __be32 rsvd; 316 __be32 opt2; 317 __be64 params; 318 }; 319 320 struct cpl_act_open_req6 { 321 WR_HDR; 322 union opcode_tid ot; 323 __be16 local_port; 324 __be16 peer_port; 325 __be64 local_ip_hi; 326 __be64 local_ip_lo; 327 __be64 peer_ip_hi; 328 __be64 peer_ip_lo; 329 __be64 opt0; 330 __be32 params; 331 __be32 opt2; 332 }; 333 334 struct cpl_t5_act_open_req6 { 335 WR_HDR; 336 union opcode_tid ot; 337 __be16 local_port; 338 __be16 peer_port; 339 __be64 local_ip_hi; 340 __be64 local_ip_lo; 341 __be64 peer_ip_hi; 342 __be64 peer_ip_lo; 343 __be64 opt0; 344 __be32 rsvd; 345 __be32 opt2; 346 __be64 params; 347 }; 348 349 struct cpl_act_open_rpl { 350 union opcode_tid ot; 351 __be32 atid_status; 352 #define GET_AOPEN_STATUS(x) ((x) & 0xff) 353 #define GET_AOPEN_ATID(x) (((x) >> 8) & 0xffffff) 354 }; 355 356 struct cpl_pass_establish { 357 union opcode_tid ot; 358 __be32 rsvd; 359 __be32 tos_stid; 360 #define PASS_OPEN_TID(x) ((x) << 0) 361 #define PASS_OPEN_TOS(x) ((x) << 24) 362 #define GET_PASS_OPEN_TID(x) (((x) >> 0) & 0xFFFFFF) 363 #define GET_POPEN_TID(x) ((x) & 0xffffff) 364 #define GET_POPEN_TOS(x) (((x) >> 24) & 0xff) 365 __be16 mac_idx; 366 __be16 tcp_opt; 367 #define GET_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1) 368 #define GET_TCPOPT_SACK(x) (((x) >> 6) & 1) 369 #define GET_TCPOPT_TSTAMP(x) (((x) >> 7) & 1) 370 #define GET_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf) 371 #define GET_TCPOPT_MSS(x) (((x) >> 12) & 0xf) 372 __be32 snd_isn; 373 __be32 rcv_isn; 374 }; 375 376 struct cpl_act_establish { 377 union opcode_tid ot; 378 __be32 rsvd; 379 __be32 tos_atid; 380 __be16 mac_idx; 381 __be16 tcp_opt; 382 __be32 snd_isn; 383 __be32 rcv_isn; 384 }; 385 386 struct cpl_get_tcb { 387 WR_HDR; 388 union opcode_tid ot; 389 __be16 reply_ctrl; 390 #define QUEUENO(x) ((x) << 0) 391 #define REPLY_CHAN(x) ((x) << 14) 392 #define NO_REPLY(x) ((x) << 15) 393 __be16 cookie; 394 }; 395 396 struct cpl_set_tcb_field { 397 WR_HDR; 398 union opcode_tid ot; 399 __be16 reply_ctrl; 400 __be16 word_cookie; 401 #define TCB_WORD(x) ((x) << 0) 402 #define TCB_COOKIE(x) ((x) << 5) 403 #define GET_TCB_COOKIE(x) (((x) >> 5) & 7) 404 __be64 mask; 405 __be64 val; 406 }; 407 408 struct cpl_set_tcb_rpl { 409 union opcode_tid ot; 410 __be16 rsvd; 411 u8 cookie; 412 u8 status; 413 __be64 oldval; 414 }; 415 416 struct cpl_close_con_req { 417 WR_HDR; 418 union opcode_tid ot; 419 __be32 rsvd; 420 }; 421 422 struct cpl_close_con_rpl { 423 union opcode_tid ot; 424 u8 rsvd[3]; 425 u8 status; 426 __be32 snd_nxt; 427 __be32 rcv_nxt; 428 }; 429 430 struct cpl_close_listsvr_req { 431 WR_HDR; 432 union opcode_tid ot; 433 __be16 reply_ctrl; 434 #define LISTSVR_IPV6(x) ((x) << 14) 435 __be16 rsvd; 436 }; 437 438 struct cpl_close_listsvr_rpl { 439 union opcode_tid ot; 440 u8 rsvd[3]; 441 u8 status; 442 }; 443 444 struct cpl_abort_req_rss { 445 union opcode_tid ot; 446 u8 rsvd[3]; 447 u8 status; 448 }; 449 450 struct cpl_abort_req { 451 WR_HDR; 452 union opcode_tid ot; 453 __be32 rsvd0; 454 u8 rsvd1; 455 u8 cmd; 456 u8 rsvd2[6]; 457 }; 458 459 struct cpl_abort_rpl_rss { 460 union opcode_tid ot; 461 u8 rsvd[3]; 462 u8 status; 463 }; 464 465 struct cpl_abort_rpl { 466 WR_HDR; 467 union opcode_tid ot; 468 __be32 rsvd0; 469 u8 rsvd1; 470 u8 cmd; 471 u8 rsvd2[6]; 472 }; 473 474 struct cpl_peer_close { 475 union opcode_tid ot; 476 __be32 rcv_nxt; 477 }; 478 479 struct cpl_tid_release { 480 WR_HDR; 481 union opcode_tid ot; 482 __be32 rsvd; 483 }; 484 485 struct cpl_tx_pkt_core { 486 __be32 ctrl0; 487 #define TXPKT_VF(x) ((x) << 0) 488 #define TXPKT_PF(x) ((x) << 8) 489 #define TXPKT_VF_VLD (1 << 11) 490 #define TXPKT_OVLAN_IDX(x) ((x) << 12) 491 #define TXPKT_INTF(x) ((x) << 16) 492 #define TXPKT_INS_OVLAN (1 << 21) 493 #define TXPKT_OPCODE(x) ((x) << 24) 494 __be16 pack; 495 __be16 len; 496 __be64 ctrl1; 497 #define TXPKT_CSUM_END(x) ((x) << 12) 498 #define TXPKT_CSUM_START(x) ((x) << 20) 499 #define TXPKT_IPHDR_LEN(x) ((u64)(x) << 20) 500 #define TXPKT_CSUM_LOC(x) ((u64)(x) << 30) 501 #define TXPKT_ETHHDR_LEN(x) ((u64)(x) << 34) 502 #define TXPKT_CSUM_TYPE(x) ((u64)(x) << 40) 503 #define TXPKT_VLAN(x) ((u64)(x) << 44) 504 #define TXPKT_VLAN_VLD (1ULL << 60) 505 #define TXPKT_IPCSUM_DIS (1ULL << 62) 506 #define TXPKT_L4CSUM_DIS (1ULL << 63) 507 }; 508 509 struct cpl_tx_pkt { 510 WR_HDR; 511 struct cpl_tx_pkt_core c; 512 }; 513 514 #define cpl_tx_pkt_xt cpl_tx_pkt 515 516 struct cpl_tx_pkt_lso_core { 517 __be32 lso_ctrl; 518 #define LSO_TCPHDR_LEN(x) ((x) << 0) 519 #define LSO_IPHDR_LEN(x) ((x) << 4) 520 #define LSO_ETHHDR_LEN(x) ((x) << 16) 521 #define LSO_IPV6(x) ((x) << 20) 522 #define LSO_LAST_SLICE (1 << 22) 523 #define LSO_FIRST_SLICE (1 << 23) 524 #define LSO_OPCODE(x) ((x) << 24) 525 __be16 ipid_ofst; 526 __be16 mss; 527 __be32 seqno_offset; 528 __be32 len; 529 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 530 }; 531 532 struct cpl_tx_pkt_lso { 533 WR_HDR; 534 struct cpl_tx_pkt_lso_core c; 535 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */ 536 }; 537 538 struct cpl_iscsi_hdr { 539 union opcode_tid ot; 540 __be16 pdu_len_ddp; 541 #define ISCSI_PDU_LEN(x) ((x) & 0x7FFF) 542 #define ISCSI_DDP (1 << 15) 543 __be16 len; 544 __be32 seq; 545 __be16 urg; 546 u8 rsvd; 547 u8 status; 548 }; 549 550 struct cpl_rx_data { 551 union opcode_tid ot; 552 __be16 rsvd; 553 __be16 len; 554 __be32 seq; 555 __be16 urg; 556 #if defined(__LITTLE_ENDIAN_BITFIELD) 557 u8 dack_mode:2; 558 u8 psh:1; 559 u8 heartbeat:1; 560 u8 ddp_off:1; 561 u8 :3; 562 #else 563 u8 :3; 564 u8 ddp_off:1; 565 u8 heartbeat:1; 566 u8 psh:1; 567 u8 dack_mode:2; 568 #endif 569 u8 status; 570 }; 571 572 struct cpl_rx_data_ack { 573 WR_HDR; 574 union opcode_tid ot; 575 __be32 credit_dack; 576 #define RX_CREDITS(x) ((x) << 0) 577 #define RX_FORCE_ACK(x) ((x) << 28) 578 }; 579 580 struct cpl_rx_pkt { 581 struct rss_header rsshdr; 582 u8 opcode; 583 #if defined(__LITTLE_ENDIAN_BITFIELD) 584 u8 iff:4; 585 u8 csum_calc:1; 586 u8 ipmi_pkt:1; 587 u8 vlan_ex:1; 588 u8 ip_frag:1; 589 #else 590 u8 ip_frag:1; 591 u8 vlan_ex:1; 592 u8 ipmi_pkt:1; 593 u8 csum_calc:1; 594 u8 iff:4; 595 #endif 596 __be16 csum; 597 __be16 vlan; 598 __be16 len; 599 __be32 l2info; 600 #define RXF_UDP (1 << 22) 601 #define RXF_TCP (1 << 23) 602 #define RXF_IP (1 << 24) 603 #define RXF_IP6 (1 << 25) 604 __be16 hdr_len; 605 __be16 err_vec; 606 }; 607 608 /* rx_pkt.l2info fields */ 609 #define S_RX_ETHHDR_LEN 0 610 #define M_RX_ETHHDR_LEN 0x1F 611 #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) 612 #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) 613 614 #define S_RX_T5_ETHHDR_LEN 0 615 #define M_RX_T5_ETHHDR_LEN 0x3F 616 #define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN) 617 #define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN) 618 619 #define S_RX_MACIDX 8 620 #define M_RX_MACIDX 0x1FF 621 #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) 622 #define G_RX_MACIDX(x) (((x) >> S_RX_MACIDX) & M_RX_MACIDX) 623 624 #define S_RXF_SYN 21 625 #define V_RXF_SYN(x) ((x) << S_RXF_SYN) 626 #define F_RXF_SYN V_RXF_SYN(1U) 627 628 #define S_RX_CHAN 28 629 #define M_RX_CHAN 0xF 630 #define V_RX_CHAN(x) ((x) << S_RX_CHAN) 631 #define G_RX_CHAN(x) (((x) >> S_RX_CHAN) & M_RX_CHAN) 632 633 /* rx_pkt.hdr_len fields */ 634 #define S_RX_TCPHDR_LEN 0 635 #define M_RX_TCPHDR_LEN 0x3F 636 #define V_RX_TCPHDR_LEN(x) ((x) << S_RX_TCPHDR_LEN) 637 #define G_RX_TCPHDR_LEN(x) (((x) >> S_RX_TCPHDR_LEN) & M_RX_TCPHDR_LEN) 638 639 #define S_RX_IPHDR_LEN 6 640 #define M_RX_IPHDR_LEN 0x3FF 641 #define V_RX_IPHDR_LEN(x) ((x) << S_RX_IPHDR_LEN) 642 #define G_RX_IPHDR_LEN(x) (((x) >> S_RX_IPHDR_LEN) & M_RX_IPHDR_LEN) 643 644 struct cpl_trace_pkt { 645 u8 opcode; 646 u8 intf; 647 #if defined(__LITTLE_ENDIAN_BITFIELD) 648 u8 runt:4; 649 u8 filter_hit:4; 650 u8 :6; 651 u8 err:1; 652 u8 trunc:1; 653 #else 654 u8 filter_hit:4; 655 u8 runt:4; 656 u8 trunc:1; 657 u8 err:1; 658 u8 :6; 659 #endif 660 __be16 rsvd; 661 __be16 len; 662 __be64 tstamp; 663 }; 664 665 struct cpl_t5_trace_pkt { 666 __u8 opcode; 667 __u8 intf; 668 #if defined(__LITTLE_ENDIAN_BITFIELD) 669 __u8 runt:4; 670 __u8 filter_hit:4; 671 __u8:6; 672 __u8 err:1; 673 __u8 trunc:1; 674 #else 675 __u8 filter_hit:4; 676 __u8 runt:4; 677 __u8 trunc:1; 678 __u8 err:1; 679 __u8:6; 680 #endif 681 __be16 rsvd; 682 __be16 len; 683 __be64 tstamp; 684 __be64 rsvd1; 685 }; 686 687 struct cpl_l2t_write_req { 688 WR_HDR; 689 union opcode_tid ot; 690 __be16 params; 691 #define L2T_W_INFO(x) ((x) << 2) 692 #define L2T_W_PORT(x) ((x) << 8) 693 #define L2T_W_NOREPLY(x) ((x) << 15) 694 __be16 l2t_idx; 695 __be16 vlan; 696 u8 dst_mac[6]; 697 }; 698 699 struct cpl_l2t_write_rpl { 700 union opcode_tid ot; 701 u8 status; 702 u8 rsvd[3]; 703 }; 704 705 struct cpl_rdma_terminate { 706 union opcode_tid ot; 707 __be16 rsvd; 708 __be16 len; 709 }; 710 711 struct cpl_sge_egr_update { 712 __be32 opcode_qid; 713 #define EGR_QID(x) ((x) & 0x1FFFF) 714 __be16 cidx; 715 __be16 pidx; 716 }; 717 718 /* cpl_fw*.type values */ 719 enum { 720 FW_TYPE_CMD_RPL = 0, 721 FW_TYPE_WR_RPL = 1, 722 FW_TYPE_CQE = 2, 723 FW_TYPE_OFLD_CONNECTION_WR_RPL = 3, 724 FW_TYPE_RSSCPL = 4, 725 }; 726 727 struct cpl_fw4_pld { 728 u8 opcode; 729 u8 rsvd0[3]; 730 u8 type; 731 u8 rsvd1; 732 __be16 len; 733 __be64 data; 734 __be64 rsvd2; 735 }; 736 737 struct cpl_fw6_pld { 738 u8 opcode; 739 u8 rsvd[5]; 740 __be16 len; 741 __be64 data[4]; 742 }; 743 744 struct cpl_fw4_msg { 745 u8 opcode; 746 u8 type; 747 __be16 rsvd0; 748 __be32 rsvd1; 749 __be64 data[2]; 750 }; 751 752 struct cpl_fw4_ack { 753 union opcode_tid ot; 754 u8 credits; 755 u8 rsvd0[2]; 756 u8 seq_vld; 757 __be32 snd_nxt; 758 __be32 snd_una; 759 __be64 rsvd1; 760 }; 761 762 struct cpl_fw6_msg { 763 u8 opcode; 764 u8 type; 765 __be16 rsvd0; 766 __be32 rsvd1; 767 __be64 data[4]; 768 }; 769 770 /* cpl_fw6_msg.type values */ 771 enum { 772 FW6_TYPE_CMD_RPL = 0, 773 FW6_TYPE_WR_RPL = 1, 774 FW6_TYPE_CQE = 2, 775 FW6_TYPE_OFLD_CONNECTION_WR_RPL = 3, 776 FW6_TYPE_RSSCPL = FW_TYPE_RSSCPL, 777 }; 778 779 struct cpl_fw6_msg_ofld_connection_wr_rpl { 780 __u64 cookie; 781 __be32 tid; /* or atid in case of active failure */ 782 __u8 t_state; 783 __u8 retval; 784 __u8 rsvd[2]; 785 }; 786 787 enum { 788 ULP_TX_MEM_READ = 2, 789 ULP_TX_MEM_WRITE = 3, 790 ULP_TX_PKT = 4 791 }; 792 793 enum { 794 ULP_TX_SC_NOOP = 0x80, 795 ULP_TX_SC_IMM = 0x81, 796 ULP_TX_SC_DSGL = 0x82, 797 ULP_TX_SC_ISGL = 0x83 798 }; 799 800 struct ulptx_sge_pair { 801 __be32 len[2]; 802 __be64 addr[2]; 803 }; 804 805 struct ulptx_sgl { 806 __be32 cmd_nsge; 807 #define ULPTX_CMD(x) ((x) << 24) 808 #define ULPTX_NSGE(x) ((x) << 0) 809 #define ULPTX_MORE (1U << 23) 810 __be32 len0; 811 __be64 addr0; 812 struct ulptx_sge_pair sge[0]; 813 }; 814 815 struct ulp_mem_io { 816 WR_HDR; 817 __be32 cmd; 818 #define ULP_MEMIO_ORDER(x) ((x) << 23) 819 __be32 len16; /* command length */ 820 __be32 dlen; /* data length in 32-byte units */ 821 #define ULP_MEMIO_DATA_LEN(x) ((x) << 0) 822 __be32 lock_addr; 823 #define ULP_MEMIO_ADDR(x) ((x) << 0) 824 #define ULP_MEMIO_LOCK(x) ((x) << 31) 825 }; 826 827 #define S_T5_ULP_MEMIO_IMM 23 828 #define V_T5_ULP_MEMIO_IMM(x) ((x) << S_T5_ULP_MEMIO_IMM) 829 #define F_T5_ULP_MEMIO_IMM V_T5_ULP_MEMIO_IMM(1U) 830 831 #define S_T5_ULP_MEMIO_ORDER 22 832 #define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER) 833 #define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U) 834 835 #endif /* __T4_MSG_H */ 836