1f7917c00SJeff Kirsher /* 2f7917c00SJeff Kirsher * This file is part of the Chelsio T4 Ethernet driver for Linux. 3f7917c00SJeff Kirsher * 4ce100b8bSAnish Bhatt * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved. 5f7917c00SJeff Kirsher * 6f7917c00SJeff Kirsher * This software is available to you under a choice of one of two 7f7917c00SJeff Kirsher * licenses. You may choose to be licensed under the terms of the GNU 8f7917c00SJeff Kirsher * General Public License (GPL) Version 2, available from the file 9f7917c00SJeff Kirsher * COPYING in the main directory of this source tree, or the 10f7917c00SJeff Kirsher * OpenIB.org BSD license below: 11f7917c00SJeff Kirsher * 12f7917c00SJeff Kirsher * Redistribution and use in source and binary forms, with or 13f7917c00SJeff Kirsher * without modification, are permitted provided that the following 14f7917c00SJeff Kirsher * conditions are met: 15f7917c00SJeff Kirsher * 16f7917c00SJeff Kirsher * - Redistributions of source code must retain the above 17f7917c00SJeff Kirsher * copyright notice, this list of conditions and the following 18f7917c00SJeff Kirsher * disclaimer. 19f7917c00SJeff Kirsher * 20f7917c00SJeff Kirsher * - Redistributions in binary form must reproduce the above 21f7917c00SJeff Kirsher * copyright notice, this list of conditions and the following 22f7917c00SJeff Kirsher * disclaimer in the documentation and/or other materials 23f7917c00SJeff Kirsher * provided with the distribution. 24f7917c00SJeff Kirsher * 25f7917c00SJeff Kirsher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26f7917c00SJeff Kirsher * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27f7917c00SJeff Kirsher * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28f7917c00SJeff Kirsher * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29f7917c00SJeff Kirsher * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30f7917c00SJeff Kirsher * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31f7917c00SJeff Kirsher * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32f7917c00SJeff Kirsher * SOFTWARE. 33f7917c00SJeff Kirsher */ 34f7917c00SJeff Kirsher 35f7917c00SJeff Kirsher #include <linux/skbuff.h> 36f7917c00SJeff Kirsher #include <linux/netdevice.h> 37f7917c00SJeff Kirsher #include <linux/etherdevice.h> 38f7917c00SJeff Kirsher #include <linux/if_vlan.h> 39f7917c00SJeff Kirsher #include <linux/ip.h> 40f7917c00SJeff Kirsher #include <linux/dma-mapping.h> 41f7917c00SJeff Kirsher #include <linux/jiffies.h> 42f7917c00SJeff Kirsher #include <linux/prefetch.h> 43ee40fa06SPaul Gortmaker #include <linux/export.h> 44f7917c00SJeff Kirsher #include <net/ipv6.h> 45f7917c00SJeff Kirsher #include <net/tcp.h> 46f7917c00SJeff Kirsher #include "cxgb4.h" 47f7917c00SJeff Kirsher #include "t4_regs.h" 48f7917c00SJeff Kirsher #include "t4_msg.h" 49f7917c00SJeff Kirsher #include "t4fw_api.h" 50f7917c00SJeff Kirsher 51f7917c00SJeff Kirsher /* 52f7917c00SJeff Kirsher * Rx buffer size. We use largish buffers if possible but settle for single 53f7917c00SJeff Kirsher * pages under memory shortage. 54f7917c00SJeff Kirsher */ 55f7917c00SJeff Kirsher #if PAGE_SHIFT >= 16 56f7917c00SJeff Kirsher # define FL_PG_ORDER 0 57f7917c00SJeff Kirsher #else 58f7917c00SJeff Kirsher # define FL_PG_ORDER (16 - PAGE_SHIFT) 59f7917c00SJeff Kirsher #endif 60f7917c00SJeff Kirsher 61f7917c00SJeff Kirsher /* RX_PULL_LEN should be <= RX_COPY_THRES */ 62f7917c00SJeff Kirsher #define RX_COPY_THRES 256 63f7917c00SJeff Kirsher #define RX_PULL_LEN 128 64f7917c00SJeff Kirsher 65f7917c00SJeff Kirsher /* 66f7917c00SJeff Kirsher * Main body length for sk_buffs used for Rx Ethernet packets with fragments. 67f7917c00SJeff Kirsher * Should be >= RX_PULL_LEN but possibly bigger to give pskb_may_pull some room. 68f7917c00SJeff Kirsher */ 69f7917c00SJeff Kirsher #define RX_PKT_SKB_LEN 512 70f7917c00SJeff Kirsher 71f7917c00SJeff Kirsher /* 72f7917c00SJeff Kirsher * Max number of Tx descriptors we clean up at a time. Should be modest as 73f7917c00SJeff Kirsher * freeing skbs isn't cheap and it happens while holding locks. We just need 74f7917c00SJeff Kirsher * to free packets faster than they arrive, we eventually catch up and keep 75f7917c00SJeff Kirsher * the amortized cost reasonable. Must be >= 2 * TXQ_STOP_THRES. 76f7917c00SJeff Kirsher */ 77f7917c00SJeff Kirsher #define MAX_TX_RECLAIM 16 78f7917c00SJeff Kirsher 79f7917c00SJeff Kirsher /* 80f7917c00SJeff Kirsher * Max number of Rx buffers we replenish at a time. Again keep this modest, 81f7917c00SJeff Kirsher * allocating buffers isn't cheap either. 82f7917c00SJeff Kirsher */ 83f7917c00SJeff Kirsher #define MAX_RX_REFILL 16U 84f7917c00SJeff Kirsher 85f7917c00SJeff Kirsher /* 86f7917c00SJeff Kirsher * Period of the Rx queue check timer. This timer is infrequent as it has 87f7917c00SJeff Kirsher * something to do only when the system experiences severe memory shortage. 88f7917c00SJeff Kirsher */ 89f7917c00SJeff Kirsher #define RX_QCHECK_PERIOD (HZ / 2) 90f7917c00SJeff Kirsher 91f7917c00SJeff Kirsher /* 92f7917c00SJeff Kirsher * Period of the Tx queue check timer. 93f7917c00SJeff Kirsher */ 94f7917c00SJeff Kirsher #define TX_QCHECK_PERIOD (HZ / 2) 95f7917c00SJeff Kirsher 960f4d201fSKumar Sanghvi /* SGE Hung Ingress DMA Threshold Warning time (in Hz) and Warning Repeat Rate 970f4d201fSKumar Sanghvi * (in RX_QCHECK_PERIOD multiples). If we find one of the SGE Ingress DMA 980f4d201fSKumar Sanghvi * State Machines in the same state for this amount of time (in HZ) then we'll 990f4d201fSKumar Sanghvi * issue a warning about a potential hang. We'll repeat the warning as the 1000f4d201fSKumar Sanghvi * SGE Ingress DMA Channel appears to be hung every N RX_QCHECK_PERIODs till 1010f4d201fSKumar Sanghvi * the situation clears. If the situation clears, we'll note that as well. 1020f4d201fSKumar Sanghvi */ 1030f4d201fSKumar Sanghvi #define SGE_IDMA_WARN_THRESH (1 * HZ) 1040f4d201fSKumar Sanghvi #define SGE_IDMA_WARN_REPEAT (20 * RX_QCHECK_PERIOD) 1050f4d201fSKumar Sanghvi 106f7917c00SJeff Kirsher /* 107f7917c00SJeff Kirsher * Max number of Tx descriptors to be reclaimed by the Tx timer. 108f7917c00SJeff Kirsher */ 109f7917c00SJeff Kirsher #define MAX_TIMER_TX_RECLAIM 100 110f7917c00SJeff Kirsher 111f7917c00SJeff Kirsher /* 112f7917c00SJeff Kirsher * Timer index used when backing off due to memory shortage. 113f7917c00SJeff Kirsher */ 114f7917c00SJeff Kirsher #define NOMEM_TMR_IDX (SGE_NTIMERS - 1) 115f7917c00SJeff Kirsher 116f7917c00SJeff Kirsher /* 117f7917c00SJeff Kirsher * An FL with <= FL_STARVE_THRES buffers is starving and a periodic timer will 118f7917c00SJeff Kirsher * attempt to refill it. 119f7917c00SJeff Kirsher */ 120f7917c00SJeff Kirsher #define FL_STARVE_THRES 4 121f7917c00SJeff Kirsher 122f7917c00SJeff Kirsher /* 123f7917c00SJeff Kirsher * Suspend an Ethernet Tx queue with fewer available descriptors than this. 124f7917c00SJeff Kirsher * This is the same as calc_tx_descs() for a TSO packet with 125f7917c00SJeff Kirsher * nr_frags == MAX_SKB_FRAGS. 126f7917c00SJeff Kirsher */ 127f7917c00SJeff Kirsher #define ETHTXQ_STOP_THRES \ 128f7917c00SJeff Kirsher (1 + DIV_ROUND_UP((3 * MAX_SKB_FRAGS) / 2 + (MAX_SKB_FRAGS & 1), 8)) 129f7917c00SJeff Kirsher 130f7917c00SJeff Kirsher /* 131f7917c00SJeff Kirsher * Suspension threshold for non-Ethernet Tx queues. We require enough room 132f7917c00SJeff Kirsher * for a full sized WR. 133f7917c00SJeff Kirsher */ 134f7917c00SJeff Kirsher #define TXQ_STOP_THRES (SGE_MAX_WR_LEN / sizeof(struct tx_desc)) 135f7917c00SJeff Kirsher 136f7917c00SJeff Kirsher /* 137f7917c00SJeff Kirsher * Max Tx descriptor space we allow for an Ethernet packet to be inlined 138f7917c00SJeff Kirsher * into a WR. 139f7917c00SJeff Kirsher */ 140f7917c00SJeff Kirsher #define MAX_IMM_TX_PKT_LEN 128 141f7917c00SJeff Kirsher 142f7917c00SJeff Kirsher /* 143f7917c00SJeff Kirsher * Max size of a WR sent through a control Tx queue. 144f7917c00SJeff Kirsher */ 145f7917c00SJeff Kirsher #define MAX_CTRL_WR_LEN SGE_MAX_WR_LEN 146f7917c00SJeff Kirsher 147f7917c00SJeff Kirsher struct tx_sw_desc { /* SW state per Tx descriptor */ 148f7917c00SJeff Kirsher struct sk_buff *skb; 149f7917c00SJeff Kirsher struct ulptx_sgl *sgl; 150f7917c00SJeff Kirsher }; 151f7917c00SJeff Kirsher 152f7917c00SJeff Kirsher struct rx_sw_desc { /* SW state per Rx descriptor */ 153f7917c00SJeff Kirsher struct page *page; 154f7917c00SJeff Kirsher dma_addr_t dma_addr; 155f7917c00SJeff Kirsher }; 156f7917c00SJeff Kirsher 157f7917c00SJeff Kirsher /* 15852367a76SVipul Pandya * Rx buffer sizes for "useskbs" Free List buffers (one ingress packet pe skb 15952367a76SVipul Pandya * buffer). We currently only support two sizes for 1500- and 9000-byte MTUs. 16052367a76SVipul Pandya * We could easily support more but there doesn't seem to be much need for 16152367a76SVipul Pandya * that ... 16252367a76SVipul Pandya */ 16352367a76SVipul Pandya #define FL_MTU_SMALL 1500 16452367a76SVipul Pandya #define FL_MTU_LARGE 9000 16552367a76SVipul Pandya 16652367a76SVipul Pandya static inline unsigned int fl_mtu_bufsize(struct adapter *adapter, 16752367a76SVipul Pandya unsigned int mtu) 16852367a76SVipul Pandya { 16952367a76SVipul Pandya struct sge *s = &adapter->sge; 17052367a76SVipul Pandya 17152367a76SVipul Pandya return ALIGN(s->pktshift + ETH_HLEN + VLAN_HLEN + mtu, s->fl_align); 17252367a76SVipul Pandya } 17352367a76SVipul Pandya 17452367a76SVipul Pandya #define FL_MTU_SMALL_BUFSIZE(adapter) fl_mtu_bufsize(adapter, FL_MTU_SMALL) 17552367a76SVipul Pandya #define FL_MTU_LARGE_BUFSIZE(adapter) fl_mtu_bufsize(adapter, FL_MTU_LARGE) 17652367a76SVipul Pandya 17752367a76SVipul Pandya /* 17852367a76SVipul Pandya * Bits 0..3 of rx_sw_desc.dma_addr have special meaning. The hardware uses 17952367a76SVipul Pandya * these to specify the buffer size as an index into the SGE Free List Buffer 18052367a76SVipul Pandya * Size register array. We also use bit 4, when the buffer has been unmapped 18152367a76SVipul Pandya * for DMA, but this is of course never sent to the hardware and is only used 18252367a76SVipul Pandya * to prevent double unmappings. All of the above requires that the Free List 18352367a76SVipul Pandya * Buffers which we allocate have the bottom 5 bits free (0) -- i.e. are 18452367a76SVipul Pandya * 32-byte or or a power of 2 greater in alignment. Since the SGE's minimal 18552367a76SVipul Pandya * Free List Buffer alignment is 32 bytes, this works out for us ... 186f7917c00SJeff Kirsher */ 187f7917c00SJeff Kirsher enum { 18852367a76SVipul Pandya RX_BUF_FLAGS = 0x1f, /* bottom five bits are special */ 18952367a76SVipul Pandya RX_BUF_SIZE = 0x0f, /* bottom three bits are for buf sizes */ 19052367a76SVipul Pandya RX_UNMAPPED_BUF = 0x10, /* buffer is not mapped */ 19152367a76SVipul Pandya 19252367a76SVipul Pandya /* 19352367a76SVipul Pandya * XXX We shouldn't depend on being able to use these indices. 19452367a76SVipul Pandya * XXX Especially when some other Master PF has initialized the 19552367a76SVipul Pandya * XXX adapter or we use the Firmware Configuration File. We 19652367a76SVipul Pandya * XXX should really search through the Host Buffer Size register 19752367a76SVipul Pandya * XXX array for the appropriately sized buffer indices. 19852367a76SVipul Pandya */ 19952367a76SVipul Pandya RX_SMALL_PG_BUF = 0x0, /* small (PAGE_SIZE) page buffer */ 20052367a76SVipul Pandya RX_LARGE_PG_BUF = 0x1, /* buffer large (FL_PG_ORDER) page buffer */ 20152367a76SVipul Pandya 20252367a76SVipul Pandya RX_SMALL_MTU_BUF = 0x2, /* small MTU buffer */ 20352367a76SVipul Pandya RX_LARGE_MTU_BUF = 0x3, /* large MTU buffer */ 204f7917c00SJeff Kirsher }; 205f7917c00SJeff Kirsher 206e553ec3fSHariprasad Shenai static int timer_pkt_quota[] = {1, 1, 2, 3, 4, 5}; 207e553ec3fSHariprasad Shenai #define MIN_NAPI_WORK 1 208e553ec3fSHariprasad Shenai 209f7917c00SJeff Kirsher static inline dma_addr_t get_buf_addr(const struct rx_sw_desc *d) 210f7917c00SJeff Kirsher { 21152367a76SVipul Pandya return d->dma_addr & ~(dma_addr_t)RX_BUF_FLAGS; 212f7917c00SJeff Kirsher } 213f7917c00SJeff Kirsher 214f7917c00SJeff Kirsher static inline bool is_buf_mapped(const struct rx_sw_desc *d) 215f7917c00SJeff Kirsher { 216f7917c00SJeff Kirsher return !(d->dma_addr & RX_UNMAPPED_BUF); 217f7917c00SJeff Kirsher } 218f7917c00SJeff Kirsher 219f7917c00SJeff Kirsher /** 220f7917c00SJeff Kirsher * txq_avail - return the number of available slots in a Tx queue 221f7917c00SJeff Kirsher * @q: the Tx queue 222f7917c00SJeff Kirsher * 223f7917c00SJeff Kirsher * Returns the number of descriptors in a Tx queue available to write new 224f7917c00SJeff Kirsher * packets. 225f7917c00SJeff Kirsher */ 226f7917c00SJeff Kirsher static inline unsigned int txq_avail(const struct sge_txq *q) 227f7917c00SJeff Kirsher { 228f7917c00SJeff Kirsher return q->size - 1 - q->in_use; 229f7917c00SJeff Kirsher } 230f7917c00SJeff Kirsher 231f7917c00SJeff Kirsher /** 232f7917c00SJeff Kirsher * fl_cap - return the capacity of a free-buffer list 233f7917c00SJeff Kirsher * @fl: the FL 234f7917c00SJeff Kirsher * 235f7917c00SJeff Kirsher * Returns the capacity of a free-buffer list. The capacity is less than 236f7917c00SJeff Kirsher * the size because one descriptor needs to be left unpopulated, otherwise 237f7917c00SJeff Kirsher * HW will think the FL is empty. 238f7917c00SJeff Kirsher */ 239f7917c00SJeff Kirsher static inline unsigned int fl_cap(const struct sge_fl *fl) 240f7917c00SJeff Kirsher { 241f7917c00SJeff Kirsher return fl->size - 8; /* 1 descriptor = 8 buffers */ 242f7917c00SJeff Kirsher } 243f7917c00SJeff Kirsher 244f7917c00SJeff Kirsher static inline bool fl_starving(const struct sge_fl *fl) 245f7917c00SJeff Kirsher { 246f7917c00SJeff Kirsher return fl->avail - fl->pend_cred <= FL_STARVE_THRES; 247f7917c00SJeff Kirsher } 248f7917c00SJeff Kirsher 249f7917c00SJeff Kirsher static int map_skb(struct device *dev, const struct sk_buff *skb, 250f7917c00SJeff Kirsher dma_addr_t *addr) 251f7917c00SJeff Kirsher { 252f7917c00SJeff Kirsher const skb_frag_t *fp, *end; 253f7917c00SJeff Kirsher const struct skb_shared_info *si; 254f7917c00SJeff Kirsher 255f7917c00SJeff Kirsher *addr = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); 256f7917c00SJeff Kirsher if (dma_mapping_error(dev, *addr)) 257f7917c00SJeff Kirsher goto out_err; 258f7917c00SJeff Kirsher 259f7917c00SJeff Kirsher si = skb_shinfo(skb); 260f7917c00SJeff Kirsher end = &si->frags[si->nr_frags]; 261f7917c00SJeff Kirsher 262f7917c00SJeff Kirsher for (fp = si->frags; fp < end; fp++) { 263e91b0f24SIan Campbell *++addr = skb_frag_dma_map(dev, fp, 0, skb_frag_size(fp), 264e91b0f24SIan Campbell DMA_TO_DEVICE); 265f7917c00SJeff Kirsher if (dma_mapping_error(dev, *addr)) 266f7917c00SJeff Kirsher goto unwind; 267f7917c00SJeff Kirsher } 268f7917c00SJeff Kirsher return 0; 269f7917c00SJeff Kirsher 270f7917c00SJeff Kirsher unwind: 271f7917c00SJeff Kirsher while (fp-- > si->frags) 2729e903e08SEric Dumazet dma_unmap_page(dev, *--addr, skb_frag_size(fp), DMA_TO_DEVICE); 273f7917c00SJeff Kirsher 274f7917c00SJeff Kirsher dma_unmap_single(dev, addr[-1], skb_headlen(skb), DMA_TO_DEVICE); 275f7917c00SJeff Kirsher out_err: 276f7917c00SJeff Kirsher return -ENOMEM; 277f7917c00SJeff Kirsher } 278f7917c00SJeff Kirsher 279f7917c00SJeff Kirsher #ifdef CONFIG_NEED_DMA_MAP_STATE 280f7917c00SJeff Kirsher static void unmap_skb(struct device *dev, const struct sk_buff *skb, 281f7917c00SJeff Kirsher const dma_addr_t *addr) 282f7917c00SJeff Kirsher { 283f7917c00SJeff Kirsher const skb_frag_t *fp, *end; 284f7917c00SJeff Kirsher const struct skb_shared_info *si; 285f7917c00SJeff Kirsher 286f7917c00SJeff Kirsher dma_unmap_single(dev, *addr++, skb_headlen(skb), DMA_TO_DEVICE); 287f7917c00SJeff Kirsher 288f7917c00SJeff Kirsher si = skb_shinfo(skb); 289f7917c00SJeff Kirsher end = &si->frags[si->nr_frags]; 290f7917c00SJeff Kirsher for (fp = si->frags; fp < end; fp++) 2919e903e08SEric Dumazet dma_unmap_page(dev, *addr++, skb_frag_size(fp), DMA_TO_DEVICE); 292f7917c00SJeff Kirsher } 293f7917c00SJeff Kirsher 294f7917c00SJeff Kirsher /** 295f7917c00SJeff Kirsher * deferred_unmap_destructor - unmap a packet when it is freed 296f7917c00SJeff Kirsher * @skb: the packet 297f7917c00SJeff Kirsher * 298f7917c00SJeff Kirsher * This is the packet destructor used for Tx packets that need to remain 299f7917c00SJeff Kirsher * mapped until they are freed rather than until their Tx descriptors are 300f7917c00SJeff Kirsher * freed. 301f7917c00SJeff Kirsher */ 302f7917c00SJeff Kirsher static void deferred_unmap_destructor(struct sk_buff *skb) 303f7917c00SJeff Kirsher { 304f7917c00SJeff Kirsher unmap_skb(skb->dev->dev.parent, skb, (dma_addr_t *)skb->head); 305f7917c00SJeff Kirsher } 306f7917c00SJeff Kirsher #endif 307f7917c00SJeff Kirsher 308f7917c00SJeff Kirsher static void unmap_sgl(struct device *dev, const struct sk_buff *skb, 309f7917c00SJeff Kirsher const struct ulptx_sgl *sgl, const struct sge_txq *q) 310f7917c00SJeff Kirsher { 311f7917c00SJeff Kirsher const struct ulptx_sge_pair *p; 312f7917c00SJeff Kirsher unsigned int nfrags = skb_shinfo(skb)->nr_frags; 313f7917c00SJeff Kirsher 314f7917c00SJeff Kirsher if (likely(skb_headlen(skb))) 315f7917c00SJeff Kirsher dma_unmap_single(dev, be64_to_cpu(sgl->addr0), ntohl(sgl->len0), 316f7917c00SJeff Kirsher DMA_TO_DEVICE); 317f7917c00SJeff Kirsher else { 318f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(sgl->addr0), ntohl(sgl->len0), 319f7917c00SJeff Kirsher DMA_TO_DEVICE); 320f7917c00SJeff Kirsher nfrags--; 321f7917c00SJeff Kirsher } 322f7917c00SJeff Kirsher 323f7917c00SJeff Kirsher /* 324f7917c00SJeff Kirsher * the complexity below is because of the possibility of a wrap-around 325f7917c00SJeff Kirsher * in the middle of an SGL 326f7917c00SJeff Kirsher */ 327f7917c00SJeff Kirsher for (p = sgl->sge; nfrags >= 2; nfrags -= 2) { 328f7917c00SJeff Kirsher if (likely((u8 *)(p + 1) <= (u8 *)q->stat)) { 329f7917c00SJeff Kirsher unmap: dma_unmap_page(dev, be64_to_cpu(p->addr[0]), 330f7917c00SJeff Kirsher ntohl(p->len[0]), DMA_TO_DEVICE); 331f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(p->addr[1]), 332f7917c00SJeff Kirsher ntohl(p->len[1]), DMA_TO_DEVICE); 333f7917c00SJeff Kirsher p++; 334f7917c00SJeff Kirsher } else if ((u8 *)p == (u8 *)q->stat) { 335f7917c00SJeff Kirsher p = (const struct ulptx_sge_pair *)q->desc; 336f7917c00SJeff Kirsher goto unmap; 337f7917c00SJeff Kirsher } else if ((u8 *)p + 8 == (u8 *)q->stat) { 338f7917c00SJeff Kirsher const __be64 *addr = (const __be64 *)q->desc; 339f7917c00SJeff Kirsher 340f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(addr[0]), 341f7917c00SJeff Kirsher ntohl(p->len[0]), DMA_TO_DEVICE); 342f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(addr[1]), 343f7917c00SJeff Kirsher ntohl(p->len[1]), DMA_TO_DEVICE); 344f7917c00SJeff Kirsher p = (const struct ulptx_sge_pair *)&addr[2]; 345f7917c00SJeff Kirsher } else { 346f7917c00SJeff Kirsher const __be64 *addr = (const __be64 *)q->desc; 347f7917c00SJeff Kirsher 348f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(p->addr[0]), 349f7917c00SJeff Kirsher ntohl(p->len[0]), DMA_TO_DEVICE); 350f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(addr[0]), 351f7917c00SJeff Kirsher ntohl(p->len[1]), DMA_TO_DEVICE); 352f7917c00SJeff Kirsher p = (const struct ulptx_sge_pair *)&addr[1]; 353f7917c00SJeff Kirsher } 354f7917c00SJeff Kirsher } 355f7917c00SJeff Kirsher if (nfrags) { 356f7917c00SJeff Kirsher __be64 addr; 357f7917c00SJeff Kirsher 358f7917c00SJeff Kirsher if ((u8 *)p == (u8 *)q->stat) 359f7917c00SJeff Kirsher p = (const struct ulptx_sge_pair *)q->desc; 360f7917c00SJeff Kirsher addr = (u8 *)p + 16 <= (u8 *)q->stat ? p->addr[0] : 361f7917c00SJeff Kirsher *(const __be64 *)q->desc; 362f7917c00SJeff Kirsher dma_unmap_page(dev, be64_to_cpu(addr), ntohl(p->len[0]), 363f7917c00SJeff Kirsher DMA_TO_DEVICE); 364f7917c00SJeff Kirsher } 365f7917c00SJeff Kirsher } 366f7917c00SJeff Kirsher 367f7917c00SJeff Kirsher /** 368f7917c00SJeff Kirsher * free_tx_desc - reclaims Tx descriptors and their buffers 369f7917c00SJeff Kirsher * @adapter: the adapter 370f7917c00SJeff Kirsher * @q: the Tx queue to reclaim descriptors from 371f7917c00SJeff Kirsher * @n: the number of descriptors to reclaim 372f7917c00SJeff Kirsher * @unmap: whether the buffers should be unmapped for DMA 373f7917c00SJeff Kirsher * 374f7917c00SJeff Kirsher * Reclaims Tx descriptors from an SGE Tx queue and frees the associated 375f7917c00SJeff Kirsher * Tx buffers. Called with the Tx queue lock held. 376f7917c00SJeff Kirsher */ 377f7917c00SJeff Kirsher static void free_tx_desc(struct adapter *adap, struct sge_txq *q, 378f7917c00SJeff Kirsher unsigned int n, bool unmap) 379f7917c00SJeff Kirsher { 380f7917c00SJeff Kirsher struct tx_sw_desc *d; 381f7917c00SJeff Kirsher unsigned int cidx = q->cidx; 382f7917c00SJeff Kirsher struct device *dev = adap->pdev_dev; 383f7917c00SJeff Kirsher 384f7917c00SJeff Kirsher d = &q->sdesc[cidx]; 385f7917c00SJeff Kirsher while (n--) { 386f7917c00SJeff Kirsher if (d->skb) { /* an SGL is present */ 387f7917c00SJeff Kirsher if (unmap) 388f7917c00SJeff Kirsher unmap_sgl(dev, d->skb, d->sgl, q); 389a7525198SEric W. Biederman dev_consume_skb_any(d->skb); 390f7917c00SJeff Kirsher d->skb = NULL; 391f7917c00SJeff Kirsher } 392f7917c00SJeff Kirsher ++d; 393f7917c00SJeff Kirsher if (++cidx == q->size) { 394f7917c00SJeff Kirsher cidx = 0; 395f7917c00SJeff Kirsher d = q->sdesc; 396f7917c00SJeff Kirsher } 397f7917c00SJeff Kirsher } 398f7917c00SJeff Kirsher q->cidx = cidx; 399f7917c00SJeff Kirsher } 400f7917c00SJeff Kirsher 401f7917c00SJeff Kirsher /* 402f7917c00SJeff Kirsher * Return the number of reclaimable descriptors in a Tx queue. 403f7917c00SJeff Kirsher */ 404f7917c00SJeff Kirsher static inline int reclaimable(const struct sge_txq *q) 405f7917c00SJeff Kirsher { 406f7917c00SJeff Kirsher int hw_cidx = ntohs(q->stat->cidx); 407f7917c00SJeff Kirsher hw_cidx -= q->cidx; 408f7917c00SJeff Kirsher return hw_cidx < 0 ? hw_cidx + q->size : hw_cidx; 409f7917c00SJeff Kirsher } 410f7917c00SJeff Kirsher 411f7917c00SJeff Kirsher /** 412f7917c00SJeff Kirsher * reclaim_completed_tx - reclaims completed Tx descriptors 413f7917c00SJeff Kirsher * @adap: the adapter 414f7917c00SJeff Kirsher * @q: the Tx queue to reclaim completed descriptors from 415f7917c00SJeff Kirsher * @unmap: whether the buffers should be unmapped for DMA 416f7917c00SJeff Kirsher * 417f7917c00SJeff Kirsher * Reclaims Tx descriptors that the SGE has indicated it has processed, 418f7917c00SJeff Kirsher * and frees the associated buffers if possible. Called with the Tx 419f7917c00SJeff Kirsher * queue locked. 420f7917c00SJeff Kirsher */ 421f7917c00SJeff Kirsher static inline void reclaim_completed_tx(struct adapter *adap, struct sge_txq *q, 422f7917c00SJeff Kirsher bool unmap) 423f7917c00SJeff Kirsher { 424f7917c00SJeff Kirsher int avail = reclaimable(q); 425f7917c00SJeff Kirsher 426f7917c00SJeff Kirsher if (avail) { 427f7917c00SJeff Kirsher /* 428f7917c00SJeff Kirsher * Limit the amount of clean up work we do at a time to keep 429f7917c00SJeff Kirsher * the Tx lock hold time O(1). 430f7917c00SJeff Kirsher */ 431f7917c00SJeff Kirsher if (avail > MAX_TX_RECLAIM) 432f7917c00SJeff Kirsher avail = MAX_TX_RECLAIM; 433f7917c00SJeff Kirsher 434f7917c00SJeff Kirsher free_tx_desc(adap, q, avail, unmap); 435f7917c00SJeff Kirsher q->in_use -= avail; 436f7917c00SJeff Kirsher } 437f7917c00SJeff Kirsher } 438f7917c00SJeff Kirsher 43952367a76SVipul Pandya static inline int get_buf_size(struct adapter *adapter, 44052367a76SVipul Pandya const struct rx_sw_desc *d) 441f7917c00SJeff Kirsher { 44252367a76SVipul Pandya struct sge *s = &adapter->sge; 44352367a76SVipul Pandya unsigned int rx_buf_size_idx = d->dma_addr & RX_BUF_SIZE; 44452367a76SVipul Pandya int buf_size; 44552367a76SVipul Pandya 44652367a76SVipul Pandya switch (rx_buf_size_idx) { 44752367a76SVipul Pandya case RX_SMALL_PG_BUF: 44852367a76SVipul Pandya buf_size = PAGE_SIZE; 44952367a76SVipul Pandya break; 45052367a76SVipul Pandya 45152367a76SVipul Pandya case RX_LARGE_PG_BUF: 45252367a76SVipul Pandya buf_size = PAGE_SIZE << s->fl_pg_order; 45352367a76SVipul Pandya break; 45452367a76SVipul Pandya 45552367a76SVipul Pandya case RX_SMALL_MTU_BUF: 45652367a76SVipul Pandya buf_size = FL_MTU_SMALL_BUFSIZE(adapter); 45752367a76SVipul Pandya break; 45852367a76SVipul Pandya 45952367a76SVipul Pandya case RX_LARGE_MTU_BUF: 46052367a76SVipul Pandya buf_size = FL_MTU_LARGE_BUFSIZE(adapter); 46152367a76SVipul Pandya break; 46252367a76SVipul Pandya 46352367a76SVipul Pandya default: 46452367a76SVipul Pandya BUG_ON(1); 46552367a76SVipul Pandya } 46652367a76SVipul Pandya 46752367a76SVipul Pandya return buf_size; 468f7917c00SJeff Kirsher } 469f7917c00SJeff Kirsher 470f7917c00SJeff Kirsher /** 471f7917c00SJeff Kirsher * free_rx_bufs - free the Rx buffers on an SGE free list 472f7917c00SJeff Kirsher * @adap: the adapter 473f7917c00SJeff Kirsher * @q: the SGE free list to free buffers from 474f7917c00SJeff Kirsher * @n: how many buffers to free 475f7917c00SJeff Kirsher * 476f7917c00SJeff Kirsher * Release the next @n buffers on an SGE free-buffer Rx queue. The 477f7917c00SJeff Kirsher * buffers must be made inaccessible to HW before calling this function. 478f7917c00SJeff Kirsher */ 479f7917c00SJeff Kirsher static void free_rx_bufs(struct adapter *adap, struct sge_fl *q, int n) 480f7917c00SJeff Kirsher { 481f7917c00SJeff Kirsher while (n--) { 482f7917c00SJeff Kirsher struct rx_sw_desc *d = &q->sdesc[q->cidx]; 483f7917c00SJeff Kirsher 484f7917c00SJeff Kirsher if (is_buf_mapped(d)) 485f7917c00SJeff Kirsher dma_unmap_page(adap->pdev_dev, get_buf_addr(d), 48652367a76SVipul Pandya get_buf_size(adap, d), 48752367a76SVipul Pandya PCI_DMA_FROMDEVICE); 488f7917c00SJeff Kirsher put_page(d->page); 489f7917c00SJeff Kirsher d->page = NULL; 490f7917c00SJeff Kirsher if (++q->cidx == q->size) 491f7917c00SJeff Kirsher q->cidx = 0; 492f7917c00SJeff Kirsher q->avail--; 493f7917c00SJeff Kirsher } 494f7917c00SJeff Kirsher } 495f7917c00SJeff Kirsher 496f7917c00SJeff Kirsher /** 497f7917c00SJeff Kirsher * unmap_rx_buf - unmap the current Rx buffer on an SGE free list 498f7917c00SJeff Kirsher * @adap: the adapter 499f7917c00SJeff Kirsher * @q: the SGE free list 500f7917c00SJeff Kirsher * 501f7917c00SJeff Kirsher * Unmap the current buffer on an SGE free-buffer Rx queue. The 502f7917c00SJeff Kirsher * buffer must be made inaccessible to HW before calling this function. 503f7917c00SJeff Kirsher * 504f7917c00SJeff Kirsher * This is similar to @free_rx_bufs above but does not free the buffer. 505f7917c00SJeff Kirsher * Do note that the FL still loses any further access to the buffer. 506f7917c00SJeff Kirsher */ 507f7917c00SJeff Kirsher static void unmap_rx_buf(struct adapter *adap, struct sge_fl *q) 508f7917c00SJeff Kirsher { 509f7917c00SJeff Kirsher struct rx_sw_desc *d = &q->sdesc[q->cidx]; 510f7917c00SJeff Kirsher 511f7917c00SJeff Kirsher if (is_buf_mapped(d)) 512f7917c00SJeff Kirsher dma_unmap_page(adap->pdev_dev, get_buf_addr(d), 51352367a76SVipul Pandya get_buf_size(adap, d), PCI_DMA_FROMDEVICE); 514f7917c00SJeff Kirsher d->page = NULL; 515f7917c00SJeff Kirsher if (++q->cidx == q->size) 516f7917c00SJeff Kirsher q->cidx = 0; 517f7917c00SJeff Kirsher q->avail--; 518f7917c00SJeff Kirsher } 519f7917c00SJeff Kirsher 520f7917c00SJeff Kirsher static inline void ring_fl_db(struct adapter *adap, struct sge_fl *q) 521f7917c00SJeff Kirsher { 5220a57a536SSantosh Rastapur u32 val; 523f7917c00SJeff Kirsher if (q->pend_cred >= 8) { 5240a57a536SSantosh Rastapur val = PIDX(q->pend_cred / 8); 525d14807ddSHariprasad Shenai if (!is_t4(adap->params.chip)) 5260a57a536SSantosh Rastapur val |= DBTYPE(1); 527d63a6dcfSHariprasad Shenai val |= DBPRIO(1); 528f7917c00SJeff Kirsher wmb(); 529d63a6dcfSHariprasad Shenai 530d63a6dcfSHariprasad Shenai /* If we're on T4, use the old doorbell mechanism; otherwise 531d63a6dcfSHariprasad Shenai * use the new BAR2 mechanism. 532d63a6dcfSHariprasad Shenai */ 533d63a6dcfSHariprasad Shenai if (is_t4(adap->params.chip)) { 534d63a6dcfSHariprasad Shenai t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), 535d63a6dcfSHariprasad Shenai val | QID(q->cntxt_id)); 536d63a6dcfSHariprasad Shenai } else { 537d63a6dcfSHariprasad Shenai writel(val, adap->bar2 + q->udb + SGE_UDB_KDOORBELL); 538d63a6dcfSHariprasad Shenai 539d63a6dcfSHariprasad Shenai /* This Write memory Barrier will force the write to 540d63a6dcfSHariprasad Shenai * the User Doorbell area to be flushed. 541d63a6dcfSHariprasad Shenai */ 542d63a6dcfSHariprasad Shenai wmb(); 543d63a6dcfSHariprasad Shenai } 544f7917c00SJeff Kirsher q->pend_cred &= 7; 545f7917c00SJeff Kirsher } 546f7917c00SJeff Kirsher } 547f7917c00SJeff Kirsher 548f7917c00SJeff Kirsher static inline void set_rx_sw_desc(struct rx_sw_desc *sd, struct page *pg, 549f7917c00SJeff Kirsher dma_addr_t mapping) 550f7917c00SJeff Kirsher { 551f7917c00SJeff Kirsher sd->page = pg; 552f7917c00SJeff Kirsher sd->dma_addr = mapping; /* includes size low bits */ 553f7917c00SJeff Kirsher } 554f7917c00SJeff Kirsher 555f7917c00SJeff Kirsher /** 556f7917c00SJeff Kirsher * refill_fl - refill an SGE Rx buffer ring 557f7917c00SJeff Kirsher * @adap: the adapter 558f7917c00SJeff Kirsher * @q: the ring to refill 559f7917c00SJeff Kirsher * @n: the number of new buffers to allocate 560f7917c00SJeff Kirsher * @gfp: the gfp flags for the allocations 561f7917c00SJeff Kirsher * 562f7917c00SJeff Kirsher * (Re)populate an SGE free-buffer queue with up to @n new packet buffers, 563f7917c00SJeff Kirsher * allocated with the supplied gfp flags. The caller must assure that 564f7917c00SJeff Kirsher * @n does not exceed the queue's capacity. If afterwards the queue is 565f7917c00SJeff Kirsher * found critically low mark it as starving in the bitmap of starving FLs. 566f7917c00SJeff Kirsher * 567f7917c00SJeff Kirsher * Returns the number of buffers allocated. 568f7917c00SJeff Kirsher */ 569f7917c00SJeff Kirsher static unsigned int refill_fl(struct adapter *adap, struct sge_fl *q, int n, 570f7917c00SJeff Kirsher gfp_t gfp) 571f7917c00SJeff Kirsher { 57252367a76SVipul Pandya struct sge *s = &adap->sge; 573f7917c00SJeff Kirsher struct page *pg; 574f7917c00SJeff Kirsher dma_addr_t mapping; 575f7917c00SJeff Kirsher unsigned int cred = q->avail; 576f7917c00SJeff Kirsher __be64 *d = &q->desc[q->pidx]; 577f7917c00SJeff Kirsher struct rx_sw_desc *sd = &q->sdesc[q->pidx]; 578f7917c00SJeff Kirsher 5791f2149c1SEric Dumazet gfp |= __GFP_NOWARN | __GFP_COLD; 580f7917c00SJeff Kirsher 58152367a76SVipul Pandya if (s->fl_pg_order == 0) 58252367a76SVipul Pandya goto alloc_small_pages; 58352367a76SVipul Pandya 584f7917c00SJeff Kirsher /* 585f7917c00SJeff Kirsher * Prefer large buffers 586f7917c00SJeff Kirsher */ 587f7917c00SJeff Kirsher while (n) { 58852367a76SVipul Pandya pg = alloc_pages(gfp | __GFP_COMP, s->fl_pg_order); 589f7917c00SJeff Kirsher if (unlikely(!pg)) { 590f7917c00SJeff Kirsher q->large_alloc_failed++; 591f7917c00SJeff Kirsher break; /* fall back to single pages */ 592f7917c00SJeff Kirsher } 593f7917c00SJeff Kirsher 594f7917c00SJeff Kirsher mapping = dma_map_page(adap->pdev_dev, pg, 0, 59552367a76SVipul Pandya PAGE_SIZE << s->fl_pg_order, 596f7917c00SJeff Kirsher PCI_DMA_FROMDEVICE); 597f7917c00SJeff Kirsher if (unlikely(dma_mapping_error(adap->pdev_dev, mapping))) { 59852367a76SVipul Pandya __free_pages(pg, s->fl_pg_order); 599f7917c00SJeff Kirsher goto out; /* do not try small pages for this error */ 600f7917c00SJeff Kirsher } 60152367a76SVipul Pandya mapping |= RX_LARGE_PG_BUF; 602f7917c00SJeff Kirsher *d++ = cpu_to_be64(mapping); 603f7917c00SJeff Kirsher 604f7917c00SJeff Kirsher set_rx_sw_desc(sd, pg, mapping); 605f7917c00SJeff Kirsher sd++; 606f7917c00SJeff Kirsher 607f7917c00SJeff Kirsher q->avail++; 608f7917c00SJeff Kirsher if (++q->pidx == q->size) { 609f7917c00SJeff Kirsher q->pidx = 0; 610f7917c00SJeff Kirsher sd = q->sdesc; 611f7917c00SJeff Kirsher d = q->desc; 612f7917c00SJeff Kirsher } 613f7917c00SJeff Kirsher n--; 614f7917c00SJeff Kirsher } 615f7917c00SJeff Kirsher 61652367a76SVipul Pandya alloc_small_pages: 617f7917c00SJeff Kirsher while (n--) { 6180614002bSMel Gorman pg = __skb_alloc_page(gfp, NULL); 619f7917c00SJeff Kirsher if (unlikely(!pg)) { 620f7917c00SJeff Kirsher q->alloc_failed++; 621f7917c00SJeff Kirsher break; 622f7917c00SJeff Kirsher } 623f7917c00SJeff Kirsher 624f7917c00SJeff Kirsher mapping = dma_map_page(adap->pdev_dev, pg, 0, PAGE_SIZE, 625f7917c00SJeff Kirsher PCI_DMA_FROMDEVICE); 626f7917c00SJeff Kirsher if (unlikely(dma_mapping_error(adap->pdev_dev, mapping))) { 6271f2149c1SEric Dumazet put_page(pg); 628f7917c00SJeff Kirsher goto out; 629f7917c00SJeff Kirsher } 630f7917c00SJeff Kirsher *d++ = cpu_to_be64(mapping); 631f7917c00SJeff Kirsher 632f7917c00SJeff Kirsher set_rx_sw_desc(sd, pg, mapping); 633f7917c00SJeff Kirsher sd++; 634f7917c00SJeff Kirsher 635f7917c00SJeff Kirsher q->avail++; 636f7917c00SJeff Kirsher if (++q->pidx == q->size) { 637f7917c00SJeff Kirsher q->pidx = 0; 638f7917c00SJeff Kirsher sd = q->sdesc; 639f7917c00SJeff Kirsher d = q->desc; 640f7917c00SJeff Kirsher } 641f7917c00SJeff Kirsher } 642f7917c00SJeff Kirsher 643f7917c00SJeff Kirsher out: cred = q->avail - cred; 644f7917c00SJeff Kirsher q->pend_cred += cred; 645f7917c00SJeff Kirsher ring_fl_db(adap, q); 646f7917c00SJeff Kirsher 647f7917c00SJeff Kirsher if (unlikely(fl_starving(q))) { 648f7917c00SJeff Kirsher smp_wmb(); 649f7917c00SJeff Kirsher set_bit(q->cntxt_id - adap->sge.egr_start, 650f7917c00SJeff Kirsher adap->sge.starving_fl); 651f7917c00SJeff Kirsher } 652f7917c00SJeff Kirsher 653f7917c00SJeff Kirsher return cred; 654f7917c00SJeff Kirsher } 655f7917c00SJeff Kirsher 656f7917c00SJeff Kirsher static inline void __refill_fl(struct adapter *adap, struct sge_fl *fl) 657f7917c00SJeff Kirsher { 658f7917c00SJeff Kirsher refill_fl(adap, fl, min(MAX_RX_REFILL, fl_cap(fl) - fl->avail), 659f7917c00SJeff Kirsher GFP_ATOMIC); 660f7917c00SJeff Kirsher } 661f7917c00SJeff Kirsher 662f7917c00SJeff Kirsher /** 663f7917c00SJeff Kirsher * alloc_ring - allocate resources for an SGE descriptor ring 664f7917c00SJeff Kirsher * @dev: the PCI device's core device 665f7917c00SJeff Kirsher * @nelem: the number of descriptors 666f7917c00SJeff Kirsher * @elem_size: the size of each descriptor 667f7917c00SJeff Kirsher * @sw_size: the size of the SW state associated with each ring element 668f7917c00SJeff Kirsher * @phys: the physical address of the allocated ring 669f7917c00SJeff Kirsher * @metadata: address of the array holding the SW state for the ring 670f7917c00SJeff Kirsher * @stat_size: extra space in HW ring for status information 671f7917c00SJeff Kirsher * @node: preferred node for memory allocations 672f7917c00SJeff Kirsher * 673f7917c00SJeff Kirsher * Allocates resources for an SGE descriptor ring, such as Tx queues, 674f7917c00SJeff Kirsher * free buffer lists, or response queues. Each SGE ring requires 675f7917c00SJeff Kirsher * space for its HW descriptors plus, optionally, space for the SW state 676f7917c00SJeff Kirsher * associated with each HW entry (the metadata). The function returns 677f7917c00SJeff Kirsher * three values: the virtual address for the HW ring (the return value 678f7917c00SJeff Kirsher * of the function), the bus address of the HW ring, and the address 679f7917c00SJeff Kirsher * of the SW ring. 680f7917c00SJeff Kirsher */ 681f7917c00SJeff Kirsher static void *alloc_ring(struct device *dev, size_t nelem, size_t elem_size, 682f7917c00SJeff Kirsher size_t sw_size, dma_addr_t *phys, void *metadata, 683f7917c00SJeff Kirsher size_t stat_size, int node) 684f7917c00SJeff Kirsher { 685f7917c00SJeff Kirsher size_t len = nelem * elem_size + stat_size; 686f7917c00SJeff Kirsher void *s = NULL; 687f7917c00SJeff Kirsher void *p = dma_alloc_coherent(dev, len, phys, GFP_KERNEL); 688f7917c00SJeff Kirsher 689f7917c00SJeff Kirsher if (!p) 690f7917c00SJeff Kirsher return NULL; 691f7917c00SJeff Kirsher if (sw_size) { 692f7917c00SJeff Kirsher s = kzalloc_node(nelem * sw_size, GFP_KERNEL, node); 693f7917c00SJeff Kirsher 694f7917c00SJeff Kirsher if (!s) { 695f7917c00SJeff Kirsher dma_free_coherent(dev, len, p, *phys); 696f7917c00SJeff Kirsher return NULL; 697f7917c00SJeff Kirsher } 698f7917c00SJeff Kirsher } 699f7917c00SJeff Kirsher if (metadata) 700f7917c00SJeff Kirsher *(void **)metadata = s; 701f7917c00SJeff Kirsher memset(p, 0, len); 702f7917c00SJeff Kirsher return p; 703f7917c00SJeff Kirsher } 704f7917c00SJeff Kirsher 705f7917c00SJeff Kirsher /** 706f7917c00SJeff Kirsher * sgl_len - calculates the size of an SGL of the given capacity 707f7917c00SJeff Kirsher * @n: the number of SGL entries 708f7917c00SJeff Kirsher * 709f7917c00SJeff Kirsher * Calculates the number of flits needed for a scatter/gather list that 710f7917c00SJeff Kirsher * can hold the given number of entries. 711f7917c00SJeff Kirsher */ 712f7917c00SJeff Kirsher static inline unsigned int sgl_len(unsigned int n) 713f7917c00SJeff Kirsher { 714f7917c00SJeff Kirsher n--; 715f7917c00SJeff Kirsher return (3 * n) / 2 + (n & 1) + 2; 716f7917c00SJeff Kirsher } 717f7917c00SJeff Kirsher 718f7917c00SJeff Kirsher /** 719f7917c00SJeff Kirsher * flits_to_desc - returns the num of Tx descriptors for the given flits 720f7917c00SJeff Kirsher * @n: the number of flits 721f7917c00SJeff Kirsher * 722f7917c00SJeff Kirsher * Returns the number of Tx descriptors needed for the supplied number 723f7917c00SJeff Kirsher * of flits. 724f7917c00SJeff Kirsher */ 725f7917c00SJeff Kirsher static inline unsigned int flits_to_desc(unsigned int n) 726f7917c00SJeff Kirsher { 727f7917c00SJeff Kirsher BUG_ON(n > SGE_MAX_WR_LEN / 8); 728f7917c00SJeff Kirsher return DIV_ROUND_UP(n, 8); 729f7917c00SJeff Kirsher } 730f7917c00SJeff Kirsher 731f7917c00SJeff Kirsher /** 732f7917c00SJeff Kirsher * is_eth_imm - can an Ethernet packet be sent as immediate data? 733f7917c00SJeff Kirsher * @skb: the packet 734f7917c00SJeff Kirsher * 735f7917c00SJeff Kirsher * Returns whether an Ethernet packet is small enough to fit as 7360034b298SKumar Sanghvi * immediate data. Return value corresponds to headroom required. 737f7917c00SJeff Kirsher */ 738f7917c00SJeff Kirsher static inline int is_eth_imm(const struct sk_buff *skb) 739f7917c00SJeff Kirsher { 7400034b298SKumar Sanghvi int hdrlen = skb_shinfo(skb)->gso_size ? 7410034b298SKumar Sanghvi sizeof(struct cpl_tx_pkt_lso_core) : 0; 7420034b298SKumar Sanghvi 7430034b298SKumar Sanghvi hdrlen += sizeof(struct cpl_tx_pkt); 7440034b298SKumar Sanghvi if (skb->len <= MAX_IMM_TX_PKT_LEN - hdrlen) 7450034b298SKumar Sanghvi return hdrlen; 7460034b298SKumar Sanghvi return 0; 747f7917c00SJeff Kirsher } 748f7917c00SJeff Kirsher 749f7917c00SJeff Kirsher /** 750f7917c00SJeff Kirsher * calc_tx_flits - calculate the number of flits for a packet Tx WR 751f7917c00SJeff Kirsher * @skb: the packet 752f7917c00SJeff Kirsher * 753f7917c00SJeff Kirsher * Returns the number of flits needed for a Tx WR for the given Ethernet 754f7917c00SJeff Kirsher * packet, including the needed WR and CPL headers. 755f7917c00SJeff Kirsher */ 756f7917c00SJeff Kirsher static inline unsigned int calc_tx_flits(const struct sk_buff *skb) 757f7917c00SJeff Kirsher { 758f7917c00SJeff Kirsher unsigned int flits; 7590034b298SKumar Sanghvi int hdrlen = is_eth_imm(skb); 760f7917c00SJeff Kirsher 7610034b298SKumar Sanghvi if (hdrlen) 7620034b298SKumar Sanghvi return DIV_ROUND_UP(skb->len + hdrlen, sizeof(__be64)); 763f7917c00SJeff Kirsher 764f7917c00SJeff Kirsher flits = sgl_len(skb_shinfo(skb)->nr_frags + 1) + 4; 765f7917c00SJeff Kirsher if (skb_shinfo(skb)->gso_size) 766f7917c00SJeff Kirsher flits += 2; 767f7917c00SJeff Kirsher return flits; 768f7917c00SJeff Kirsher } 769f7917c00SJeff Kirsher 770f7917c00SJeff Kirsher /** 771f7917c00SJeff Kirsher * calc_tx_descs - calculate the number of Tx descriptors for a packet 772f7917c00SJeff Kirsher * @skb: the packet 773f7917c00SJeff Kirsher * 774f7917c00SJeff Kirsher * Returns the number of Tx descriptors needed for the given Ethernet 775f7917c00SJeff Kirsher * packet, including the needed WR and CPL headers. 776f7917c00SJeff Kirsher */ 777f7917c00SJeff Kirsher static inline unsigned int calc_tx_descs(const struct sk_buff *skb) 778f7917c00SJeff Kirsher { 779f7917c00SJeff Kirsher return flits_to_desc(calc_tx_flits(skb)); 780f7917c00SJeff Kirsher } 781f7917c00SJeff Kirsher 782f7917c00SJeff Kirsher /** 783f7917c00SJeff Kirsher * write_sgl - populate a scatter/gather list for a packet 784f7917c00SJeff Kirsher * @skb: the packet 785f7917c00SJeff Kirsher * @q: the Tx queue we are writing into 786f7917c00SJeff Kirsher * @sgl: starting location for writing the SGL 787f7917c00SJeff Kirsher * @end: points right after the end of the SGL 788f7917c00SJeff Kirsher * @start: start offset into skb main-body data to include in the SGL 789f7917c00SJeff Kirsher * @addr: the list of bus addresses for the SGL elements 790f7917c00SJeff Kirsher * 791f7917c00SJeff Kirsher * Generates a gather list for the buffers that make up a packet. 792f7917c00SJeff Kirsher * The caller must provide adequate space for the SGL that will be written. 793f7917c00SJeff Kirsher * The SGL includes all of the packet's page fragments and the data in its 794f7917c00SJeff Kirsher * main body except for the first @start bytes. @sgl must be 16-byte 795f7917c00SJeff Kirsher * aligned and within a Tx descriptor with available space. @end points 796f7917c00SJeff Kirsher * right after the end of the SGL but does not account for any potential 797f7917c00SJeff Kirsher * wrap around, i.e., @end > @sgl. 798f7917c00SJeff Kirsher */ 799f7917c00SJeff Kirsher static void write_sgl(const struct sk_buff *skb, struct sge_txq *q, 800f7917c00SJeff Kirsher struct ulptx_sgl *sgl, u64 *end, unsigned int start, 801f7917c00SJeff Kirsher const dma_addr_t *addr) 802f7917c00SJeff Kirsher { 803f7917c00SJeff Kirsher unsigned int i, len; 804f7917c00SJeff Kirsher struct ulptx_sge_pair *to; 805f7917c00SJeff Kirsher const struct skb_shared_info *si = skb_shinfo(skb); 806f7917c00SJeff Kirsher unsigned int nfrags = si->nr_frags; 807f7917c00SJeff Kirsher struct ulptx_sge_pair buf[MAX_SKB_FRAGS / 2 + 1]; 808f7917c00SJeff Kirsher 809f7917c00SJeff Kirsher len = skb_headlen(skb) - start; 810f7917c00SJeff Kirsher if (likely(len)) { 811f7917c00SJeff Kirsher sgl->len0 = htonl(len); 812f7917c00SJeff Kirsher sgl->addr0 = cpu_to_be64(addr[0] + start); 813f7917c00SJeff Kirsher nfrags++; 814f7917c00SJeff Kirsher } else { 8159e903e08SEric Dumazet sgl->len0 = htonl(skb_frag_size(&si->frags[0])); 816f7917c00SJeff Kirsher sgl->addr0 = cpu_to_be64(addr[1]); 817f7917c00SJeff Kirsher } 818f7917c00SJeff Kirsher 819f7917c00SJeff Kirsher sgl->cmd_nsge = htonl(ULPTX_CMD(ULP_TX_SC_DSGL) | ULPTX_NSGE(nfrags)); 820f7917c00SJeff Kirsher if (likely(--nfrags == 0)) 821f7917c00SJeff Kirsher return; 822f7917c00SJeff Kirsher /* 823f7917c00SJeff Kirsher * Most of the complexity below deals with the possibility we hit the 824f7917c00SJeff Kirsher * end of the queue in the middle of writing the SGL. For this case 825f7917c00SJeff Kirsher * only we create the SGL in a temporary buffer and then copy it. 826f7917c00SJeff Kirsher */ 827f7917c00SJeff Kirsher to = (u8 *)end > (u8 *)q->stat ? buf : sgl->sge; 828f7917c00SJeff Kirsher 829f7917c00SJeff Kirsher for (i = (nfrags != si->nr_frags); nfrags >= 2; nfrags -= 2, to++) { 8309e903e08SEric Dumazet to->len[0] = cpu_to_be32(skb_frag_size(&si->frags[i])); 8319e903e08SEric Dumazet to->len[1] = cpu_to_be32(skb_frag_size(&si->frags[++i])); 832f7917c00SJeff Kirsher to->addr[0] = cpu_to_be64(addr[i]); 833f7917c00SJeff Kirsher to->addr[1] = cpu_to_be64(addr[++i]); 834f7917c00SJeff Kirsher } 835f7917c00SJeff Kirsher if (nfrags) { 8369e903e08SEric Dumazet to->len[0] = cpu_to_be32(skb_frag_size(&si->frags[i])); 837f7917c00SJeff Kirsher to->len[1] = cpu_to_be32(0); 838f7917c00SJeff Kirsher to->addr[0] = cpu_to_be64(addr[i + 1]); 839f7917c00SJeff Kirsher } 840f7917c00SJeff Kirsher if (unlikely((u8 *)end > (u8 *)q->stat)) { 841f7917c00SJeff Kirsher unsigned int part0 = (u8 *)q->stat - (u8 *)sgl->sge, part1; 842f7917c00SJeff Kirsher 843f7917c00SJeff Kirsher if (likely(part0)) 844f7917c00SJeff Kirsher memcpy(sgl->sge, buf, part0); 845f7917c00SJeff Kirsher part1 = (u8 *)end - (u8 *)q->stat; 846f7917c00SJeff Kirsher memcpy(q->desc, (u8 *)buf + part0, part1); 847f7917c00SJeff Kirsher end = (void *)q->desc + part1; 848f7917c00SJeff Kirsher } 849f7917c00SJeff Kirsher if ((uintptr_t)end & 8) /* 0-pad to multiple of 16 */ 85064699336SJoe Perches *end = 0; 851f7917c00SJeff Kirsher } 852f7917c00SJeff Kirsher 853fb5ac0deSDan Carpenter /* This function copies a tx_desc struct to memory mapped BAR2 space(user space 854fb5ac0deSDan Carpenter * writes). For coalesced WR SGE, fetches data from the FIFO instead of from 855fb5ac0deSDan Carpenter * Host. 85622adfe0aSSantosh Rastapur */ 857fb5ac0deSDan Carpenter static void cxgb_pio_copy(u64 __iomem *dst, struct tx_desc *desc) 85822adfe0aSSantosh Rastapur { 859fb5ac0deSDan Carpenter int count = sizeof(*desc) / sizeof(u64); 860fb5ac0deSDan Carpenter u64 *src = (u64 *)desc; 86122adfe0aSSantosh Rastapur 86222adfe0aSSantosh Rastapur while (count) { 86322adfe0aSSantosh Rastapur writeq(*src, dst); 86422adfe0aSSantosh Rastapur src++; 86522adfe0aSSantosh Rastapur dst++; 86622adfe0aSSantosh Rastapur count--; 86722adfe0aSSantosh Rastapur } 86822adfe0aSSantosh Rastapur } 86922adfe0aSSantosh Rastapur 870f7917c00SJeff Kirsher /** 871f7917c00SJeff Kirsher * ring_tx_db - check and potentially ring a Tx queue's doorbell 872f7917c00SJeff Kirsher * @adap: the adapter 873f7917c00SJeff Kirsher * @q: the Tx queue 874f7917c00SJeff Kirsher * @n: number of new descriptors to give to HW 875f7917c00SJeff Kirsher * 876f7917c00SJeff Kirsher * Ring the doorbel for a Tx queue. 877f7917c00SJeff Kirsher */ 878f7917c00SJeff Kirsher static inline void ring_tx_db(struct adapter *adap, struct sge_txq *q, int n) 879f7917c00SJeff Kirsher { 880d63a6dcfSHariprasad Shenai wmb(); /* write descriptors before telling HW */ 881d63a6dcfSHariprasad Shenai 882d63a6dcfSHariprasad Shenai if (is_t4(adap->params.chip)) { 883d63a6dcfSHariprasad Shenai u32 val = PIDX(n); 88405eb2389SSteve Wise unsigned long flags; 88522adfe0aSSantosh Rastapur 886d63a6dcfSHariprasad Shenai /* For T4 we need to participate in the Doorbell Recovery 887d63a6dcfSHariprasad Shenai * mechanism. 888d63a6dcfSHariprasad Shenai */ 88905eb2389SSteve Wise spin_lock_irqsave(&q->db_lock, flags); 890d63a6dcfSHariprasad Shenai if (!q->db_disabled) 891840f3000SVipul Pandya t4_write_reg(adap, MYPF_REG(SGE_PF_KDOORBELL), 892d63a6dcfSHariprasad Shenai QID(q->cntxt_id) | val); 893d63a6dcfSHariprasad Shenai else 89405eb2389SSteve Wise q->db_pidx_inc += n; 8953069ee9bSVipul Pandya q->db_pidx = q->pidx; 89605eb2389SSteve Wise spin_unlock_irqrestore(&q->db_lock, flags); 897d63a6dcfSHariprasad Shenai } else { 898d63a6dcfSHariprasad Shenai u32 val = PIDX_T5(n); 899d63a6dcfSHariprasad Shenai 900d63a6dcfSHariprasad Shenai /* T4 and later chips share the same PIDX field offset within 901d63a6dcfSHariprasad Shenai * the doorbell, but T5 and later shrank the field in order to 902d63a6dcfSHariprasad Shenai * gain a bit for Doorbell Priority. The field was absurdly 903d63a6dcfSHariprasad Shenai * large in the first place (14 bits) so we just use the T5 904d63a6dcfSHariprasad Shenai * and later limits and warn if a Queue ID is too large. 905d63a6dcfSHariprasad Shenai */ 906d63a6dcfSHariprasad Shenai WARN_ON(val & DBPRIO(1)); 907d63a6dcfSHariprasad Shenai 908d63a6dcfSHariprasad Shenai /* For T5 and later we use the Write-Combine mapped BAR2 User 909d63a6dcfSHariprasad Shenai * Doorbell mechanism. If we're only writing a single TX 910d63a6dcfSHariprasad Shenai * Descriptor and TX Write Combining hasn't been disabled, we 911d63a6dcfSHariprasad Shenai * can use the Write Combining Gather Buffer; otherwise we use 912d63a6dcfSHariprasad Shenai * the simple doorbell. 913d63a6dcfSHariprasad Shenai */ 914d63a6dcfSHariprasad Shenai if (n == 1) { 915d63a6dcfSHariprasad Shenai int index = (q->pidx 916d63a6dcfSHariprasad Shenai ? (q->pidx - 1) 917d63a6dcfSHariprasad Shenai : (q->size - 1)); 918d63a6dcfSHariprasad Shenai 919fb5ac0deSDan Carpenter cxgb_pio_copy(adap->bar2 + q->udb + SGE_UDB_WCDOORBELL, 920fb5ac0deSDan Carpenter q->desc + index); 921d63a6dcfSHariprasad Shenai } else { 922d63a6dcfSHariprasad Shenai writel(val, adap->bar2 + q->udb + SGE_UDB_KDOORBELL); 923d63a6dcfSHariprasad Shenai } 924d63a6dcfSHariprasad Shenai 925d63a6dcfSHariprasad Shenai /* This Write Memory Barrier will force the write to the User 926d63a6dcfSHariprasad Shenai * Doorbell area to be flushed. This is needed to prevent 927d63a6dcfSHariprasad Shenai * writes on different CPUs for the same queue from hitting 928d63a6dcfSHariprasad Shenai * the adapter out of order. This is required when some Work 929d63a6dcfSHariprasad Shenai * Requests take the Write Combine Gather Buffer path (user 930d63a6dcfSHariprasad Shenai * doorbell area offset [SGE_UDB_WCDOORBELL..+63]) and some 931d63a6dcfSHariprasad Shenai * take the traditional path where we simply increment the 932d63a6dcfSHariprasad Shenai * PIDX (User Doorbell area SGE_UDB_KDOORBELL) and have the 933d63a6dcfSHariprasad Shenai * hardware DMA read the actual Work Request. 934d63a6dcfSHariprasad Shenai */ 935d63a6dcfSHariprasad Shenai wmb(); 936d63a6dcfSHariprasad Shenai } 937f7917c00SJeff Kirsher } 938f7917c00SJeff Kirsher 939f7917c00SJeff Kirsher /** 940f7917c00SJeff Kirsher * inline_tx_skb - inline a packet's data into Tx descriptors 941f7917c00SJeff Kirsher * @skb: the packet 942f7917c00SJeff Kirsher * @q: the Tx queue where the packet will be inlined 943f7917c00SJeff Kirsher * @pos: starting position in the Tx queue where to inline the packet 944f7917c00SJeff Kirsher * 945f7917c00SJeff Kirsher * Inline a packet's contents directly into Tx descriptors, starting at 946f7917c00SJeff Kirsher * the given position within the Tx DMA ring. 947f7917c00SJeff Kirsher * Most of the complexity of this operation is dealing with wrap arounds 948f7917c00SJeff Kirsher * in the middle of the packet we want to inline. 949f7917c00SJeff Kirsher */ 950f7917c00SJeff Kirsher static void inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q, 951f7917c00SJeff Kirsher void *pos) 952f7917c00SJeff Kirsher { 953f7917c00SJeff Kirsher u64 *p; 954f7917c00SJeff Kirsher int left = (void *)q->stat - pos; 955f7917c00SJeff Kirsher 956f7917c00SJeff Kirsher if (likely(skb->len <= left)) { 957f7917c00SJeff Kirsher if (likely(!skb->data_len)) 958f7917c00SJeff Kirsher skb_copy_from_linear_data(skb, pos, skb->len); 959f7917c00SJeff Kirsher else 960f7917c00SJeff Kirsher skb_copy_bits(skb, 0, pos, skb->len); 961f7917c00SJeff Kirsher pos += skb->len; 962f7917c00SJeff Kirsher } else { 963f7917c00SJeff Kirsher skb_copy_bits(skb, 0, pos, left); 964f7917c00SJeff Kirsher skb_copy_bits(skb, left, q->desc, skb->len - left); 965f7917c00SJeff Kirsher pos = (void *)q->desc + (skb->len - left); 966f7917c00SJeff Kirsher } 967f7917c00SJeff Kirsher 968f7917c00SJeff Kirsher /* 0-pad to multiple of 16 */ 969f7917c00SJeff Kirsher p = PTR_ALIGN(pos, 8); 970f7917c00SJeff Kirsher if ((uintptr_t)p & 8) 971f7917c00SJeff Kirsher *p = 0; 972f7917c00SJeff Kirsher } 973f7917c00SJeff Kirsher 974f7917c00SJeff Kirsher /* 975f7917c00SJeff Kirsher * Figure out what HW csum a packet wants and return the appropriate control 976f7917c00SJeff Kirsher * bits. 977f7917c00SJeff Kirsher */ 978f7917c00SJeff Kirsher static u64 hwcsum(const struct sk_buff *skb) 979f7917c00SJeff Kirsher { 980f7917c00SJeff Kirsher int csum_type; 981f7917c00SJeff Kirsher const struct iphdr *iph = ip_hdr(skb); 982f7917c00SJeff Kirsher 983f7917c00SJeff Kirsher if (iph->version == 4) { 984f7917c00SJeff Kirsher if (iph->protocol == IPPROTO_TCP) 985f7917c00SJeff Kirsher csum_type = TX_CSUM_TCPIP; 986f7917c00SJeff Kirsher else if (iph->protocol == IPPROTO_UDP) 987f7917c00SJeff Kirsher csum_type = TX_CSUM_UDPIP; 988f7917c00SJeff Kirsher else { 989f7917c00SJeff Kirsher nocsum: /* 990f7917c00SJeff Kirsher * unknown protocol, disable HW csum 991f7917c00SJeff Kirsher * and hope a bad packet is detected 992f7917c00SJeff Kirsher */ 993f7917c00SJeff Kirsher return TXPKT_L4CSUM_DIS; 994f7917c00SJeff Kirsher } 995f7917c00SJeff Kirsher } else { 996f7917c00SJeff Kirsher /* 997f7917c00SJeff Kirsher * this doesn't work with extension headers 998f7917c00SJeff Kirsher */ 999f7917c00SJeff Kirsher const struct ipv6hdr *ip6h = (const struct ipv6hdr *)iph; 1000f7917c00SJeff Kirsher 1001f7917c00SJeff Kirsher if (ip6h->nexthdr == IPPROTO_TCP) 1002f7917c00SJeff Kirsher csum_type = TX_CSUM_TCPIP6; 1003f7917c00SJeff Kirsher else if (ip6h->nexthdr == IPPROTO_UDP) 1004f7917c00SJeff Kirsher csum_type = TX_CSUM_UDPIP6; 1005f7917c00SJeff Kirsher else 1006f7917c00SJeff Kirsher goto nocsum; 1007f7917c00SJeff Kirsher } 1008f7917c00SJeff Kirsher 1009f7917c00SJeff Kirsher if (likely(csum_type >= TX_CSUM_TCPIP)) 1010f7917c00SJeff Kirsher return TXPKT_CSUM_TYPE(csum_type) | 1011f7917c00SJeff Kirsher TXPKT_IPHDR_LEN(skb_network_header_len(skb)) | 1012f7917c00SJeff Kirsher TXPKT_ETHHDR_LEN(skb_network_offset(skb) - ETH_HLEN); 1013f7917c00SJeff Kirsher else { 1014f7917c00SJeff Kirsher int start = skb_transport_offset(skb); 1015f7917c00SJeff Kirsher 1016f7917c00SJeff Kirsher return TXPKT_CSUM_TYPE(csum_type) | TXPKT_CSUM_START(start) | 1017f7917c00SJeff Kirsher TXPKT_CSUM_LOC(start + skb->csum_offset); 1018f7917c00SJeff Kirsher } 1019f7917c00SJeff Kirsher } 1020f7917c00SJeff Kirsher 1021f7917c00SJeff Kirsher static void eth_txq_stop(struct sge_eth_txq *q) 1022f7917c00SJeff Kirsher { 1023f7917c00SJeff Kirsher netif_tx_stop_queue(q->txq); 1024f7917c00SJeff Kirsher q->q.stops++; 1025f7917c00SJeff Kirsher } 1026f7917c00SJeff Kirsher 1027f7917c00SJeff Kirsher static inline void txq_advance(struct sge_txq *q, unsigned int n) 1028f7917c00SJeff Kirsher { 1029f7917c00SJeff Kirsher q->in_use += n; 1030f7917c00SJeff Kirsher q->pidx += n; 1031f7917c00SJeff Kirsher if (q->pidx >= q->size) 1032f7917c00SJeff Kirsher q->pidx -= q->size; 1033f7917c00SJeff Kirsher } 1034f7917c00SJeff Kirsher 1035f7917c00SJeff Kirsher /** 1036f7917c00SJeff Kirsher * t4_eth_xmit - add a packet to an Ethernet Tx queue 1037f7917c00SJeff Kirsher * @skb: the packet 1038f7917c00SJeff Kirsher * @dev: the egress net device 1039f7917c00SJeff Kirsher * 1040f7917c00SJeff Kirsher * Add a packet to an SGE Ethernet Tx queue. Runs with softirqs disabled. 1041f7917c00SJeff Kirsher */ 1042f7917c00SJeff Kirsher netdev_tx_t t4_eth_xmit(struct sk_buff *skb, struct net_device *dev) 1043f7917c00SJeff Kirsher { 10440034b298SKumar Sanghvi int len; 1045f7917c00SJeff Kirsher u32 wr_mid; 1046f7917c00SJeff Kirsher u64 cntrl, *end; 1047f7917c00SJeff Kirsher int qidx, credits; 1048f7917c00SJeff Kirsher unsigned int flits, ndesc; 1049f7917c00SJeff Kirsher struct adapter *adap; 1050f7917c00SJeff Kirsher struct sge_eth_txq *q; 1051f7917c00SJeff Kirsher const struct port_info *pi; 1052f7917c00SJeff Kirsher struct fw_eth_tx_pkt_wr *wr; 1053f7917c00SJeff Kirsher struct cpl_tx_pkt_core *cpl; 1054f7917c00SJeff Kirsher const struct skb_shared_info *ssi; 1055f7917c00SJeff Kirsher dma_addr_t addr[MAX_SKB_FRAGS + 1]; 10560034b298SKumar Sanghvi bool immediate = false; 1057f7917c00SJeff Kirsher 1058f7917c00SJeff Kirsher /* 1059f7917c00SJeff Kirsher * The chip min packet length is 10 octets but play safe and reject 1060f7917c00SJeff Kirsher * anything shorter than an Ethernet header. 1061f7917c00SJeff Kirsher */ 1062f7917c00SJeff Kirsher if (unlikely(skb->len < ETH_HLEN)) { 1063a7525198SEric W. Biederman out_free: dev_kfree_skb_any(skb); 1064f7917c00SJeff Kirsher return NETDEV_TX_OK; 1065f7917c00SJeff Kirsher } 1066f7917c00SJeff Kirsher 1067f7917c00SJeff Kirsher pi = netdev_priv(dev); 1068f7917c00SJeff Kirsher adap = pi->adapter; 1069f7917c00SJeff Kirsher qidx = skb_get_queue_mapping(skb); 1070f7917c00SJeff Kirsher q = &adap->sge.ethtxq[qidx + pi->first_qset]; 1071f7917c00SJeff Kirsher 1072f7917c00SJeff Kirsher reclaim_completed_tx(adap, &q->q, true); 1073f7917c00SJeff Kirsher 1074f7917c00SJeff Kirsher flits = calc_tx_flits(skb); 1075f7917c00SJeff Kirsher ndesc = flits_to_desc(flits); 1076f7917c00SJeff Kirsher credits = txq_avail(&q->q) - ndesc; 1077f7917c00SJeff Kirsher 1078f7917c00SJeff Kirsher if (unlikely(credits < 0)) { 1079f7917c00SJeff Kirsher eth_txq_stop(q); 1080f7917c00SJeff Kirsher dev_err(adap->pdev_dev, 1081f7917c00SJeff Kirsher "%s: Tx ring %u full while queue awake!\n", 1082f7917c00SJeff Kirsher dev->name, qidx); 1083f7917c00SJeff Kirsher return NETDEV_TX_BUSY; 1084f7917c00SJeff Kirsher } 1085f7917c00SJeff Kirsher 10860034b298SKumar Sanghvi if (is_eth_imm(skb)) 10870034b298SKumar Sanghvi immediate = true; 10880034b298SKumar Sanghvi 10890034b298SKumar Sanghvi if (!immediate && 1090f7917c00SJeff Kirsher unlikely(map_skb(adap->pdev_dev, skb, addr) < 0)) { 1091f7917c00SJeff Kirsher q->mapping_err++; 1092f7917c00SJeff Kirsher goto out_free; 1093f7917c00SJeff Kirsher } 1094f7917c00SJeff Kirsher 1095e2ac9628SHariprasad Shenai wr_mid = FW_WR_LEN16_V(DIV_ROUND_UP(flits, 2)); 1096f7917c00SJeff Kirsher if (unlikely(credits < ETHTXQ_STOP_THRES)) { 1097f7917c00SJeff Kirsher eth_txq_stop(q); 1098e2ac9628SHariprasad Shenai wr_mid |= FW_WR_EQUEQ_F | FW_WR_EQUIQ_F; 1099f7917c00SJeff Kirsher } 1100f7917c00SJeff Kirsher 1101f7917c00SJeff Kirsher wr = (void *)&q->q.desc[q->q.pidx]; 1102f7917c00SJeff Kirsher wr->equiq_to_len16 = htonl(wr_mid); 1103f7917c00SJeff Kirsher wr->r3 = cpu_to_be64(0); 1104f7917c00SJeff Kirsher end = (u64 *)wr + flits; 1105f7917c00SJeff Kirsher 11060034b298SKumar Sanghvi len = immediate ? skb->len : 0; 1107f7917c00SJeff Kirsher ssi = skb_shinfo(skb); 1108f7917c00SJeff Kirsher if (ssi->gso_size) { 1109f7917c00SJeff Kirsher struct cpl_tx_pkt_lso *lso = (void *)wr; 1110f7917c00SJeff Kirsher bool v6 = (ssi->gso_type & SKB_GSO_TCPV6) != 0; 1111f7917c00SJeff Kirsher int l3hdr_len = skb_network_header_len(skb); 1112f7917c00SJeff Kirsher int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN; 1113f7917c00SJeff Kirsher 11140034b298SKumar Sanghvi len += sizeof(*lso); 1115e2ac9628SHariprasad Shenai wr->op_immdlen = htonl(FW_WR_OP_V(FW_ETH_TX_PKT_WR) | 1116e2ac9628SHariprasad Shenai FW_WR_IMMDLEN_V(len)); 1117f7917c00SJeff Kirsher lso->c.lso_ctrl = htonl(LSO_OPCODE(CPL_TX_PKT_LSO) | 1118f7917c00SJeff Kirsher LSO_FIRST_SLICE | LSO_LAST_SLICE | 1119f7917c00SJeff Kirsher LSO_IPV6(v6) | 1120f7917c00SJeff Kirsher LSO_ETHHDR_LEN(eth_xtra_len / 4) | 1121f7917c00SJeff Kirsher LSO_IPHDR_LEN(l3hdr_len / 4) | 1122f7917c00SJeff Kirsher LSO_TCPHDR_LEN(tcp_hdr(skb)->doff)); 1123f7917c00SJeff Kirsher lso->c.ipid_ofst = htons(0); 1124f7917c00SJeff Kirsher lso->c.mss = htons(ssi->gso_size); 1125f7917c00SJeff Kirsher lso->c.seqno_offset = htonl(0); 11267207c0d1SHariprasad Shenai if (is_t4(adap->params.chip)) 1127f7917c00SJeff Kirsher lso->c.len = htonl(skb->len); 11287207c0d1SHariprasad Shenai else 11297207c0d1SHariprasad Shenai lso->c.len = htonl(LSO_T5_XFER_SIZE(skb->len)); 1130f7917c00SJeff Kirsher cpl = (void *)(lso + 1); 1131f7917c00SJeff Kirsher cntrl = TXPKT_CSUM_TYPE(v6 ? TX_CSUM_TCPIP6 : TX_CSUM_TCPIP) | 1132f7917c00SJeff Kirsher TXPKT_IPHDR_LEN(l3hdr_len) | 1133f7917c00SJeff Kirsher TXPKT_ETHHDR_LEN(eth_xtra_len); 1134f7917c00SJeff Kirsher q->tso++; 1135f7917c00SJeff Kirsher q->tx_cso += ssi->gso_segs; 1136f7917c00SJeff Kirsher } else { 1137ca71de6bSKumar Sanghvi len += sizeof(*cpl); 1138e2ac9628SHariprasad Shenai wr->op_immdlen = htonl(FW_WR_OP_V(FW_ETH_TX_PKT_WR) | 1139e2ac9628SHariprasad Shenai FW_WR_IMMDLEN_V(len)); 1140f7917c00SJeff Kirsher cpl = (void *)(wr + 1); 1141f7917c00SJeff Kirsher if (skb->ip_summed == CHECKSUM_PARTIAL) { 1142f7917c00SJeff Kirsher cntrl = hwcsum(skb) | TXPKT_IPCSUM_DIS; 1143f7917c00SJeff Kirsher q->tx_cso++; 1144f7917c00SJeff Kirsher } else 1145f7917c00SJeff Kirsher cntrl = TXPKT_L4CSUM_DIS | TXPKT_IPCSUM_DIS; 1146f7917c00SJeff Kirsher } 1147f7917c00SJeff Kirsher 1148f7917c00SJeff Kirsher if (vlan_tx_tag_present(skb)) { 1149f7917c00SJeff Kirsher q->vlan_ins++; 1150f7917c00SJeff Kirsher cntrl |= TXPKT_VLAN_VLD | TXPKT_VLAN(vlan_tx_tag_get(skb)); 1151f7917c00SJeff Kirsher } 1152f7917c00SJeff Kirsher 1153f7917c00SJeff Kirsher cpl->ctrl0 = htonl(TXPKT_OPCODE(CPL_TX_PKT_XT) | 1154f7917c00SJeff Kirsher TXPKT_INTF(pi->tx_chan) | TXPKT_PF(adap->fn)); 1155f7917c00SJeff Kirsher cpl->pack = htons(0); 1156f7917c00SJeff Kirsher cpl->len = htons(skb->len); 1157f7917c00SJeff Kirsher cpl->ctrl1 = cpu_to_be64(cntrl); 1158f7917c00SJeff Kirsher 11590034b298SKumar Sanghvi if (immediate) { 1160f7917c00SJeff Kirsher inline_tx_skb(skb, &q->q, cpl + 1); 1161a7525198SEric W. Biederman dev_consume_skb_any(skb); 1162f7917c00SJeff Kirsher } else { 1163f7917c00SJeff Kirsher int last_desc; 1164f7917c00SJeff Kirsher 1165f7917c00SJeff Kirsher write_sgl(skb, &q->q, (struct ulptx_sgl *)(cpl + 1), end, 0, 1166f7917c00SJeff Kirsher addr); 1167f7917c00SJeff Kirsher skb_orphan(skb); 1168f7917c00SJeff Kirsher 1169f7917c00SJeff Kirsher last_desc = q->q.pidx + ndesc - 1; 1170f7917c00SJeff Kirsher if (last_desc >= q->q.size) 1171f7917c00SJeff Kirsher last_desc -= q->q.size; 1172f7917c00SJeff Kirsher q->q.sdesc[last_desc].skb = skb; 1173f7917c00SJeff Kirsher q->q.sdesc[last_desc].sgl = (struct ulptx_sgl *)(cpl + 1); 1174f7917c00SJeff Kirsher } 1175f7917c00SJeff Kirsher 1176f7917c00SJeff Kirsher txq_advance(&q->q, ndesc); 1177f7917c00SJeff Kirsher 1178f7917c00SJeff Kirsher ring_tx_db(adap, &q->q, ndesc); 1179f7917c00SJeff Kirsher return NETDEV_TX_OK; 1180f7917c00SJeff Kirsher } 1181f7917c00SJeff Kirsher 1182f7917c00SJeff Kirsher /** 1183f7917c00SJeff Kirsher * reclaim_completed_tx_imm - reclaim completed control-queue Tx descs 1184f7917c00SJeff Kirsher * @q: the SGE control Tx queue 1185f7917c00SJeff Kirsher * 1186f7917c00SJeff Kirsher * This is a variant of reclaim_completed_tx() that is used for Tx queues 1187f7917c00SJeff Kirsher * that send only immediate data (presently just the control queues) and 1188f7917c00SJeff Kirsher * thus do not have any sk_buffs to release. 1189f7917c00SJeff Kirsher */ 1190f7917c00SJeff Kirsher static inline void reclaim_completed_tx_imm(struct sge_txq *q) 1191f7917c00SJeff Kirsher { 1192f7917c00SJeff Kirsher int hw_cidx = ntohs(q->stat->cidx); 1193f7917c00SJeff Kirsher int reclaim = hw_cidx - q->cidx; 1194f7917c00SJeff Kirsher 1195f7917c00SJeff Kirsher if (reclaim < 0) 1196f7917c00SJeff Kirsher reclaim += q->size; 1197f7917c00SJeff Kirsher 1198f7917c00SJeff Kirsher q->in_use -= reclaim; 1199f7917c00SJeff Kirsher q->cidx = hw_cidx; 1200f7917c00SJeff Kirsher } 1201f7917c00SJeff Kirsher 1202f7917c00SJeff Kirsher /** 1203f7917c00SJeff Kirsher * is_imm - check whether a packet can be sent as immediate data 1204f7917c00SJeff Kirsher * @skb: the packet 1205f7917c00SJeff Kirsher * 1206f7917c00SJeff Kirsher * Returns true if a packet can be sent as a WR with immediate data. 1207f7917c00SJeff Kirsher */ 1208f7917c00SJeff Kirsher static inline int is_imm(const struct sk_buff *skb) 1209f7917c00SJeff Kirsher { 1210f7917c00SJeff Kirsher return skb->len <= MAX_CTRL_WR_LEN; 1211f7917c00SJeff Kirsher } 1212f7917c00SJeff Kirsher 1213f7917c00SJeff Kirsher /** 1214f7917c00SJeff Kirsher * ctrlq_check_stop - check if a control queue is full and should stop 1215f7917c00SJeff Kirsher * @q: the queue 1216f7917c00SJeff Kirsher * @wr: most recent WR written to the queue 1217f7917c00SJeff Kirsher * 1218f7917c00SJeff Kirsher * Check if a control queue has become full and should be stopped. 1219f7917c00SJeff Kirsher * We clean up control queue descriptors very lazily, only when we are out. 1220f7917c00SJeff Kirsher * If the queue is still full after reclaiming any completed descriptors 1221f7917c00SJeff Kirsher * we suspend it and have the last WR wake it up. 1222f7917c00SJeff Kirsher */ 1223f7917c00SJeff Kirsher static void ctrlq_check_stop(struct sge_ctrl_txq *q, struct fw_wr_hdr *wr) 1224f7917c00SJeff Kirsher { 1225f7917c00SJeff Kirsher reclaim_completed_tx_imm(&q->q); 1226f7917c00SJeff Kirsher if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES)) { 1227e2ac9628SHariprasad Shenai wr->lo |= htonl(FW_WR_EQUEQ_F | FW_WR_EQUIQ_F); 1228f7917c00SJeff Kirsher q->q.stops++; 1229f7917c00SJeff Kirsher q->full = 1; 1230f7917c00SJeff Kirsher } 1231f7917c00SJeff Kirsher } 1232f7917c00SJeff Kirsher 1233f7917c00SJeff Kirsher /** 1234f7917c00SJeff Kirsher * ctrl_xmit - send a packet through an SGE control Tx queue 1235f7917c00SJeff Kirsher * @q: the control queue 1236f7917c00SJeff Kirsher * @skb: the packet 1237f7917c00SJeff Kirsher * 1238f7917c00SJeff Kirsher * Send a packet through an SGE control Tx queue. Packets sent through 1239f7917c00SJeff Kirsher * a control queue must fit entirely as immediate data. 1240f7917c00SJeff Kirsher */ 1241f7917c00SJeff Kirsher static int ctrl_xmit(struct sge_ctrl_txq *q, struct sk_buff *skb) 1242f7917c00SJeff Kirsher { 1243f7917c00SJeff Kirsher unsigned int ndesc; 1244f7917c00SJeff Kirsher struct fw_wr_hdr *wr; 1245f7917c00SJeff Kirsher 1246f7917c00SJeff Kirsher if (unlikely(!is_imm(skb))) { 1247f7917c00SJeff Kirsher WARN_ON(1); 1248f7917c00SJeff Kirsher dev_kfree_skb(skb); 1249f7917c00SJeff Kirsher return NET_XMIT_DROP; 1250f7917c00SJeff Kirsher } 1251f7917c00SJeff Kirsher 1252f7917c00SJeff Kirsher ndesc = DIV_ROUND_UP(skb->len, sizeof(struct tx_desc)); 1253f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1254f7917c00SJeff Kirsher 1255f7917c00SJeff Kirsher if (unlikely(q->full)) { 1256f7917c00SJeff Kirsher skb->priority = ndesc; /* save for restart */ 1257f7917c00SJeff Kirsher __skb_queue_tail(&q->sendq, skb); 1258f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1259f7917c00SJeff Kirsher return NET_XMIT_CN; 1260f7917c00SJeff Kirsher } 1261f7917c00SJeff Kirsher 1262f7917c00SJeff Kirsher wr = (struct fw_wr_hdr *)&q->q.desc[q->q.pidx]; 1263f7917c00SJeff Kirsher inline_tx_skb(skb, &q->q, wr); 1264f7917c00SJeff Kirsher 1265f7917c00SJeff Kirsher txq_advance(&q->q, ndesc); 1266f7917c00SJeff Kirsher if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES)) 1267f7917c00SJeff Kirsher ctrlq_check_stop(q, wr); 1268f7917c00SJeff Kirsher 1269f7917c00SJeff Kirsher ring_tx_db(q->adap, &q->q, ndesc); 1270f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1271f7917c00SJeff Kirsher 1272f7917c00SJeff Kirsher kfree_skb(skb); 1273f7917c00SJeff Kirsher return NET_XMIT_SUCCESS; 1274f7917c00SJeff Kirsher } 1275f7917c00SJeff Kirsher 1276f7917c00SJeff Kirsher /** 1277f7917c00SJeff Kirsher * restart_ctrlq - restart a suspended control queue 1278f7917c00SJeff Kirsher * @data: the control queue to restart 1279f7917c00SJeff Kirsher * 1280f7917c00SJeff Kirsher * Resumes transmission on a suspended Tx control queue. 1281f7917c00SJeff Kirsher */ 1282f7917c00SJeff Kirsher static void restart_ctrlq(unsigned long data) 1283f7917c00SJeff Kirsher { 1284f7917c00SJeff Kirsher struct sk_buff *skb; 1285f7917c00SJeff Kirsher unsigned int written = 0; 1286f7917c00SJeff Kirsher struct sge_ctrl_txq *q = (struct sge_ctrl_txq *)data; 1287f7917c00SJeff Kirsher 1288f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1289f7917c00SJeff Kirsher reclaim_completed_tx_imm(&q->q); 1290f7917c00SJeff Kirsher BUG_ON(txq_avail(&q->q) < TXQ_STOP_THRES); /* q should be empty */ 1291f7917c00SJeff Kirsher 1292f7917c00SJeff Kirsher while ((skb = __skb_dequeue(&q->sendq)) != NULL) { 1293f7917c00SJeff Kirsher struct fw_wr_hdr *wr; 1294f7917c00SJeff Kirsher unsigned int ndesc = skb->priority; /* previously saved */ 1295f7917c00SJeff Kirsher 1296f7917c00SJeff Kirsher /* 1297f7917c00SJeff Kirsher * Write descriptors and free skbs outside the lock to limit 1298f7917c00SJeff Kirsher * wait times. q->full is still set so new skbs will be queued. 1299f7917c00SJeff Kirsher */ 1300f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1301f7917c00SJeff Kirsher 1302f7917c00SJeff Kirsher wr = (struct fw_wr_hdr *)&q->q.desc[q->q.pidx]; 1303f7917c00SJeff Kirsher inline_tx_skb(skb, &q->q, wr); 1304f7917c00SJeff Kirsher kfree_skb(skb); 1305f7917c00SJeff Kirsher 1306f7917c00SJeff Kirsher written += ndesc; 1307f7917c00SJeff Kirsher txq_advance(&q->q, ndesc); 1308f7917c00SJeff Kirsher if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES)) { 1309f7917c00SJeff Kirsher unsigned long old = q->q.stops; 1310f7917c00SJeff Kirsher 1311f7917c00SJeff Kirsher ctrlq_check_stop(q, wr); 1312f7917c00SJeff Kirsher if (q->q.stops != old) { /* suspended anew */ 1313f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1314f7917c00SJeff Kirsher goto ringdb; 1315f7917c00SJeff Kirsher } 1316f7917c00SJeff Kirsher } 1317f7917c00SJeff Kirsher if (written > 16) { 1318f7917c00SJeff Kirsher ring_tx_db(q->adap, &q->q, written); 1319f7917c00SJeff Kirsher written = 0; 1320f7917c00SJeff Kirsher } 1321f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1322f7917c00SJeff Kirsher } 1323f7917c00SJeff Kirsher q->full = 0; 1324f7917c00SJeff Kirsher ringdb: if (written) 1325f7917c00SJeff Kirsher ring_tx_db(q->adap, &q->q, written); 1326f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1327f7917c00SJeff Kirsher } 1328f7917c00SJeff Kirsher 1329f7917c00SJeff Kirsher /** 1330f7917c00SJeff Kirsher * t4_mgmt_tx - send a management message 1331f7917c00SJeff Kirsher * @adap: the adapter 1332f7917c00SJeff Kirsher * @skb: the packet containing the management message 1333f7917c00SJeff Kirsher * 1334f7917c00SJeff Kirsher * Send a management message through control queue 0. 1335f7917c00SJeff Kirsher */ 1336f7917c00SJeff Kirsher int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb) 1337f7917c00SJeff Kirsher { 1338f7917c00SJeff Kirsher int ret; 1339f7917c00SJeff Kirsher 1340f7917c00SJeff Kirsher local_bh_disable(); 1341f7917c00SJeff Kirsher ret = ctrl_xmit(&adap->sge.ctrlq[0], skb); 1342f7917c00SJeff Kirsher local_bh_enable(); 1343f7917c00SJeff Kirsher return ret; 1344f7917c00SJeff Kirsher } 1345f7917c00SJeff Kirsher 1346f7917c00SJeff Kirsher /** 1347f7917c00SJeff Kirsher * is_ofld_imm - check whether a packet can be sent as immediate data 1348f7917c00SJeff Kirsher * @skb: the packet 1349f7917c00SJeff Kirsher * 1350f7917c00SJeff Kirsher * Returns true if a packet can be sent as an offload WR with immediate 1351f7917c00SJeff Kirsher * data. We currently use the same limit as for Ethernet packets. 1352f7917c00SJeff Kirsher */ 1353f7917c00SJeff Kirsher static inline int is_ofld_imm(const struct sk_buff *skb) 1354f7917c00SJeff Kirsher { 1355f7917c00SJeff Kirsher return skb->len <= MAX_IMM_TX_PKT_LEN; 1356f7917c00SJeff Kirsher } 1357f7917c00SJeff Kirsher 1358f7917c00SJeff Kirsher /** 1359f7917c00SJeff Kirsher * calc_tx_flits_ofld - calculate # of flits for an offload packet 1360f7917c00SJeff Kirsher * @skb: the packet 1361f7917c00SJeff Kirsher * 1362f7917c00SJeff Kirsher * Returns the number of flits needed for the given offload packet. 1363f7917c00SJeff Kirsher * These packets are already fully constructed and no additional headers 1364f7917c00SJeff Kirsher * will be added. 1365f7917c00SJeff Kirsher */ 1366f7917c00SJeff Kirsher static inline unsigned int calc_tx_flits_ofld(const struct sk_buff *skb) 1367f7917c00SJeff Kirsher { 1368f7917c00SJeff Kirsher unsigned int flits, cnt; 1369f7917c00SJeff Kirsher 1370f7917c00SJeff Kirsher if (is_ofld_imm(skb)) 1371f7917c00SJeff Kirsher return DIV_ROUND_UP(skb->len, 8); 1372f7917c00SJeff Kirsher 1373f7917c00SJeff Kirsher flits = skb_transport_offset(skb) / 8U; /* headers */ 1374f7917c00SJeff Kirsher cnt = skb_shinfo(skb)->nr_frags; 137515dd16c2SLi RongQing if (skb_tail_pointer(skb) != skb_transport_header(skb)) 1376f7917c00SJeff Kirsher cnt++; 1377f7917c00SJeff Kirsher return flits + sgl_len(cnt); 1378f7917c00SJeff Kirsher } 1379f7917c00SJeff Kirsher 1380f7917c00SJeff Kirsher /** 1381f7917c00SJeff Kirsher * txq_stop_maperr - stop a Tx queue due to I/O MMU exhaustion 1382f7917c00SJeff Kirsher * @adap: the adapter 1383f7917c00SJeff Kirsher * @q: the queue to stop 1384f7917c00SJeff Kirsher * 1385f7917c00SJeff Kirsher * Mark a Tx queue stopped due to I/O MMU exhaustion and resulting 1386f7917c00SJeff Kirsher * inability to map packets. A periodic timer attempts to restart 1387f7917c00SJeff Kirsher * queues so marked. 1388f7917c00SJeff Kirsher */ 1389f7917c00SJeff Kirsher static void txq_stop_maperr(struct sge_ofld_txq *q) 1390f7917c00SJeff Kirsher { 1391f7917c00SJeff Kirsher q->mapping_err++; 1392f7917c00SJeff Kirsher q->q.stops++; 1393f7917c00SJeff Kirsher set_bit(q->q.cntxt_id - q->adap->sge.egr_start, 1394f7917c00SJeff Kirsher q->adap->sge.txq_maperr); 1395f7917c00SJeff Kirsher } 1396f7917c00SJeff Kirsher 1397f7917c00SJeff Kirsher /** 1398f7917c00SJeff Kirsher * ofldtxq_stop - stop an offload Tx queue that has become full 1399f7917c00SJeff Kirsher * @q: the queue to stop 1400f7917c00SJeff Kirsher * @skb: the packet causing the queue to become full 1401f7917c00SJeff Kirsher * 1402f7917c00SJeff Kirsher * Stops an offload Tx queue that has become full and modifies the packet 1403f7917c00SJeff Kirsher * being written to request a wakeup. 1404f7917c00SJeff Kirsher */ 1405f7917c00SJeff Kirsher static void ofldtxq_stop(struct sge_ofld_txq *q, struct sk_buff *skb) 1406f7917c00SJeff Kirsher { 1407f7917c00SJeff Kirsher struct fw_wr_hdr *wr = (struct fw_wr_hdr *)skb->data; 1408f7917c00SJeff Kirsher 1409e2ac9628SHariprasad Shenai wr->lo |= htonl(FW_WR_EQUEQ_F | FW_WR_EQUIQ_F); 1410f7917c00SJeff Kirsher q->q.stops++; 1411f7917c00SJeff Kirsher q->full = 1; 1412f7917c00SJeff Kirsher } 1413f7917c00SJeff Kirsher 1414f7917c00SJeff Kirsher /** 1415f7917c00SJeff Kirsher * service_ofldq - restart a suspended offload queue 1416f7917c00SJeff Kirsher * @q: the offload queue 1417f7917c00SJeff Kirsher * 1418f7917c00SJeff Kirsher * Services an offload Tx queue by moving packets from its packet queue 1419f7917c00SJeff Kirsher * to the HW Tx ring. The function starts and ends with the queue locked. 1420f7917c00SJeff Kirsher */ 1421f7917c00SJeff Kirsher static void service_ofldq(struct sge_ofld_txq *q) 1422f7917c00SJeff Kirsher { 1423f7917c00SJeff Kirsher u64 *pos; 1424f7917c00SJeff Kirsher int credits; 1425f7917c00SJeff Kirsher struct sk_buff *skb; 1426f7917c00SJeff Kirsher unsigned int written = 0; 1427f7917c00SJeff Kirsher unsigned int flits, ndesc; 1428f7917c00SJeff Kirsher 1429f7917c00SJeff Kirsher while ((skb = skb_peek(&q->sendq)) != NULL && !q->full) { 1430f7917c00SJeff Kirsher /* 1431f7917c00SJeff Kirsher * We drop the lock but leave skb on sendq, thus retaining 1432f7917c00SJeff Kirsher * exclusive access to the state of the queue. 1433f7917c00SJeff Kirsher */ 1434f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1435f7917c00SJeff Kirsher 1436f7917c00SJeff Kirsher reclaim_completed_tx(q->adap, &q->q, false); 1437f7917c00SJeff Kirsher 1438f7917c00SJeff Kirsher flits = skb->priority; /* previously saved */ 1439f7917c00SJeff Kirsher ndesc = flits_to_desc(flits); 1440f7917c00SJeff Kirsher credits = txq_avail(&q->q) - ndesc; 1441f7917c00SJeff Kirsher BUG_ON(credits < 0); 1442f7917c00SJeff Kirsher if (unlikely(credits < TXQ_STOP_THRES)) 1443f7917c00SJeff Kirsher ofldtxq_stop(q, skb); 1444f7917c00SJeff Kirsher 1445f7917c00SJeff Kirsher pos = (u64 *)&q->q.desc[q->q.pidx]; 1446f7917c00SJeff Kirsher if (is_ofld_imm(skb)) 1447f7917c00SJeff Kirsher inline_tx_skb(skb, &q->q, pos); 1448f7917c00SJeff Kirsher else if (map_skb(q->adap->pdev_dev, skb, 1449f7917c00SJeff Kirsher (dma_addr_t *)skb->head)) { 1450f7917c00SJeff Kirsher txq_stop_maperr(q); 1451f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1452f7917c00SJeff Kirsher break; 1453f7917c00SJeff Kirsher } else { 1454f7917c00SJeff Kirsher int last_desc, hdr_len = skb_transport_offset(skb); 1455f7917c00SJeff Kirsher 1456f7917c00SJeff Kirsher memcpy(pos, skb->data, hdr_len); 1457f7917c00SJeff Kirsher write_sgl(skb, &q->q, (void *)pos + hdr_len, 1458f7917c00SJeff Kirsher pos + flits, hdr_len, 1459f7917c00SJeff Kirsher (dma_addr_t *)skb->head); 1460f7917c00SJeff Kirsher #ifdef CONFIG_NEED_DMA_MAP_STATE 1461f7917c00SJeff Kirsher skb->dev = q->adap->port[0]; 1462f7917c00SJeff Kirsher skb->destructor = deferred_unmap_destructor; 1463f7917c00SJeff Kirsher #endif 1464f7917c00SJeff Kirsher last_desc = q->q.pidx + ndesc - 1; 1465f7917c00SJeff Kirsher if (last_desc >= q->q.size) 1466f7917c00SJeff Kirsher last_desc -= q->q.size; 1467f7917c00SJeff Kirsher q->q.sdesc[last_desc].skb = skb; 1468f7917c00SJeff Kirsher } 1469f7917c00SJeff Kirsher 1470f7917c00SJeff Kirsher txq_advance(&q->q, ndesc); 1471f7917c00SJeff Kirsher written += ndesc; 1472f7917c00SJeff Kirsher if (unlikely(written > 32)) { 1473f7917c00SJeff Kirsher ring_tx_db(q->adap, &q->q, written); 1474f7917c00SJeff Kirsher written = 0; 1475f7917c00SJeff Kirsher } 1476f7917c00SJeff Kirsher 1477f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1478f7917c00SJeff Kirsher __skb_unlink(skb, &q->sendq); 1479f7917c00SJeff Kirsher if (is_ofld_imm(skb)) 1480f7917c00SJeff Kirsher kfree_skb(skb); 1481f7917c00SJeff Kirsher } 1482f7917c00SJeff Kirsher if (likely(written)) 1483f7917c00SJeff Kirsher ring_tx_db(q->adap, &q->q, written); 1484f7917c00SJeff Kirsher } 1485f7917c00SJeff Kirsher 1486f7917c00SJeff Kirsher /** 1487f7917c00SJeff Kirsher * ofld_xmit - send a packet through an offload queue 1488f7917c00SJeff Kirsher * @q: the Tx offload queue 1489f7917c00SJeff Kirsher * @skb: the packet 1490f7917c00SJeff Kirsher * 1491f7917c00SJeff Kirsher * Send an offload packet through an SGE offload queue. 1492f7917c00SJeff Kirsher */ 1493f7917c00SJeff Kirsher static int ofld_xmit(struct sge_ofld_txq *q, struct sk_buff *skb) 1494f7917c00SJeff Kirsher { 1495f7917c00SJeff Kirsher skb->priority = calc_tx_flits_ofld(skb); /* save for restart */ 1496f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1497f7917c00SJeff Kirsher __skb_queue_tail(&q->sendq, skb); 1498f7917c00SJeff Kirsher if (q->sendq.qlen == 1) 1499f7917c00SJeff Kirsher service_ofldq(q); 1500f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1501f7917c00SJeff Kirsher return NET_XMIT_SUCCESS; 1502f7917c00SJeff Kirsher } 1503f7917c00SJeff Kirsher 1504f7917c00SJeff Kirsher /** 1505f7917c00SJeff Kirsher * restart_ofldq - restart a suspended offload queue 1506f7917c00SJeff Kirsher * @data: the offload queue to restart 1507f7917c00SJeff Kirsher * 1508f7917c00SJeff Kirsher * Resumes transmission on a suspended Tx offload queue. 1509f7917c00SJeff Kirsher */ 1510f7917c00SJeff Kirsher static void restart_ofldq(unsigned long data) 1511f7917c00SJeff Kirsher { 1512f7917c00SJeff Kirsher struct sge_ofld_txq *q = (struct sge_ofld_txq *)data; 1513f7917c00SJeff Kirsher 1514f7917c00SJeff Kirsher spin_lock(&q->sendq.lock); 1515f7917c00SJeff Kirsher q->full = 0; /* the queue actually is completely empty now */ 1516f7917c00SJeff Kirsher service_ofldq(q); 1517f7917c00SJeff Kirsher spin_unlock(&q->sendq.lock); 1518f7917c00SJeff Kirsher } 1519f7917c00SJeff Kirsher 1520f7917c00SJeff Kirsher /** 1521f7917c00SJeff Kirsher * skb_txq - return the Tx queue an offload packet should use 1522f7917c00SJeff Kirsher * @skb: the packet 1523f7917c00SJeff Kirsher * 1524f7917c00SJeff Kirsher * Returns the Tx queue an offload packet should use as indicated by bits 1525f7917c00SJeff Kirsher * 1-15 in the packet's queue_mapping. 1526f7917c00SJeff Kirsher */ 1527f7917c00SJeff Kirsher static inline unsigned int skb_txq(const struct sk_buff *skb) 1528f7917c00SJeff Kirsher { 1529f7917c00SJeff Kirsher return skb->queue_mapping >> 1; 1530f7917c00SJeff Kirsher } 1531f7917c00SJeff Kirsher 1532f7917c00SJeff Kirsher /** 1533f7917c00SJeff Kirsher * is_ctrl_pkt - return whether an offload packet is a control packet 1534f7917c00SJeff Kirsher * @skb: the packet 1535f7917c00SJeff Kirsher * 1536f7917c00SJeff Kirsher * Returns whether an offload packet should use an OFLD or a CTRL 1537f7917c00SJeff Kirsher * Tx queue as indicated by bit 0 in the packet's queue_mapping. 1538f7917c00SJeff Kirsher */ 1539f7917c00SJeff Kirsher static inline unsigned int is_ctrl_pkt(const struct sk_buff *skb) 1540f7917c00SJeff Kirsher { 1541f7917c00SJeff Kirsher return skb->queue_mapping & 1; 1542f7917c00SJeff Kirsher } 1543f7917c00SJeff Kirsher 1544f7917c00SJeff Kirsher static inline int ofld_send(struct adapter *adap, struct sk_buff *skb) 1545f7917c00SJeff Kirsher { 1546f7917c00SJeff Kirsher unsigned int idx = skb_txq(skb); 1547f7917c00SJeff Kirsher 15484fe44dd7SKumar Sanghvi if (unlikely(is_ctrl_pkt(skb))) { 15494fe44dd7SKumar Sanghvi /* Single ctrl queue is a requirement for LE workaround path */ 15504fe44dd7SKumar Sanghvi if (adap->tids.nsftids) 15514fe44dd7SKumar Sanghvi idx = 0; 1552f7917c00SJeff Kirsher return ctrl_xmit(&adap->sge.ctrlq[idx], skb); 15534fe44dd7SKumar Sanghvi } 1554f7917c00SJeff Kirsher return ofld_xmit(&adap->sge.ofldtxq[idx], skb); 1555f7917c00SJeff Kirsher } 1556f7917c00SJeff Kirsher 1557f7917c00SJeff Kirsher /** 1558f7917c00SJeff Kirsher * t4_ofld_send - send an offload packet 1559f7917c00SJeff Kirsher * @adap: the adapter 1560f7917c00SJeff Kirsher * @skb: the packet 1561f7917c00SJeff Kirsher * 1562f7917c00SJeff Kirsher * Sends an offload packet. We use the packet queue_mapping to select the 1563f7917c00SJeff Kirsher * appropriate Tx queue as follows: bit 0 indicates whether the packet 1564f7917c00SJeff Kirsher * should be sent as regular or control, bits 1-15 select the queue. 1565f7917c00SJeff Kirsher */ 1566f7917c00SJeff Kirsher int t4_ofld_send(struct adapter *adap, struct sk_buff *skb) 1567f7917c00SJeff Kirsher { 1568f7917c00SJeff Kirsher int ret; 1569f7917c00SJeff Kirsher 1570f7917c00SJeff Kirsher local_bh_disable(); 1571f7917c00SJeff Kirsher ret = ofld_send(adap, skb); 1572f7917c00SJeff Kirsher local_bh_enable(); 1573f7917c00SJeff Kirsher return ret; 1574f7917c00SJeff Kirsher } 1575f7917c00SJeff Kirsher 1576f7917c00SJeff Kirsher /** 1577f7917c00SJeff Kirsher * cxgb4_ofld_send - send an offload packet 1578f7917c00SJeff Kirsher * @dev: the net device 1579f7917c00SJeff Kirsher * @skb: the packet 1580f7917c00SJeff Kirsher * 1581f7917c00SJeff Kirsher * Sends an offload packet. This is an exported version of @t4_ofld_send, 1582f7917c00SJeff Kirsher * intended for ULDs. 1583f7917c00SJeff Kirsher */ 1584f7917c00SJeff Kirsher int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb) 1585f7917c00SJeff Kirsher { 1586f7917c00SJeff Kirsher return t4_ofld_send(netdev2adap(dev), skb); 1587f7917c00SJeff Kirsher } 1588f7917c00SJeff Kirsher EXPORT_SYMBOL(cxgb4_ofld_send); 1589f7917c00SJeff Kirsher 1590e91b0f24SIan Campbell static inline void copy_frags(struct sk_buff *skb, 1591f7917c00SJeff Kirsher const struct pkt_gl *gl, unsigned int offset) 1592f7917c00SJeff Kirsher { 1593e91b0f24SIan Campbell int i; 1594f7917c00SJeff Kirsher 1595f7917c00SJeff Kirsher /* usually there's just one frag */ 1596e91b0f24SIan Campbell __skb_fill_page_desc(skb, 0, gl->frags[0].page, 1597e91b0f24SIan Campbell gl->frags[0].offset + offset, 1598e91b0f24SIan Campbell gl->frags[0].size - offset); 1599e91b0f24SIan Campbell skb_shinfo(skb)->nr_frags = gl->nfrags; 1600e91b0f24SIan Campbell for (i = 1; i < gl->nfrags; i++) 1601e91b0f24SIan Campbell __skb_fill_page_desc(skb, i, gl->frags[i].page, 1602e91b0f24SIan Campbell gl->frags[i].offset, 1603e91b0f24SIan Campbell gl->frags[i].size); 1604f7917c00SJeff Kirsher 1605f7917c00SJeff Kirsher /* get a reference to the last page, we don't own it */ 1606e91b0f24SIan Campbell get_page(gl->frags[gl->nfrags - 1].page); 1607f7917c00SJeff Kirsher } 1608f7917c00SJeff Kirsher 1609f7917c00SJeff Kirsher /** 1610f7917c00SJeff Kirsher * cxgb4_pktgl_to_skb - build an sk_buff from a packet gather list 1611f7917c00SJeff Kirsher * @gl: the gather list 1612f7917c00SJeff Kirsher * @skb_len: size of sk_buff main body if it carries fragments 1613f7917c00SJeff Kirsher * @pull_len: amount of data to move to the sk_buff's main body 1614f7917c00SJeff Kirsher * 1615f7917c00SJeff Kirsher * Builds an sk_buff from the given packet gather list. Returns the 1616f7917c00SJeff Kirsher * sk_buff or %NULL if sk_buff allocation failed. 1617f7917c00SJeff Kirsher */ 1618f7917c00SJeff Kirsher struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl, 1619f7917c00SJeff Kirsher unsigned int skb_len, unsigned int pull_len) 1620f7917c00SJeff Kirsher { 1621f7917c00SJeff Kirsher struct sk_buff *skb; 1622f7917c00SJeff Kirsher 1623f7917c00SJeff Kirsher /* 1624f7917c00SJeff Kirsher * Below we rely on RX_COPY_THRES being less than the smallest Rx buffer 1625f7917c00SJeff Kirsher * size, which is expected since buffers are at least PAGE_SIZEd. 1626f7917c00SJeff Kirsher * In this case packets up to RX_COPY_THRES have only one fragment. 1627f7917c00SJeff Kirsher */ 1628f7917c00SJeff Kirsher if (gl->tot_len <= RX_COPY_THRES) { 1629f7917c00SJeff Kirsher skb = dev_alloc_skb(gl->tot_len); 1630f7917c00SJeff Kirsher if (unlikely(!skb)) 1631f7917c00SJeff Kirsher goto out; 1632f7917c00SJeff Kirsher __skb_put(skb, gl->tot_len); 1633f7917c00SJeff Kirsher skb_copy_to_linear_data(skb, gl->va, gl->tot_len); 1634f7917c00SJeff Kirsher } else { 1635f7917c00SJeff Kirsher skb = dev_alloc_skb(skb_len); 1636f7917c00SJeff Kirsher if (unlikely(!skb)) 1637f7917c00SJeff Kirsher goto out; 1638f7917c00SJeff Kirsher __skb_put(skb, pull_len); 1639f7917c00SJeff Kirsher skb_copy_to_linear_data(skb, gl->va, pull_len); 1640f7917c00SJeff Kirsher 1641e91b0f24SIan Campbell copy_frags(skb, gl, pull_len); 1642f7917c00SJeff Kirsher skb->len = gl->tot_len; 1643f7917c00SJeff Kirsher skb->data_len = skb->len - pull_len; 1644f7917c00SJeff Kirsher skb->truesize += skb->data_len; 1645f7917c00SJeff Kirsher } 1646f7917c00SJeff Kirsher out: return skb; 1647f7917c00SJeff Kirsher } 1648f7917c00SJeff Kirsher EXPORT_SYMBOL(cxgb4_pktgl_to_skb); 1649f7917c00SJeff Kirsher 1650f7917c00SJeff Kirsher /** 1651f7917c00SJeff Kirsher * t4_pktgl_free - free a packet gather list 1652f7917c00SJeff Kirsher * @gl: the gather list 1653f7917c00SJeff Kirsher * 1654f7917c00SJeff Kirsher * Releases the pages of a packet gather list. We do not own the last 1655f7917c00SJeff Kirsher * page on the list and do not free it. 1656f7917c00SJeff Kirsher */ 1657f7917c00SJeff Kirsher static void t4_pktgl_free(const struct pkt_gl *gl) 1658f7917c00SJeff Kirsher { 1659f7917c00SJeff Kirsher int n; 1660e91b0f24SIan Campbell const struct page_frag *p; 1661f7917c00SJeff Kirsher 1662f7917c00SJeff Kirsher for (p = gl->frags, n = gl->nfrags - 1; n--; p++) 1663f7917c00SJeff Kirsher put_page(p->page); 1664f7917c00SJeff Kirsher } 1665f7917c00SJeff Kirsher 1666f7917c00SJeff Kirsher /* 1667f7917c00SJeff Kirsher * Process an MPS trace packet. Give it an unused protocol number so it won't 1668f7917c00SJeff Kirsher * be delivered to anyone and send it to the stack for capture. 1669f7917c00SJeff Kirsher */ 1670f7917c00SJeff Kirsher static noinline int handle_trace_pkt(struct adapter *adap, 1671f7917c00SJeff Kirsher const struct pkt_gl *gl) 1672f7917c00SJeff Kirsher { 1673f7917c00SJeff Kirsher struct sk_buff *skb; 1674f7917c00SJeff Kirsher 1675f7917c00SJeff Kirsher skb = cxgb4_pktgl_to_skb(gl, RX_PULL_LEN, RX_PULL_LEN); 1676f7917c00SJeff Kirsher if (unlikely(!skb)) { 1677f7917c00SJeff Kirsher t4_pktgl_free(gl); 1678f7917c00SJeff Kirsher return 0; 1679f7917c00SJeff Kirsher } 1680f7917c00SJeff Kirsher 1681d14807ddSHariprasad Shenai if (is_t4(adap->params.chip)) 16820a57a536SSantosh Rastapur __skb_pull(skb, sizeof(struct cpl_trace_pkt)); 16830a57a536SSantosh Rastapur else 16840a57a536SSantosh Rastapur __skb_pull(skb, sizeof(struct cpl_t5_trace_pkt)); 16850a57a536SSantosh Rastapur 1686f7917c00SJeff Kirsher skb_reset_mac_header(skb); 1687f7917c00SJeff Kirsher skb->protocol = htons(0xffff); 1688f7917c00SJeff Kirsher skb->dev = adap->port[0]; 1689f7917c00SJeff Kirsher netif_receive_skb(skb); 1690f7917c00SJeff Kirsher return 0; 1691f7917c00SJeff Kirsher } 1692f7917c00SJeff Kirsher 1693f7917c00SJeff Kirsher static void do_gro(struct sge_eth_rxq *rxq, const struct pkt_gl *gl, 1694f7917c00SJeff Kirsher const struct cpl_rx_pkt *pkt) 1695f7917c00SJeff Kirsher { 169652367a76SVipul Pandya struct adapter *adapter = rxq->rspq.adap; 169752367a76SVipul Pandya struct sge *s = &adapter->sge; 1698f7917c00SJeff Kirsher int ret; 1699f7917c00SJeff Kirsher struct sk_buff *skb; 1700f7917c00SJeff Kirsher 1701f7917c00SJeff Kirsher skb = napi_get_frags(&rxq->rspq.napi); 1702f7917c00SJeff Kirsher if (unlikely(!skb)) { 1703f7917c00SJeff Kirsher t4_pktgl_free(gl); 1704f7917c00SJeff Kirsher rxq->stats.rx_drops++; 1705f7917c00SJeff Kirsher return; 1706f7917c00SJeff Kirsher } 1707f7917c00SJeff Kirsher 170852367a76SVipul Pandya copy_frags(skb, gl, s->pktshift); 170952367a76SVipul Pandya skb->len = gl->tot_len - s->pktshift; 1710f7917c00SJeff Kirsher skb->data_len = skb->len; 1711f7917c00SJeff Kirsher skb->truesize += skb->data_len; 1712f7917c00SJeff Kirsher skb->ip_summed = CHECKSUM_UNNECESSARY; 1713f7917c00SJeff Kirsher skb_record_rx_queue(skb, rxq->rspq.idx); 1714f7917c00SJeff Kirsher if (rxq->rspq.netdev->features & NETIF_F_RXHASH) 17158264989cSTom Herbert skb_set_hash(skb, (__force u32)pkt->rsshdr.hash_val, 17168264989cSTom Herbert PKT_HASH_TYPE_L3); 1717f7917c00SJeff Kirsher 1718f7917c00SJeff Kirsher if (unlikely(pkt->vlan_ex)) { 171986a9bad3SPatrick McHardy __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ntohs(pkt->vlan)); 1720f7917c00SJeff Kirsher rxq->stats.vlan_ex++; 1721f7917c00SJeff Kirsher } 1722f7917c00SJeff Kirsher ret = napi_gro_frags(&rxq->rspq.napi); 1723f7917c00SJeff Kirsher if (ret == GRO_HELD) 1724f7917c00SJeff Kirsher rxq->stats.lro_pkts++; 1725f7917c00SJeff Kirsher else if (ret == GRO_MERGED || ret == GRO_MERGED_FREE) 1726f7917c00SJeff Kirsher rxq->stats.lro_merged++; 1727f7917c00SJeff Kirsher rxq->stats.pkts++; 1728f7917c00SJeff Kirsher rxq->stats.rx_cso++; 1729f7917c00SJeff Kirsher } 1730f7917c00SJeff Kirsher 1731f7917c00SJeff Kirsher /** 1732f7917c00SJeff Kirsher * t4_ethrx_handler - process an ingress ethernet packet 1733f7917c00SJeff Kirsher * @q: the response queue that received the packet 1734f7917c00SJeff Kirsher * @rsp: the response queue descriptor holding the RX_PKT message 1735f7917c00SJeff Kirsher * @si: the gather list of packet fragments 1736f7917c00SJeff Kirsher * 1737f7917c00SJeff Kirsher * Process an ingress ethernet packet and deliver it to the stack. 1738f7917c00SJeff Kirsher */ 1739f7917c00SJeff Kirsher int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp, 1740f7917c00SJeff Kirsher const struct pkt_gl *si) 1741f7917c00SJeff Kirsher { 1742f7917c00SJeff Kirsher bool csum_ok; 1743f7917c00SJeff Kirsher struct sk_buff *skb; 1744f7917c00SJeff Kirsher const struct cpl_rx_pkt *pkt; 1745f7917c00SJeff Kirsher struct sge_eth_rxq *rxq = container_of(q, struct sge_eth_rxq, rspq); 174652367a76SVipul Pandya struct sge *s = &q->adap->sge; 1747d14807ddSHariprasad Shenai int cpl_trace_pkt = is_t4(q->adap->params.chip) ? 17480a57a536SSantosh Rastapur CPL_TRACE_PKT : CPL_TRACE_PKT_T5; 1749f7917c00SJeff Kirsher 17500a57a536SSantosh Rastapur if (unlikely(*(u8 *)rsp == cpl_trace_pkt)) 1751f7917c00SJeff Kirsher return handle_trace_pkt(q->adap, si); 1752f7917c00SJeff Kirsher 1753f7917c00SJeff Kirsher pkt = (const struct cpl_rx_pkt *)rsp; 1754cca2822dSHariprasad Shenai csum_ok = pkt->csum_calc && !pkt->err_vec && 1755cca2822dSHariprasad Shenai (q->netdev->features & NETIF_F_RXCSUM); 1756f7917c00SJeff Kirsher if ((pkt->l2info & htonl(RXF_TCP)) && 1757f7917c00SJeff Kirsher (q->netdev->features & NETIF_F_GRO) && csum_ok && !pkt->ip_frag) { 1758f7917c00SJeff Kirsher do_gro(rxq, si, pkt); 1759f7917c00SJeff Kirsher return 0; 1760f7917c00SJeff Kirsher } 1761f7917c00SJeff Kirsher 1762f7917c00SJeff Kirsher skb = cxgb4_pktgl_to_skb(si, RX_PKT_SKB_LEN, RX_PULL_LEN); 1763f7917c00SJeff Kirsher if (unlikely(!skb)) { 1764f7917c00SJeff Kirsher t4_pktgl_free(si); 1765f7917c00SJeff Kirsher rxq->stats.rx_drops++; 1766f7917c00SJeff Kirsher return 0; 1767f7917c00SJeff Kirsher } 1768f7917c00SJeff Kirsher 176952367a76SVipul Pandya __skb_pull(skb, s->pktshift); /* remove ethernet header padding */ 1770f7917c00SJeff Kirsher skb->protocol = eth_type_trans(skb, q->netdev); 1771f7917c00SJeff Kirsher skb_record_rx_queue(skb, q->idx); 1772f7917c00SJeff Kirsher if (skb->dev->features & NETIF_F_RXHASH) 17738264989cSTom Herbert skb_set_hash(skb, (__force u32)pkt->rsshdr.hash_val, 17748264989cSTom Herbert PKT_HASH_TYPE_L3); 1775f7917c00SJeff Kirsher 1776f7917c00SJeff Kirsher rxq->stats.pkts++; 1777f7917c00SJeff Kirsher 1778cca2822dSHariprasad Shenai if (csum_ok && (pkt->l2info & htonl(RXF_UDP | RXF_TCP))) { 1779f7917c00SJeff Kirsher if (!pkt->ip_frag) { 1780f7917c00SJeff Kirsher skb->ip_summed = CHECKSUM_UNNECESSARY; 1781f7917c00SJeff Kirsher rxq->stats.rx_cso++; 1782f7917c00SJeff Kirsher } else if (pkt->l2info & htonl(RXF_IP)) { 1783f7917c00SJeff Kirsher __sum16 c = (__force __sum16)pkt->csum; 1784f7917c00SJeff Kirsher skb->csum = csum_unfold(c); 1785f7917c00SJeff Kirsher skb->ip_summed = CHECKSUM_COMPLETE; 1786f7917c00SJeff Kirsher rxq->stats.rx_cso++; 1787f7917c00SJeff Kirsher } 1788f7917c00SJeff Kirsher } else 1789f7917c00SJeff Kirsher skb_checksum_none_assert(skb); 1790f7917c00SJeff Kirsher 1791f7917c00SJeff Kirsher if (unlikely(pkt->vlan_ex)) { 179286a9bad3SPatrick McHardy __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ntohs(pkt->vlan)); 1793f7917c00SJeff Kirsher rxq->stats.vlan_ex++; 1794f7917c00SJeff Kirsher } 1795f7917c00SJeff Kirsher netif_receive_skb(skb); 1796f7917c00SJeff Kirsher return 0; 1797f7917c00SJeff Kirsher } 1798f7917c00SJeff Kirsher 1799f7917c00SJeff Kirsher /** 1800f7917c00SJeff Kirsher * restore_rx_bufs - put back a packet's Rx buffers 1801f7917c00SJeff Kirsher * @si: the packet gather list 1802f7917c00SJeff Kirsher * @q: the SGE free list 1803f7917c00SJeff Kirsher * @frags: number of FL buffers to restore 1804f7917c00SJeff Kirsher * 1805f7917c00SJeff Kirsher * Puts back on an FL the Rx buffers associated with @si. The buffers 1806f7917c00SJeff Kirsher * have already been unmapped and are left unmapped, we mark them so to 1807f7917c00SJeff Kirsher * prevent further unmapping attempts. 1808f7917c00SJeff Kirsher * 1809f7917c00SJeff Kirsher * This function undoes a series of @unmap_rx_buf calls when we find out 1810f7917c00SJeff Kirsher * that the current packet can't be processed right away afterall and we 1811f7917c00SJeff Kirsher * need to come back to it later. This is a very rare event and there's 1812f7917c00SJeff Kirsher * no effort to make this particularly efficient. 1813f7917c00SJeff Kirsher */ 1814f7917c00SJeff Kirsher static void restore_rx_bufs(const struct pkt_gl *si, struct sge_fl *q, 1815f7917c00SJeff Kirsher int frags) 1816f7917c00SJeff Kirsher { 1817f7917c00SJeff Kirsher struct rx_sw_desc *d; 1818f7917c00SJeff Kirsher 1819f7917c00SJeff Kirsher while (frags--) { 1820f7917c00SJeff Kirsher if (q->cidx == 0) 1821f7917c00SJeff Kirsher q->cidx = q->size - 1; 1822f7917c00SJeff Kirsher else 1823f7917c00SJeff Kirsher q->cidx--; 1824f7917c00SJeff Kirsher d = &q->sdesc[q->cidx]; 1825f7917c00SJeff Kirsher d->page = si->frags[frags].page; 1826f7917c00SJeff Kirsher d->dma_addr |= RX_UNMAPPED_BUF; 1827f7917c00SJeff Kirsher q->avail++; 1828f7917c00SJeff Kirsher } 1829f7917c00SJeff Kirsher } 1830f7917c00SJeff Kirsher 1831f7917c00SJeff Kirsher /** 1832f7917c00SJeff Kirsher * is_new_response - check if a response is newly written 1833f7917c00SJeff Kirsher * @r: the response descriptor 1834f7917c00SJeff Kirsher * @q: the response queue 1835f7917c00SJeff Kirsher * 1836f7917c00SJeff Kirsher * Returns true if a response descriptor contains a yet unprocessed 1837f7917c00SJeff Kirsher * response. 1838f7917c00SJeff Kirsher */ 1839f7917c00SJeff Kirsher static inline bool is_new_response(const struct rsp_ctrl *r, 1840f7917c00SJeff Kirsher const struct sge_rspq *q) 1841f7917c00SJeff Kirsher { 1842f7917c00SJeff Kirsher return RSPD_GEN(r->type_gen) == q->gen; 1843f7917c00SJeff Kirsher } 1844f7917c00SJeff Kirsher 1845f7917c00SJeff Kirsher /** 1846f7917c00SJeff Kirsher * rspq_next - advance to the next entry in a response queue 1847f7917c00SJeff Kirsher * @q: the queue 1848f7917c00SJeff Kirsher * 1849f7917c00SJeff Kirsher * Updates the state of a response queue to advance it to the next entry. 1850f7917c00SJeff Kirsher */ 1851f7917c00SJeff Kirsher static inline void rspq_next(struct sge_rspq *q) 1852f7917c00SJeff Kirsher { 1853f7917c00SJeff Kirsher q->cur_desc = (void *)q->cur_desc + q->iqe_len; 1854f7917c00SJeff Kirsher if (unlikely(++q->cidx == q->size)) { 1855f7917c00SJeff Kirsher q->cidx = 0; 1856f7917c00SJeff Kirsher q->gen ^= 1; 1857f7917c00SJeff Kirsher q->cur_desc = q->desc; 1858f7917c00SJeff Kirsher } 1859f7917c00SJeff Kirsher } 1860f7917c00SJeff Kirsher 1861f7917c00SJeff Kirsher /** 1862f7917c00SJeff Kirsher * process_responses - process responses from an SGE response queue 1863f7917c00SJeff Kirsher * @q: the ingress queue to process 1864f7917c00SJeff Kirsher * @budget: how many responses can be processed in this round 1865f7917c00SJeff Kirsher * 1866f7917c00SJeff Kirsher * Process responses from an SGE response queue up to the supplied budget. 1867f7917c00SJeff Kirsher * Responses include received packets as well as control messages from FW 1868f7917c00SJeff Kirsher * or HW. 1869f7917c00SJeff Kirsher * 1870f7917c00SJeff Kirsher * Additionally choose the interrupt holdoff time for the next interrupt 1871f7917c00SJeff Kirsher * on this queue. If the system is under memory shortage use a fairly 1872f7917c00SJeff Kirsher * long delay to help recovery. 1873f7917c00SJeff Kirsher */ 1874f7917c00SJeff Kirsher static int process_responses(struct sge_rspq *q, int budget) 1875f7917c00SJeff Kirsher { 1876f7917c00SJeff Kirsher int ret, rsp_type; 1877f7917c00SJeff Kirsher int budget_left = budget; 1878f7917c00SJeff Kirsher const struct rsp_ctrl *rc; 1879f7917c00SJeff Kirsher struct sge_eth_rxq *rxq = container_of(q, struct sge_eth_rxq, rspq); 188052367a76SVipul Pandya struct adapter *adapter = q->adap; 188152367a76SVipul Pandya struct sge *s = &adapter->sge; 1882f7917c00SJeff Kirsher 1883f7917c00SJeff Kirsher while (likely(budget_left)) { 1884f7917c00SJeff Kirsher rc = (void *)q->cur_desc + (q->iqe_len - sizeof(*rc)); 1885f7917c00SJeff Kirsher if (!is_new_response(rc, q)) 1886f7917c00SJeff Kirsher break; 1887f7917c00SJeff Kirsher 1888f7917c00SJeff Kirsher rmb(); 1889f7917c00SJeff Kirsher rsp_type = RSPD_TYPE(rc->type_gen); 1890f7917c00SJeff Kirsher if (likely(rsp_type == RSP_TYPE_FLBUF)) { 1891e91b0f24SIan Campbell struct page_frag *fp; 1892f7917c00SJeff Kirsher struct pkt_gl si; 1893f7917c00SJeff Kirsher const struct rx_sw_desc *rsd; 1894f7917c00SJeff Kirsher u32 len = ntohl(rc->pldbuflen_qid), bufsz, frags; 1895f7917c00SJeff Kirsher 1896f7917c00SJeff Kirsher if (len & RSPD_NEWBUF) { 1897f7917c00SJeff Kirsher if (likely(q->offset > 0)) { 1898f7917c00SJeff Kirsher free_rx_bufs(q->adap, &rxq->fl, 1); 1899f7917c00SJeff Kirsher q->offset = 0; 1900f7917c00SJeff Kirsher } 1901f7917c00SJeff Kirsher len = RSPD_LEN(len); 1902f7917c00SJeff Kirsher } 1903f7917c00SJeff Kirsher si.tot_len = len; 1904f7917c00SJeff Kirsher 1905f7917c00SJeff Kirsher /* gather packet fragments */ 1906f7917c00SJeff Kirsher for (frags = 0, fp = si.frags; ; frags++, fp++) { 1907f7917c00SJeff Kirsher rsd = &rxq->fl.sdesc[rxq->fl.cidx]; 190852367a76SVipul Pandya bufsz = get_buf_size(adapter, rsd); 1909f7917c00SJeff Kirsher fp->page = rsd->page; 1910e91b0f24SIan Campbell fp->offset = q->offset; 1911e91b0f24SIan Campbell fp->size = min(bufsz, len); 1912e91b0f24SIan Campbell len -= fp->size; 1913f7917c00SJeff Kirsher if (!len) 1914f7917c00SJeff Kirsher break; 1915f7917c00SJeff Kirsher unmap_rx_buf(q->adap, &rxq->fl); 1916f7917c00SJeff Kirsher } 1917f7917c00SJeff Kirsher 1918f7917c00SJeff Kirsher /* 1919f7917c00SJeff Kirsher * Last buffer remains mapped so explicitly make it 1920f7917c00SJeff Kirsher * coherent for CPU access. 1921f7917c00SJeff Kirsher */ 1922f7917c00SJeff Kirsher dma_sync_single_for_cpu(q->adap->pdev_dev, 1923f7917c00SJeff Kirsher get_buf_addr(rsd), 1924e91b0f24SIan Campbell fp->size, DMA_FROM_DEVICE); 1925f7917c00SJeff Kirsher 1926f7917c00SJeff Kirsher si.va = page_address(si.frags[0].page) + 1927e91b0f24SIan Campbell si.frags[0].offset; 1928f7917c00SJeff Kirsher prefetch(si.va); 1929f7917c00SJeff Kirsher 1930f7917c00SJeff Kirsher si.nfrags = frags + 1; 1931f7917c00SJeff Kirsher ret = q->handler(q, q->cur_desc, &si); 1932f7917c00SJeff Kirsher if (likely(ret == 0)) 193352367a76SVipul Pandya q->offset += ALIGN(fp->size, s->fl_align); 1934f7917c00SJeff Kirsher else 1935f7917c00SJeff Kirsher restore_rx_bufs(&si, &rxq->fl, frags); 1936f7917c00SJeff Kirsher } else if (likely(rsp_type == RSP_TYPE_CPL)) { 1937f7917c00SJeff Kirsher ret = q->handler(q, q->cur_desc, NULL); 1938f7917c00SJeff Kirsher } else { 1939f7917c00SJeff Kirsher ret = q->handler(q, (const __be64 *)rc, CXGB4_MSG_AN); 1940f7917c00SJeff Kirsher } 1941f7917c00SJeff Kirsher 1942f7917c00SJeff Kirsher if (unlikely(ret)) { 1943f7917c00SJeff Kirsher /* couldn't process descriptor, back off for recovery */ 1944f7917c00SJeff Kirsher q->next_intr_params = QINTR_TIMER_IDX(NOMEM_TMR_IDX); 1945f7917c00SJeff Kirsher break; 1946f7917c00SJeff Kirsher } 1947f7917c00SJeff Kirsher 1948f7917c00SJeff Kirsher rspq_next(q); 1949f7917c00SJeff Kirsher budget_left--; 1950f7917c00SJeff Kirsher } 1951f7917c00SJeff Kirsher 1952f7917c00SJeff Kirsher if (q->offset >= 0 && rxq->fl.size - rxq->fl.avail >= 16) 1953f7917c00SJeff Kirsher __refill_fl(q->adap, &rxq->fl); 1954f7917c00SJeff Kirsher return budget - budget_left; 1955f7917c00SJeff Kirsher } 1956f7917c00SJeff Kirsher 1957f7917c00SJeff Kirsher /** 1958f7917c00SJeff Kirsher * napi_rx_handler - the NAPI handler for Rx processing 1959f7917c00SJeff Kirsher * @napi: the napi instance 1960f7917c00SJeff Kirsher * @budget: how many packets we can process in this round 1961f7917c00SJeff Kirsher * 1962f7917c00SJeff Kirsher * Handler for new data events when using NAPI. This does not need any 1963f7917c00SJeff Kirsher * locking or protection from interrupts as data interrupts are off at 1964f7917c00SJeff Kirsher * this point and other adapter interrupts do not interfere (the latter 1965f7917c00SJeff Kirsher * in not a concern at all with MSI-X as non-data interrupts then have 1966f7917c00SJeff Kirsher * a separate handler). 1967f7917c00SJeff Kirsher */ 1968f7917c00SJeff Kirsher static int napi_rx_handler(struct napi_struct *napi, int budget) 1969f7917c00SJeff Kirsher { 1970f7917c00SJeff Kirsher unsigned int params; 1971f7917c00SJeff Kirsher struct sge_rspq *q = container_of(napi, struct sge_rspq, napi); 1972f7917c00SJeff Kirsher int work_done = process_responses(q, budget); 1973d63a6dcfSHariprasad Shenai u32 val; 1974f7917c00SJeff Kirsher 1975f7917c00SJeff Kirsher if (likely(work_done < budget)) { 1976e553ec3fSHariprasad Shenai int timer_index; 1977e553ec3fSHariprasad Shenai 1978f7917c00SJeff Kirsher napi_complete(napi); 1979e553ec3fSHariprasad Shenai timer_index = QINTR_TIMER_IDX_GET(q->next_intr_params); 1980e553ec3fSHariprasad Shenai 1981e553ec3fSHariprasad Shenai if (q->adaptive_rx) { 1982e553ec3fSHariprasad Shenai if (work_done > max(timer_pkt_quota[timer_index], 1983e553ec3fSHariprasad Shenai MIN_NAPI_WORK)) 1984e553ec3fSHariprasad Shenai timer_index = (timer_index + 1); 1985e553ec3fSHariprasad Shenai else 1986e553ec3fSHariprasad Shenai timer_index = timer_index - 1; 1987e553ec3fSHariprasad Shenai 1988e553ec3fSHariprasad Shenai timer_index = clamp(timer_index, 0, SGE_TIMERREGS - 1); 1989e553ec3fSHariprasad Shenai q->next_intr_params = QINTR_TIMER_IDX(timer_index) | 1990e553ec3fSHariprasad Shenai V_QINTR_CNT_EN; 1991e553ec3fSHariprasad Shenai params = q->next_intr_params; 1992e553ec3fSHariprasad Shenai } else { 1993f7917c00SJeff Kirsher params = q->next_intr_params; 1994f7917c00SJeff Kirsher q->next_intr_params = q->intr_params; 1995e553ec3fSHariprasad Shenai } 1996f7917c00SJeff Kirsher } else 1997f7917c00SJeff Kirsher params = QINTR_TIMER_IDX(7); 1998f7917c00SJeff Kirsher 1999d63a6dcfSHariprasad Shenai val = CIDXINC(work_done) | SEINTARM(params); 2000d63a6dcfSHariprasad Shenai if (is_t4(q->adap->params.chip)) { 2001d63a6dcfSHariprasad Shenai t4_write_reg(q->adap, MYPF_REG(SGE_PF_GTS), 2002d63a6dcfSHariprasad Shenai val | INGRESSQID((u32)q->cntxt_id)); 2003d63a6dcfSHariprasad Shenai } else { 2004d63a6dcfSHariprasad Shenai writel(val, q->adap->bar2 + q->udb + SGE_UDB_GTS); 2005d63a6dcfSHariprasad Shenai wmb(); 2006d63a6dcfSHariprasad Shenai } 2007f7917c00SJeff Kirsher return work_done; 2008f7917c00SJeff Kirsher } 2009f7917c00SJeff Kirsher 2010f7917c00SJeff Kirsher /* 2011f7917c00SJeff Kirsher * The MSI-X interrupt handler for an SGE response queue. 2012f7917c00SJeff Kirsher */ 2013f7917c00SJeff Kirsher irqreturn_t t4_sge_intr_msix(int irq, void *cookie) 2014f7917c00SJeff Kirsher { 2015f7917c00SJeff Kirsher struct sge_rspq *q = cookie; 2016f7917c00SJeff Kirsher 2017f7917c00SJeff Kirsher napi_schedule(&q->napi); 2018f7917c00SJeff Kirsher return IRQ_HANDLED; 2019f7917c00SJeff Kirsher } 2020f7917c00SJeff Kirsher 2021f7917c00SJeff Kirsher /* 2022f7917c00SJeff Kirsher * Process the indirect interrupt entries in the interrupt queue and kick off 2023f7917c00SJeff Kirsher * NAPI for each queue that has generated an entry. 2024f7917c00SJeff Kirsher */ 2025f7917c00SJeff Kirsher static unsigned int process_intrq(struct adapter *adap) 2026f7917c00SJeff Kirsher { 2027f7917c00SJeff Kirsher unsigned int credits; 2028f7917c00SJeff Kirsher const struct rsp_ctrl *rc; 2029f7917c00SJeff Kirsher struct sge_rspq *q = &adap->sge.intrq; 2030d63a6dcfSHariprasad Shenai u32 val; 2031f7917c00SJeff Kirsher 2032f7917c00SJeff Kirsher spin_lock(&adap->sge.intrq_lock); 2033f7917c00SJeff Kirsher for (credits = 0; ; credits++) { 2034f7917c00SJeff Kirsher rc = (void *)q->cur_desc + (q->iqe_len - sizeof(*rc)); 2035f7917c00SJeff Kirsher if (!is_new_response(rc, q)) 2036f7917c00SJeff Kirsher break; 2037f7917c00SJeff Kirsher 2038f7917c00SJeff Kirsher rmb(); 2039f7917c00SJeff Kirsher if (RSPD_TYPE(rc->type_gen) == RSP_TYPE_INTR) { 2040f7917c00SJeff Kirsher unsigned int qid = ntohl(rc->pldbuflen_qid); 2041f7917c00SJeff Kirsher 2042f7917c00SJeff Kirsher qid -= adap->sge.ingr_start; 2043f7917c00SJeff Kirsher napi_schedule(&adap->sge.ingr_map[qid]->napi); 2044f7917c00SJeff Kirsher } 2045f7917c00SJeff Kirsher 2046f7917c00SJeff Kirsher rspq_next(q); 2047f7917c00SJeff Kirsher } 2048f7917c00SJeff Kirsher 2049d63a6dcfSHariprasad Shenai val = CIDXINC(credits) | SEINTARM(q->intr_params); 2050d63a6dcfSHariprasad Shenai if (is_t4(adap->params.chip)) { 2051d63a6dcfSHariprasad Shenai t4_write_reg(adap, MYPF_REG(SGE_PF_GTS), 2052d63a6dcfSHariprasad Shenai val | INGRESSQID(q->cntxt_id)); 2053d63a6dcfSHariprasad Shenai } else { 2054d63a6dcfSHariprasad Shenai writel(val, adap->bar2 + q->udb + SGE_UDB_GTS); 2055d63a6dcfSHariprasad Shenai wmb(); 2056d63a6dcfSHariprasad Shenai } 2057f7917c00SJeff Kirsher spin_unlock(&adap->sge.intrq_lock); 2058f7917c00SJeff Kirsher return credits; 2059f7917c00SJeff Kirsher } 2060f7917c00SJeff Kirsher 2061f7917c00SJeff Kirsher /* 2062f7917c00SJeff Kirsher * The MSI interrupt handler, which handles data events from SGE response queues 2063f7917c00SJeff Kirsher * as well as error and other async events as they all use the same MSI vector. 2064f7917c00SJeff Kirsher */ 2065f7917c00SJeff Kirsher static irqreturn_t t4_intr_msi(int irq, void *cookie) 2066f7917c00SJeff Kirsher { 2067f7917c00SJeff Kirsher struct adapter *adap = cookie; 2068f7917c00SJeff Kirsher 2069f7917c00SJeff Kirsher t4_slow_intr_handler(adap); 2070f7917c00SJeff Kirsher process_intrq(adap); 2071f7917c00SJeff Kirsher return IRQ_HANDLED; 2072f7917c00SJeff Kirsher } 2073f7917c00SJeff Kirsher 2074f7917c00SJeff Kirsher /* 2075f7917c00SJeff Kirsher * Interrupt handler for legacy INTx interrupts. 2076f7917c00SJeff Kirsher * Handles data events from SGE response queues as well as error and other 2077f7917c00SJeff Kirsher * async events as they all use the same interrupt line. 2078f7917c00SJeff Kirsher */ 2079f7917c00SJeff Kirsher static irqreturn_t t4_intr_intx(int irq, void *cookie) 2080f7917c00SJeff Kirsher { 2081f7917c00SJeff Kirsher struct adapter *adap = cookie; 2082f7917c00SJeff Kirsher 2083f7917c00SJeff Kirsher t4_write_reg(adap, MYPF_REG(PCIE_PF_CLI), 0); 2084f7917c00SJeff Kirsher if (t4_slow_intr_handler(adap) | process_intrq(adap)) 2085f7917c00SJeff Kirsher return IRQ_HANDLED; 2086f7917c00SJeff Kirsher return IRQ_NONE; /* probably shared interrupt */ 2087f7917c00SJeff Kirsher } 2088f7917c00SJeff Kirsher 2089f7917c00SJeff Kirsher /** 2090f7917c00SJeff Kirsher * t4_intr_handler - select the top-level interrupt handler 2091f7917c00SJeff Kirsher * @adap: the adapter 2092f7917c00SJeff Kirsher * 2093f7917c00SJeff Kirsher * Selects the top-level interrupt handler based on the type of interrupts 2094f7917c00SJeff Kirsher * (MSI-X, MSI, or INTx). 2095f7917c00SJeff Kirsher */ 2096f7917c00SJeff Kirsher irq_handler_t t4_intr_handler(struct adapter *adap) 2097f7917c00SJeff Kirsher { 2098f7917c00SJeff Kirsher if (adap->flags & USING_MSIX) 2099f7917c00SJeff Kirsher return t4_sge_intr_msix; 2100f7917c00SJeff Kirsher if (adap->flags & USING_MSI) 2101f7917c00SJeff Kirsher return t4_intr_msi; 2102f7917c00SJeff Kirsher return t4_intr_intx; 2103f7917c00SJeff Kirsher } 2104f7917c00SJeff Kirsher 2105f7917c00SJeff Kirsher static void sge_rx_timer_cb(unsigned long data) 2106f7917c00SJeff Kirsher { 2107f7917c00SJeff Kirsher unsigned long m; 21080f4d201fSKumar Sanghvi unsigned int i, idma_same_state_cnt[2]; 2109f7917c00SJeff Kirsher struct adapter *adap = (struct adapter *)data; 2110f7917c00SJeff Kirsher struct sge *s = &adap->sge; 2111f7917c00SJeff Kirsher 2112f7917c00SJeff Kirsher for (i = 0; i < ARRAY_SIZE(s->starving_fl); i++) 2113f7917c00SJeff Kirsher for (m = s->starving_fl[i]; m; m &= m - 1) { 2114f7917c00SJeff Kirsher struct sge_eth_rxq *rxq; 2115f7917c00SJeff Kirsher unsigned int id = __ffs(m) + i * BITS_PER_LONG; 2116f7917c00SJeff Kirsher struct sge_fl *fl = s->egr_map[id]; 2117f7917c00SJeff Kirsher 2118f7917c00SJeff Kirsher clear_bit(id, s->starving_fl); 21194e857c58SPeter Zijlstra smp_mb__after_atomic(); 2120f7917c00SJeff Kirsher 2121f7917c00SJeff Kirsher if (fl_starving(fl)) { 2122f7917c00SJeff Kirsher rxq = container_of(fl, struct sge_eth_rxq, fl); 2123f7917c00SJeff Kirsher if (napi_reschedule(&rxq->rspq.napi)) 2124f7917c00SJeff Kirsher fl->starving++; 2125f7917c00SJeff Kirsher else 2126f7917c00SJeff Kirsher set_bit(id, s->starving_fl); 2127f7917c00SJeff Kirsher } 2128f7917c00SJeff Kirsher } 2129f7917c00SJeff Kirsher 2130f7917c00SJeff Kirsher t4_write_reg(adap, SGE_DEBUG_INDEX, 13); 21310f4d201fSKumar Sanghvi idma_same_state_cnt[0] = t4_read_reg(adap, SGE_DEBUG_DATA_HIGH); 21320f4d201fSKumar Sanghvi idma_same_state_cnt[1] = t4_read_reg(adap, SGE_DEBUG_DATA_LOW); 2133f7917c00SJeff Kirsher 21340f4d201fSKumar Sanghvi for (i = 0; i < 2; i++) { 21350f4d201fSKumar Sanghvi u32 debug0, debug11; 21360f4d201fSKumar Sanghvi 21370f4d201fSKumar Sanghvi /* If the Ingress DMA Same State Counter ("timer") is less 21380f4d201fSKumar Sanghvi * than 1s, then we can reset our synthesized Stall Timer and 21390f4d201fSKumar Sanghvi * continue. If we have previously emitted warnings about a 21400f4d201fSKumar Sanghvi * potential stalled Ingress Queue, issue a note indicating 21410f4d201fSKumar Sanghvi * that the Ingress Queue has resumed forward progress. 21420f4d201fSKumar Sanghvi */ 21430f4d201fSKumar Sanghvi if (idma_same_state_cnt[i] < s->idma_1s_thresh) { 21440f4d201fSKumar Sanghvi if (s->idma_stalled[i] >= SGE_IDMA_WARN_THRESH) 21450f4d201fSKumar Sanghvi CH_WARN(adap, "SGE idma%d, queue%u,resumed after %d sec\n", 21460f4d201fSKumar Sanghvi i, s->idma_qid[i], 21470f4d201fSKumar Sanghvi s->idma_stalled[i]/HZ); 21480f4d201fSKumar Sanghvi s->idma_stalled[i] = 0; 2149f7917c00SJeff Kirsher continue; 21500f4d201fSKumar Sanghvi } 21510f4d201fSKumar Sanghvi 21520f4d201fSKumar Sanghvi /* Synthesize an SGE Ingress DMA Same State Timer in the Hz 21530f4d201fSKumar Sanghvi * domain. The first time we get here it'll be because we 21540f4d201fSKumar Sanghvi * passed the 1s Threshold; each additional time it'll be 21550f4d201fSKumar Sanghvi * because the RX Timer Callback is being fired on its regular 21560f4d201fSKumar Sanghvi * schedule. 21570f4d201fSKumar Sanghvi * 21580f4d201fSKumar Sanghvi * If the stall is below our Potential Hung Ingress Queue 21590f4d201fSKumar Sanghvi * Warning Threshold, continue. 21600f4d201fSKumar Sanghvi */ 21610f4d201fSKumar Sanghvi if (s->idma_stalled[i] == 0) 21620f4d201fSKumar Sanghvi s->idma_stalled[i] = HZ; 21630f4d201fSKumar Sanghvi else 21640f4d201fSKumar Sanghvi s->idma_stalled[i] += RX_QCHECK_PERIOD; 21650f4d201fSKumar Sanghvi 21660f4d201fSKumar Sanghvi if (s->idma_stalled[i] < SGE_IDMA_WARN_THRESH) 21670f4d201fSKumar Sanghvi continue; 21680f4d201fSKumar Sanghvi 21690f4d201fSKumar Sanghvi /* We'll issue a warning every SGE_IDMA_WARN_REPEAT Hz */ 21700f4d201fSKumar Sanghvi if (((s->idma_stalled[i] - HZ) % SGE_IDMA_WARN_REPEAT) != 0) 21710f4d201fSKumar Sanghvi continue; 21720f4d201fSKumar Sanghvi 21730f4d201fSKumar Sanghvi /* Read and save the SGE IDMA State and Queue ID information. 21740f4d201fSKumar Sanghvi * We do this every time in case it changes across time ... 21750f4d201fSKumar Sanghvi */ 21760f4d201fSKumar Sanghvi t4_write_reg(adap, SGE_DEBUG_INDEX, 0); 21770f4d201fSKumar Sanghvi debug0 = t4_read_reg(adap, SGE_DEBUG_DATA_LOW); 21780f4d201fSKumar Sanghvi s->idma_state[i] = (debug0 >> (i * 9)) & 0x3f; 21790f4d201fSKumar Sanghvi 2180f7917c00SJeff Kirsher t4_write_reg(adap, SGE_DEBUG_INDEX, 11); 21810f4d201fSKumar Sanghvi debug11 = t4_read_reg(adap, SGE_DEBUG_DATA_LOW); 21820f4d201fSKumar Sanghvi s->idma_qid[i] = (debug11 >> (i * 16)) & 0xffff; 21830f4d201fSKumar Sanghvi 21840f4d201fSKumar Sanghvi CH_WARN(adap, "SGE idma%u, queue%u, maybe stuck state%u %dsecs (debug0=%#x, debug11=%#x)\n", 21850f4d201fSKumar Sanghvi i, s->idma_qid[i], s->idma_state[i], 21860f4d201fSKumar Sanghvi s->idma_stalled[i]/HZ, debug0, debug11); 21870f4d201fSKumar Sanghvi t4_sge_decode_idma_state(adap, s->idma_state[i]); 21880f4d201fSKumar Sanghvi } 2189f7917c00SJeff Kirsher 2190f7917c00SJeff Kirsher mod_timer(&s->rx_timer, jiffies + RX_QCHECK_PERIOD); 2191f7917c00SJeff Kirsher } 2192f7917c00SJeff Kirsher 2193f7917c00SJeff Kirsher static void sge_tx_timer_cb(unsigned long data) 2194f7917c00SJeff Kirsher { 2195f7917c00SJeff Kirsher unsigned long m; 2196f7917c00SJeff Kirsher unsigned int i, budget; 2197f7917c00SJeff Kirsher struct adapter *adap = (struct adapter *)data; 2198f7917c00SJeff Kirsher struct sge *s = &adap->sge; 2199f7917c00SJeff Kirsher 2200f7917c00SJeff Kirsher for (i = 0; i < ARRAY_SIZE(s->txq_maperr); i++) 2201f7917c00SJeff Kirsher for (m = s->txq_maperr[i]; m; m &= m - 1) { 2202f7917c00SJeff Kirsher unsigned long id = __ffs(m) + i * BITS_PER_LONG; 2203f7917c00SJeff Kirsher struct sge_ofld_txq *txq = s->egr_map[id]; 2204f7917c00SJeff Kirsher 2205f7917c00SJeff Kirsher clear_bit(id, s->txq_maperr); 2206f7917c00SJeff Kirsher tasklet_schedule(&txq->qresume_tsk); 2207f7917c00SJeff Kirsher } 2208f7917c00SJeff Kirsher 2209f7917c00SJeff Kirsher budget = MAX_TIMER_TX_RECLAIM; 2210f7917c00SJeff Kirsher i = s->ethtxq_rover; 2211f7917c00SJeff Kirsher do { 2212f7917c00SJeff Kirsher struct sge_eth_txq *q = &s->ethtxq[i]; 2213f7917c00SJeff Kirsher 2214f7917c00SJeff Kirsher if (q->q.in_use && 2215f7917c00SJeff Kirsher time_after_eq(jiffies, q->txq->trans_start + HZ / 100) && 2216f7917c00SJeff Kirsher __netif_tx_trylock(q->txq)) { 2217f7917c00SJeff Kirsher int avail = reclaimable(&q->q); 2218f7917c00SJeff Kirsher 2219f7917c00SJeff Kirsher if (avail) { 2220f7917c00SJeff Kirsher if (avail > budget) 2221f7917c00SJeff Kirsher avail = budget; 2222f7917c00SJeff Kirsher 2223f7917c00SJeff Kirsher free_tx_desc(adap, &q->q, avail, true); 2224f7917c00SJeff Kirsher q->q.in_use -= avail; 2225f7917c00SJeff Kirsher budget -= avail; 2226f7917c00SJeff Kirsher } 2227f7917c00SJeff Kirsher __netif_tx_unlock(q->txq); 2228f7917c00SJeff Kirsher } 2229f7917c00SJeff Kirsher 2230f7917c00SJeff Kirsher if (++i >= s->ethqsets) 2231f7917c00SJeff Kirsher i = 0; 2232f7917c00SJeff Kirsher } while (budget && i != s->ethtxq_rover); 2233f7917c00SJeff Kirsher s->ethtxq_rover = i; 2234f7917c00SJeff Kirsher mod_timer(&s->tx_timer, jiffies + (budget ? TX_QCHECK_PERIOD : 2)); 2235f7917c00SJeff Kirsher } 2236f7917c00SJeff Kirsher 2237d63a6dcfSHariprasad Shenai /** 2238d63a6dcfSHariprasad Shenai * udb_address - return the BAR2 User Doorbell address for a Queue 2239d63a6dcfSHariprasad Shenai * @adap: the adapter 2240d63a6dcfSHariprasad Shenai * @cntxt_id: the Queue Context ID 2241d63a6dcfSHariprasad Shenai * @qpp: Queues Per Page (for all PFs) 2242d63a6dcfSHariprasad Shenai * 2243d63a6dcfSHariprasad Shenai * Returns the BAR2 address of the user Doorbell associated with the 2244d63a6dcfSHariprasad Shenai * indicated Queue Context ID. Note that this is only applicable 2245d63a6dcfSHariprasad Shenai * for T5 and later. 2246d63a6dcfSHariprasad Shenai */ 2247d63a6dcfSHariprasad Shenai static u64 udb_address(struct adapter *adap, unsigned int cntxt_id, 2248d63a6dcfSHariprasad Shenai unsigned int qpp) 2249d63a6dcfSHariprasad Shenai { 2250d63a6dcfSHariprasad Shenai u64 udb; 2251d63a6dcfSHariprasad Shenai unsigned int s_qpp; 2252d63a6dcfSHariprasad Shenai unsigned short udb_density; 2253d63a6dcfSHariprasad Shenai unsigned long qpshift; 2254d63a6dcfSHariprasad Shenai int page; 2255d63a6dcfSHariprasad Shenai 2256d63a6dcfSHariprasad Shenai BUG_ON(is_t4(adap->params.chip)); 2257d63a6dcfSHariprasad Shenai 2258d63a6dcfSHariprasad Shenai s_qpp = (QUEUESPERPAGEPF0 + 2259d63a6dcfSHariprasad Shenai (QUEUESPERPAGEPF1 - QUEUESPERPAGEPF0) * adap->fn); 2260d63a6dcfSHariprasad Shenai udb_density = 1 << ((qpp >> s_qpp) & QUEUESPERPAGEPF0_MASK); 2261d63a6dcfSHariprasad Shenai qpshift = PAGE_SHIFT - ilog2(udb_density); 22629fef8478SDan Carpenter udb = (u64)cntxt_id << qpshift; 2263d63a6dcfSHariprasad Shenai udb &= PAGE_MASK; 2264d63a6dcfSHariprasad Shenai page = udb / PAGE_SIZE; 2265d63a6dcfSHariprasad Shenai udb += (cntxt_id - (page * udb_density)) * SGE_UDB_SIZE; 2266d63a6dcfSHariprasad Shenai 2267d63a6dcfSHariprasad Shenai return udb; 2268d63a6dcfSHariprasad Shenai } 2269d63a6dcfSHariprasad Shenai 2270d63a6dcfSHariprasad Shenai static u64 udb_address_eq(struct adapter *adap, unsigned int cntxt_id) 2271d63a6dcfSHariprasad Shenai { 2272d63a6dcfSHariprasad Shenai return udb_address(adap, cntxt_id, 2273d63a6dcfSHariprasad Shenai t4_read_reg(adap, SGE_EGRESS_QUEUES_PER_PAGE_PF)); 2274d63a6dcfSHariprasad Shenai } 2275d63a6dcfSHariprasad Shenai 2276d63a6dcfSHariprasad Shenai static u64 udb_address_iq(struct adapter *adap, unsigned int cntxt_id) 2277d63a6dcfSHariprasad Shenai { 2278d63a6dcfSHariprasad Shenai return udb_address(adap, cntxt_id, 2279d63a6dcfSHariprasad Shenai t4_read_reg(adap, SGE_INGRESS_QUEUES_PER_PAGE_PF)); 2280d63a6dcfSHariprasad Shenai } 2281d63a6dcfSHariprasad Shenai 2282f7917c00SJeff Kirsher int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, 2283f7917c00SJeff Kirsher struct net_device *dev, int intr_idx, 2284f7917c00SJeff Kirsher struct sge_fl *fl, rspq_handler_t hnd) 2285f7917c00SJeff Kirsher { 2286f7917c00SJeff Kirsher int ret, flsz = 0; 2287f7917c00SJeff Kirsher struct fw_iq_cmd c; 228852367a76SVipul Pandya struct sge *s = &adap->sge; 2289f7917c00SJeff Kirsher struct port_info *pi = netdev_priv(dev); 2290f7917c00SJeff Kirsher 2291f7917c00SJeff Kirsher /* Size needs to be multiple of 16, including status entry. */ 2292f7917c00SJeff Kirsher iq->size = roundup(iq->size, 16); 2293f7917c00SJeff Kirsher 2294f7917c00SJeff Kirsher iq->desc = alloc_ring(adap->pdev_dev, iq->size, iq->iqe_len, 0, 2295f7917c00SJeff Kirsher &iq->phys_addr, NULL, 0, NUMA_NO_NODE); 2296f7917c00SJeff Kirsher if (!iq->desc) 2297f7917c00SJeff Kirsher return -ENOMEM; 2298f7917c00SJeff Kirsher 2299f7917c00SJeff Kirsher memset(&c, 0, sizeof(c)); 2300e2ac9628SHariprasad Shenai c.op_to_vfn = htonl(FW_CMD_OP_V(FW_IQ_CMD) | FW_CMD_REQUEST_F | 2301e2ac9628SHariprasad Shenai FW_CMD_WRITE_F | FW_CMD_EXEC_F | 2302f7917c00SJeff Kirsher FW_IQ_CMD_PFN(adap->fn) | FW_IQ_CMD_VFN(0)); 2303f7917c00SJeff Kirsher c.alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | FW_IQ_CMD_IQSTART(1) | 2304f7917c00SJeff Kirsher FW_LEN16(c)); 2305f7917c00SJeff Kirsher c.type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) | 2306f7917c00SJeff Kirsher FW_IQ_CMD_IQASYNCH(fwevtq) | FW_IQ_CMD_VIID(pi->viid) | 2307f7917c00SJeff Kirsher FW_IQ_CMD_IQANDST(intr_idx < 0) | FW_IQ_CMD_IQANUD(1) | 2308f7917c00SJeff Kirsher FW_IQ_CMD_IQANDSTINDEX(intr_idx >= 0 ? intr_idx : 2309f7917c00SJeff Kirsher -intr_idx - 1)); 2310f7917c00SJeff Kirsher c.iqdroprss_to_iqesize = htons(FW_IQ_CMD_IQPCIECH(pi->tx_chan) | 2311f7917c00SJeff Kirsher FW_IQ_CMD_IQGTSMODE | 2312f7917c00SJeff Kirsher FW_IQ_CMD_IQINTCNTTHRESH(iq->pktcnt_idx) | 2313f7917c00SJeff Kirsher FW_IQ_CMD_IQESIZE(ilog2(iq->iqe_len) - 4)); 2314f7917c00SJeff Kirsher c.iqsize = htons(iq->size); 2315f7917c00SJeff Kirsher c.iqaddr = cpu_to_be64(iq->phys_addr); 2316f7917c00SJeff Kirsher 2317f7917c00SJeff Kirsher if (fl) { 2318f7917c00SJeff Kirsher fl->size = roundup(fl->size, 8); 2319f7917c00SJeff Kirsher fl->desc = alloc_ring(adap->pdev_dev, fl->size, sizeof(__be64), 2320f7917c00SJeff Kirsher sizeof(struct rx_sw_desc), &fl->addr, 232152367a76SVipul Pandya &fl->sdesc, s->stat_len, NUMA_NO_NODE); 2322f7917c00SJeff Kirsher if (!fl->desc) 2323f7917c00SJeff Kirsher goto fl_nomem; 2324f7917c00SJeff Kirsher 232552367a76SVipul Pandya flsz = fl->size / 8 + s->stat_len / sizeof(struct tx_desc); 2326ce91a923SNaresh Kumar Inna c.iqns_to_fl0congen = htonl(FW_IQ_CMD_FL0PACKEN(1) | 2327f7917c00SJeff Kirsher FW_IQ_CMD_FL0FETCHRO(1) | 2328f7917c00SJeff Kirsher FW_IQ_CMD_FL0DATARO(1) | 2329ce91a923SNaresh Kumar Inna FW_IQ_CMD_FL0PADEN(1)); 2330f7917c00SJeff Kirsher c.fl0dcaen_to_fl0cidxfthresh = htons(FW_IQ_CMD_FL0FBMIN(2) | 2331f7917c00SJeff Kirsher FW_IQ_CMD_FL0FBMAX(3)); 2332f7917c00SJeff Kirsher c.fl0size = htons(flsz); 2333f7917c00SJeff Kirsher c.fl0addr = cpu_to_be64(fl->addr); 2334f7917c00SJeff Kirsher } 2335f7917c00SJeff Kirsher 2336f7917c00SJeff Kirsher ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); 2337f7917c00SJeff Kirsher if (ret) 2338f7917c00SJeff Kirsher goto err; 2339f7917c00SJeff Kirsher 2340f7917c00SJeff Kirsher netif_napi_add(dev, &iq->napi, napi_rx_handler, 64); 2341f7917c00SJeff Kirsher iq->cur_desc = iq->desc; 2342f7917c00SJeff Kirsher iq->cidx = 0; 2343f7917c00SJeff Kirsher iq->gen = 1; 2344f7917c00SJeff Kirsher iq->next_intr_params = iq->intr_params; 2345f7917c00SJeff Kirsher iq->cntxt_id = ntohs(c.iqid); 2346f7917c00SJeff Kirsher iq->abs_id = ntohs(c.physiqid); 2347d63a6dcfSHariprasad Shenai if (!is_t4(adap->params.chip)) 2348d63a6dcfSHariprasad Shenai iq->udb = udb_address_iq(adap, iq->cntxt_id); 2349f7917c00SJeff Kirsher iq->size--; /* subtract status entry */ 2350f7917c00SJeff Kirsher iq->netdev = dev; 2351f7917c00SJeff Kirsher iq->handler = hnd; 2352f7917c00SJeff Kirsher 2353f7917c00SJeff Kirsher /* set offset to -1 to distinguish ingress queues without FL */ 2354f7917c00SJeff Kirsher iq->offset = fl ? 0 : -1; 2355f7917c00SJeff Kirsher 2356f7917c00SJeff Kirsher adap->sge.ingr_map[iq->cntxt_id - adap->sge.ingr_start] = iq; 2357f7917c00SJeff Kirsher 2358f7917c00SJeff Kirsher if (fl) { 2359f7917c00SJeff Kirsher fl->cntxt_id = ntohs(c.fl0id); 2360f7917c00SJeff Kirsher fl->avail = fl->pend_cred = 0; 2361f7917c00SJeff Kirsher fl->pidx = fl->cidx = 0; 2362f7917c00SJeff Kirsher fl->alloc_failed = fl->large_alloc_failed = fl->starving = 0; 2363f7917c00SJeff Kirsher adap->sge.egr_map[fl->cntxt_id - adap->sge.egr_start] = fl; 2364d63a6dcfSHariprasad Shenai 2365d63a6dcfSHariprasad Shenai /* Note, we must initialize the Free List User Doorbell 2366d63a6dcfSHariprasad Shenai * address before refilling the Free List! 2367d63a6dcfSHariprasad Shenai */ 2368d63a6dcfSHariprasad Shenai if (!is_t4(adap->params.chip)) 2369d63a6dcfSHariprasad Shenai fl->udb = udb_address_eq(adap, fl->cntxt_id); 2370f7917c00SJeff Kirsher refill_fl(adap, fl, fl_cap(fl), GFP_KERNEL); 2371f7917c00SJeff Kirsher } 2372f7917c00SJeff Kirsher return 0; 2373f7917c00SJeff Kirsher 2374f7917c00SJeff Kirsher fl_nomem: 2375f7917c00SJeff Kirsher ret = -ENOMEM; 2376f7917c00SJeff Kirsher err: 2377f7917c00SJeff Kirsher if (iq->desc) { 2378f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, iq->size * iq->iqe_len, 2379f7917c00SJeff Kirsher iq->desc, iq->phys_addr); 2380f7917c00SJeff Kirsher iq->desc = NULL; 2381f7917c00SJeff Kirsher } 2382f7917c00SJeff Kirsher if (fl && fl->desc) { 2383f7917c00SJeff Kirsher kfree(fl->sdesc); 2384f7917c00SJeff Kirsher fl->sdesc = NULL; 2385f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, flsz * sizeof(struct tx_desc), 2386f7917c00SJeff Kirsher fl->desc, fl->addr); 2387f7917c00SJeff Kirsher fl->desc = NULL; 2388f7917c00SJeff Kirsher } 2389f7917c00SJeff Kirsher return ret; 2390f7917c00SJeff Kirsher } 2391f7917c00SJeff Kirsher 2392f7917c00SJeff Kirsher static void init_txq(struct adapter *adap, struct sge_txq *q, unsigned int id) 2393f7917c00SJeff Kirsher { 239422adfe0aSSantosh Rastapur q->cntxt_id = id; 2395d63a6dcfSHariprasad Shenai if (!is_t4(adap->params.chip)) 2396d63a6dcfSHariprasad Shenai q->udb = udb_address_eq(adap, q->cntxt_id); 239722adfe0aSSantosh Rastapur 2398f7917c00SJeff Kirsher q->in_use = 0; 2399f7917c00SJeff Kirsher q->cidx = q->pidx = 0; 2400f7917c00SJeff Kirsher q->stops = q->restarts = 0; 2401f7917c00SJeff Kirsher q->stat = (void *)&q->desc[q->size]; 24023069ee9bSVipul Pandya spin_lock_init(&q->db_lock); 2403f7917c00SJeff Kirsher adap->sge.egr_map[id - adap->sge.egr_start] = q; 2404f7917c00SJeff Kirsher } 2405f7917c00SJeff Kirsher 2406f7917c00SJeff Kirsher int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, 2407f7917c00SJeff Kirsher struct net_device *dev, struct netdev_queue *netdevq, 2408f7917c00SJeff Kirsher unsigned int iqid) 2409f7917c00SJeff Kirsher { 2410f7917c00SJeff Kirsher int ret, nentries; 2411f7917c00SJeff Kirsher struct fw_eq_eth_cmd c; 241252367a76SVipul Pandya struct sge *s = &adap->sge; 2413f7917c00SJeff Kirsher struct port_info *pi = netdev_priv(dev); 2414f7917c00SJeff Kirsher 2415f7917c00SJeff Kirsher /* Add status entries */ 241652367a76SVipul Pandya nentries = txq->q.size + s->stat_len / sizeof(struct tx_desc); 2417f7917c00SJeff Kirsher 2418f7917c00SJeff Kirsher txq->q.desc = alloc_ring(adap->pdev_dev, txq->q.size, 2419f7917c00SJeff Kirsher sizeof(struct tx_desc), sizeof(struct tx_sw_desc), 242052367a76SVipul Pandya &txq->q.phys_addr, &txq->q.sdesc, s->stat_len, 2421f7917c00SJeff Kirsher netdev_queue_numa_node_read(netdevq)); 2422f7917c00SJeff Kirsher if (!txq->q.desc) 2423f7917c00SJeff Kirsher return -ENOMEM; 2424f7917c00SJeff Kirsher 2425f7917c00SJeff Kirsher memset(&c, 0, sizeof(c)); 2426e2ac9628SHariprasad Shenai c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_ETH_CMD) | FW_CMD_REQUEST_F | 2427e2ac9628SHariprasad Shenai FW_CMD_WRITE_F | FW_CMD_EXEC_F | 2428f7917c00SJeff Kirsher FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0)); 2429f7917c00SJeff Kirsher c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | 2430f7917c00SJeff Kirsher FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); 243108f1a1b9SHariprasad Shenai c.viid_pkd = htonl(FW_EQ_ETH_CMD_AUTOEQUEQE | 243208f1a1b9SHariprasad Shenai FW_EQ_ETH_CMD_VIID(pi->viid)); 2433f7917c00SJeff Kirsher c.fetchszm_to_iqid = htonl(FW_EQ_ETH_CMD_HOSTFCMODE(2) | 2434f7917c00SJeff Kirsher FW_EQ_ETH_CMD_PCIECHN(pi->tx_chan) | 2435f7917c00SJeff Kirsher FW_EQ_ETH_CMD_FETCHRO(1) | 2436f7917c00SJeff Kirsher FW_EQ_ETH_CMD_IQID(iqid)); 2437f7917c00SJeff Kirsher c.dcaen_to_eqsize = htonl(FW_EQ_ETH_CMD_FBMIN(2) | 2438f7917c00SJeff Kirsher FW_EQ_ETH_CMD_FBMAX(3) | 2439f7917c00SJeff Kirsher FW_EQ_ETH_CMD_CIDXFTHRESH(5) | 2440f7917c00SJeff Kirsher FW_EQ_ETH_CMD_EQSIZE(nentries)); 2441f7917c00SJeff Kirsher c.eqaddr = cpu_to_be64(txq->q.phys_addr); 2442f7917c00SJeff Kirsher 2443f7917c00SJeff Kirsher ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); 2444f7917c00SJeff Kirsher if (ret) { 2445f7917c00SJeff Kirsher kfree(txq->q.sdesc); 2446f7917c00SJeff Kirsher txq->q.sdesc = NULL; 2447f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, 2448f7917c00SJeff Kirsher nentries * sizeof(struct tx_desc), 2449f7917c00SJeff Kirsher txq->q.desc, txq->q.phys_addr); 2450f7917c00SJeff Kirsher txq->q.desc = NULL; 2451f7917c00SJeff Kirsher return ret; 2452f7917c00SJeff Kirsher } 2453f7917c00SJeff Kirsher 2454f7917c00SJeff Kirsher init_txq(adap, &txq->q, FW_EQ_ETH_CMD_EQID_GET(ntohl(c.eqid_pkd))); 2455f7917c00SJeff Kirsher txq->txq = netdevq; 2456f7917c00SJeff Kirsher txq->tso = txq->tx_cso = txq->vlan_ins = 0; 2457f7917c00SJeff Kirsher txq->mapping_err = 0; 2458f7917c00SJeff Kirsher return 0; 2459f7917c00SJeff Kirsher } 2460f7917c00SJeff Kirsher 2461f7917c00SJeff Kirsher int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq, 2462f7917c00SJeff Kirsher struct net_device *dev, unsigned int iqid, 2463f7917c00SJeff Kirsher unsigned int cmplqid) 2464f7917c00SJeff Kirsher { 2465f7917c00SJeff Kirsher int ret, nentries; 2466f7917c00SJeff Kirsher struct fw_eq_ctrl_cmd c; 246752367a76SVipul Pandya struct sge *s = &adap->sge; 2468f7917c00SJeff Kirsher struct port_info *pi = netdev_priv(dev); 2469f7917c00SJeff Kirsher 2470f7917c00SJeff Kirsher /* Add status entries */ 247152367a76SVipul Pandya nentries = txq->q.size + s->stat_len / sizeof(struct tx_desc); 2472f7917c00SJeff Kirsher 2473f7917c00SJeff Kirsher txq->q.desc = alloc_ring(adap->pdev_dev, nentries, 2474f7917c00SJeff Kirsher sizeof(struct tx_desc), 0, &txq->q.phys_addr, 2475f7917c00SJeff Kirsher NULL, 0, NUMA_NO_NODE); 2476f7917c00SJeff Kirsher if (!txq->q.desc) 2477f7917c00SJeff Kirsher return -ENOMEM; 2478f7917c00SJeff Kirsher 2479e2ac9628SHariprasad Shenai c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST_F | 2480e2ac9628SHariprasad Shenai FW_CMD_WRITE_F | FW_CMD_EXEC_F | 2481f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_PFN(adap->fn) | 2482f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_VFN(0)); 2483f7917c00SJeff Kirsher c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_ALLOC | 2484f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c)); 2485f7917c00SJeff Kirsher c.cmpliqid_eqid = htonl(FW_EQ_CTRL_CMD_CMPLIQID(cmplqid)); 2486f7917c00SJeff Kirsher c.physeqid_pkd = htonl(0); 2487f7917c00SJeff Kirsher c.fetchszm_to_iqid = htonl(FW_EQ_CTRL_CMD_HOSTFCMODE(2) | 2488f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_PCIECHN(pi->tx_chan) | 2489f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_FETCHRO | 2490f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_IQID(iqid)); 2491f7917c00SJeff Kirsher c.dcaen_to_eqsize = htonl(FW_EQ_CTRL_CMD_FBMIN(2) | 2492f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_FBMAX(3) | 2493f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_CIDXFTHRESH(5) | 2494f7917c00SJeff Kirsher FW_EQ_CTRL_CMD_EQSIZE(nentries)); 2495f7917c00SJeff Kirsher c.eqaddr = cpu_to_be64(txq->q.phys_addr); 2496f7917c00SJeff Kirsher 2497f7917c00SJeff Kirsher ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); 2498f7917c00SJeff Kirsher if (ret) { 2499f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, 2500f7917c00SJeff Kirsher nentries * sizeof(struct tx_desc), 2501f7917c00SJeff Kirsher txq->q.desc, txq->q.phys_addr); 2502f7917c00SJeff Kirsher txq->q.desc = NULL; 2503f7917c00SJeff Kirsher return ret; 2504f7917c00SJeff Kirsher } 2505f7917c00SJeff Kirsher 2506f7917c00SJeff Kirsher init_txq(adap, &txq->q, FW_EQ_CTRL_CMD_EQID_GET(ntohl(c.cmpliqid_eqid))); 2507f7917c00SJeff Kirsher txq->adap = adap; 2508f7917c00SJeff Kirsher skb_queue_head_init(&txq->sendq); 2509f7917c00SJeff Kirsher tasklet_init(&txq->qresume_tsk, restart_ctrlq, (unsigned long)txq); 2510f7917c00SJeff Kirsher txq->full = 0; 2511f7917c00SJeff Kirsher return 0; 2512f7917c00SJeff Kirsher } 2513f7917c00SJeff Kirsher 2514f7917c00SJeff Kirsher int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq, 2515f7917c00SJeff Kirsher struct net_device *dev, unsigned int iqid) 2516f7917c00SJeff Kirsher { 2517f7917c00SJeff Kirsher int ret, nentries; 2518f7917c00SJeff Kirsher struct fw_eq_ofld_cmd c; 251952367a76SVipul Pandya struct sge *s = &adap->sge; 2520f7917c00SJeff Kirsher struct port_info *pi = netdev_priv(dev); 2521f7917c00SJeff Kirsher 2522f7917c00SJeff Kirsher /* Add status entries */ 252352367a76SVipul Pandya nentries = txq->q.size + s->stat_len / sizeof(struct tx_desc); 2524f7917c00SJeff Kirsher 2525f7917c00SJeff Kirsher txq->q.desc = alloc_ring(adap->pdev_dev, txq->q.size, 2526f7917c00SJeff Kirsher sizeof(struct tx_desc), sizeof(struct tx_sw_desc), 252752367a76SVipul Pandya &txq->q.phys_addr, &txq->q.sdesc, s->stat_len, 2528f7917c00SJeff Kirsher NUMA_NO_NODE); 2529f7917c00SJeff Kirsher if (!txq->q.desc) 2530f7917c00SJeff Kirsher return -ENOMEM; 2531f7917c00SJeff Kirsher 2532f7917c00SJeff Kirsher memset(&c, 0, sizeof(c)); 2533e2ac9628SHariprasad Shenai c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST_F | 2534e2ac9628SHariprasad Shenai FW_CMD_WRITE_F | FW_CMD_EXEC_F | 2535f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_PFN(adap->fn) | 2536f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_VFN(0)); 2537f7917c00SJeff Kirsher c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | 2538f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c)); 2539f7917c00SJeff Kirsher c.fetchszm_to_iqid = htonl(FW_EQ_OFLD_CMD_HOSTFCMODE(2) | 2540f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_PCIECHN(pi->tx_chan) | 2541f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_FETCHRO(1) | 2542f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_IQID(iqid)); 2543f7917c00SJeff Kirsher c.dcaen_to_eqsize = htonl(FW_EQ_OFLD_CMD_FBMIN(2) | 2544f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_FBMAX(3) | 2545f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_CIDXFTHRESH(5) | 2546f7917c00SJeff Kirsher FW_EQ_OFLD_CMD_EQSIZE(nentries)); 2547f7917c00SJeff Kirsher c.eqaddr = cpu_to_be64(txq->q.phys_addr); 2548f7917c00SJeff Kirsher 2549f7917c00SJeff Kirsher ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); 2550f7917c00SJeff Kirsher if (ret) { 2551f7917c00SJeff Kirsher kfree(txq->q.sdesc); 2552f7917c00SJeff Kirsher txq->q.sdesc = NULL; 2553f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, 2554f7917c00SJeff Kirsher nentries * sizeof(struct tx_desc), 2555f7917c00SJeff Kirsher txq->q.desc, txq->q.phys_addr); 2556f7917c00SJeff Kirsher txq->q.desc = NULL; 2557f7917c00SJeff Kirsher return ret; 2558f7917c00SJeff Kirsher } 2559f7917c00SJeff Kirsher 2560f7917c00SJeff Kirsher init_txq(adap, &txq->q, FW_EQ_OFLD_CMD_EQID_GET(ntohl(c.eqid_pkd))); 2561f7917c00SJeff Kirsher txq->adap = adap; 2562f7917c00SJeff Kirsher skb_queue_head_init(&txq->sendq); 2563f7917c00SJeff Kirsher tasklet_init(&txq->qresume_tsk, restart_ofldq, (unsigned long)txq); 2564f7917c00SJeff Kirsher txq->full = 0; 2565f7917c00SJeff Kirsher txq->mapping_err = 0; 2566f7917c00SJeff Kirsher return 0; 2567f7917c00SJeff Kirsher } 2568f7917c00SJeff Kirsher 2569f7917c00SJeff Kirsher static void free_txq(struct adapter *adap, struct sge_txq *q) 2570f7917c00SJeff Kirsher { 257152367a76SVipul Pandya struct sge *s = &adap->sge; 257252367a76SVipul Pandya 2573f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, 257452367a76SVipul Pandya q->size * sizeof(struct tx_desc) + s->stat_len, 2575f7917c00SJeff Kirsher q->desc, q->phys_addr); 2576f7917c00SJeff Kirsher q->cntxt_id = 0; 2577f7917c00SJeff Kirsher q->sdesc = NULL; 2578f7917c00SJeff Kirsher q->desc = NULL; 2579f7917c00SJeff Kirsher } 2580f7917c00SJeff Kirsher 2581f7917c00SJeff Kirsher static void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, 2582f7917c00SJeff Kirsher struct sge_fl *fl) 2583f7917c00SJeff Kirsher { 258452367a76SVipul Pandya struct sge *s = &adap->sge; 2585f7917c00SJeff Kirsher unsigned int fl_id = fl ? fl->cntxt_id : 0xffff; 2586f7917c00SJeff Kirsher 2587f7917c00SJeff Kirsher adap->sge.ingr_map[rq->cntxt_id - adap->sge.ingr_start] = NULL; 2588f7917c00SJeff Kirsher t4_iq_free(adap, adap->fn, adap->fn, 0, FW_IQ_TYPE_FL_INT_CAP, 2589f7917c00SJeff Kirsher rq->cntxt_id, fl_id, 0xffff); 2590f7917c00SJeff Kirsher dma_free_coherent(adap->pdev_dev, (rq->size + 1) * rq->iqe_len, 2591f7917c00SJeff Kirsher rq->desc, rq->phys_addr); 2592f7917c00SJeff Kirsher netif_napi_del(&rq->napi); 2593f7917c00SJeff Kirsher rq->netdev = NULL; 2594f7917c00SJeff Kirsher rq->cntxt_id = rq->abs_id = 0; 2595f7917c00SJeff Kirsher rq->desc = NULL; 2596f7917c00SJeff Kirsher 2597f7917c00SJeff Kirsher if (fl) { 2598f7917c00SJeff Kirsher free_rx_bufs(adap, fl, fl->avail); 259952367a76SVipul Pandya dma_free_coherent(adap->pdev_dev, fl->size * 8 + s->stat_len, 2600f7917c00SJeff Kirsher fl->desc, fl->addr); 2601f7917c00SJeff Kirsher kfree(fl->sdesc); 2602f7917c00SJeff Kirsher fl->sdesc = NULL; 2603f7917c00SJeff Kirsher fl->cntxt_id = 0; 2604f7917c00SJeff Kirsher fl->desc = NULL; 2605f7917c00SJeff Kirsher } 2606f7917c00SJeff Kirsher } 2607f7917c00SJeff Kirsher 2608f7917c00SJeff Kirsher /** 26095fa76694SHariprasad Shenai * t4_free_ofld_rxqs - free a block of consecutive Rx queues 26105fa76694SHariprasad Shenai * @adap: the adapter 26115fa76694SHariprasad Shenai * @n: number of queues 26125fa76694SHariprasad Shenai * @q: pointer to first queue 26135fa76694SHariprasad Shenai * 26145fa76694SHariprasad Shenai * Release the resources of a consecutive block of offload Rx queues. 26155fa76694SHariprasad Shenai */ 26165fa76694SHariprasad Shenai void t4_free_ofld_rxqs(struct adapter *adap, int n, struct sge_ofld_rxq *q) 26175fa76694SHariprasad Shenai { 26185fa76694SHariprasad Shenai for ( ; n; n--, q++) 26195fa76694SHariprasad Shenai if (q->rspq.desc) 26205fa76694SHariprasad Shenai free_rspq_fl(adap, &q->rspq, 26215fa76694SHariprasad Shenai q->fl.size ? &q->fl : NULL); 26225fa76694SHariprasad Shenai } 26235fa76694SHariprasad Shenai 26245fa76694SHariprasad Shenai /** 2625f7917c00SJeff Kirsher * t4_free_sge_resources - free SGE resources 2626f7917c00SJeff Kirsher * @adap: the adapter 2627f7917c00SJeff Kirsher * 2628f7917c00SJeff Kirsher * Frees resources used by the SGE queue sets. 2629f7917c00SJeff Kirsher */ 2630f7917c00SJeff Kirsher void t4_free_sge_resources(struct adapter *adap) 2631f7917c00SJeff Kirsher { 2632f7917c00SJeff Kirsher int i; 2633f7917c00SJeff Kirsher struct sge_eth_rxq *eq = adap->sge.ethrxq; 2634f7917c00SJeff Kirsher struct sge_eth_txq *etq = adap->sge.ethtxq; 2635f7917c00SJeff Kirsher 2636f7917c00SJeff Kirsher /* clean up Ethernet Tx/Rx queues */ 2637f7917c00SJeff Kirsher for (i = 0; i < adap->sge.ethqsets; i++, eq++, etq++) { 2638f7917c00SJeff Kirsher if (eq->rspq.desc) 26395fa76694SHariprasad Shenai free_rspq_fl(adap, &eq->rspq, 26405fa76694SHariprasad Shenai eq->fl.size ? &eq->fl : NULL); 2641f7917c00SJeff Kirsher if (etq->q.desc) { 2642f7917c00SJeff Kirsher t4_eth_eq_free(adap, adap->fn, adap->fn, 0, 2643f7917c00SJeff Kirsher etq->q.cntxt_id); 2644f7917c00SJeff Kirsher free_tx_desc(adap, &etq->q, etq->q.in_use, true); 2645f7917c00SJeff Kirsher kfree(etq->q.sdesc); 2646f7917c00SJeff Kirsher free_txq(adap, &etq->q); 2647f7917c00SJeff Kirsher } 2648f7917c00SJeff Kirsher } 2649f7917c00SJeff Kirsher 2650f7917c00SJeff Kirsher /* clean up RDMA and iSCSI Rx queues */ 26515fa76694SHariprasad Shenai t4_free_ofld_rxqs(adap, adap->sge.ofldqsets, adap->sge.ofldrxq); 26525fa76694SHariprasad Shenai t4_free_ofld_rxqs(adap, adap->sge.rdmaqs, adap->sge.rdmarxq); 26535fa76694SHariprasad Shenai t4_free_ofld_rxqs(adap, adap->sge.rdmaciqs, adap->sge.rdmaciq); 2654f7917c00SJeff Kirsher 2655f7917c00SJeff Kirsher /* clean up offload Tx queues */ 2656f7917c00SJeff Kirsher for (i = 0; i < ARRAY_SIZE(adap->sge.ofldtxq); i++) { 2657f7917c00SJeff Kirsher struct sge_ofld_txq *q = &adap->sge.ofldtxq[i]; 2658f7917c00SJeff Kirsher 2659f7917c00SJeff Kirsher if (q->q.desc) { 2660f7917c00SJeff Kirsher tasklet_kill(&q->qresume_tsk); 2661f7917c00SJeff Kirsher t4_ofld_eq_free(adap, adap->fn, adap->fn, 0, 2662f7917c00SJeff Kirsher q->q.cntxt_id); 2663f7917c00SJeff Kirsher free_tx_desc(adap, &q->q, q->q.in_use, false); 2664f7917c00SJeff Kirsher kfree(q->q.sdesc); 2665f7917c00SJeff Kirsher __skb_queue_purge(&q->sendq); 2666f7917c00SJeff Kirsher free_txq(adap, &q->q); 2667f7917c00SJeff Kirsher } 2668f7917c00SJeff Kirsher } 2669f7917c00SJeff Kirsher 2670f7917c00SJeff Kirsher /* clean up control Tx queues */ 2671f7917c00SJeff Kirsher for (i = 0; i < ARRAY_SIZE(adap->sge.ctrlq); i++) { 2672f7917c00SJeff Kirsher struct sge_ctrl_txq *cq = &adap->sge.ctrlq[i]; 2673f7917c00SJeff Kirsher 2674f7917c00SJeff Kirsher if (cq->q.desc) { 2675f7917c00SJeff Kirsher tasklet_kill(&cq->qresume_tsk); 2676f7917c00SJeff Kirsher t4_ctrl_eq_free(adap, adap->fn, adap->fn, 0, 2677f7917c00SJeff Kirsher cq->q.cntxt_id); 2678f7917c00SJeff Kirsher __skb_queue_purge(&cq->sendq); 2679f7917c00SJeff Kirsher free_txq(adap, &cq->q); 2680f7917c00SJeff Kirsher } 2681f7917c00SJeff Kirsher } 2682f7917c00SJeff Kirsher 2683f7917c00SJeff Kirsher if (adap->sge.fw_evtq.desc) 2684f7917c00SJeff Kirsher free_rspq_fl(adap, &adap->sge.fw_evtq, NULL); 2685f7917c00SJeff Kirsher 2686f7917c00SJeff Kirsher if (adap->sge.intrq.desc) 2687f7917c00SJeff Kirsher free_rspq_fl(adap, &adap->sge.intrq, NULL); 2688f7917c00SJeff Kirsher 2689f7917c00SJeff Kirsher /* clear the reverse egress queue map */ 2690f7917c00SJeff Kirsher memset(adap->sge.egr_map, 0, sizeof(adap->sge.egr_map)); 2691f7917c00SJeff Kirsher } 2692f7917c00SJeff Kirsher 2693f7917c00SJeff Kirsher void t4_sge_start(struct adapter *adap) 2694f7917c00SJeff Kirsher { 2695f7917c00SJeff Kirsher adap->sge.ethtxq_rover = 0; 2696f7917c00SJeff Kirsher mod_timer(&adap->sge.rx_timer, jiffies + RX_QCHECK_PERIOD); 2697f7917c00SJeff Kirsher mod_timer(&adap->sge.tx_timer, jiffies + TX_QCHECK_PERIOD); 2698f7917c00SJeff Kirsher } 2699f7917c00SJeff Kirsher 2700f7917c00SJeff Kirsher /** 2701f7917c00SJeff Kirsher * t4_sge_stop - disable SGE operation 2702f7917c00SJeff Kirsher * @adap: the adapter 2703f7917c00SJeff Kirsher * 2704f7917c00SJeff Kirsher * Stop tasklets and timers associated with the DMA engine. Note that 2705f7917c00SJeff Kirsher * this is effective only if measures have been taken to disable any HW 2706f7917c00SJeff Kirsher * events that may restart them. 2707f7917c00SJeff Kirsher */ 2708f7917c00SJeff Kirsher void t4_sge_stop(struct adapter *adap) 2709f7917c00SJeff Kirsher { 2710f7917c00SJeff Kirsher int i; 2711f7917c00SJeff Kirsher struct sge *s = &adap->sge; 2712f7917c00SJeff Kirsher 2713f7917c00SJeff Kirsher if (in_interrupt()) /* actions below require waiting */ 2714f7917c00SJeff Kirsher return; 2715f7917c00SJeff Kirsher 2716f7917c00SJeff Kirsher if (s->rx_timer.function) 2717f7917c00SJeff Kirsher del_timer_sync(&s->rx_timer); 2718f7917c00SJeff Kirsher if (s->tx_timer.function) 2719f7917c00SJeff Kirsher del_timer_sync(&s->tx_timer); 2720f7917c00SJeff Kirsher 2721f7917c00SJeff Kirsher for (i = 0; i < ARRAY_SIZE(s->ofldtxq); i++) { 2722f7917c00SJeff Kirsher struct sge_ofld_txq *q = &s->ofldtxq[i]; 2723f7917c00SJeff Kirsher 2724f7917c00SJeff Kirsher if (q->q.desc) 2725f7917c00SJeff Kirsher tasklet_kill(&q->qresume_tsk); 2726f7917c00SJeff Kirsher } 2727f7917c00SJeff Kirsher for (i = 0; i < ARRAY_SIZE(s->ctrlq); i++) { 2728f7917c00SJeff Kirsher struct sge_ctrl_txq *cq = &s->ctrlq[i]; 2729f7917c00SJeff Kirsher 2730f7917c00SJeff Kirsher if (cq->q.desc) 2731f7917c00SJeff Kirsher tasklet_kill(&cq->qresume_tsk); 2732f7917c00SJeff Kirsher } 2733f7917c00SJeff Kirsher } 2734f7917c00SJeff Kirsher 2735f7917c00SJeff Kirsher /** 2736f7917c00SJeff Kirsher * t4_sge_init - initialize SGE 2737f7917c00SJeff Kirsher * @adap: the adapter 2738f7917c00SJeff Kirsher * 2739f7917c00SJeff Kirsher * Performs SGE initialization needed every time after a chip reset. 2740f7917c00SJeff Kirsher * We do not initialize any of the queues here, instead the driver 2741f7917c00SJeff Kirsher * top-level must request them individually. 274252367a76SVipul Pandya * 274352367a76SVipul Pandya * Called in two different modes: 274452367a76SVipul Pandya * 274552367a76SVipul Pandya * 1. Perform actual hardware initialization and record hard-coded 274652367a76SVipul Pandya * parameters which were used. This gets used when we're the 274752367a76SVipul Pandya * Master PF and the Firmware Configuration File support didn't 274852367a76SVipul Pandya * work for some reason. 274952367a76SVipul Pandya * 275052367a76SVipul Pandya * 2. We're not the Master PF or initialization was performed with 275152367a76SVipul Pandya * a Firmware Configuration File. In this case we need to grab 275252367a76SVipul Pandya * any of the SGE operating parameters that we need to have in 275352367a76SVipul Pandya * order to do our job and make sure we can live with them ... 2754f7917c00SJeff Kirsher */ 2755f7917c00SJeff Kirsher 275652367a76SVipul Pandya static int t4_sge_init_soft(struct adapter *adap) 275752367a76SVipul Pandya { 275852367a76SVipul Pandya struct sge *s = &adap->sge; 275952367a76SVipul Pandya u32 fl_small_pg, fl_large_pg, fl_small_mtu, fl_large_mtu; 276052367a76SVipul Pandya u32 timer_value_0_and_1, timer_value_2_and_3, timer_value_4_and_5; 276152367a76SVipul Pandya u32 ingress_rx_threshold; 276252367a76SVipul Pandya 276352367a76SVipul Pandya /* 276452367a76SVipul Pandya * Verify that CPL messages are going to the Ingress Queue for 276552367a76SVipul Pandya * process_responses() and that only packet data is going to the 276652367a76SVipul Pandya * Free Lists. 276752367a76SVipul Pandya */ 276852367a76SVipul Pandya if ((t4_read_reg(adap, SGE_CONTROL) & RXPKTCPLMODE_MASK) != 276952367a76SVipul Pandya RXPKTCPLMODE(X_RXPKTCPLMODE_SPLIT)) { 277052367a76SVipul Pandya dev_err(adap->pdev_dev, "bad SGE CPL MODE\n"); 277152367a76SVipul Pandya return -EINVAL; 277252367a76SVipul Pandya } 277352367a76SVipul Pandya 277452367a76SVipul Pandya /* 277552367a76SVipul Pandya * Validate the Host Buffer Register Array indices that we want to 277652367a76SVipul Pandya * use ... 277752367a76SVipul Pandya * 277852367a76SVipul Pandya * XXX Note that we should really read through the Host Buffer Size 277952367a76SVipul Pandya * XXX register array and find the indices of the Buffer Sizes which 278052367a76SVipul Pandya * XXX meet our needs! 278152367a76SVipul Pandya */ 278252367a76SVipul Pandya #define READ_FL_BUF(x) \ 278352367a76SVipul Pandya t4_read_reg(adap, SGE_FL_BUFFER_SIZE0+(x)*sizeof(u32)) 278452367a76SVipul Pandya 278552367a76SVipul Pandya fl_small_pg = READ_FL_BUF(RX_SMALL_PG_BUF); 278652367a76SVipul Pandya fl_large_pg = READ_FL_BUF(RX_LARGE_PG_BUF); 278752367a76SVipul Pandya fl_small_mtu = READ_FL_BUF(RX_SMALL_MTU_BUF); 278852367a76SVipul Pandya fl_large_mtu = READ_FL_BUF(RX_LARGE_MTU_BUF); 278952367a76SVipul Pandya 279092ddcc7bSKumar Sanghvi /* We only bother using the Large Page logic if the Large Page Buffer 279192ddcc7bSKumar Sanghvi * is larger than our Page Size Buffer. 279292ddcc7bSKumar Sanghvi */ 279392ddcc7bSKumar Sanghvi if (fl_large_pg <= fl_small_pg) 279492ddcc7bSKumar Sanghvi fl_large_pg = 0; 279592ddcc7bSKumar Sanghvi 279652367a76SVipul Pandya #undef READ_FL_BUF 279752367a76SVipul Pandya 279892ddcc7bSKumar Sanghvi /* The Page Size Buffer must be exactly equal to our Page Size and the 279992ddcc7bSKumar Sanghvi * Large Page Size Buffer should be 0 (per above) or a power of 2. 280092ddcc7bSKumar Sanghvi */ 280152367a76SVipul Pandya if (fl_small_pg != PAGE_SIZE || 280292ddcc7bSKumar Sanghvi (fl_large_pg & (fl_large_pg-1)) != 0) { 280352367a76SVipul Pandya dev_err(adap->pdev_dev, "bad SGE FL page buffer sizes [%d, %d]\n", 280452367a76SVipul Pandya fl_small_pg, fl_large_pg); 280552367a76SVipul Pandya return -EINVAL; 280652367a76SVipul Pandya } 280752367a76SVipul Pandya if (fl_large_pg) 280852367a76SVipul Pandya s->fl_pg_order = ilog2(fl_large_pg) - PAGE_SHIFT; 280952367a76SVipul Pandya 281052367a76SVipul Pandya if (fl_small_mtu < FL_MTU_SMALL_BUFSIZE(adap) || 281152367a76SVipul Pandya fl_large_mtu < FL_MTU_LARGE_BUFSIZE(adap)) { 281252367a76SVipul Pandya dev_err(adap->pdev_dev, "bad SGE FL MTU sizes [%d, %d]\n", 281352367a76SVipul Pandya fl_small_mtu, fl_large_mtu); 281452367a76SVipul Pandya return -EINVAL; 281552367a76SVipul Pandya } 281652367a76SVipul Pandya 281752367a76SVipul Pandya /* 281852367a76SVipul Pandya * Retrieve our RX interrupt holdoff timer values and counter 281952367a76SVipul Pandya * threshold values from the SGE parameters. 282052367a76SVipul Pandya */ 282152367a76SVipul Pandya timer_value_0_and_1 = t4_read_reg(adap, SGE_TIMER_VALUE_0_AND_1); 282252367a76SVipul Pandya timer_value_2_and_3 = t4_read_reg(adap, SGE_TIMER_VALUE_2_AND_3); 282352367a76SVipul Pandya timer_value_4_and_5 = t4_read_reg(adap, SGE_TIMER_VALUE_4_AND_5); 282452367a76SVipul Pandya s->timer_val[0] = core_ticks_to_us(adap, 282552367a76SVipul Pandya TIMERVALUE0_GET(timer_value_0_and_1)); 282652367a76SVipul Pandya s->timer_val[1] = core_ticks_to_us(adap, 282752367a76SVipul Pandya TIMERVALUE1_GET(timer_value_0_and_1)); 282852367a76SVipul Pandya s->timer_val[2] = core_ticks_to_us(adap, 282952367a76SVipul Pandya TIMERVALUE2_GET(timer_value_2_and_3)); 283052367a76SVipul Pandya s->timer_val[3] = core_ticks_to_us(adap, 283152367a76SVipul Pandya TIMERVALUE3_GET(timer_value_2_and_3)); 283252367a76SVipul Pandya s->timer_val[4] = core_ticks_to_us(adap, 283352367a76SVipul Pandya TIMERVALUE4_GET(timer_value_4_and_5)); 283452367a76SVipul Pandya s->timer_val[5] = core_ticks_to_us(adap, 283552367a76SVipul Pandya TIMERVALUE5_GET(timer_value_4_and_5)); 283652367a76SVipul Pandya 283752367a76SVipul Pandya ingress_rx_threshold = t4_read_reg(adap, SGE_INGRESS_RX_THRESHOLD); 283852367a76SVipul Pandya s->counter_val[0] = THRESHOLD_0_GET(ingress_rx_threshold); 283952367a76SVipul Pandya s->counter_val[1] = THRESHOLD_1_GET(ingress_rx_threshold); 284052367a76SVipul Pandya s->counter_val[2] = THRESHOLD_2_GET(ingress_rx_threshold); 284152367a76SVipul Pandya s->counter_val[3] = THRESHOLD_3_GET(ingress_rx_threshold); 284252367a76SVipul Pandya 284352367a76SVipul Pandya return 0; 284452367a76SVipul Pandya } 284552367a76SVipul Pandya 284652367a76SVipul Pandya static int t4_sge_init_hard(struct adapter *adap) 284752367a76SVipul Pandya { 284852367a76SVipul Pandya struct sge *s = &adap->sge; 284952367a76SVipul Pandya 285052367a76SVipul Pandya /* 285152367a76SVipul Pandya * Set up our basic SGE mode to deliver CPL messages to our Ingress 285252367a76SVipul Pandya * Queue and Packet Date to the Free List. 285352367a76SVipul Pandya */ 285452367a76SVipul Pandya t4_set_reg_field(adap, SGE_CONTROL, RXPKTCPLMODE_MASK, 285552367a76SVipul Pandya RXPKTCPLMODE_MASK); 2856f7917c00SJeff Kirsher 28573069ee9bSVipul Pandya /* 28583069ee9bSVipul Pandya * Set up to drop DOORBELL writes when the DOORBELL FIFO overflows 28593069ee9bSVipul Pandya * and generate an interrupt when this occurs so we can recover. 28603069ee9bSVipul Pandya */ 2861d14807ddSHariprasad Shenai if (is_t4(adap->params.chip)) { 2862881806bcSVipul Pandya t4_set_reg_field(adap, A_SGE_DBFIFO_STATUS, 28633069ee9bSVipul Pandya V_HP_INT_THRESH(M_HP_INT_THRESH) | 28643069ee9bSVipul Pandya V_LP_INT_THRESH(M_LP_INT_THRESH), 28653069ee9bSVipul Pandya V_HP_INT_THRESH(dbfifo_int_thresh) | 28663069ee9bSVipul Pandya V_LP_INT_THRESH(dbfifo_int_thresh)); 28670a57a536SSantosh Rastapur } else { 28680a57a536SSantosh Rastapur t4_set_reg_field(adap, A_SGE_DBFIFO_STATUS, 28690a57a536SSantosh Rastapur V_LP_INT_THRESH_T5(M_LP_INT_THRESH_T5), 28700a57a536SSantosh Rastapur V_LP_INT_THRESH_T5(dbfifo_int_thresh)); 28710a57a536SSantosh Rastapur t4_set_reg_field(adap, SGE_DBFIFO_STATUS2, 28720a57a536SSantosh Rastapur V_HP_INT_THRESH_T5(M_HP_INT_THRESH_T5), 28730a57a536SSantosh Rastapur V_HP_INT_THRESH_T5(dbfifo_int_thresh)); 28740a57a536SSantosh Rastapur } 2875881806bcSVipul Pandya t4_set_reg_field(adap, A_SGE_DOORBELL_CONTROL, F_ENABLE_DROP, 2876881806bcSVipul Pandya F_ENABLE_DROP); 2877881806bcSVipul Pandya 287852367a76SVipul Pandya /* 287952367a76SVipul Pandya * SGE_FL_BUFFER_SIZE0 (RX_SMALL_PG_BUF) is set up by 288052367a76SVipul Pandya * t4_fixup_host_params(). 288152367a76SVipul Pandya */ 288252367a76SVipul Pandya s->fl_pg_order = FL_PG_ORDER; 288352367a76SVipul Pandya if (s->fl_pg_order) 288452367a76SVipul Pandya t4_write_reg(adap, 288552367a76SVipul Pandya SGE_FL_BUFFER_SIZE0+RX_LARGE_PG_BUF*sizeof(u32), 288652367a76SVipul Pandya PAGE_SIZE << FL_PG_ORDER); 288752367a76SVipul Pandya t4_write_reg(adap, SGE_FL_BUFFER_SIZE0+RX_SMALL_MTU_BUF*sizeof(u32), 288852367a76SVipul Pandya FL_MTU_SMALL_BUFSIZE(adap)); 288952367a76SVipul Pandya t4_write_reg(adap, SGE_FL_BUFFER_SIZE0+RX_LARGE_MTU_BUF*sizeof(u32), 289052367a76SVipul Pandya FL_MTU_LARGE_BUFSIZE(adap)); 289152367a76SVipul Pandya 289252367a76SVipul Pandya /* 289352367a76SVipul Pandya * Note that the SGE Ingress Packet Count Interrupt Threshold and 289452367a76SVipul Pandya * Timer Holdoff values must be supplied by our caller. 289552367a76SVipul Pandya */ 2896f7917c00SJeff Kirsher t4_write_reg(adap, SGE_INGRESS_RX_THRESHOLD, 2897f7917c00SJeff Kirsher THRESHOLD_0(s->counter_val[0]) | 2898f7917c00SJeff Kirsher THRESHOLD_1(s->counter_val[1]) | 2899f7917c00SJeff Kirsher THRESHOLD_2(s->counter_val[2]) | 2900f7917c00SJeff Kirsher THRESHOLD_3(s->counter_val[3])); 2901f7917c00SJeff Kirsher t4_write_reg(adap, SGE_TIMER_VALUE_0_AND_1, 2902f7917c00SJeff Kirsher TIMERVALUE0(us_to_core_ticks(adap, s->timer_val[0])) | 2903f7917c00SJeff Kirsher TIMERVALUE1(us_to_core_ticks(adap, s->timer_val[1]))); 2904f7917c00SJeff Kirsher t4_write_reg(adap, SGE_TIMER_VALUE_2_AND_3, 290552367a76SVipul Pandya TIMERVALUE2(us_to_core_ticks(adap, s->timer_val[2])) | 290652367a76SVipul Pandya TIMERVALUE3(us_to_core_ticks(adap, s->timer_val[3]))); 2907f7917c00SJeff Kirsher t4_write_reg(adap, SGE_TIMER_VALUE_4_AND_5, 290852367a76SVipul Pandya TIMERVALUE4(us_to_core_ticks(adap, s->timer_val[4])) | 290952367a76SVipul Pandya TIMERVALUE5(us_to_core_ticks(adap, s->timer_val[5]))); 291052367a76SVipul Pandya 291152367a76SVipul Pandya return 0; 291252367a76SVipul Pandya } 291352367a76SVipul Pandya 291452367a76SVipul Pandya int t4_sge_init(struct adapter *adap) 291552367a76SVipul Pandya { 291652367a76SVipul Pandya struct sge *s = &adap->sge; 2917c2b955e0SKumar Sanghvi u32 sge_control, sge_conm_ctrl; 2918c2b955e0SKumar Sanghvi int ret, egress_threshold; 291952367a76SVipul Pandya 292052367a76SVipul Pandya /* 292152367a76SVipul Pandya * Ingress Padding Boundary and Egress Status Page Size are set up by 292252367a76SVipul Pandya * t4_fixup_host_params(). 292352367a76SVipul Pandya */ 292452367a76SVipul Pandya sge_control = t4_read_reg(adap, SGE_CONTROL); 292552367a76SVipul Pandya s->pktshift = PKTSHIFT_GET(sge_control); 292652367a76SVipul Pandya s->stat_len = (sge_control & EGRSTATUSPAGESIZE_MASK) ? 128 : 64; 292752367a76SVipul Pandya s->fl_align = 1 << (INGPADBOUNDARY_GET(sge_control) + 292852367a76SVipul Pandya X_INGPADBOUNDARY_SHIFT); 292952367a76SVipul Pandya 293052367a76SVipul Pandya if (adap->flags & USING_SOFT_PARAMS) 293152367a76SVipul Pandya ret = t4_sge_init_soft(adap); 293252367a76SVipul Pandya else 293352367a76SVipul Pandya ret = t4_sge_init_hard(adap); 293452367a76SVipul Pandya if (ret < 0) 293552367a76SVipul Pandya return ret; 293652367a76SVipul Pandya 293752367a76SVipul Pandya /* 293852367a76SVipul Pandya * A FL with <= fl_starve_thres buffers is starving and a periodic 293952367a76SVipul Pandya * timer will attempt to refill it. This needs to be larger than the 294052367a76SVipul Pandya * SGE's Egress Congestion Threshold. If it isn't, then we can get 294152367a76SVipul Pandya * stuck waiting for new packets while the SGE is waiting for us to 294252367a76SVipul Pandya * give it more Free List entries. (Note that the SGE's Egress 2943c2b955e0SKumar Sanghvi * Congestion Threshold is in units of 2 Free List pointers.) For T4, 2944c2b955e0SKumar Sanghvi * there was only a single field to control this. For T5 there's the 2945c2b955e0SKumar Sanghvi * original field which now only applies to Unpacked Mode Free List 2946c2b955e0SKumar Sanghvi * buffers and a new field which only applies to Packed Mode Free List 2947c2b955e0SKumar Sanghvi * buffers. 294852367a76SVipul Pandya */ 2949c2b955e0SKumar Sanghvi sge_conm_ctrl = t4_read_reg(adap, SGE_CONM_CTRL); 2950c2b955e0SKumar Sanghvi if (is_t4(adap->params.chip)) 2951c2b955e0SKumar Sanghvi egress_threshold = EGRTHRESHOLD_GET(sge_conm_ctrl); 2952c2b955e0SKumar Sanghvi else 2953c2b955e0SKumar Sanghvi egress_threshold = EGRTHRESHOLDPACKING_GET(sge_conm_ctrl); 2954c2b955e0SKumar Sanghvi s->fl_starve_thres = 2*egress_threshold + 1; 295552367a76SVipul Pandya 2956f7917c00SJeff Kirsher setup_timer(&s->rx_timer, sge_rx_timer_cb, (unsigned long)adap); 2957f7917c00SJeff Kirsher setup_timer(&s->tx_timer, sge_tx_timer_cb, (unsigned long)adap); 29580f4d201fSKumar Sanghvi s->idma_1s_thresh = core_ticks_per_usec(adap) * 1000000; /* 1 s */ 29590f4d201fSKumar Sanghvi s->idma_stalled[0] = 0; 29600f4d201fSKumar Sanghvi s->idma_stalled[1] = 0; 2961f7917c00SJeff Kirsher spin_lock_init(&s->intrq_lock); 296252367a76SVipul Pandya 296352367a76SVipul Pandya return 0; 2964f7917c00SJeff Kirsher } 2965