1 /* 2 * This file is part of the Chelsio T4 Ethernet driver for Linux. 3 * 4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef __CXGB4_ULD_H 36 #define __CXGB4_ULD_H 37 38 #include <linux/cache.h> 39 #include <linux/spinlock.h> 40 #include <linux/skbuff.h> 41 #include <linux/inetdevice.h> 42 #include <linux/atomic.h> 43 #include "cxgb4.h" 44 45 #define MAX_ULD_QSETS 16 46 47 /* CPL message priority levels */ 48 enum { 49 CPL_PRIORITY_DATA = 0, /* data messages */ 50 CPL_PRIORITY_SETUP = 1, /* connection setup messages */ 51 CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */ 52 CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */ 53 CPL_PRIORITY_ACK = 1, /* RX ACK messages */ 54 CPL_PRIORITY_CONTROL = 1 /* control messages */ 55 }; 56 57 #define INIT_TP_WR(w, tid) do { \ 58 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \ 59 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \ 60 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \ 61 FW_WR_FLOWID_V(tid)); \ 62 (w)->wr.wr_lo = cpu_to_be64(0); \ 63 } while (0) 64 65 #define INIT_TP_WR_CPL(w, cpl, tid) do { \ 66 INIT_TP_WR(w, tid); \ 67 OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \ 68 } while (0) 69 70 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \ 71 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \ 72 FW_WR_ATOMIC_V(atomic)); \ 73 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \ 74 FW_WR_FLOWID_V(tid)); \ 75 (w)->wr.wr_lo = cpu_to_be64(0); \ 76 } while (0) 77 78 /* Special asynchronous notification message */ 79 #define CXGB4_MSG_AN ((void *)1) 80 #define TX_ULD(uld)(((uld) != CXGB4_ULD_CRYPTO) ? CXGB4_TX_OFLD :\ 81 CXGB4_TX_CRYPTO) 82 83 struct serv_entry { 84 void *data; 85 }; 86 87 union aopen_entry { 88 void *data; 89 union aopen_entry *next; 90 }; 91 92 struct eotid_entry { 93 void *data; 94 }; 95 96 /* 97 * Holds the size, base address, free list start, etc of the TID, server TID, 98 * and active-open TID tables. The tables themselves are allocated dynamically. 99 */ 100 struct tid_info { 101 void **tid_tab; 102 unsigned int tid_base; 103 unsigned int ntids; 104 105 struct serv_entry *stid_tab; 106 unsigned long *stid_bmap; 107 unsigned int nstids; 108 unsigned int stid_base; 109 unsigned int hash_base; 110 111 union aopen_entry *atid_tab; 112 unsigned int natids; 113 unsigned int atid_base; 114 115 struct filter_entry *hpftid_tab; 116 unsigned long *hpftid_bmap; 117 unsigned int nhpftids; 118 unsigned int hpftid_base; 119 120 struct filter_entry *ftid_tab; 121 unsigned long *ftid_bmap; 122 unsigned int nftids; 123 unsigned int ftid_base; 124 unsigned int aftid_base; 125 unsigned int aftid_end; 126 /* Server filter region */ 127 unsigned int sftid_base; 128 unsigned int nsftids; 129 130 spinlock_t atid_lock ____cacheline_aligned_in_smp; 131 union aopen_entry *afree; 132 unsigned int atids_in_use; 133 134 spinlock_t stid_lock; 135 unsigned int stids_in_use; 136 unsigned int v6_stids_in_use; 137 unsigned int sftids_in_use; 138 139 /* ETHOFLD range */ 140 struct eotid_entry *eotid_tab; 141 unsigned long *eotid_bmap; 142 unsigned int eotid_base; 143 unsigned int neotids; 144 145 /* TIDs in the TCAM */ 146 atomic_t tids_in_use; 147 /* TIDs in the HASH */ 148 atomic_t hash_tids_in_use; 149 atomic_t conns_in_use; 150 /* lock for setting/clearing filter bitmap */ 151 spinlock_t ftid_lock; 152 153 unsigned int tc_hash_tids_max_prio; 154 }; 155 156 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid) 157 { 158 tid -= t->tid_base; 159 return tid < t->ntids ? t->tid_tab[tid] : NULL; 160 } 161 162 static inline bool tid_out_of_range(const struct tid_info *t, unsigned int tid) 163 { 164 return ((tid - t->tid_base) >= t->ntids); 165 } 166 167 static inline void *lookup_atid(const struct tid_info *t, unsigned int atid) 168 { 169 return atid < t->natids ? t->atid_tab[atid].data : NULL; 170 } 171 172 static inline void *lookup_stid(const struct tid_info *t, unsigned int stid) 173 { 174 /* Is it a server filter TID? */ 175 if (t->nsftids && (stid >= t->sftid_base)) { 176 stid -= t->sftid_base; 177 stid += t->nstids; 178 } else { 179 stid -= t->stid_base; 180 } 181 182 return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL; 183 } 184 185 static inline void cxgb4_insert_tid(struct tid_info *t, void *data, 186 unsigned int tid, unsigned short family) 187 { 188 t->tid_tab[tid - t->tid_base] = data; 189 if (t->hash_base && (tid >= t->hash_base)) { 190 if (family == AF_INET6) 191 atomic_add(2, &t->hash_tids_in_use); 192 else 193 atomic_inc(&t->hash_tids_in_use); 194 } else { 195 if (family == AF_INET6) 196 atomic_add(2, &t->tids_in_use); 197 else 198 atomic_inc(&t->tids_in_use); 199 } 200 atomic_inc(&t->conns_in_use); 201 } 202 203 static inline struct eotid_entry *cxgb4_lookup_eotid(struct tid_info *t, 204 u32 eotid) 205 { 206 return eotid < t->neotids ? &t->eotid_tab[eotid] : NULL; 207 } 208 209 static inline int cxgb4_get_free_eotid(struct tid_info *t) 210 { 211 int eotid; 212 213 eotid = find_first_zero_bit(t->eotid_bmap, t->neotids); 214 if (eotid >= t->neotids) 215 eotid = -1; 216 217 return eotid; 218 } 219 220 static inline void cxgb4_alloc_eotid(struct tid_info *t, u32 eotid, void *data) 221 { 222 set_bit(eotid, t->eotid_bmap); 223 t->eotid_tab[eotid].data = data; 224 } 225 226 static inline void cxgb4_free_eotid(struct tid_info *t, u32 eotid) 227 { 228 clear_bit(eotid, t->eotid_bmap); 229 t->eotid_tab[eotid].data = NULL; 230 } 231 232 int cxgb4_alloc_atid(struct tid_info *t, void *data); 233 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data); 234 int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data); 235 void cxgb4_free_atid(struct tid_info *t, unsigned int atid); 236 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family); 237 void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid, 238 unsigned short family); 239 struct in6_addr; 240 241 int cxgb4_create_server(const struct net_device *dev, unsigned int stid, 242 __be32 sip, __be16 sport, __be16 vlan, 243 unsigned int queue); 244 int cxgb4_create_server6(const struct net_device *dev, unsigned int stid, 245 const struct in6_addr *sip, __be16 sport, 246 unsigned int queue); 247 int cxgb4_remove_server(const struct net_device *dev, unsigned int stid, 248 unsigned int queue, bool ipv6); 249 int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid, 250 __be32 sip, __be16 sport, __be16 vlan, 251 unsigned int queue, 252 unsigned char port, unsigned char mask); 253 int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid, 254 unsigned int queue, bool ipv6); 255 256 /* Filter operation context to allow callers of cxgb4_set_filter() and 257 * cxgb4_del_filter() to wait for an asynchronous completion. 258 */ 259 struct filter_ctx { 260 struct completion completion; /* completion rendezvous */ 261 void *closure; /* caller's opaque information */ 262 int result; /* result of operation */ 263 u32 tid; /* to store tid */ 264 }; 265 266 struct ch_filter_specification; 267 268 int cxgb4_get_free_ftid(struct net_device *dev, u8 family, bool hash_en, 269 u32 tc_prio); 270 int __cxgb4_set_filter(struct net_device *dev, int filter_id, 271 struct ch_filter_specification *fs, 272 struct filter_ctx *ctx); 273 int __cxgb4_del_filter(struct net_device *dev, int filter_id, 274 struct ch_filter_specification *fs, 275 struct filter_ctx *ctx); 276 int cxgb4_set_filter(struct net_device *dev, int filter_id, 277 struct ch_filter_specification *fs); 278 int cxgb4_del_filter(struct net_device *dev, int filter_id, 279 struct ch_filter_specification *fs); 280 int cxgb4_get_filter_counters(struct net_device *dev, unsigned int fidx, 281 u64 *hitcnt, u64 *bytecnt, bool hash); 282 283 static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue) 284 { 285 skb_set_queue_mapping(skb, (queue << 1) | prio); 286 } 287 288 enum cxgb4_uld { 289 CXGB4_ULD_INIT, 290 CXGB4_ULD_RDMA, 291 CXGB4_ULD_ISCSI, 292 CXGB4_ULD_ISCSIT, 293 CXGB4_ULD_CRYPTO, 294 CXGB4_ULD_TLS, 295 CXGB4_ULD_MAX 296 }; 297 298 enum cxgb4_tx_uld { 299 CXGB4_TX_OFLD, 300 CXGB4_TX_CRYPTO, 301 CXGB4_TX_MAX 302 }; 303 304 enum cxgb4_txq_type { 305 CXGB4_TXQ_ETH, 306 CXGB4_TXQ_ULD, 307 CXGB4_TXQ_CTRL, 308 CXGB4_TXQ_MAX 309 }; 310 311 enum cxgb4_state { 312 CXGB4_STATE_UP, 313 CXGB4_STATE_START_RECOVERY, 314 CXGB4_STATE_DOWN, 315 CXGB4_STATE_DETACH, 316 CXGB4_STATE_FATAL_ERROR 317 }; 318 319 enum cxgb4_control { 320 CXGB4_CONTROL_DB_FULL, 321 CXGB4_CONTROL_DB_EMPTY, 322 CXGB4_CONTROL_DB_DROP, 323 }; 324 325 struct pci_dev; 326 struct l2t_data; 327 struct net_device; 328 struct pkt_gl; 329 struct tp_tcp_stats; 330 struct t4_lro_mgr; 331 332 struct cxgb4_range { 333 unsigned int start; 334 unsigned int size; 335 }; 336 337 struct cxgb4_virt_res { /* virtualized HW resources */ 338 struct cxgb4_range ddp; 339 struct cxgb4_range iscsi; 340 struct cxgb4_range stag; 341 struct cxgb4_range rq; 342 struct cxgb4_range srq; 343 struct cxgb4_range pbl; 344 struct cxgb4_range qp; 345 struct cxgb4_range cq; 346 struct cxgb4_range ocq; 347 struct cxgb4_range key; 348 unsigned int ncrypto_fc; 349 struct cxgb4_range ppod_edram; 350 }; 351 352 struct chcr_stats_debug { 353 atomic_t cipher_rqst; 354 atomic_t digest_rqst; 355 atomic_t aead_rqst; 356 atomic_t complete; 357 atomic_t error; 358 atomic_t fallback; 359 atomic_t ipsec_cnt; 360 atomic_t tls_pdu_tx; 361 atomic_t tls_pdu_rx; 362 atomic_t tls_key; 363 #ifdef CONFIG_CHELSIO_TLS_DEVICE 364 atomic64_t ktls_tx_connection_open; 365 atomic64_t ktls_tx_connection_fail; 366 atomic64_t ktls_tx_connection_close; 367 atomic64_t ktls_tx_send_records; 368 atomic64_t ktls_tx_end_pkts; 369 atomic64_t ktls_tx_start_pkts; 370 atomic64_t ktls_tx_middle_pkts; 371 atomic64_t ktls_tx_retransmit_pkts; 372 atomic64_t ktls_tx_complete_pkts; 373 atomic64_t ktls_tx_trimmed_pkts; 374 atomic64_t ktls_tx_encrypted_packets; 375 atomic64_t ktls_tx_encrypted_bytes; 376 atomic64_t ktls_tx_ctx; 377 atomic64_t ktls_tx_ooo; 378 atomic64_t ktls_tx_skip_no_sync_data; 379 atomic64_t ktls_tx_drop_no_sync_data; 380 atomic64_t ktls_tx_drop_bypass_req; 381 382 #endif 383 }; 384 385 #define OCQ_WIN_OFFSET(pdev, vres) \ 386 (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size)) 387 388 /* 389 * Block of information the LLD provides to ULDs attaching to a device. 390 */ 391 struct cxgb4_lld_info { 392 struct pci_dev *pdev; /* associated PCI device */ 393 struct l2t_data *l2t; /* L2 table */ 394 struct tid_info *tids; /* TID table */ 395 struct net_device **ports; /* device ports */ 396 const struct cxgb4_virt_res *vr; /* assorted HW resources */ 397 const unsigned short *mtus; /* MTU table */ 398 const unsigned short *rxq_ids; /* the ULD's Rx queue ids */ 399 const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */ 400 unsigned short nrxq; /* # of Rx queues */ 401 unsigned short ntxq; /* # of Tx queues */ 402 unsigned short nciq; /* # of concentrator IQ */ 403 unsigned char nchan:4; /* # of channels */ 404 unsigned char nports:4; /* # of ports */ 405 unsigned char wr_cred; /* WR 16-byte credits */ 406 unsigned char adapter_type; /* type of adapter */ 407 unsigned char fw_api_ver; /* FW API version */ 408 unsigned char crypto; /* crypto support */ 409 unsigned int fw_vers; /* FW version */ 410 unsigned int iscsi_iolen; /* iSCSI max I/O length */ 411 unsigned int cclk_ps; /* Core clock period in psec */ 412 unsigned short udb_density; /* # of user DB/page */ 413 unsigned short ucq_density; /* # of user CQs/page */ 414 unsigned int sge_host_page_size; /* SGE host page size */ 415 unsigned short filt_mode; /* filter optional components */ 416 unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */ 417 /* scheduler queue */ 418 void __iomem *gts_reg; /* address of GTS register */ 419 void __iomem *db_reg; /* address of kernel doorbell */ 420 int dbfifo_int_thresh; /* doorbell fifo int threshold */ 421 unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */ 422 unsigned int sge_egrstatuspagesize; /* SGE egress status page size */ 423 unsigned int sge_pktshift; /* Padding between CPL and */ 424 /* packet data */ 425 unsigned int pf; /* Physical Function we're using */ 426 bool enable_fw_ofld_conn; /* Enable connection through fw */ 427 /* WR */ 428 unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */ 429 unsigned int max_ird_adapter; /* Max IRD memory per adapter */ 430 bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */ 431 unsigned int iscsi_tagmask; /* iscsi ddp tag mask */ 432 unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */ 433 unsigned int iscsi_llimit; /* chip's iscsi region llimit */ 434 unsigned int ulp_crypto; /* crypto lookaside support */ 435 void **iscsi_ppm; /* iscsi page pod manager */ 436 int nodeid; /* device numa node id */ 437 bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */ 438 bool write_w_imm_support; /* FW supports WRITE_WITH_IMMEDIATE */ 439 bool write_cmpl_support; /* FW supports WRITE_CMPL WR */ 440 }; 441 442 struct cxgb4_uld_info { 443 char name[IFNAMSIZ]; 444 void *handle; 445 unsigned int nrxq; 446 unsigned int rxq_size; 447 unsigned int ntxq; 448 bool ciq; 449 bool lro; 450 void *(*add)(const struct cxgb4_lld_info *p); 451 int (*rx_handler)(void *handle, const __be64 *rsp, 452 const struct pkt_gl *gl); 453 int (*state_change)(void *handle, enum cxgb4_state new_state); 454 int (*control)(void *handle, enum cxgb4_control control, ...); 455 int (*lro_rx_handler)(void *handle, const __be64 *rsp, 456 const struct pkt_gl *gl, 457 struct t4_lro_mgr *lro_mgr, 458 struct napi_struct *napi); 459 void (*lro_flush)(struct t4_lro_mgr *); 460 int (*tx_handler)(struct sk_buff *skb, struct net_device *dev); 461 }; 462 463 void cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p); 464 int cxgb4_unregister_uld(enum cxgb4_uld type); 465 int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb); 466 int cxgb4_immdata_send(struct net_device *dev, unsigned int idx, 467 const void *src, unsigned int len); 468 int cxgb4_crypto_send(struct net_device *dev, struct sk_buff *skb); 469 unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo); 470 unsigned int cxgb4_port_chan(const struct net_device *dev); 471 unsigned int cxgb4_port_e2cchan(const struct net_device *dev); 472 unsigned int cxgb4_port_viid(const struct net_device *dev); 473 unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid); 474 unsigned int cxgb4_port_idx(const struct net_device *dev); 475 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu, 476 unsigned int *idx); 477 unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus, 478 unsigned short header_size, 479 unsigned short data_size_max, 480 unsigned short data_size_align, 481 unsigned int *mtu_idxp); 482 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4, 483 struct tp_tcp_stats *v6); 484 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask, 485 const unsigned int *pgsz_order); 486 struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl, 487 unsigned int skb_len, unsigned int pull_len); 488 int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size); 489 int cxgb4_flush_eq_cache(struct net_device *dev); 490 int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte); 491 u64 cxgb4_read_sge_timestamp(struct net_device *dev); 492 493 enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS }; 494 int cxgb4_bar2_sge_qregs(struct net_device *dev, 495 unsigned int qid, 496 enum cxgb4_bar2_qtype qtype, 497 int user, 498 u64 *pbar2_qoffset, 499 unsigned int *pbar2_qid); 500 501 #endif /* !__CXGB4_ULD_H */ 502