1 /* 2 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 */ 17 18 #include <linux/firmware.h> 19 #include <linux/mdio.h> 20 21 #include "cxgb4.h" 22 #include "t4_regs.h" 23 #include "t4fw_api.h" 24 #include "cxgb4_cudbg.h" 25 26 #define EEPROM_MAGIC 0x38E2F10C 27 28 static u32 get_msglevel(struct net_device *dev) 29 { 30 return netdev2adap(dev)->msg_enable; 31 } 32 33 static void set_msglevel(struct net_device *dev, u32 val) 34 { 35 netdev2adap(dev)->msg_enable = val; 36 } 37 38 static const char stats_strings[][ETH_GSTRING_LEN] = { 39 "tx_octets_ok ", 40 "tx_frames_ok ", 41 "tx_broadcast_frames ", 42 "tx_multicast_frames ", 43 "tx_unicast_frames ", 44 "tx_error_frames ", 45 46 "tx_frames_64 ", 47 "tx_frames_65_to_127 ", 48 "tx_frames_128_to_255 ", 49 "tx_frames_256_to_511 ", 50 "tx_frames_512_to_1023 ", 51 "tx_frames_1024_to_1518 ", 52 "tx_frames_1519_to_max ", 53 54 "tx_frames_dropped ", 55 "tx_pause_frames ", 56 "tx_ppp0_frames ", 57 "tx_ppp1_frames ", 58 "tx_ppp2_frames ", 59 "tx_ppp3_frames ", 60 "tx_ppp4_frames ", 61 "tx_ppp5_frames ", 62 "tx_ppp6_frames ", 63 "tx_ppp7_frames ", 64 65 "rx_octets_ok ", 66 "rx_frames_ok ", 67 "rx_broadcast_frames ", 68 "rx_multicast_frames ", 69 "rx_unicast_frames ", 70 71 "rx_frames_too_long ", 72 "rx_jabber_errors ", 73 "rx_fcs_errors ", 74 "rx_length_errors ", 75 "rx_symbol_errors ", 76 "rx_runt_frames ", 77 78 "rx_frames_64 ", 79 "rx_frames_65_to_127 ", 80 "rx_frames_128_to_255 ", 81 "rx_frames_256_to_511 ", 82 "rx_frames_512_to_1023 ", 83 "rx_frames_1024_to_1518 ", 84 "rx_frames_1519_to_max ", 85 86 "rx_pause_frames ", 87 "rx_ppp0_frames ", 88 "rx_ppp1_frames ", 89 "rx_ppp2_frames ", 90 "rx_ppp3_frames ", 91 "rx_ppp4_frames ", 92 "rx_ppp5_frames ", 93 "rx_ppp6_frames ", 94 "rx_ppp7_frames ", 95 96 "rx_bg0_frames_dropped ", 97 "rx_bg1_frames_dropped ", 98 "rx_bg2_frames_dropped ", 99 "rx_bg3_frames_dropped ", 100 "rx_bg0_frames_trunc ", 101 "rx_bg1_frames_trunc ", 102 "rx_bg2_frames_trunc ", 103 "rx_bg3_frames_trunc ", 104 105 "tso ", 106 "tx_csum_offload ", 107 "rx_csum_good ", 108 "vlan_extractions ", 109 "vlan_insertions ", 110 "gro_packets ", 111 "gro_merged ", 112 }; 113 114 static char adapter_stats_strings[][ETH_GSTRING_LEN] = { 115 "db_drop ", 116 "db_full ", 117 "db_empty ", 118 "write_coal_success ", 119 "write_coal_fail ", 120 }; 121 122 static char loopback_stats_strings[][ETH_GSTRING_LEN] = { 123 "-------Loopback----------- ", 124 "octets_ok ", 125 "frames_ok ", 126 "bcast_frames ", 127 "mcast_frames ", 128 "ucast_frames ", 129 "error_frames ", 130 "frames_64 ", 131 "frames_65_to_127 ", 132 "frames_128_to_255 ", 133 "frames_256_to_511 ", 134 "frames_512_to_1023 ", 135 "frames_1024_to_1518 ", 136 "frames_1519_to_max ", 137 "frames_dropped ", 138 "bg0_frames_dropped ", 139 "bg1_frames_dropped ", 140 "bg2_frames_dropped ", 141 "bg3_frames_dropped ", 142 "bg0_frames_trunc ", 143 "bg1_frames_trunc ", 144 "bg2_frames_trunc ", 145 "bg3_frames_trunc ", 146 }; 147 148 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = { 149 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr", 150 }; 151 152 static int get_sset_count(struct net_device *dev, int sset) 153 { 154 switch (sset) { 155 case ETH_SS_STATS: 156 return ARRAY_SIZE(stats_strings) + 157 ARRAY_SIZE(adapter_stats_strings) + 158 ARRAY_SIZE(loopback_stats_strings); 159 case ETH_SS_PRIV_FLAGS: 160 return ARRAY_SIZE(cxgb4_priv_flags_strings); 161 default: 162 return -EOPNOTSUPP; 163 } 164 } 165 166 static int get_regs_len(struct net_device *dev) 167 { 168 struct adapter *adap = netdev2adap(dev); 169 170 return t4_get_regs_len(adap); 171 } 172 173 static int get_eeprom_len(struct net_device *dev) 174 { 175 return EEPROMSIZE; 176 } 177 178 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 179 { 180 struct adapter *adapter = netdev2adap(dev); 181 u32 exprom_vers; 182 183 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver)); 184 strlcpy(info->version, cxgb4_driver_version, 185 sizeof(info->version)); 186 strlcpy(info->bus_info, pci_name(adapter->pdev), 187 sizeof(info->bus_info)); 188 info->regdump_len = get_regs_len(dev); 189 190 if (!adapter->params.fw_vers) 191 strcpy(info->fw_version, "N/A"); 192 else 193 snprintf(info->fw_version, sizeof(info->fw_version), 194 "%u.%u.%u.%u, TP %u.%u.%u.%u", 195 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers), 196 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers), 197 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers), 198 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers), 199 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers), 200 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers), 201 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers), 202 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers)); 203 204 if (!t4_get_exprom_version(adapter, &exprom_vers)) 205 snprintf(info->erom_version, sizeof(info->erom_version), 206 "%u.%u.%u.%u", 207 FW_HDR_FW_VER_MAJOR_G(exprom_vers), 208 FW_HDR_FW_VER_MINOR_G(exprom_vers), 209 FW_HDR_FW_VER_MICRO_G(exprom_vers), 210 FW_HDR_FW_VER_BUILD_G(exprom_vers)); 211 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings); 212 } 213 214 static void get_strings(struct net_device *dev, u32 stringset, u8 *data) 215 { 216 if (stringset == ETH_SS_STATS) { 217 memcpy(data, stats_strings, sizeof(stats_strings)); 218 data += sizeof(stats_strings); 219 memcpy(data, adapter_stats_strings, 220 sizeof(adapter_stats_strings)); 221 data += sizeof(adapter_stats_strings); 222 memcpy(data, loopback_stats_strings, 223 sizeof(loopback_stats_strings)); 224 } else if (stringset == ETH_SS_PRIV_FLAGS) { 225 memcpy(data, cxgb4_priv_flags_strings, 226 sizeof(cxgb4_priv_flags_strings)); 227 } 228 } 229 230 /* port stats maintained per queue of the port. They should be in the same 231 * order as in stats_strings above. 232 */ 233 struct queue_port_stats { 234 u64 tso; 235 u64 tx_csum; 236 u64 rx_csum; 237 u64 vlan_ex; 238 u64 vlan_ins; 239 u64 gro_pkts; 240 u64 gro_merged; 241 }; 242 243 struct adapter_stats { 244 u64 db_drop; 245 u64 db_full; 246 u64 db_empty; 247 u64 wc_success; 248 u64 wc_fail; 249 }; 250 251 static void collect_sge_port_stats(const struct adapter *adap, 252 const struct port_info *p, 253 struct queue_port_stats *s) 254 { 255 int i; 256 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset]; 257 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset]; 258 259 memset(s, 0, sizeof(*s)); 260 for (i = 0; i < p->nqsets; i++, rx++, tx++) { 261 s->tso += tx->tso; 262 s->tx_csum += tx->tx_cso; 263 s->rx_csum += rx->stats.rx_cso; 264 s->vlan_ex += rx->stats.vlan_ex; 265 s->vlan_ins += tx->vlan_ins; 266 s->gro_pkts += rx->stats.lro_pkts; 267 s->gro_merged += rx->stats.lro_merged; 268 } 269 } 270 271 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s) 272 { 273 u64 val1, val2; 274 275 memset(s, 0, sizeof(*s)); 276 277 s->db_drop = adap->db_stats.db_drop; 278 s->db_full = adap->db_stats.db_full; 279 s->db_empty = adap->db_stats.db_empty; 280 281 if (!is_t4(adap->params.chip)) { 282 int v; 283 284 v = t4_read_reg(adap, SGE_STAT_CFG_A); 285 if (STATSOURCE_T5_G(v) == 7) { 286 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A); 287 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A); 288 s->wc_success = val1 - val2; 289 s->wc_fail = val2; 290 } 291 } 292 } 293 294 static void get_stats(struct net_device *dev, struct ethtool_stats *stats, 295 u64 *data) 296 { 297 struct port_info *pi = netdev_priv(dev); 298 struct adapter *adapter = pi->adapter; 299 struct lb_port_stats s; 300 int i; 301 u64 *p0; 302 303 t4_get_port_stats_offset(adapter, pi->tx_chan, 304 (struct port_stats *)data, 305 &pi->stats_base); 306 307 data += sizeof(struct port_stats) / sizeof(u64); 308 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); 309 data += sizeof(struct queue_port_stats) / sizeof(u64); 310 collect_adapter_stats(adapter, (struct adapter_stats *)data); 311 data += sizeof(struct adapter_stats) / sizeof(u64); 312 313 *data++ = (u64)pi->port_id; 314 memset(&s, 0, sizeof(s)); 315 t4_get_lb_stats(adapter, pi->port_id, &s); 316 317 p0 = &s.octets; 318 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++) 319 *data++ = (unsigned long long)*p0++; 320 } 321 322 static void get_regs(struct net_device *dev, struct ethtool_regs *regs, 323 void *buf) 324 { 325 struct adapter *adap = netdev2adap(dev); 326 size_t buf_size; 327 328 buf_size = t4_get_regs_len(adap); 329 regs->version = mk_adap_vers(adap); 330 t4_get_regs(adap, buf, buf_size); 331 } 332 333 static int restart_autoneg(struct net_device *dev) 334 { 335 struct port_info *p = netdev_priv(dev); 336 337 if (!netif_running(dev)) 338 return -EAGAIN; 339 if (p->link_cfg.autoneg != AUTONEG_ENABLE) 340 return -EINVAL; 341 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan); 342 return 0; 343 } 344 345 static int identify_port(struct net_device *dev, 346 enum ethtool_phys_id_state state) 347 { 348 unsigned int val; 349 struct adapter *adap = netdev2adap(dev); 350 351 if (state == ETHTOOL_ID_ACTIVE) 352 val = 0xffff; 353 else if (state == ETHTOOL_ID_INACTIVE) 354 val = 0; 355 else 356 return -EINVAL; 357 358 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val); 359 } 360 361 /** 362 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool 363 * @port_type: Firmware Port Type 364 * @mod_type: Firmware Module Type 365 * 366 * Translate Firmware Port/Module type to Ethtool Port Type. 367 */ 368 static int from_fw_port_mod_type(enum fw_port_type port_type, 369 enum fw_port_module_type mod_type) 370 { 371 if (port_type == FW_PORT_TYPE_BT_SGMII || 372 port_type == FW_PORT_TYPE_BT_XFI || 373 port_type == FW_PORT_TYPE_BT_XAUI) { 374 return PORT_TP; 375 } else if (port_type == FW_PORT_TYPE_FIBER_XFI || 376 port_type == FW_PORT_TYPE_FIBER_XAUI) { 377 return PORT_FIBRE; 378 } else if (port_type == FW_PORT_TYPE_SFP || 379 port_type == FW_PORT_TYPE_QSFP_10G || 380 port_type == FW_PORT_TYPE_QSA || 381 port_type == FW_PORT_TYPE_QSFP || 382 port_type == FW_PORT_TYPE_CR4_QSFP || 383 port_type == FW_PORT_TYPE_CR_QSFP || 384 port_type == FW_PORT_TYPE_CR2_QSFP || 385 port_type == FW_PORT_TYPE_SFP28) { 386 if (mod_type == FW_PORT_MOD_TYPE_LR || 387 mod_type == FW_PORT_MOD_TYPE_SR || 388 mod_type == FW_PORT_MOD_TYPE_ER || 389 mod_type == FW_PORT_MOD_TYPE_LRM) 390 return PORT_FIBRE; 391 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || 392 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) 393 return PORT_DA; 394 else 395 return PORT_OTHER; 396 } else if (port_type == FW_PORT_TYPE_KR4_100G || 397 port_type == FW_PORT_TYPE_KR_SFP28 || 398 port_type == FW_PORT_TYPE_KR_XLAUI) { 399 return PORT_NONE; 400 } 401 402 return PORT_OTHER; 403 } 404 405 /** 406 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities 407 * @speed: speed in Kb/s 408 * 409 * Translates a specific Port Speed into a Firmware Port Capabilities 410 * value. 411 */ 412 static unsigned int speed_to_fw_caps(int speed) 413 { 414 if (speed == 100) 415 return FW_PORT_CAP32_SPEED_100M; 416 if (speed == 1000) 417 return FW_PORT_CAP32_SPEED_1G; 418 if (speed == 10000) 419 return FW_PORT_CAP32_SPEED_10G; 420 if (speed == 25000) 421 return FW_PORT_CAP32_SPEED_25G; 422 if (speed == 40000) 423 return FW_PORT_CAP32_SPEED_40G; 424 if (speed == 50000) 425 return FW_PORT_CAP32_SPEED_50G; 426 if (speed == 100000) 427 return FW_PORT_CAP32_SPEED_100G; 428 if (speed == 200000) 429 return FW_PORT_CAP32_SPEED_200G; 430 if (speed == 400000) 431 return FW_PORT_CAP32_SPEED_400G; 432 return 0; 433 } 434 435 /** 436 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask 437 * @port_type: Firmware Port Type 438 * @fw_caps: Firmware Port Capabilities 439 * @link_mode_mask: ethtool Link Mode Mask 440 * 441 * Translate a Firmware Port Capabilities specification to an ethtool 442 * Link Mode Mask. 443 */ 444 static void fw_caps_to_lmm(enum fw_port_type port_type, 445 unsigned int fw_caps, 446 unsigned long *link_mode_mask) 447 { 448 #define SET_LMM(__lmm_name) \ 449 do { \ 450 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 451 link_mode_mask); \ 452 } while (0) 453 454 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \ 455 do { \ 456 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \ 457 SET_LMM(__lmm_name); \ 458 } while (0) 459 460 switch (port_type) { 461 case FW_PORT_TYPE_BT_SGMII: 462 case FW_PORT_TYPE_BT_XFI: 463 case FW_PORT_TYPE_BT_XAUI: 464 SET_LMM(TP); 465 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full); 466 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 467 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 468 break; 469 470 case FW_PORT_TYPE_KX4: 471 case FW_PORT_TYPE_KX: 472 SET_LMM(Backplane); 473 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 474 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 475 break; 476 477 case FW_PORT_TYPE_KR: 478 SET_LMM(Backplane); 479 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 480 break; 481 482 case FW_PORT_TYPE_BP_AP: 483 SET_LMM(Backplane); 484 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 485 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 486 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 487 break; 488 489 case FW_PORT_TYPE_BP4_AP: 490 SET_LMM(Backplane); 491 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 492 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 493 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 494 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 495 break; 496 497 case FW_PORT_TYPE_FIBER_XFI: 498 case FW_PORT_TYPE_FIBER_XAUI: 499 case FW_PORT_TYPE_SFP: 500 case FW_PORT_TYPE_QSFP_10G: 501 case FW_PORT_TYPE_QSA: 502 SET_LMM(FIBRE); 503 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 504 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 505 break; 506 507 case FW_PORT_TYPE_BP40_BA: 508 case FW_PORT_TYPE_QSFP: 509 SET_LMM(FIBRE); 510 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 511 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 512 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 513 break; 514 515 case FW_PORT_TYPE_CR_QSFP: 516 case FW_PORT_TYPE_SFP28: 517 SET_LMM(FIBRE); 518 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 519 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 520 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 521 break; 522 523 case FW_PORT_TYPE_KR_SFP28: 524 SET_LMM(Backplane); 525 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 526 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 527 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full); 528 break; 529 530 case FW_PORT_TYPE_KR_XLAUI: 531 SET_LMM(Backplane); 532 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 533 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 534 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full); 535 break; 536 537 case FW_PORT_TYPE_CR2_QSFP: 538 SET_LMM(FIBRE); 539 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full); 540 break; 541 542 case FW_PORT_TYPE_KR4_100G: 543 case FW_PORT_TYPE_CR4_QSFP: 544 SET_LMM(FIBRE); 545 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 546 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 547 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 548 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 549 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full); 550 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full); 551 break; 552 553 default: 554 break; 555 } 556 557 if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) { 558 FW_CAPS_TO_LMM(FEC_RS, FEC_RS); 559 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER); 560 } else { 561 SET_LMM(FEC_NONE); 562 } 563 564 FW_CAPS_TO_LMM(ANEG, Autoneg); 565 FW_CAPS_TO_LMM(802_3_PAUSE, Pause); 566 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause); 567 568 #undef FW_CAPS_TO_LMM 569 #undef SET_LMM 570 } 571 572 /** 573 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware 574 * capabilities 575 * @et_lmm: ethtool Link Mode Mask 576 * 577 * Translate ethtool Link Mode Mask into a Firmware Port capabilities 578 * value. 579 */ 580 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask) 581 { 582 unsigned int fw_caps = 0; 583 584 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \ 585 do { \ 586 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 587 link_mode_mask)) \ 588 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \ 589 } while (0) 590 591 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M); 592 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G); 593 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G); 594 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G); 595 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G); 596 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G); 597 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G); 598 599 #undef LMM_TO_FW_CAPS 600 601 return fw_caps; 602 } 603 604 static int get_link_ksettings(struct net_device *dev, 605 struct ethtool_link_ksettings *link_ksettings) 606 { 607 struct port_info *pi = netdev_priv(dev); 608 struct ethtool_link_settings *base = &link_ksettings->base; 609 610 /* For the nonce, the Firmware doesn't send up Port State changes 611 * when the Virtual Interface attached to the Port is down. So 612 * if it's down, let's grab any changes. 613 */ 614 if (!netif_running(dev)) 615 (void)t4_update_port_info(pi); 616 617 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported); 618 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising); 619 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising); 620 621 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type); 622 623 if (pi->mdio_addr >= 0) { 624 base->phy_address = pi->mdio_addr; 625 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII 626 ? ETH_MDIO_SUPPORTS_C22 627 : ETH_MDIO_SUPPORTS_C45); 628 } else { 629 base->phy_address = 255; 630 base->mdio_support = 0; 631 } 632 633 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps, 634 link_ksettings->link_modes.supported); 635 fw_caps_to_lmm(pi->port_type, pi->link_cfg.acaps, 636 link_ksettings->link_modes.advertising); 637 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps, 638 link_ksettings->link_modes.lp_advertising); 639 640 base->speed = (netif_carrier_ok(dev) 641 ? pi->link_cfg.speed 642 : SPEED_UNKNOWN); 643 base->duplex = DUPLEX_FULL; 644 645 if (pi->link_cfg.fc & PAUSE_RX) { 646 if (pi->link_cfg.fc & PAUSE_TX) { 647 ethtool_link_ksettings_add_link_mode(link_ksettings, 648 advertising, 649 Pause); 650 } else { 651 ethtool_link_ksettings_add_link_mode(link_ksettings, 652 advertising, 653 Asym_Pause); 654 } 655 } else if (pi->link_cfg.fc & PAUSE_TX) { 656 ethtool_link_ksettings_add_link_mode(link_ksettings, 657 advertising, 658 Asym_Pause); 659 } 660 661 base->autoneg = pi->link_cfg.autoneg; 662 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) 663 ethtool_link_ksettings_add_link_mode(link_ksettings, 664 supported, Autoneg); 665 if (pi->link_cfg.autoneg) 666 ethtool_link_ksettings_add_link_mode(link_ksettings, 667 advertising, Autoneg); 668 669 return 0; 670 } 671 672 static int set_link_ksettings(struct net_device *dev, 673 const struct ethtool_link_ksettings *link_ksettings) 674 { 675 struct port_info *pi = netdev_priv(dev); 676 struct link_config *lc = &pi->link_cfg; 677 const struct ethtool_link_settings *base = &link_ksettings->base; 678 struct link_config old_lc; 679 unsigned int fw_caps; 680 int ret = 0; 681 682 /* only full-duplex supported */ 683 if (base->duplex != DUPLEX_FULL) 684 return -EINVAL; 685 686 old_lc = *lc; 687 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) || 688 base->autoneg == AUTONEG_DISABLE) { 689 fw_caps = speed_to_fw_caps(base->speed); 690 691 /* Speed must be supported by Physical Port Capabilities. */ 692 if (!(lc->pcaps & fw_caps)) 693 return -EINVAL; 694 695 lc->speed_caps = fw_caps; 696 lc->acaps = fw_caps; 697 } else { 698 fw_caps = 699 lmm_to_fw_caps(link_ksettings->link_modes.advertising); 700 if (!(lc->pcaps & fw_caps)) 701 return -EINVAL; 702 lc->speed_caps = 0; 703 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG; 704 } 705 lc->autoneg = base->autoneg; 706 707 /* If the firmware rejects the Link Configuration request, back out 708 * the changes and report the error. 709 */ 710 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc); 711 if (ret) 712 *lc = old_lc; 713 714 return ret; 715 } 716 717 /* Translate the Firmware FEC value into the ethtool value. */ 718 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec) 719 { 720 unsigned int eth_fec = 0; 721 722 if (fw_fec & FW_PORT_CAP32_FEC_RS) 723 eth_fec |= ETHTOOL_FEC_RS; 724 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 725 eth_fec |= ETHTOOL_FEC_BASER; 726 727 /* if nothing is set, then FEC is off */ 728 if (!eth_fec) 729 eth_fec = ETHTOOL_FEC_OFF; 730 731 return eth_fec; 732 } 733 734 /* Translate Common Code FEC value into ethtool value. */ 735 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec) 736 { 737 unsigned int eth_fec = 0; 738 739 if (cc_fec & FEC_AUTO) 740 eth_fec |= ETHTOOL_FEC_AUTO; 741 if (cc_fec & FEC_RS) 742 eth_fec |= ETHTOOL_FEC_RS; 743 if (cc_fec & FEC_BASER_RS) 744 eth_fec |= ETHTOOL_FEC_BASER; 745 746 /* if nothing is set, then FEC is off */ 747 if (!eth_fec) 748 eth_fec = ETHTOOL_FEC_OFF; 749 750 return eth_fec; 751 } 752 753 /* Translate ethtool FEC value into Common Code value. */ 754 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec) 755 { 756 unsigned int cc_fec = 0; 757 758 if (eth_fec & ETHTOOL_FEC_OFF) 759 return cc_fec; 760 761 if (eth_fec & ETHTOOL_FEC_AUTO) 762 cc_fec |= FEC_AUTO; 763 if (eth_fec & ETHTOOL_FEC_RS) 764 cc_fec |= FEC_RS; 765 if (eth_fec & ETHTOOL_FEC_BASER) 766 cc_fec |= FEC_BASER_RS; 767 768 return cc_fec; 769 } 770 771 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 772 { 773 const struct port_info *pi = netdev_priv(dev); 774 const struct link_config *lc = &pi->link_cfg; 775 776 /* Translate the Firmware FEC Support into the ethtool value. We 777 * always support IEEE 802.3 "automatic" selection of Link FEC type if 778 * any FEC is supported. 779 */ 780 fec->fec = fwcap_to_eth_fec(lc->pcaps); 781 if (fec->fec != ETHTOOL_FEC_OFF) 782 fec->fec |= ETHTOOL_FEC_AUTO; 783 784 /* Translate the current internal FEC parameters into the 785 * ethtool values. 786 */ 787 fec->active_fec = cc_to_eth_fec(lc->fec); 788 789 return 0; 790 } 791 792 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 793 { 794 struct port_info *pi = netdev_priv(dev); 795 struct link_config *lc = &pi->link_cfg; 796 struct link_config old_lc; 797 int ret; 798 799 /* Save old Link Configuration in case the L1 Configure below 800 * fails. 801 */ 802 old_lc = *lc; 803 804 /* Try to perform the L1 Configure and return the result of that 805 * effort. If it fails, revert the attempted change. 806 */ 807 lc->requested_fec = eth_to_cc_fec(fec->fec); 808 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, 809 pi->tx_chan, lc); 810 if (ret) 811 *lc = old_lc; 812 return ret; 813 } 814 815 static void get_pauseparam(struct net_device *dev, 816 struct ethtool_pauseparam *epause) 817 { 818 struct port_info *p = netdev_priv(dev); 819 820 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0; 821 epause->rx_pause = (p->link_cfg.fc & PAUSE_RX) != 0; 822 epause->tx_pause = (p->link_cfg.fc & PAUSE_TX) != 0; 823 } 824 825 static int set_pauseparam(struct net_device *dev, 826 struct ethtool_pauseparam *epause) 827 { 828 struct port_info *p = netdev_priv(dev); 829 struct link_config *lc = &p->link_cfg; 830 831 if (epause->autoneg == AUTONEG_DISABLE) 832 lc->requested_fc = 0; 833 else if (lc->pcaps & FW_PORT_CAP32_ANEG) 834 lc->requested_fc = PAUSE_AUTONEG; 835 else 836 return -EINVAL; 837 838 if (epause->rx_pause) 839 lc->requested_fc |= PAUSE_RX; 840 if (epause->tx_pause) 841 lc->requested_fc |= PAUSE_TX; 842 if (netif_running(dev)) 843 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan, 844 lc); 845 return 0; 846 } 847 848 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 849 { 850 const struct port_info *pi = netdev_priv(dev); 851 const struct sge *s = &pi->adapter->sge; 852 853 e->rx_max_pending = MAX_RX_BUFFERS; 854 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES; 855 e->rx_jumbo_max_pending = 0; 856 e->tx_max_pending = MAX_TXQ_ENTRIES; 857 858 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8; 859 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size; 860 e->rx_jumbo_pending = 0; 861 e->tx_pending = s->ethtxq[pi->first_qset].q.size; 862 } 863 864 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 865 { 866 int i; 867 const struct port_info *pi = netdev_priv(dev); 868 struct adapter *adapter = pi->adapter; 869 struct sge *s = &adapter->sge; 870 871 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending || 872 e->tx_pending > MAX_TXQ_ENTRIES || 873 e->rx_mini_pending > MAX_RSPQ_ENTRIES || 874 e->rx_mini_pending < MIN_RSPQ_ENTRIES || 875 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES) 876 return -EINVAL; 877 878 if (adapter->flags & CXGB4_FULL_INIT_DONE) 879 return -EBUSY; 880 881 for (i = 0; i < pi->nqsets; ++i) { 882 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending; 883 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8; 884 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending; 885 } 886 return 0; 887 } 888 889 /** 890 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete! 891 * @dev: the network device 892 * @us: the hold-off time in us, or 0 to disable timer 893 * @cnt: the hold-off packet count, or 0 to disable counter 894 * 895 * Set the RX interrupt hold-off parameters for a network device. 896 */ 897 static int set_rx_intr_params(struct net_device *dev, 898 unsigned int us, unsigned int cnt) 899 { 900 int i, err; 901 struct port_info *pi = netdev_priv(dev); 902 struct adapter *adap = pi->adapter; 903 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 904 905 for (i = 0; i < pi->nqsets; i++, q++) { 906 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt); 907 if (err) 908 return err; 909 } 910 return 0; 911 } 912 913 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx) 914 { 915 int i; 916 struct port_info *pi = netdev_priv(dev); 917 struct adapter *adap = pi->adapter; 918 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 919 920 for (i = 0; i < pi->nqsets; i++, q++) 921 q->rspq.adaptive_rx = adaptive_rx; 922 923 return 0; 924 } 925 926 static int get_adaptive_rx_setting(struct net_device *dev) 927 { 928 struct port_info *pi = netdev_priv(dev); 929 struct adapter *adap = pi->adapter; 930 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 931 932 return q->rspq.adaptive_rx; 933 } 934 935 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all 936 * Ethernet TX Queues. 937 */ 938 static int get_dbqtimer_tick(struct net_device *dev) 939 { 940 struct port_info *pi = netdev_priv(dev); 941 struct adapter *adap = pi->adapter; 942 943 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 944 return 0; 945 946 return adap->sge.dbqtimer_tick; 947 } 948 949 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 950 * associated with a Network Device. 951 */ 952 static int get_dbqtimer(struct net_device *dev) 953 { 954 struct port_info *pi = netdev_priv(dev); 955 struct adapter *adap = pi->adapter; 956 struct sge_eth_txq *txq; 957 958 txq = &adap->sge.ethtxq[pi->first_qset]; 959 960 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 961 return 0; 962 963 /* all of the TX Queues use the same Timer Index */ 964 return adap->sge.dbqtimer_val[txq->dbqtimerix]; 965 } 966 967 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 968 * Queues. This is the fundamental "Tick" that sets the scale of values which 969 * can be used. Individual Ethernet TX Queues index into a relatively small 970 * array of Tick Multipliers. Changing the base Tick will thus change all of 971 * the resulting Timer Values associated with those multipliers for all 972 * Ethernet TX Queues. 973 */ 974 static int set_dbqtimer_tick(struct net_device *dev, int usecs) 975 { 976 struct port_info *pi = netdev_priv(dev); 977 struct adapter *adap = pi->adapter; 978 struct sge *s = &adap->sge; 979 u32 param, val; 980 int ret; 981 982 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 983 return 0; 984 985 /* return early if it's the same Timer Tick we're already using */ 986 if (s->dbqtimer_tick == usecs) 987 return 0; 988 989 /* attempt to set the new Timer Tick value */ 990 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 991 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK)); 992 val = usecs; 993 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val); 994 if (ret) 995 return ret; 996 s->dbqtimer_tick = usecs; 997 998 /* if successful, reread resulting dependent Timer values */ 999 ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val), 1000 s->dbqtimer_val); 1001 return ret; 1002 } 1003 1004 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 1005 * associated with a Network Device. There is a relatively small array of 1006 * possible Timer Values so we need to pick the closest value available. 1007 */ 1008 static int set_dbqtimer(struct net_device *dev, int usecs) 1009 { 1010 int qix, timerix, min_timerix, delta, min_delta; 1011 struct port_info *pi = netdev_priv(dev); 1012 struct adapter *adap = pi->adapter; 1013 struct sge *s = &adap->sge; 1014 struct sge_eth_txq *txq; 1015 u32 param, val; 1016 int ret; 1017 1018 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 1019 return 0; 1020 1021 /* Find the SGE Doorbell Timer Value that's closest to the requested 1022 * value. 1023 */ 1024 min_delta = INT_MAX; 1025 min_timerix = 0; 1026 for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) { 1027 delta = s->dbqtimer_val[timerix] - usecs; 1028 if (delta < 0) 1029 delta = -delta; 1030 if (delta < min_delta) { 1031 min_delta = delta; 1032 min_timerix = timerix; 1033 } 1034 } 1035 1036 /* Return early if it's the same Timer Index we're already using. 1037 * We use the same Timer Index for all of the TX Queues for an 1038 * interface so it's only necessary to check the first one. 1039 */ 1040 txq = &s->ethtxq[pi->first_qset]; 1041 if (txq->dbqtimerix == min_timerix) 1042 return 0; 1043 1044 for (qix = 0; qix < pi->nqsets; qix++, txq++) { 1045 if (adap->flags & CXGB4_FULL_INIT_DONE) { 1046 param = 1047 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) | 1048 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) | 1049 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id)); 1050 val = min_timerix; 1051 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1052 1, ¶m, &val); 1053 if (ret) 1054 return ret; 1055 } 1056 txq->dbqtimerix = min_timerix; 1057 } 1058 return 0; 1059 } 1060 1061 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 1062 * Queues and the Timer Value for the Ethernet TX Queues associated with a 1063 * Network Device. Since changing the global Tick changes all of the 1064 * available Timer Values, we need to do this first before selecting the 1065 * resulting closest Timer Value. Moreover, since the Tick is global, 1066 * changing it affects the Timer Values for all Network Devices on the 1067 * adapter. So, before changing the Tick, we grab all of the current Timer 1068 * Values for other Network Devices on this Adapter and then attempt to select 1069 * new Timer Values which are close to the old values ... 1070 */ 1071 static int set_dbqtimer_tickval(struct net_device *dev, 1072 int tick_usecs, int timer_usecs) 1073 { 1074 struct port_info *pi = netdev_priv(dev); 1075 struct adapter *adap = pi->adapter; 1076 int timer[MAX_NPORTS]; 1077 unsigned int port; 1078 int ret; 1079 1080 /* Grab the other adapter Network Interface current timers and fill in 1081 * the new one for this Network Interface. 1082 */ 1083 for_each_port(adap, port) 1084 if (port == pi->port_id) 1085 timer[port] = timer_usecs; 1086 else 1087 timer[port] = get_dbqtimer(adap->port[port]); 1088 1089 /* Change the global Tick first ... */ 1090 ret = set_dbqtimer_tick(dev, tick_usecs); 1091 if (ret) 1092 return ret; 1093 1094 /* ... and then set all of the Network Interface Timer Values ... */ 1095 for_each_port(adap, port) { 1096 ret = set_dbqtimer(adap->port[port], timer[port]); 1097 if (ret) 1098 return ret; 1099 } 1100 1101 return 0; 1102 } 1103 1104 static int set_coalesce(struct net_device *dev, 1105 struct ethtool_coalesce *coalesce) 1106 { 1107 int ret; 1108 1109 set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce); 1110 1111 ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs, 1112 coalesce->rx_max_coalesced_frames); 1113 if (ret) 1114 return ret; 1115 1116 return set_dbqtimer_tickval(dev, 1117 coalesce->tx_coalesce_usecs_irq, 1118 coalesce->tx_coalesce_usecs); 1119 } 1120 1121 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 1122 { 1123 const struct port_info *pi = netdev_priv(dev); 1124 const struct adapter *adap = pi->adapter; 1125 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq; 1126 1127 c->rx_coalesce_usecs = qtimer_val(adap, rq); 1128 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ? 1129 adap->sge.counter_val[rq->pktcnt_idx] : 0; 1130 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev); 1131 c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev); 1132 c->tx_coalesce_usecs = get_dbqtimer(dev); 1133 return 0; 1134 } 1135 1136 /* The next two routines implement eeprom read/write from physical addresses. 1137 */ 1138 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) 1139 { 1140 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1141 1142 if (vaddr >= 0) 1143 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); 1144 return vaddr < 0 ? vaddr : 0; 1145 } 1146 1147 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) 1148 { 1149 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1150 1151 if (vaddr >= 0) 1152 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); 1153 return vaddr < 0 ? vaddr : 0; 1154 } 1155 1156 #define EEPROM_MAGIC 0x38E2F10C 1157 1158 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e, 1159 u8 *data) 1160 { 1161 int i, err = 0; 1162 struct adapter *adapter = netdev2adap(dev); 1163 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL); 1164 1165 if (!buf) 1166 return -ENOMEM; 1167 1168 e->magic = EEPROM_MAGIC; 1169 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4) 1170 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]); 1171 1172 if (!err) 1173 memcpy(data, buf + e->offset, e->len); 1174 kvfree(buf); 1175 return err; 1176 } 1177 1178 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, 1179 u8 *data) 1180 { 1181 u8 *buf; 1182 int err = 0; 1183 u32 aligned_offset, aligned_len, *p; 1184 struct adapter *adapter = netdev2adap(dev); 1185 1186 if (eeprom->magic != EEPROM_MAGIC) 1187 return -EINVAL; 1188 1189 aligned_offset = eeprom->offset & ~3; 1190 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; 1191 1192 if (adapter->pf > 0) { 1193 u32 start = 1024 + adapter->pf * EEPROMPFSIZE; 1194 1195 if (aligned_offset < start || 1196 aligned_offset + aligned_len > start + EEPROMPFSIZE) 1197 return -EPERM; 1198 } 1199 1200 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { 1201 /* RMW possibly needed for first or last words. 1202 */ 1203 buf = kvzalloc(aligned_len, GFP_KERNEL); 1204 if (!buf) 1205 return -ENOMEM; 1206 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf); 1207 if (!err && aligned_len > 4) 1208 err = eeprom_rd_phys(adapter, 1209 aligned_offset + aligned_len - 4, 1210 (u32 *)&buf[aligned_len - 4]); 1211 if (err) 1212 goto out; 1213 memcpy(buf + (eeprom->offset & 3), data, eeprom->len); 1214 } else { 1215 buf = data; 1216 } 1217 1218 err = t4_seeprom_wp(adapter, false); 1219 if (err) 1220 goto out; 1221 1222 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { 1223 err = eeprom_wr_phys(adapter, aligned_offset, *p); 1224 aligned_offset += 4; 1225 } 1226 1227 if (!err) 1228 err = t4_seeprom_wp(adapter, true); 1229 out: 1230 if (buf != data) 1231 kvfree(buf); 1232 return err; 1233 } 1234 1235 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) 1236 { 1237 int ret; 1238 const struct firmware *fw; 1239 struct adapter *adap = netdev2adap(netdev); 1240 unsigned int mbox = PCIE_FW_MASTER_M + 1; 1241 u32 pcie_fw; 1242 unsigned int master; 1243 u8 master_vld = 0; 1244 1245 pcie_fw = t4_read_reg(adap, PCIE_FW_A); 1246 master = PCIE_FW_MASTER_G(pcie_fw); 1247 if (pcie_fw & PCIE_FW_MASTER_VLD_F) 1248 master_vld = 1; 1249 /* if csiostor is the master return */ 1250 if (master_vld && (master != adap->pf)) { 1251 dev_warn(adap->pdev_dev, 1252 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n"); 1253 return -EOPNOTSUPP; 1254 } 1255 1256 ef->data[sizeof(ef->data) - 1] = '\0'; 1257 ret = request_firmware(&fw, ef->data, adap->pdev_dev); 1258 if (ret < 0) 1259 return ret; 1260 1261 /* If the adapter has been fully initialized then we'll go ahead and 1262 * try to get the firmware's cooperation in upgrading to the new 1263 * firmware image otherwise we'll try to do the entire job from the 1264 * host ... and we always "force" the operation in this path. 1265 */ 1266 if (adap->flags & CXGB4_FULL_INIT_DONE) 1267 mbox = adap->mbox; 1268 1269 ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1); 1270 release_firmware(fw); 1271 if (!ret) 1272 dev_info(adap->pdev_dev, 1273 "loaded firmware %s, reload cxgb4 driver\n", ef->data); 1274 return ret; 1275 } 1276 1277 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info) 1278 { 1279 struct port_info *pi = netdev_priv(dev); 1280 struct adapter *adapter = pi->adapter; 1281 1282 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1283 SOF_TIMESTAMPING_RX_SOFTWARE | 1284 SOF_TIMESTAMPING_SOFTWARE; 1285 1286 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE | 1287 SOF_TIMESTAMPING_TX_HARDWARE | 1288 SOF_TIMESTAMPING_RAW_HARDWARE; 1289 1290 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | 1291 (1 << HWTSTAMP_TX_ON); 1292 1293 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 1294 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1295 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1296 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1297 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1298 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1299 1300 if (adapter->ptp_clock) 1301 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock); 1302 else 1303 ts_info->phc_index = -1; 1304 1305 return 0; 1306 } 1307 1308 static u32 get_rss_table_size(struct net_device *dev) 1309 { 1310 const struct port_info *pi = netdev_priv(dev); 1311 1312 return pi->rss_size; 1313 } 1314 1315 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc) 1316 { 1317 const struct port_info *pi = netdev_priv(dev); 1318 unsigned int n = pi->rss_size; 1319 1320 if (hfunc) 1321 *hfunc = ETH_RSS_HASH_TOP; 1322 if (!p) 1323 return 0; 1324 while (n--) 1325 p[n] = pi->rss[n]; 1326 return 0; 1327 } 1328 1329 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key, 1330 const u8 hfunc) 1331 { 1332 unsigned int i; 1333 struct port_info *pi = netdev_priv(dev); 1334 1335 /* We require at least one supported parameter to be changed and no 1336 * change in any of the unsupported parameters 1337 */ 1338 if (key || 1339 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)) 1340 return -EOPNOTSUPP; 1341 if (!p) 1342 return 0; 1343 1344 /* Interface must be brought up atleast once */ 1345 if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) { 1346 for (i = 0; i < pi->rss_size; i++) 1347 pi->rss[i] = p[i]; 1348 1349 return cxgb4_write_rss(pi, pi->rss); 1350 } 1351 1352 return -EPERM; 1353 } 1354 1355 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1356 u32 *rules) 1357 { 1358 const struct port_info *pi = netdev_priv(dev); 1359 1360 switch (info->cmd) { 1361 case ETHTOOL_GRXFH: { 1362 unsigned int v = pi->rss_mode; 1363 1364 info->data = 0; 1365 switch (info->flow_type) { 1366 case TCP_V4_FLOW: 1367 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) 1368 info->data = RXH_IP_SRC | RXH_IP_DST | 1369 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1370 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1371 info->data = RXH_IP_SRC | RXH_IP_DST; 1372 break; 1373 case UDP_V4_FLOW: 1374 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && 1375 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1376 info->data = RXH_IP_SRC | RXH_IP_DST | 1377 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1378 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1379 info->data = RXH_IP_SRC | RXH_IP_DST; 1380 break; 1381 case SCTP_V4_FLOW: 1382 case AH_ESP_V4_FLOW: 1383 case IPV4_FLOW: 1384 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1385 info->data = RXH_IP_SRC | RXH_IP_DST; 1386 break; 1387 case TCP_V6_FLOW: 1388 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) 1389 info->data = RXH_IP_SRC | RXH_IP_DST | 1390 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1391 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1392 info->data = RXH_IP_SRC | RXH_IP_DST; 1393 break; 1394 case UDP_V6_FLOW: 1395 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && 1396 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1397 info->data = RXH_IP_SRC | RXH_IP_DST | 1398 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1399 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1400 info->data = RXH_IP_SRC | RXH_IP_DST; 1401 break; 1402 case SCTP_V6_FLOW: 1403 case AH_ESP_V6_FLOW: 1404 case IPV6_FLOW: 1405 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1406 info->data = RXH_IP_SRC | RXH_IP_DST; 1407 break; 1408 } 1409 return 0; 1410 } 1411 case ETHTOOL_GRXRINGS: 1412 info->data = pi->nqsets; 1413 return 0; 1414 } 1415 return -EOPNOTSUPP; 1416 } 1417 1418 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump) 1419 { 1420 struct adapter *adapter = netdev2adap(dev); 1421 u32 len = 0; 1422 1423 len = sizeof(struct cudbg_hdr) + 1424 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1425 len += cxgb4_get_dump_length(adapter, eth_dump->flag); 1426 1427 adapter->eth_dump.flag = eth_dump->flag; 1428 adapter->eth_dump.len = len; 1429 return 0; 1430 } 1431 1432 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump) 1433 { 1434 struct adapter *adapter = netdev2adap(dev); 1435 1436 eth_dump->flag = adapter->eth_dump.flag; 1437 eth_dump->len = adapter->eth_dump.len; 1438 eth_dump->version = adapter->eth_dump.version; 1439 return 0; 1440 } 1441 1442 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump, 1443 void *buf) 1444 { 1445 struct adapter *adapter = netdev2adap(dev); 1446 u32 len = 0; 1447 int ret = 0; 1448 1449 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE) 1450 return -ENOENT; 1451 1452 len = sizeof(struct cudbg_hdr) + 1453 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1454 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag); 1455 if (eth_dump->len < len) 1456 return -ENOMEM; 1457 1458 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag); 1459 if (ret) 1460 return ret; 1461 1462 eth_dump->flag = adapter->eth_dump.flag; 1463 eth_dump->len = len; 1464 eth_dump->version = adapter->eth_dump.version; 1465 return 0; 1466 } 1467 1468 static int cxgb4_get_module_info(struct net_device *dev, 1469 struct ethtool_modinfo *modinfo) 1470 { 1471 struct port_info *pi = netdev_priv(dev); 1472 u8 sff8472_comp, sff_diag_type, sff_rev; 1473 struct adapter *adapter = pi->adapter; 1474 int ret; 1475 1476 if (!t4_is_inserted_mod_type(pi->mod_type)) 1477 return -EINVAL; 1478 1479 switch (pi->port_type) { 1480 case FW_PORT_TYPE_SFP: 1481 case FW_PORT_TYPE_QSA: 1482 case FW_PORT_TYPE_SFP28: 1483 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1484 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR, 1485 SFF_8472_COMP_LEN, &sff8472_comp); 1486 if (ret) 1487 return ret; 1488 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1489 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR, 1490 SFP_DIAG_TYPE_LEN, &sff_diag_type); 1491 if (ret) 1492 return ret; 1493 1494 if (!sff8472_comp || (sff_diag_type & 4)) { 1495 modinfo->type = ETH_MODULE_SFF_8079; 1496 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 1497 } else { 1498 modinfo->type = ETH_MODULE_SFF_8472; 1499 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1500 } 1501 break; 1502 1503 case FW_PORT_TYPE_QSFP: 1504 case FW_PORT_TYPE_QSFP_10G: 1505 case FW_PORT_TYPE_CR_QSFP: 1506 case FW_PORT_TYPE_CR2_QSFP: 1507 case FW_PORT_TYPE_CR4_QSFP: 1508 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1509 I2C_DEV_ADDR_A0, SFF_REV_ADDR, 1510 SFF_REV_LEN, &sff_rev); 1511 /* For QSFP type ports, revision value >= 3 1512 * means the SFP is 8636 compliant. 1513 */ 1514 if (ret) 1515 return ret; 1516 if (sff_rev >= 0x3) { 1517 modinfo->type = ETH_MODULE_SFF_8636; 1518 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1519 } else { 1520 modinfo->type = ETH_MODULE_SFF_8436; 1521 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1522 } 1523 break; 1524 1525 default: 1526 return -EINVAL; 1527 } 1528 1529 return 0; 1530 } 1531 1532 static int cxgb4_get_module_eeprom(struct net_device *dev, 1533 struct ethtool_eeprom *eprom, u8 *data) 1534 { 1535 int ret = 0, offset = eprom->offset, len = eprom->len; 1536 struct port_info *pi = netdev_priv(dev); 1537 struct adapter *adapter = pi->adapter; 1538 1539 memset(data, 0, eprom->len); 1540 if (offset + len <= I2C_PAGE_SIZE) 1541 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1542 I2C_DEV_ADDR_A0, offset, len, data); 1543 1544 /* offset + len spans 0xa0 and 0xa1 pages */ 1545 if (offset <= I2C_PAGE_SIZE) { 1546 /* read 0xa0 page */ 1547 len = I2C_PAGE_SIZE - offset; 1548 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1549 I2C_DEV_ADDR_A0, offset, len, data); 1550 if (ret) 1551 return ret; 1552 offset = I2C_PAGE_SIZE; 1553 /* Remaining bytes to be read from second page = 1554 * Total length - bytes read from first page 1555 */ 1556 len = eprom->len - len; 1557 } 1558 /* Read additional optical diagnostics from page 0xa2 if supported */ 1559 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2, 1560 offset, len, &data[eprom->len - len]); 1561 } 1562 1563 static u32 cxgb4_get_priv_flags(struct net_device *netdev) 1564 { 1565 struct port_info *pi = netdev_priv(netdev); 1566 struct adapter *adapter = pi->adapter; 1567 1568 return (adapter->eth_flags | pi->eth_flags); 1569 } 1570 1571 /** 1572 * set_flags - set/unset specified flags if passed in new_flags 1573 * @cur_flags: pointer to current flags 1574 * @new_flags: new incoming flags 1575 * @flags: set of flags to set/unset 1576 */ 1577 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags) 1578 { 1579 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags); 1580 } 1581 1582 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags) 1583 { 1584 struct port_info *pi = netdev_priv(netdev); 1585 struct adapter *adapter = pi->adapter; 1586 1587 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP); 1588 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT); 1589 1590 return 0; 1591 } 1592 1593 static const struct ethtool_ops cxgb_ethtool_ops = { 1594 .get_link_ksettings = get_link_ksettings, 1595 .set_link_ksettings = set_link_ksettings, 1596 .get_fecparam = get_fecparam, 1597 .set_fecparam = set_fecparam, 1598 .get_drvinfo = get_drvinfo, 1599 .get_msglevel = get_msglevel, 1600 .set_msglevel = set_msglevel, 1601 .get_ringparam = get_sge_param, 1602 .set_ringparam = set_sge_param, 1603 .get_coalesce = get_coalesce, 1604 .set_coalesce = set_coalesce, 1605 .get_eeprom_len = get_eeprom_len, 1606 .get_eeprom = get_eeprom, 1607 .set_eeprom = set_eeprom, 1608 .get_pauseparam = get_pauseparam, 1609 .set_pauseparam = set_pauseparam, 1610 .get_link = ethtool_op_get_link, 1611 .get_strings = get_strings, 1612 .set_phys_id = identify_port, 1613 .nway_reset = restart_autoneg, 1614 .get_sset_count = get_sset_count, 1615 .get_ethtool_stats = get_stats, 1616 .get_regs_len = get_regs_len, 1617 .get_regs = get_regs, 1618 .get_rxnfc = get_rxnfc, 1619 .get_rxfh_indir_size = get_rss_table_size, 1620 .get_rxfh = get_rss_table, 1621 .set_rxfh = set_rss_table, 1622 .flash_device = set_flash, 1623 .get_ts_info = get_ts_info, 1624 .set_dump = set_dump, 1625 .get_dump_flag = get_dump_flag, 1626 .get_dump_data = get_dump_data, 1627 .get_module_info = cxgb4_get_module_info, 1628 .get_module_eeprom = cxgb4_get_module_eeprom, 1629 .get_priv_flags = cxgb4_get_priv_flags, 1630 .set_priv_flags = cxgb4_set_priv_flags, 1631 }; 1632 1633 void cxgb4_set_ethtool_ops(struct net_device *netdev) 1634 { 1635 netdev->ethtool_ops = &cxgb_ethtool_ops; 1636 } 1637