1 /* 2 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 */ 17 18 #include <linux/firmware.h> 19 #include <linux/mdio.h> 20 21 #include "cxgb4.h" 22 #include "t4_regs.h" 23 #include "t4fw_api.h" 24 #include "cxgb4_cudbg.h" 25 26 #define EEPROM_MAGIC 0x38E2F10C 27 28 static u32 get_msglevel(struct net_device *dev) 29 { 30 return netdev2adap(dev)->msg_enable; 31 } 32 33 static void set_msglevel(struct net_device *dev, u32 val) 34 { 35 netdev2adap(dev)->msg_enable = val; 36 } 37 38 static const char stats_strings[][ETH_GSTRING_LEN] = { 39 "tx_octets_ok ", 40 "tx_frames_ok ", 41 "tx_broadcast_frames ", 42 "tx_multicast_frames ", 43 "tx_unicast_frames ", 44 "tx_error_frames ", 45 46 "tx_frames_64 ", 47 "tx_frames_65_to_127 ", 48 "tx_frames_128_to_255 ", 49 "tx_frames_256_to_511 ", 50 "tx_frames_512_to_1023 ", 51 "tx_frames_1024_to_1518 ", 52 "tx_frames_1519_to_max ", 53 54 "tx_frames_dropped ", 55 "tx_pause_frames ", 56 "tx_ppp0_frames ", 57 "tx_ppp1_frames ", 58 "tx_ppp2_frames ", 59 "tx_ppp3_frames ", 60 "tx_ppp4_frames ", 61 "tx_ppp5_frames ", 62 "tx_ppp6_frames ", 63 "tx_ppp7_frames ", 64 65 "rx_octets_ok ", 66 "rx_frames_ok ", 67 "rx_broadcast_frames ", 68 "rx_multicast_frames ", 69 "rx_unicast_frames ", 70 71 "rx_frames_too_long ", 72 "rx_jabber_errors ", 73 "rx_fcs_errors ", 74 "rx_length_errors ", 75 "rx_symbol_errors ", 76 "rx_runt_frames ", 77 78 "rx_frames_64 ", 79 "rx_frames_65_to_127 ", 80 "rx_frames_128_to_255 ", 81 "rx_frames_256_to_511 ", 82 "rx_frames_512_to_1023 ", 83 "rx_frames_1024_to_1518 ", 84 "rx_frames_1519_to_max ", 85 86 "rx_pause_frames ", 87 "rx_ppp0_frames ", 88 "rx_ppp1_frames ", 89 "rx_ppp2_frames ", 90 "rx_ppp3_frames ", 91 "rx_ppp4_frames ", 92 "rx_ppp5_frames ", 93 "rx_ppp6_frames ", 94 "rx_ppp7_frames ", 95 96 "rx_bg0_frames_dropped ", 97 "rx_bg1_frames_dropped ", 98 "rx_bg2_frames_dropped ", 99 "rx_bg3_frames_dropped ", 100 "rx_bg0_frames_trunc ", 101 "rx_bg1_frames_trunc ", 102 "rx_bg2_frames_trunc ", 103 "rx_bg3_frames_trunc ", 104 105 "tso ", 106 "tx_csum_offload ", 107 "rx_csum_good ", 108 "vlan_extractions ", 109 "vlan_insertions ", 110 "gro_packets ", 111 "gro_merged ", 112 }; 113 114 static char adapter_stats_strings[][ETH_GSTRING_LEN] = { 115 "db_drop ", 116 "db_full ", 117 "db_empty ", 118 "write_coal_success ", 119 "write_coal_fail ", 120 }; 121 122 static char loopback_stats_strings[][ETH_GSTRING_LEN] = { 123 "-------Loopback----------- ", 124 "octets_ok ", 125 "frames_ok ", 126 "bcast_frames ", 127 "mcast_frames ", 128 "ucast_frames ", 129 "error_frames ", 130 "frames_64 ", 131 "frames_65_to_127 ", 132 "frames_128_to_255 ", 133 "frames_256_to_511 ", 134 "frames_512_to_1023 ", 135 "frames_1024_to_1518 ", 136 "frames_1519_to_max ", 137 "frames_dropped ", 138 "bg0_frames_dropped ", 139 "bg1_frames_dropped ", 140 "bg2_frames_dropped ", 141 "bg3_frames_dropped ", 142 "bg0_frames_trunc ", 143 "bg1_frames_trunc ", 144 "bg2_frames_trunc ", 145 "bg3_frames_trunc ", 146 }; 147 148 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = { 149 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr", 150 }; 151 152 static int get_sset_count(struct net_device *dev, int sset) 153 { 154 switch (sset) { 155 case ETH_SS_STATS: 156 return ARRAY_SIZE(stats_strings) + 157 ARRAY_SIZE(adapter_stats_strings) + 158 ARRAY_SIZE(loopback_stats_strings); 159 case ETH_SS_PRIV_FLAGS: 160 return ARRAY_SIZE(cxgb4_priv_flags_strings); 161 default: 162 return -EOPNOTSUPP; 163 } 164 } 165 166 static int get_regs_len(struct net_device *dev) 167 { 168 struct adapter *adap = netdev2adap(dev); 169 170 return t4_get_regs_len(adap); 171 } 172 173 static int get_eeprom_len(struct net_device *dev) 174 { 175 return EEPROMSIZE; 176 } 177 178 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 179 { 180 struct adapter *adapter = netdev2adap(dev); 181 u32 exprom_vers; 182 183 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver)); 184 strlcpy(info->version, cxgb4_driver_version, 185 sizeof(info->version)); 186 strlcpy(info->bus_info, pci_name(adapter->pdev), 187 sizeof(info->bus_info)); 188 info->regdump_len = get_regs_len(dev); 189 190 if (!adapter->params.fw_vers) 191 strcpy(info->fw_version, "N/A"); 192 else 193 snprintf(info->fw_version, sizeof(info->fw_version), 194 "%u.%u.%u.%u, TP %u.%u.%u.%u", 195 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers), 196 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers), 197 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers), 198 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers), 199 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers), 200 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers), 201 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers), 202 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers)); 203 204 if (!t4_get_exprom_version(adapter, &exprom_vers)) 205 snprintf(info->erom_version, sizeof(info->erom_version), 206 "%u.%u.%u.%u", 207 FW_HDR_FW_VER_MAJOR_G(exprom_vers), 208 FW_HDR_FW_VER_MINOR_G(exprom_vers), 209 FW_HDR_FW_VER_MICRO_G(exprom_vers), 210 FW_HDR_FW_VER_BUILD_G(exprom_vers)); 211 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings); 212 } 213 214 static void get_strings(struct net_device *dev, u32 stringset, u8 *data) 215 { 216 if (stringset == ETH_SS_STATS) { 217 memcpy(data, stats_strings, sizeof(stats_strings)); 218 data += sizeof(stats_strings); 219 memcpy(data, adapter_stats_strings, 220 sizeof(adapter_stats_strings)); 221 data += sizeof(adapter_stats_strings); 222 memcpy(data, loopback_stats_strings, 223 sizeof(loopback_stats_strings)); 224 } else if (stringset == ETH_SS_PRIV_FLAGS) { 225 memcpy(data, cxgb4_priv_flags_strings, 226 sizeof(cxgb4_priv_flags_strings)); 227 } 228 } 229 230 /* port stats maintained per queue of the port. They should be in the same 231 * order as in stats_strings above. 232 */ 233 struct queue_port_stats { 234 u64 tso; 235 u64 tx_csum; 236 u64 rx_csum; 237 u64 vlan_ex; 238 u64 vlan_ins; 239 u64 gro_pkts; 240 u64 gro_merged; 241 }; 242 243 struct adapter_stats { 244 u64 db_drop; 245 u64 db_full; 246 u64 db_empty; 247 u64 wc_success; 248 u64 wc_fail; 249 }; 250 251 static void collect_sge_port_stats(const struct adapter *adap, 252 const struct port_info *p, 253 struct queue_port_stats *s) 254 { 255 int i; 256 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset]; 257 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset]; 258 259 memset(s, 0, sizeof(*s)); 260 for (i = 0; i < p->nqsets; i++, rx++, tx++) { 261 s->tso += tx->tso; 262 s->tx_csum += tx->tx_cso; 263 s->rx_csum += rx->stats.rx_cso; 264 s->vlan_ex += rx->stats.vlan_ex; 265 s->vlan_ins += tx->vlan_ins; 266 s->gro_pkts += rx->stats.lro_pkts; 267 s->gro_merged += rx->stats.lro_merged; 268 } 269 } 270 271 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s) 272 { 273 u64 val1, val2; 274 275 memset(s, 0, sizeof(*s)); 276 277 s->db_drop = adap->db_stats.db_drop; 278 s->db_full = adap->db_stats.db_full; 279 s->db_empty = adap->db_stats.db_empty; 280 281 if (!is_t4(adap->params.chip)) { 282 int v; 283 284 v = t4_read_reg(adap, SGE_STAT_CFG_A); 285 if (STATSOURCE_T5_G(v) == 7) { 286 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A); 287 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A); 288 s->wc_success = val1 - val2; 289 s->wc_fail = val2; 290 } 291 } 292 } 293 294 static void get_stats(struct net_device *dev, struct ethtool_stats *stats, 295 u64 *data) 296 { 297 struct port_info *pi = netdev_priv(dev); 298 struct adapter *adapter = pi->adapter; 299 struct lb_port_stats s; 300 int i; 301 u64 *p0; 302 303 t4_get_port_stats_offset(adapter, pi->tx_chan, 304 (struct port_stats *)data, 305 &pi->stats_base); 306 307 data += sizeof(struct port_stats) / sizeof(u64); 308 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); 309 data += sizeof(struct queue_port_stats) / sizeof(u64); 310 collect_adapter_stats(adapter, (struct adapter_stats *)data); 311 data += sizeof(struct adapter_stats) / sizeof(u64); 312 313 *data++ = (u64)pi->port_id; 314 memset(&s, 0, sizeof(s)); 315 t4_get_lb_stats(adapter, pi->port_id, &s); 316 317 p0 = &s.octets; 318 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++) 319 *data++ = (unsigned long long)*p0++; 320 } 321 322 static void get_regs(struct net_device *dev, struct ethtool_regs *regs, 323 void *buf) 324 { 325 struct adapter *adap = netdev2adap(dev); 326 size_t buf_size; 327 328 buf_size = t4_get_regs_len(adap); 329 regs->version = mk_adap_vers(adap); 330 t4_get_regs(adap, buf, buf_size); 331 } 332 333 static int restart_autoneg(struct net_device *dev) 334 { 335 struct port_info *p = netdev_priv(dev); 336 337 if (!netif_running(dev)) 338 return -EAGAIN; 339 if (p->link_cfg.autoneg != AUTONEG_ENABLE) 340 return -EINVAL; 341 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan); 342 return 0; 343 } 344 345 static int identify_port(struct net_device *dev, 346 enum ethtool_phys_id_state state) 347 { 348 unsigned int val; 349 struct adapter *adap = netdev2adap(dev); 350 351 if (state == ETHTOOL_ID_ACTIVE) 352 val = 0xffff; 353 else if (state == ETHTOOL_ID_INACTIVE) 354 val = 0; 355 else 356 return -EINVAL; 357 358 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val); 359 } 360 361 /** 362 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool 363 * @port_type: Firmware Port Type 364 * @mod_type: Firmware Module Type 365 * 366 * Translate Firmware Port/Module type to Ethtool Port Type. 367 */ 368 static int from_fw_port_mod_type(enum fw_port_type port_type, 369 enum fw_port_module_type mod_type) 370 { 371 if (port_type == FW_PORT_TYPE_BT_SGMII || 372 port_type == FW_PORT_TYPE_BT_XFI || 373 port_type == FW_PORT_TYPE_BT_XAUI) { 374 return PORT_TP; 375 } else if (port_type == FW_PORT_TYPE_FIBER_XFI || 376 port_type == FW_PORT_TYPE_FIBER_XAUI) { 377 return PORT_FIBRE; 378 } else if (port_type == FW_PORT_TYPE_SFP || 379 port_type == FW_PORT_TYPE_QSFP_10G || 380 port_type == FW_PORT_TYPE_QSA || 381 port_type == FW_PORT_TYPE_QSFP || 382 port_type == FW_PORT_TYPE_CR4_QSFP || 383 port_type == FW_PORT_TYPE_CR_QSFP || 384 port_type == FW_PORT_TYPE_CR2_QSFP || 385 port_type == FW_PORT_TYPE_SFP28) { 386 if (mod_type == FW_PORT_MOD_TYPE_LR || 387 mod_type == FW_PORT_MOD_TYPE_SR || 388 mod_type == FW_PORT_MOD_TYPE_ER || 389 mod_type == FW_PORT_MOD_TYPE_LRM) 390 return PORT_FIBRE; 391 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || 392 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) 393 return PORT_DA; 394 else 395 return PORT_OTHER; 396 } else if (port_type == FW_PORT_TYPE_KR4_100G || 397 port_type == FW_PORT_TYPE_KR_SFP28 || 398 port_type == FW_PORT_TYPE_KR_XLAUI) { 399 return PORT_NONE; 400 } 401 402 return PORT_OTHER; 403 } 404 405 /** 406 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities 407 * @speed: speed in Kb/s 408 * 409 * Translates a specific Port Speed into a Firmware Port Capabilities 410 * value. 411 */ 412 static unsigned int speed_to_fw_caps(int speed) 413 { 414 if (speed == 100) 415 return FW_PORT_CAP32_SPEED_100M; 416 if (speed == 1000) 417 return FW_PORT_CAP32_SPEED_1G; 418 if (speed == 10000) 419 return FW_PORT_CAP32_SPEED_10G; 420 if (speed == 25000) 421 return FW_PORT_CAP32_SPEED_25G; 422 if (speed == 40000) 423 return FW_PORT_CAP32_SPEED_40G; 424 if (speed == 50000) 425 return FW_PORT_CAP32_SPEED_50G; 426 if (speed == 100000) 427 return FW_PORT_CAP32_SPEED_100G; 428 if (speed == 200000) 429 return FW_PORT_CAP32_SPEED_200G; 430 if (speed == 400000) 431 return FW_PORT_CAP32_SPEED_400G; 432 return 0; 433 } 434 435 /** 436 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask 437 * @port_type: Firmware Port Type 438 * @fw_caps: Firmware Port Capabilities 439 * @link_mode_mask: ethtool Link Mode Mask 440 * 441 * Translate a Firmware Port Capabilities specification to an ethtool 442 * Link Mode Mask. 443 */ 444 static void fw_caps_to_lmm(enum fw_port_type port_type, 445 unsigned int fw_caps, 446 unsigned long *link_mode_mask) 447 { 448 #define SET_LMM(__lmm_name) \ 449 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 450 link_mode_mask) 451 452 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \ 453 do { \ 454 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \ 455 SET_LMM(__lmm_name); \ 456 } while (0) 457 458 switch (port_type) { 459 case FW_PORT_TYPE_BT_SGMII: 460 case FW_PORT_TYPE_BT_XFI: 461 case FW_PORT_TYPE_BT_XAUI: 462 SET_LMM(TP); 463 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full); 464 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 465 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 466 break; 467 468 case FW_PORT_TYPE_KX4: 469 case FW_PORT_TYPE_KX: 470 SET_LMM(Backplane); 471 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 472 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 473 break; 474 475 case FW_PORT_TYPE_KR: 476 SET_LMM(Backplane); 477 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 478 break; 479 480 case FW_PORT_TYPE_BP_AP: 481 SET_LMM(Backplane); 482 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 483 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 484 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 485 break; 486 487 case FW_PORT_TYPE_BP4_AP: 488 SET_LMM(Backplane); 489 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 490 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 491 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 492 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 493 break; 494 495 case FW_PORT_TYPE_FIBER_XFI: 496 case FW_PORT_TYPE_FIBER_XAUI: 497 case FW_PORT_TYPE_SFP: 498 case FW_PORT_TYPE_QSFP_10G: 499 case FW_PORT_TYPE_QSA: 500 SET_LMM(FIBRE); 501 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 502 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 503 break; 504 505 case FW_PORT_TYPE_BP40_BA: 506 case FW_PORT_TYPE_QSFP: 507 SET_LMM(FIBRE); 508 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 509 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 510 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 511 break; 512 513 case FW_PORT_TYPE_CR_QSFP: 514 case FW_PORT_TYPE_SFP28: 515 SET_LMM(FIBRE); 516 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 517 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 518 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 519 break; 520 521 case FW_PORT_TYPE_KR_SFP28: 522 SET_LMM(Backplane); 523 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 524 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 525 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full); 526 break; 527 528 case FW_PORT_TYPE_KR_XLAUI: 529 SET_LMM(Backplane); 530 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 531 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 532 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full); 533 break; 534 535 case FW_PORT_TYPE_CR2_QSFP: 536 SET_LMM(FIBRE); 537 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full); 538 break; 539 540 case FW_PORT_TYPE_KR4_100G: 541 case FW_PORT_TYPE_CR4_QSFP: 542 SET_LMM(FIBRE); 543 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 544 FW_CAPS_TO_LMM(SPEED_10G, 10000baseSR_Full); 545 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 546 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 547 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full); 548 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full); 549 break; 550 551 default: 552 break; 553 } 554 555 FW_CAPS_TO_LMM(ANEG, Autoneg); 556 FW_CAPS_TO_LMM(802_3_PAUSE, Pause); 557 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause); 558 559 #undef FW_CAPS_TO_LMM 560 #undef SET_LMM 561 } 562 563 /** 564 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware 565 * capabilities 566 * @et_lmm: ethtool Link Mode Mask 567 * 568 * Translate ethtool Link Mode Mask into a Firmware Port capabilities 569 * value. 570 */ 571 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask) 572 { 573 unsigned int fw_caps = 0; 574 575 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \ 576 do { \ 577 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 578 link_mode_mask)) \ 579 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \ 580 } while (0) 581 582 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M); 583 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G); 584 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G); 585 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G); 586 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G); 587 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G); 588 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G); 589 590 #undef LMM_TO_FW_CAPS 591 592 return fw_caps; 593 } 594 595 static int get_link_ksettings(struct net_device *dev, 596 struct ethtool_link_ksettings *link_ksettings) 597 { 598 struct port_info *pi = netdev_priv(dev); 599 struct ethtool_link_settings *base = &link_ksettings->base; 600 601 /* For the nonce, the Firmware doesn't send up Port State changes 602 * when the Virtual Interface attached to the Port is down. So 603 * if it's down, let's grab any changes. 604 */ 605 if (!netif_running(dev)) 606 (void)t4_update_port_info(pi); 607 608 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported); 609 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising); 610 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising); 611 612 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type); 613 614 if (pi->mdio_addr >= 0) { 615 base->phy_address = pi->mdio_addr; 616 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII 617 ? ETH_MDIO_SUPPORTS_C22 618 : ETH_MDIO_SUPPORTS_C45); 619 } else { 620 base->phy_address = 255; 621 base->mdio_support = 0; 622 } 623 624 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps, 625 link_ksettings->link_modes.supported); 626 fw_caps_to_lmm(pi->port_type, pi->link_cfg.acaps, 627 link_ksettings->link_modes.advertising); 628 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps, 629 link_ksettings->link_modes.lp_advertising); 630 631 base->speed = (netif_carrier_ok(dev) 632 ? pi->link_cfg.speed 633 : SPEED_UNKNOWN); 634 base->duplex = DUPLEX_FULL; 635 636 if (pi->link_cfg.fc & PAUSE_RX) { 637 if (pi->link_cfg.fc & PAUSE_TX) { 638 ethtool_link_ksettings_add_link_mode(link_ksettings, 639 advertising, 640 Pause); 641 } else { 642 ethtool_link_ksettings_add_link_mode(link_ksettings, 643 advertising, 644 Asym_Pause); 645 } 646 } else if (pi->link_cfg.fc & PAUSE_TX) { 647 ethtool_link_ksettings_add_link_mode(link_ksettings, 648 advertising, 649 Asym_Pause); 650 } 651 652 base->autoneg = pi->link_cfg.autoneg; 653 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) 654 ethtool_link_ksettings_add_link_mode(link_ksettings, 655 supported, Autoneg); 656 if (pi->link_cfg.autoneg) 657 ethtool_link_ksettings_add_link_mode(link_ksettings, 658 advertising, Autoneg); 659 660 return 0; 661 } 662 663 static int set_link_ksettings(struct net_device *dev, 664 const struct ethtool_link_ksettings *link_ksettings) 665 { 666 struct port_info *pi = netdev_priv(dev); 667 struct link_config *lc = &pi->link_cfg; 668 const struct ethtool_link_settings *base = &link_ksettings->base; 669 struct link_config old_lc; 670 unsigned int fw_caps; 671 int ret = 0; 672 673 /* only full-duplex supported */ 674 if (base->duplex != DUPLEX_FULL) 675 return -EINVAL; 676 677 old_lc = *lc; 678 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) || 679 base->autoneg == AUTONEG_DISABLE) { 680 fw_caps = speed_to_fw_caps(base->speed); 681 682 /* Must only specify a single speed which must be supported 683 * as part of the Physical Port Capabilities. 684 */ 685 if ((fw_caps & (fw_caps - 1)) != 0 || 686 !(lc->pcaps & fw_caps)) 687 return -EINVAL; 688 689 lc->speed_caps = fw_caps; 690 lc->acaps = fw_caps; 691 } else { 692 fw_caps = 693 lmm_to_fw_caps(link_ksettings->link_modes.advertising); 694 if (!(lc->pcaps & fw_caps)) 695 return -EINVAL; 696 lc->speed_caps = 0; 697 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG; 698 } 699 lc->autoneg = base->autoneg; 700 701 /* If the firmware rejects the Link Configuration request, back out 702 * the changes and report the error. 703 */ 704 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc); 705 if (ret) 706 *lc = old_lc; 707 708 return ret; 709 } 710 711 /* Translate the Firmware FEC value into the ethtool value. */ 712 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec) 713 { 714 unsigned int eth_fec = 0; 715 716 if (fw_fec & FW_PORT_CAP32_FEC_RS) 717 eth_fec |= ETHTOOL_FEC_RS; 718 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 719 eth_fec |= ETHTOOL_FEC_BASER; 720 721 /* if nothing is set, then FEC is off */ 722 if (!eth_fec) 723 eth_fec = ETHTOOL_FEC_OFF; 724 725 return eth_fec; 726 } 727 728 /* Translate Common Code FEC value into ethtool value. */ 729 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec) 730 { 731 unsigned int eth_fec = 0; 732 733 if (cc_fec & FEC_AUTO) 734 eth_fec |= ETHTOOL_FEC_AUTO; 735 if (cc_fec & FEC_RS) 736 eth_fec |= ETHTOOL_FEC_RS; 737 if (cc_fec & FEC_BASER_RS) 738 eth_fec |= ETHTOOL_FEC_BASER; 739 740 /* if nothing is set, then FEC is off */ 741 if (!eth_fec) 742 eth_fec = ETHTOOL_FEC_OFF; 743 744 return eth_fec; 745 } 746 747 /* Translate ethtool FEC value into Common Code value. */ 748 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec) 749 { 750 unsigned int cc_fec = 0; 751 752 if (eth_fec & ETHTOOL_FEC_OFF) 753 return cc_fec; 754 755 if (eth_fec & ETHTOOL_FEC_AUTO) 756 cc_fec |= FEC_AUTO; 757 if (eth_fec & ETHTOOL_FEC_RS) 758 cc_fec |= FEC_RS; 759 if (eth_fec & ETHTOOL_FEC_BASER) 760 cc_fec |= FEC_BASER_RS; 761 762 return cc_fec; 763 } 764 765 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 766 { 767 const struct port_info *pi = netdev_priv(dev); 768 const struct link_config *lc = &pi->link_cfg; 769 770 /* Translate the Firmware FEC Support into the ethtool value. We 771 * always support IEEE 802.3 "automatic" selection of Link FEC type if 772 * any FEC is supported. 773 */ 774 fec->fec = fwcap_to_eth_fec(lc->pcaps); 775 if (fec->fec != ETHTOOL_FEC_OFF) 776 fec->fec |= ETHTOOL_FEC_AUTO; 777 778 /* Translate the current internal FEC parameters into the 779 * ethtool values. 780 */ 781 fec->active_fec = cc_to_eth_fec(lc->fec); 782 783 return 0; 784 } 785 786 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 787 { 788 struct port_info *pi = netdev_priv(dev); 789 struct link_config *lc = &pi->link_cfg; 790 struct link_config old_lc; 791 int ret; 792 793 /* Save old Link Configuration in case the L1 Configure below 794 * fails. 795 */ 796 old_lc = *lc; 797 798 /* Try to perform the L1 Configure and return the result of that 799 * effort. If it fails, revert the attempted change. 800 */ 801 lc->requested_fec = eth_to_cc_fec(fec->fec); 802 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, 803 pi->tx_chan, lc); 804 if (ret) 805 *lc = old_lc; 806 return ret; 807 } 808 809 static void get_pauseparam(struct net_device *dev, 810 struct ethtool_pauseparam *epause) 811 { 812 struct port_info *p = netdev_priv(dev); 813 814 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0; 815 epause->rx_pause = (p->link_cfg.fc & PAUSE_RX) != 0; 816 epause->tx_pause = (p->link_cfg.fc & PAUSE_TX) != 0; 817 } 818 819 static int set_pauseparam(struct net_device *dev, 820 struct ethtool_pauseparam *epause) 821 { 822 struct port_info *p = netdev_priv(dev); 823 struct link_config *lc = &p->link_cfg; 824 825 if (epause->autoneg == AUTONEG_DISABLE) 826 lc->requested_fc = 0; 827 else if (lc->pcaps & FW_PORT_CAP32_ANEG) 828 lc->requested_fc = PAUSE_AUTONEG; 829 else 830 return -EINVAL; 831 832 if (epause->rx_pause) 833 lc->requested_fc |= PAUSE_RX; 834 if (epause->tx_pause) 835 lc->requested_fc |= PAUSE_TX; 836 if (netif_running(dev)) 837 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan, 838 lc); 839 return 0; 840 } 841 842 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 843 { 844 const struct port_info *pi = netdev_priv(dev); 845 const struct sge *s = &pi->adapter->sge; 846 847 e->rx_max_pending = MAX_RX_BUFFERS; 848 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES; 849 e->rx_jumbo_max_pending = 0; 850 e->tx_max_pending = MAX_TXQ_ENTRIES; 851 852 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8; 853 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size; 854 e->rx_jumbo_pending = 0; 855 e->tx_pending = s->ethtxq[pi->first_qset].q.size; 856 } 857 858 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 859 { 860 int i; 861 const struct port_info *pi = netdev_priv(dev); 862 struct adapter *adapter = pi->adapter; 863 struct sge *s = &adapter->sge; 864 865 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending || 866 e->tx_pending > MAX_TXQ_ENTRIES || 867 e->rx_mini_pending > MAX_RSPQ_ENTRIES || 868 e->rx_mini_pending < MIN_RSPQ_ENTRIES || 869 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES) 870 return -EINVAL; 871 872 if (adapter->flags & FULL_INIT_DONE) 873 return -EBUSY; 874 875 for (i = 0; i < pi->nqsets; ++i) { 876 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending; 877 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8; 878 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending; 879 } 880 return 0; 881 } 882 883 /** 884 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete! 885 * @dev: the network device 886 * @us: the hold-off time in us, or 0 to disable timer 887 * @cnt: the hold-off packet count, or 0 to disable counter 888 * 889 * Set the RX interrupt hold-off parameters for a network device. 890 */ 891 static int set_rx_intr_params(struct net_device *dev, 892 unsigned int us, unsigned int cnt) 893 { 894 int i, err; 895 struct port_info *pi = netdev_priv(dev); 896 struct adapter *adap = pi->adapter; 897 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 898 899 for (i = 0; i < pi->nqsets; i++, q++) { 900 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt); 901 if (err) 902 return err; 903 } 904 return 0; 905 } 906 907 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx) 908 { 909 int i; 910 struct port_info *pi = netdev_priv(dev); 911 struct adapter *adap = pi->adapter; 912 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 913 914 for (i = 0; i < pi->nqsets; i++, q++) 915 q->rspq.adaptive_rx = adaptive_rx; 916 917 return 0; 918 } 919 920 static int get_adaptive_rx_setting(struct net_device *dev) 921 { 922 struct port_info *pi = netdev_priv(dev); 923 struct adapter *adap = pi->adapter; 924 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 925 926 return q->rspq.adaptive_rx; 927 } 928 929 static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 930 { 931 set_adaptive_rx_setting(dev, c->use_adaptive_rx_coalesce); 932 return set_rx_intr_params(dev, c->rx_coalesce_usecs, 933 c->rx_max_coalesced_frames); 934 } 935 936 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 937 { 938 const struct port_info *pi = netdev_priv(dev); 939 const struct adapter *adap = pi->adapter; 940 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq; 941 942 c->rx_coalesce_usecs = qtimer_val(adap, rq); 943 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ? 944 adap->sge.counter_val[rq->pktcnt_idx] : 0; 945 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev); 946 return 0; 947 } 948 949 /* The next two routines implement eeprom read/write from physical addresses. 950 */ 951 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) 952 { 953 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 954 955 if (vaddr >= 0) 956 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); 957 return vaddr < 0 ? vaddr : 0; 958 } 959 960 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) 961 { 962 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 963 964 if (vaddr >= 0) 965 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); 966 return vaddr < 0 ? vaddr : 0; 967 } 968 969 #define EEPROM_MAGIC 0x38E2F10C 970 971 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e, 972 u8 *data) 973 { 974 int i, err = 0; 975 struct adapter *adapter = netdev2adap(dev); 976 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL); 977 978 if (!buf) 979 return -ENOMEM; 980 981 e->magic = EEPROM_MAGIC; 982 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4) 983 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]); 984 985 if (!err) 986 memcpy(data, buf + e->offset, e->len); 987 kvfree(buf); 988 return err; 989 } 990 991 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, 992 u8 *data) 993 { 994 u8 *buf; 995 int err = 0; 996 u32 aligned_offset, aligned_len, *p; 997 struct adapter *adapter = netdev2adap(dev); 998 999 if (eeprom->magic != EEPROM_MAGIC) 1000 return -EINVAL; 1001 1002 aligned_offset = eeprom->offset & ~3; 1003 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; 1004 1005 if (adapter->pf > 0) { 1006 u32 start = 1024 + adapter->pf * EEPROMPFSIZE; 1007 1008 if (aligned_offset < start || 1009 aligned_offset + aligned_len > start + EEPROMPFSIZE) 1010 return -EPERM; 1011 } 1012 1013 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { 1014 /* RMW possibly needed for first or last words. 1015 */ 1016 buf = kvzalloc(aligned_len, GFP_KERNEL); 1017 if (!buf) 1018 return -ENOMEM; 1019 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf); 1020 if (!err && aligned_len > 4) 1021 err = eeprom_rd_phys(adapter, 1022 aligned_offset + aligned_len - 4, 1023 (u32 *)&buf[aligned_len - 4]); 1024 if (err) 1025 goto out; 1026 memcpy(buf + (eeprom->offset & 3), data, eeprom->len); 1027 } else { 1028 buf = data; 1029 } 1030 1031 err = t4_seeprom_wp(adapter, false); 1032 if (err) 1033 goto out; 1034 1035 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { 1036 err = eeprom_wr_phys(adapter, aligned_offset, *p); 1037 aligned_offset += 4; 1038 } 1039 1040 if (!err) 1041 err = t4_seeprom_wp(adapter, true); 1042 out: 1043 if (buf != data) 1044 kvfree(buf); 1045 return err; 1046 } 1047 1048 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) 1049 { 1050 int ret; 1051 const struct firmware *fw; 1052 struct adapter *adap = netdev2adap(netdev); 1053 unsigned int mbox = PCIE_FW_MASTER_M + 1; 1054 u32 pcie_fw; 1055 unsigned int master; 1056 u8 master_vld = 0; 1057 1058 pcie_fw = t4_read_reg(adap, PCIE_FW_A); 1059 master = PCIE_FW_MASTER_G(pcie_fw); 1060 if (pcie_fw & PCIE_FW_MASTER_VLD_F) 1061 master_vld = 1; 1062 /* if csiostor is the master return */ 1063 if (master_vld && (master != adap->pf)) { 1064 dev_warn(adap->pdev_dev, 1065 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n"); 1066 return -EOPNOTSUPP; 1067 } 1068 1069 ef->data[sizeof(ef->data) - 1] = '\0'; 1070 ret = request_firmware(&fw, ef->data, adap->pdev_dev); 1071 if (ret < 0) 1072 return ret; 1073 1074 /* If the adapter has been fully initialized then we'll go ahead and 1075 * try to get the firmware's cooperation in upgrading to the new 1076 * firmware image otherwise we'll try to do the entire job from the 1077 * host ... and we always "force" the operation in this path. 1078 */ 1079 if (adap->flags & FULL_INIT_DONE) 1080 mbox = adap->mbox; 1081 1082 ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1); 1083 release_firmware(fw); 1084 if (!ret) 1085 dev_info(adap->pdev_dev, 1086 "loaded firmware %s, reload cxgb4 driver\n", ef->data); 1087 return ret; 1088 } 1089 1090 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info) 1091 { 1092 struct port_info *pi = netdev_priv(dev); 1093 struct adapter *adapter = pi->adapter; 1094 1095 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1096 SOF_TIMESTAMPING_RX_SOFTWARE | 1097 SOF_TIMESTAMPING_SOFTWARE; 1098 1099 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE | 1100 SOF_TIMESTAMPING_TX_HARDWARE | 1101 SOF_TIMESTAMPING_RAW_HARDWARE; 1102 1103 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | 1104 (1 << HWTSTAMP_TX_ON); 1105 1106 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 1107 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1108 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1109 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1110 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1111 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1112 1113 if (adapter->ptp_clock) 1114 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock); 1115 else 1116 ts_info->phc_index = -1; 1117 1118 return 0; 1119 } 1120 1121 static u32 get_rss_table_size(struct net_device *dev) 1122 { 1123 const struct port_info *pi = netdev_priv(dev); 1124 1125 return pi->rss_size; 1126 } 1127 1128 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc) 1129 { 1130 const struct port_info *pi = netdev_priv(dev); 1131 unsigned int n = pi->rss_size; 1132 1133 if (hfunc) 1134 *hfunc = ETH_RSS_HASH_TOP; 1135 if (!p) 1136 return 0; 1137 while (n--) 1138 p[n] = pi->rss[n]; 1139 return 0; 1140 } 1141 1142 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key, 1143 const u8 hfunc) 1144 { 1145 unsigned int i; 1146 struct port_info *pi = netdev_priv(dev); 1147 1148 /* We require at least one supported parameter to be changed and no 1149 * change in any of the unsupported parameters 1150 */ 1151 if (key || 1152 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)) 1153 return -EOPNOTSUPP; 1154 if (!p) 1155 return 0; 1156 1157 /* Interface must be brought up atleast once */ 1158 if (pi->adapter->flags & FULL_INIT_DONE) { 1159 for (i = 0; i < pi->rss_size; i++) 1160 pi->rss[i] = p[i]; 1161 1162 return cxgb4_write_rss(pi, pi->rss); 1163 } 1164 1165 return -EPERM; 1166 } 1167 1168 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1169 u32 *rules) 1170 { 1171 const struct port_info *pi = netdev_priv(dev); 1172 1173 switch (info->cmd) { 1174 case ETHTOOL_GRXFH: { 1175 unsigned int v = pi->rss_mode; 1176 1177 info->data = 0; 1178 switch (info->flow_type) { 1179 case TCP_V4_FLOW: 1180 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) 1181 info->data = RXH_IP_SRC | RXH_IP_DST | 1182 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1183 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1184 info->data = RXH_IP_SRC | RXH_IP_DST; 1185 break; 1186 case UDP_V4_FLOW: 1187 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && 1188 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1189 info->data = RXH_IP_SRC | RXH_IP_DST | 1190 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1191 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1192 info->data = RXH_IP_SRC | RXH_IP_DST; 1193 break; 1194 case SCTP_V4_FLOW: 1195 case AH_ESP_V4_FLOW: 1196 case IPV4_FLOW: 1197 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1198 info->data = RXH_IP_SRC | RXH_IP_DST; 1199 break; 1200 case TCP_V6_FLOW: 1201 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) 1202 info->data = RXH_IP_SRC | RXH_IP_DST | 1203 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1204 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1205 info->data = RXH_IP_SRC | RXH_IP_DST; 1206 break; 1207 case UDP_V6_FLOW: 1208 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && 1209 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1210 info->data = RXH_IP_SRC | RXH_IP_DST | 1211 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1212 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1213 info->data = RXH_IP_SRC | RXH_IP_DST; 1214 break; 1215 case SCTP_V6_FLOW: 1216 case AH_ESP_V6_FLOW: 1217 case IPV6_FLOW: 1218 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1219 info->data = RXH_IP_SRC | RXH_IP_DST; 1220 break; 1221 } 1222 return 0; 1223 } 1224 case ETHTOOL_GRXRINGS: 1225 info->data = pi->nqsets; 1226 return 0; 1227 } 1228 return -EOPNOTSUPP; 1229 } 1230 1231 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump) 1232 { 1233 struct adapter *adapter = netdev2adap(dev); 1234 u32 len = 0; 1235 1236 len = sizeof(struct cudbg_hdr) + 1237 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1238 len += cxgb4_get_dump_length(adapter, eth_dump->flag); 1239 1240 adapter->eth_dump.flag = eth_dump->flag; 1241 adapter->eth_dump.len = len; 1242 return 0; 1243 } 1244 1245 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump) 1246 { 1247 struct adapter *adapter = netdev2adap(dev); 1248 1249 eth_dump->flag = adapter->eth_dump.flag; 1250 eth_dump->len = adapter->eth_dump.len; 1251 eth_dump->version = adapter->eth_dump.version; 1252 return 0; 1253 } 1254 1255 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump, 1256 void *buf) 1257 { 1258 struct adapter *adapter = netdev2adap(dev); 1259 u32 len = 0; 1260 int ret = 0; 1261 1262 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE) 1263 return -ENOENT; 1264 1265 len = sizeof(struct cudbg_hdr) + 1266 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1267 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag); 1268 if (eth_dump->len < len) 1269 return -ENOMEM; 1270 1271 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag); 1272 if (ret) 1273 return ret; 1274 1275 eth_dump->flag = adapter->eth_dump.flag; 1276 eth_dump->len = len; 1277 eth_dump->version = adapter->eth_dump.version; 1278 return 0; 1279 } 1280 1281 static int cxgb4_get_module_info(struct net_device *dev, 1282 struct ethtool_modinfo *modinfo) 1283 { 1284 struct port_info *pi = netdev_priv(dev); 1285 u8 sff8472_comp, sff_diag_type, sff_rev; 1286 struct adapter *adapter = pi->adapter; 1287 int ret; 1288 1289 if (!t4_is_inserted_mod_type(pi->mod_type)) 1290 return -EINVAL; 1291 1292 switch (pi->port_type) { 1293 case FW_PORT_TYPE_SFP: 1294 case FW_PORT_TYPE_QSA: 1295 case FW_PORT_TYPE_SFP28: 1296 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1297 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR, 1298 SFF_8472_COMP_LEN, &sff8472_comp); 1299 if (ret) 1300 return ret; 1301 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1302 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR, 1303 SFP_DIAG_TYPE_LEN, &sff_diag_type); 1304 if (ret) 1305 return ret; 1306 1307 if (!sff8472_comp || (sff_diag_type & 4)) { 1308 modinfo->type = ETH_MODULE_SFF_8079; 1309 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 1310 } else { 1311 modinfo->type = ETH_MODULE_SFF_8472; 1312 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1313 } 1314 break; 1315 1316 case FW_PORT_TYPE_QSFP: 1317 case FW_PORT_TYPE_QSFP_10G: 1318 case FW_PORT_TYPE_CR_QSFP: 1319 case FW_PORT_TYPE_CR2_QSFP: 1320 case FW_PORT_TYPE_CR4_QSFP: 1321 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1322 I2C_DEV_ADDR_A0, SFF_REV_ADDR, 1323 SFF_REV_LEN, &sff_rev); 1324 /* For QSFP type ports, revision value >= 3 1325 * means the SFP is 8636 compliant. 1326 */ 1327 if (ret) 1328 return ret; 1329 if (sff_rev >= 0x3) { 1330 modinfo->type = ETH_MODULE_SFF_8636; 1331 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1332 } else { 1333 modinfo->type = ETH_MODULE_SFF_8436; 1334 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1335 } 1336 break; 1337 1338 default: 1339 return -EINVAL; 1340 } 1341 1342 return 0; 1343 } 1344 1345 static int cxgb4_get_module_eeprom(struct net_device *dev, 1346 struct ethtool_eeprom *eprom, u8 *data) 1347 { 1348 int ret = 0, offset = eprom->offset, len = eprom->len; 1349 struct port_info *pi = netdev_priv(dev); 1350 struct adapter *adapter = pi->adapter; 1351 1352 memset(data, 0, eprom->len); 1353 if (offset + len <= I2C_PAGE_SIZE) 1354 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1355 I2C_DEV_ADDR_A0, offset, len, data); 1356 1357 /* offset + len spans 0xa0 and 0xa1 pages */ 1358 if (offset <= I2C_PAGE_SIZE) { 1359 /* read 0xa0 page */ 1360 len = I2C_PAGE_SIZE - offset; 1361 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1362 I2C_DEV_ADDR_A0, offset, len, data); 1363 if (ret) 1364 return ret; 1365 offset = I2C_PAGE_SIZE; 1366 /* Remaining bytes to be read from second page = 1367 * Total length - bytes read from first page 1368 */ 1369 len = eprom->len - len; 1370 } 1371 /* Read additional optical diagnostics from page 0xa2 if supported */ 1372 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2, 1373 offset, len, &data[eprom->len - len]); 1374 } 1375 1376 static u32 cxgb4_get_priv_flags(struct net_device *netdev) 1377 { 1378 struct port_info *pi = netdev_priv(netdev); 1379 struct adapter *adapter = pi->adapter; 1380 1381 return (adapter->eth_flags | pi->eth_flags); 1382 } 1383 1384 /** 1385 * set_flags - set/unset specified flags if passed in new_flags 1386 * @cur_flags: pointer to current flags 1387 * @new_flags: new incoming flags 1388 * @flags: set of flags to set/unset 1389 */ 1390 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags) 1391 { 1392 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags); 1393 } 1394 1395 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags) 1396 { 1397 struct port_info *pi = netdev_priv(netdev); 1398 struct adapter *adapter = pi->adapter; 1399 1400 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP); 1401 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT); 1402 1403 return 0; 1404 } 1405 1406 static const struct ethtool_ops cxgb_ethtool_ops = { 1407 .get_link_ksettings = get_link_ksettings, 1408 .set_link_ksettings = set_link_ksettings, 1409 .get_fecparam = get_fecparam, 1410 .set_fecparam = set_fecparam, 1411 .get_drvinfo = get_drvinfo, 1412 .get_msglevel = get_msglevel, 1413 .set_msglevel = set_msglevel, 1414 .get_ringparam = get_sge_param, 1415 .set_ringparam = set_sge_param, 1416 .get_coalesce = get_coalesce, 1417 .set_coalesce = set_coalesce, 1418 .get_eeprom_len = get_eeprom_len, 1419 .get_eeprom = get_eeprom, 1420 .set_eeprom = set_eeprom, 1421 .get_pauseparam = get_pauseparam, 1422 .set_pauseparam = set_pauseparam, 1423 .get_link = ethtool_op_get_link, 1424 .get_strings = get_strings, 1425 .set_phys_id = identify_port, 1426 .nway_reset = restart_autoneg, 1427 .get_sset_count = get_sset_count, 1428 .get_ethtool_stats = get_stats, 1429 .get_regs_len = get_regs_len, 1430 .get_regs = get_regs, 1431 .get_rxnfc = get_rxnfc, 1432 .get_rxfh_indir_size = get_rss_table_size, 1433 .get_rxfh = get_rss_table, 1434 .set_rxfh = set_rss_table, 1435 .flash_device = set_flash, 1436 .get_ts_info = get_ts_info, 1437 .set_dump = set_dump, 1438 .get_dump_flag = get_dump_flag, 1439 .get_dump_data = get_dump_data, 1440 .get_module_info = cxgb4_get_module_info, 1441 .get_module_eeprom = cxgb4_get_module_eeprom, 1442 .get_priv_flags = cxgb4_get_priv_flags, 1443 .set_priv_flags = cxgb4_set_priv_flags, 1444 }; 1445 1446 void cxgb4_set_ethtool_ops(struct net_device *netdev) 1447 { 1448 netdev->ethtool_ops = &cxgb_ethtool_ops; 1449 } 1450