1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/mdio.h> 8 9 #include "cxgb4.h" 10 #include "t4_regs.h" 11 #include "t4fw_api.h" 12 #include "cxgb4_cudbg.h" 13 14 #define EEPROM_MAGIC 0x38E2F10C 15 16 static u32 get_msglevel(struct net_device *dev) 17 { 18 return netdev2adap(dev)->msg_enable; 19 } 20 21 static void set_msglevel(struct net_device *dev, u32 val) 22 { 23 netdev2adap(dev)->msg_enable = val; 24 } 25 26 static const char stats_strings[][ETH_GSTRING_LEN] = { 27 "tx_octets_ok ", 28 "tx_frames_ok ", 29 "tx_broadcast_frames ", 30 "tx_multicast_frames ", 31 "tx_unicast_frames ", 32 "tx_error_frames ", 33 34 "tx_frames_64 ", 35 "tx_frames_65_to_127 ", 36 "tx_frames_128_to_255 ", 37 "tx_frames_256_to_511 ", 38 "tx_frames_512_to_1023 ", 39 "tx_frames_1024_to_1518 ", 40 "tx_frames_1519_to_max ", 41 42 "tx_frames_dropped ", 43 "tx_pause_frames ", 44 "tx_ppp0_frames ", 45 "tx_ppp1_frames ", 46 "tx_ppp2_frames ", 47 "tx_ppp3_frames ", 48 "tx_ppp4_frames ", 49 "tx_ppp5_frames ", 50 "tx_ppp6_frames ", 51 "tx_ppp7_frames ", 52 53 "rx_octets_ok ", 54 "rx_frames_ok ", 55 "rx_broadcast_frames ", 56 "rx_multicast_frames ", 57 "rx_unicast_frames ", 58 59 "rx_frames_too_long ", 60 "rx_jabber_errors ", 61 "rx_fcs_errors ", 62 "rx_length_errors ", 63 "rx_symbol_errors ", 64 "rx_runt_frames ", 65 66 "rx_frames_64 ", 67 "rx_frames_65_to_127 ", 68 "rx_frames_128_to_255 ", 69 "rx_frames_256_to_511 ", 70 "rx_frames_512_to_1023 ", 71 "rx_frames_1024_to_1518 ", 72 "rx_frames_1519_to_max ", 73 74 "rx_pause_frames ", 75 "rx_ppp0_frames ", 76 "rx_ppp1_frames ", 77 "rx_ppp2_frames ", 78 "rx_ppp3_frames ", 79 "rx_ppp4_frames ", 80 "rx_ppp5_frames ", 81 "rx_ppp6_frames ", 82 "rx_ppp7_frames ", 83 84 "rx_bg0_frames_dropped ", 85 "rx_bg1_frames_dropped ", 86 "rx_bg2_frames_dropped ", 87 "rx_bg3_frames_dropped ", 88 "rx_bg0_frames_trunc ", 89 "rx_bg1_frames_trunc ", 90 "rx_bg2_frames_trunc ", 91 "rx_bg3_frames_trunc ", 92 93 "tso ", 94 "uso ", 95 "tx_csum_offload ", 96 "rx_csum_good ", 97 "vlan_extractions ", 98 "vlan_insertions ", 99 "gro_packets ", 100 "gro_merged ", 101 }; 102 103 static char adapter_stats_strings[][ETH_GSTRING_LEN] = { 104 "db_drop ", 105 "db_full ", 106 "db_empty ", 107 "write_coal_success ", 108 "write_coal_fail ", 109 }; 110 111 static char loopback_stats_strings[][ETH_GSTRING_LEN] = { 112 "-------Loopback----------- ", 113 "octets_ok ", 114 "frames_ok ", 115 "bcast_frames ", 116 "mcast_frames ", 117 "ucast_frames ", 118 "error_frames ", 119 "frames_64 ", 120 "frames_65_to_127 ", 121 "frames_128_to_255 ", 122 "frames_256_to_511 ", 123 "frames_512_to_1023 ", 124 "frames_1024_to_1518 ", 125 "frames_1519_to_max ", 126 "frames_dropped ", 127 "bg0_frames_dropped ", 128 "bg1_frames_dropped ", 129 "bg2_frames_dropped ", 130 "bg3_frames_dropped ", 131 "bg0_frames_trunc ", 132 "bg1_frames_trunc ", 133 "bg2_frames_trunc ", 134 "bg3_frames_trunc ", 135 }; 136 137 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = { 138 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr", 139 }; 140 141 static int get_sset_count(struct net_device *dev, int sset) 142 { 143 switch (sset) { 144 case ETH_SS_STATS: 145 return ARRAY_SIZE(stats_strings) + 146 ARRAY_SIZE(adapter_stats_strings) + 147 ARRAY_SIZE(loopback_stats_strings); 148 case ETH_SS_PRIV_FLAGS: 149 return ARRAY_SIZE(cxgb4_priv_flags_strings); 150 default: 151 return -EOPNOTSUPP; 152 } 153 } 154 155 static int get_regs_len(struct net_device *dev) 156 { 157 struct adapter *adap = netdev2adap(dev); 158 159 return t4_get_regs_len(adap); 160 } 161 162 static int get_eeprom_len(struct net_device *dev) 163 { 164 return EEPROMSIZE; 165 } 166 167 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 168 { 169 struct adapter *adapter = netdev2adap(dev); 170 u32 exprom_vers; 171 172 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver)); 173 strlcpy(info->bus_info, pci_name(adapter->pdev), 174 sizeof(info->bus_info)); 175 info->regdump_len = get_regs_len(dev); 176 177 if (adapter->params.fw_vers) 178 snprintf(info->fw_version, sizeof(info->fw_version), 179 "%u.%u.%u.%u, TP %u.%u.%u.%u", 180 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers), 181 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers), 182 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers), 183 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers), 184 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers), 185 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers), 186 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers), 187 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers)); 188 189 if (!t4_get_exprom_version(adapter, &exprom_vers)) 190 snprintf(info->erom_version, sizeof(info->erom_version), 191 "%u.%u.%u.%u", 192 FW_HDR_FW_VER_MAJOR_G(exprom_vers), 193 FW_HDR_FW_VER_MINOR_G(exprom_vers), 194 FW_HDR_FW_VER_MICRO_G(exprom_vers), 195 FW_HDR_FW_VER_BUILD_G(exprom_vers)); 196 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings); 197 } 198 199 static void get_strings(struct net_device *dev, u32 stringset, u8 *data) 200 { 201 if (stringset == ETH_SS_STATS) { 202 memcpy(data, stats_strings, sizeof(stats_strings)); 203 data += sizeof(stats_strings); 204 memcpy(data, adapter_stats_strings, 205 sizeof(adapter_stats_strings)); 206 data += sizeof(adapter_stats_strings); 207 memcpy(data, loopback_stats_strings, 208 sizeof(loopback_stats_strings)); 209 } else if (stringset == ETH_SS_PRIV_FLAGS) { 210 memcpy(data, cxgb4_priv_flags_strings, 211 sizeof(cxgb4_priv_flags_strings)); 212 } 213 } 214 215 /* port stats maintained per queue of the port. They should be in the same 216 * order as in stats_strings above. 217 */ 218 struct queue_port_stats { 219 u64 tso; 220 u64 uso; 221 u64 tx_csum; 222 u64 rx_csum; 223 u64 vlan_ex; 224 u64 vlan_ins; 225 u64 gro_pkts; 226 u64 gro_merged; 227 }; 228 229 struct adapter_stats { 230 u64 db_drop; 231 u64 db_full; 232 u64 db_empty; 233 u64 wc_success; 234 u64 wc_fail; 235 }; 236 237 static void collect_sge_port_stats(const struct adapter *adap, 238 const struct port_info *p, 239 struct queue_port_stats *s) 240 { 241 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset]; 242 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset]; 243 struct sge_eohw_txq *eohw_tx; 244 unsigned int i; 245 246 memset(s, 0, sizeof(*s)); 247 for (i = 0; i < p->nqsets; i++, rx++, tx++) { 248 s->tso += tx->tso; 249 s->uso += tx->uso; 250 s->tx_csum += tx->tx_cso; 251 s->rx_csum += rx->stats.rx_cso; 252 s->vlan_ex += rx->stats.vlan_ex; 253 s->vlan_ins += tx->vlan_ins; 254 s->gro_pkts += rx->stats.lro_pkts; 255 s->gro_merged += rx->stats.lro_merged; 256 } 257 258 if (adap->sge.eohw_txq) { 259 eohw_tx = &adap->sge.eohw_txq[p->first_qset]; 260 for (i = 0; i < p->nqsets; i++, eohw_tx++) { 261 s->tso += eohw_tx->tso; 262 s->uso += eohw_tx->uso; 263 s->tx_csum += eohw_tx->tx_cso; 264 s->vlan_ins += eohw_tx->vlan_ins; 265 } 266 } 267 } 268 269 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s) 270 { 271 u64 val1, val2; 272 273 memset(s, 0, sizeof(*s)); 274 275 s->db_drop = adap->db_stats.db_drop; 276 s->db_full = adap->db_stats.db_full; 277 s->db_empty = adap->db_stats.db_empty; 278 279 if (!is_t4(adap->params.chip)) { 280 int v; 281 282 v = t4_read_reg(adap, SGE_STAT_CFG_A); 283 if (STATSOURCE_T5_G(v) == 7) { 284 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A); 285 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A); 286 s->wc_success = val1 - val2; 287 s->wc_fail = val2; 288 } 289 } 290 } 291 292 static void get_stats(struct net_device *dev, struct ethtool_stats *stats, 293 u64 *data) 294 { 295 struct port_info *pi = netdev_priv(dev); 296 struct adapter *adapter = pi->adapter; 297 struct lb_port_stats s; 298 int i; 299 u64 *p0; 300 301 t4_get_port_stats_offset(adapter, pi->tx_chan, 302 (struct port_stats *)data, 303 &pi->stats_base); 304 305 data += sizeof(struct port_stats) / sizeof(u64); 306 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); 307 data += sizeof(struct queue_port_stats) / sizeof(u64); 308 collect_adapter_stats(adapter, (struct adapter_stats *)data); 309 data += sizeof(struct adapter_stats) / sizeof(u64); 310 311 *data++ = (u64)pi->port_id; 312 memset(&s, 0, sizeof(s)); 313 t4_get_lb_stats(adapter, pi->port_id, &s); 314 315 p0 = &s.octets; 316 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++) 317 *data++ = (unsigned long long)*p0++; 318 } 319 320 static void get_regs(struct net_device *dev, struct ethtool_regs *regs, 321 void *buf) 322 { 323 struct adapter *adap = netdev2adap(dev); 324 size_t buf_size; 325 326 buf_size = t4_get_regs_len(adap); 327 regs->version = mk_adap_vers(adap); 328 t4_get_regs(adap, buf, buf_size); 329 } 330 331 static int restart_autoneg(struct net_device *dev) 332 { 333 struct port_info *p = netdev_priv(dev); 334 335 if (!netif_running(dev)) 336 return -EAGAIN; 337 if (p->link_cfg.autoneg != AUTONEG_ENABLE) 338 return -EINVAL; 339 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan); 340 return 0; 341 } 342 343 static int identify_port(struct net_device *dev, 344 enum ethtool_phys_id_state state) 345 { 346 unsigned int val; 347 struct adapter *adap = netdev2adap(dev); 348 349 if (state == ETHTOOL_ID_ACTIVE) 350 val = 0xffff; 351 else if (state == ETHTOOL_ID_INACTIVE) 352 val = 0; 353 else 354 return -EINVAL; 355 356 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val); 357 } 358 359 /** 360 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool 361 * @port_type: Firmware Port Type 362 * @mod_type: Firmware Module Type 363 * 364 * Translate Firmware Port/Module type to Ethtool Port Type. 365 */ 366 static int from_fw_port_mod_type(enum fw_port_type port_type, 367 enum fw_port_module_type mod_type) 368 { 369 if (port_type == FW_PORT_TYPE_BT_SGMII || 370 port_type == FW_PORT_TYPE_BT_XFI || 371 port_type == FW_PORT_TYPE_BT_XAUI) { 372 return PORT_TP; 373 } else if (port_type == FW_PORT_TYPE_FIBER_XFI || 374 port_type == FW_PORT_TYPE_FIBER_XAUI) { 375 return PORT_FIBRE; 376 } else if (port_type == FW_PORT_TYPE_SFP || 377 port_type == FW_PORT_TYPE_QSFP_10G || 378 port_type == FW_PORT_TYPE_QSA || 379 port_type == FW_PORT_TYPE_QSFP || 380 port_type == FW_PORT_TYPE_CR4_QSFP || 381 port_type == FW_PORT_TYPE_CR_QSFP || 382 port_type == FW_PORT_TYPE_CR2_QSFP || 383 port_type == FW_PORT_TYPE_SFP28) { 384 if (mod_type == FW_PORT_MOD_TYPE_LR || 385 mod_type == FW_PORT_MOD_TYPE_SR || 386 mod_type == FW_PORT_MOD_TYPE_ER || 387 mod_type == FW_PORT_MOD_TYPE_LRM) 388 return PORT_FIBRE; 389 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || 390 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) 391 return PORT_DA; 392 else 393 return PORT_OTHER; 394 } else if (port_type == FW_PORT_TYPE_KR4_100G || 395 port_type == FW_PORT_TYPE_KR_SFP28 || 396 port_type == FW_PORT_TYPE_KR_XLAUI) { 397 return PORT_NONE; 398 } 399 400 return PORT_OTHER; 401 } 402 403 /** 404 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities 405 * @speed: speed in Kb/s 406 * 407 * Translates a specific Port Speed into a Firmware Port Capabilities 408 * value. 409 */ 410 static unsigned int speed_to_fw_caps(int speed) 411 { 412 if (speed == 100) 413 return FW_PORT_CAP32_SPEED_100M; 414 if (speed == 1000) 415 return FW_PORT_CAP32_SPEED_1G; 416 if (speed == 10000) 417 return FW_PORT_CAP32_SPEED_10G; 418 if (speed == 25000) 419 return FW_PORT_CAP32_SPEED_25G; 420 if (speed == 40000) 421 return FW_PORT_CAP32_SPEED_40G; 422 if (speed == 50000) 423 return FW_PORT_CAP32_SPEED_50G; 424 if (speed == 100000) 425 return FW_PORT_CAP32_SPEED_100G; 426 if (speed == 200000) 427 return FW_PORT_CAP32_SPEED_200G; 428 if (speed == 400000) 429 return FW_PORT_CAP32_SPEED_400G; 430 return 0; 431 } 432 433 /** 434 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask 435 * @port_type: Firmware Port Type 436 * @fw_caps: Firmware Port Capabilities 437 * @link_mode_mask: ethtool Link Mode Mask 438 * 439 * Translate a Firmware Port Capabilities specification to an ethtool 440 * Link Mode Mask. 441 */ 442 static void fw_caps_to_lmm(enum fw_port_type port_type, 443 fw_port_cap32_t fw_caps, 444 unsigned long *link_mode_mask) 445 { 446 #define SET_LMM(__lmm_name) \ 447 do { \ 448 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 449 link_mode_mask); \ 450 } while (0) 451 452 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \ 453 do { \ 454 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \ 455 SET_LMM(__lmm_name); \ 456 } while (0) 457 458 switch (port_type) { 459 case FW_PORT_TYPE_BT_SGMII: 460 case FW_PORT_TYPE_BT_XFI: 461 case FW_PORT_TYPE_BT_XAUI: 462 SET_LMM(TP); 463 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full); 464 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 465 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 466 break; 467 468 case FW_PORT_TYPE_KX4: 469 case FW_PORT_TYPE_KX: 470 SET_LMM(Backplane); 471 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 472 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 473 break; 474 475 case FW_PORT_TYPE_KR: 476 SET_LMM(Backplane); 477 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 478 break; 479 480 case FW_PORT_TYPE_BP_AP: 481 SET_LMM(Backplane); 482 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 483 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 484 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 485 break; 486 487 case FW_PORT_TYPE_BP4_AP: 488 SET_LMM(Backplane); 489 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 490 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 491 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 492 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 493 break; 494 495 case FW_PORT_TYPE_FIBER_XFI: 496 case FW_PORT_TYPE_FIBER_XAUI: 497 case FW_PORT_TYPE_SFP: 498 case FW_PORT_TYPE_QSFP_10G: 499 case FW_PORT_TYPE_QSA: 500 SET_LMM(FIBRE); 501 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 502 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 503 break; 504 505 case FW_PORT_TYPE_BP40_BA: 506 case FW_PORT_TYPE_QSFP: 507 SET_LMM(FIBRE); 508 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 509 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 510 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 511 break; 512 513 case FW_PORT_TYPE_CR_QSFP: 514 case FW_PORT_TYPE_SFP28: 515 SET_LMM(FIBRE); 516 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 517 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 518 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 519 break; 520 521 case FW_PORT_TYPE_KR_SFP28: 522 SET_LMM(Backplane); 523 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 524 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 525 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full); 526 break; 527 528 case FW_PORT_TYPE_KR_XLAUI: 529 SET_LMM(Backplane); 530 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 531 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 532 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full); 533 break; 534 535 case FW_PORT_TYPE_CR2_QSFP: 536 SET_LMM(FIBRE); 537 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full); 538 break; 539 540 case FW_PORT_TYPE_KR4_100G: 541 case FW_PORT_TYPE_CR4_QSFP: 542 SET_LMM(FIBRE); 543 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 544 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 545 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 546 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 547 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full); 548 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full); 549 break; 550 551 default: 552 break; 553 } 554 555 if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) { 556 FW_CAPS_TO_LMM(FEC_RS, FEC_RS); 557 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER); 558 } else { 559 SET_LMM(FEC_NONE); 560 } 561 562 FW_CAPS_TO_LMM(ANEG, Autoneg); 563 FW_CAPS_TO_LMM(802_3_PAUSE, Pause); 564 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause); 565 566 #undef FW_CAPS_TO_LMM 567 #undef SET_LMM 568 } 569 570 /** 571 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware 572 * capabilities 573 * @et_lmm: ethtool Link Mode Mask 574 * 575 * Translate ethtool Link Mode Mask into a Firmware Port capabilities 576 * value. 577 */ 578 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask) 579 { 580 unsigned int fw_caps = 0; 581 582 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \ 583 do { \ 584 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 585 link_mode_mask)) \ 586 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \ 587 } while (0) 588 589 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M); 590 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G); 591 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G); 592 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G); 593 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G); 594 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G); 595 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G); 596 597 #undef LMM_TO_FW_CAPS 598 599 return fw_caps; 600 } 601 602 static int get_link_ksettings(struct net_device *dev, 603 struct ethtool_link_ksettings *link_ksettings) 604 { 605 struct port_info *pi = netdev_priv(dev); 606 struct ethtool_link_settings *base = &link_ksettings->base; 607 608 /* For the nonce, the Firmware doesn't send up Port State changes 609 * when the Virtual Interface attached to the Port is down. So 610 * if it's down, let's grab any changes. 611 */ 612 if (!netif_running(dev)) 613 (void)t4_update_port_info(pi); 614 615 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported); 616 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising); 617 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising); 618 619 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type); 620 621 if (pi->mdio_addr >= 0) { 622 base->phy_address = pi->mdio_addr; 623 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII 624 ? ETH_MDIO_SUPPORTS_C22 625 : ETH_MDIO_SUPPORTS_C45); 626 } else { 627 base->phy_address = 255; 628 base->mdio_support = 0; 629 } 630 631 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps, 632 link_ksettings->link_modes.supported); 633 fw_caps_to_lmm(pi->port_type, 634 t4_link_acaps(pi->adapter, 635 pi->lport, 636 &pi->link_cfg), 637 link_ksettings->link_modes.advertising); 638 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps, 639 link_ksettings->link_modes.lp_advertising); 640 641 base->speed = (netif_carrier_ok(dev) 642 ? pi->link_cfg.speed 643 : SPEED_UNKNOWN); 644 base->duplex = DUPLEX_FULL; 645 646 base->autoneg = pi->link_cfg.autoneg; 647 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) 648 ethtool_link_ksettings_add_link_mode(link_ksettings, 649 supported, Autoneg); 650 if (pi->link_cfg.autoneg) 651 ethtool_link_ksettings_add_link_mode(link_ksettings, 652 advertising, Autoneg); 653 654 return 0; 655 } 656 657 static int set_link_ksettings(struct net_device *dev, 658 const struct ethtool_link_ksettings *link_ksettings) 659 { 660 struct port_info *pi = netdev_priv(dev); 661 struct link_config *lc = &pi->link_cfg; 662 const struct ethtool_link_settings *base = &link_ksettings->base; 663 struct link_config old_lc; 664 unsigned int fw_caps; 665 int ret = 0; 666 667 /* only full-duplex supported */ 668 if (base->duplex != DUPLEX_FULL) 669 return -EINVAL; 670 671 old_lc = *lc; 672 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) || 673 base->autoneg == AUTONEG_DISABLE) { 674 fw_caps = speed_to_fw_caps(base->speed); 675 676 /* Speed must be supported by Physical Port Capabilities. */ 677 if (!(lc->pcaps & fw_caps)) 678 return -EINVAL; 679 680 lc->speed_caps = fw_caps; 681 lc->acaps = fw_caps; 682 } else { 683 fw_caps = 684 lmm_to_fw_caps(link_ksettings->link_modes.advertising); 685 if (!(lc->pcaps & fw_caps)) 686 return -EINVAL; 687 lc->speed_caps = 0; 688 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG; 689 } 690 lc->autoneg = base->autoneg; 691 692 /* If the firmware rejects the Link Configuration request, back out 693 * the changes and report the error. 694 */ 695 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc); 696 if (ret) 697 *lc = old_lc; 698 699 return ret; 700 } 701 702 /* Translate the Firmware FEC value into the ethtool value. */ 703 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec) 704 { 705 unsigned int eth_fec = 0; 706 707 if (fw_fec & FW_PORT_CAP32_FEC_RS) 708 eth_fec |= ETHTOOL_FEC_RS; 709 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 710 eth_fec |= ETHTOOL_FEC_BASER; 711 712 /* if nothing is set, then FEC is off */ 713 if (!eth_fec) 714 eth_fec = ETHTOOL_FEC_OFF; 715 716 return eth_fec; 717 } 718 719 /* Translate Common Code FEC value into ethtool value. */ 720 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec) 721 { 722 unsigned int eth_fec = 0; 723 724 if (cc_fec & FEC_AUTO) 725 eth_fec |= ETHTOOL_FEC_AUTO; 726 if (cc_fec & FEC_RS) 727 eth_fec |= ETHTOOL_FEC_RS; 728 if (cc_fec & FEC_BASER_RS) 729 eth_fec |= ETHTOOL_FEC_BASER; 730 731 /* if nothing is set, then FEC is off */ 732 if (!eth_fec) 733 eth_fec = ETHTOOL_FEC_OFF; 734 735 return eth_fec; 736 } 737 738 /* Translate ethtool FEC value into Common Code value. */ 739 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec) 740 { 741 unsigned int cc_fec = 0; 742 743 if (eth_fec & ETHTOOL_FEC_OFF) 744 return cc_fec; 745 746 if (eth_fec & ETHTOOL_FEC_AUTO) 747 cc_fec |= FEC_AUTO; 748 if (eth_fec & ETHTOOL_FEC_RS) 749 cc_fec |= FEC_RS; 750 if (eth_fec & ETHTOOL_FEC_BASER) 751 cc_fec |= FEC_BASER_RS; 752 753 return cc_fec; 754 } 755 756 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 757 { 758 const struct port_info *pi = netdev_priv(dev); 759 const struct link_config *lc = &pi->link_cfg; 760 761 /* Translate the Firmware FEC Support into the ethtool value. We 762 * always support IEEE 802.3 "automatic" selection of Link FEC type if 763 * any FEC is supported. 764 */ 765 fec->fec = fwcap_to_eth_fec(lc->pcaps); 766 if (fec->fec != ETHTOOL_FEC_OFF) 767 fec->fec |= ETHTOOL_FEC_AUTO; 768 769 /* Translate the current internal FEC parameters into the 770 * ethtool values. 771 */ 772 fec->active_fec = cc_to_eth_fec(lc->fec); 773 774 return 0; 775 } 776 777 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 778 { 779 struct port_info *pi = netdev_priv(dev); 780 struct link_config *lc = &pi->link_cfg; 781 struct link_config old_lc; 782 int ret; 783 784 /* Save old Link Configuration in case the L1 Configure below 785 * fails. 786 */ 787 old_lc = *lc; 788 789 /* Try to perform the L1 Configure and return the result of that 790 * effort. If it fails, revert the attempted change. 791 */ 792 lc->requested_fec = eth_to_cc_fec(fec->fec); 793 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, 794 pi->tx_chan, lc); 795 if (ret) 796 *lc = old_lc; 797 return ret; 798 } 799 800 static void get_pauseparam(struct net_device *dev, 801 struct ethtool_pauseparam *epause) 802 { 803 struct port_info *p = netdev_priv(dev); 804 805 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0; 806 epause->rx_pause = (p->link_cfg.advertised_fc & PAUSE_RX) != 0; 807 epause->tx_pause = (p->link_cfg.advertised_fc & PAUSE_TX) != 0; 808 } 809 810 static int set_pauseparam(struct net_device *dev, 811 struct ethtool_pauseparam *epause) 812 { 813 struct port_info *p = netdev_priv(dev); 814 struct link_config *lc = &p->link_cfg; 815 816 if (epause->autoneg == AUTONEG_DISABLE) 817 lc->requested_fc = 0; 818 else if (lc->pcaps & FW_PORT_CAP32_ANEG) 819 lc->requested_fc = PAUSE_AUTONEG; 820 else 821 return -EINVAL; 822 823 if (epause->rx_pause) 824 lc->requested_fc |= PAUSE_RX; 825 if (epause->tx_pause) 826 lc->requested_fc |= PAUSE_TX; 827 if (netif_running(dev)) 828 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan, 829 lc); 830 return 0; 831 } 832 833 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 834 { 835 const struct port_info *pi = netdev_priv(dev); 836 const struct sge *s = &pi->adapter->sge; 837 838 e->rx_max_pending = MAX_RX_BUFFERS; 839 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES; 840 e->rx_jumbo_max_pending = 0; 841 e->tx_max_pending = MAX_TXQ_ENTRIES; 842 843 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8; 844 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size; 845 e->rx_jumbo_pending = 0; 846 e->tx_pending = s->ethtxq[pi->first_qset].q.size; 847 } 848 849 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 850 { 851 int i; 852 const struct port_info *pi = netdev_priv(dev); 853 struct adapter *adapter = pi->adapter; 854 struct sge *s = &adapter->sge; 855 856 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending || 857 e->tx_pending > MAX_TXQ_ENTRIES || 858 e->rx_mini_pending > MAX_RSPQ_ENTRIES || 859 e->rx_mini_pending < MIN_RSPQ_ENTRIES || 860 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES) 861 return -EINVAL; 862 863 if (adapter->flags & CXGB4_FULL_INIT_DONE) 864 return -EBUSY; 865 866 for (i = 0; i < pi->nqsets; ++i) { 867 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending; 868 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8; 869 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending; 870 } 871 return 0; 872 } 873 874 /** 875 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete! 876 * @dev: the network device 877 * @us: the hold-off time in us, or 0 to disable timer 878 * @cnt: the hold-off packet count, or 0 to disable counter 879 * 880 * Set the RX interrupt hold-off parameters for a network device. 881 */ 882 static int set_rx_intr_params(struct net_device *dev, 883 unsigned int us, unsigned int cnt) 884 { 885 int i, err; 886 struct port_info *pi = netdev_priv(dev); 887 struct adapter *adap = pi->adapter; 888 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 889 890 for (i = 0; i < pi->nqsets; i++, q++) { 891 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt); 892 if (err) 893 return err; 894 } 895 return 0; 896 } 897 898 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx) 899 { 900 int i; 901 struct port_info *pi = netdev_priv(dev); 902 struct adapter *adap = pi->adapter; 903 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 904 905 for (i = 0; i < pi->nqsets; i++, q++) 906 q->rspq.adaptive_rx = adaptive_rx; 907 908 return 0; 909 } 910 911 static int get_adaptive_rx_setting(struct net_device *dev) 912 { 913 struct port_info *pi = netdev_priv(dev); 914 struct adapter *adap = pi->adapter; 915 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 916 917 return q->rspq.adaptive_rx; 918 } 919 920 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all 921 * Ethernet TX Queues. 922 */ 923 static int get_dbqtimer_tick(struct net_device *dev) 924 { 925 struct port_info *pi = netdev_priv(dev); 926 struct adapter *adap = pi->adapter; 927 928 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 929 return 0; 930 931 return adap->sge.dbqtimer_tick; 932 } 933 934 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 935 * associated with a Network Device. 936 */ 937 static int get_dbqtimer(struct net_device *dev) 938 { 939 struct port_info *pi = netdev_priv(dev); 940 struct adapter *adap = pi->adapter; 941 struct sge_eth_txq *txq; 942 943 txq = &adap->sge.ethtxq[pi->first_qset]; 944 945 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 946 return 0; 947 948 /* all of the TX Queues use the same Timer Index */ 949 return adap->sge.dbqtimer_val[txq->dbqtimerix]; 950 } 951 952 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 953 * Queues. This is the fundamental "Tick" that sets the scale of values which 954 * can be used. Individual Ethernet TX Queues index into a relatively small 955 * array of Tick Multipliers. Changing the base Tick will thus change all of 956 * the resulting Timer Values associated with those multipliers for all 957 * Ethernet TX Queues. 958 */ 959 static int set_dbqtimer_tick(struct net_device *dev, int usecs) 960 { 961 struct port_info *pi = netdev_priv(dev); 962 struct adapter *adap = pi->adapter; 963 struct sge *s = &adap->sge; 964 u32 param, val; 965 int ret; 966 967 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 968 return 0; 969 970 /* return early if it's the same Timer Tick we're already using */ 971 if (s->dbqtimer_tick == usecs) 972 return 0; 973 974 /* attempt to set the new Timer Tick value */ 975 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 976 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK)); 977 val = usecs; 978 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val); 979 if (ret) 980 return ret; 981 s->dbqtimer_tick = usecs; 982 983 /* if successful, reread resulting dependent Timer values */ 984 ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val), 985 s->dbqtimer_val); 986 return ret; 987 } 988 989 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 990 * associated with a Network Device. There is a relatively small array of 991 * possible Timer Values so we need to pick the closest value available. 992 */ 993 static int set_dbqtimer(struct net_device *dev, int usecs) 994 { 995 int qix, timerix, min_timerix, delta, min_delta; 996 struct port_info *pi = netdev_priv(dev); 997 struct adapter *adap = pi->adapter; 998 struct sge *s = &adap->sge; 999 struct sge_eth_txq *txq; 1000 u32 param, val; 1001 int ret; 1002 1003 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 1004 return 0; 1005 1006 /* Find the SGE Doorbell Timer Value that's closest to the requested 1007 * value. 1008 */ 1009 min_delta = INT_MAX; 1010 min_timerix = 0; 1011 for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) { 1012 delta = s->dbqtimer_val[timerix] - usecs; 1013 if (delta < 0) 1014 delta = -delta; 1015 if (delta < min_delta) { 1016 min_delta = delta; 1017 min_timerix = timerix; 1018 } 1019 } 1020 1021 /* Return early if it's the same Timer Index we're already using. 1022 * We use the same Timer Index for all of the TX Queues for an 1023 * interface so it's only necessary to check the first one. 1024 */ 1025 txq = &s->ethtxq[pi->first_qset]; 1026 if (txq->dbqtimerix == min_timerix) 1027 return 0; 1028 1029 for (qix = 0; qix < pi->nqsets; qix++, txq++) { 1030 if (adap->flags & CXGB4_FULL_INIT_DONE) { 1031 param = 1032 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) | 1033 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) | 1034 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id)); 1035 val = min_timerix; 1036 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1037 1, ¶m, &val); 1038 if (ret) 1039 return ret; 1040 } 1041 txq->dbqtimerix = min_timerix; 1042 } 1043 return 0; 1044 } 1045 1046 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 1047 * Queues and the Timer Value for the Ethernet TX Queues associated with a 1048 * Network Device. Since changing the global Tick changes all of the 1049 * available Timer Values, we need to do this first before selecting the 1050 * resulting closest Timer Value. Moreover, since the Tick is global, 1051 * changing it affects the Timer Values for all Network Devices on the 1052 * adapter. So, before changing the Tick, we grab all of the current Timer 1053 * Values for other Network Devices on this Adapter and then attempt to select 1054 * new Timer Values which are close to the old values ... 1055 */ 1056 static int set_dbqtimer_tickval(struct net_device *dev, 1057 int tick_usecs, int timer_usecs) 1058 { 1059 struct port_info *pi = netdev_priv(dev); 1060 struct adapter *adap = pi->adapter; 1061 int timer[MAX_NPORTS]; 1062 unsigned int port; 1063 int ret; 1064 1065 /* Grab the other adapter Network Interface current timers and fill in 1066 * the new one for this Network Interface. 1067 */ 1068 for_each_port(adap, port) 1069 if (port == pi->port_id) 1070 timer[port] = timer_usecs; 1071 else 1072 timer[port] = get_dbqtimer(adap->port[port]); 1073 1074 /* Change the global Tick first ... */ 1075 ret = set_dbqtimer_tick(dev, tick_usecs); 1076 if (ret) 1077 return ret; 1078 1079 /* ... and then set all of the Network Interface Timer Values ... */ 1080 for_each_port(adap, port) { 1081 ret = set_dbqtimer(adap->port[port], timer[port]); 1082 if (ret) 1083 return ret; 1084 } 1085 1086 return 0; 1087 } 1088 1089 static int set_coalesce(struct net_device *dev, 1090 struct ethtool_coalesce *coalesce) 1091 { 1092 int ret; 1093 1094 set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce); 1095 1096 ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs, 1097 coalesce->rx_max_coalesced_frames); 1098 if (ret) 1099 return ret; 1100 1101 return set_dbqtimer_tickval(dev, 1102 coalesce->tx_coalesce_usecs_irq, 1103 coalesce->tx_coalesce_usecs); 1104 } 1105 1106 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 1107 { 1108 const struct port_info *pi = netdev_priv(dev); 1109 const struct adapter *adap = pi->adapter; 1110 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq; 1111 1112 c->rx_coalesce_usecs = qtimer_val(adap, rq); 1113 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ? 1114 adap->sge.counter_val[rq->pktcnt_idx] : 0; 1115 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev); 1116 c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev); 1117 c->tx_coalesce_usecs = get_dbqtimer(dev); 1118 return 0; 1119 } 1120 1121 /* The next two routines implement eeprom read/write from physical addresses. 1122 */ 1123 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) 1124 { 1125 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1126 1127 if (vaddr >= 0) 1128 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); 1129 return vaddr < 0 ? vaddr : 0; 1130 } 1131 1132 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) 1133 { 1134 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1135 1136 if (vaddr >= 0) 1137 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); 1138 return vaddr < 0 ? vaddr : 0; 1139 } 1140 1141 #define EEPROM_MAGIC 0x38E2F10C 1142 1143 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e, 1144 u8 *data) 1145 { 1146 int i, err = 0; 1147 struct adapter *adapter = netdev2adap(dev); 1148 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL); 1149 1150 if (!buf) 1151 return -ENOMEM; 1152 1153 e->magic = EEPROM_MAGIC; 1154 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4) 1155 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]); 1156 1157 if (!err) 1158 memcpy(data, buf + e->offset, e->len); 1159 kvfree(buf); 1160 return err; 1161 } 1162 1163 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, 1164 u8 *data) 1165 { 1166 u8 *buf; 1167 int err = 0; 1168 u32 aligned_offset, aligned_len, *p; 1169 struct adapter *adapter = netdev2adap(dev); 1170 1171 if (eeprom->magic != EEPROM_MAGIC) 1172 return -EINVAL; 1173 1174 aligned_offset = eeprom->offset & ~3; 1175 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; 1176 1177 if (adapter->pf > 0) { 1178 u32 start = 1024 + adapter->pf * EEPROMPFSIZE; 1179 1180 if (aligned_offset < start || 1181 aligned_offset + aligned_len > start + EEPROMPFSIZE) 1182 return -EPERM; 1183 } 1184 1185 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { 1186 /* RMW possibly needed for first or last words. 1187 */ 1188 buf = kvzalloc(aligned_len, GFP_KERNEL); 1189 if (!buf) 1190 return -ENOMEM; 1191 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf); 1192 if (!err && aligned_len > 4) 1193 err = eeprom_rd_phys(adapter, 1194 aligned_offset + aligned_len - 4, 1195 (u32 *)&buf[aligned_len - 4]); 1196 if (err) 1197 goto out; 1198 memcpy(buf + (eeprom->offset & 3), data, eeprom->len); 1199 } else { 1200 buf = data; 1201 } 1202 1203 err = t4_seeprom_wp(adapter, false); 1204 if (err) 1205 goto out; 1206 1207 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { 1208 err = eeprom_wr_phys(adapter, aligned_offset, *p); 1209 aligned_offset += 4; 1210 } 1211 1212 if (!err) 1213 err = t4_seeprom_wp(adapter, true); 1214 out: 1215 if (buf != data) 1216 kvfree(buf); 1217 return err; 1218 } 1219 1220 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) 1221 { 1222 int ret; 1223 const struct firmware *fw; 1224 struct adapter *adap = netdev2adap(netdev); 1225 unsigned int mbox = PCIE_FW_MASTER_M + 1; 1226 u32 pcie_fw; 1227 unsigned int master; 1228 u8 master_vld = 0; 1229 1230 pcie_fw = t4_read_reg(adap, PCIE_FW_A); 1231 master = PCIE_FW_MASTER_G(pcie_fw); 1232 if (pcie_fw & PCIE_FW_MASTER_VLD_F) 1233 master_vld = 1; 1234 /* if csiostor is the master return */ 1235 if (master_vld && (master != adap->pf)) { 1236 dev_warn(adap->pdev_dev, 1237 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n"); 1238 return -EOPNOTSUPP; 1239 } 1240 1241 ef->data[sizeof(ef->data) - 1] = '\0'; 1242 ret = request_firmware(&fw, ef->data, adap->pdev_dev); 1243 if (ret < 0) 1244 return ret; 1245 1246 /* If the adapter has been fully initialized then we'll go ahead and 1247 * try to get the firmware's cooperation in upgrading to the new 1248 * firmware image otherwise we'll try to do the entire job from the 1249 * host ... and we always "force" the operation in this path. 1250 */ 1251 if (adap->flags & CXGB4_FULL_INIT_DONE) 1252 mbox = adap->mbox; 1253 1254 ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1); 1255 release_firmware(fw); 1256 if (!ret) 1257 dev_info(adap->pdev_dev, 1258 "loaded firmware %s, reload cxgb4 driver\n", ef->data); 1259 return ret; 1260 } 1261 1262 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info) 1263 { 1264 struct port_info *pi = netdev_priv(dev); 1265 struct adapter *adapter = pi->adapter; 1266 1267 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1268 SOF_TIMESTAMPING_RX_SOFTWARE | 1269 SOF_TIMESTAMPING_SOFTWARE; 1270 1271 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE | 1272 SOF_TIMESTAMPING_TX_HARDWARE | 1273 SOF_TIMESTAMPING_RAW_HARDWARE; 1274 1275 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | 1276 (1 << HWTSTAMP_TX_ON); 1277 1278 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 1279 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1280 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1281 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1282 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1283 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1284 1285 if (adapter->ptp_clock) 1286 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock); 1287 else 1288 ts_info->phc_index = -1; 1289 1290 return 0; 1291 } 1292 1293 static u32 get_rss_table_size(struct net_device *dev) 1294 { 1295 const struct port_info *pi = netdev_priv(dev); 1296 1297 return pi->rss_size; 1298 } 1299 1300 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc) 1301 { 1302 const struct port_info *pi = netdev_priv(dev); 1303 unsigned int n = pi->rss_size; 1304 1305 if (hfunc) 1306 *hfunc = ETH_RSS_HASH_TOP; 1307 if (!p) 1308 return 0; 1309 while (n--) 1310 p[n] = pi->rss[n]; 1311 return 0; 1312 } 1313 1314 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key, 1315 const u8 hfunc) 1316 { 1317 unsigned int i; 1318 struct port_info *pi = netdev_priv(dev); 1319 1320 /* We require at least one supported parameter to be changed and no 1321 * change in any of the unsupported parameters 1322 */ 1323 if (key || 1324 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)) 1325 return -EOPNOTSUPP; 1326 if (!p) 1327 return 0; 1328 1329 /* Interface must be brought up atleast once */ 1330 if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) { 1331 for (i = 0; i < pi->rss_size; i++) 1332 pi->rss[i] = p[i]; 1333 1334 return cxgb4_write_rss(pi, pi->rss); 1335 } 1336 1337 return -EPERM; 1338 } 1339 1340 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1341 u32 *rules) 1342 { 1343 const struct port_info *pi = netdev_priv(dev); 1344 1345 switch (info->cmd) { 1346 case ETHTOOL_GRXFH: { 1347 unsigned int v = pi->rss_mode; 1348 1349 info->data = 0; 1350 switch (info->flow_type) { 1351 case TCP_V4_FLOW: 1352 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) 1353 info->data = RXH_IP_SRC | RXH_IP_DST | 1354 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1355 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1356 info->data = RXH_IP_SRC | RXH_IP_DST; 1357 break; 1358 case UDP_V4_FLOW: 1359 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && 1360 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1361 info->data = RXH_IP_SRC | RXH_IP_DST | 1362 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1363 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1364 info->data = RXH_IP_SRC | RXH_IP_DST; 1365 break; 1366 case SCTP_V4_FLOW: 1367 case AH_ESP_V4_FLOW: 1368 case IPV4_FLOW: 1369 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1370 info->data = RXH_IP_SRC | RXH_IP_DST; 1371 break; 1372 case TCP_V6_FLOW: 1373 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) 1374 info->data = RXH_IP_SRC | RXH_IP_DST | 1375 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1376 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1377 info->data = RXH_IP_SRC | RXH_IP_DST; 1378 break; 1379 case UDP_V6_FLOW: 1380 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && 1381 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1382 info->data = RXH_IP_SRC | RXH_IP_DST | 1383 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1384 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1385 info->data = RXH_IP_SRC | RXH_IP_DST; 1386 break; 1387 case SCTP_V6_FLOW: 1388 case AH_ESP_V6_FLOW: 1389 case IPV6_FLOW: 1390 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1391 info->data = RXH_IP_SRC | RXH_IP_DST; 1392 break; 1393 } 1394 return 0; 1395 } 1396 case ETHTOOL_GRXRINGS: 1397 info->data = pi->nqsets; 1398 return 0; 1399 } 1400 return -EOPNOTSUPP; 1401 } 1402 1403 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump) 1404 { 1405 struct adapter *adapter = netdev2adap(dev); 1406 u32 len = 0; 1407 1408 len = sizeof(struct cudbg_hdr) + 1409 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1410 len += cxgb4_get_dump_length(adapter, eth_dump->flag); 1411 1412 adapter->eth_dump.flag = eth_dump->flag; 1413 adapter->eth_dump.len = len; 1414 return 0; 1415 } 1416 1417 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump) 1418 { 1419 struct adapter *adapter = netdev2adap(dev); 1420 1421 eth_dump->flag = adapter->eth_dump.flag; 1422 eth_dump->len = adapter->eth_dump.len; 1423 eth_dump->version = adapter->eth_dump.version; 1424 return 0; 1425 } 1426 1427 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump, 1428 void *buf) 1429 { 1430 struct adapter *adapter = netdev2adap(dev); 1431 u32 len = 0; 1432 int ret = 0; 1433 1434 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE) 1435 return -ENOENT; 1436 1437 len = sizeof(struct cudbg_hdr) + 1438 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1439 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag); 1440 if (eth_dump->len < len) 1441 return -ENOMEM; 1442 1443 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag); 1444 if (ret) 1445 return ret; 1446 1447 eth_dump->flag = adapter->eth_dump.flag; 1448 eth_dump->len = len; 1449 eth_dump->version = adapter->eth_dump.version; 1450 return 0; 1451 } 1452 1453 static int cxgb4_get_module_info(struct net_device *dev, 1454 struct ethtool_modinfo *modinfo) 1455 { 1456 struct port_info *pi = netdev_priv(dev); 1457 u8 sff8472_comp, sff_diag_type, sff_rev; 1458 struct adapter *adapter = pi->adapter; 1459 int ret; 1460 1461 if (!t4_is_inserted_mod_type(pi->mod_type)) 1462 return -EINVAL; 1463 1464 switch (pi->port_type) { 1465 case FW_PORT_TYPE_SFP: 1466 case FW_PORT_TYPE_QSA: 1467 case FW_PORT_TYPE_SFP28: 1468 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1469 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR, 1470 SFF_8472_COMP_LEN, &sff8472_comp); 1471 if (ret) 1472 return ret; 1473 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1474 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR, 1475 SFP_DIAG_TYPE_LEN, &sff_diag_type); 1476 if (ret) 1477 return ret; 1478 1479 if (!sff8472_comp || (sff_diag_type & 4)) { 1480 modinfo->type = ETH_MODULE_SFF_8079; 1481 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 1482 } else { 1483 modinfo->type = ETH_MODULE_SFF_8472; 1484 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1485 } 1486 break; 1487 1488 case FW_PORT_TYPE_QSFP: 1489 case FW_PORT_TYPE_QSFP_10G: 1490 case FW_PORT_TYPE_CR_QSFP: 1491 case FW_PORT_TYPE_CR2_QSFP: 1492 case FW_PORT_TYPE_CR4_QSFP: 1493 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1494 I2C_DEV_ADDR_A0, SFF_REV_ADDR, 1495 SFF_REV_LEN, &sff_rev); 1496 /* For QSFP type ports, revision value >= 3 1497 * means the SFP is 8636 compliant. 1498 */ 1499 if (ret) 1500 return ret; 1501 if (sff_rev >= 0x3) { 1502 modinfo->type = ETH_MODULE_SFF_8636; 1503 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1504 } else { 1505 modinfo->type = ETH_MODULE_SFF_8436; 1506 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1507 } 1508 break; 1509 1510 default: 1511 return -EINVAL; 1512 } 1513 1514 return 0; 1515 } 1516 1517 static int cxgb4_get_module_eeprom(struct net_device *dev, 1518 struct ethtool_eeprom *eprom, u8 *data) 1519 { 1520 int ret = 0, offset = eprom->offset, len = eprom->len; 1521 struct port_info *pi = netdev_priv(dev); 1522 struct adapter *adapter = pi->adapter; 1523 1524 memset(data, 0, eprom->len); 1525 if (offset + len <= I2C_PAGE_SIZE) 1526 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1527 I2C_DEV_ADDR_A0, offset, len, data); 1528 1529 /* offset + len spans 0xa0 and 0xa1 pages */ 1530 if (offset <= I2C_PAGE_SIZE) { 1531 /* read 0xa0 page */ 1532 len = I2C_PAGE_SIZE - offset; 1533 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1534 I2C_DEV_ADDR_A0, offset, len, data); 1535 if (ret) 1536 return ret; 1537 offset = I2C_PAGE_SIZE; 1538 /* Remaining bytes to be read from second page = 1539 * Total length - bytes read from first page 1540 */ 1541 len = eprom->len - len; 1542 } 1543 /* Read additional optical diagnostics from page 0xa2 if supported */ 1544 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2, 1545 offset, len, &data[eprom->len - len]); 1546 } 1547 1548 static u32 cxgb4_get_priv_flags(struct net_device *netdev) 1549 { 1550 struct port_info *pi = netdev_priv(netdev); 1551 struct adapter *adapter = pi->adapter; 1552 1553 return (adapter->eth_flags | pi->eth_flags); 1554 } 1555 1556 /** 1557 * set_flags - set/unset specified flags if passed in new_flags 1558 * @cur_flags: pointer to current flags 1559 * @new_flags: new incoming flags 1560 * @flags: set of flags to set/unset 1561 */ 1562 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags) 1563 { 1564 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags); 1565 } 1566 1567 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags) 1568 { 1569 struct port_info *pi = netdev_priv(netdev); 1570 struct adapter *adapter = pi->adapter; 1571 1572 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP); 1573 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT); 1574 1575 return 0; 1576 } 1577 1578 static const struct ethtool_ops cxgb_ethtool_ops = { 1579 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1580 ETHTOOL_COALESCE_RX_MAX_FRAMES | 1581 ETHTOOL_COALESCE_TX_USECS_IRQ | 1582 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 1583 .get_link_ksettings = get_link_ksettings, 1584 .set_link_ksettings = set_link_ksettings, 1585 .get_fecparam = get_fecparam, 1586 .set_fecparam = set_fecparam, 1587 .get_drvinfo = get_drvinfo, 1588 .get_msglevel = get_msglevel, 1589 .set_msglevel = set_msglevel, 1590 .get_ringparam = get_sge_param, 1591 .set_ringparam = set_sge_param, 1592 .get_coalesce = get_coalesce, 1593 .set_coalesce = set_coalesce, 1594 .get_eeprom_len = get_eeprom_len, 1595 .get_eeprom = get_eeprom, 1596 .set_eeprom = set_eeprom, 1597 .get_pauseparam = get_pauseparam, 1598 .set_pauseparam = set_pauseparam, 1599 .get_link = ethtool_op_get_link, 1600 .get_strings = get_strings, 1601 .set_phys_id = identify_port, 1602 .nway_reset = restart_autoneg, 1603 .get_sset_count = get_sset_count, 1604 .get_ethtool_stats = get_stats, 1605 .get_regs_len = get_regs_len, 1606 .get_regs = get_regs, 1607 .get_rxnfc = get_rxnfc, 1608 .get_rxfh_indir_size = get_rss_table_size, 1609 .get_rxfh = get_rss_table, 1610 .set_rxfh = set_rss_table, 1611 .flash_device = set_flash, 1612 .get_ts_info = get_ts_info, 1613 .set_dump = set_dump, 1614 .get_dump_flag = get_dump_flag, 1615 .get_dump_data = get_dump_data, 1616 .get_module_info = cxgb4_get_module_info, 1617 .get_module_eeprom = cxgb4_get_module_eeprom, 1618 .get_priv_flags = cxgb4_get_priv_flags, 1619 .set_priv_flags = cxgb4_set_priv_flags, 1620 }; 1621 1622 void cxgb4_set_ethtool_ops(struct net_device *netdev) 1623 { 1624 netdev->ethtool_ops = &cxgb_ethtool_ops; 1625 } 1626