1 /* 2 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * The full GNU General Public License is included in this distribution in 14 * the file called "COPYING". 15 * 16 */ 17 18 #include <linux/firmware.h> 19 #include <linux/mdio.h> 20 21 #include "cxgb4.h" 22 #include "t4_regs.h" 23 #include "t4fw_api.h" 24 #include "cxgb4_cudbg.h" 25 26 #define EEPROM_MAGIC 0x38E2F10C 27 28 static u32 get_msglevel(struct net_device *dev) 29 { 30 return netdev2adap(dev)->msg_enable; 31 } 32 33 static void set_msglevel(struct net_device *dev, u32 val) 34 { 35 netdev2adap(dev)->msg_enable = val; 36 } 37 38 static const char stats_strings[][ETH_GSTRING_LEN] = { 39 "tx_octets_ok ", 40 "tx_frames_ok ", 41 "tx_broadcast_frames ", 42 "tx_multicast_frames ", 43 "tx_unicast_frames ", 44 "tx_error_frames ", 45 46 "tx_frames_64 ", 47 "tx_frames_65_to_127 ", 48 "tx_frames_128_to_255 ", 49 "tx_frames_256_to_511 ", 50 "tx_frames_512_to_1023 ", 51 "tx_frames_1024_to_1518 ", 52 "tx_frames_1519_to_max ", 53 54 "tx_frames_dropped ", 55 "tx_pause_frames ", 56 "tx_ppp0_frames ", 57 "tx_ppp1_frames ", 58 "tx_ppp2_frames ", 59 "tx_ppp3_frames ", 60 "tx_ppp4_frames ", 61 "tx_ppp5_frames ", 62 "tx_ppp6_frames ", 63 "tx_ppp7_frames ", 64 65 "rx_octets_ok ", 66 "rx_frames_ok ", 67 "rx_broadcast_frames ", 68 "rx_multicast_frames ", 69 "rx_unicast_frames ", 70 71 "rx_frames_too_long ", 72 "rx_jabber_errors ", 73 "rx_fcs_errors ", 74 "rx_length_errors ", 75 "rx_symbol_errors ", 76 "rx_runt_frames ", 77 78 "rx_frames_64 ", 79 "rx_frames_65_to_127 ", 80 "rx_frames_128_to_255 ", 81 "rx_frames_256_to_511 ", 82 "rx_frames_512_to_1023 ", 83 "rx_frames_1024_to_1518 ", 84 "rx_frames_1519_to_max ", 85 86 "rx_pause_frames ", 87 "rx_ppp0_frames ", 88 "rx_ppp1_frames ", 89 "rx_ppp2_frames ", 90 "rx_ppp3_frames ", 91 "rx_ppp4_frames ", 92 "rx_ppp5_frames ", 93 "rx_ppp6_frames ", 94 "rx_ppp7_frames ", 95 96 "rx_bg0_frames_dropped ", 97 "rx_bg1_frames_dropped ", 98 "rx_bg2_frames_dropped ", 99 "rx_bg3_frames_dropped ", 100 "rx_bg0_frames_trunc ", 101 "rx_bg1_frames_trunc ", 102 "rx_bg2_frames_trunc ", 103 "rx_bg3_frames_trunc ", 104 105 "tso ", 106 "tx_csum_offload ", 107 "rx_csum_good ", 108 "vlan_extractions ", 109 "vlan_insertions ", 110 "gro_packets ", 111 "gro_merged ", 112 }; 113 114 static char adapter_stats_strings[][ETH_GSTRING_LEN] = { 115 "db_drop ", 116 "db_full ", 117 "db_empty ", 118 "write_coal_success ", 119 "write_coal_fail ", 120 }; 121 122 static char loopback_stats_strings[][ETH_GSTRING_LEN] = { 123 "-------Loopback----------- ", 124 "octets_ok ", 125 "frames_ok ", 126 "bcast_frames ", 127 "mcast_frames ", 128 "ucast_frames ", 129 "error_frames ", 130 "frames_64 ", 131 "frames_65_to_127 ", 132 "frames_128_to_255 ", 133 "frames_256_to_511 ", 134 "frames_512_to_1023 ", 135 "frames_1024_to_1518 ", 136 "frames_1519_to_max ", 137 "frames_dropped ", 138 "bg0_frames_dropped ", 139 "bg1_frames_dropped ", 140 "bg2_frames_dropped ", 141 "bg3_frames_dropped ", 142 "bg0_frames_trunc ", 143 "bg1_frames_trunc ", 144 "bg2_frames_trunc ", 145 "bg3_frames_trunc ", 146 }; 147 148 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = { 149 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr", 150 }; 151 152 static int get_sset_count(struct net_device *dev, int sset) 153 { 154 switch (sset) { 155 case ETH_SS_STATS: 156 return ARRAY_SIZE(stats_strings) + 157 ARRAY_SIZE(adapter_stats_strings) + 158 ARRAY_SIZE(loopback_stats_strings); 159 case ETH_SS_PRIV_FLAGS: 160 return ARRAY_SIZE(cxgb4_priv_flags_strings); 161 default: 162 return -EOPNOTSUPP; 163 } 164 } 165 166 static int get_regs_len(struct net_device *dev) 167 { 168 struct adapter *adap = netdev2adap(dev); 169 170 return t4_get_regs_len(adap); 171 } 172 173 static int get_eeprom_len(struct net_device *dev) 174 { 175 return EEPROMSIZE; 176 } 177 178 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 179 { 180 struct adapter *adapter = netdev2adap(dev); 181 u32 exprom_vers; 182 183 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver)); 184 strlcpy(info->version, cxgb4_driver_version, 185 sizeof(info->version)); 186 strlcpy(info->bus_info, pci_name(adapter->pdev), 187 sizeof(info->bus_info)); 188 info->regdump_len = get_regs_len(dev); 189 190 if (!adapter->params.fw_vers) 191 strcpy(info->fw_version, "N/A"); 192 else 193 snprintf(info->fw_version, sizeof(info->fw_version), 194 "%u.%u.%u.%u, TP %u.%u.%u.%u", 195 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers), 196 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers), 197 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers), 198 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers), 199 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers), 200 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers), 201 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers), 202 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers)); 203 204 if (!t4_get_exprom_version(adapter, &exprom_vers)) 205 snprintf(info->erom_version, sizeof(info->erom_version), 206 "%u.%u.%u.%u", 207 FW_HDR_FW_VER_MAJOR_G(exprom_vers), 208 FW_HDR_FW_VER_MINOR_G(exprom_vers), 209 FW_HDR_FW_VER_MICRO_G(exprom_vers), 210 FW_HDR_FW_VER_BUILD_G(exprom_vers)); 211 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings); 212 } 213 214 static void get_strings(struct net_device *dev, u32 stringset, u8 *data) 215 { 216 if (stringset == ETH_SS_STATS) { 217 memcpy(data, stats_strings, sizeof(stats_strings)); 218 data += sizeof(stats_strings); 219 memcpy(data, adapter_stats_strings, 220 sizeof(adapter_stats_strings)); 221 data += sizeof(adapter_stats_strings); 222 memcpy(data, loopback_stats_strings, 223 sizeof(loopback_stats_strings)); 224 } else if (stringset == ETH_SS_PRIV_FLAGS) { 225 memcpy(data, cxgb4_priv_flags_strings, 226 sizeof(cxgb4_priv_flags_strings)); 227 } 228 } 229 230 /* port stats maintained per queue of the port. They should be in the same 231 * order as in stats_strings above. 232 */ 233 struct queue_port_stats { 234 u64 tso; 235 u64 tx_csum; 236 u64 rx_csum; 237 u64 vlan_ex; 238 u64 vlan_ins; 239 u64 gro_pkts; 240 u64 gro_merged; 241 }; 242 243 struct adapter_stats { 244 u64 db_drop; 245 u64 db_full; 246 u64 db_empty; 247 u64 wc_success; 248 u64 wc_fail; 249 }; 250 251 static void collect_sge_port_stats(const struct adapter *adap, 252 const struct port_info *p, 253 struct queue_port_stats *s) 254 { 255 int i; 256 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset]; 257 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset]; 258 259 memset(s, 0, sizeof(*s)); 260 for (i = 0; i < p->nqsets; i++, rx++, tx++) { 261 s->tso += tx->tso; 262 s->tx_csum += tx->tx_cso; 263 s->rx_csum += rx->stats.rx_cso; 264 s->vlan_ex += rx->stats.vlan_ex; 265 s->vlan_ins += tx->vlan_ins; 266 s->gro_pkts += rx->stats.lro_pkts; 267 s->gro_merged += rx->stats.lro_merged; 268 } 269 } 270 271 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s) 272 { 273 u64 val1, val2; 274 275 memset(s, 0, sizeof(*s)); 276 277 s->db_drop = adap->db_stats.db_drop; 278 s->db_full = adap->db_stats.db_full; 279 s->db_empty = adap->db_stats.db_empty; 280 281 if (!is_t4(adap->params.chip)) { 282 int v; 283 284 v = t4_read_reg(adap, SGE_STAT_CFG_A); 285 if (STATSOURCE_T5_G(v) == 7) { 286 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A); 287 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A); 288 s->wc_success = val1 - val2; 289 s->wc_fail = val2; 290 } 291 } 292 } 293 294 static void get_stats(struct net_device *dev, struct ethtool_stats *stats, 295 u64 *data) 296 { 297 struct port_info *pi = netdev_priv(dev); 298 struct adapter *adapter = pi->adapter; 299 struct lb_port_stats s; 300 int i; 301 u64 *p0; 302 303 t4_get_port_stats_offset(adapter, pi->tx_chan, 304 (struct port_stats *)data, 305 &pi->stats_base); 306 307 data += sizeof(struct port_stats) / sizeof(u64); 308 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); 309 data += sizeof(struct queue_port_stats) / sizeof(u64); 310 collect_adapter_stats(adapter, (struct adapter_stats *)data); 311 data += sizeof(struct adapter_stats) / sizeof(u64); 312 313 *data++ = (u64)pi->port_id; 314 memset(&s, 0, sizeof(s)); 315 t4_get_lb_stats(adapter, pi->port_id, &s); 316 317 p0 = &s.octets; 318 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++) 319 *data++ = (unsigned long long)*p0++; 320 } 321 322 static void get_regs(struct net_device *dev, struct ethtool_regs *regs, 323 void *buf) 324 { 325 struct adapter *adap = netdev2adap(dev); 326 size_t buf_size; 327 328 buf_size = t4_get_regs_len(adap); 329 regs->version = mk_adap_vers(adap); 330 t4_get_regs(adap, buf, buf_size); 331 } 332 333 static int restart_autoneg(struct net_device *dev) 334 { 335 struct port_info *p = netdev_priv(dev); 336 337 if (!netif_running(dev)) 338 return -EAGAIN; 339 if (p->link_cfg.autoneg != AUTONEG_ENABLE) 340 return -EINVAL; 341 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan); 342 return 0; 343 } 344 345 static int identify_port(struct net_device *dev, 346 enum ethtool_phys_id_state state) 347 { 348 unsigned int val; 349 struct adapter *adap = netdev2adap(dev); 350 351 if (state == ETHTOOL_ID_ACTIVE) 352 val = 0xffff; 353 else if (state == ETHTOOL_ID_INACTIVE) 354 val = 0; 355 else 356 return -EINVAL; 357 358 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val); 359 } 360 361 /** 362 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool 363 * @port_type: Firmware Port Type 364 * @mod_type: Firmware Module Type 365 * 366 * Translate Firmware Port/Module type to Ethtool Port Type. 367 */ 368 static int from_fw_port_mod_type(enum fw_port_type port_type, 369 enum fw_port_module_type mod_type) 370 { 371 if (port_type == FW_PORT_TYPE_BT_SGMII || 372 port_type == FW_PORT_TYPE_BT_XFI || 373 port_type == FW_PORT_TYPE_BT_XAUI) { 374 return PORT_TP; 375 } else if (port_type == FW_PORT_TYPE_FIBER_XFI || 376 port_type == FW_PORT_TYPE_FIBER_XAUI) { 377 return PORT_FIBRE; 378 } else if (port_type == FW_PORT_TYPE_SFP || 379 port_type == FW_PORT_TYPE_QSFP_10G || 380 port_type == FW_PORT_TYPE_QSA || 381 port_type == FW_PORT_TYPE_QSFP || 382 port_type == FW_PORT_TYPE_CR4_QSFP || 383 port_type == FW_PORT_TYPE_CR_QSFP || 384 port_type == FW_PORT_TYPE_CR2_QSFP || 385 port_type == FW_PORT_TYPE_SFP28) { 386 if (mod_type == FW_PORT_MOD_TYPE_LR || 387 mod_type == FW_PORT_MOD_TYPE_SR || 388 mod_type == FW_PORT_MOD_TYPE_ER || 389 mod_type == FW_PORT_MOD_TYPE_LRM) 390 return PORT_FIBRE; 391 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || 392 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) 393 return PORT_DA; 394 else 395 return PORT_OTHER; 396 } else if (port_type == FW_PORT_TYPE_KR4_100G || 397 port_type == FW_PORT_TYPE_KR_SFP28 || 398 port_type == FW_PORT_TYPE_KR_XLAUI) { 399 return PORT_NONE; 400 } 401 402 return PORT_OTHER; 403 } 404 405 /** 406 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities 407 * @speed: speed in Kb/s 408 * 409 * Translates a specific Port Speed into a Firmware Port Capabilities 410 * value. 411 */ 412 static unsigned int speed_to_fw_caps(int speed) 413 { 414 if (speed == 100) 415 return FW_PORT_CAP32_SPEED_100M; 416 if (speed == 1000) 417 return FW_PORT_CAP32_SPEED_1G; 418 if (speed == 10000) 419 return FW_PORT_CAP32_SPEED_10G; 420 if (speed == 25000) 421 return FW_PORT_CAP32_SPEED_25G; 422 if (speed == 40000) 423 return FW_PORT_CAP32_SPEED_40G; 424 if (speed == 50000) 425 return FW_PORT_CAP32_SPEED_50G; 426 if (speed == 100000) 427 return FW_PORT_CAP32_SPEED_100G; 428 if (speed == 200000) 429 return FW_PORT_CAP32_SPEED_200G; 430 if (speed == 400000) 431 return FW_PORT_CAP32_SPEED_400G; 432 return 0; 433 } 434 435 /** 436 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask 437 * @port_type: Firmware Port Type 438 * @fw_caps: Firmware Port Capabilities 439 * @link_mode_mask: ethtool Link Mode Mask 440 * 441 * Translate a Firmware Port Capabilities specification to an ethtool 442 * Link Mode Mask. 443 */ 444 static void fw_caps_to_lmm(enum fw_port_type port_type, 445 fw_port_cap32_t fw_caps, 446 unsigned long *link_mode_mask) 447 { 448 #define SET_LMM(__lmm_name) \ 449 do { \ 450 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 451 link_mode_mask); \ 452 } while (0) 453 454 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \ 455 do { \ 456 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \ 457 SET_LMM(__lmm_name); \ 458 } while (0) 459 460 switch (port_type) { 461 case FW_PORT_TYPE_BT_SGMII: 462 case FW_PORT_TYPE_BT_XFI: 463 case FW_PORT_TYPE_BT_XAUI: 464 SET_LMM(TP); 465 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full); 466 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 467 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 468 break; 469 470 case FW_PORT_TYPE_KX4: 471 case FW_PORT_TYPE_KX: 472 SET_LMM(Backplane); 473 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 474 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 475 break; 476 477 case FW_PORT_TYPE_KR: 478 SET_LMM(Backplane); 479 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 480 break; 481 482 case FW_PORT_TYPE_BP_AP: 483 SET_LMM(Backplane); 484 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 485 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 486 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 487 break; 488 489 case FW_PORT_TYPE_BP4_AP: 490 SET_LMM(Backplane); 491 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 492 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 493 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 494 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 495 break; 496 497 case FW_PORT_TYPE_FIBER_XFI: 498 case FW_PORT_TYPE_FIBER_XAUI: 499 case FW_PORT_TYPE_SFP: 500 case FW_PORT_TYPE_QSFP_10G: 501 case FW_PORT_TYPE_QSA: 502 SET_LMM(FIBRE); 503 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 504 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 505 break; 506 507 case FW_PORT_TYPE_BP40_BA: 508 case FW_PORT_TYPE_QSFP: 509 SET_LMM(FIBRE); 510 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 511 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 512 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 513 break; 514 515 case FW_PORT_TYPE_CR_QSFP: 516 case FW_PORT_TYPE_SFP28: 517 SET_LMM(FIBRE); 518 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 519 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 520 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 521 break; 522 523 case FW_PORT_TYPE_KR_SFP28: 524 SET_LMM(Backplane); 525 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 526 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 527 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full); 528 break; 529 530 case FW_PORT_TYPE_KR_XLAUI: 531 SET_LMM(Backplane); 532 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 533 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 534 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full); 535 break; 536 537 case FW_PORT_TYPE_CR2_QSFP: 538 SET_LMM(FIBRE); 539 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full); 540 break; 541 542 case FW_PORT_TYPE_KR4_100G: 543 case FW_PORT_TYPE_CR4_QSFP: 544 SET_LMM(FIBRE); 545 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 546 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 547 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 548 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 549 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full); 550 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full); 551 break; 552 553 default: 554 break; 555 } 556 557 if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) { 558 FW_CAPS_TO_LMM(FEC_RS, FEC_RS); 559 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER); 560 } else { 561 SET_LMM(FEC_NONE); 562 } 563 564 FW_CAPS_TO_LMM(ANEG, Autoneg); 565 FW_CAPS_TO_LMM(802_3_PAUSE, Pause); 566 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause); 567 568 #undef FW_CAPS_TO_LMM 569 #undef SET_LMM 570 } 571 572 /** 573 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware 574 * capabilities 575 * @et_lmm: ethtool Link Mode Mask 576 * 577 * Translate ethtool Link Mode Mask into a Firmware Port capabilities 578 * value. 579 */ 580 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask) 581 { 582 unsigned int fw_caps = 0; 583 584 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \ 585 do { \ 586 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 587 link_mode_mask)) \ 588 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \ 589 } while (0) 590 591 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M); 592 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G); 593 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G); 594 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G); 595 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G); 596 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G); 597 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G); 598 599 #undef LMM_TO_FW_CAPS 600 601 return fw_caps; 602 } 603 604 static int get_link_ksettings(struct net_device *dev, 605 struct ethtool_link_ksettings *link_ksettings) 606 { 607 struct port_info *pi = netdev_priv(dev); 608 struct ethtool_link_settings *base = &link_ksettings->base; 609 610 /* For the nonce, the Firmware doesn't send up Port State changes 611 * when the Virtual Interface attached to the Port is down. So 612 * if it's down, let's grab any changes. 613 */ 614 if (!netif_running(dev)) 615 (void)t4_update_port_info(pi); 616 617 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported); 618 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising); 619 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising); 620 621 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type); 622 623 if (pi->mdio_addr >= 0) { 624 base->phy_address = pi->mdio_addr; 625 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII 626 ? ETH_MDIO_SUPPORTS_C22 627 : ETH_MDIO_SUPPORTS_C45); 628 } else { 629 base->phy_address = 255; 630 base->mdio_support = 0; 631 } 632 633 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps, 634 link_ksettings->link_modes.supported); 635 fw_caps_to_lmm(pi->port_type, 636 t4_link_acaps(pi->adapter, 637 pi->lport, 638 &pi->link_cfg), 639 link_ksettings->link_modes.advertising); 640 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps, 641 link_ksettings->link_modes.lp_advertising); 642 643 base->speed = (netif_carrier_ok(dev) 644 ? pi->link_cfg.speed 645 : SPEED_UNKNOWN); 646 base->duplex = DUPLEX_FULL; 647 648 base->autoneg = pi->link_cfg.autoneg; 649 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) 650 ethtool_link_ksettings_add_link_mode(link_ksettings, 651 supported, Autoneg); 652 if (pi->link_cfg.autoneg) 653 ethtool_link_ksettings_add_link_mode(link_ksettings, 654 advertising, Autoneg); 655 656 return 0; 657 } 658 659 static int set_link_ksettings(struct net_device *dev, 660 const struct ethtool_link_ksettings *link_ksettings) 661 { 662 struct port_info *pi = netdev_priv(dev); 663 struct link_config *lc = &pi->link_cfg; 664 const struct ethtool_link_settings *base = &link_ksettings->base; 665 struct link_config old_lc; 666 unsigned int fw_caps; 667 int ret = 0; 668 669 /* only full-duplex supported */ 670 if (base->duplex != DUPLEX_FULL) 671 return -EINVAL; 672 673 old_lc = *lc; 674 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) || 675 base->autoneg == AUTONEG_DISABLE) { 676 fw_caps = speed_to_fw_caps(base->speed); 677 678 /* Speed must be supported by Physical Port Capabilities. */ 679 if (!(lc->pcaps & fw_caps)) 680 return -EINVAL; 681 682 lc->speed_caps = fw_caps; 683 lc->acaps = fw_caps; 684 } else { 685 fw_caps = 686 lmm_to_fw_caps(link_ksettings->link_modes.advertising); 687 if (!(lc->pcaps & fw_caps)) 688 return -EINVAL; 689 lc->speed_caps = 0; 690 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG; 691 } 692 lc->autoneg = base->autoneg; 693 694 /* If the firmware rejects the Link Configuration request, back out 695 * the changes and report the error. 696 */ 697 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc); 698 if (ret) 699 *lc = old_lc; 700 701 return ret; 702 } 703 704 /* Translate the Firmware FEC value into the ethtool value. */ 705 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec) 706 { 707 unsigned int eth_fec = 0; 708 709 if (fw_fec & FW_PORT_CAP32_FEC_RS) 710 eth_fec |= ETHTOOL_FEC_RS; 711 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 712 eth_fec |= ETHTOOL_FEC_BASER; 713 714 /* if nothing is set, then FEC is off */ 715 if (!eth_fec) 716 eth_fec = ETHTOOL_FEC_OFF; 717 718 return eth_fec; 719 } 720 721 /* Translate Common Code FEC value into ethtool value. */ 722 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec) 723 { 724 unsigned int eth_fec = 0; 725 726 if (cc_fec & FEC_AUTO) 727 eth_fec |= ETHTOOL_FEC_AUTO; 728 if (cc_fec & FEC_RS) 729 eth_fec |= ETHTOOL_FEC_RS; 730 if (cc_fec & FEC_BASER_RS) 731 eth_fec |= ETHTOOL_FEC_BASER; 732 733 /* if nothing is set, then FEC is off */ 734 if (!eth_fec) 735 eth_fec = ETHTOOL_FEC_OFF; 736 737 return eth_fec; 738 } 739 740 /* Translate ethtool FEC value into Common Code value. */ 741 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec) 742 { 743 unsigned int cc_fec = 0; 744 745 if (eth_fec & ETHTOOL_FEC_OFF) 746 return cc_fec; 747 748 if (eth_fec & ETHTOOL_FEC_AUTO) 749 cc_fec |= FEC_AUTO; 750 if (eth_fec & ETHTOOL_FEC_RS) 751 cc_fec |= FEC_RS; 752 if (eth_fec & ETHTOOL_FEC_BASER) 753 cc_fec |= FEC_BASER_RS; 754 755 return cc_fec; 756 } 757 758 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 759 { 760 const struct port_info *pi = netdev_priv(dev); 761 const struct link_config *lc = &pi->link_cfg; 762 763 /* Translate the Firmware FEC Support into the ethtool value. We 764 * always support IEEE 802.3 "automatic" selection of Link FEC type if 765 * any FEC is supported. 766 */ 767 fec->fec = fwcap_to_eth_fec(lc->pcaps); 768 if (fec->fec != ETHTOOL_FEC_OFF) 769 fec->fec |= ETHTOOL_FEC_AUTO; 770 771 /* Translate the current internal FEC parameters into the 772 * ethtool values. 773 */ 774 fec->active_fec = cc_to_eth_fec(lc->fec); 775 776 return 0; 777 } 778 779 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 780 { 781 struct port_info *pi = netdev_priv(dev); 782 struct link_config *lc = &pi->link_cfg; 783 struct link_config old_lc; 784 int ret; 785 786 /* Save old Link Configuration in case the L1 Configure below 787 * fails. 788 */ 789 old_lc = *lc; 790 791 /* Try to perform the L1 Configure and return the result of that 792 * effort. If it fails, revert the attempted change. 793 */ 794 lc->requested_fec = eth_to_cc_fec(fec->fec); 795 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, 796 pi->tx_chan, lc); 797 if (ret) 798 *lc = old_lc; 799 return ret; 800 } 801 802 static void get_pauseparam(struct net_device *dev, 803 struct ethtool_pauseparam *epause) 804 { 805 struct port_info *p = netdev_priv(dev); 806 807 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0; 808 epause->rx_pause = (p->link_cfg.fc & PAUSE_RX) != 0; 809 epause->tx_pause = (p->link_cfg.fc & PAUSE_TX) != 0; 810 } 811 812 static int set_pauseparam(struct net_device *dev, 813 struct ethtool_pauseparam *epause) 814 { 815 struct port_info *p = netdev_priv(dev); 816 struct link_config *lc = &p->link_cfg; 817 818 if (epause->autoneg == AUTONEG_DISABLE) 819 lc->requested_fc = 0; 820 else if (lc->pcaps & FW_PORT_CAP32_ANEG) 821 lc->requested_fc = PAUSE_AUTONEG; 822 else 823 return -EINVAL; 824 825 if (epause->rx_pause) 826 lc->requested_fc |= PAUSE_RX; 827 if (epause->tx_pause) 828 lc->requested_fc |= PAUSE_TX; 829 if (netif_running(dev)) 830 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan, 831 lc); 832 return 0; 833 } 834 835 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 836 { 837 const struct port_info *pi = netdev_priv(dev); 838 const struct sge *s = &pi->adapter->sge; 839 840 e->rx_max_pending = MAX_RX_BUFFERS; 841 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES; 842 e->rx_jumbo_max_pending = 0; 843 e->tx_max_pending = MAX_TXQ_ENTRIES; 844 845 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8; 846 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size; 847 e->rx_jumbo_pending = 0; 848 e->tx_pending = s->ethtxq[pi->first_qset].q.size; 849 } 850 851 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 852 { 853 int i; 854 const struct port_info *pi = netdev_priv(dev); 855 struct adapter *adapter = pi->adapter; 856 struct sge *s = &adapter->sge; 857 858 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending || 859 e->tx_pending > MAX_TXQ_ENTRIES || 860 e->rx_mini_pending > MAX_RSPQ_ENTRIES || 861 e->rx_mini_pending < MIN_RSPQ_ENTRIES || 862 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES) 863 return -EINVAL; 864 865 if (adapter->flags & CXGB4_FULL_INIT_DONE) 866 return -EBUSY; 867 868 for (i = 0; i < pi->nqsets; ++i) { 869 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending; 870 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8; 871 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending; 872 } 873 return 0; 874 } 875 876 /** 877 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete! 878 * @dev: the network device 879 * @us: the hold-off time in us, or 0 to disable timer 880 * @cnt: the hold-off packet count, or 0 to disable counter 881 * 882 * Set the RX interrupt hold-off parameters for a network device. 883 */ 884 static int set_rx_intr_params(struct net_device *dev, 885 unsigned int us, unsigned int cnt) 886 { 887 int i, err; 888 struct port_info *pi = netdev_priv(dev); 889 struct adapter *adap = pi->adapter; 890 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 891 892 for (i = 0; i < pi->nqsets; i++, q++) { 893 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt); 894 if (err) 895 return err; 896 } 897 return 0; 898 } 899 900 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx) 901 { 902 int i; 903 struct port_info *pi = netdev_priv(dev); 904 struct adapter *adap = pi->adapter; 905 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 906 907 for (i = 0; i < pi->nqsets; i++, q++) 908 q->rspq.adaptive_rx = adaptive_rx; 909 910 return 0; 911 } 912 913 static int get_adaptive_rx_setting(struct net_device *dev) 914 { 915 struct port_info *pi = netdev_priv(dev); 916 struct adapter *adap = pi->adapter; 917 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 918 919 return q->rspq.adaptive_rx; 920 } 921 922 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all 923 * Ethernet TX Queues. 924 */ 925 static int get_dbqtimer_tick(struct net_device *dev) 926 { 927 struct port_info *pi = netdev_priv(dev); 928 struct adapter *adap = pi->adapter; 929 930 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 931 return 0; 932 933 return adap->sge.dbqtimer_tick; 934 } 935 936 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 937 * associated with a Network Device. 938 */ 939 static int get_dbqtimer(struct net_device *dev) 940 { 941 struct port_info *pi = netdev_priv(dev); 942 struct adapter *adap = pi->adapter; 943 struct sge_eth_txq *txq; 944 945 txq = &adap->sge.ethtxq[pi->first_qset]; 946 947 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 948 return 0; 949 950 /* all of the TX Queues use the same Timer Index */ 951 return adap->sge.dbqtimer_val[txq->dbqtimerix]; 952 } 953 954 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 955 * Queues. This is the fundamental "Tick" that sets the scale of values which 956 * can be used. Individual Ethernet TX Queues index into a relatively small 957 * array of Tick Multipliers. Changing the base Tick will thus change all of 958 * the resulting Timer Values associated with those multipliers for all 959 * Ethernet TX Queues. 960 */ 961 static int set_dbqtimer_tick(struct net_device *dev, int usecs) 962 { 963 struct port_info *pi = netdev_priv(dev); 964 struct adapter *adap = pi->adapter; 965 struct sge *s = &adap->sge; 966 u32 param, val; 967 int ret; 968 969 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 970 return 0; 971 972 /* return early if it's the same Timer Tick we're already using */ 973 if (s->dbqtimer_tick == usecs) 974 return 0; 975 976 /* attempt to set the new Timer Tick value */ 977 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 978 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK)); 979 val = usecs; 980 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val); 981 if (ret) 982 return ret; 983 s->dbqtimer_tick = usecs; 984 985 /* if successful, reread resulting dependent Timer values */ 986 ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val), 987 s->dbqtimer_val); 988 return ret; 989 } 990 991 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 992 * associated with a Network Device. There is a relatively small array of 993 * possible Timer Values so we need to pick the closest value available. 994 */ 995 static int set_dbqtimer(struct net_device *dev, int usecs) 996 { 997 int qix, timerix, min_timerix, delta, min_delta; 998 struct port_info *pi = netdev_priv(dev); 999 struct adapter *adap = pi->adapter; 1000 struct sge *s = &adap->sge; 1001 struct sge_eth_txq *txq; 1002 u32 param, val; 1003 int ret; 1004 1005 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 1006 return 0; 1007 1008 /* Find the SGE Doorbell Timer Value that's closest to the requested 1009 * value. 1010 */ 1011 min_delta = INT_MAX; 1012 min_timerix = 0; 1013 for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) { 1014 delta = s->dbqtimer_val[timerix] - usecs; 1015 if (delta < 0) 1016 delta = -delta; 1017 if (delta < min_delta) { 1018 min_delta = delta; 1019 min_timerix = timerix; 1020 } 1021 } 1022 1023 /* Return early if it's the same Timer Index we're already using. 1024 * We use the same Timer Index for all of the TX Queues for an 1025 * interface so it's only necessary to check the first one. 1026 */ 1027 txq = &s->ethtxq[pi->first_qset]; 1028 if (txq->dbqtimerix == min_timerix) 1029 return 0; 1030 1031 for (qix = 0; qix < pi->nqsets; qix++, txq++) { 1032 if (adap->flags & CXGB4_FULL_INIT_DONE) { 1033 param = 1034 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) | 1035 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) | 1036 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id)); 1037 val = min_timerix; 1038 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1039 1, ¶m, &val); 1040 if (ret) 1041 return ret; 1042 } 1043 txq->dbqtimerix = min_timerix; 1044 } 1045 return 0; 1046 } 1047 1048 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 1049 * Queues and the Timer Value for the Ethernet TX Queues associated with a 1050 * Network Device. Since changing the global Tick changes all of the 1051 * available Timer Values, we need to do this first before selecting the 1052 * resulting closest Timer Value. Moreover, since the Tick is global, 1053 * changing it affects the Timer Values for all Network Devices on the 1054 * adapter. So, before changing the Tick, we grab all of the current Timer 1055 * Values for other Network Devices on this Adapter and then attempt to select 1056 * new Timer Values which are close to the old values ... 1057 */ 1058 static int set_dbqtimer_tickval(struct net_device *dev, 1059 int tick_usecs, int timer_usecs) 1060 { 1061 struct port_info *pi = netdev_priv(dev); 1062 struct adapter *adap = pi->adapter; 1063 int timer[MAX_NPORTS]; 1064 unsigned int port; 1065 int ret; 1066 1067 /* Grab the other adapter Network Interface current timers and fill in 1068 * the new one for this Network Interface. 1069 */ 1070 for_each_port(adap, port) 1071 if (port == pi->port_id) 1072 timer[port] = timer_usecs; 1073 else 1074 timer[port] = get_dbqtimer(adap->port[port]); 1075 1076 /* Change the global Tick first ... */ 1077 ret = set_dbqtimer_tick(dev, tick_usecs); 1078 if (ret) 1079 return ret; 1080 1081 /* ... and then set all of the Network Interface Timer Values ... */ 1082 for_each_port(adap, port) { 1083 ret = set_dbqtimer(adap->port[port], timer[port]); 1084 if (ret) 1085 return ret; 1086 } 1087 1088 return 0; 1089 } 1090 1091 static int set_coalesce(struct net_device *dev, 1092 struct ethtool_coalesce *coalesce) 1093 { 1094 int ret; 1095 1096 set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce); 1097 1098 ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs, 1099 coalesce->rx_max_coalesced_frames); 1100 if (ret) 1101 return ret; 1102 1103 return set_dbqtimer_tickval(dev, 1104 coalesce->tx_coalesce_usecs_irq, 1105 coalesce->tx_coalesce_usecs); 1106 } 1107 1108 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 1109 { 1110 const struct port_info *pi = netdev_priv(dev); 1111 const struct adapter *adap = pi->adapter; 1112 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq; 1113 1114 c->rx_coalesce_usecs = qtimer_val(adap, rq); 1115 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ? 1116 adap->sge.counter_val[rq->pktcnt_idx] : 0; 1117 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev); 1118 c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev); 1119 c->tx_coalesce_usecs = get_dbqtimer(dev); 1120 return 0; 1121 } 1122 1123 /* The next two routines implement eeprom read/write from physical addresses. 1124 */ 1125 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) 1126 { 1127 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1128 1129 if (vaddr >= 0) 1130 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); 1131 return vaddr < 0 ? vaddr : 0; 1132 } 1133 1134 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) 1135 { 1136 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1137 1138 if (vaddr >= 0) 1139 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); 1140 return vaddr < 0 ? vaddr : 0; 1141 } 1142 1143 #define EEPROM_MAGIC 0x38E2F10C 1144 1145 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e, 1146 u8 *data) 1147 { 1148 int i, err = 0; 1149 struct adapter *adapter = netdev2adap(dev); 1150 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL); 1151 1152 if (!buf) 1153 return -ENOMEM; 1154 1155 e->magic = EEPROM_MAGIC; 1156 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4) 1157 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]); 1158 1159 if (!err) 1160 memcpy(data, buf + e->offset, e->len); 1161 kvfree(buf); 1162 return err; 1163 } 1164 1165 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, 1166 u8 *data) 1167 { 1168 u8 *buf; 1169 int err = 0; 1170 u32 aligned_offset, aligned_len, *p; 1171 struct adapter *adapter = netdev2adap(dev); 1172 1173 if (eeprom->magic != EEPROM_MAGIC) 1174 return -EINVAL; 1175 1176 aligned_offset = eeprom->offset & ~3; 1177 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; 1178 1179 if (adapter->pf > 0) { 1180 u32 start = 1024 + adapter->pf * EEPROMPFSIZE; 1181 1182 if (aligned_offset < start || 1183 aligned_offset + aligned_len > start + EEPROMPFSIZE) 1184 return -EPERM; 1185 } 1186 1187 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { 1188 /* RMW possibly needed for first or last words. 1189 */ 1190 buf = kvzalloc(aligned_len, GFP_KERNEL); 1191 if (!buf) 1192 return -ENOMEM; 1193 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf); 1194 if (!err && aligned_len > 4) 1195 err = eeprom_rd_phys(adapter, 1196 aligned_offset + aligned_len - 4, 1197 (u32 *)&buf[aligned_len - 4]); 1198 if (err) 1199 goto out; 1200 memcpy(buf + (eeprom->offset & 3), data, eeprom->len); 1201 } else { 1202 buf = data; 1203 } 1204 1205 err = t4_seeprom_wp(adapter, false); 1206 if (err) 1207 goto out; 1208 1209 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { 1210 err = eeprom_wr_phys(adapter, aligned_offset, *p); 1211 aligned_offset += 4; 1212 } 1213 1214 if (!err) 1215 err = t4_seeprom_wp(adapter, true); 1216 out: 1217 if (buf != data) 1218 kvfree(buf); 1219 return err; 1220 } 1221 1222 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) 1223 { 1224 int ret; 1225 const struct firmware *fw; 1226 struct adapter *adap = netdev2adap(netdev); 1227 unsigned int mbox = PCIE_FW_MASTER_M + 1; 1228 u32 pcie_fw; 1229 unsigned int master; 1230 u8 master_vld = 0; 1231 1232 pcie_fw = t4_read_reg(adap, PCIE_FW_A); 1233 master = PCIE_FW_MASTER_G(pcie_fw); 1234 if (pcie_fw & PCIE_FW_MASTER_VLD_F) 1235 master_vld = 1; 1236 /* if csiostor is the master return */ 1237 if (master_vld && (master != adap->pf)) { 1238 dev_warn(adap->pdev_dev, 1239 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n"); 1240 return -EOPNOTSUPP; 1241 } 1242 1243 ef->data[sizeof(ef->data) - 1] = '\0'; 1244 ret = request_firmware(&fw, ef->data, adap->pdev_dev); 1245 if (ret < 0) 1246 return ret; 1247 1248 /* If the adapter has been fully initialized then we'll go ahead and 1249 * try to get the firmware's cooperation in upgrading to the new 1250 * firmware image otherwise we'll try to do the entire job from the 1251 * host ... and we always "force" the operation in this path. 1252 */ 1253 if (adap->flags & CXGB4_FULL_INIT_DONE) 1254 mbox = adap->mbox; 1255 1256 ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1); 1257 release_firmware(fw); 1258 if (!ret) 1259 dev_info(adap->pdev_dev, 1260 "loaded firmware %s, reload cxgb4 driver\n", ef->data); 1261 return ret; 1262 } 1263 1264 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info) 1265 { 1266 struct port_info *pi = netdev_priv(dev); 1267 struct adapter *adapter = pi->adapter; 1268 1269 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1270 SOF_TIMESTAMPING_RX_SOFTWARE | 1271 SOF_TIMESTAMPING_SOFTWARE; 1272 1273 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE | 1274 SOF_TIMESTAMPING_TX_HARDWARE | 1275 SOF_TIMESTAMPING_RAW_HARDWARE; 1276 1277 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | 1278 (1 << HWTSTAMP_TX_ON); 1279 1280 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 1281 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1282 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1283 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1284 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1285 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1286 1287 if (adapter->ptp_clock) 1288 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock); 1289 else 1290 ts_info->phc_index = -1; 1291 1292 return 0; 1293 } 1294 1295 static u32 get_rss_table_size(struct net_device *dev) 1296 { 1297 const struct port_info *pi = netdev_priv(dev); 1298 1299 return pi->rss_size; 1300 } 1301 1302 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc) 1303 { 1304 const struct port_info *pi = netdev_priv(dev); 1305 unsigned int n = pi->rss_size; 1306 1307 if (hfunc) 1308 *hfunc = ETH_RSS_HASH_TOP; 1309 if (!p) 1310 return 0; 1311 while (n--) 1312 p[n] = pi->rss[n]; 1313 return 0; 1314 } 1315 1316 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key, 1317 const u8 hfunc) 1318 { 1319 unsigned int i; 1320 struct port_info *pi = netdev_priv(dev); 1321 1322 /* We require at least one supported parameter to be changed and no 1323 * change in any of the unsupported parameters 1324 */ 1325 if (key || 1326 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)) 1327 return -EOPNOTSUPP; 1328 if (!p) 1329 return 0; 1330 1331 /* Interface must be brought up atleast once */ 1332 if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) { 1333 for (i = 0; i < pi->rss_size; i++) 1334 pi->rss[i] = p[i]; 1335 1336 return cxgb4_write_rss(pi, pi->rss); 1337 } 1338 1339 return -EPERM; 1340 } 1341 1342 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1343 u32 *rules) 1344 { 1345 const struct port_info *pi = netdev_priv(dev); 1346 1347 switch (info->cmd) { 1348 case ETHTOOL_GRXFH: { 1349 unsigned int v = pi->rss_mode; 1350 1351 info->data = 0; 1352 switch (info->flow_type) { 1353 case TCP_V4_FLOW: 1354 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) 1355 info->data = RXH_IP_SRC | RXH_IP_DST | 1356 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1357 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1358 info->data = RXH_IP_SRC | RXH_IP_DST; 1359 break; 1360 case UDP_V4_FLOW: 1361 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && 1362 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1363 info->data = RXH_IP_SRC | RXH_IP_DST | 1364 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1365 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1366 info->data = RXH_IP_SRC | RXH_IP_DST; 1367 break; 1368 case SCTP_V4_FLOW: 1369 case AH_ESP_V4_FLOW: 1370 case IPV4_FLOW: 1371 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1372 info->data = RXH_IP_SRC | RXH_IP_DST; 1373 break; 1374 case TCP_V6_FLOW: 1375 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) 1376 info->data = RXH_IP_SRC | RXH_IP_DST | 1377 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1378 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1379 info->data = RXH_IP_SRC | RXH_IP_DST; 1380 break; 1381 case UDP_V6_FLOW: 1382 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && 1383 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1384 info->data = RXH_IP_SRC | RXH_IP_DST | 1385 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1386 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1387 info->data = RXH_IP_SRC | RXH_IP_DST; 1388 break; 1389 case SCTP_V6_FLOW: 1390 case AH_ESP_V6_FLOW: 1391 case IPV6_FLOW: 1392 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1393 info->data = RXH_IP_SRC | RXH_IP_DST; 1394 break; 1395 } 1396 return 0; 1397 } 1398 case ETHTOOL_GRXRINGS: 1399 info->data = pi->nqsets; 1400 return 0; 1401 } 1402 return -EOPNOTSUPP; 1403 } 1404 1405 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump) 1406 { 1407 struct adapter *adapter = netdev2adap(dev); 1408 u32 len = 0; 1409 1410 len = sizeof(struct cudbg_hdr) + 1411 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1412 len += cxgb4_get_dump_length(adapter, eth_dump->flag); 1413 1414 adapter->eth_dump.flag = eth_dump->flag; 1415 adapter->eth_dump.len = len; 1416 return 0; 1417 } 1418 1419 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump) 1420 { 1421 struct adapter *adapter = netdev2adap(dev); 1422 1423 eth_dump->flag = adapter->eth_dump.flag; 1424 eth_dump->len = adapter->eth_dump.len; 1425 eth_dump->version = adapter->eth_dump.version; 1426 return 0; 1427 } 1428 1429 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump, 1430 void *buf) 1431 { 1432 struct adapter *adapter = netdev2adap(dev); 1433 u32 len = 0; 1434 int ret = 0; 1435 1436 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE) 1437 return -ENOENT; 1438 1439 len = sizeof(struct cudbg_hdr) + 1440 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1441 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag); 1442 if (eth_dump->len < len) 1443 return -ENOMEM; 1444 1445 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag); 1446 if (ret) 1447 return ret; 1448 1449 eth_dump->flag = adapter->eth_dump.flag; 1450 eth_dump->len = len; 1451 eth_dump->version = adapter->eth_dump.version; 1452 return 0; 1453 } 1454 1455 static int cxgb4_get_module_info(struct net_device *dev, 1456 struct ethtool_modinfo *modinfo) 1457 { 1458 struct port_info *pi = netdev_priv(dev); 1459 u8 sff8472_comp, sff_diag_type, sff_rev; 1460 struct adapter *adapter = pi->adapter; 1461 int ret; 1462 1463 if (!t4_is_inserted_mod_type(pi->mod_type)) 1464 return -EINVAL; 1465 1466 switch (pi->port_type) { 1467 case FW_PORT_TYPE_SFP: 1468 case FW_PORT_TYPE_QSA: 1469 case FW_PORT_TYPE_SFP28: 1470 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1471 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR, 1472 SFF_8472_COMP_LEN, &sff8472_comp); 1473 if (ret) 1474 return ret; 1475 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1476 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR, 1477 SFP_DIAG_TYPE_LEN, &sff_diag_type); 1478 if (ret) 1479 return ret; 1480 1481 if (!sff8472_comp || (sff_diag_type & 4)) { 1482 modinfo->type = ETH_MODULE_SFF_8079; 1483 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 1484 } else { 1485 modinfo->type = ETH_MODULE_SFF_8472; 1486 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1487 } 1488 break; 1489 1490 case FW_PORT_TYPE_QSFP: 1491 case FW_PORT_TYPE_QSFP_10G: 1492 case FW_PORT_TYPE_CR_QSFP: 1493 case FW_PORT_TYPE_CR2_QSFP: 1494 case FW_PORT_TYPE_CR4_QSFP: 1495 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1496 I2C_DEV_ADDR_A0, SFF_REV_ADDR, 1497 SFF_REV_LEN, &sff_rev); 1498 /* For QSFP type ports, revision value >= 3 1499 * means the SFP is 8636 compliant. 1500 */ 1501 if (ret) 1502 return ret; 1503 if (sff_rev >= 0x3) { 1504 modinfo->type = ETH_MODULE_SFF_8636; 1505 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1506 } else { 1507 modinfo->type = ETH_MODULE_SFF_8436; 1508 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1509 } 1510 break; 1511 1512 default: 1513 return -EINVAL; 1514 } 1515 1516 return 0; 1517 } 1518 1519 static int cxgb4_get_module_eeprom(struct net_device *dev, 1520 struct ethtool_eeprom *eprom, u8 *data) 1521 { 1522 int ret = 0, offset = eprom->offset, len = eprom->len; 1523 struct port_info *pi = netdev_priv(dev); 1524 struct adapter *adapter = pi->adapter; 1525 1526 memset(data, 0, eprom->len); 1527 if (offset + len <= I2C_PAGE_SIZE) 1528 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1529 I2C_DEV_ADDR_A0, offset, len, data); 1530 1531 /* offset + len spans 0xa0 and 0xa1 pages */ 1532 if (offset <= I2C_PAGE_SIZE) { 1533 /* read 0xa0 page */ 1534 len = I2C_PAGE_SIZE - offset; 1535 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1536 I2C_DEV_ADDR_A0, offset, len, data); 1537 if (ret) 1538 return ret; 1539 offset = I2C_PAGE_SIZE; 1540 /* Remaining bytes to be read from second page = 1541 * Total length - bytes read from first page 1542 */ 1543 len = eprom->len - len; 1544 } 1545 /* Read additional optical diagnostics from page 0xa2 if supported */ 1546 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2, 1547 offset, len, &data[eprom->len - len]); 1548 } 1549 1550 static u32 cxgb4_get_priv_flags(struct net_device *netdev) 1551 { 1552 struct port_info *pi = netdev_priv(netdev); 1553 struct adapter *adapter = pi->adapter; 1554 1555 return (adapter->eth_flags | pi->eth_flags); 1556 } 1557 1558 /** 1559 * set_flags - set/unset specified flags if passed in new_flags 1560 * @cur_flags: pointer to current flags 1561 * @new_flags: new incoming flags 1562 * @flags: set of flags to set/unset 1563 */ 1564 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags) 1565 { 1566 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags); 1567 } 1568 1569 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags) 1570 { 1571 struct port_info *pi = netdev_priv(netdev); 1572 struct adapter *adapter = pi->adapter; 1573 1574 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP); 1575 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT); 1576 1577 return 0; 1578 } 1579 1580 static const struct ethtool_ops cxgb_ethtool_ops = { 1581 .get_link_ksettings = get_link_ksettings, 1582 .set_link_ksettings = set_link_ksettings, 1583 .get_fecparam = get_fecparam, 1584 .set_fecparam = set_fecparam, 1585 .get_drvinfo = get_drvinfo, 1586 .get_msglevel = get_msglevel, 1587 .set_msglevel = set_msglevel, 1588 .get_ringparam = get_sge_param, 1589 .set_ringparam = set_sge_param, 1590 .get_coalesce = get_coalesce, 1591 .set_coalesce = set_coalesce, 1592 .get_eeprom_len = get_eeprom_len, 1593 .get_eeprom = get_eeprom, 1594 .set_eeprom = set_eeprom, 1595 .get_pauseparam = get_pauseparam, 1596 .set_pauseparam = set_pauseparam, 1597 .get_link = ethtool_op_get_link, 1598 .get_strings = get_strings, 1599 .set_phys_id = identify_port, 1600 .nway_reset = restart_autoneg, 1601 .get_sset_count = get_sset_count, 1602 .get_ethtool_stats = get_stats, 1603 .get_regs_len = get_regs_len, 1604 .get_regs = get_regs, 1605 .get_rxnfc = get_rxnfc, 1606 .get_rxfh_indir_size = get_rss_table_size, 1607 .get_rxfh = get_rss_table, 1608 .set_rxfh = set_rss_table, 1609 .flash_device = set_flash, 1610 .get_ts_info = get_ts_info, 1611 .set_dump = set_dump, 1612 .get_dump_flag = get_dump_flag, 1613 .get_dump_data = get_dump_data, 1614 .get_module_info = cxgb4_get_module_info, 1615 .get_module_eeprom = cxgb4_get_module_eeprom, 1616 .get_priv_flags = cxgb4_get_priv_flags, 1617 .set_priv_flags = cxgb4_set_priv_flags, 1618 }; 1619 1620 void cxgb4_set_ethtool_ops(struct net_device *netdev) 1621 { 1622 netdev->ethtool_ops = &cxgb_ethtool_ops; 1623 } 1624