1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved. 4 */ 5 6 #include <linux/firmware.h> 7 #include <linux/mdio.h> 8 9 #include "cxgb4.h" 10 #include "t4_regs.h" 11 #include "t4fw_api.h" 12 #include "cxgb4_cudbg.h" 13 14 #define EEPROM_MAGIC 0x38E2F10C 15 16 static u32 get_msglevel(struct net_device *dev) 17 { 18 return netdev2adap(dev)->msg_enable; 19 } 20 21 static void set_msglevel(struct net_device *dev, u32 val) 22 { 23 netdev2adap(dev)->msg_enable = val; 24 } 25 26 static const char stats_strings[][ETH_GSTRING_LEN] = { 27 "tx_octets_ok ", 28 "tx_frames_ok ", 29 "tx_broadcast_frames ", 30 "tx_multicast_frames ", 31 "tx_unicast_frames ", 32 "tx_error_frames ", 33 34 "tx_frames_64 ", 35 "tx_frames_65_to_127 ", 36 "tx_frames_128_to_255 ", 37 "tx_frames_256_to_511 ", 38 "tx_frames_512_to_1023 ", 39 "tx_frames_1024_to_1518 ", 40 "tx_frames_1519_to_max ", 41 42 "tx_frames_dropped ", 43 "tx_pause_frames ", 44 "tx_ppp0_frames ", 45 "tx_ppp1_frames ", 46 "tx_ppp2_frames ", 47 "tx_ppp3_frames ", 48 "tx_ppp4_frames ", 49 "tx_ppp5_frames ", 50 "tx_ppp6_frames ", 51 "tx_ppp7_frames ", 52 53 "rx_octets_ok ", 54 "rx_frames_ok ", 55 "rx_broadcast_frames ", 56 "rx_multicast_frames ", 57 "rx_unicast_frames ", 58 59 "rx_frames_too_long ", 60 "rx_jabber_errors ", 61 "rx_fcs_errors ", 62 "rx_length_errors ", 63 "rx_symbol_errors ", 64 "rx_runt_frames ", 65 66 "rx_frames_64 ", 67 "rx_frames_65_to_127 ", 68 "rx_frames_128_to_255 ", 69 "rx_frames_256_to_511 ", 70 "rx_frames_512_to_1023 ", 71 "rx_frames_1024_to_1518 ", 72 "rx_frames_1519_to_max ", 73 74 "rx_pause_frames ", 75 "rx_ppp0_frames ", 76 "rx_ppp1_frames ", 77 "rx_ppp2_frames ", 78 "rx_ppp3_frames ", 79 "rx_ppp4_frames ", 80 "rx_ppp5_frames ", 81 "rx_ppp6_frames ", 82 "rx_ppp7_frames ", 83 84 "rx_bg0_frames_dropped ", 85 "rx_bg1_frames_dropped ", 86 "rx_bg2_frames_dropped ", 87 "rx_bg3_frames_dropped ", 88 "rx_bg0_frames_trunc ", 89 "rx_bg1_frames_trunc ", 90 "rx_bg2_frames_trunc ", 91 "rx_bg3_frames_trunc ", 92 93 "tso ", 94 "uso ", 95 "tx_csum_offload ", 96 "rx_csum_good ", 97 "vlan_extractions ", 98 "vlan_insertions ", 99 "gro_packets ", 100 "gro_merged ", 101 }; 102 103 static char adapter_stats_strings[][ETH_GSTRING_LEN] = { 104 "db_drop ", 105 "db_full ", 106 "db_empty ", 107 "write_coal_success ", 108 "write_coal_fail ", 109 #ifdef CONFIG_CHELSIO_TLS_DEVICE 110 "tx_tls_encrypted_packets", 111 "tx_tls_encrypted_bytes ", 112 "tx_tls_ctx ", 113 "tx_tls_ooo ", 114 "tx_tls_skip_no_sync_data", 115 "tx_tls_drop_no_sync_data", 116 "tx_tls_drop_bypass_req ", 117 #endif 118 }; 119 120 static char loopback_stats_strings[][ETH_GSTRING_LEN] = { 121 "-------Loopback----------- ", 122 "octets_ok ", 123 "frames_ok ", 124 "bcast_frames ", 125 "mcast_frames ", 126 "ucast_frames ", 127 "error_frames ", 128 "frames_64 ", 129 "frames_65_to_127 ", 130 "frames_128_to_255 ", 131 "frames_256_to_511 ", 132 "frames_512_to_1023 ", 133 "frames_1024_to_1518 ", 134 "frames_1519_to_max ", 135 "frames_dropped ", 136 "bg0_frames_dropped ", 137 "bg1_frames_dropped ", 138 "bg2_frames_dropped ", 139 "bg3_frames_dropped ", 140 "bg0_frames_trunc ", 141 "bg1_frames_trunc ", 142 "bg2_frames_trunc ", 143 "bg3_frames_trunc ", 144 }; 145 146 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = { 147 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr", 148 }; 149 150 static int get_sset_count(struct net_device *dev, int sset) 151 { 152 switch (sset) { 153 case ETH_SS_STATS: 154 return ARRAY_SIZE(stats_strings) + 155 ARRAY_SIZE(adapter_stats_strings) + 156 ARRAY_SIZE(loopback_stats_strings); 157 case ETH_SS_PRIV_FLAGS: 158 return ARRAY_SIZE(cxgb4_priv_flags_strings); 159 default: 160 return -EOPNOTSUPP; 161 } 162 } 163 164 static int get_regs_len(struct net_device *dev) 165 { 166 struct adapter *adap = netdev2adap(dev); 167 168 return t4_get_regs_len(adap); 169 } 170 171 static int get_eeprom_len(struct net_device *dev) 172 { 173 return EEPROMSIZE; 174 } 175 176 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 177 { 178 struct adapter *adapter = netdev2adap(dev); 179 u32 exprom_vers; 180 181 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver)); 182 strlcpy(info->bus_info, pci_name(adapter->pdev), 183 sizeof(info->bus_info)); 184 info->regdump_len = get_regs_len(dev); 185 186 if (adapter->params.fw_vers) 187 snprintf(info->fw_version, sizeof(info->fw_version), 188 "%u.%u.%u.%u, TP %u.%u.%u.%u", 189 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers), 190 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers), 191 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers), 192 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers), 193 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers), 194 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers), 195 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers), 196 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers)); 197 198 if (!t4_get_exprom_version(adapter, &exprom_vers)) 199 snprintf(info->erom_version, sizeof(info->erom_version), 200 "%u.%u.%u.%u", 201 FW_HDR_FW_VER_MAJOR_G(exprom_vers), 202 FW_HDR_FW_VER_MINOR_G(exprom_vers), 203 FW_HDR_FW_VER_MICRO_G(exprom_vers), 204 FW_HDR_FW_VER_BUILD_G(exprom_vers)); 205 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings); 206 } 207 208 static void get_strings(struct net_device *dev, u32 stringset, u8 *data) 209 { 210 if (stringset == ETH_SS_STATS) { 211 memcpy(data, stats_strings, sizeof(stats_strings)); 212 data += sizeof(stats_strings); 213 memcpy(data, adapter_stats_strings, 214 sizeof(adapter_stats_strings)); 215 data += sizeof(adapter_stats_strings); 216 memcpy(data, loopback_stats_strings, 217 sizeof(loopback_stats_strings)); 218 } else if (stringset == ETH_SS_PRIV_FLAGS) { 219 memcpy(data, cxgb4_priv_flags_strings, 220 sizeof(cxgb4_priv_flags_strings)); 221 } 222 } 223 224 /* port stats maintained per queue of the port. They should be in the same 225 * order as in stats_strings above. 226 */ 227 struct queue_port_stats { 228 u64 tso; 229 u64 uso; 230 u64 tx_csum; 231 u64 rx_csum; 232 u64 vlan_ex; 233 u64 vlan_ins; 234 u64 gro_pkts; 235 u64 gro_merged; 236 }; 237 238 struct adapter_stats { 239 u64 db_drop; 240 u64 db_full; 241 u64 db_empty; 242 u64 wc_success; 243 u64 wc_fail; 244 #ifdef CONFIG_CHELSIO_TLS_DEVICE 245 u64 tx_tls_encrypted_packets; 246 u64 tx_tls_encrypted_bytes; 247 u64 tx_tls_ctx; 248 u64 tx_tls_ooo; 249 u64 tx_tls_skip_no_sync_data; 250 u64 tx_tls_drop_no_sync_data; 251 u64 tx_tls_drop_bypass_req; 252 #endif 253 }; 254 255 static void collect_sge_port_stats(const struct adapter *adap, 256 const struct port_info *p, 257 struct queue_port_stats *s) 258 { 259 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset]; 260 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset]; 261 struct sge_eohw_txq *eohw_tx; 262 unsigned int i; 263 264 memset(s, 0, sizeof(*s)); 265 for (i = 0; i < p->nqsets; i++, rx++, tx++) { 266 s->tso += tx->tso; 267 s->uso += tx->uso; 268 s->tx_csum += tx->tx_cso; 269 s->rx_csum += rx->stats.rx_cso; 270 s->vlan_ex += rx->stats.vlan_ex; 271 s->vlan_ins += tx->vlan_ins; 272 s->gro_pkts += rx->stats.lro_pkts; 273 s->gro_merged += rx->stats.lro_merged; 274 } 275 276 if (adap->sge.eohw_txq) { 277 eohw_tx = &adap->sge.eohw_txq[p->first_qset]; 278 for (i = 0; i < p->nqsets; i++, eohw_tx++) { 279 s->tso += eohw_tx->tso; 280 s->uso += eohw_tx->uso; 281 s->tx_csum += eohw_tx->tx_cso; 282 s->vlan_ins += eohw_tx->vlan_ins; 283 } 284 } 285 } 286 287 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s) 288 { 289 u64 val1, val2; 290 291 memset(s, 0, sizeof(*s)); 292 293 s->db_drop = adap->db_stats.db_drop; 294 s->db_full = adap->db_stats.db_full; 295 s->db_empty = adap->db_stats.db_empty; 296 297 if (!is_t4(adap->params.chip)) { 298 int v; 299 300 v = t4_read_reg(adap, SGE_STAT_CFG_A); 301 if (STATSOURCE_T5_G(v) == 7) { 302 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A); 303 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A); 304 s->wc_success = val1 - val2; 305 s->wc_fail = val2; 306 } 307 } 308 } 309 310 static void get_stats(struct net_device *dev, struct ethtool_stats *stats, 311 u64 *data) 312 { 313 struct port_info *pi = netdev_priv(dev); 314 struct adapter *adapter = pi->adapter; 315 struct lb_port_stats s; 316 int i; 317 u64 *p0; 318 319 t4_get_port_stats_offset(adapter, pi->tx_chan, 320 (struct port_stats *)data, 321 &pi->stats_base); 322 323 data += sizeof(struct port_stats) / sizeof(u64); 324 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data); 325 data += sizeof(struct queue_port_stats) / sizeof(u64); 326 collect_adapter_stats(adapter, (struct adapter_stats *)data); 327 data += sizeof(struct adapter_stats) / sizeof(u64); 328 329 *data++ = (u64)pi->port_id; 330 memset(&s, 0, sizeof(s)); 331 t4_get_lb_stats(adapter, pi->port_id, &s); 332 333 p0 = &s.octets; 334 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++) 335 *data++ = (unsigned long long)*p0++; 336 } 337 338 static void get_regs(struct net_device *dev, struct ethtool_regs *regs, 339 void *buf) 340 { 341 struct adapter *adap = netdev2adap(dev); 342 size_t buf_size; 343 344 buf_size = t4_get_regs_len(adap); 345 regs->version = mk_adap_vers(adap); 346 t4_get_regs(adap, buf, buf_size); 347 } 348 349 static int restart_autoneg(struct net_device *dev) 350 { 351 struct port_info *p = netdev_priv(dev); 352 353 if (!netif_running(dev)) 354 return -EAGAIN; 355 if (p->link_cfg.autoneg != AUTONEG_ENABLE) 356 return -EINVAL; 357 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan); 358 return 0; 359 } 360 361 static int identify_port(struct net_device *dev, 362 enum ethtool_phys_id_state state) 363 { 364 unsigned int val; 365 struct adapter *adap = netdev2adap(dev); 366 367 if (state == ETHTOOL_ID_ACTIVE) 368 val = 0xffff; 369 else if (state == ETHTOOL_ID_INACTIVE) 370 val = 0; 371 else 372 return -EINVAL; 373 374 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val); 375 } 376 377 /** 378 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool 379 * @port_type: Firmware Port Type 380 * @mod_type: Firmware Module Type 381 * 382 * Translate Firmware Port/Module type to Ethtool Port Type. 383 */ 384 static int from_fw_port_mod_type(enum fw_port_type port_type, 385 enum fw_port_module_type mod_type) 386 { 387 if (port_type == FW_PORT_TYPE_BT_SGMII || 388 port_type == FW_PORT_TYPE_BT_XFI || 389 port_type == FW_PORT_TYPE_BT_XAUI) { 390 return PORT_TP; 391 } else if (port_type == FW_PORT_TYPE_FIBER_XFI || 392 port_type == FW_PORT_TYPE_FIBER_XAUI) { 393 return PORT_FIBRE; 394 } else if (port_type == FW_PORT_TYPE_SFP || 395 port_type == FW_PORT_TYPE_QSFP_10G || 396 port_type == FW_PORT_TYPE_QSA || 397 port_type == FW_PORT_TYPE_QSFP || 398 port_type == FW_PORT_TYPE_CR4_QSFP || 399 port_type == FW_PORT_TYPE_CR_QSFP || 400 port_type == FW_PORT_TYPE_CR2_QSFP || 401 port_type == FW_PORT_TYPE_SFP28) { 402 if (mod_type == FW_PORT_MOD_TYPE_LR || 403 mod_type == FW_PORT_MOD_TYPE_SR || 404 mod_type == FW_PORT_MOD_TYPE_ER || 405 mod_type == FW_PORT_MOD_TYPE_LRM) 406 return PORT_FIBRE; 407 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE || 408 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE) 409 return PORT_DA; 410 else 411 return PORT_OTHER; 412 } else if (port_type == FW_PORT_TYPE_KR4_100G || 413 port_type == FW_PORT_TYPE_KR_SFP28 || 414 port_type == FW_PORT_TYPE_KR_XLAUI) { 415 return PORT_NONE; 416 } 417 418 return PORT_OTHER; 419 } 420 421 /** 422 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities 423 * @speed: speed in Kb/s 424 * 425 * Translates a specific Port Speed into a Firmware Port Capabilities 426 * value. 427 */ 428 static unsigned int speed_to_fw_caps(int speed) 429 { 430 if (speed == 100) 431 return FW_PORT_CAP32_SPEED_100M; 432 if (speed == 1000) 433 return FW_PORT_CAP32_SPEED_1G; 434 if (speed == 10000) 435 return FW_PORT_CAP32_SPEED_10G; 436 if (speed == 25000) 437 return FW_PORT_CAP32_SPEED_25G; 438 if (speed == 40000) 439 return FW_PORT_CAP32_SPEED_40G; 440 if (speed == 50000) 441 return FW_PORT_CAP32_SPEED_50G; 442 if (speed == 100000) 443 return FW_PORT_CAP32_SPEED_100G; 444 if (speed == 200000) 445 return FW_PORT_CAP32_SPEED_200G; 446 if (speed == 400000) 447 return FW_PORT_CAP32_SPEED_400G; 448 return 0; 449 } 450 451 /** 452 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask 453 * @port_type: Firmware Port Type 454 * @fw_caps: Firmware Port Capabilities 455 * @link_mode_mask: ethtool Link Mode Mask 456 * 457 * Translate a Firmware Port Capabilities specification to an ethtool 458 * Link Mode Mask. 459 */ 460 static void fw_caps_to_lmm(enum fw_port_type port_type, 461 fw_port_cap32_t fw_caps, 462 unsigned long *link_mode_mask) 463 { 464 #define SET_LMM(__lmm_name) \ 465 do { \ 466 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 467 link_mode_mask); \ 468 } while (0) 469 470 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \ 471 do { \ 472 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \ 473 SET_LMM(__lmm_name); \ 474 } while (0) 475 476 switch (port_type) { 477 case FW_PORT_TYPE_BT_SGMII: 478 case FW_PORT_TYPE_BT_XFI: 479 case FW_PORT_TYPE_BT_XAUI: 480 SET_LMM(TP); 481 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full); 482 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 483 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 484 break; 485 486 case FW_PORT_TYPE_KX4: 487 case FW_PORT_TYPE_KX: 488 SET_LMM(Backplane); 489 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 490 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 491 break; 492 493 case FW_PORT_TYPE_KR: 494 SET_LMM(Backplane); 495 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 496 break; 497 498 case FW_PORT_TYPE_BP_AP: 499 SET_LMM(Backplane); 500 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 501 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 502 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 503 break; 504 505 case FW_PORT_TYPE_BP4_AP: 506 SET_LMM(Backplane); 507 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 508 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC); 509 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 510 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full); 511 break; 512 513 case FW_PORT_TYPE_FIBER_XFI: 514 case FW_PORT_TYPE_FIBER_XAUI: 515 case FW_PORT_TYPE_SFP: 516 case FW_PORT_TYPE_QSFP_10G: 517 case FW_PORT_TYPE_QSA: 518 SET_LMM(FIBRE); 519 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 520 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 521 break; 522 523 case FW_PORT_TYPE_BP40_BA: 524 case FW_PORT_TYPE_QSFP: 525 SET_LMM(FIBRE); 526 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 527 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 528 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 529 break; 530 531 case FW_PORT_TYPE_CR_QSFP: 532 case FW_PORT_TYPE_SFP28: 533 SET_LMM(FIBRE); 534 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 535 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full); 536 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 537 break; 538 539 case FW_PORT_TYPE_KR_SFP28: 540 SET_LMM(Backplane); 541 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 542 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 543 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full); 544 break; 545 546 case FW_PORT_TYPE_KR_XLAUI: 547 SET_LMM(Backplane); 548 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full); 549 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 550 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full); 551 break; 552 553 case FW_PORT_TYPE_CR2_QSFP: 554 SET_LMM(FIBRE); 555 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full); 556 break; 557 558 case FW_PORT_TYPE_KR4_100G: 559 case FW_PORT_TYPE_CR4_QSFP: 560 SET_LMM(FIBRE); 561 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full); 562 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full); 563 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full); 564 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full); 565 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full); 566 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full); 567 break; 568 569 default: 570 break; 571 } 572 573 if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) { 574 FW_CAPS_TO_LMM(FEC_RS, FEC_RS); 575 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER); 576 } else { 577 SET_LMM(FEC_NONE); 578 } 579 580 FW_CAPS_TO_LMM(ANEG, Autoneg); 581 FW_CAPS_TO_LMM(802_3_PAUSE, Pause); 582 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause); 583 584 #undef FW_CAPS_TO_LMM 585 #undef SET_LMM 586 } 587 588 /** 589 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware 590 * capabilities 591 * @et_lmm: ethtool Link Mode Mask 592 * 593 * Translate ethtool Link Mode Mask into a Firmware Port capabilities 594 * value. 595 */ 596 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask) 597 { 598 unsigned int fw_caps = 0; 599 600 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \ 601 do { \ 602 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \ 603 link_mode_mask)) \ 604 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \ 605 } while (0) 606 607 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M); 608 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G); 609 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G); 610 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G); 611 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G); 612 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G); 613 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G); 614 615 #undef LMM_TO_FW_CAPS 616 617 return fw_caps; 618 } 619 620 static int get_link_ksettings(struct net_device *dev, 621 struct ethtool_link_ksettings *link_ksettings) 622 { 623 struct port_info *pi = netdev_priv(dev); 624 struct ethtool_link_settings *base = &link_ksettings->base; 625 626 /* For the nonce, the Firmware doesn't send up Port State changes 627 * when the Virtual Interface attached to the Port is down. So 628 * if it's down, let's grab any changes. 629 */ 630 if (!netif_running(dev)) 631 (void)t4_update_port_info(pi); 632 633 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported); 634 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising); 635 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising); 636 637 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type); 638 639 if (pi->mdio_addr >= 0) { 640 base->phy_address = pi->mdio_addr; 641 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII 642 ? ETH_MDIO_SUPPORTS_C22 643 : ETH_MDIO_SUPPORTS_C45); 644 } else { 645 base->phy_address = 255; 646 base->mdio_support = 0; 647 } 648 649 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps, 650 link_ksettings->link_modes.supported); 651 fw_caps_to_lmm(pi->port_type, 652 t4_link_acaps(pi->adapter, 653 pi->lport, 654 &pi->link_cfg), 655 link_ksettings->link_modes.advertising); 656 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps, 657 link_ksettings->link_modes.lp_advertising); 658 659 base->speed = (netif_carrier_ok(dev) 660 ? pi->link_cfg.speed 661 : SPEED_UNKNOWN); 662 base->duplex = DUPLEX_FULL; 663 664 base->autoneg = pi->link_cfg.autoneg; 665 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG) 666 ethtool_link_ksettings_add_link_mode(link_ksettings, 667 supported, Autoneg); 668 if (pi->link_cfg.autoneg) 669 ethtool_link_ksettings_add_link_mode(link_ksettings, 670 advertising, Autoneg); 671 672 return 0; 673 } 674 675 static int set_link_ksettings(struct net_device *dev, 676 const struct ethtool_link_ksettings *link_ksettings) 677 { 678 struct port_info *pi = netdev_priv(dev); 679 struct link_config *lc = &pi->link_cfg; 680 const struct ethtool_link_settings *base = &link_ksettings->base; 681 struct link_config old_lc; 682 unsigned int fw_caps; 683 int ret = 0; 684 685 /* only full-duplex supported */ 686 if (base->duplex != DUPLEX_FULL) 687 return -EINVAL; 688 689 old_lc = *lc; 690 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) || 691 base->autoneg == AUTONEG_DISABLE) { 692 fw_caps = speed_to_fw_caps(base->speed); 693 694 /* Speed must be supported by Physical Port Capabilities. */ 695 if (!(lc->pcaps & fw_caps)) 696 return -EINVAL; 697 698 lc->speed_caps = fw_caps; 699 lc->acaps = fw_caps; 700 } else { 701 fw_caps = 702 lmm_to_fw_caps(link_ksettings->link_modes.advertising); 703 if (!(lc->pcaps & fw_caps)) 704 return -EINVAL; 705 lc->speed_caps = 0; 706 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG; 707 } 708 lc->autoneg = base->autoneg; 709 710 /* If the firmware rejects the Link Configuration request, back out 711 * the changes and report the error. 712 */ 713 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc); 714 if (ret) 715 *lc = old_lc; 716 717 return ret; 718 } 719 720 /* Translate the Firmware FEC value into the ethtool value. */ 721 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec) 722 { 723 unsigned int eth_fec = 0; 724 725 if (fw_fec & FW_PORT_CAP32_FEC_RS) 726 eth_fec |= ETHTOOL_FEC_RS; 727 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS) 728 eth_fec |= ETHTOOL_FEC_BASER; 729 730 /* if nothing is set, then FEC is off */ 731 if (!eth_fec) 732 eth_fec = ETHTOOL_FEC_OFF; 733 734 return eth_fec; 735 } 736 737 /* Translate Common Code FEC value into ethtool value. */ 738 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec) 739 { 740 unsigned int eth_fec = 0; 741 742 if (cc_fec & FEC_AUTO) 743 eth_fec |= ETHTOOL_FEC_AUTO; 744 if (cc_fec & FEC_RS) 745 eth_fec |= ETHTOOL_FEC_RS; 746 if (cc_fec & FEC_BASER_RS) 747 eth_fec |= ETHTOOL_FEC_BASER; 748 749 /* if nothing is set, then FEC is off */ 750 if (!eth_fec) 751 eth_fec = ETHTOOL_FEC_OFF; 752 753 return eth_fec; 754 } 755 756 /* Translate ethtool FEC value into Common Code value. */ 757 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec) 758 { 759 unsigned int cc_fec = 0; 760 761 if (eth_fec & ETHTOOL_FEC_OFF) 762 return cc_fec; 763 764 if (eth_fec & ETHTOOL_FEC_AUTO) 765 cc_fec |= FEC_AUTO; 766 if (eth_fec & ETHTOOL_FEC_RS) 767 cc_fec |= FEC_RS; 768 if (eth_fec & ETHTOOL_FEC_BASER) 769 cc_fec |= FEC_BASER_RS; 770 771 return cc_fec; 772 } 773 774 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 775 { 776 const struct port_info *pi = netdev_priv(dev); 777 const struct link_config *lc = &pi->link_cfg; 778 779 /* Translate the Firmware FEC Support into the ethtool value. We 780 * always support IEEE 802.3 "automatic" selection of Link FEC type if 781 * any FEC is supported. 782 */ 783 fec->fec = fwcap_to_eth_fec(lc->pcaps); 784 if (fec->fec != ETHTOOL_FEC_OFF) 785 fec->fec |= ETHTOOL_FEC_AUTO; 786 787 /* Translate the current internal FEC parameters into the 788 * ethtool values. 789 */ 790 fec->active_fec = cc_to_eth_fec(lc->fec); 791 792 return 0; 793 } 794 795 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec) 796 { 797 struct port_info *pi = netdev_priv(dev); 798 struct link_config *lc = &pi->link_cfg; 799 struct link_config old_lc; 800 int ret; 801 802 /* Save old Link Configuration in case the L1 Configure below 803 * fails. 804 */ 805 old_lc = *lc; 806 807 /* Try to perform the L1 Configure and return the result of that 808 * effort. If it fails, revert the attempted change. 809 */ 810 lc->requested_fec = eth_to_cc_fec(fec->fec); 811 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, 812 pi->tx_chan, lc); 813 if (ret) 814 *lc = old_lc; 815 return ret; 816 } 817 818 static void get_pauseparam(struct net_device *dev, 819 struct ethtool_pauseparam *epause) 820 { 821 struct port_info *p = netdev_priv(dev); 822 823 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0; 824 epause->rx_pause = (p->link_cfg.advertised_fc & PAUSE_RX) != 0; 825 epause->tx_pause = (p->link_cfg.advertised_fc & PAUSE_TX) != 0; 826 } 827 828 static int set_pauseparam(struct net_device *dev, 829 struct ethtool_pauseparam *epause) 830 { 831 struct port_info *p = netdev_priv(dev); 832 struct link_config *lc = &p->link_cfg; 833 834 if (epause->autoneg == AUTONEG_DISABLE) 835 lc->requested_fc = 0; 836 else if (lc->pcaps & FW_PORT_CAP32_ANEG) 837 lc->requested_fc = PAUSE_AUTONEG; 838 else 839 return -EINVAL; 840 841 if (epause->rx_pause) 842 lc->requested_fc |= PAUSE_RX; 843 if (epause->tx_pause) 844 lc->requested_fc |= PAUSE_TX; 845 if (netif_running(dev)) 846 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan, 847 lc); 848 return 0; 849 } 850 851 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 852 { 853 const struct port_info *pi = netdev_priv(dev); 854 const struct sge *s = &pi->adapter->sge; 855 856 e->rx_max_pending = MAX_RX_BUFFERS; 857 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES; 858 e->rx_jumbo_max_pending = 0; 859 e->tx_max_pending = MAX_TXQ_ENTRIES; 860 861 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8; 862 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size; 863 e->rx_jumbo_pending = 0; 864 e->tx_pending = s->ethtxq[pi->first_qset].q.size; 865 } 866 867 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) 868 { 869 int i; 870 const struct port_info *pi = netdev_priv(dev); 871 struct adapter *adapter = pi->adapter; 872 struct sge *s = &adapter->sge; 873 874 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending || 875 e->tx_pending > MAX_TXQ_ENTRIES || 876 e->rx_mini_pending > MAX_RSPQ_ENTRIES || 877 e->rx_mini_pending < MIN_RSPQ_ENTRIES || 878 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES) 879 return -EINVAL; 880 881 if (adapter->flags & CXGB4_FULL_INIT_DONE) 882 return -EBUSY; 883 884 for (i = 0; i < pi->nqsets; ++i) { 885 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending; 886 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8; 887 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending; 888 } 889 return 0; 890 } 891 892 /** 893 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete! 894 * @dev: the network device 895 * @us: the hold-off time in us, or 0 to disable timer 896 * @cnt: the hold-off packet count, or 0 to disable counter 897 * 898 * Set the RX interrupt hold-off parameters for a network device. 899 */ 900 static int set_rx_intr_params(struct net_device *dev, 901 unsigned int us, unsigned int cnt) 902 { 903 int i, err; 904 struct port_info *pi = netdev_priv(dev); 905 struct adapter *adap = pi->adapter; 906 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 907 908 for (i = 0; i < pi->nqsets; i++, q++) { 909 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt); 910 if (err) 911 return err; 912 } 913 return 0; 914 } 915 916 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx) 917 { 918 int i; 919 struct port_info *pi = netdev_priv(dev); 920 struct adapter *adap = pi->adapter; 921 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 922 923 for (i = 0; i < pi->nqsets; i++, q++) 924 q->rspq.adaptive_rx = adaptive_rx; 925 926 return 0; 927 } 928 929 static int get_adaptive_rx_setting(struct net_device *dev) 930 { 931 struct port_info *pi = netdev_priv(dev); 932 struct adapter *adap = pi->adapter; 933 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset]; 934 935 return q->rspq.adaptive_rx; 936 } 937 938 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all 939 * Ethernet TX Queues. 940 */ 941 static int get_dbqtimer_tick(struct net_device *dev) 942 { 943 struct port_info *pi = netdev_priv(dev); 944 struct adapter *adap = pi->adapter; 945 946 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 947 return 0; 948 949 return adap->sge.dbqtimer_tick; 950 } 951 952 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 953 * associated with a Network Device. 954 */ 955 static int get_dbqtimer(struct net_device *dev) 956 { 957 struct port_info *pi = netdev_priv(dev); 958 struct adapter *adap = pi->adapter; 959 struct sge_eth_txq *txq; 960 961 txq = &adap->sge.ethtxq[pi->first_qset]; 962 963 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 964 return 0; 965 966 /* all of the TX Queues use the same Timer Index */ 967 return adap->sge.dbqtimer_val[txq->dbqtimerix]; 968 } 969 970 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 971 * Queues. This is the fundamental "Tick" that sets the scale of values which 972 * can be used. Individual Ethernet TX Queues index into a relatively small 973 * array of Tick Multipliers. Changing the base Tick will thus change all of 974 * the resulting Timer Values associated with those multipliers for all 975 * Ethernet TX Queues. 976 */ 977 static int set_dbqtimer_tick(struct net_device *dev, int usecs) 978 { 979 struct port_info *pi = netdev_priv(dev); 980 struct adapter *adap = pi->adapter; 981 struct sge *s = &adap->sge; 982 u32 param, val; 983 int ret; 984 985 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 986 return 0; 987 988 /* return early if it's the same Timer Tick we're already using */ 989 if (s->dbqtimer_tick == usecs) 990 return 0; 991 992 /* attempt to set the new Timer Tick value */ 993 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 994 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK)); 995 val = usecs; 996 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, ¶m, &val); 997 if (ret) 998 return ret; 999 s->dbqtimer_tick = usecs; 1000 1001 /* if successful, reread resulting dependent Timer values */ 1002 ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val), 1003 s->dbqtimer_val); 1004 return ret; 1005 } 1006 1007 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues 1008 * associated with a Network Device. There is a relatively small array of 1009 * possible Timer Values so we need to pick the closest value available. 1010 */ 1011 static int set_dbqtimer(struct net_device *dev, int usecs) 1012 { 1013 int qix, timerix, min_timerix, delta, min_delta; 1014 struct port_info *pi = netdev_priv(dev); 1015 struct adapter *adap = pi->adapter; 1016 struct sge *s = &adap->sge; 1017 struct sge_eth_txq *txq; 1018 u32 param, val; 1019 int ret; 1020 1021 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER)) 1022 return 0; 1023 1024 /* Find the SGE Doorbell Timer Value that's closest to the requested 1025 * value. 1026 */ 1027 min_delta = INT_MAX; 1028 min_timerix = 0; 1029 for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) { 1030 delta = s->dbqtimer_val[timerix] - usecs; 1031 if (delta < 0) 1032 delta = -delta; 1033 if (delta < min_delta) { 1034 min_delta = delta; 1035 min_timerix = timerix; 1036 } 1037 } 1038 1039 /* Return early if it's the same Timer Index we're already using. 1040 * We use the same Timer Index for all of the TX Queues for an 1041 * interface so it's only necessary to check the first one. 1042 */ 1043 txq = &s->ethtxq[pi->first_qset]; 1044 if (txq->dbqtimerix == min_timerix) 1045 return 0; 1046 1047 for (qix = 0; qix < pi->nqsets; qix++, txq++) { 1048 if (adap->flags & CXGB4_FULL_INIT_DONE) { 1049 param = 1050 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) | 1051 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) | 1052 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id)); 1053 val = min_timerix; 1054 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1055 1, ¶m, &val); 1056 if (ret) 1057 return ret; 1058 } 1059 txq->dbqtimerix = min_timerix; 1060 } 1061 return 0; 1062 } 1063 1064 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX 1065 * Queues and the Timer Value for the Ethernet TX Queues associated with a 1066 * Network Device. Since changing the global Tick changes all of the 1067 * available Timer Values, we need to do this first before selecting the 1068 * resulting closest Timer Value. Moreover, since the Tick is global, 1069 * changing it affects the Timer Values for all Network Devices on the 1070 * adapter. So, before changing the Tick, we grab all of the current Timer 1071 * Values for other Network Devices on this Adapter and then attempt to select 1072 * new Timer Values which are close to the old values ... 1073 */ 1074 static int set_dbqtimer_tickval(struct net_device *dev, 1075 int tick_usecs, int timer_usecs) 1076 { 1077 struct port_info *pi = netdev_priv(dev); 1078 struct adapter *adap = pi->adapter; 1079 int timer[MAX_NPORTS]; 1080 unsigned int port; 1081 int ret; 1082 1083 /* Grab the other adapter Network Interface current timers and fill in 1084 * the new one for this Network Interface. 1085 */ 1086 for_each_port(adap, port) 1087 if (port == pi->port_id) 1088 timer[port] = timer_usecs; 1089 else 1090 timer[port] = get_dbqtimer(adap->port[port]); 1091 1092 /* Change the global Tick first ... */ 1093 ret = set_dbqtimer_tick(dev, tick_usecs); 1094 if (ret) 1095 return ret; 1096 1097 /* ... and then set all of the Network Interface Timer Values ... */ 1098 for_each_port(adap, port) { 1099 ret = set_dbqtimer(adap->port[port], timer[port]); 1100 if (ret) 1101 return ret; 1102 } 1103 1104 return 0; 1105 } 1106 1107 static int set_coalesce(struct net_device *dev, 1108 struct ethtool_coalesce *coalesce) 1109 { 1110 int ret; 1111 1112 set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce); 1113 1114 ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs, 1115 coalesce->rx_max_coalesced_frames); 1116 if (ret) 1117 return ret; 1118 1119 return set_dbqtimer_tickval(dev, 1120 coalesce->tx_coalesce_usecs_irq, 1121 coalesce->tx_coalesce_usecs); 1122 } 1123 1124 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c) 1125 { 1126 const struct port_info *pi = netdev_priv(dev); 1127 const struct adapter *adap = pi->adapter; 1128 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq; 1129 1130 c->rx_coalesce_usecs = qtimer_val(adap, rq); 1131 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ? 1132 adap->sge.counter_val[rq->pktcnt_idx] : 0; 1133 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev); 1134 c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev); 1135 c->tx_coalesce_usecs = get_dbqtimer(dev); 1136 return 0; 1137 } 1138 1139 /* The next two routines implement eeprom read/write from physical addresses. 1140 */ 1141 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v) 1142 { 1143 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1144 1145 if (vaddr >= 0) 1146 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v); 1147 return vaddr < 0 ? vaddr : 0; 1148 } 1149 1150 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v) 1151 { 1152 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE); 1153 1154 if (vaddr >= 0) 1155 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v); 1156 return vaddr < 0 ? vaddr : 0; 1157 } 1158 1159 #define EEPROM_MAGIC 0x38E2F10C 1160 1161 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e, 1162 u8 *data) 1163 { 1164 int i, err = 0; 1165 struct adapter *adapter = netdev2adap(dev); 1166 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL); 1167 1168 if (!buf) 1169 return -ENOMEM; 1170 1171 e->magic = EEPROM_MAGIC; 1172 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4) 1173 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]); 1174 1175 if (!err) 1176 memcpy(data, buf + e->offset, e->len); 1177 kvfree(buf); 1178 return err; 1179 } 1180 1181 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, 1182 u8 *data) 1183 { 1184 u8 *buf; 1185 int err = 0; 1186 u32 aligned_offset, aligned_len, *p; 1187 struct adapter *adapter = netdev2adap(dev); 1188 1189 if (eeprom->magic != EEPROM_MAGIC) 1190 return -EINVAL; 1191 1192 aligned_offset = eeprom->offset & ~3; 1193 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3; 1194 1195 if (adapter->pf > 0) { 1196 u32 start = 1024 + adapter->pf * EEPROMPFSIZE; 1197 1198 if (aligned_offset < start || 1199 aligned_offset + aligned_len > start + EEPROMPFSIZE) 1200 return -EPERM; 1201 } 1202 1203 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) { 1204 /* RMW possibly needed for first or last words. 1205 */ 1206 buf = kvzalloc(aligned_len, GFP_KERNEL); 1207 if (!buf) 1208 return -ENOMEM; 1209 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf); 1210 if (!err && aligned_len > 4) 1211 err = eeprom_rd_phys(adapter, 1212 aligned_offset + aligned_len - 4, 1213 (u32 *)&buf[aligned_len - 4]); 1214 if (err) 1215 goto out; 1216 memcpy(buf + (eeprom->offset & 3), data, eeprom->len); 1217 } else { 1218 buf = data; 1219 } 1220 1221 err = t4_seeprom_wp(adapter, false); 1222 if (err) 1223 goto out; 1224 1225 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { 1226 err = eeprom_wr_phys(adapter, aligned_offset, *p); 1227 aligned_offset += 4; 1228 } 1229 1230 if (!err) 1231 err = t4_seeprom_wp(adapter, true); 1232 out: 1233 if (buf != data) 1234 kvfree(buf); 1235 return err; 1236 } 1237 1238 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef) 1239 { 1240 int ret; 1241 const struct firmware *fw; 1242 struct adapter *adap = netdev2adap(netdev); 1243 unsigned int mbox = PCIE_FW_MASTER_M + 1; 1244 u32 pcie_fw; 1245 unsigned int master; 1246 u8 master_vld = 0; 1247 1248 pcie_fw = t4_read_reg(adap, PCIE_FW_A); 1249 master = PCIE_FW_MASTER_G(pcie_fw); 1250 if (pcie_fw & PCIE_FW_MASTER_VLD_F) 1251 master_vld = 1; 1252 /* if csiostor is the master return */ 1253 if (master_vld && (master != adap->pf)) { 1254 dev_warn(adap->pdev_dev, 1255 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n"); 1256 return -EOPNOTSUPP; 1257 } 1258 1259 ef->data[sizeof(ef->data) - 1] = '\0'; 1260 ret = request_firmware(&fw, ef->data, adap->pdev_dev); 1261 if (ret < 0) 1262 return ret; 1263 1264 /* If the adapter has been fully initialized then we'll go ahead and 1265 * try to get the firmware's cooperation in upgrading to the new 1266 * firmware image otherwise we'll try to do the entire job from the 1267 * host ... and we always "force" the operation in this path. 1268 */ 1269 if (adap->flags & CXGB4_FULL_INIT_DONE) 1270 mbox = adap->mbox; 1271 1272 ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1); 1273 release_firmware(fw); 1274 if (!ret) 1275 dev_info(adap->pdev_dev, 1276 "loaded firmware %s, reload cxgb4 driver\n", ef->data); 1277 return ret; 1278 } 1279 1280 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info) 1281 { 1282 struct port_info *pi = netdev_priv(dev); 1283 struct adapter *adapter = pi->adapter; 1284 1285 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | 1286 SOF_TIMESTAMPING_RX_SOFTWARE | 1287 SOF_TIMESTAMPING_SOFTWARE; 1288 1289 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE | 1290 SOF_TIMESTAMPING_TX_HARDWARE | 1291 SOF_TIMESTAMPING_RAW_HARDWARE; 1292 1293 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | 1294 (1 << HWTSTAMP_TX_ON); 1295 1296 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | 1297 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | 1298 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 1299 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 1300 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | 1301 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); 1302 1303 if (adapter->ptp_clock) 1304 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock); 1305 else 1306 ts_info->phc_index = -1; 1307 1308 return 0; 1309 } 1310 1311 static u32 get_rss_table_size(struct net_device *dev) 1312 { 1313 const struct port_info *pi = netdev_priv(dev); 1314 1315 return pi->rss_size; 1316 } 1317 1318 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc) 1319 { 1320 const struct port_info *pi = netdev_priv(dev); 1321 unsigned int n = pi->rss_size; 1322 1323 if (hfunc) 1324 *hfunc = ETH_RSS_HASH_TOP; 1325 if (!p) 1326 return 0; 1327 while (n--) 1328 p[n] = pi->rss[n]; 1329 return 0; 1330 } 1331 1332 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key, 1333 const u8 hfunc) 1334 { 1335 unsigned int i; 1336 struct port_info *pi = netdev_priv(dev); 1337 1338 /* We require at least one supported parameter to be changed and no 1339 * change in any of the unsupported parameters 1340 */ 1341 if (key || 1342 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)) 1343 return -EOPNOTSUPP; 1344 if (!p) 1345 return 0; 1346 1347 /* Interface must be brought up atleast once */ 1348 if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) { 1349 for (i = 0; i < pi->rss_size; i++) 1350 pi->rss[i] = p[i]; 1351 1352 return cxgb4_write_rss(pi, pi->rss); 1353 } 1354 1355 return -EPERM; 1356 } 1357 1358 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1359 u32 *rules) 1360 { 1361 const struct port_info *pi = netdev_priv(dev); 1362 1363 switch (info->cmd) { 1364 case ETHTOOL_GRXFH: { 1365 unsigned int v = pi->rss_mode; 1366 1367 info->data = 0; 1368 switch (info->flow_type) { 1369 case TCP_V4_FLOW: 1370 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) 1371 info->data = RXH_IP_SRC | RXH_IP_DST | 1372 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1373 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1374 info->data = RXH_IP_SRC | RXH_IP_DST; 1375 break; 1376 case UDP_V4_FLOW: 1377 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) && 1378 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1379 info->data = RXH_IP_SRC | RXH_IP_DST | 1380 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1381 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1382 info->data = RXH_IP_SRC | RXH_IP_DST; 1383 break; 1384 case SCTP_V4_FLOW: 1385 case AH_ESP_V4_FLOW: 1386 case IPV4_FLOW: 1387 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) 1388 info->data = RXH_IP_SRC | RXH_IP_DST; 1389 break; 1390 case TCP_V6_FLOW: 1391 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) 1392 info->data = RXH_IP_SRC | RXH_IP_DST | 1393 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1394 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1395 info->data = RXH_IP_SRC | RXH_IP_DST; 1396 break; 1397 case UDP_V6_FLOW: 1398 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) && 1399 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F)) 1400 info->data = RXH_IP_SRC | RXH_IP_DST | 1401 RXH_L4_B_0_1 | RXH_L4_B_2_3; 1402 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1403 info->data = RXH_IP_SRC | RXH_IP_DST; 1404 break; 1405 case SCTP_V6_FLOW: 1406 case AH_ESP_V6_FLOW: 1407 case IPV6_FLOW: 1408 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) 1409 info->data = RXH_IP_SRC | RXH_IP_DST; 1410 break; 1411 } 1412 return 0; 1413 } 1414 case ETHTOOL_GRXRINGS: 1415 info->data = pi->nqsets; 1416 return 0; 1417 } 1418 return -EOPNOTSUPP; 1419 } 1420 1421 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump) 1422 { 1423 struct adapter *adapter = netdev2adap(dev); 1424 u32 len = 0; 1425 1426 len = sizeof(struct cudbg_hdr) + 1427 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1428 len += cxgb4_get_dump_length(adapter, eth_dump->flag); 1429 1430 adapter->eth_dump.flag = eth_dump->flag; 1431 adapter->eth_dump.len = len; 1432 return 0; 1433 } 1434 1435 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump) 1436 { 1437 struct adapter *adapter = netdev2adap(dev); 1438 1439 eth_dump->flag = adapter->eth_dump.flag; 1440 eth_dump->len = adapter->eth_dump.len; 1441 eth_dump->version = adapter->eth_dump.version; 1442 return 0; 1443 } 1444 1445 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump, 1446 void *buf) 1447 { 1448 struct adapter *adapter = netdev2adap(dev); 1449 u32 len = 0; 1450 int ret = 0; 1451 1452 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE) 1453 return -ENOENT; 1454 1455 len = sizeof(struct cudbg_hdr) + 1456 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY; 1457 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag); 1458 if (eth_dump->len < len) 1459 return -ENOMEM; 1460 1461 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag); 1462 if (ret) 1463 return ret; 1464 1465 eth_dump->flag = adapter->eth_dump.flag; 1466 eth_dump->len = len; 1467 eth_dump->version = adapter->eth_dump.version; 1468 return 0; 1469 } 1470 1471 static int cxgb4_get_module_info(struct net_device *dev, 1472 struct ethtool_modinfo *modinfo) 1473 { 1474 struct port_info *pi = netdev_priv(dev); 1475 u8 sff8472_comp, sff_diag_type, sff_rev; 1476 struct adapter *adapter = pi->adapter; 1477 int ret; 1478 1479 if (!t4_is_inserted_mod_type(pi->mod_type)) 1480 return -EINVAL; 1481 1482 switch (pi->port_type) { 1483 case FW_PORT_TYPE_SFP: 1484 case FW_PORT_TYPE_QSA: 1485 case FW_PORT_TYPE_SFP28: 1486 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1487 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR, 1488 SFF_8472_COMP_LEN, &sff8472_comp); 1489 if (ret) 1490 return ret; 1491 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1492 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR, 1493 SFP_DIAG_TYPE_LEN, &sff_diag_type); 1494 if (ret) 1495 return ret; 1496 1497 if (!sff8472_comp || (sff_diag_type & 4)) { 1498 modinfo->type = ETH_MODULE_SFF_8079; 1499 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 1500 } else { 1501 modinfo->type = ETH_MODULE_SFF_8472; 1502 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1503 } 1504 break; 1505 1506 case FW_PORT_TYPE_QSFP: 1507 case FW_PORT_TYPE_QSFP_10G: 1508 case FW_PORT_TYPE_CR_QSFP: 1509 case FW_PORT_TYPE_CR2_QSFP: 1510 case FW_PORT_TYPE_CR4_QSFP: 1511 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1512 I2C_DEV_ADDR_A0, SFF_REV_ADDR, 1513 SFF_REV_LEN, &sff_rev); 1514 /* For QSFP type ports, revision value >= 3 1515 * means the SFP is 8636 compliant. 1516 */ 1517 if (ret) 1518 return ret; 1519 if (sff_rev >= 0x3) { 1520 modinfo->type = ETH_MODULE_SFF_8636; 1521 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1522 } else { 1523 modinfo->type = ETH_MODULE_SFF_8436; 1524 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1525 } 1526 break; 1527 1528 default: 1529 return -EINVAL; 1530 } 1531 1532 return 0; 1533 } 1534 1535 static int cxgb4_get_module_eeprom(struct net_device *dev, 1536 struct ethtool_eeprom *eprom, u8 *data) 1537 { 1538 int ret = 0, offset = eprom->offset, len = eprom->len; 1539 struct port_info *pi = netdev_priv(dev); 1540 struct adapter *adapter = pi->adapter; 1541 1542 memset(data, 0, eprom->len); 1543 if (offset + len <= I2C_PAGE_SIZE) 1544 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1545 I2C_DEV_ADDR_A0, offset, len, data); 1546 1547 /* offset + len spans 0xa0 and 0xa1 pages */ 1548 if (offset <= I2C_PAGE_SIZE) { 1549 /* read 0xa0 page */ 1550 len = I2C_PAGE_SIZE - offset; 1551 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, 1552 I2C_DEV_ADDR_A0, offset, len, data); 1553 if (ret) 1554 return ret; 1555 offset = I2C_PAGE_SIZE; 1556 /* Remaining bytes to be read from second page = 1557 * Total length - bytes read from first page 1558 */ 1559 len = eprom->len - len; 1560 } 1561 /* Read additional optical diagnostics from page 0xa2 if supported */ 1562 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2, 1563 offset, len, &data[eprom->len - len]); 1564 } 1565 1566 static u32 cxgb4_get_priv_flags(struct net_device *netdev) 1567 { 1568 struct port_info *pi = netdev_priv(netdev); 1569 struct adapter *adapter = pi->adapter; 1570 1571 return (adapter->eth_flags | pi->eth_flags); 1572 } 1573 1574 /** 1575 * set_flags - set/unset specified flags if passed in new_flags 1576 * @cur_flags: pointer to current flags 1577 * @new_flags: new incoming flags 1578 * @flags: set of flags to set/unset 1579 */ 1580 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags) 1581 { 1582 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags); 1583 } 1584 1585 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags) 1586 { 1587 struct port_info *pi = netdev_priv(netdev); 1588 struct adapter *adapter = pi->adapter; 1589 1590 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP); 1591 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT); 1592 1593 return 0; 1594 } 1595 1596 static const struct ethtool_ops cxgb_ethtool_ops = { 1597 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 1598 ETHTOOL_COALESCE_RX_MAX_FRAMES | 1599 ETHTOOL_COALESCE_TX_USECS_IRQ | 1600 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 1601 .get_link_ksettings = get_link_ksettings, 1602 .set_link_ksettings = set_link_ksettings, 1603 .get_fecparam = get_fecparam, 1604 .set_fecparam = set_fecparam, 1605 .get_drvinfo = get_drvinfo, 1606 .get_msglevel = get_msglevel, 1607 .set_msglevel = set_msglevel, 1608 .get_ringparam = get_sge_param, 1609 .set_ringparam = set_sge_param, 1610 .get_coalesce = get_coalesce, 1611 .set_coalesce = set_coalesce, 1612 .get_eeprom_len = get_eeprom_len, 1613 .get_eeprom = get_eeprom, 1614 .set_eeprom = set_eeprom, 1615 .get_pauseparam = get_pauseparam, 1616 .set_pauseparam = set_pauseparam, 1617 .get_link = ethtool_op_get_link, 1618 .get_strings = get_strings, 1619 .set_phys_id = identify_port, 1620 .nway_reset = restart_autoneg, 1621 .get_sset_count = get_sset_count, 1622 .get_ethtool_stats = get_stats, 1623 .get_regs_len = get_regs_len, 1624 .get_regs = get_regs, 1625 .get_rxnfc = get_rxnfc, 1626 .get_rxfh_indir_size = get_rss_table_size, 1627 .get_rxfh = get_rss_table, 1628 .set_rxfh = set_rss_table, 1629 .flash_device = set_flash, 1630 .get_ts_info = get_ts_info, 1631 .set_dump = set_dump, 1632 .get_dump_flag = get_dump_flag, 1633 .get_dump_data = get_dump_data, 1634 .get_module_info = cxgb4_get_module_info, 1635 .get_module_eeprom = cxgb4_get_module_eeprom, 1636 .get_priv_flags = cxgb4_get_priv_flags, 1637 .set_priv_flags = cxgb4_set_priv_flags, 1638 }; 1639 1640 void cxgb4_set_ethtool_ops(struct net_device *netdev) 1641 { 1642 netdev->ethtool_ops = &cxgb_ethtool_ops; 1643 } 1644