xref: /openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c (revision a03a8dbe20eff6d57aae3147577bf84b52aba4e6)
1 /*
2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
3  *
4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *        copyright notice, this list of conditions and the following
18  *        disclaimer.
19  *
20  *      - Redistributions in binary form must reproduce the above
21  *        copyright notice, this list of conditions and the following
22  *        disclaimer in the documentation and/or other materials
23  *        provided with the distribution.
24  *
25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32  * SOFTWARE.
33  */
34 
35 #include <linux/seq_file.h>
36 #include <linux/debugfs.h>
37 #include <linux/string_helpers.h>
38 #include <linux/sort.h>
39 #include <linux/ctype.h>
40 
41 #include "cxgb4.h"
42 #include "t4_regs.h"
43 #include "t4_values.h"
44 #include "t4fw_api.h"
45 #include "cxgb4_debugfs.h"
46 #include "clip_tbl.h"
47 #include "l2t.h"
48 
49 /* generic seq_file support for showing a table of size rows x width. */
50 static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
51 {
52 	pos -= tb->skip_first;
53 	return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
54 }
55 
56 static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
57 {
58 	struct seq_tab *tb = seq->private;
59 
60 	if (tb->skip_first && *pos == 0)
61 		return SEQ_START_TOKEN;
62 
63 	return seq_tab_get_idx(tb, *pos);
64 }
65 
66 static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
67 {
68 	v = seq_tab_get_idx(seq->private, *pos + 1);
69 	if (v)
70 		++*pos;
71 	return v;
72 }
73 
74 static void seq_tab_stop(struct seq_file *seq, void *v)
75 {
76 }
77 
78 static int seq_tab_show(struct seq_file *seq, void *v)
79 {
80 	const struct seq_tab *tb = seq->private;
81 
82 	return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
83 }
84 
85 static const struct seq_operations seq_tab_ops = {
86 	.start = seq_tab_start,
87 	.next  = seq_tab_next,
88 	.stop  = seq_tab_stop,
89 	.show  = seq_tab_show
90 };
91 
92 struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
93 			     unsigned int width, unsigned int have_header,
94 			     int (*show)(struct seq_file *seq, void *v, int i))
95 {
96 	struct seq_tab *p;
97 
98 	p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
99 	if (p) {
100 		p->show = show;
101 		p->rows = rows;
102 		p->width = width;
103 		p->skip_first = have_header != 0;
104 	}
105 	return p;
106 }
107 
108 /* Trim the size of a seq_tab to the supplied number of rows.  The operation is
109  * irreversible.
110  */
111 static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
112 {
113 	if (new_rows > p->rows)
114 		return -EINVAL;
115 	p->rows = new_rows;
116 	return 0;
117 }
118 
119 static int cim_la_show(struct seq_file *seq, void *v, int idx)
120 {
121 	if (v == SEQ_START_TOKEN)
122 		seq_puts(seq, "Status   Data      PC     LS0Stat  LS0Addr "
123 			 "            LS0Data\n");
124 	else {
125 		const u32 *p = v;
126 
127 		seq_printf(seq,
128 			   "  %02x  %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
129 			   (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
130 			   p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
131 			   p[6], p[7]);
132 	}
133 	return 0;
134 }
135 
136 static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
137 {
138 	if (v == SEQ_START_TOKEN) {
139 		seq_puts(seq, "Status   Data      PC\n");
140 	} else {
141 		const u32 *p = v;
142 
143 		seq_printf(seq, "  %02x   %08x %08x\n", p[5] & 0xff, p[6],
144 			   p[7]);
145 		seq_printf(seq, "  %02x   %02x%06x %02x%06x\n",
146 			   (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
147 			   p[4] & 0xff, p[5] >> 8);
148 		seq_printf(seq, "  %02x   %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
149 			   p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
150 	}
151 	return 0;
152 }
153 
154 static int cim_la_open(struct inode *inode, struct file *file)
155 {
156 	int ret;
157 	unsigned int cfg;
158 	struct seq_tab *p;
159 	struct adapter *adap = inode->i_private;
160 
161 	ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
162 	if (ret)
163 		return ret;
164 
165 	p = seq_open_tab(file, adap->params.cim_la_size / 8, 8 * sizeof(u32), 1,
166 			 cfg & UPDBGLACAPTPCONLY_F ?
167 			 cim_la_show_3in1 : cim_la_show);
168 	if (!p)
169 		return -ENOMEM;
170 
171 	ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
172 	if (ret)
173 		seq_release_private(inode, file);
174 	return ret;
175 }
176 
177 static const struct file_operations cim_la_fops = {
178 	.owner   = THIS_MODULE,
179 	.open    = cim_la_open,
180 	.read    = seq_read,
181 	.llseek  = seq_lseek,
182 	.release = seq_release_private
183 };
184 
185 static int cim_qcfg_show(struct seq_file *seq, void *v)
186 {
187 	static const char * const qname[] = {
188 		"TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
189 		"ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
190 		"SGE0-RX", "SGE1-RX"
191 	};
192 
193 	int i;
194 	struct adapter *adap = seq->private;
195 	u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
196 	u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
197 	u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
198 	u16 thres[CIM_NUM_IBQ];
199 	u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
200 	u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
201 	u32 *p = stat;
202 	int cim_num_obq = is_t4(adap->params.chip) ?
203 				CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
204 
205 	i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
206 			UP_IBQ_0_SHADOW_RDADDR_A,
207 			ARRAY_SIZE(stat), stat);
208 	if (!i) {
209 		if (is_t4(adap->params.chip)) {
210 			i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
211 					ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
212 				wr = obq_wr_t4;
213 		} else {
214 			i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
215 					ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
216 				wr = obq_wr_t5;
217 		}
218 	}
219 	if (i)
220 		return i;
221 
222 	t4_read_cimq_cfg(adap, base, size, thres);
223 
224 	seq_printf(seq,
225 		   "  Queue  Base  Size Thres  RdPtr WrPtr  SOP  EOP Avail\n");
226 	for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
227 		seq_printf(seq, "%7s %5x %5u %5u %6x  %4x %4u %4u %5u\n",
228 			   qname[i], base[i], size[i], thres[i],
229 			   IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
230 			   QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
231 			   QUEREMFLITS_G(p[2]) * 16);
232 	for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
233 		seq_printf(seq, "%7s %5x %5u %12x  %4x %4u %4u %5u\n",
234 			   qname[i], base[i], size[i],
235 			   QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
236 			   QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
237 			   QUEREMFLITS_G(p[2]) * 16);
238 	return 0;
239 }
240 
241 static int cim_qcfg_open(struct inode *inode, struct file *file)
242 {
243 	return single_open(file, cim_qcfg_show, inode->i_private);
244 }
245 
246 static const struct file_operations cim_qcfg_fops = {
247 	.owner   = THIS_MODULE,
248 	.open    = cim_qcfg_open,
249 	.read    = seq_read,
250 	.llseek  = seq_lseek,
251 	.release = single_release,
252 };
253 
254 static int cimq_show(struct seq_file *seq, void *v, int idx)
255 {
256 	const u32 *p = v;
257 
258 	seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
259 		   p[2], p[3]);
260 	return 0;
261 }
262 
263 static int cim_ibq_open(struct inode *inode, struct file *file)
264 {
265 	int ret;
266 	struct seq_tab *p;
267 	unsigned int qid = (uintptr_t)inode->i_private & 7;
268 	struct adapter *adap = inode->i_private - qid;
269 
270 	p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
271 	if (!p)
272 		return -ENOMEM;
273 
274 	ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
275 	if (ret < 0)
276 		seq_release_private(inode, file);
277 	else
278 		ret = 0;
279 	return ret;
280 }
281 
282 static const struct file_operations cim_ibq_fops = {
283 	.owner   = THIS_MODULE,
284 	.open    = cim_ibq_open,
285 	.read    = seq_read,
286 	.llseek  = seq_lseek,
287 	.release = seq_release_private
288 };
289 
290 static int cim_obq_open(struct inode *inode, struct file *file)
291 {
292 	int ret;
293 	struct seq_tab *p;
294 	unsigned int qid = (uintptr_t)inode->i_private & 7;
295 	struct adapter *adap = inode->i_private - qid;
296 
297 	p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
298 	if (!p)
299 		return -ENOMEM;
300 
301 	ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
302 	if (ret < 0) {
303 		seq_release_private(inode, file);
304 	} else {
305 		seq_tab_trim(p, ret / 4);
306 		ret = 0;
307 	}
308 	return ret;
309 }
310 
311 static const struct file_operations cim_obq_fops = {
312 	.owner   = THIS_MODULE,
313 	.open    = cim_obq_open,
314 	.read    = seq_read,
315 	.llseek  = seq_lseek,
316 	.release = seq_release_private
317 };
318 
319 struct field_desc {
320 	const char *name;
321 	unsigned int start;
322 	unsigned int width;
323 };
324 
325 static void field_desc_show(struct seq_file *seq, u64 v,
326 			    const struct field_desc *p)
327 {
328 	char buf[32];
329 	int line_size = 0;
330 
331 	while (p->name) {
332 		u64 mask = (1ULL << p->width) - 1;
333 		int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
334 				    ((unsigned long long)v >> p->start) & mask);
335 
336 		if (line_size + len >= 79) {
337 			line_size = 8;
338 			seq_puts(seq, "\n        ");
339 		}
340 		seq_printf(seq, "%s ", buf);
341 		line_size += len + 1;
342 		p++;
343 	}
344 	seq_putc(seq, '\n');
345 }
346 
347 static struct field_desc tp_la0[] = {
348 	{ "RcfOpCodeOut", 60, 4 },
349 	{ "State", 56, 4 },
350 	{ "WcfState", 52, 4 },
351 	{ "RcfOpcSrcOut", 50, 2 },
352 	{ "CRxError", 49, 1 },
353 	{ "ERxError", 48, 1 },
354 	{ "SanityFailed", 47, 1 },
355 	{ "SpuriousMsg", 46, 1 },
356 	{ "FlushInputMsg", 45, 1 },
357 	{ "FlushInputCpl", 44, 1 },
358 	{ "RssUpBit", 43, 1 },
359 	{ "RssFilterHit", 42, 1 },
360 	{ "Tid", 32, 10 },
361 	{ "InitTcb", 31, 1 },
362 	{ "LineNumber", 24, 7 },
363 	{ "Emsg", 23, 1 },
364 	{ "EdataOut", 22, 1 },
365 	{ "Cmsg", 21, 1 },
366 	{ "CdataOut", 20, 1 },
367 	{ "EreadPdu", 19, 1 },
368 	{ "CreadPdu", 18, 1 },
369 	{ "TunnelPkt", 17, 1 },
370 	{ "RcfPeerFin", 16, 1 },
371 	{ "RcfReasonOut", 12, 4 },
372 	{ "TxCchannel", 10, 2 },
373 	{ "RcfTxChannel", 8, 2 },
374 	{ "RxEchannel", 6, 2 },
375 	{ "RcfRxChannel", 5, 1 },
376 	{ "RcfDataOutSrdy", 4, 1 },
377 	{ "RxDvld", 3, 1 },
378 	{ "RxOoDvld", 2, 1 },
379 	{ "RxCongestion", 1, 1 },
380 	{ "TxCongestion", 0, 1 },
381 	{ NULL }
382 };
383 
384 static int tp_la_show(struct seq_file *seq, void *v, int idx)
385 {
386 	const u64 *p = v;
387 
388 	field_desc_show(seq, *p, tp_la0);
389 	return 0;
390 }
391 
392 static int tp_la_show2(struct seq_file *seq, void *v, int idx)
393 {
394 	const u64 *p = v;
395 
396 	if (idx)
397 		seq_putc(seq, '\n');
398 	field_desc_show(seq, p[0], tp_la0);
399 	if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
400 		field_desc_show(seq, p[1], tp_la0);
401 	return 0;
402 }
403 
404 static int tp_la_show3(struct seq_file *seq, void *v, int idx)
405 {
406 	static struct field_desc tp_la1[] = {
407 		{ "CplCmdIn", 56, 8 },
408 		{ "CplCmdOut", 48, 8 },
409 		{ "ESynOut", 47, 1 },
410 		{ "EAckOut", 46, 1 },
411 		{ "EFinOut", 45, 1 },
412 		{ "ERstOut", 44, 1 },
413 		{ "SynIn", 43, 1 },
414 		{ "AckIn", 42, 1 },
415 		{ "FinIn", 41, 1 },
416 		{ "RstIn", 40, 1 },
417 		{ "DataIn", 39, 1 },
418 		{ "DataInVld", 38, 1 },
419 		{ "PadIn", 37, 1 },
420 		{ "RxBufEmpty", 36, 1 },
421 		{ "RxDdp", 35, 1 },
422 		{ "RxFbCongestion", 34, 1 },
423 		{ "TxFbCongestion", 33, 1 },
424 		{ "TxPktSumSrdy", 32, 1 },
425 		{ "RcfUlpType", 28, 4 },
426 		{ "Eread", 27, 1 },
427 		{ "Ebypass", 26, 1 },
428 		{ "Esave", 25, 1 },
429 		{ "Static0", 24, 1 },
430 		{ "Cread", 23, 1 },
431 		{ "Cbypass", 22, 1 },
432 		{ "Csave", 21, 1 },
433 		{ "CPktOut", 20, 1 },
434 		{ "RxPagePoolFull", 18, 2 },
435 		{ "RxLpbkPkt", 17, 1 },
436 		{ "TxLpbkPkt", 16, 1 },
437 		{ "RxVfValid", 15, 1 },
438 		{ "SynLearned", 14, 1 },
439 		{ "SetDelEntry", 13, 1 },
440 		{ "SetInvEntry", 12, 1 },
441 		{ "CpcmdDvld", 11, 1 },
442 		{ "CpcmdSave", 10, 1 },
443 		{ "RxPstructsFull", 8, 2 },
444 		{ "EpcmdDvld", 7, 1 },
445 		{ "EpcmdFlush", 6, 1 },
446 		{ "EpcmdTrimPrefix", 5, 1 },
447 		{ "EpcmdTrimPostfix", 4, 1 },
448 		{ "ERssIp4Pkt", 3, 1 },
449 		{ "ERssIp6Pkt", 2, 1 },
450 		{ "ERssTcpUdpPkt", 1, 1 },
451 		{ "ERssFceFipPkt", 0, 1 },
452 		{ NULL }
453 	};
454 	static struct field_desc tp_la2[] = {
455 		{ "CplCmdIn", 56, 8 },
456 		{ "MpsVfVld", 55, 1 },
457 		{ "MpsPf", 52, 3 },
458 		{ "MpsVf", 44, 8 },
459 		{ "SynIn", 43, 1 },
460 		{ "AckIn", 42, 1 },
461 		{ "FinIn", 41, 1 },
462 		{ "RstIn", 40, 1 },
463 		{ "DataIn", 39, 1 },
464 		{ "DataInVld", 38, 1 },
465 		{ "PadIn", 37, 1 },
466 		{ "RxBufEmpty", 36, 1 },
467 		{ "RxDdp", 35, 1 },
468 		{ "RxFbCongestion", 34, 1 },
469 		{ "TxFbCongestion", 33, 1 },
470 		{ "TxPktSumSrdy", 32, 1 },
471 		{ "RcfUlpType", 28, 4 },
472 		{ "Eread", 27, 1 },
473 		{ "Ebypass", 26, 1 },
474 		{ "Esave", 25, 1 },
475 		{ "Static0", 24, 1 },
476 		{ "Cread", 23, 1 },
477 		{ "Cbypass", 22, 1 },
478 		{ "Csave", 21, 1 },
479 		{ "CPktOut", 20, 1 },
480 		{ "RxPagePoolFull", 18, 2 },
481 		{ "RxLpbkPkt", 17, 1 },
482 		{ "TxLpbkPkt", 16, 1 },
483 		{ "RxVfValid", 15, 1 },
484 		{ "SynLearned", 14, 1 },
485 		{ "SetDelEntry", 13, 1 },
486 		{ "SetInvEntry", 12, 1 },
487 		{ "CpcmdDvld", 11, 1 },
488 		{ "CpcmdSave", 10, 1 },
489 		{ "RxPstructsFull", 8, 2 },
490 		{ "EpcmdDvld", 7, 1 },
491 		{ "EpcmdFlush", 6, 1 },
492 		{ "EpcmdTrimPrefix", 5, 1 },
493 		{ "EpcmdTrimPostfix", 4, 1 },
494 		{ "ERssIp4Pkt", 3, 1 },
495 		{ "ERssIp6Pkt", 2, 1 },
496 		{ "ERssTcpUdpPkt", 1, 1 },
497 		{ "ERssFceFipPkt", 0, 1 },
498 		{ NULL }
499 	};
500 	const u64 *p = v;
501 
502 	if (idx)
503 		seq_putc(seq, '\n');
504 	field_desc_show(seq, p[0], tp_la0);
505 	if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
506 		field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
507 	return 0;
508 }
509 
510 static int tp_la_open(struct inode *inode, struct file *file)
511 {
512 	struct seq_tab *p;
513 	struct adapter *adap = inode->i_private;
514 
515 	switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
516 	case 2:
517 		p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
518 				 tp_la_show2);
519 		break;
520 	case 3:
521 		p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
522 				 tp_la_show3);
523 		break;
524 	default:
525 		p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
526 	}
527 	if (!p)
528 		return -ENOMEM;
529 
530 	t4_tp_read_la(adap, (u64 *)p->data, NULL);
531 	return 0;
532 }
533 
534 static ssize_t tp_la_write(struct file *file, const char __user *buf,
535 			   size_t count, loff_t *pos)
536 {
537 	int err;
538 	char s[32];
539 	unsigned long val;
540 	size_t size = min(sizeof(s) - 1, count);
541 	struct adapter *adap = FILE_DATA(file)->i_private;
542 
543 	if (copy_from_user(s, buf, size))
544 		return -EFAULT;
545 	s[size] = '\0';
546 	err = kstrtoul(s, 0, &val);
547 	if (err)
548 		return err;
549 	if (val > 0xffff)
550 		return -EINVAL;
551 	adap->params.tp.la_mask = val << 16;
552 	t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
553 			 adap->params.tp.la_mask);
554 	return count;
555 }
556 
557 static const struct file_operations tp_la_fops = {
558 	.owner   = THIS_MODULE,
559 	.open    = tp_la_open,
560 	.read    = seq_read,
561 	.llseek  = seq_lseek,
562 	.release = seq_release_private,
563 	.write   = tp_la_write
564 };
565 
566 static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
567 {
568 	const u32 *p = v;
569 
570 	if (v == SEQ_START_TOKEN)
571 		seq_puts(seq, "      Pcmd        Type   Message"
572 			 "                Data\n");
573 	else
574 		seq_printf(seq, "%08x%08x  %4x  %08x  %08x%08x%08x%08x\n",
575 			   p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
576 	return 0;
577 }
578 
579 static int ulprx_la_open(struct inode *inode, struct file *file)
580 {
581 	struct seq_tab *p;
582 	struct adapter *adap = inode->i_private;
583 
584 	p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
585 			 ulprx_la_show);
586 	if (!p)
587 		return -ENOMEM;
588 
589 	t4_ulprx_read_la(adap, (u32 *)p->data);
590 	return 0;
591 }
592 
593 static const struct file_operations ulprx_la_fops = {
594 	.owner   = THIS_MODULE,
595 	.open    = ulprx_la_open,
596 	.read    = seq_read,
597 	.llseek  = seq_lseek,
598 	.release = seq_release_private
599 };
600 
601 /* Show the PM memory stats.  These stats include:
602  *
603  * TX:
604  *   Read: memory read operation
605  *   Write Bypass: cut-through
606  *   Bypass + mem: cut-through and save copy
607  *
608  * RX:
609  *   Read: memory read
610  *   Write Bypass: cut-through
611  *   Flush: payload trim or drop
612  */
613 static int pm_stats_show(struct seq_file *seq, void *v)
614 {
615 	static const char * const tx_pm_stats[] = {
616 		"Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
617 	};
618 	static const char * const rx_pm_stats[] = {
619 		"Read:", "Write bypass:", "Write mem:", "Flush:"
620 	};
621 
622 	int i;
623 	u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
624 	u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
625 	struct adapter *adap = seq->private;
626 
627 	t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
628 	t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
629 
630 	seq_printf(seq, "%13s %10s  %20s\n", " ", "Tx pcmds", "Tx bytes");
631 	for (i = 0; i < PM_NSTATS - 1; i++)
632 		seq_printf(seq, "%-13s %10u  %20llu\n",
633 			   tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
634 
635 	seq_printf(seq, "%13s %10s  %20s\n", " ", "Rx pcmds", "Rx bytes");
636 	for (i = 0; i < PM_NSTATS - 1; i++)
637 		seq_printf(seq, "%-13s %10u  %20llu\n",
638 			   rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
639 	return 0;
640 }
641 
642 static int pm_stats_open(struct inode *inode, struct file *file)
643 {
644 	return single_open(file, pm_stats_show, inode->i_private);
645 }
646 
647 static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
648 			      size_t count, loff_t *pos)
649 {
650 	struct adapter *adap = FILE_DATA(file)->i_private;
651 
652 	t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
653 	t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
654 	return count;
655 }
656 
657 static const struct file_operations pm_stats_debugfs_fops = {
658 	.owner   = THIS_MODULE,
659 	.open    = pm_stats_open,
660 	.read    = seq_read,
661 	.llseek  = seq_lseek,
662 	.release = single_release,
663 	.write   = pm_stats_clear
664 };
665 
666 static int cctrl_tbl_show(struct seq_file *seq, void *v)
667 {
668 	static const char * const dec_fac[] = {
669 		"0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
670 		"0.9375" };
671 
672 	int i;
673 	u16 incr[NMTUS][NCCTRL_WIN];
674 	struct adapter *adap = seq->private;
675 
676 	t4_read_cong_tbl(adap, incr);
677 
678 	for (i = 0; i < NCCTRL_WIN; ++i) {
679 		seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
680 			   incr[0][i], incr[1][i], incr[2][i], incr[3][i],
681 			   incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
682 		seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
683 			   incr[8][i], incr[9][i], incr[10][i], incr[11][i],
684 			   incr[12][i], incr[13][i], incr[14][i], incr[15][i],
685 			   adap->params.a_wnd[i],
686 			   dec_fac[adap->params.b_wnd[i]]);
687 	}
688 	return 0;
689 }
690 
691 DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
692 
693 /* Format a value in a unit that differs from the value's native unit by the
694  * given factor.
695  */
696 static char *unit_conv(char *buf, size_t len, unsigned int val,
697 		       unsigned int factor)
698 {
699 	unsigned int rem = val % factor;
700 
701 	if (rem == 0) {
702 		snprintf(buf, len, "%u", val / factor);
703 	} else {
704 		while (rem % 10 == 0)
705 			rem /= 10;
706 		snprintf(buf, len, "%u.%u", val / factor, rem);
707 	}
708 	return buf;
709 }
710 
711 static int clk_show(struct seq_file *seq, void *v)
712 {
713 	char buf[32];
714 	struct adapter *adap = seq->private;
715 	unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk;  /* in ps */
716 	u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
717 	unsigned int tre = TIMERRESOLUTION_G(res);
718 	unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
719 	unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
720 
721 	seq_printf(seq, "Core clock period: %s ns\n",
722 		   unit_conv(buf, sizeof(buf), cclk_ps, 1000));
723 	seq_printf(seq, "TP timer tick: %s us\n",
724 		   unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
725 	seq_printf(seq, "TCP timestamp tick: %s us\n",
726 		   unit_conv(buf, sizeof(buf),
727 			     (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
728 	seq_printf(seq, "DACK tick: %s us\n",
729 		   unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
730 	seq_printf(seq, "DACK timer: %u us\n",
731 		   ((cclk_ps << dack_re) / 1000000) *
732 		   t4_read_reg(adap, TP_DACK_TIMER_A));
733 	seq_printf(seq, "Retransmit min: %llu us\n",
734 		   tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
735 	seq_printf(seq, "Retransmit max: %llu us\n",
736 		   tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
737 	seq_printf(seq, "Persist timer min: %llu us\n",
738 		   tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
739 	seq_printf(seq, "Persist timer max: %llu us\n",
740 		   tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
741 	seq_printf(seq, "Keepalive idle timer: %llu us\n",
742 		   tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
743 	seq_printf(seq, "Keepalive interval: %llu us\n",
744 		   tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
745 	seq_printf(seq, "Initial SRTT: %llu us\n",
746 		   tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
747 	seq_printf(seq, "FINWAIT2 timer: %llu us\n",
748 		   tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
749 
750 	return 0;
751 }
752 
753 DEFINE_SIMPLE_DEBUGFS_FILE(clk);
754 
755 /* Firmware Device Log dump. */
756 static const char * const devlog_level_strings[] = {
757 	[FW_DEVLOG_LEVEL_EMERG]		= "EMERG",
758 	[FW_DEVLOG_LEVEL_CRIT]		= "CRIT",
759 	[FW_DEVLOG_LEVEL_ERR]		= "ERR",
760 	[FW_DEVLOG_LEVEL_NOTICE]	= "NOTICE",
761 	[FW_DEVLOG_LEVEL_INFO]		= "INFO",
762 	[FW_DEVLOG_LEVEL_DEBUG]		= "DEBUG"
763 };
764 
765 static const char * const devlog_facility_strings[] = {
766 	[FW_DEVLOG_FACILITY_CORE]	= "CORE",
767 	[FW_DEVLOG_FACILITY_SCHED]	= "SCHED",
768 	[FW_DEVLOG_FACILITY_TIMER]	= "TIMER",
769 	[FW_DEVLOG_FACILITY_RES]	= "RES",
770 	[FW_DEVLOG_FACILITY_HW]		= "HW",
771 	[FW_DEVLOG_FACILITY_FLR]	= "FLR",
772 	[FW_DEVLOG_FACILITY_DMAQ]	= "DMAQ",
773 	[FW_DEVLOG_FACILITY_PHY]	= "PHY",
774 	[FW_DEVLOG_FACILITY_MAC]	= "MAC",
775 	[FW_DEVLOG_FACILITY_PORT]	= "PORT",
776 	[FW_DEVLOG_FACILITY_VI]		= "VI",
777 	[FW_DEVLOG_FACILITY_FILTER]	= "FILTER",
778 	[FW_DEVLOG_FACILITY_ACL]	= "ACL",
779 	[FW_DEVLOG_FACILITY_TM]		= "TM",
780 	[FW_DEVLOG_FACILITY_QFC]	= "QFC",
781 	[FW_DEVLOG_FACILITY_DCB]	= "DCB",
782 	[FW_DEVLOG_FACILITY_ETH]	= "ETH",
783 	[FW_DEVLOG_FACILITY_OFLD]	= "OFLD",
784 	[FW_DEVLOG_FACILITY_RI]		= "RI",
785 	[FW_DEVLOG_FACILITY_ISCSI]	= "ISCSI",
786 	[FW_DEVLOG_FACILITY_FCOE]	= "FCOE",
787 	[FW_DEVLOG_FACILITY_FOISCSI]	= "FOISCSI",
788 	[FW_DEVLOG_FACILITY_FOFCOE]	= "FOFCOE"
789 };
790 
791 /* Information gathered by Device Log Open routine for the display routine.
792  */
793 struct devlog_info {
794 	unsigned int nentries;		/* number of entries in log[] */
795 	unsigned int first;		/* first [temporal] entry in log[] */
796 	struct fw_devlog_e log[0];	/* Firmware Device Log */
797 };
798 
799 /* Dump a Firmaware Device Log entry.
800  */
801 static int devlog_show(struct seq_file *seq, void *v)
802 {
803 	if (v == SEQ_START_TOKEN)
804 		seq_printf(seq, "%10s  %15s  %8s  %8s  %s\n",
805 			   "Seq#", "Tstamp", "Level", "Facility", "Message");
806 	else {
807 		struct devlog_info *dinfo = seq->private;
808 		int fidx = (uintptr_t)v - 2;
809 		unsigned long index;
810 		struct fw_devlog_e *e;
811 
812 		/* Get a pointer to the log entry to display.  Skip unused log
813 		 * entries.
814 		 */
815 		index = dinfo->first + fidx;
816 		if (index >= dinfo->nentries)
817 			index -= dinfo->nentries;
818 		e = &dinfo->log[index];
819 		if (e->timestamp == 0)
820 			return 0;
821 
822 		/* Print the message.  This depends on the firmware using
823 		 * exactly the same formating strings as the kernel so we may
824 		 * eventually have to put a format interpreter in here ...
825 		 */
826 		seq_printf(seq, "%10d  %15llu  %8s  %8s  ",
827 			   e->seqno, e->timestamp,
828 			   (e->level < ARRAY_SIZE(devlog_level_strings)
829 			    ? devlog_level_strings[e->level]
830 			    : "UNKNOWN"),
831 			   (e->facility < ARRAY_SIZE(devlog_facility_strings)
832 			    ? devlog_facility_strings[e->facility]
833 			    : "UNKNOWN"));
834 		seq_printf(seq, e->fmt, e->params[0], e->params[1],
835 			   e->params[2], e->params[3], e->params[4],
836 			   e->params[5], e->params[6], e->params[7]);
837 	}
838 	return 0;
839 }
840 
841 /* Sequential File Operations for Device Log.
842  */
843 static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
844 {
845 	if (pos > dinfo->nentries)
846 		return NULL;
847 
848 	return (void *)(uintptr_t)(pos + 1);
849 }
850 
851 static void *devlog_start(struct seq_file *seq, loff_t *pos)
852 {
853 	struct devlog_info *dinfo = seq->private;
854 
855 	return (*pos
856 		? devlog_get_idx(dinfo, *pos)
857 		: SEQ_START_TOKEN);
858 }
859 
860 static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
861 {
862 	struct devlog_info *dinfo = seq->private;
863 
864 	(*pos)++;
865 	return devlog_get_idx(dinfo, *pos);
866 }
867 
868 static void devlog_stop(struct seq_file *seq, void *v)
869 {
870 }
871 
872 static const struct seq_operations devlog_seq_ops = {
873 	.start = devlog_start,
874 	.next  = devlog_next,
875 	.stop  = devlog_stop,
876 	.show  = devlog_show
877 };
878 
879 /* Set up for reading the firmware's device log.  We read the entire log here
880  * and then display it incrementally in devlog_show().
881  */
882 static int devlog_open(struct inode *inode, struct file *file)
883 {
884 	struct adapter *adap = inode->i_private;
885 	struct devlog_params *dparams = &adap->params.devlog;
886 	struct devlog_info *dinfo;
887 	unsigned int index;
888 	u32 fseqno;
889 	int ret;
890 
891 	/* If we don't know where the log is we can't do anything.
892 	 */
893 	if (dparams->start == 0)
894 		return -ENXIO;
895 
896 	/* Allocate the space to read in the firmware's device log and set up
897 	 * for the iterated call to our display function.
898 	 */
899 	dinfo = __seq_open_private(file, &devlog_seq_ops,
900 				   sizeof(*dinfo) + dparams->size);
901 	if (!dinfo)
902 		return -ENOMEM;
903 
904 	/* Record the basic log buffer information and read in the raw log.
905 	 */
906 	dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
907 	dinfo->first = 0;
908 	spin_lock(&adap->win0_lock);
909 	ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
910 			   dparams->start, dparams->size, (__be32 *)dinfo->log,
911 			   T4_MEMORY_READ);
912 	spin_unlock(&adap->win0_lock);
913 	if (ret) {
914 		seq_release_private(inode, file);
915 		return ret;
916 	}
917 
918 	/* Translate log multi-byte integral elements into host native format
919 	 * and determine where the first entry in the log is.
920 	 */
921 	for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
922 		struct fw_devlog_e *e = &dinfo->log[index];
923 		int i;
924 		__u32 seqno;
925 
926 		if (e->timestamp == 0)
927 			continue;
928 
929 		e->timestamp = (__force __be64)be64_to_cpu(e->timestamp);
930 		seqno = be32_to_cpu(e->seqno);
931 		for (i = 0; i < 8; i++)
932 			e->params[i] =
933 				(__force __be32)be32_to_cpu(e->params[i]);
934 
935 		if (seqno < fseqno) {
936 			fseqno = seqno;
937 			dinfo->first = index;
938 		}
939 	}
940 	return 0;
941 }
942 
943 static const struct file_operations devlog_fops = {
944 	.owner   = THIS_MODULE,
945 	.open    = devlog_open,
946 	.read    = seq_read,
947 	.llseek  = seq_lseek,
948 	.release = seq_release_private
949 };
950 
951 static int mbox_show(struct seq_file *seq, void *v)
952 {
953 	static const char * const owner[] = { "none", "FW", "driver",
954 					      "unknown" };
955 
956 	int i;
957 	unsigned int mbox = (uintptr_t)seq->private & 7;
958 	struct adapter *adap = seq->private - mbox;
959 	void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
960 	unsigned int ctrl_reg = (is_t4(adap->params.chip)
961 				 ? CIM_PF_MAILBOX_CTRL_A
962 				 : CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A);
963 	void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
964 
965 	i = MBOWNER_G(readl(ctrl));
966 	seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
967 
968 	for (i = 0; i < MBOX_LEN; i += 8)
969 		seq_printf(seq, "%016llx\n",
970 			   (unsigned long long)readq(addr + i));
971 	return 0;
972 }
973 
974 static int mbox_open(struct inode *inode, struct file *file)
975 {
976 	return single_open(file, mbox_show, inode->i_private);
977 }
978 
979 static ssize_t mbox_write(struct file *file, const char __user *buf,
980 			  size_t count, loff_t *pos)
981 {
982 	int i;
983 	char c = '\n', s[256];
984 	unsigned long long data[8];
985 	const struct inode *ino;
986 	unsigned int mbox;
987 	struct adapter *adap;
988 	void __iomem *addr;
989 	void __iomem *ctrl;
990 
991 	if (count > sizeof(s) - 1 || !count)
992 		return -EINVAL;
993 	if (copy_from_user(s, buf, count))
994 		return -EFAULT;
995 	s[count] = '\0';
996 
997 	if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
998 		   &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
999 		   &data[7], &c) < 8 || c != '\n')
1000 		return -EINVAL;
1001 
1002 	ino = FILE_DATA(file);
1003 	mbox = (uintptr_t)ino->i_private & 7;
1004 	adap = ino->i_private - mbox;
1005 	addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
1006 	ctrl = addr + MBOX_LEN;
1007 
1008 	if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
1009 		return -EBUSY;
1010 
1011 	for (i = 0; i < 8; i++)
1012 		writeq(data[i], addr + 8 * i);
1013 
1014 	writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
1015 	return count;
1016 }
1017 
1018 static const struct file_operations mbox_debugfs_fops = {
1019 	.owner   = THIS_MODULE,
1020 	.open    = mbox_open,
1021 	.read    = seq_read,
1022 	.llseek  = seq_lseek,
1023 	.release = single_release,
1024 	.write   = mbox_write
1025 };
1026 
1027 static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
1028 			  loff_t *ppos)
1029 {
1030 	loff_t pos = *ppos;
1031 	loff_t avail = FILE_DATA(file)->i_size;
1032 	struct adapter *adap = file->private_data;
1033 
1034 	if (pos < 0)
1035 		return -EINVAL;
1036 	if (pos >= avail)
1037 		return 0;
1038 	if (count > avail - pos)
1039 		count = avail - pos;
1040 
1041 	while (count) {
1042 		size_t len;
1043 		int ret, ofst;
1044 		u8 data[256];
1045 
1046 		ofst = pos & 3;
1047 		len = min(count + ofst, sizeof(data));
1048 		ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
1049 				    (u32 *)data, 1);
1050 		if (ret)
1051 			return ret;
1052 
1053 		len -= ofst;
1054 		if (copy_to_user(buf, data + ofst, len))
1055 			return -EFAULT;
1056 
1057 		buf += len;
1058 		pos += len;
1059 		count -= len;
1060 	}
1061 	count = pos - *ppos;
1062 	*ppos = pos;
1063 	return count;
1064 }
1065 
1066 static const struct file_operations flash_debugfs_fops = {
1067 	.owner   = THIS_MODULE,
1068 	.open    = mem_open,
1069 	.read    = flash_read,
1070 };
1071 
1072 static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
1073 {
1074 	*mask = x | y;
1075 	y = (__force u64)cpu_to_be64(y);
1076 	memcpy(addr, (char *)&y + 2, ETH_ALEN);
1077 }
1078 
1079 static int mps_tcam_show(struct seq_file *seq, void *v)
1080 {
1081 	if (v == SEQ_START_TOKEN)
1082 		seq_puts(seq, "Idx  Ethernet address     Mask     Vld Ports PF"
1083 			 "  VF              Replication             "
1084 			 "P0 P1 P2 P3  ML\n");
1085 	else {
1086 		u64 mask;
1087 		u8 addr[ETH_ALEN];
1088 		struct adapter *adap = seq->private;
1089 		unsigned int idx = (uintptr_t)v - 2;
1090 		u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
1091 		u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
1092 		u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
1093 		u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
1094 		u32 rplc[4] = {0, 0, 0, 0};
1095 
1096 		if (tcamx & tcamy) {
1097 			seq_printf(seq, "%3u         -\n", idx);
1098 			goto out;
1099 		}
1100 
1101 		if (cls_lo & REPLICATE_F) {
1102 			struct fw_ldst_cmd ldst_cmd;
1103 			int ret;
1104 
1105 			memset(&ldst_cmd, 0, sizeof(ldst_cmd));
1106 			ldst_cmd.op_to_addrspace =
1107 				htonl(FW_CMD_OP_V(FW_LDST_CMD) |
1108 				      FW_CMD_REQUEST_F |
1109 				      FW_CMD_READ_F |
1110 				      FW_LDST_CMD_ADDRSPACE_V(
1111 					      FW_LDST_ADDRSPC_MPS));
1112 			ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
1113 			ldst_cmd.u.mps.fid_ctl =
1114 				htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
1115 				      FW_LDST_CMD_CTL_V(idx));
1116 			ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
1117 					 sizeof(ldst_cmd), &ldst_cmd);
1118 			if (ret)
1119 				dev_warn(adap->pdev_dev, "Can't read MPS "
1120 					 "replication map for idx %d: %d\n",
1121 					 idx, -ret);
1122 			else {
1123 				rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
1124 				rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
1125 				rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
1126 				rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
1127 			}
1128 		}
1129 
1130 		tcamxy2valmask(tcamx, tcamy, addr, &mask);
1131 		seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
1132 			   "%3c   %#x%4u%4d",
1133 			   idx, addr[0], addr[1], addr[2], addr[3], addr[4],
1134 			   addr[5], (unsigned long long)mask,
1135 			   (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
1136 			   PF_G(cls_lo),
1137 			   (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
1138 		if (cls_lo & REPLICATE_F)
1139 			seq_printf(seq, " %08x %08x %08x %08x",
1140 				   rplc[3], rplc[2], rplc[1], rplc[0]);
1141 		else
1142 			seq_printf(seq, "%36c", ' ');
1143 		seq_printf(seq, "%4u%3u%3u%3u %#x\n",
1144 			   SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
1145 			   SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
1146 			   (cls_lo >> MULTILISTEN0_S) & 0xf);
1147 	}
1148 out:	return 0;
1149 }
1150 
1151 static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
1152 {
1153 	struct adapter *adap = seq->private;
1154 	int max_mac_addr = is_t4(adap->params.chip) ?
1155 				NUM_MPS_CLS_SRAM_L_INSTANCES :
1156 				NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
1157 	return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
1158 }
1159 
1160 static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
1161 {
1162 	return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
1163 }
1164 
1165 static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
1166 {
1167 	++*pos;
1168 	return mps_tcam_get_idx(seq, *pos);
1169 }
1170 
1171 static void mps_tcam_stop(struct seq_file *seq, void *v)
1172 {
1173 }
1174 
1175 static const struct seq_operations mps_tcam_seq_ops = {
1176 	.start = mps_tcam_start,
1177 	.next  = mps_tcam_next,
1178 	.stop  = mps_tcam_stop,
1179 	.show  = mps_tcam_show
1180 };
1181 
1182 static int mps_tcam_open(struct inode *inode, struct file *file)
1183 {
1184 	int res = seq_open(file, &mps_tcam_seq_ops);
1185 
1186 	if (!res) {
1187 		struct seq_file *seq = file->private_data;
1188 
1189 		seq->private = inode->i_private;
1190 	}
1191 	return res;
1192 }
1193 
1194 static const struct file_operations mps_tcam_debugfs_fops = {
1195 	.owner   = THIS_MODULE,
1196 	.open    = mps_tcam_open,
1197 	.read    = seq_read,
1198 	.llseek  = seq_lseek,
1199 	.release = seq_release,
1200 };
1201 
1202 /* Display various sensor information.
1203  */
1204 static int sensors_show(struct seq_file *seq, void *v)
1205 {
1206 	struct adapter *adap = seq->private;
1207 	u32 param[7], val[7];
1208 	int ret;
1209 
1210 	/* Note that if the sensors haven't been initialized and turned on
1211 	 * we'll get values of 0, so treat those as "<unknown>" ...
1212 	 */
1213 	param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1214 		    FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1215 		    FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
1216 	param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
1217 		    FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
1218 		    FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
1219 	ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2,
1220 			      param, val);
1221 
1222 	if (ret < 0 || val[0] == 0)
1223 		seq_puts(seq, "Temperature: <unknown>\n");
1224 	else
1225 		seq_printf(seq, "Temperature: %dC\n", val[0]);
1226 
1227 	if (ret < 0 || val[1] == 0)
1228 		seq_puts(seq, "Core VDD:    <unknown>\n");
1229 	else
1230 		seq_printf(seq, "Core VDD:    %dmV\n", val[1]);
1231 
1232 	return 0;
1233 }
1234 
1235 DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
1236 
1237 #if IS_ENABLED(CONFIG_IPV6)
1238 static int clip_tbl_open(struct inode *inode, struct file *file)
1239 {
1240 	return single_open(file, clip_tbl_show, inode->i_private);
1241 }
1242 
1243 static const struct file_operations clip_tbl_debugfs_fops = {
1244 	.owner   = THIS_MODULE,
1245 	.open    = clip_tbl_open,
1246 	.read    = seq_read,
1247 	.llseek  = seq_lseek,
1248 	.release = single_release
1249 };
1250 #endif
1251 
1252 /*RSS Table.
1253  */
1254 
1255 static int rss_show(struct seq_file *seq, void *v, int idx)
1256 {
1257 	u16 *entry = v;
1258 
1259 	seq_printf(seq, "%4d:  %4u  %4u  %4u  %4u  %4u  %4u  %4u  %4u\n",
1260 		   idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
1261 		   entry[5], entry[6], entry[7]);
1262 	return 0;
1263 }
1264 
1265 static int rss_open(struct inode *inode, struct file *file)
1266 {
1267 	int ret;
1268 	struct seq_tab *p;
1269 	struct adapter *adap = inode->i_private;
1270 
1271 	p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
1272 	if (!p)
1273 		return -ENOMEM;
1274 
1275 	ret = t4_read_rss(adap, (u16 *)p->data);
1276 	if (ret)
1277 		seq_release_private(inode, file);
1278 
1279 	return ret;
1280 }
1281 
1282 static const struct file_operations rss_debugfs_fops = {
1283 	.owner   = THIS_MODULE,
1284 	.open    = rss_open,
1285 	.read    = seq_read,
1286 	.llseek  = seq_lseek,
1287 	.release = seq_release_private
1288 };
1289 
1290 /* RSS Configuration.
1291  */
1292 
1293 /* Small utility function to return the strings "yes" or "no" if the supplied
1294  * argument is non-zero.
1295  */
1296 static const char *yesno(int x)
1297 {
1298 	static const char *yes = "yes";
1299 	static const char *no = "no";
1300 
1301 	return x ? yes : no;
1302 }
1303 
1304 static int rss_config_show(struct seq_file *seq, void *v)
1305 {
1306 	struct adapter *adapter = seq->private;
1307 	static const char * const keymode[] = {
1308 		"global",
1309 		"global and per-VF scramble",
1310 		"per-PF and per-VF scramble",
1311 		"per-VF and per-VF scramble",
1312 	};
1313 	u32 rssconf;
1314 
1315 	rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
1316 	seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
1317 	seq_printf(seq, "  Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
1318 							TNL4TUPENIPV6_F));
1319 	seq_printf(seq, "  Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
1320 							TNL2TUPENIPV6_F));
1321 	seq_printf(seq, "  Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
1322 							TNL4TUPENIPV4_F));
1323 	seq_printf(seq, "  Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
1324 							TNL2TUPENIPV4_F));
1325 	seq_printf(seq, "  TnlTcpSel:     %3s\n", yesno(rssconf & TNLTCPSEL_F));
1326 	seq_printf(seq, "  TnlIp6Sel:     %3s\n", yesno(rssconf & TNLIP6SEL_F));
1327 	seq_printf(seq, "  TnlVrtSel:     %3s\n", yesno(rssconf & TNLVRTSEL_F));
1328 	seq_printf(seq, "  TnlMapEn:      %3s\n", yesno(rssconf & TNLMAPEN_F));
1329 	seq_printf(seq, "  OfdHashSave:   %3s\n", yesno(rssconf &
1330 							OFDHASHSAVE_F));
1331 	seq_printf(seq, "  OfdVrtSel:     %3s\n", yesno(rssconf & OFDVRTSEL_F));
1332 	seq_printf(seq, "  OfdMapEn:      %3s\n", yesno(rssconf & OFDMAPEN_F));
1333 	seq_printf(seq, "  OfdLkpEn:      %3s\n", yesno(rssconf & OFDLKPEN_F));
1334 	seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1335 							SYN4TUPENIPV6_F));
1336 	seq_printf(seq, "  Syn2TupEnIpv6: %3s\n", yesno(rssconf &
1337 							SYN2TUPENIPV6_F));
1338 	seq_printf(seq, "  Syn4TupEnIpv4: %3s\n", yesno(rssconf &
1339 							SYN4TUPENIPV4_F));
1340 	seq_printf(seq, "  Syn2TupEnIpv4: %3s\n", yesno(rssconf &
1341 							SYN2TUPENIPV4_F));
1342 	seq_printf(seq, "  Syn4TupEnIpv6: %3s\n", yesno(rssconf &
1343 							SYN4TUPENIPV6_F));
1344 	seq_printf(seq, "  SynIp6Sel:     %3s\n", yesno(rssconf & SYNIP6SEL_F));
1345 	seq_printf(seq, "  SynVrt6Sel:    %3s\n", yesno(rssconf & SYNVRTSEL_F));
1346 	seq_printf(seq, "  SynMapEn:      %3s\n", yesno(rssconf & SYNMAPEN_F));
1347 	seq_printf(seq, "  SynLkpEn:      %3s\n", yesno(rssconf & SYNLKPEN_F));
1348 	seq_printf(seq, "  ChnEn:         %3s\n", yesno(rssconf &
1349 							CHANNELENABLE_F));
1350 	seq_printf(seq, "  PrtEn:         %3s\n", yesno(rssconf &
1351 							PORTENABLE_F));
1352 	seq_printf(seq, "  TnlAllLkp:     %3s\n", yesno(rssconf &
1353 							TNLALLLOOKUP_F));
1354 	seq_printf(seq, "  VrtEn:         %3s\n", yesno(rssconf &
1355 							VIRTENABLE_F));
1356 	seq_printf(seq, "  CngEn:         %3s\n", yesno(rssconf &
1357 							CONGESTIONENABLE_F));
1358 	seq_printf(seq, "  HashToeplitz:  %3s\n", yesno(rssconf &
1359 							HASHTOEPLITZ_F));
1360 	seq_printf(seq, "  Udp4En:        %3s\n", yesno(rssconf & UDPENABLE_F));
1361 	seq_printf(seq, "  Disable:       %3s\n", yesno(rssconf & DISABLE_F));
1362 
1363 	seq_puts(seq, "\n");
1364 
1365 	rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
1366 	seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
1367 	seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1368 	seq_printf(seq, "  MaskFilter:    %3d\n", MASKFILTER_G(rssconf));
1369 	if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1370 		seq_printf(seq, "  HashAll:     %3s\n",
1371 			   yesno(rssconf & HASHALL_F));
1372 		seq_printf(seq, "  HashEth:     %3s\n",
1373 			   yesno(rssconf & HASHETH_F));
1374 	}
1375 	seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
1376 
1377 	seq_puts(seq, "\n");
1378 
1379 	rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
1380 	seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
1381 	seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1382 	seq_printf(seq, "  RRCplMapEn:    %3s\n", yesno(rssconf &
1383 							RRCPLMAPEN_F));
1384 	seq_printf(seq, "  RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
1385 
1386 	seq_puts(seq, "\n");
1387 
1388 	rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
1389 	seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
1390 	seq_printf(seq, "  MaskSize:      %3d\n", MASKSIZE_G(rssconf));
1391 	seq_printf(seq, "  UseWireCh:     %3s\n", yesno(rssconf & USEWIRECH_F));
1392 
1393 	seq_puts(seq, "\n");
1394 
1395 	rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
1396 	seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
1397 	if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
1398 		seq_printf(seq, "  KeyWrAddrX:     %3d\n",
1399 			   KEYWRADDRX_G(rssconf));
1400 		seq_printf(seq, "  KeyExtend:      %3s\n",
1401 			   yesno(rssconf & KEYEXTEND_F));
1402 	}
1403 	seq_printf(seq, "  VfRdRg:        %3s\n", yesno(rssconf & VFRDRG_F));
1404 	seq_printf(seq, "  VfRdEn:        %3s\n", yesno(rssconf & VFRDEN_F));
1405 	seq_printf(seq, "  VfPerrEn:      %3s\n", yesno(rssconf & VFPERREN_F));
1406 	seq_printf(seq, "  KeyPerrEn:     %3s\n", yesno(rssconf & KEYPERREN_F));
1407 	seq_printf(seq, "  DisVfVlan:     %3s\n", yesno(rssconf &
1408 							DISABLEVLAN_F));
1409 	seq_printf(seq, "  EnUpSwt:       %3s\n", yesno(rssconf & ENABLEUP0_F));
1410 	seq_printf(seq, "  HashDelay:     %3d\n", HASHDELAY_G(rssconf));
1411 	if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
1412 		seq_printf(seq, "  VfWrAddr:      %3d\n", VFWRADDR_G(rssconf));
1413 	seq_printf(seq, "  KeyMode:       %s\n", keymode[KEYMODE_G(rssconf)]);
1414 	seq_printf(seq, "  VfWrEn:        %3s\n", yesno(rssconf & VFWREN_F));
1415 	seq_printf(seq, "  KeyWrEn:       %3s\n", yesno(rssconf & KEYWREN_F));
1416 	seq_printf(seq, "  KeyWrAddr:     %3d\n", KEYWRADDR_G(rssconf));
1417 
1418 	seq_puts(seq, "\n");
1419 
1420 	rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
1421 	seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
1422 	seq_printf(seq, "  ChnCount3:     %3s\n", yesno(rssconf & CHNCOUNT3_F));
1423 	seq_printf(seq, "  ChnCount2:     %3s\n", yesno(rssconf & CHNCOUNT2_F));
1424 	seq_printf(seq, "  ChnCount1:     %3s\n", yesno(rssconf & CHNCOUNT1_F));
1425 	seq_printf(seq, "  ChnCount0:     %3s\n", yesno(rssconf & CHNCOUNT0_F));
1426 	seq_printf(seq, "  ChnUndFlow3:   %3s\n", yesno(rssconf &
1427 							CHNUNDFLOW3_F));
1428 	seq_printf(seq, "  ChnUndFlow2:   %3s\n", yesno(rssconf &
1429 							CHNUNDFLOW2_F));
1430 	seq_printf(seq, "  ChnUndFlow1:   %3s\n", yesno(rssconf &
1431 							CHNUNDFLOW1_F));
1432 	seq_printf(seq, "  ChnUndFlow0:   %3s\n", yesno(rssconf &
1433 							CHNUNDFLOW0_F));
1434 	seq_printf(seq, "  RstChn3:       %3s\n", yesno(rssconf & RSTCHN3_F));
1435 	seq_printf(seq, "  RstChn2:       %3s\n", yesno(rssconf & RSTCHN2_F));
1436 	seq_printf(seq, "  RstChn1:       %3s\n", yesno(rssconf & RSTCHN1_F));
1437 	seq_printf(seq, "  RstChn0:       %3s\n", yesno(rssconf & RSTCHN0_F));
1438 	seq_printf(seq, "  UpdVld:        %3s\n", yesno(rssconf & UPDVLD_F));
1439 	seq_printf(seq, "  Xoff:          %3s\n", yesno(rssconf & XOFF_F));
1440 	seq_printf(seq, "  UpdChn3:       %3s\n", yesno(rssconf & UPDCHN3_F));
1441 	seq_printf(seq, "  UpdChn2:       %3s\n", yesno(rssconf & UPDCHN2_F));
1442 	seq_printf(seq, "  UpdChn1:       %3s\n", yesno(rssconf & UPDCHN1_F));
1443 	seq_printf(seq, "  UpdChn0:       %3s\n", yesno(rssconf & UPDCHN0_F));
1444 	seq_printf(seq, "  Queue:         %3d\n", QUEUE_G(rssconf));
1445 
1446 	return 0;
1447 }
1448 
1449 DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
1450 
1451 /* RSS Secret Key.
1452  */
1453 
1454 static int rss_key_show(struct seq_file *seq, void *v)
1455 {
1456 	u32 key[10];
1457 
1458 	t4_read_rss_key(seq->private, key);
1459 	seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
1460 		   key[9], key[8], key[7], key[6], key[5], key[4], key[3],
1461 		   key[2], key[1], key[0]);
1462 	return 0;
1463 }
1464 
1465 static int rss_key_open(struct inode *inode, struct file *file)
1466 {
1467 	return single_open(file, rss_key_show, inode->i_private);
1468 }
1469 
1470 static ssize_t rss_key_write(struct file *file, const char __user *buf,
1471 			     size_t count, loff_t *pos)
1472 {
1473 	int i, j;
1474 	u32 key[10];
1475 	char s[100], *p;
1476 	struct adapter *adap = FILE_DATA(file)->i_private;
1477 
1478 	if (count > sizeof(s) - 1)
1479 		return -EINVAL;
1480 	if (copy_from_user(s, buf, count))
1481 		return -EFAULT;
1482 	for (i = count; i > 0 && isspace(s[i - 1]); i--)
1483 		;
1484 	s[i] = '\0';
1485 
1486 	for (p = s, i = 9; i >= 0; i--) {
1487 		key[i] = 0;
1488 		for (j = 0; j < 8; j++, p++) {
1489 			if (!isxdigit(*p))
1490 				return -EINVAL;
1491 			key[i] = (key[i] << 4) | hex2val(*p);
1492 		}
1493 	}
1494 
1495 	t4_write_rss_key(adap, key, -1);
1496 	return count;
1497 }
1498 
1499 static const struct file_operations rss_key_debugfs_fops = {
1500 	.owner   = THIS_MODULE,
1501 	.open    = rss_key_open,
1502 	.read    = seq_read,
1503 	.llseek  = seq_lseek,
1504 	.release = single_release,
1505 	.write   = rss_key_write
1506 };
1507 
1508 /* PF RSS Configuration.
1509  */
1510 
1511 struct rss_pf_conf {
1512 	u32 rss_pf_map;
1513 	u32 rss_pf_mask;
1514 	u32 rss_pf_config;
1515 };
1516 
1517 static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
1518 {
1519 	struct rss_pf_conf *pfconf;
1520 
1521 	if (v == SEQ_START_TOKEN) {
1522 		/* use the 0th entry to dump the PF Map Index Size */
1523 		pfconf = seq->private + offsetof(struct seq_tab, data);
1524 		seq_printf(seq, "PF Map Index Size = %d\n\n",
1525 			   LKPIDXSIZE_G(pfconf->rss_pf_map));
1526 
1527 		seq_puts(seq, "     RSS              PF   VF    Hash Tuple Enable         Default\n");
1528 		seq_puts(seq, "     Enable       IPF Mask Mask  IPv6      IPv4      UDP   Queue\n");
1529 		seq_puts(seq, " PF  Map Chn Prt  Map Size Size  Four Two  Four Two  Four  Ch1  Ch0\n");
1530 	} else {
1531 		#define G_PFnLKPIDX(map, n) \
1532 			(((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
1533 		#define G_PFnMSKSIZE(mask, n) \
1534 			(((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
1535 
1536 		pfconf = v;
1537 		seq_printf(seq, "%3d  %3s %3s %3s  %3d  %3d  %3d   %3s %3s   %3s %3s   %3s  %3d  %3d\n",
1538 			   idx,
1539 			   yesno(pfconf->rss_pf_config & MAPENABLE_F),
1540 			   yesno(pfconf->rss_pf_config & CHNENABLE_F),
1541 			   yesno(pfconf->rss_pf_config & PRTENABLE_F),
1542 			   G_PFnLKPIDX(pfconf->rss_pf_map, idx),
1543 			   G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
1544 			   IVFWIDTH_G(pfconf->rss_pf_config),
1545 			   yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
1546 			   yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
1547 			   yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
1548 			   yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
1549 			   yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
1550 			   CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
1551 			   CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
1552 
1553 		#undef G_PFnLKPIDX
1554 		#undef G_PFnMSKSIZE
1555 	}
1556 	return 0;
1557 }
1558 
1559 static int rss_pf_config_open(struct inode *inode, struct file *file)
1560 {
1561 	struct adapter *adapter = inode->i_private;
1562 	struct seq_tab *p;
1563 	u32 rss_pf_map, rss_pf_mask;
1564 	struct rss_pf_conf *pfconf;
1565 	int pf;
1566 
1567 	p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
1568 	if (!p)
1569 		return -ENOMEM;
1570 
1571 	pfconf = (struct rss_pf_conf *)p->data;
1572 	rss_pf_map = t4_read_rss_pf_map(adapter);
1573 	rss_pf_mask = t4_read_rss_pf_mask(adapter);
1574 	for (pf = 0; pf < 8; pf++) {
1575 		pfconf[pf].rss_pf_map = rss_pf_map;
1576 		pfconf[pf].rss_pf_mask = rss_pf_mask;
1577 		t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
1578 	}
1579 	return 0;
1580 }
1581 
1582 static const struct file_operations rss_pf_config_debugfs_fops = {
1583 	.owner   = THIS_MODULE,
1584 	.open    = rss_pf_config_open,
1585 	.read    = seq_read,
1586 	.llseek  = seq_lseek,
1587 	.release = seq_release_private
1588 };
1589 
1590 /* VF RSS Configuration.
1591  */
1592 
1593 struct rss_vf_conf {
1594 	u32 rss_vf_vfl;
1595 	u32 rss_vf_vfh;
1596 };
1597 
1598 static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
1599 {
1600 	if (v == SEQ_START_TOKEN) {
1601 		seq_puts(seq, "     RSS                     Hash Tuple Enable\n");
1602 		seq_puts(seq, "     Enable   IVF  Dis  Enb  IPv6      IPv4      UDP    Def  Secret Key\n");
1603 		seq_puts(seq, " VF  Chn Prt  Map  VLAN  uP  Four Two  Four Two  Four   Que  Idx       Hash\n");
1604 	} else {
1605 		struct rss_vf_conf *vfconf = v;
1606 
1607 		seq_printf(seq, "%3d  %3s %3s  %3d   %3s %3s   %3s %3s   %3s  %3s   %3s  %4d  %3d %#10x\n",
1608 			   idx,
1609 			   yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
1610 			   yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
1611 			   VFLKPIDX_G(vfconf->rss_vf_vfh),
1612 			   yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
1613 			   yesno(vfconf->rss_vf_vfh & VFUPEN_F),
1614 			   yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1615 			   yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
1616 			   yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
1617 			   yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
1618 			   yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
1619 			   DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
1620 			   KEYINDEX_G(vfconf->rss_vf_vfh),
1621 			   vfconf->rss_vf_vfl);
1622 	}
1623 	return 0;
1624 }
1625 
1626 static int rss_vf_config_open(struct inode *inode, struct file *file)
1627 {
1628 	struct adapter *adapter = inode->i_private;
1629 	struct seq_tab *p;
1630 	struct rss_vf_conf *vfconf;
1631 	int vf;
1632 
1633 	p = seq_open_tab(file, 128, sizeof(*vfconf), 1, rss_vf_config_show);
1634 	if (!p)
1635 		return -ENOMEM;
1636 
1637 	vfconf = (struct rss_vf_conf *)p->data;
1638 	for (vf = 0; vf < 128; vf++) {
1639 		t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
1640 				      &vfconf[vf].rss_vf_vfh);
1641 	}
1642 	return 0;
1643 }
1644 
1645 static const struct file_operations rss_vf_config_debugfs_fops = {
1646 	.owner   = THIS_MODULE,
1647 	.open    = rss_vf_config_open,
1648 	.read    = seq_read,
1649 	.llseek  = seq_lseek,
1650 	.release = seq_release_private
1651 };
1652 
1653 /**
1654  * ethqset2pinfo - return port_info of an Ethernet Queue Set
1655  * @adap: the adapter
1656  * @qset: Ethernet Queue Set
1657  */
1658 static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
1659 {
1660 	int pidx;
1661 
1662 	for_each_port(adap, pidx) {
1663 		struct port_info *pi = adap2pinfo(adap, pidx);
1664 
1665 		if (qset >= pi->first_qset &&
1666 		    qset < pi->first_qset + pi->nqsets)
1667 			return pi;
1668 	}
1669 
1670 	/* should never happen! */
1671 	BUG_ON(1);
1672 	return NULL;
1673 }
1674 
1675 static int sge_qinfo_show(struct seq_file *seq, void *v)
1676 {
1677 	struct adapter *adap = seq->private;
1678 	int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
1679 	int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
1680 	int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
1681 	int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
1682 	int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
1683 	int i, r = (uintptr_t)v - 1;
1684 	int toe_idx = r - eth_entries;
1685 	int rdma_idx = toe_idx - toe_entries;
1686 	int ciq_idx = rdma_idx - rdma_entries;
1687 	int ctrl_idx =  ciq_idx - ciq_entries;
1688 	int fq_idx =  ctrl_idx - ctrl_entries;
1689 
1690 	if (r)
1691 		seq_putc(seq, '\n');
1692 
1693 #define S3(fmt_spec, s, v) \
1694 do { \
1695 	seq_printf(seq, "%-12s", s); \
1696 	for (i = 0; i < n; ++i) \
1697 		seq_printf(seq, " %16" fmt_spec, v); \
1698 		seq_putc(seq, '\n'); \
1699 } while (0)
1700 #define S(s, v) S3("s", s, v)
1701 #define T(s, v) S3("u", s, tx[i].v)
1702 #define R(s, v) S3("u", s, rx[i].v)
1703 
1704 	if (r < eth_entries) {
1705 		int base_qset = r * 4;
1706 		const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
1707 		const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
1708 		int n = min(4, adap->sge.ethqsets - 4 * r);
1709 
1710 		S("QType:", "Ethernet");
1711 		S("Interface:",
1712 		  rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1713 		T("TxQ ID:", q.cntxt_id);
1714 		T("TxQ size:", q.size);
1715 		T("TxQ inuse:", q.in_use);
1716 		T("TxQ CIDX:", q.cidx);
1717 		T("TxQ PIDX:", q.pidx);
1718 #ifdef CONFIG_CHELSIO_T4_DCB
1719 		T("DCB Prio:", dcb_prio);
1720 		S3("u", "DCB PGID:",
1721 		   (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
1722 		    4*(7-tx[i].dcb_prio)) & 0xf);
1723 		S3("u", "DCB PFC:",
1724 		   (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
1725 		    1*(7-tx[i].dcb_prio)) & 0x1);
1726 #endif
1727 		R("RspQ ID:", rspq.abs_id);
1728 		R("RspQ size:", rspq.size);
1729 		R("RspQE size:", rspq.iqe_len);
1730 		R("RspQ CIDX:", rspq.cidx);
1731 		R("RspQ Gen:", rspq.gen);
1732 		S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1733 		S3("u", "Intr pktcnt:",
1734 		   adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1735 		R("FL ID:", fl.cntxt_id);
1736 		R("FL size:", fl.size - 8);
1737 		R("FL pend:", fl.pend_cred);
1738 		R("FL avail:", fl.avail);
1739 		R("FL PIDX:", fl.pidx);
1740 		R("FL CIDX:", fl.cidx);
1741 	} else if (toe_idx < toe_entries) {
1742 		const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
1743 		const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
1744 		int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
1745 
1746 		S("QType:", "TOE");
1747 		T("TxQ ID:", q.cntxt_id);
1748 		T("TxQ size:", q.size);
1749 		T("TxQ inuse:", q.in_use);
1750 		T("TxQ CIDX:", q.cidx);
1751 		T("TxQ PIDX:", q.pidx);
1752 		R("RspQ ID:", rspq.abs_id);
1753 		R("RspQ size:", rspq.size);
1754 		R("RspQE size:", rspq.iqe_len);
1755 		R("RspQ CIDX:", rspq.cidx);
1756 		R("RspQ Gen:", rspq.gen);
1757 		S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1758 		S3("u", "Intr pktcnt:",
1759 		   adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1760 		R("FL ID:", fl.cntxt_id);
1761 		R("FL size:", fl.size - 8);
1762 		R("FL pend:", fl.pend_cred);
1763 		R("FL avail:", fl.avail);
1764 		R("FL PIDX:", fl.pidx);
1765 		R("FL CIDX:", fl.cidx);
1766 	} else if (rdma_idx < rdma_entries) {
1767 		const struct sge_ofld_rxq *rx =
1768 				&adap->sge.rdmarxq[rdma_idx * 4];
1769 		int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
1770 
1771 		S("QType:", "RDMA-CPL");
1772 		S("Interface:",
1773 		  rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1774 		R("RspQ ID:", rspq.abs_id);
1775 		R("RspQ size:", rspq.size);
1776 		R("RspQE size:", rspq.iqe_len);
1777 		R("RspQ CIDX:", rspq.cidx);
1778 		R("RspQ Gen:", rspq.gen);
1779 		S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1780 		S3("u", "Intr pktcnt:",
1781 		   adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1782 		R("FL ID:", fl.cntxt_id);
1783 		R("FL size:", fl.size - 8);
1784 		R("FL pend:", fl.pend_cred);
1785 		R("FL avail:", fl.avail);
1786 		R("FL PIDX:", fl.pidx);
1787 		R("FL CIDX:", fl.cidx);
1788 	} else if (ciq_idx < ciq_entries) {
1789 		const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
1790 		int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
1791 
1792 		S("QType:", "RDMA-CIQ");
1793 		S("Interface:",
1794 		  rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1795 		R("RspQ ID:", rspq.abs_id);
1796 		R("RspQ size:", rspq.size);
1797 		R("RspQE size:", rspq.iqe_len);
1798 		R("RspQ CIDX:", rspq.cidx);
1799 		R("RspQ Gen:", rspq.gen);
1800 		S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1801 		S3("u", "Intr pktcnt:",
1802 		   adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1803 	} else if (ctrl_idx < ctrl_entries) {
1804 		const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
1805 		int n = min(4, adap->params.nports - 4 * ctrl_idx);
1806 
1807 		S("QType:", "Control");
1808 		T("TxQ ID:", q.cntxt_id);
1809 		T("TxQ size:", q.size);
1810 		T("TxQ inuse:", q.in_use);
1811 		T("TxQ CIDX:", q.cidx);
1812 		T("TxQ PIDX:", q.pidx);
1813 	} else if (fq_idx == 0) {
1814 		const struct sge_rspq *evtq = &adap->sge.fw_evtq;
1815 
1816 		seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1817 		seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1818 		seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
1819 		seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
1820 		seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
1821 		seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1822 		seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1823 			   qtimer_val(adap, evtq));
1824 		seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1825 			   adap->sge.counter_val[evtq->pktcnt_idx]);
1826 	}
1827 #undef R
1828 #undef T
1829 #undef S
1830 #undef S3
1831 return 0;
1832 }
1833 
1834 static int sge_queue_entries(const struct adapter *adap)
1835 {
1836 	return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
1837 	       DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
1838 	       DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
1839 	       DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
1840 	       DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
1841 }
1842 
1843 static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1844 {
1845 	int entries = sge_queue_entries(seq->private);
1846 
1847 	return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1848 }
1849 
1850 static void sge_queue_stop(struct seq_file *seq, void *v)
1851 {
1852 }
1853 
1854 static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1855 {
1856 	int entries = sge_queue_entries(seq->private);
1857 
1858 	++*pos;
1859 	return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1860 }
1861 
1862 static const struct seq_operations sge_qinfo_seq_ops = {
1863 	.start = sge_queue_start,
1864 	.next  = sge_queue_next,
1865 	.stop  = sge_queue_stop,
1866 	.show  = sge_qinfo_show
1867 };
1868 
1869 static int sge_qinfo_open(struct inode *inode, struct file *file)
1870 {
1871 	int res = seq_open(file, &sge_qinfo_seq_ops);
1872 
1873 	if (!res) {
1874 		struct seq_file *seq = file->private_data;
1875 
1876 		seq->private = inode->i_private;
1877 	}
1878 	return res;
1879 }
1880 
1881 static const struct file_operations sge_qinfo_debugfs_fops = {
1882 	.owner   = THIS_MODULE,
1883 	.open    = sge_qinfo_open,
1884 	.read    = seq_read,
1885 	.llseek  = seq_lseek,
1886 	.release = seq_release,
1887 };
1888 
1889 int mem_open(struct inode *inode, struct file *file)
1890 {
1891 	unsigned int mem;
1892 	struct adapter *adap;
1893 
1894 	file->private_data = inode->i_private;
1895 
1896 	mem = (uintptr_t)file->private_data & 0x3;
1897 	adap = file->private_data - mem;
1898 
1899 	(void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
1900 
1901 	return 0;
1902 }
1903 
1904 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
1905 			loff_t *ppos)
1906 {
1907 	loff_t pos = *ppos;
1908 	loff_t avail = file_inode(file)->i_size;
1909 	unsigned int mem = (uintptr_t)file->private_data & 3;
1910 	struct adapter *adap = file->private_data - mem;
1911 	__be32 *data;
1912 	int ret;
1913 
1914 	if (pos < 0)
1915 		return -EINVAL;
1916 	if (pos >= avail)
1917 		return 0;
1918 	if (count > avail - pos)
1919 		count = avail - pos;
1920 
1921 	data = t4_alloc_mem(count);
1922 	if (!data)
1923 		return -ENOMEM;
1924 
1925 	spin_lock(&adap->win0_lock);
1926 	ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
1927 	spin_unlock(&adap->win0_lock);
1928 	if (ret) {
1929 		t4_free_mem(data);
1930 		return ret;
1931 	}
1932 	ret = copy_to_user(buf, data, count);
1933 
1934 	t4_free_mem(data);
1935 	if (ret)
1936 		return -EFAULT;
1937 
1938 	*ppos = pos + count;
1939 	return count;
1940 }
1941 static const struct file_operations mem_debugfs_fops = {
1942 	.owner   = THIS_MODULE,
1943 	.open    = simple_open,
1944 	.read    = mem_read,
1945 	.llseek  = default_llseek,
1946 };
1947 
1948 static void set_debugfs_file_size(struct dentry *de, loff_t size)
1949 {
1950 	if (!IS_ERR(de) && de->d_inode)
1951 		de->d_inode->i_size = size;
1952 }
1953 
1954 static void add_debugfs_mem(struct adapter *adap, const char *name,
1955 			    unsigned int idx, unsigned int size_mb)
1956 {
1957 	debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
1958 				 (void *)adap + idx, &mem_debugfs_fops,
1959 				 size_mb << 20);
1960 }
1961 
1962 /* Add an array of Debug FS files.
1963  */
1964 void add_debugfs_files(struct adapter *adap,
1965 		       struct t4_debugfs_entry *files,
1966 		       unsigned int nfiles)
1967 {
1968 	int i;
1969 
1970 	/* debugfs support is best effort */
1971 	for (i = 0; i < nfiles; i++)
1972 		debugfs_create_file(files[i].name, files[i].mode,
1973 				    adap->debugfs_root,
1974 				    (void *)adap + files[i].data,
1975 				    files[i].ops);
1976 }
1977 
1978 int t4_setup_debugfs(struct adapter *adap)
1979 {
1980 	int i;
1981 	u32 size;
1982 	struct dentry *de;
1983 
1984 	static struct t4_debugfs_entry t4_debugfs_files[] = {
1985 		{ "cim_la", &cim_la_fops, S_IRUSR, 0 },
1986 		{ "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
1987 		{ "clk", &clk_debugfs_fops, S_IRUSR, 0 },
1988 		{ "devlog", &devlog_fops, S_IRUSR, 0 },
1989 		{ "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
1990 		{ "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
1991 		{ "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
1992 		{ "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
1993 		{ "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
1994 		{ "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
1995 		{ "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
1996 		{ "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
1997 		{ "l2t", &t4_l2t_fops, S_IRUSR, 0},
1998 		{ "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
1999 		{ "rss", &rss_debugfs_fops, S_IRUSR, 0 },
2000 		{ "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
2001 		{ "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
2002 		{ "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
2003 		{ "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
2004 		{ "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
2005 		{ "ibq_tp0",  &cim_ibq_fops, S_IRUSR, 0 },
2006 		{ "ibq_tp1",  &cim_ibq_fops, S_IRUSR, 1 },
2007 		{ "ibq_ulp",  &cim_ibq_fops, S_IRUSR, 2 },
2008 		{ "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
2009 		{ "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
2010 		{ "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
2011 		{ "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
2012 		{ "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
2013 		{ "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
2014 		{ "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
2015 		{ "obq_sge",  &cim_obq_fops, S_IRUSR, 4 },
2016 		{ "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
2017 		{ "tp_la", &tp_la_fops, S_IRUSR, 0 },
2018 		{ "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
2019 		{ "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
2020 		{ "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
2021 		{ "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
2022 #if IS_ENABLED(CONFIG_IPV6)
2023 		{ "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
2024 #endif
2025 	};
2026 
2027 	/* Debug FS nodes common to all T5 and later adapters.
2028 	 */
2029 	static struct t4_debugfs_entry t5_debugfs_files[] = {
2030 		{ "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
2031 		{ "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
2032 	};
2033 
2034 	add_debugfs_files(adap,
2035 			  t4_debugfs_files,
2036 			  ARRAY_SIZE(t4_debugfs_files));
2037 	if (!is_t4(adap->params.chip))
2038 		add_debugfs_files(adap,
2039 				  t5_debugfs_files,
2040 				  ARRAY_SIZE(t5_debugfs_files));
2041 
2042 	i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
2043 	if (i & EDRAM0_ENABLE_F) {
2044 		size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
2045 		add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
2046 	}
2047 	if (i & EDRAM1_ENABLE_F) {
2048 		size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
2049 		add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
2050 	}
2051 	if (is_t4(adap->params.chip)) {
2052 		size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
2053 		if (i & EXT_MEM_ENABLE_F)
2054 			add_debugfs_mem(adap, "mc", MEM_MC,
2055 					EXT_MEM_SIZE_G(size));
2056 	} else {
2057 		if (i & EXT_MEM0_ENABLE_F) {
2058 			size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
2059 			add_debugfs_mem(adap, "mc0", MEM_MC0,
2060 					EXT_MEM0_SIZE_G(size));
2061 		}
2062 		if (i & EXT_MEM1_ENABLE_F) {
2063 			size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
2064 			add_debugfs_mem(adap, "mc1", MEM_MC1,
2065 					EXT_MEM1_SIZE_G(size));
2066 		}
2067 	}
2068 
2069 	de = debugfs_create_file("flash", S_IRUSR, adap->debugfs_root, adap,
2070 				 &flash_debugfs_fops);
2071 	set_debugfs_file_size(de, adap->params.sf_size);
2072 
2073 	return 0;
2074 }
2075