1f7917c00SJeff Kirsher /* 2f7917c00SJeff Kirsher * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved. 3f7917c00SJeff Kirsher * 4f7917c00SJeff Kirsher * This software is available to you under a choice of one of two 5f7917c00SJeff Kirsher * licenses. You may choose to be licensed under the terms of the GNU 6f7917c00SJeff Kirsher * General Public License (GPL) Version 2, available from the file 7f7917c00SJeff Kirsher * COPYING in the main directory of this source tree, or the 8f7917c00SJeff Kirsher * OpenIB.org BSD license below: 9f7917c00SJeff Kirsher * 10f7917c00SJeff Kirsher * Redistribution and use in source and binary forms, with or 11f7917c00SJeff Kirsher * without modification, are permitted provided that the following 12f7917c00SJeff Kirsher * conditions are met: 13f7917c00SJeff Kirsher * 14f7917c00SJeff Kirsher * - Redistributions of source code must retain the above 15f7917c00SJeff Kirsher * copyright notice, this list of conditions and the following 16f7917c00SJeff Kirsher * disclaimer. 17f7917c00SJeff Kirsher * 18f7917c00SJeff Kirsher * - Redistributions in binary form must reproduce the above 19f7917c00SJeff Kirsher * copyright notice, this list of conditions and the following 20f7917c00SJeff Kirsher * disclaimer in the documentation and/or other materials 21f7917c00SJeff Kirsher * provided with the distribution. 22f7917c00SJeff Kirsher * 23f7917c00SJeff Kirsher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24f7917c00SJeff Kirsher * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25f7917c00SJeff Kirsher * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26f7917c00SJeff Kirsher * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27f7917c00SJeff Kirsher * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28f7917c00SJeff Kirsher * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29f7917c00SJeff Kirsher * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30f7917c00SJeff Kirsher * SOFTWARE. 31f7917c00SJeff Kirsher */ 32f7917c00SJeff Kirsher 33f7917c00SJeff Kirsher /* This file should not be included directly. Include common.h instead. */ 34f7917c00SJeff Kirsher 35f7917c00SJeff Kirsher #ifndef __T3_ADAPTER_H__ 36f7917c00SJeff Kirsher #define __T3_ADAPTER_H__ 37f7917c00SJeff Kirsher 38f7917c00SJeff Kirsher #include <linux/pci.h> 39f7917c00SJeff Kirsher #include <linux/spinlock.h> 40f7917c00SJeff Kirsher #include <linux/interrupt.h> 41f7917c00SJeff Kirsher #include <linux/timer.h> 42f7917c00SJeff Kirsher #include <linux/cache.h> 43f7917c00SJeff Kirsher #include <linux/mutex.h> 44f7917c00SJeff Kirsher #include <linux/bitops.h> 45f7917c00SJeff Kirsher #include "t3cdev.h" 46f7917c00SJeff Kirsher #include <asm/io.h> 47f7917c00SJeff Kirsher 48f7917c00SJeff Kirsher struct adapter; 49f7917c00SJeff Kirsher struct sge_qset; 50f7917c00SJeff Kirsher struct port_info; 51f7917c00SJeff Kirsher 52f7917c00SJeff Kirsher enum mac_idx_types { 53f7917c00SJeff Kirsher LAN_MAC_IDX = 0, 54f7917c00SJeff Kirsher SAN_MAC_IDX, 55f7917c00SJeff Kirsher 56f7917c00SJeff Kirsher MAX_MAC_IDX 57f7917c00SJeff Kirsher }; 58f7917c00SJeff Kirsher 59f7917c00SJeff Kirsher struct iscsi_config { 60f7917c00SJeff Kirsher __u8 mac_addr[ETH_ALEN]; 61f7917c00SJeff Kirsher __u32 flags; 62f7917c00SJeff Kirsher int (*send)(struct port_info *pi, struct sk_buff **skb); 63f7917c00SJeff Kirsher int (*recv)(struct port_info *pi, struct sk_buff *skb); 64f7917c00SJeff Kirsher }; 65f7917c00SJeff Kirsher 66f7917c00SJeff Kirsher struct port_info { 67f7917c00SJeff Kirsher struct adapter *adapter; 68f7917c00SJeff Kirsher struct sge_qset *qs; 69f7917c00SJeff Kirsher u8 port_id; 70f7917c00SJeff Kirsher u8 nqsets; 71f7917c00SJeff Kirsher u8 first_qset; 72f7917c00SJeff Kirsher struct cphy phy; 73f7917c00SJeff Kirsher struct cmac mac; 74f7917c00SJeff Kirsher struct link_config link_config; 75f7917c00SJeff Kirsher int activity; 76f7917c00SJeff Kirsher __be32 iscsi_ipv4addr; 77f7917c00SJeff Kirsher struct iscsi_config iscsic; 78f7917c00SJeff Kirsher 79f7917c00SJeff Kirsher int link_fault; /* link fault was detected */ 80f7917c00SJeff Kirsher }; 81f7917c00SJeff Kirsher 82f7917c00SJeff Kirsher enum { /* adapter flags */ 83f7917c00SJeff Kirsher FULL_INIT_DONE = (1 << 0), 84f7917c00SJeff Kirsher USING_MSI = (1 << 1), 85f7917c00SJeff Kirsher USING_MSIX = (1 << 2), 86f7917c00SJeff Kirsher QUEUES_BOUND = (1 << 3), 87f7917c00SJeff Kirsher TP_PARITY_INIT = (1 << 4), 88f7917c00SJeff Kirsher NAPI_INIT = (1 << 5), 89f7917c00SJeff Kirsher }; 90f7917c00SJeff Kirsher 91f7917c00SJeff Kirsher struct fl_pg_chunk { 92f7917c00SJeff Kirsher struct page *page; 93f7917c00SJeff Kirsher void *va; 94f7917c00SJeff Kirsher unsigned int offset; 95f7917c00SJeff Kirsher unsigned long *p_cnt; 96f7917c00SJeff Kirsher dma_addr_t mapping; 97f7917c00SJeff Kirsher }; 98f7917c00SJeff Kirsher 99f7917c00SJeff Kirsher struct rx_desc; 100f7917c00SJeff Kirsher struct rx_sw_desc; 101f7917c00SJeff Kirsher 102f7917c00SJeff Kirsher struct sge_fl { /* SGE per free-buffer list state */ 103f7917c00SJeff Kirsher unsigned int buf_size; /* size of each Rx buffer */ 104f7917c00SJeff Kirsher unsigned int credits; /* # of available Rx buffers */ 105f7917c00SJeff Kirsher unsigned int pend_cred; /* new buffers since last FL DB ring */ 106f7917c00SJeff Kirsher unsigned int size; /* capacity of free list */ 107f7917c00SJeff Kirsher unsigned int cidx; /* consumer index */ 108f7917c00SJeff Kirsher unsigned int pidx; /* producer index */ 109f7917c00SJeff Kirsher unsigned int gen; /* free list generation */ 110f7917c00SJeff Kirsher struct fl_pg_chunk pg_chunk;/* page chunk cache */ 111f7917c00SJeff Kirsher unsigned int use_pages; /* whether FL uses pages or sk_buffs */ 112f7917c00SJeff Kirsher unsigned int order; /* order of page allocations */ 113f7917c00SJeff Kirsher unsigned int alloc_size; /* size of allocated buffer */ 114f7917c00SJeff Kirsher struct rx_desc *desc; /* address of HW Rx descriptor ring */ 115f7917c00SJeff Kirsher struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */ 116f7917c00SJeff Kirsher dma_addr_t phys_addr; /* physical address of HW ring start */ 117f7917c00SJeff Kirsher unsigned int cntxt_id; /* SGE context id for the free list */ 118f7917c00SJeff Kirsher unsigned long empty; /* # of times queue ran out of buffers */ 119f7917c00SJeff Kirsher unsigned long alloc_failed; /* # of times buffer allocation failed */ 120f7917c00SJeff Kirsher }; 121f7917c00SJeff Kirsher 122f7917c00SJeff Kirsher /* 123f7917c00SJeff Kirsher * Bundle size for grouping offload RX packets for delivery to the stack. 124f7917c00SJeff Kirsher * Don't make this too big as we do prefetch on each packet in a bundle. 125f7917c00SJeff Kirsher */ 126f7917c00SJeff Kirsher # define RX_BUNDLE_SIZE 8 127f7917c00SJeff Kirsher 128f7917c00SJeff Kirsher struct rsp_desc; 129f7917c00SJeff Kirsher 130f7917c00SJeff Kirsher struct sge_rspq { /* state for an SGE response queue */ 131f7917c00SJeff Kirsher unsigned int credits; /* # of pending response credits */ 132f7917c00SJeff Kirsher unsigned int size; /* capacity of response queue */ 133f7917c00SJeff Kirsher unsigned int cidx; /* consumer index */ 134f7917c00SJeff Kirsher unsigned int gen; /* current generation bit */ 135f7917c00SJeff Kirsher unsigned int polling; /* is the queue serviced through NAPI? */ 136f7917c00SJeff Kirsher unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */ 137f7917c00SJeff Kirsher unsigned int next_holdoff; /* holdoff time for next interrupt */ 138f7917c00SJeff Kirsher unsigned int rx_recycle_buf; /* whether recycling occurred 139f7917c00SJeff Kirsher within current sop-eop */ 140f7917c00SJeff Kirsher struct rsp_desc *desc; /* address of HW response ring */ 141f7917c00SJeff Kirsher dma_addr_t phys_addr; /* physical address of the ring */ 142f7917c00SJeff Kirsher unsigned int cntxt_id; /* SGE context id for the response q */ 143f7917c00SJeff Kirsher spinlock_t lock; /* guards response processing */ 144f7917c00SJeff Kirsher struct sk_buff_head rx_queue; /* offload packet receive queue */ 145f7917c00SJeff Kirsher struct sk_buff *pg_skb; /* used to build frag list in napi handler */ 146f7917c00SJeff Kirsher 147f7917c00SJeff Kirsher unsigned long offload_pkts; 148f7917c00SJeff Kirsher unsigned long offload_bundles; 149f7917c00SJeff Kirsher unsigned long eth_pkts; /* # of ethernet packets */ 150f7917c00SJeff Kirsher unsigned long pure_rsps; /* # of pure (non-data) responses */ 151f7917c00SJeff Kirsher unsigned long imm_data; /* responses with immediate data */ 152f7917c00SJeff Kirsher unsigned long rx_drops; /* # of packets dropped due to no mem */ 153f7917c00SJeff Kirsher unsigned long async_notif; /* # of asynchronous notification events */ 154f7917c00SJeff Kirsher unsigned long empty; /* # of times queue ran out of credits */ 155f7917c00SJeff Kirsher unsigned long nomem; /* # of responses deferred due to no mem */ 156f7917c00SJeff Kirsher unsigned long unhandled_irqs; /* # of spurious intrs */ 157f7917c00SJeff Kirsher unsigned long starved; 158f7917c00SJeff Kirsher unsigned long restarted; 159f7917c00SJeff Kirsher }; 160f7917c00SJeff Kirsher 161f7917c00SJeff Kirsher struct tx_desc; 162f7917c00SJeff Kirsher struct tx_sw_desc; 163f7917c00SJeff Kirsher 164f7917c00SJeff Kirsher struct sge_txq { /* state for an SGE Tx queue */ 165f7917c00SJeff Kirsher unsigned long flags; /* HW DMA fetch status */ 166f7917c00SJeff Kirsher unsigned int in_use; /* # of in-use Tx descriptors */ 167f7917c00SJeff Kirsher unsigned int size; /* # of descriptors */ 168f7917c00SJeff Kirsher unsigned int processed; /* total # of descs HW has processed */ 169f7917c00SJeff Kirsher unsigned int cleaned; /* total # of descs SW has reclaimed */ 170f7917c00SJeff Kirsher unsigned int stop_thres; /* SW TX queue suspend threshold */ 171f7917c00SJeff Kirsher unsigned int cidx; /* consumer index */ 172f7917c00SJeff Kirsher unsigned int pidx; /* producer index */ 173f7917c00SJeff Kirsher unsigned int gen; /* current value of generation bit */ 174f7917c00SJeff Kirsher unsigned int unacked; /* Tx descriptors used since last COMPL */ 175f7917c00SJeff Kirsher struct tx_desc *desc; /* address of HW Tx descriptor ring */ 176f7917c00SJeff Kirsher struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */ 177f7917c00SJeff Kirsher spinlock_t lock; /* guards enqueueing of new packets */ 178f7917c00SJeff Kirsher unsigned int token; /* WR token */ 179f7917c00SJeff Kirsher dma_addr_t phys_addr; /* physical address of the ring */ 180f7917c00SJeff Kirsher struct sk_buff_head sendq; /* List of backpressured offload packets */ 181f7917c00SJeff Kirsher struct tasklet_struct qresume_tsk; /* restarts the queue */ 182f7917c00SJeff Kirsher unsigned int cntxt_id; /* SGE context id for the Tx q */ 183f7917c00SJeff Kirsher unsigned long stops; /* # of times q has been stopped */ 184f7917c00SJeff Kirsher unsigned long restarts; /* # of queue restarts */ 185f7917c00SJeff Kirsher }; 186f7917c00SJeff Kirsher 187f7917c00SJeff Kirsher enum { /* per port SGE statistics */ 188f7917c00SJeff Kirsher SGE_PSTAT_TSO, /* # of TSO requests */ 189f7917c00SJeff Kirsher SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */ 190f7917c00SJeff Kirsher SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */ 191f7917c00SJeff Kirsher SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */ 192f7917c00SJeff Kirsher SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */ 193f7917c00SJeff Kirsher 194f7917c00SJeff Kirsher SGE_PSTAT_MAX /* must be last */ 195f7917c00SJeff Kirsher }; 196f7917c00SJeff Kirsher 197f7917c00SJeff Kirsher struct napi_gro_fraginfo; 198f7917c00SJeff Kirsher 199f7917c00SJeff Kirsher struct sge_qset { /* an SGE queue set */ 200f7917c00SJeff Kirsher struct adapter *adap; 201f7917c00SJeff Kirsher struct napi_struct napi; 202f7917c00SJeff Kirsher struct sge_rspq rspq; 203f7917c00SJeff Kirsher struct sge_fl fl[SGE_RXQ_PER_SET]; 204f7917c00SJeff Kirsher struct sge_txq txq[SGE_TXQ_PER_SET]; 205f7917c00SJeff Kirsher int nomem; 206f7917c00SJeff Kirsher void *lro_va; 207f7917c00SJeff Kirsher struct net_device *netdev; 208f7917c00SJeff Kirsher struct netdev_queue *tx_q; /* associated netdev TX queue */ 209f7917c00SJeff Kirsher unsigned long txq_stopped; /* which Tx queues are stopped */ 210f7917c00SJeff Kirsher struct timer_list tx_reclaim_timer; /* reclaims TX buffers */ 211f7917c00SJeff Kirsher struct timer_list rx_reclaim_timer; /* reclaims RX buffers */ 212f7917c00SJeff Kirsher unsigned long port_stats[SGE_PSTAT_MAX]; 213f7917c00SJeff Kirsher } ____cacheline_aligned; 214f7917c00SJeff Kirsher 215f7917c00SJeff Kirsher struct sge { 216f7917c00SJeff Kirsher struct sge_qset qs[SGE_QSETS]; 217f7917c00SJeff Kirsher spinlock_t reg_lock; /* guards non-atomic SGE registers (eg context) */ 218f7917c00SJeff Kirsher }; 219f7917c00SJeff Kirsher 220f7917c00SJeff Kirsher struct adapter { 221f7917c00SJeff Kirsher struct t3cdev tdev; 222f7917c00SJeff Kirsher struct list_head adapter_list; 223f7917c00SJeff Kirsher void __iomem *regs; 224f7917c00SJeff Kirsher struct pci_dev *pdev; 225f7917c00SJeff Kirsher unsigned long registered_device_map; 226f7917c00SJeff Kirsher unsigned long open_device_map; 227f7917c00SJeff Kirsher unsigned long flags; 228f7917c00SJeff Kirsher 229f7917c00SJeff Kirsher const char *name; 230f7917c00SJeff Kirsher int msg_enable; 231f7917c00SJeff Kirsher unsigned int mmio_len; 232f7917c00SJeff Kirsher 233f7917c00SJeff Kirsher struct adapter_params params; 234f7917c00SJeff Kirsher unsigned int slow_intr_mask; 235f7917c00SJeff Kirsher unsigned long irq_stats[IRQ_NUM_STATS]; 236f7917c00SJeff Kirsher 237f7917c00SJeff Kirsher int msix_nvectors; 238f7917c00SJeff Kirsher struct { 239f7917c00SJeff Kirsher unsigned short vec; 240f7917c00SJeff Kirsher char desc[22]; 241f7917c00SJeff Kirsher } msix_info[SGE_QSETS + 1]; 242f7917c00SJeff Kirsher 243f7917c00SJeff Kirsher /* T3 modules */ 244f7917c00SJeff Kirsher struct sge sge; 245f7917c00SJeff Kirsher struct mc7 pmrx; 246f7917c00SJeff Kirsher struct mc7 pmtx; 247f7917c00SJeff Kirsher struct mc7 cm; 248f7917c00SJeff Kirsher struct mc5 mc5; 249f7917c00SJeff Kirsher 250f7917c00SJeff Kirsher struct net_device *port[MAX_NPORTS]; 251f7917c00SJeff Kirsher unsigned int check_task_cnt; 252f7917c00SJeff Kirsher struct delayed_work adap_check_task; 253f7917c00SJeff Kirsher struct work_struct ext_intr_handler_task; 254f7917c00SJeff Kirsher struct work_struct fatal_error_handler_task; 255f7917c00SJeff Kirsher struct work_struct link_fault_handler_task; 256f7917c00SJeff Kirsher 257f7917c00SJeff Kirsher struct work_struct db_full_task; 258f7917c00SJeff Kirsher struct work_struct db_empty_task; 259f7917c00SJeff Kirsher struct work_struct db_drop_task; 260f7917c00SJeff Kirsher 261f7917c00SJeff Kirsher struct dentry *debugfs_root; 262f7917c00SJeff Kirsher 263f7917c00SJeff Kirsher struct mutex mdio_lock; 264f7917c00SJeff Kirsher spinlock_t stats_lock; 265f7917c00SJeff Kirsher spinlock_t work_lock; 266f7917c00SJeff Kirsher 267f7917c00SJeff Kirsher struct sk_buff *nofail_skb; 268f7917c00SJeff Kirsher }; 269f7917c00SJeff Kirsher 270f7917c00SJeff Kirsher static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr) 271f7917c00SJeff Kirsher { 272f7917c00SJeff Kirsher u32 val = readl(adapter->regs + reg_addr); 273f7917c00SJeff Kirsher 274f7917c00SJeff Kirsher CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val); 275f7917c00SJeff Kirsher return val; 276f7917c00SJeff Kirsher } 277f7917c00SJeff Kirsher 278f7917c00SJeff Kirsher static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val) 279f7917c00SJeff Kirsher { 280f7917c00SJeff Kirsher CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val); 281f7917c00SJeff Kirsher writel(val, adapter->regs + reg_addr); 282f7917c00SJeff Kirsher } 283f7917c00SJeff Kirsher 284f7917c00SJeff Kirsher static inline struct port_info *adap2pinfo(struct adapter *adap, int idx) 285f7917c00SJeff Kirsher { 286f7917c00SJeff Kirsher return netdev_priv(adap->port[idx]); 287f7917c00SJeff Kirsher } 288f7917c00SJeff Kirsher 289f7917c00SJeff Kirsher static inline int phy2portid(struct cphy *phy) 290f7917c00SJeff Kirsher { 291f7917c00SJeff Kirsher struct adapter *adap = phy->adapter; 292f7917c00SJeff Kirsher struct port_info *port0 = adap2pinfo(adap, 0); 293f7917c00SJeff Kirsher 294f7917c00SJeff Kirsher return &port0->phy == phy ? 0 : 1; 295f7917c00SJeff Kirsher } 296f7917c00SJeff Kirsher 297f7917c00SJeff Kirsher #define OFFLOAD_DEVMAP_BIT 15 298f7917c00SJeff Kirsher 299f7917c00SJeff Kirsher #define tdev2adap(d) container_of(d, struct adapter, tdev) 300f7917c00SJeff Kirsher 301f7917c00SJeff Kirsher static inline int offload_running(struct adapter *adapter) 302f7917c00SJeff Kirsher { 303f7917c00SJeff Kirsher return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map); 304f7917c00SJeff Kirsher } 305f7917c00SJeff Kirsher 306f7917c00SJeff Kirsher int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb); 307f7917c00SJeff Kirsher 308f7917c00SJeff Kirsher void t3_os_ext_intr_handler(struct adapter *adapter); 309f7917c00SJeff Kirsher void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status, 310f7917c00SJeff Kirsher int speed, int duplex, int fc); 311f7917c00SJeff Kirsher void t3_os_phymod_changed(struct adapter *adap, int port_id); 312f7917c00SJeff Kirsher void t3_os_link_fault(struct adapter *adapter, int port_id, int state); 313f7917c00SJeff Kirsher void t3_os_link_fault_handler(struct adapter *adapter, int port_id); 314f7917c00SJeff Kirsher 315f7917c00SJeff Kirsher void t3_sge_start(struct adapter *adap); 316a17409e7SThomas Gleixner void t3_sge_stop_dma(struct adapter *adap); 317f7917c00SJeff Kirsher void t3_sge_stop(struct adapter *adap); 318f7917c00SJeff Kirsher void t3_start_sge_timers(struct adapter *adap); 319f7917c00SJeff Kirsher void t3_stop_sge_timers(struct adapter *adap); 320f7917c00SJeff Kirsher void t3_free_sge_resources(struct adapter *adap); 321f7917c00SJeff Kirsher void t3_sge_err_intr_handler(struct adapter *adapter); 322f7917c00SJeff Kirsher irq_handler_t t3_intr_handler(struct adapter *adap, int polling); 323f7917c00SJeff Kirsher netdev_tx_t t3_eth_xmit(struct sk_buff *skb, struct net_device *dev); 324f7917c00SJeff Kirsher int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb); 325f7917c00SJeff Kirsher void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p); 326f7917c00SJeff Kirsher int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports, 327f7917c00SJeff Kirsher int irq_vec_idx, const struct qset_params *p, 328f7917c00SJeff Kirsher int ntxq, struct net_device *dev, 329f7917c00SJeff Kirsher struct netdev_queue *netdevq); 330f7917c00SJeff Kirsher extern struct workqueue_struct *cxgb3_wq; 331f7917c00SJeff Kirsher 332f7917c00SJeff Kirsher int t3_get_edc_fw(struct cphy *phy, int edc_idx, int size); 333f7917c00SJeff Kirsher 334f7917c00SJeff Kirsher #endif /* __T3_ADAPTER_H__ */ 335