14863dea3SSunil Goutham /* 24863dea3SSunil Goutham * Copyright (C) 2015 Cavium, Inc. 34863dea3SSunil Goutham * 44863dea3SSunil Goutham * This program is free software; you can redistribute it and/or modify it 54863dea3SSunil Goutham * under the terms of version 2 of the GNU General Public License 64863dea3SSunil Goutham * as published by the Free Software Foundation. 74863dea3SSunil Goutham */ 84863dea3SSunil Goutham 946b903a0SDavid Daney #include <linux/acpi.h> 104863dea3SSunil Goutham #include <linux/module.h> 114863dea3SSunil Goutham #include <linux/interrupt.h> 124863dea3SSunil Goutham #include <linux/pci.h> 134863dea3SSunil Goutham #include <linux/netdevice.h> 144863dea3SSunil Goutham #include <linux/etherdevice.h> 154863dea3SSunil Goutham #include <linux/phy.h> 164863dea3SSunil Goutham #include <linux/of.h> 174863dea3SSunil Goutham #include <linux/of_mdio.h> 184863dea3SSunil Goutham #include <linux/of_net.h> 194863dea3SSunil Goutham 204863dea3SSunil Goutham #include "nic_reg.h" 214863dea3SSunil Goutham #include "nic.h" 224863dea3SSunil Goutham #include "thunder_bgx.h" 234863dea3SSunil Goutham 244863dea3SSunil Goutham #define DRV_NAME "thunder-BGX" 254863dea3SSunil Goutham #define DRV_VERSION "1.0" 264863dea3SSunil Goutham 274863dea3SSunil Goutham struct lmac { 284863dea3SSunil Goutham struct bgx *bgx; 294863dea3SSunil Goutham int dmac; 3046b903a0SDavid Daney u8 mac[ETH_ALEN]; 310bcb7d51SSunil Goutham u8 lmac_type; 320bcb7d51SSunil Goutham u8 lane_to_sds; 330bcb7d51SSunil Goutham bool use_training; 344863dea3SSunil Goutham bool link_up; 354863dea3SSunil Goutham int lmacid; /* ID within BGX */ 364863dea3SSunil Goutham int lmacid_bd; /* ID on board */ 374863dea3SSunil Goutham struct net_device netdev; 384863dea3SSunil Goutham struct phy_device *phydev; 394863dea3SSunil Goutham unsigned int last_duplex; 404863dea3SSunil Goutham unsigned int last_link; 414863dea3SSunil Goutham unsigned int last_speed; 424863dea3SSunil Goutham bool is_sgmii; 434863dea3SSunil Goutham struct delayed_work dwork; 444863dea3SSunil Goutham struct workqueue_struct *check_link; 450c886a1dSAleksey Makarov }; 464863dea3SSunil Goutham 474863dea3SSunil Goutham struct bgx { 484863dea3SSunil Goutham u8 bgx_id; 494863dea3SSunil Goutham struct lmac lmac[MAX_LMAC_PER_BGX]; 507aa48655SVadim Lomovtsev u8 lmac_count; 516465859aSSunil Goutham u8 max_lmac; 527aa48655SVadim Lomovtsev u8 acpi_lmac_idx; 534863dea3SSunil Goutham void __iomem *reg_base; 544863dea3SSunil Goutham struct pci_dev *pdev; 5509de3917SSunil Goutham bool is_dlm; 566465859aSSunil Goutham bool is_rgx; 570c886a1dSAleksey Makarov }; 584863dea3SSunil Goutham 59fd7ec062SAleksey Makarov static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; 604863dea3SSunil Goutham static int lmac_count; /* Total no of LMACs in system */ 614863dea3SSunil Goutham 624863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac); 634863dea3SSunil Goutham 644863dea3SSunil Goutham /* Supported devices */ 654863dea3SSunil Goutham static const struct pci_device_id bgx_id_table[] = { 664863dea3SSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_BGX) }, 676465859aSSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_RGX) }, 684863dea3SSunil Goutham { 0, } /* end of table */ 694863dea3SSunil Goutham }; 704863dea3SSunil Goutham 714863dea3SSunil Goutham MODULE_AUTHOR("Cavium Inc"); 724863dea3SSunil Goutham MODULE_DESCRIPTION("Cavium Thunder BGX/MAC Driver"); 734863dea3SSunil Goutham MODULE_LICENSE("GPL v2"); 744863dea3SSunil Goutham MODULE_VERSION(DRV_VERSION); 754863dea3SSunil Goutham MODULE_DEVICE_TABLE(pci, bgx_id_table); 764863dea3SSunil Goutham 774863dea3SSunil Goutham /* The Cavium ThunderX network controller can *only* be found in SoCs 784863dea3SSunil Goutham * containing the ThunderX ARM64 CPU implementation. All accesses to the device 794863dea3SSunil Goutham * registers on this platform are implicitly strongly ordered with respect 804863dea3SSunil Goutham * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 814863dea3SSunil Goutham * with no memory barriers in this driver. The readq()/writeq() functions add 824863dea3SSunil Goutham * explicit ordering operation which in this case are redundant, and only 834863dea3SSunil Goutham * add overhead. 844863dea3SSunil Goutham */ 854863dea3SSunil Goutham 864863dea3SSunil Goutham /* Register read/write APIs */ 874863dea3SSunil Goutham static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset) 884863dea3SSunil Goutham { 894863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 904863dea3SSunil Goutham 914863dea3SSunil Goutham return readq_relaxed(addr); 924863dea3SSunil Goutham } 934863dea3SSunil Goutham 944863dea3SSunil Goutham static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 954863dea3SSunil Goutham { 964863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 974863dea3SSunil Goutham 984863dea3SSunil Goutham writeq_relaxed(val, addr); 994863dea3SSunil Goutham } 1004863dea3SSunil Goutham 1014863dea3SSunil Goutham static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 1024863dea3SSunil Goutham { 1034863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 1044863dea3SSunil Goutham 1054863dea3SSunil Goutham writeq_relaxed(val | readq_relaxed(addr), addr); 1064863dea3SSunil Goutham } 1074863dea3SSunil Goutham 1084863dea3SSunil Goutham static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) 1094863dea3SSunil Goutham { 1104863dea3SSunil Goutham int timeout = 100; 1114863dea3SSunil Goutham u64 reg_val; 1124863dea3SSunil Goutham 1134863dea3SSunil Goutham while (timeout) { 1144863dea3SSunil Goutham reg_val = bgx_reg_read(bgx, lmac, reg); 1154863dea3SSunil Goutham if (zero && !(reg_val & mask)) 1164863dea3SSunil Goutham return 0; 1174863dea3SSunil Goutham if (!zero && (reg_val & mask)) 1184863dea3SSunil Goutham return 0; 1194863dea3SSunil Goutham usleep_range(1000, 2000); 1204863dea3SSunil Goutham timeout--; 1214863dea3SSunil Goutham } 1224863dea3SSunil Goutham return 1; 1234863dea3SSunil Goutham } 1244863dea3SSunil Goutham 1254863dea3SSunil Goutham /* Return number of BGX present in HW */ 1264863dea3SSunil Goutham unsigned bgx_get_map(int node) 1274863dea3SSunil Goutham { 1284863dea3SSunil Goutham int i; 1294863dea3SSunil Goutham unsigned map = 0; 1304863dea3SSunil Goutham 13109de3917SSunil Goutham for (i = 0; i < MAX_BGX_PER_NODE; i++) { 13209de3917SSunil Goutham if (bgx_vnic[(node * MAX_BGX_PER_NODE) + i]) 1334863dea3SSunil Goutham map |= (1 << i); 1344863dea3SSunil Goutham } 1354863dea3SSunil Goutham 1364863dea3SSunil Goutham return map; 1374863dea3SSunil Goutham } 1384863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_map); 1394863dea3SSunil Goutham 1404863dea3SSunil Goutham /* Return number of LMAC configured for this BGX */ 1414863dea3SSunil Goutham int bgx_get_lmac_count(int node, int bgx_idx) 1424863dea3SSunil Goutham { 1434863dea3SSunil Goutham struct bgx *bgx; 1444863dea3SSunil Goutham 14509de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1464863dea3SSunil Goutham if (bgx) 1474863dea3SSunil Goutham return bgx->lmac_count; 1484863dea3SSunil Goutham 1494863dea3SSunil Goutham return 0; 1504863dea3SSunil Goutham } 1514863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_count); 1524863dea3SSunil Goutham 1534863dea3SSunil Goutham /* Returns the current link status of LMAC */ 1544863dea3SSunil Goutham void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status) 1554863dea3SSunil Goutham { 1564863dea3SSunil Goutham struct bgx_link_status *link = (struct bgx_link_status *)status; 1574863dea3SSunil Goutham struct bgx *bgx; 1584863dea3SSunil Goutham struct lmac *lmac; 1594863dea3SSunil Goutham 16009de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1614863dea3SSunil Goutham if (!bgx) 1624863dea3SSunil Goutham return; 1634863dea3SSunil Goutham 1644863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 1651cc70259SThanneeru Srinivasulu link->mac_type = lmac->lmac_type; 1664863dea3SSunil Goutham link->link_up = lmac->link_up; 1674863dea3SSunil Goutham link->duplex = lmac->last_duplex; 1684863dea3SSunil Goutham link->speed = lmac->last_speed; 1694863dea3SSunil Goutham } 1704863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_link_state); 1714863dea3SSunil Goutham 172e610cb32SAleksey Makarov const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid) 1734863dea3SSunil Goutham { 17409de3917SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1754863dea3SSunil Goutham 1764863dea3SSunil Goutham if (bgx) 1774863dea3SSunil Goutham return bgx->lmac[lmacid].mac; 1784863dea3SSunil Goutham 1794863dea3SSunil Goutham return NULL; 1804863dea3SSunil Goutham } 1814863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_mac); 1824863dea3SSunil Goutham 183e610cb32SAleksey Makarov void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac) 1844863dea3SSunil Goutham { 18509de3917SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1864863dea3SSunil Goutham 1874863dea3SSunil Goutham if (!bgx) 1884863dea3SSunil Goutham return; 1894863dea3SSunil Goutham 1904863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmacid].mac, mac); 1914863dea3SSunil Goutham } 1924863dea3SSunil Goutham EXPORT_SYMBOL(bgx_set_lmac_mac); 1934863dea3SSunil Goutham 194bc69fdfcSSunil Goutham void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable) 195bc69fdfcSSunil Goutham { 19609de3917SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1976465859aSSunil Goutham struct lmac *lmac; 198bc69fdfcSSunil Goutham u64 cfg; 199bc69fdfcSSunil Goutham 200bc69fdfcSSunil Goutham if (!bgx) 201bc69fdfcSSunil Goutham return; 2026465859aSSunil Goutham lmac = &bgx->lmac[lmacid]; 203bc69fdfcSSunil Goutham 204bc69fdfcSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 205bc69fdfcSSunil Goutham if (enable) 206bc69fdfcSSunil Goutham cfg |= CMR_PKT_RX_EN | CMR_PKT_TX_EN; 207bc69fdfcSSunil Goutham else 208bc69fdfcSSunil Goutham cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN); 209bc69fdfcSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 2106465859aSSunil Goutham 2116465859aSSunil Goutham if (bgx->is_rgx) 2126465859aSSunil Goutham xcv_setup_link(enable ? lmac->link_up : 0, lmac->last_speed); 213bc69fdfcSSunil Goutham } 214bc69fdfcSSunil Goutham EXPORT_SYMBOL(bgx_lmac_rx_tx_enable); 215bc69fdfcSSunil Goutham 216430da208SSunil Goutham void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause) 217430da208SSunil Goutham { 218430da208SSunil Goutham struct pfc *pfc = (struct pfc *)pause; 219430da208SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 220430da208SSunil Goutham struct lmac *lmac; 221430da208SSunil Goutham u64 cfg; 222430da208SSunil Goutham 223430da208SSunil Goutham if (!bgx) 224430da208SSunil Goutham return; 225430da208SSunil Goutham lmac = &bgx->lmac[lmacid]; 226430da208SSunil Goutham if (lmac->is_sgmii) 227430da208SSunil Goutham return; 228430da208SSunil Goutham 229430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_CBFC_CTL); 230430da208SSunil Goutham pfc->fc_rx = cfg & RX_EN; 231430da208SSunil Goutham pfc->fc_tx = cfg & TX_EN; 232430da208SSunil Goutham pfc->autoneg = 0; 233430da208SSunil Goutham } 234430da208SSunil Goutham EXPORT_SYMBOL(bgx_lmac_get_pfc); 235430da208SSunil Goutham 236430da208SSunil Goutham void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause) 237430da208SSunil Goutham { 238430da208SSunil Goutham struct pfc *pfc = (struct pfc *)pause; 239430da208SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 240430da208SSunil Goutham struct lmac *lmac; 241430da208SSunil Goutham u64 cfg; 242430da208SSunil Goutham 243430da208SSunil Goutham if (!bgx) 244430da208SSunil Goutham return; 245430da208SSunil Goutham lmac = &bgx->lmac[lmacid]; 246430da208SSunil Goutham if (lmac->is_sgmii) 247430da208SSunil Goutham return; 248430da208SSunil Goutham 249430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_CBFC_CTL); 250430da208SSunil Goutham cfg &= ~(RX_EN | TX_EN); 251430da208SSunil Goutham cfg |= (pfc->fc_rx ? RX_EN : 0x00); 252430da208SSunil Goutham cfg |= (pfc->fc_tx ? TX_EN : 0x00); 253430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_CBFC_CTL, cfg); 254430da208SSunil Goutham } 255430da208SSunil Goutham EXPORT_SYMBOL(bgx_lmac_set_pfc); 256430da208SSunil Goutham 2574863dea3SSunil Goutham static void bgx_sgmii_change_link_state(struct lmac *lmac) 2584863dea3SSunil Goutham { 2594863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 2604863dea3SSunil Goutham u64 cmr_cfg; 2614863dea3SSunil Goutham u64 port_cfg = 0; 2624863dea3SSunil Goutham u64 misc_ctl = 0; 2634863dea3SSunil Goutham 2644863dea3SSunil Goutham cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG); 2654863dea3SSunil Goutham cmr_cfg &= ~CMR_EN; 2664863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2674863dea3SSunil Goutham 2684863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2694863dea3SSunil Goutham misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL); 2704863dea3SSunil Goutham 2714863dea3SSunil Goutham if (lmac->link_up) { 2724863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_GMX_ENO; 2734863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_DUPLEX; 2744863dea3SSunil Goutham port_cfg |= (lmac->last_duplex << 2); 2754863dea3SSunil Goutham } else { 2764863dea3SSunil Goutham misc_ctl |= PCS_MISC_CTL_GMX_ENO; 2774863dea3SSunil Goutham } 2784863dea3SSunil Goutham 2794863dea3SSunil Goutham switch (lmac->last_speed) { 2804863dea3SSunil Goutham case 10: 2814863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2824863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED_MSB; /* speed_msb 1 */ 2834863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2844863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2854863dea3SSunil Goutham misc_ctl |= 50; /* samp_pt */ 2864863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2874863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2884863dea3SSunil Goutham break; 2894863dea3SSunil Goutham case 100: 2904863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2914863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2924863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2934863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2944863dea3SSunil Goutham misc_ctl |= 5; /* samp_pt */ 2954863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2964863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2974863dea3SSunil Goutham break; 2984863dea3SSunil Goutham case 1000: 2994863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED; /* speed 1 */ 3004863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 3014863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SLOT_TIME; /* slottime 1 */ 3024863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 3034863dea3SSunil Goutham misc_ctl |= 1; /* samp_pt */ 3044863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512); 3054863dea3SSunil Goutham if (lmac->last_duplex) 3064863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 3074863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 0); 3084863dea3SSunil Goutham else 3094863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 3104863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 8192); 3114863dea3SSunil Goutham break; 3124863dea3SSunil Goutham default: 3134863dea3SSunil Goutham break; 3144863dea3SSunil Goutham } 3154863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl); 3164863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg); 3174863dea3SSunil Goutham 3184863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 3194863dea3SSunil Goutham 3206465859aSSunil Goutham /* Re-enable lmac */ 3214863dea3SSunil Goutham cmr_cfg |= CMR_EN; 3224863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 3236465859aSSunil Goutham 3246465859aSSunil Goutham if (bgx->is_rgx && (cmr_cfg & (CMR_PKT_RX_EN | CMR_PKT_TX_EN))) 3256465859aSSunil Goutham xcv_setup_link(lmac->link_up, lmac->last_speed); 3264863dea3SSunil Goutham } 3274863dea3SSunil Goutham 328fd7ec062SAleksey Makarov static void bgx_lmac_handler(struct net_device *netdev) 3294863dea3SSunil Goutham { 3304863dea3SSunil Goutham struct lmac *lmac = container_of(netdev, struct lmac, netdev); 331099a728dSxypron.glpk@gmx.de struct phy_device *phydev; 3324863dea3SSunil Goutham int link_changed = 0; 3334863dea3SSunil Goutham 3344863dea3SSunil Goutham if (!lmac) 3354863dea3SSunil Goutham return; 3364863dea3SSunil Goutham 337099a728dSxypron.glpk@gmx.de phydev = lmac->phydev; 338099a728dSxypron.glpk@gmx.de 3394863dea3SSunil Goutham if (!phydev->link && lmac->last_link) 3404863dea3SSunil Goutham link_changed = -1; 3414863dea3SSunil Goutham 3424863dea3SSunil Goutham if (phydev->link && 3434863dea3SSunil Goutham (lmac->last_duplex != phydev->duplex || 3444863dea3SSunil Goutham lmac->last_link != phydev->link || 3454863dea3SSunil Goutham lmac->last_speed != phydev->speed)) { 3464863dea3SSunil Goutham link_changed = 1; 3474863dea3SSunil Goutham } 3484863dea3SSunil Goutham 3494863dea3SSunil Goutham lmac->last_link = phydev->link; 3504863dea3SSunil Goutham lmac->last_speed = phydev->speed; 3514863dea3SSunil Goutham lmac->last_duplex = phydev->duplex; 3524863dea3SSunil Goutham 3534863dea3SSunil Goutham if (!link_changed) 3544863dea3SSunil Goutham return; 3554863dea3SSunil Goutham 3564863dea3SSunil Goutham if (link_changed > 0) 3574863dea3SSunil Goutham lmac->link_up = true; 3584863dea3SSunil Goutham else 3594863dea3SSunil Goutham lmac->link_up = false; 3604863dea3SSunil Goutham 3614863dea3SSunil Goutham if (lmac->is_sgmii) 3624863dea3SSunil Goutham bgx_sgmii_change_link_state(lmac); 3634863dea3SSunil Goutham else 3644863dea3SSunil Goutham bgx_xaui_check_link(lmac); 3654863dea3SSunil Goutham } 3664863dea3SSunil Goutham 3674863dea3SSunil Goutham u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx) 3684863dea3SSunil Goutham { 3694863dea3SSunil Goutham struct bgx *bgx; 3704863dea3SSunil Goutham 37109de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 3724863dea3SSunil Goutham if (!bgx) 3734863dea3SSunil Goutham return 0; 3744863dea3SSunil Goutham 3754863dea3SSunil Goutham if (idx > 8) 3764863dea3SSunil Goutham lmac = 0; 3774863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8)); 3784863dea3SSunil Goutham } 3794863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_rx_stats); 3804863dea3SSunil Goutham 3814863dea3SSunil Goutham u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx) 3824863dea3SSunil Goutham { 3834863dea3SSunil Goutham struct bgx *bgx; 3844863dea3SSunil Goutham 38509de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 3864863dea3SSunil Goutham if (!bgx) 3874863dea3SSunil Goutham return 0; 3884863dea3SSunil Goutham 3894863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8)); 3904863dea3SSunil Goutham } 3914863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_tx_stats); 3924863dea3SSunil Goutham 3934863dea3SSunil Goutham static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac) 3944863dea3SSunil Goutham { 3954863dea3SSunil Goutham u64 offset; 3964863dea3SSunil Goutham 3974863dea3SSunil Goutham while (bgx->lmac[lmac].dmac > 0) { 3984863dea3SSunil Goutham offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) + 3994863dea3SSunil Goutham (lmac * MAX_DMAC_PER_LMAC * sizeof(u64)); 4004863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0); 4014863dea3SSunil Goutham bgx->lmac[lmac].dmac--; 4024863dea3SSunil Goutham } 4034863dea3SSunil Goutham } 4044863dea3SSunil Goutham 405d77a2384SSunil Goutham /* Configure BGX LMAC in internal loopback mode */ 406d77a2384SSunil Goutham void bgx_lmac_internal_loopback(int node, int bgx_idx, 407d77a2384SSunil Goutham int lmac_idx, bool enable) 408d77a2384SSunil Goutham { 409d77a2384SSunil Goutham struct bgx *bgx; 410d77a2384SSunil Goutham struct lmac *lmac; 411d77a2384SSunil Goutham u64 cfg; 412d77a2384SSunil Goutham 41309de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 414d77a2384SSunil Goutham if (!bgx) 415d77a2384SSunil Goutham return; 416d77a2384SSunil Goutham 417d77a2384SSunil Goutham lmac = &bgx->lmac[lmac_idx]; 418d77a2384SSunil Goutham if (lmac->is_sgmii) { 419d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL); 420d77a2384SSunil Goutham if (enable) 421d77a2384SSunil Goutham cfg |= PCS_MRX_CTL_LOOPBACK1; 422d77a2384SSunil Goutham else 423d77a2384SSunil Goutham cfg &= ~PCS_MRX_CTL_LOOPBACK1; 424d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg); 425d77a2384SSunil Goutham } else { 426d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1); 427d77a2384SSunil Goutham if (enable) 428d77a2384SSunil Goutham cfg |= SPU_CTL_LOOPBACK; 429d77a2384SSunil Goutham else 430d77a2384SSunil Goutham cfg &= ~SPU_CTL_LOOPBACK; 431d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg); 432d77a2384SSunil Goutham } 433d77a2384SSunil Goutham } 434d77a2384SSunil Goutham EXPORT_SYMBOL(bgx_lmac_internal_loopback); 435d77a2384SSunil Goutham 4363f8057cfSSunil Goutham static int bgx_lmac_sgmii_init(struct bgx *bgx, struct lmac *lmac) 4374863dea3SSunil Goutham { 4383f8057cfSSunil Goutham int lmacid = lmac->lmacid; 4394863dea3SSunil Goutham u64 cfg; 4404863dea3SSunil Goutham 4414863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); 4424863dea3SSunil Goutham /* max packet size */ 4434863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE); 4444863dea3SSunil Goutham 4454863dea3SSunil Goutham /* Disable frame alignment if using preamble */ 4464863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 4474863dea3SSunil Goutham if (cfg & 1) 4484863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0); 4494863dea3SSunil Goutham 4504863dea3SSunil Goutham /* Enable lmac */ 4514863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 4524863dea3SSunil Goutham 4534863dea3SSunil Goutham /* PCS reset */ 4544863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET); 4554863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, 4564863dea3SSunil Goutham PCS_MRX_CTL_RESET, true)) { 4574863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n"); 4584863dea3SSunil Goutham return -1; 4594863dea3SSunil Goutham } 4604863dea3SSunil Goutham 4614863dea3SSunil Goutham /* power down, reset autoneg, autoneg enable */ 4624863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL); 4634863dea3SSunil Goutham cfg &= ~PCS_MRX_CTL_PWR_DN; 4644863dea3SSunil Goutham cfg |= (PCS_MRX_CTL_RST_AN | PCS_MRX_CTL_AN_EN); 4654863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); 4664863dea3SSunil Goutham 4673f8057cfSSunil Goutham if (lmac->lmac_type == BGX_MODE_QSGMII) { 4683f8057cfSSunil Goutham /* Disable disparity check for QSGMII */ 4693f8057cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL); 4703f8057cfSSunil Goutham cfg &= ~PCS_MISC_CTL_DISP_EN; 4713f8057cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL, cfg); 4723f8057cfSSunil Goutham return 0; 4733f8057cfSSunil Goutham } 4743f8057cfSSunil Goutham 4756465859aSSunil Goutham if (lmac->lmac_type == BGX_MODE_SGMII) { 4764863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS, 4774863dea3SSunil Goutham PCS_MRX_STATUS_AN_CPT, false)) { 4784863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n"); 4794863dea3SSunil Goutham return -1; 4804863dea3SSunil Goutham } 4816465859aSSunil Goutham } 4824863dea3SSunil Goutham 4834863dea3SSunil Goutham return 0; 4844863dea3SSunil Goutham } 4854863dea3SSunil Goutham 4860bcb7d51SSunil Goutham static int bgx_lmac_xaui_init(struct bgx *bgx, struct lmac *lmac) 4874863dea3SSunil Goutham { 4884863dea3SSunil Goutham u64 cfg; 4890bcb7d51SSunil Goutham int lmacid = lmac->lmacid; 4904863dea3SSunil Goutham 4914863dea3SSunil Goutham /* Reset SPU */ 4924863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET); 4934863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 4944863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 4954863dea3SSunil Goutham return -1; 4964863dea3SSunil Goutham } 4974863dea3SSunil Goutham 4984863dea3SSunil Goutham /* Disable LMAC */ 4994863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 5004863dea3SSunil Goutham cfg &= ~CMR_EN; 5014863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 5024863dea3SSunil Goutham 5034863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 5044863dea3SSunil Goutham /* Set interleaved running disparity for RXAUI */ 50593db2cf8SSunil Goutham if (lmac->lmac_type == BGX_MODE_RXAUI) 5064863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, 50793db2cf8SSunil Goutham SPU_MISC_CTL_INTLV_RDISP); 50893db2cf8SSunil Goutham 50993db2cf8SSunil Goutham /* Clear receive packet disable */ 51093db2cf8SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); 51193db2cf8SSunil Goutham cfg &= ~SPU_MISC_CTL_RX_DIS; 51293db2cf8SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); 5134863dea3SSunil Goutham 5144863dea3SSunil Goutham /* clear all interrupts */ 5154863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT); 5164863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg); 5174863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT); 5184863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg); 5194863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5204863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5214863dea3SSunil Goutham 5220bcb7d51SSunil Goutham if (lmac->use_training) { 5234863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00); 5244863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00); 5254863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00); 5264863dea3SSunil Goutham /* training enable */ 5274863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 5284863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, SPU_PMD_CRTL_TRAIN_EN); 5294863dea3SSunil Goutham } 5304863dea3SSunil Goutham 5314863dea3SSunil Goutham /* Append FCS to each packet */ 5324863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D); 5334863dea3SSunil Goutham 5344863dea3SSunil Goutham /* Disable forward error correction */ 5354863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL); 5364863dea3SSunil Goutham cfg &= ~SPU_FEC_CTL_FEC_EN; 5374863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg); 5384863dea3SSunil Goutham 5394863dea3SSunil Goutham /* Disable autoneg */ 5404863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL); 5414863dea3SSunil Goutham cfg = cfg & ~(SPU_AN_CTL_AN_EN | SPU_AN_CTL_XNP_EN); 5424863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg); 5434863dea3SSunil Goutham 5444863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV); 5450bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_10G_KR) 5464863dea3SSunil Goutham cfg |= (1 << 23); 5470bcb7d51SSunil Goutham else if (lmac->lmac_type == BGX_MODE_40G_KR) 5484863dea3SSunil Goutham cfg |= (1 << 24); 5494863dea3SSunil Goutham else 5504863dea3SSunil Goutham cfg &= ~((1 << 23) | (1 << 24)); 5514863dea3SSunil Goutham cfg = cfg & (~((1ULL << 25) | (1ULL << 22) | (1ULL << 12))); 5524863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg); 5534863dea3SSunil Goutham 5544863dea3SSunil Goutham cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL); 5554863dea3SSunil Goutham cfg &= ~SPU_DBG_CTL_AN_ARB_LINK_CHK_EN; 5564863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg); 5574863dea3SSunil Goutham 5584863dea3SSunil Goutham /* Enable lmac */ 5594863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 5604863dea3SSunil Goutham 5614863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1); 5624863dea3SSunil Goutham cfg &= ~SPU_CTL_LOW_POWER; 5634863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg); 5644863dea3SSunil Goutham 5654863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL); 5664863dea3SSunil Goutham cfg &= ~SMU_TX_CTL_UNI_EN; 5674863dea3SSunil Goutham cfg |= SMU_TX_CTL_DIC_EN; 5684863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg); 5694863dea3SSunil Goutham 570430da208SSunil Goutham /* Enable receive and transmission of pause frames */ 571430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_CBFC_CTL, ((0xffffULL << 32) | 572430da208SSunil Goutham BCK_EN | DRP_EN | TX_EN | RX_EN)); 573430da208SSunil Goutham /* Configure pause time and interval */ 574430da208SSunil Goutham bgx_reg_write(bgx, lmacid, 575430da208SSunil Goutham BGX_SMUX_TX_PAUSE_PKT_TIME, DEFAULT_PAUSE_TIME); 576430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_PAUSE_PKT_INTERVAL); 577430da208SSunil Goutham cfg &= ~0xFFFFull; 578430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_PAUSE_PKT_INTERVAL, 579430da208SSunil Goutham cfg | (DEFAULT_PAUSE_TIME - 0x1000)); 580430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_PAUSE_ZERO, 0x01); 581430da208SSunil Goutham 5824863dea3SSunil Goutham /* take lmac_count into account */ 5834863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1)); 5844863dea3SSunil Goutham /* max packet size */ 5854863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); 5864863dea3SSunil Goutham 5874863dea3SSunil Goutham return 0; 5884863dea3SSunil Goutham } 5894863dea3SSunil Goutham 5904863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac) 5914863dea3SSunil Goutham { 5924863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 5934863dea3SSunil Goutham int lmacid = lmac->lmacid; 5940bcb7d51SSunil Goutham int lmac_type = lmac->lmac_type; 5954863dea3SSunil Goutham u64 cfg; 5964863dea3SSunil Goutham 5970bcb7d51SSunil Goutham if (lmac->use_training) { 5984863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5994863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 6004863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 6014863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 6024863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL); 6034863dea3SSunil Goutham cfg |= (1ull << 0); 6044863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg); 6054863dea3SSunil Goutham return -1; 6064863dea3SSunil Goutham } 6074863dea3SSunil Goutham } 6084863dea3SSunil Goutham 6094863dea3SSunil Goutham /* wait for PCS to come out of reset */ 6104863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 6114863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 6124863dea3SSunil Goutham return -1; 6134863dea3SSunil Goutham } 6144863dea3SSunil Goutham 6154863dea3SSunil Goutham if ((lmac_type == BGX_MODE_10G_KR) || (lmac_type == BGX_MODE_XFI) || 6164863dea3SSunil Goutham (lmac_type == BGX_MODE_40G_KR) || (lmac_type == BGX_MODE_XLAUI)) { 6174863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1, 6184863dea3SSunil Goutham SPU_BR_STATUS_BLK_LOCK, false)) { 6194863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 6204863dea3SSunil Goutham "SPU_BR_STATUS_BLK_LOCK not completed\n"); 6214863dea3SSunil Goutham return -1; 6224863dea3SSunil Goutham } 6234863dea3SSunil Goutham } else { 6244863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS, 6254863dea3SSunil Goutham SPU_BX_STATUS_RX_ALIGN, false)) { 6264863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 6274863dea3SSunil Goutham "SPU_BX_STATUS_RX_ALIGN not completed\n"); 6284863dea3SSunil Goutham return -1; 6294863dea3SSunil Goutham } 6304863dea3SSunil Goutham } 6314863dea3SSunil Goutham 6324863dea3SSunil Goutham /* Clear rcvflt bit (latching high) and read it back */ 6333f4c68cfSSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) 6343f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 6353f4c68cfSSunil Goutham BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 6364863dea3SSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 6374863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); 6380bcb7d51SSunil Goutham if (lmac->use_training) { 6394863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 6404863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 6414863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 6424863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 6434863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, 6444863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL); 6454863dea3SSunil Goutham cfg |= (1ull << 0); 6464863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, 6474863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, cfg); 6484863dea3SSunil Goutham return -1; 6494863dea3SSunil Goutham } 6504863dea3SSunil Goutham } 6514863dea3SSunil Goutham return -1; 6524863dea3SSunil Goutham } 6534863dea3SSunil Goutham 6544863dea3SSunil Goutham /* Wait for BGX RX to be idle */ 6554863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { 6564863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); 6574863dea3SSunil Goutham return -1; 6584863dea3SSunil Goutham } 6594863dea3SSunil Goutham 6604863dea3SSunil Goutham /* Wait for BGX TX to be idle */ 6614863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) { 6624863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU TX not idle\n"); 6634863dea3SSunil Goutham return -1; 6644863dea3SSunil Goutham } 6654863dea3SSunil Goutham 6663f4c68cfSSunil Goutham /* Check for MAC RX faults */ 6673f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL); 6683f4c68cfSSunil Goutham /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */ 6693f4c68cfSSunil Goutham cfg &= SMU_RX_CTL_STATUS; 6703f4c68cfSSunil Goutham if (!cfg) 6714863dea3SSunil Goutham return 0; 6723f4c68cfSSunil Goutham 6733f4c68cfSSunil Goutham /* Rx local/remote fault seen. 6743f4c68cfSSunil Goutham * Do lmac reinit to see if condition recovers 6753f4c68cfSSunil Goutham */ 6760bcb7d51SSunil Goutham bgx_lmac_xaui_init(bgx, lmac); 6773f4c68cfSSunil Goutham 6783f4c68cfSSunil Goutham return -1; 6794863dea3SSunil Goutham } 6804863dea3SSunil Goutham 6814863dea3SSunil Goutham static void bgx_poll_for_link(struct work_struct *work) 6824863dea3SSunil Goutham { 6834863dea3SSunil Goutham struct lmac *lmac; 6843f4c68cfSSunil Goutham u64 spu_link, smu_link; 6854863dea3SSunil Goutham 6864863dea3SSunil Goutham lmac = container_of(work, struct lmac, dwork.work); 6874863dea3SSunil Goutham 6884863dea3SSunil Goutham /* Receive link is latching low. Force it high and verify it */ 6894863dea3SSunil Goutham bgx_reg_modify(lmac->bgx, lmac->lmacid, 6904863dea3SSunil Goutham BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); 6914863dea3SSunil Goutham bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, 6924863dea3SSunil Goutham SPU_STATUS1_RCV_LNK, false); 6934863dea3SSunil Goutham 6943f4c68cfSSunil Goutham spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 6953f4c68cfSSunil Goutham smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); 6963f4c68cfSSunil Goutham 6973f4c68cfSSunil Goutham if ((spu_link & SPU_STATUS1_RCV_LNK) && 6983f4c68cfSSunil Goutham !(smu_link & SMU_RX_CTL_STATUS)) { 6994863dea3SSunil Goutham lmac->link_up = 1; 7000bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_XLAUI) 7014863dea3SSunil Goutham lmac->last_speed = 40000; 7024863dea3SSunil Goutham else 7034863dea3SSunil Goutham lmac->last_speed = 10000; 7044863dea3SSunil Goutham lmac->last_duplex = 1; 7054863dea3SSunil Goutham } else { 7064863dea3SSunil Goutham lmac->link_up = 0; 7070b72a9a1SSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 7080b72a9a1SSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 7094863dea3SSunil Goutham } 7104863dea3SSunil Goutham 7114863dea3SSunil Goutham if (lmac->last_link != lmac->link_up) { 7123f4c68cfSSunil Goutham if (lmac->link_up) { 7133f4c68cfSSunil Goutham if (bgx_xaui_check_link(lmac)) { 7143f4c68cfSSunil Goutham /* Errors, clear link_up state */ 7153f4c68cfSSunil Goutham lmac->link_up = 0; 7163f4c68cfSSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 7173f4c68cfSSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 7183f4c68cfSSunil Goutham } 7193f4c68cfSSunil Goutham } 7204863dea3SSunil Goutham lmac->last_link = lmac->link_up; 7214863dea3SSunil Goutham } 7224863dea3SSunil Goutham 7234863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); 7244863dea3SSunil Goutham } 7254863dea3SSunil Goutham 7263f8057cfSSunil Goutham static int phy_interface_mode(u8 lmac_type) 7273f8057cfSSunil Goutham { 7283f8057cfSSunil Goutham if (lmac_type == BGX_MODE_QSGMII) 7293f8057cfSSunil Goutham return PHY_INTERFACE_MODE_QSGMII; 7306465859aSSunil Goutham if (lmac_type == BGX_MODE_RGMII) 7316465859aSSunil Goutham return PHY_INTERFACE_MODE_RGMII; 7323f8057cfSSunil Goutham 7333f8057cfSSunil Goutham return PHY_INTERFACE_MODE_SGMII; 7343f8057cfSSunil Goutham } 7353f8057cfSSunil Goutham 7364863dea3SSunil Goutham static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid) 7374863dea3SSunil Goutham { 7384863dea3SSunil Goutham struct lmac *lmac; 7394863dea3SSunil Goutham u64 cfg; 7404863dea3SSunil Goutham 7414863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 7424863dea3SSunil Goutham lmac->bgx = bgx; 7434863dea3SSunil Goutham 7443f8057cfSSunil Goutham if ((lmac->lmac_type == BGX_MODE_SGMII) || 7456465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_QSGMII) || 7466465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_RGMII)) { 7474863dea3SSunil Goutham lmac->is_sgmii = 1; 7483f8057cfSSunil Goutham if (bgx_lmac_sgmii_init(bgx, lmac)) 7494863dea3SSunil Goutham return -1; 7504863dea3SSunil Goutham } else { 7514863dea3SSunil Goutham lmac->is_sgmii = 0; 7520bcb7d51SSunil Goutham if (bgx_lmac_xaui_init(bgx, lmac)) 7534863dea3SSunil Goutham return -1; 7544863dea3SSunil Goutham } 7554863dea3SSunil Goutham 7564863dea3SSunil Goutham if (lmac->is_sgmii) { 7574863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 7584863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 7594863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg); 7604863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1); 7614863dea3SSunil Goutham } else { 7624863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND); 7634863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 7644863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg); 7654863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4); 7664863dea3SSunil Goutham } 7674863dea3SSunil Goutham 7684863dea3SSunil Goutham /* Enable lmac */ 769bc69fdfcSSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 7704863dea3SSunil Goutham 7714863dea3SSunil Goutham /* Restore default cfg, incase low level firmware changed it */ 7724863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03); 7734863dea3SSunil Goutham 7740bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 7750bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 7760bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 7770bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR)) { 7784863dea3SSunil Goutham if (!lmac->phydev) 7794863dea3SSunil Goutham return -ENODEV; 7804863dea3SSunil Goutham 7814863dea3SSunil Goutham lmac->phydev->dev_flags = 0; 7824863dea3SSunil Goutham 7834863dea3SSunil Goutham if (phy_connect_direct(&lmac->netdev, lmac->phydev, 7844863dea3SSunil Goutham bgx_lmac_handler, 7853f8057cfSSunil Goutham phy_interface_mode(lmac->lmac_type))) 7864863dea3SSunil Goutham return -ENODEV; 7874863dea3SSunil Goutham 7884863dea3SSunil Goutham phy_start_aneg(lmac->phydev); 7894863dea3SSunil Goutham } else { 7904863dea3SSunil Goutham lmac->check_link = alloc_workqueue("check_link", WQ_UNBOUND | 7914863dea3SSunil Goutham WQ_MEM_RECLAIM, 1); 7924863dea3SSunil Goutham if (!lmac->check_link) 7934863dea3SSunil Goutham return -ENOMEM; 7944863dea3SSunil Goutham INIT_DELAYED_WORK(&lmac->dwork, bgx_poll_for_link); 7954863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, 0); 7964863dea3SSunil Goutham } 7974863dea3SSunil Goutham 7984863dea3SSunil Goutham return 0; 7994863dea3SSunil Goutham } 8004863dea3SSunil Goutham 801fd7ec062SAleksey Makarov static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) 8024863dea3SSunil Goutham { 8034863dea3SSunil Goutham struct lmac *lmac; 8043f4c68cfSSunil Goutham u64 cfg; 8054863dea3SSunil Goutham 8064863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 8074863dea3SSunil Goutham if (lmac->check_link) { 8084863dea3SSunil Goutham /* Destroy work queue */ 809a7b1f535SThanneeru Srinivasulu cancel_delayed_work_sync(&lmac->dwork); 8104863dea3SSunil Goutham destroy_workqueue(lmac->check_link); 8114863dea3SSunil Goutham } 8124863dea3SSunil Goutham 8133f4c68cfSSunil Goutham /* Disable packet reception */ 8143f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 8153f4c68cfSSunil Goutham cfg &= ~CMR_PKT_RX_EN; 8163f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 8173f4c68cfSSunil Goutham 8183f4c68cfSSunil Goutham /* Give chance for Rx/Tx FIFO to get drained */ 8193f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true); 8203f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true); 8213f4c68cfSSunil Goutham 8223f4c68cfSSunil Goutham /* Disable packet transmission */ 8233f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 8243f4c68cfSSunil Goutham cfg &= ~CMR_PKT_TX_EN; 8253f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 8263f4c68cfSSunil Goutham 8273f4c68cfSSunil Goutham /* Disable serdes lanes */ 8283f4c68cfSSunil Goutham if (!lmac->is_sgmii) 8293f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 8303f4c68cfSSunil Goutham BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 8313f4c68cfSSunil Goutham else 8323f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 8333f4c68cfSSunil Goutham BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN); 8343f4c68cfSSunil Goutham 8353f4c68cfSSunil Goutham /* Disable LMAC */ 8363f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 8373f4c68cfSSunil Goutham cfg &= ~CMR_EN; 8383f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 8393f4c68cfSSunil Goutham 8404863dea3SSunil Goutham bgx_flush_dmac_addrs(bgx, lmacid); 8414863dea3SSunil Goutham 8420bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 8430bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 8440bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 8450bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) 8464863dea3SSunil Goutham phy_disconnect(lmac->phydev); 8474863dea3SSunil Goutham 8484863dea3SSunil Goutham lmac->phydev = NULL; 8494863dea3SSunil Goutham } 8504863dea3SSunil Goutham 8514863dea3SSunil Goutham static void bgx_init_hw(struct bgx *bgx) 8524863dea3SSunil Goutham { 8534863dea3SSunil Goutham int i; 8540bcb7d51SSunil Goutham struct lmac *lmac; 8554863dea3SSunil Goutham 8564863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP); 8574863dea3SSunil Goutham if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS)) 8584863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id); 8594863dea3SSunil Goutham 8604863dea3SSunil Goutham /* Set lmac type and lane2serdes mapping */ 8614863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) { 8620bcb7d51SSunil Goutham lmac = &bgx->lmac[i]; 8634863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG, 8640bcb7d51SSunil Goutham (lmac->lmac_type << 8) | lmac->lane_to_sds); 8654863dea3SSunil Goutham bgx->lmac[i].lmacid_bd = lmac_count; 8664863dea3SSunil Goutham lmac_count++; 8674863dea3SSunil Goutham } 8684863dea3SSunil Goutham 8694863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count); 8704863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count); 8714863dea3SSunil Goutham 8724863dea3SSunil Goutham /* Set the backpressure AND mask */ 8734863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) 8744863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND, 8754863dea3SSunil Goutham ((1ULL << MAX_BGX_CHANS_PER_LMAC) - 1) << 8764863dea3SSunil Goutham (i * MAX_BGX_CHANS_PER_LMAC)); 8774863dea3SSunil Goutham 8784863dea3SSunil Goutham /* Disable all MAC filtering */ 8794863dea3SSunil Goutham for (i = 0; i < RX_DMAC_COUNT; i++) 8804863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00); 8814863dea3SSunil Goutham 8824863dea3SSunil Goutham /* Disable MAC steering (NCSI traffic) */ 8834863dea3SSunil Goutham for (i = 0; i < RX_TRAFFIC_STEER_RULE_COUNT; i++) 8844863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00); 8854863dea3SSunil Goutham } 8864863dea3SSunil Goutham 8873f8057cfSSunil Goutham static u8 bgx_get_lane2sds_cfg(struct bgx *bgx, struct lmac *lmac) 8883f8057cfSSunil Goutham { 8893f8057cfSSunil Goutham return (u8)(bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG) & 0xFF); 8903f8057cfSSunil Goutham } 8913f8057cfSSunil Goutham 8920bcb7d51SSunil Goutham static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid) 8934863dea3SSunil Goutham { 8944863dea3SSunil Goutham struct device *dev = &bgx->pdev->dev; 8950bcb7d51SSunil Goutham struct lmac *lmac; 8960bcb7d51SSunil Goutham char str[20]; 89757aaf63cSSunil Goutham u8 dlm; 89857aaf63cSSunil Goutham 8996465859aSSunil Goutham if (lmacid > bgx->max_lmac) 90057aaf63cSSunil Goutham return; 9010bcb7d51SSunil Goutham 9020bcb7d51SSunil Goutham lmac = &bgx->lmac[lmacid]; 90357aaf63cSSunil Goutham dlm = (lmacid / 2) + (bgx->bgx_id * 2); 90409de3917SSunil Goutham if (!bgx->is_dlm) 9050bcb7d51SSunil Goutham sprintf(str, "BGX%d QLM mode", bgx->bgx_id); 90657aaf63cSSunil Goutham else 90757aaf63cSSunil Goutham sprintf(str, "BGX%d DLM%d mode", bgx->bgx_id, dlm); 9080bcb7d51SSunil Goutham 9090bcb7d51SSunil Goutham switch (lmac->lmac_type) { 9100bcb7d51SSunil Goutham case BGX_MODE_SGMII: 9110bcb7d51SSunil Goutham dev_info(dev, "%s: SGMII\n", (char *)str); 9120bcb7d51SSunil Goutham break; 9130bcb7d51SSunil Goutham case BGX_MODE_XAUI: 9140bcb7d51SSunil Goutham dev_info(dev, "%s: XAUI\n", (char *)str); 9150bcb7d51SSunil Goutham break; 9160bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 9170bcb7d51SSunil Goutham dev_info(dev, "%s: RXAUI\n", (char *)str); 9180bcb7d51SSunil Goutham break; 9190bcb7d51SSunil Goutham case BGX_MODE_XFI: 9200bcb7d51SSunil Goutham if (!lmac->use_training) 9210bcb7d51SSunil Goutham dev_info(dev, "%s: XFI\n", (char *)str); 9220bcb7d51SSunil Goutham else 9230bcb7d51SSunil Goutham dev_info(dev, "%s: 10G_KR\n", (char *)str); 9240bcb7d51SSunil Goutham break; 9250bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 9260bcb7d51SSunil Goutham if (!lmac->use_training) 9270bcb7d51SSunil Goutham dev_info(dev, "%s: XLAUI\n", (char *)str); 9280bcb7d51SSunil Goutham else 9290bcb7d51SSunil Goutham dev_info(dev, "%s: 40G_KR4\n", (char *)str); 9300bcb7d51SSunil Goutham break; 9313f8057cfSSunil Goutham case BGX_MODE_QSGMII: 9323f8057cfSSunil Goutham if ((lmacid == 0) && 9333f8057cfSSunil Goutham (bgx_get_lane2sds_cfg(bgx, lmac) != lmacid)) 9343f8057cfSSunil Goutham return; 9353f8057cfSSunil Goutham if ((lmacid == 2) && 9363f8057cfSSunil Goutham (bgx_get_lane2sds_cfg(bgx, lmac) == lmacid)) 9373f8057cfSSunil Goutham return; 9383f8057cfSSunil Goutham dev_info(dev, "%s: QSGMII\n", (char *)str); 9393f8057cfSSunil Goutham break; 9406465859aSSunil Goutham case BGX_MODE_RGMII: 9416465859aSSunil Goutham dev_info(dev, "%s: RGMII\n", (char *)str); 9426465859aSSunil Goutham break; 9433f8057cfSSunil Goutham case BGX_MODE_INVALID: 9443f8057cfSSunil Goutham /* Nothing to do */ 9453f8057cfSSunil Goutham break; 9460bcb7d51SSunil Goutham } 9470bcb7d51SSunil Goutham } 9480bcb7d51SSunil Goutham 9493f8057cfSSunil Goutham static void lmac_set_lane2sds(struct bgx *bgx, struct lmac *lmac) 9500bcb7d51SSunil Goutham { 9510bcb7d51SSunil Goutham switch (lmac->lmac_type) { 9520bcb7d51SSunil Goutham case BGX_MODE_SGMII: 9530bcb7d51SSunil Goutham case BGX_MODE_XFI: 9540bcb7d51SSunil Goutham lmac->lane_to_sds = lmac->lmacid; 9550bcb7d51SSunil Goutham break; 9560bcb7d51SSunil Goutham case BGX_MODE_XAUI: 9570bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 9586465859aSSunil Goutham case BGX_MODE_RGMII: 9590bcb7d51SSunil Goutham lmac->lane_to_sds = 0xE4; 9600bcb7d51SSunil Goutham break; 9610bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 9620bcb7d51SSunil Goutham lmac->lane_to_sds = (lmac->lmacid) ? 0xE : 0x4; 9630bcb7d51SSunil Goutham break; 9643f8057cfSSunil Goutham case BGX_MODE_QSGMII: 9653f8057cfSSunil Goutham /* There is no way to determine if DLM0/2 is QSGMII or 9663f8057cfSSunil Goutham * DLM1/3 is configured to QSGMII as bootloader will 9673f8057cfSSunil Goutham * configure all LMACs, so take whatever is configured 9683f8057cfSSunil Goutham * by low level firmware. 9693f8057cfSSunil Goutham */ 9703f8057cfSSunil Goutham lmac->lane_to_sds = bgx_get_lane2sds_cfg(bgx, lmac); 9713f8057cfSSunil Goutham break; 9720bcb7d51SSunil Goutham default: 9730bcb7d51SSunil Goutham lmac->lane_to_sds = 0; 9740bcb7d51SSunil Goutham break; 9750bcb7d51SSunil Goutham } 9760bcb7d51SSunil Goutham } 9770bcb7d51SSunil Goutham 9786465859aSSunil Goutham static void lmac_set_training(struct bgx *bgx, struct lmac *lmac, int lmacid) 9796465859aSSunil Goutham { 9806465859aSSunil Goutham if ((lmac->lmac_type != BGX_MODE_10G_KR) && 9816465859aSSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR)) { 9826465859aSSunil Goutham lmac->use_training = 0; 9836465859aSSunil Goutham return; 9846465859aSSunil Goutham } 9856465859aSSunil Goutham 9866465859aSSunil Goutham lmac->use_training = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL) & 9876465859aSSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 9886465859aSSunil Goutham } 9896465859aSSunil Goutham 9900bcb7d51SSunil Goutham static void bgx_set_lmac_config(struct bgx *bgx, u8 idx) 9910bcb7d51SSunil Goutham { 9920bcb7d51SSunil Goutham struct lmac *lmac; 99357aaf63cSSunil Goutham struct lmac *olmac; 9940bcb7d51SSunil Goutham u64 cmr_cfg; 99557aaf63cSSunil Goutham u8 lmac_type; 99657aaf63cSSunil Goutham u8 lane_to_sds; 9970bcb7d51SSunil Goutham 9980bcb7d51SSunil Goutham lmac = &bgx->lmac[idx]; 9994863dea3SSunil Goutham 100009de3917SSunil Goutham if (!bgx->is_dlm || bgx->is_rgx) { 10014863dea3SSunil Goutham /* Read LMAC0 type to figure out QLM mode 10024863dea3SSunil Goutham * This is configured by low level firmware 10034863dea3SSunil Goutham */ 10040bcb7d51SSunil Goutham cmr_cfg = bgx_reg_read(bgx, 0, BGX_CMRX_CFG); 10050bcb7d51SSunil Goutham lmac->lmac_type = (cmr_cfg >> 8) & 0x07; 10066465859aSSunil Goutham if (bgx->is_rgx) 10076465859aSSunil Goutham lmac->lmac_type = BGX_MODE_RGMII; 10086465859aSSunil Goutham lmac_set_training(bgx, lmac, 0); 10093f8057cfSSunil Goutham lmac_set_lane2sds(bgx, lmac); 101057aaf63cSSunil Goutham return; 101157aaf63cSSunil Goutham } 101257aaf63cSSunil Goutham 101357aaf63cSSunil Goutham /* On 81xx BGX can be split across 2 DLMs 101457aaf63cSSunil Goutham * firmware programs lmac_type of LMAC0 and LMAC2 101557aaf63cSSunil Goutham */ 101657aaf63cSSunil Goutham if ((idx == 0) || (idx == 2)) { 101757aaf63cSSunil Goutham cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG); 101857aaf63cSSunil Goutham lmac_type = (u8)((cmr_cfg >> 8) & 0x07); 101957aaf63cSSunil Goutham lane_to_sds = (u8)(cmr_cfg & 0xFF); 102057aaf63cSSunil Goutham /* Check if config is not reset value */ 102157aaf63cSSunil Goutham if ((lmac_type == 0) && (lane_to_sds == 0xE4)) 102257aaf63cSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 102357aaf63cSSunil Goutham else 102457aaf63cSSunil Goutham lmac->lmac_type = lmac_type; 10256465859aSSunil Goutham lmac_set_training(bgx, lmac, lmac->lmacid); 10263f8057cfSSunil Goutham lmac_set_lane2sds(bgx, lmac); 102757aaf63cSSunil Goutham 102857aaf63cSSunil Goutham olmac = &bgx->lmac[idx + 1]; 10295271156bSSunil Goutham /* Check if other LMAC on the same DLM is already configured by 10305271156bSSunil Goutham * firmware, if so use the same config or else set as same, as 10315271156bSSunil Goutham * that of LMAC 0/2. 10325271156bSSunil Goutham * This check is needed as on 80xx only one lane of each of the 10335271156bSSunil Goutham * DLM of BGX0 is used, so have to rely on firmware for 10345271156bSSunil Goutham * distingushing 80xx from 81xx. 10355271156bSSunil Goutham */ 10365271156bSSunil Goutham cmr_cfg = bgx_reg_read(bgx, idx + 1, BGX_CMRX_CFG); 10375271156bSSunil Goutham lmac_type = (u8)((cmr_cfg >> 8) & 0x07); 10385271156bSSunil Goutham lane_to_sds = (u8)(cmr_cfg & 0xFF); 10395271156bSSunil Goutham if ((lmac_type == 0) && (lane_to_sds == 0xE4)) { 104057aaf63cSSunil Goutham olmac->lmac_type = lmac->lmac_type; 10413f8057cfSSunil Goutham lmac_set_lane2sds(bgx, olmac); 10425271156bSSunil Goutham } else { 10435271156bSSunil Goutham olmac->lmac_type = lmac_type; 10445271156bSSunil Goutham olmac->lane_to_sds = lane_to_sds; 10455271156bSSunil Goutham } 10465271156bSSunil Goutham lmac_set_training(bgx, olmac, olmac->lmacid); 104757aaf63cSSunil Goutham } 104857aaf63cSSunil Goutham } 104957aaf63cSSunil Goutham 105057aaf63cSSunil Goutham static bool is_dlm0_in_bgx_mode(struct bgx *bgx) 105157aaf63cSSunil Goutham { 105257aaf63cSSunil Goutham struct lmac *lmac; 105357aaf63cSSunil Goutham 105409de3917SSunil Goutham if (!bgx->is_dlm) 105557aaf63cSSunil Goutham return true; 105657aaf63cSSunil Goutham 10573f8057cfSSunil Goutham lmac = &bgx->lmac[0]; 105857aaf63cSSunil Goutham if (lmac->lmac_type == BGX_MODE_INVALID) 105957aaf63cSSunil Goutham return false; 106057aaf63cSSunil Goutham 106157aaf63cSSunil Goutham return true; 10620bcb7d51SSunil Goutham } 10634863dea3SSunil Goutham 10640bcb7d51SSunil Goutham static void bgx_get_qlm_mode(struct bgx *bgx) 10650bcb7d51SSunil Goutham { 106657aaf63cSSunil Goutham struct lmac *lmac; 106757aaf63cSSunil Goutham struct lmac *lmac01; 106857aaf63cSSunil Goutham struct lmac *lmac23; 10690bcb7d51SSunil Goutham u8 idx; 10700bcb7d51SSunil Goutham 107157aaf63cSSunil Goutham /* Init all LMAC's type to invalid */ 10726465859aSSunil Goutham for (idx = 0; idx < bgx->max_lmac; idx++) { 107357aaf63cSSunil Goutham lmac = &bgx->lmac[idx]; 107457aaf63cSSunil Goutham lmac->lmacid = idx; 10756465859aSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 10766465859aSSunil Goutham lmac->use_training = false; 107757aaf63cSSunil Goutham } 107857aaf63cSSunil Goutham 10790bcb7d51SSunil Goutham /* It is assumed that low level firmware sets this value */ 10800bcb7d51SSunil Goutham bgx->lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7; 10816465859aSSunil Goutham if (bgx->lmac_count > bgx->max_lmac) 10826465859aSSunil Goutham bgx->lmac_count = bgx->max_lmac; 10830bcb7d51SSunil Goutham 10846465859aSSunil Goutham for (idx = 0; idx < bgx->max_lmac; idx++) 10850bcb7d51SSunil Goutham bgx_set_lmac_config(bgx, idx); 108657aaf63cSSunil Goutham 108709de3917SSunil Goutham if (!bgx->is_dlm || bgx->is_rgx) { 10880bcb7d51SSunil Goutham bgx_print_qlm_mode(bgx, 0); 108957aaf63cSSunil Goutham return; 109057aaf63cSSunil Goutham } 109157aaf63cSSunil Goutham 109257aaf63cSSunil Goutham if (bgx->lmac_count) { 109357aaf63cSSunil Goutham bgx_print_qlm_mode(bgx, 0); 109457aaf63cSSunil Goutham bgx_print_qlm_mode(bgx, 2); 109557aaf63cSSunil Goutham } 109657aaf63cSSunil Goutham 109757aaf63cSSunil Goutham /* If DLM0 is not in BGX mode then LMAC0/1 have 109857aaf63cSSunil Goutham * to be configured with serdes lanes of DLM1 109957aaf63cSSunil Goutham */ 110057aaf63cSSunil Goutham if (is_dlm0_in_bgx_mode(bgx) || (bgx->lmac_count > 2)) 110157aaf63cSSunil Goutham return; 110257aaf63cSSunil Goutham for (idx = 0; idx < bgx->lmac_count; idx++) { 110357aaf63cSSunil Goutham lmac01 = &bgx->lmac[idx]; 110457aaf63cSSunil Goutham lmac23 = &bgx->lmac[idx + 2]; 110557aaf63cSSunil Goutham lmac01->lmac_type = lmac23->lmac_type; 110657aaf63cSSunil Goutham lmac01->lane_to_sds = lmac23->lane_to_sds; 110757aaf63cSSunil Goutham } 11084863dea3SSunil Goutham } 11094863dea3SSunil Goutham 111046b903a0SDavid Daney #ifdef CONFIG_ACPI 111146b903a0SDavid Daney 11121d82efacSRobert Richter static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev, 11131d82efacSRobert Richter u8 *dst) 111446b903a0SDavid Daney { 111546b903a0SDavid Daney u8 mac[ETH_ALEN]; 111646b903a0SDavid Daney int ret; 111746b903a0SDavid Daney 111846b903a0SDavid Daney ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev), 111946b903a0SDavid Daney "mac-address", mac, ETH_ALEN); 112046b903a0SDavid Daney if (ret) 112146b903a0SDavid Daney goto out; 112246b903a0SDavid Daney 112346b903a0SDavid Daney if (!is_valid_ether_addr(mac)) { 11241d82efacSRobert Richter dev_err(dev, "MAC address invalid: %pM\n", mac); 112546b903a0SDavid Daney ret = -EINVAL; 112646b903a0SDavid Daney goto out; 112746b903a0SDavid Daney } 112846b903a0SDavid Daney 11291d82efacSRobert Richter dev_info(dev, "MAC address set to: %pM\n", mac); 11301d82efacSRobert Richter 113146b903a0SDavid Daney memcpy(dst, mac, ETH_ALEN); 113246b903a0SDavid Daney out: 113346b903a0SDavid Daney return ret; 113446b903a0SDavid Daney } 113546b903a0SDavid Daney 113646b903a0SDavid Daney /* Currently only sets the MAC address. */ 113746b903a0SDavid Daney static acpi_status bgx_acpi_register_phy(acpi_handle handle, 113846b903a0SDavid Daney u32 lvl, void *context, void **rv) 113946b903a0SDavid Daney { 114046b903a0SDavid Daney struct bgx *bgx = context; 11411d82efacSRobert Richter struct device *dev = &bgx->pdev->dev; 114246b903a0SDavid Daney struct acpi_device *adev; 114346b903a0SDavid Daney 114446b903a0SDavid Daney if (acpi_bus_get_device(handle, &adev)) 114546b903a0SDavid Daney goto out; 114646b903a0SDavid Daney 11477aa48655SVadim Lomovtsev acpi_get_mac_address(dev, adev, bgx->lmac[bgx->acpi_lmac_idx].mac); 114846b903a0SDavid Daney 11497aa48655SVadim Lomovtsev SET_NETDEV_DEV(&bgx->lmac[bgx->acpi_lmac_idx].netdev, dev); 115046b903a0SDavid Daney 11517aa48655SVadim Lomovtsev bgx->lmac[bgx->acpi_lmac_idx].lmacid = bgx->acpi_lmac_idx; 11527aa48655SVadim Lomovtsev bgx->acpi_lmac_idx++; /* move to next LMAC */ 115346b903a0SDavid Daney out: 115446b903a0SDavid Daney return AE_OK; 115546b903a0SDavid Daney } 115646b903a0SDavid Daney 115746b903a0SDavid Daney static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl, 115846b903a0SDavid Daney void *context, void **ret_val) 115946b903a0SDavid Daney { 116046b903a0SDavid Daney struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL }; 116146b903a0SDavid Daney struct bgx *bgx = context; 116246b903a0SDavid Daney char bgx_sel[5]; 116346b903a0SDavid Daney 116446b903a0SDavid Daney snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id); 116546b903a0SDavid Daney if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &string))) { 116646b903a0SDavid Daney pr_warn("Invalid link device\n"); 116746b903a0SDavid Daney return AE_OK; 116846b903a0SDavid Daney } 116946b903a0SDavid Daney 117046b903a0SDavid Daney if (strncmp(string.pointer, bgx_sel, 4)) 117146b903a0SDavid Daney return AE_OK; 117246b903a0SDavid Daney 117346b903a0SDavid Daney acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, 117446b903a0SDavid Daney bgx_acpi_register_phy, NULL, bgx, NULL); 117546b903a0SDavid Daney 117646b903a0SDavid Daney kfree(string.pointer); 117746b903a0SDavid Daney return AE_CTRL_TERMINATE; 117846b903a0SDavid Daney } 117946b903a0SDavid Daney 118046b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 118146b903a0SDavid Daney { 118246b903a0SDavid Daney acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL); 118346b903a0SDavid Daney return 0; 118446b903a0SDavid Daney } 118546b903a0SDavid Daney 118646b903a0SDavid Daney #else 118746b903a0SDavid Daney 118846b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 118946b903a0SDavid Daney { 119046b903a0SDavid Daney return -ENODEV; 119146b903a0SDavid Daney } 119246b903a0SDavid Daney 119346b903a0SDavid Daney #endif /* CONFIG_ACPI */ 119446b903a0SDavid Daney 1195de387e11SRobert Richter #if IS_ENABLED(CONFIG_OF_MDIO) 1196de387e11SRobert Richter 1197de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 11984863dea3SSunil Goutham { 1199eee326fdSDavid Daney struct fwnode_handle *fwn; 1200b7d3e3d3SDavid Daney struct device_node *node = NULL; 12014863dea3SSunil Goutham u8 lmac = 0; 12024863dea3SSunil Goutham 1203eee326fdSDavid Daney device_for_each_child_node(&bgx->pdev->dev, fwn) { 12045fc7cf17SDavid Daney struct phy_device *pd; 1205eee326fdSDavid Daney struct device_node *phy_np; 1206b7d3e3d3SDavid Daney const char *mac; 1207de387e11SRobert Richter 12085fc7cf17SDavid Daney /* Should always be an OF node. But if it is not, we 12095fc7cf17SDavid Daney * cannot handle it, so exit the loop. 1210eee326fdSDavid Daney */ 1211b7d3e3d3SDavid Daney node = to_of_node(fwn); 1212eee326fdSDavid Daney if (!node) 1213eee326fdSDavid Daney break; 1214eee326fdSDavid Daney 1215eee326fdSDavid Daney mac = of_get_mac_address(node); 12164863dea3SSunil Goutham if (mac) 12174863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmac].mac, mac); 12184863dea3SSunil Goutham 12194863dea3SSunil Goutham SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev); 12204863dea3SSunil Goutham bgx->lmac[lmac].lmacid = lmac; 12215fc7cf17SDavid Daney 12225fc7cf17SDavid Daney phy_np = of_parse_phandle(node, "phy-handle", 0); 12235fc7cf17SDavid Daney /* If there is no phy or defective firmware presents 12245fc7cf17SDavid Daney * this cortina phy, for which there is no driver 12255fc7cf17SDavid Daney * support, ignore it. 12265fc7cf17SDavid Daney */ 12275fc7cf17SDavid Daney if (phy_np && 12285fc7cf17SDavid Daney !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) { 12295fc7cf17SDavid Daney /* Wait until the phy drivers are available */ 12305fc7cf17SDavid Daney pd = of_phy_find_device(phy_np); 12315fc7cf17SDavid Daney if (!pd) 1232b7d3e3d3SDavid Daney goto defer; 12335fc7cf17SDavid Daney bgx->lmac[lmac].phydev = pd; 12345fc7cf17SDavid Daney } 12355fc7cf17SDavid Daney 12364863dea3SSunil Goutham lmac++; 12376465859aSSunil Goutham if (lmac == bgx->max_lmac) { 123865c66af6SDavid Daney of_node_put(node); 12394863dea3SSunil Goutham break; 12404863dea3SSunil Goutham } 124165c66af6SDavid Daney } 1242de387e11SRobert Richter return 0; 1243b7d3e3d3SDavid Daney 1244b7d3e3d3SDavid Daney defer: 1245b7d3e3d3SDavid Daney /* We are bailing out, try not to leak device reference counts 1246b7d3e3d3SDavid Daney * for phy devices we may have already found. 1247b7d3e3d3SDavid Daney */ 1248b7d3e3d3SDavid Daney while (lmac) { 1249b7d3e3d3SDavid Daney if (bgx->lmac[lmac].phydev) { 1250b7d3e3d3SDavid Daney put_device(&bgx->lmac[lmac].phydev->mdio.dev); 1251b7d3e3d3SDavid Daney bgx->lmac[lmac].phydev = NULL; 1252b7d3e3d3SDavid Daney } 1253b7d3e3d3SDavid Daney lmac--; 1254b7d3e3d3SDavid Daney } 1255b7d3e3d3SDavid Daney of_node_put(node); 1256b7d3e3d3SDavid Daney return -EPROBE_DEFER; 1257de387e11SRobert Richter } 1258de387e11SRobert Richter 1259de387e11SRobert Richter #else 1260de387e11SRobert Richter 1261de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 1262de387e11SRobert Richter { 1263de387e11SRobert Richter return -ENODEV; 1264de387e11SRobert Richter } 1265de387e11SRobert Richter 1266de387e11SRobert Richter #endif /* CONFIG_OF_MDIO */ 1267de387e11SRobert Richter 1268de387e11SRobert Richter static int bgx_init_phy(struct bgx *bgx) 1269de387e11SRobert Richter { 127046b903a0SDavid Daney if (!acpi_disabled) 127146b903a0SDavid Daney return bgx_init_acpi_phy(bgx); 127246b903a0SDavid Daney 1273de387e11SRobert Richter return bgx_init_of_phy(bgx); 12744863dea3SSunil Goutham } 12754863dea3SSunil Goutham 12764863dea3SSunil Goutham static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 12774863dea3SSunil Goutham { 12784863dea3SSunil Goutham int err; 12794863dea3SSunil Goutham struct device *dev = &pdev->dev; 12804863dea3SSunil Goutham struct bgx *bgx = NULL; 12814863dea3SSunil Goutham u8 lmac; 128257aaf63cSSunil Goutham u16 sdevid; 12834863dea3SSunil Goutham 12844863dea3SSunil Goutham bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL); 12854863dea3SSunil Goutham if (!bgx) 12864863dea3SSunil Goutham return -ENOMEM; 12874863dea3SSunil Goutham bgx->pdev = pdev; 12884863dea3SSunil Goutham 12894863dea3SSunil Goutham pci_set_drvdata(pdev, bgx); 12904863dea3SSunil Goutham 12914863dea3SSunil Goutham err = pci_enable_device(pdev); 12924863dea3SSunil Goutham if (err) { 12934863dea3SSunil Goutham dev_err(dev, "Failed to enable PCI device\n"); 12944863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 12954863dea3SSunil Goutham return err; 12964863dea3SSunil Goutham } 12974863dea3SSunil Goutham 12984863dea3SSunil Goutham err = pci_request_regions(pdev, DRV_NAME); 12994863dea3SSunil Goutham if (err) { 13004863dea3SSunil Goutham dev_err(dev, "PCI request regions failed 0x%x\n", err); 13014863dea3SSunil Goutham goto err_disable_device; 13024863dea3SSunil Goutham } 13034863dea3SSunil Goutham 13044863dea3SSunil Goutham /* MAP configuration registers */ 13054863dea3SSunil Goutham bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 13064863dea3SSunil Goutham if (!bgx->reg_base) { 13074863dea3SSunil Goutham dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n"); 13084863dea3SSunil Goutham err = -ENOMEM; 13094863dea3SSunil Goutham goto err_release_regions; 13104863dea3SSunil Goutham } 1311d768b678SRobert Richter 13126465859aSSunil Goutham pci_read_config_word(pdev, PCI_DEVICE_ID, &sdevid); 13136465859aSSunil Goutham if (sdevid != PCI_DEVICE_ID_THUNDER_RGX) { 1314612e94bdSRadha Mohan Chintakuntla bgx->bgx_id = (pci_resource_start(pdev, 1315612e94bdSRadha Mohan Chintakuntla PCI_CFG_REG_BAR_NUM) >> 24) & BGX_ID_MASK; 131609de3917SSunil Goutham bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_NODE; 13176465859aSSunil Goutham bgx->max_lmac = MAX_LMAC_PER_BGX; 13184863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 13196465859aSSunil Goutham } else { 13206465859aSSunil Goutham bgx->is_rgx = true; 13216465859aSSunil Goutham bgx->max_lmac = 1; 13226465859aSSunil Goutham bgx->bgx_id = MAX_BGX_PER_CN81XX - 1; 13236465859aSSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 13246465859aSSunil Goutham xcv_init_hw(); 13256465859aSSunil Goutham } 13266465859aSSunil Goutham 132709de3917SSunil Goutham /* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one 132809de3917SSunil Goutham * BGX i.e BGX2 can be split across 2 DLMs. 132909de3917SSunil Goutham */ 133009de3917SSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid); 133109de3917SSunil Goutham if ((sdevid == PCI_SUBSYS_DEVID_81XX_BGX) || 133209de3917SSunil Goutham ((sdevid == PCI_SUBSYS_DEVID_83XX_BGX) && (bgx->bgx_id == 2))) 133309de3917SSunil Goutham bgx->is_dlm = true; 133409de3917SSunil Goutham 13354863dea3SSunil Goutham bgx_get_qlm_mode(bgx); 13364863dea3SSunil Goutham 1337de387e11SRobert Richter err = bgx_init_phy(bgx); 1338de387e11SRobert Richter if (err) 1339de387e11SRobert Richter goto err_enable; 13404863dea3SSunil Goutham 13414863dea3SSunil Goutham bgx_init_hw(bgx); 13424863dea3SSunil Goutham 13434863dea3SSunil Goutham /* Enable all LMACs */ 13444863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) { 13454863dea3SSunil Goutham err = bgx_lmac_enable(bgx, lmac); 13464863dea3SSunil Goutham if (err) { 13474863dea3SSunil Goutham dev_err(dev, "BGX%d failed to enable lmac%d\n", 13484863dea3SSunil Goutham bgx->bgx_id, lmac); 134957aaf63cSSunil Goutham while (lmac) 135057aaf63cSSunil Goutham bgx_lmac_disable(bgx, --lmac); 13514863dea3SSunil Goutham goto err_enable; 13524863dea3SSunil Goutham } 13534863dea3SSunil Goutham } 13544863dea3SSunil Goutham 13554863dea3SSunil Goutham return 0; 13564863dea3SSunil Goutham 13574863dea3SSunil Goutham err_enable: 13584863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 13594863dea3SSunil Goutham err_release_regions: 13604863dea3SSunil Goutham pci_release_regions(pdev); 13614863dea3SSunil Goutham err_disable_device: 13624863dea3SSunil Goutham pci_disable_device(pdev); 13634863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 13644863dea3SSunil Goutham return err; 13654863dea3SSunil Goutham } 13664863dea3SSunil Goutham 13674863dea3SSunil Goutham static void bgx_remove(struct pci_dev *pdev) 13684863dea3SSunil Goutham { 13694863dea3SSunil Goutham struct bgx *bgx = pci_get_drvdata(pdev); 13704863dea3SSunil Goutham u8 lmac; 13714863dea3SSunil Goutham 13724863dea3SSunil Goutham /* Disable all LMACs */ 13734863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) 13744863dea3SSunil Goutham bgx_lmac_disable(bgx, lmac); 13754863dea3SSunil Goutham 13764863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 13774863dea3SSunil Goutham pci_release_regions(pdev); 13784863dea3SSunil Goutham pci_disable_device(pdev); 13794863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 13804863dea3SSunil Goutham } 13814863dea3SSunil Goutham 13824863dea3SSunil Goutham static struct pci_driver bgx_driver = { 13834863dea3SSunil Goutham .name = DRV_NAME, 13844863dea3SSunil Goutham .id_table = bgx_id_table, 13854863dea3SSunil Goutham .probe = bgx_probe, 13864863dea3SSunil Goutham .remove = bgx_remove, 13874863dea3SSunil Goutham }; 13884863dea3SSunil Goutham 13894863dea3SSunil Goutham static int __init bgx_init_module(void) 13904863dea3SSunil Goutham { 13914863dea3SSunil Goutham pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 13924863dea3SSunil Goutham 13934863dea3SSunil Goutham return pci_register_driver(&bgx_driver); 13944863dea3SSunil Goutham } 13954863dea3SSunil Goutham 13964863dea3SSunil Goutham static void __exit bgx_cleanup_module(void) 13974863dea3SSunil Goutham { 13984863dea3SSunil Goutham pci_unregister_driver(&bgx_driver); 13994863dea3SSunil Goutham } 14004863dea3SSunil Goutham 14014863dea3SSunil Goutham module_init(bgx_init_module); 14024863dea3SSunil Goutham module_exit(bgx_cleanup_module); 1403