14863dea3SSunil Goutham /* 24863dea3SSunil Goutham * Copyright (C) 2015 Cavium, Inc. 34863dea3SSunil Goutham * 44863dea3SSunil Goutham * This program is free software; you can redistribute it and/or modify it 54863dea3SSunil Goutham * under the terms of version 2 of the GNU General Public License 64863dea3SSunil Goutham * as published by the Free Software Foundation. 74863dea3SSunil Goutham */ 84863dea3SSunil Goutham 946b903a0SDavid Daney #include <linux/acpi.h> 104863dea3SSunil Goutham #include <linux/module.h> 114863dea3SSunil Goutham #include <linux/interrupt.h> 124863dea3SSunil Goutham #include <linux/pci.h> 134863dea3SSunil Goutham #include <linux/netdevice.h> 144863dea3SSunil Goutham #include <linux/etherdevice.h> 154863dea3SSunil Goutham #include <linux/phy.h> 164863dea3SSunil Goutham #include <linux/of.h> 174863dea3SSunil Goutham #include <linux/of_mdio.h> 184863dea3SSunil Goutham #include <linux/of_net.h> 194863dea3SSunil Goutham 204863dea3SSunil Goutham #include "nic_reg.h" 214863dea3SSunil Goutham #include "nic.h" 224863dea3SSunil Goutham #include "thunder_bgx.h" 234863dea3SSunil Goutham 246b9e6547SVadim Lomovtsev #define DRV_NAME "thunder_bgx" 254863dea3SSunil Goutham #define DRV_VERSION "1.0" 264863dea3SSunil Goutham 274863dea3SSunil Goutham struct lmac { 284863dea3SSunil Goutham struct bgx *bgx; 294863dea3SSunil Goutham int dmac; 3046b903a0SDavid Daney u8 mac[ETH_ALEN]; 310bcb7d51SSunil Goutham u8 lmac_type; 320bcb7d51SSunil Goutham u8 lane_to_sds; 330bcb7d51SSunil Goutham bool use_training; 34075ad765SThanneeru Srinivasulu bool autoneg; 354863dea3SSunil Goutham bool link_up; 364863dea3SSunil Goutham int lmacid; /* ID within BGX */ 374863dea3SSunil Goutham int lmacid_bd; /* ID on board */ 384863dea3SSunil Goutham struct net_device netdev; 394863dea3SSunil Goutham struct phy_device *phydev; 404863dea3SSunil Goutham unsigned int last_duplex; 414863dea3SSunil Goutham unsigned int last_link; 424863dea3SSunil Goutham unsigned int last_speed; 434863dea3SSunil Goutham bool is_sgmii; 444863dea3SSunil Goutham struct delayed_work dwork; 454863dea3SSunil Goutham struct workqueue_struct *check_link; 460c886a1dSAleksey Makarov }; 474863dea3SSunil Goutham 484863dea3SSunil Goutham struct bgx { 494863dea3SSunil Goutham u8 bgx_id; 504863dea3SSunil Goutham struct lmac lmac[MAX_LMAC_PER_BGX]; 517aa48655SVadim Lomovtsev u8 lmac_count; 526465859aSSunil Goutham u8 max_lmac; 537aa48655SVadim Lomovtsev u8 acpi_lmac_idx; 544863dea3SSunil Goutham void __iomem *reg_base; 554863dea3SSunil Goutham struct pci_dev *pdev; 5609de3917SSunil Goutham bool is_dlm; 576465859aSSunil Goutham bool is_rgx; 580c886a1dSAleksey Makarov }; 594863dea3SSunil Goutham 60fd7ec062SAleksey Makarov static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; 614863dea3SSunil Goutham static int lmac_count; /* Total no of LMACs in system */ 624863dea3SSunil Goutham 634863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac); 644863dea3SSunil Goutham 654863dea3SSunil Goutham /* Supported devices */ 664863dea3SSunil Goutham static const struct pci_device_id bgx_id_table[] = { 674863dea3SSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_BGX) }, 686465859aSSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_RGX) }, 694863dea3SSunil Goutham { 0, } /* end of table */ 704863dea3SSunil Goutham }; 714863dea3SSunil Goutham 724863dea3SSunil Goutham MODULE_AUTHOR("Cavium Inc"); 734863dea3SSunil Goutham MODULE_DESCRIPTION("Cavium Thunder BGX/MAC Driver"); 744863dea3SSunil Goutham MODULE_LICENSE("GPL v2"); 754863dea3SSunil Goutham MODULE_VERSION(DRV_VERSION); 764863dea3SSunil Goutham MODULE_DEVICE_TABLE(pci, bgx_id_table); 774863dea3SSunil Goutham 784863dea3SSunil Goutham /* The Cavium ThunderX network controller can *only* be found in SoCs 794863dea3SSunil Goutham * containing the ThunderX ARM64 CPU implementation. All accesses to the device 804863dea3SSunil Goutham * registers on this platform are implicitly strongly ordered with respect 814863dea3SSunil Goutham * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 824863dea3SSunil Goutham * with no memory barriers in this driver. The readq()/writeq() functions add 834863dea3SSunil Goutham * explicit ordering operation which in this case are redundant, and only 844863dea3SSunil Goutham * add overhead. 854863dea3SSunil Goutham */ 864863dea3SSunil Goutham 874863dea3SSunil Goutham /* Register read/write APIs */ 884863dea3SSunil Goutham static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset) 894863dea3SSunil Goutham { 904863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 914863dea3SSunil Goutham 924863dea3SSunil Goutham return readq_relaxed(addr); 934863dea3SSunil Goutham } 944863dea3SSunil Goutham 954863dea3SSunil Goutham static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 964863dea3SSunil Goutham { 974863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 984863dea3SSunil Goutham 994863dea3SSunil Goutham writeq_relaxed(val, addr); 1004863dea3SSunil Goutham } 1014863dea3SSunil Goutham 1024863dea3SSunil Goutham static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 1034863dea3SSunil Goutham { 1044863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 1054863dea3SSunil Goutham 1064863dea3SSunil Goutham writeq_relaxed(val | readq_relaxed(addr), addr); 1074863dea3SSunil Goutham } 1084863dea3SSunil Goutham 1094863dea3SSunil Goutham static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) 1104863dea3SSunil Goutham { 1114863dea3SSunil Goutham int timeout = 100; 1124863dea3SSunil Goutham u64 reg_val; 1134863dea3SSunil Goutham 1144863dea3SSunil Goutham while (timeout) { 1154863dea3SSunil Goutham reg_val = bgx_reg_read(bgx, lmac, reg); 1164863dea3SSunil Goutham if (zero && !(reg_val & mask)) 1174863dea3SSunil Goutham return 0; 1184863dea3SSunil Goutham if (!zero && (reg_val & mask)) 1194863dea3SSunil Goutham return 0; 1204863dea3SSunil Goutham usleep_range(1000, 2000); 1214863dea3SSunil Goutham timeout--; 1224863dea3SSunil Goutham } 1234863dea3SSunil Goutham return 1; 1244863dea3SSunil Goutham } 1254863dea3SSunil Goutham 12678aacb6fSSunil Goutham static int max_bgx_per_node; 12778aacb6fSSunil Goutham static void set_max_bgx_per_node(struct pci_dev *pdev) 12878aacb6fSSunil Goutham { 12978aacb6fSSunil Goutham u16 sdevid; 13078aacb6fSSunil Goutham 13178aacb6fSSunil Goutham if (max_bgx_per_node) 13278aacb6fSSunil Goutham return; 13378aacb6fSSunil Goutham 13478aacb6fSSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid); 13578aacb6fSSunil Goutham switch (sdevid) { 13678aacb6fSSunil Goutham case PCI_SUBSYS_DEVID_81XX_BGX: 137b47a57a2SGeorge Cherian case PCI_SUBSYS_DEVID_81XX_RGX: 13878aacb6fSSunil Goutham max_bgx_per_node = MAX_BGX_PER_CN81XX; 13978aacb6fSSunil Goutham break; 14078aacb6fSSunil Goutham case PCI_SUBSYS_DEVID_83XX_BGX: 14178aacb6fSSunil Goutham max_bgx_per_node = MAX_BGX_PER_CN83XX; 14278aacb6fSSunil Goutham break; 14378aacb6fSSunil Goutham case PCI_SUBSYS_DEVID_88XX_BGX: 14478aacb6fSSunil Goutham default: 14578aacb6fSSunil Goutham max_bgx_per_node = MAX_BGX_PER_CN88XX; 14678aacb6fSSunil Goutham break; 14778aacb6fSSunil Goutham } 14878aacb6fSSunil Goutham } 14978aacb6fSSunil Goutham 15078aacb6fSSunil Goutham static struct bgx *get_bgx(int node, int bgx_idx) 15178aacb6fSSunil Goutham { 15278aacb6fSSunil Goutham int idx = (node * max_bgx_per_node) + bgx_idx; 15378aacb6fSSunil Goutham 15478aacb6fSSunil Goutham return bgx_vnic[idx]; 15578aacb6fSSunil Goutham } 15678aacb6fSSunil Goutham 1574863dea3SSunil Goutham /* Return number of BGX present in HW */ 1584863dea3SSunil Goutham unsigned bgx_get_map(int node) 1594863dea3SSunil Goutham { 1604863dea3SSunil Goutham int i; 1614863dea3SSunil Goutham unsigned map = 0; 1624863dea3SSunil Goutham 16378aacb6fSSunil Goutham for (i = 0; i < max_bgx_per_node; i++) { 16478aacb6fSSunil Goutham if (bgx_vnic[(node * max_bgx_per_node) + i]) 1654863dea3SSunil Goutham map |= (1 << i); 1664863dea3SSunil Goutham } 1674863dea3SSunil Goutham 1684863dea3SSunil Goutham return map; 1694863dea3SSunil Goutham } 1704863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_map); 1714863dea3SSunil Goutham 1724863dea3SSunil Goutham /* Return number of LMAC configured for this BGX */ 1734863dea3SSunil Goutham int bgx_get_lmac_count(int node, int bgx_idx) 1744863dea3SSunil Goutham { 1754863dea3SSunil Goutham struct bgx *bgx; 1764863dea3SSunil Goutham 17778aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx); 1784863dea3SSunil Goutham if (bgx) 1794863dea3SSunil Goutham return bgx->lmac_count; 1804863dea3SSunil Goutham 1814863dea3SSunil Goutham return 0; 1824863dea3SSunil Goutham } 1834863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_count); 1844863dea3SSunil Goutham 1854863dea3SSunil Goutham /* Returns the current link status of LMAC */ 1864863dea3SSunil Goutham void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status) 1874863dea3SSunil Goutham { 1884863dea3SSunil Goutham struct bgx_link_status *link = (struct bgx_link_status *)status; 1894863dea3SSunil Goutham struct bgx *bgx; 1904863dea3SSunil Goutham struct lmac *lmac; 1914863dea3SSunil Goutham 19278aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx); 1934863dea3SSunil Goutham if (!bgx) 1944863dea3SSunil Goutham return; 1954863dea3SSunil Goutham 1964863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 1971cc70259SThanneeru Srinivasulu link->mac_type = lmac->lmac_type; 1984863dea3SSunil Goutham link->link_up = lmac->link_up; 1994863dea3SSunil Goutham link->duplex = lmac->last_duplex; 2004863dea3SSunil Goutham link->speed = lmac->last_speed; 2014863dea3SSunil Goutham } 2024863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_link_state); 2034863dea3SSunil Goutham 204e610cb32SAleksey Makarov const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid) 2054863dea3SSunil Goutham { 20678aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx); 2074863dea3SSunil Goutham 2084863dea3SSunil Goutham if (bgx) 2094863dea3SSunil Goutham return bgx->lmac[lmacid].mac; 2104863dea3SSunil Goutham 2114863dea3SSunil Goutham return NULL; 2124863dea3SSunil Goutham } 2134863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_mac); 2144863dea3SSunil Goutham 215e610cb32SAleksey Makarov void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac) 2164863dea3SSunil Goutham { 21778aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx); 2184863dea3SSunil Goutham 2194863dea3SSunil Goutham if (!bgx) 2204863dea3SSunil Goutham return; 2214863dea3SSunil Goutham 2224863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmacid].mac, mac); 2234863dea3SSunil Goutham } 2244863dea3SSunil Goutham EXPORT_SYMBOL(bgx_set_lmac_mac); 2254863dea3SSunil Goutham 226bc69fdfcSSunil Goutham void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable) 227bc69fdfcSSunil Goutham { 22878aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx); 2296465859aSSunil Goutham struct lmac *lmac; 230bc69fdfcSSunil Goutham u64 cfg; 231bc69fdfcSSunil Goutham 232bc69fdfcSSunil Goutham if (!bgx) 233bc69fdfcSSunil Goutham return; 2346465859aSSunil Goutham lmac = &bgx->lmac[lmacid]; 235bc69fdfcSSunil Goutham 236bc69fdfcSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 237bc69fdfcSSunil Goutham if (enable) 238bc69fdfcSSunil Goutham cfg |= CMR_PKT_RX_EN | CMR_PKT_TX_EN; 239bc69fdfcSSunil Goutham else 240bc69fdfcSSunil Goutham cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN); 241bc69fdfcSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 2426465859aSSunil Goutham 2436465859aSSunil Goutham if (bgx->is_rgx) 2446465859aSSunil Goutham xcv_setup_link(enable ? lmac->link_up : 0, lmac->last_speed); 245bc69fdfcSSunil Goutham } 246bc69fdfcSSunil Goutham EXPORT_SYMBOL(bgx_lmac_rx_tx_enable); 247bc69fdfcSSunil Goutham 2484a875509SSunil Goutham /* Enables or disables timestamp insertion by BGX for Rx packets */ 2494a875509SSunil Goutham void bgx_config_timestamping(int node, int bgx_idx, int lmacid, bool enable) 2504a875509SSunil Goutham { 2514a875509SSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx); 2524a875509SSunil Goutham struct lmac *lmac; 2534a875509SSunil Goutham u64 csr_offset, cfg; 2544a875509SSunil Goutham 2554a875509SSunil Goutham if (!bgx) 2564a875509SSunil Goutham return; 2574a875509SSunil Goutham 2584a875509SSunil Goutham lmac = &bgx->lmac[lmacid]; 2594a875509SSunil Goutham 2604a875509SSunil Goutham if (lmac->lmac_type == BGX_MODE_SGMII || 2614a875509SSunil Goutham lmac->lmac_type == BGX_MODE_QSGMII || 2624a875509SSunil Goutham lmac->lmac_type == BGX_MODE_RGMII) 2634a875509SSunil Goutham csr_offset = BGX_GMP_GMI_RXX_FRM_CTL; 2644a875509SSunil Goutham else 2654a875509SSunil Goutham csr_offset = BGX_SMUX_RX_FRM_CTL; 2664a875509SSunil Goutham 2674a875509SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, csr_offset); 2684a875509SSunil Goutham 2694a875509SSunil Goutham if (enable) 2704a875509SSunil Goutham cfg |= BGX_PKT_RX_PTP_EN; 2714a875509SSunil Goutham else 2724a875509SSunil Goutham cfg &= ~BGX_PKT_RX_PTP_EN; 2734a875509SSunil Goutham bgx_reg_write(bgx, lmacid, csr_offset, cfg); 2744a875509SSunil Goutham } 2754a875509SSunil Goutham EXPORT_SYMBOL(bgx_config_timestamping); 2764a875509SSunil Goutham 277430da208SSunil Goutham void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause) 278430da208SSunil Goutham { 279430da208SSunil Goutham struct pfc *pfc = (struct pfc *)pause; 28078aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx); 281430da208SSunil Goutham struct lmac *lmac; 282430da208SSunil Goutham u64 cfg; 283430da208SSunil Goutham 284430da208SSunil Goutham if (!bgx) 285430da208SSunil Goutham return; 286430da208SSunil Goutham lmac = &bgx->lmac[lmacid]; 287430da208SSunil Goutham if (lmac->is_sgmii) 288430da208SSunil Goutham return; 289430da208SSunil Goutham 290430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_CBFC_CTL); 291430da208SSunil Goutham pfc->fc_rx = cfg & RX_EN; 292430da208SSunil Goutham pfc->fc_tx = cfg & TX_EN; 293430da208SSunil Goutham pfc->autoneg = 0; 294430da208SSunil Goutham } 295430da208SSunil Goutham EXPORT_SYMBOL(bgx_lmac_get_pfc); 296430da208SSunil Goutham 297430da208SSunil Goutham void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause) 298430da208SSunil Goutham { 299430da208SSunil Goutham struct pfc *pfc = (struct pfc *)pause; 30078aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx); 301430da208SSunil Goutham struct lmac *lmac; 302430da208SSunil Goutham u64 cfg; 303430da208SSunil Goutham 304430da208SSunil Goutham if (!bgx) 305430da208SSunil Goutham return; 306430da208SSunil Goutham lmac = &bgx->lmac[lmacid]; 307430da208SSunil Goutham if (lmac->is_sgmii) 308430da208SSunil Goutham return; 309430da208SSunil Goutham 310430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_CBFC_CTL); 311430da208SSunil Goutham cfg &= ~(RX_EN | TX_EN); 312430da208SSunil Goutham cfg |= (pfc->fc_rx ? RX_EN : 0x00); 313430da208SSunil Goutham cfg |= (pfc->fc_tx ? TX_EN : 0x00); 314430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_CBFC_CTL, cfg); 315430da208SSunil Goutham } 316430da208SSunil Goutham EXPORT_SYMBOL(bgx_lmac_set_pfc); 317430da208SSunil Goutham 3184863dea3SSunil Goutham static void bgx_sgmii_change_link_state(struct lmac *lmac) 3194863dea3SSunil Goutham { 3204863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 3214863dea3SSunil Goutham u64 cmr_cfg; 3224863dea3SSunil Goutham u64 port_cfg = 0; 3234863dea3SSunil Goutham u64 misc_ctl = 0; 324500268e9SSunil Goutham bool tx_en, rx_en; 3254863dea3SSunil Goutham 3264863dea3SSunil Goutham cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG); 327500268e9SSunil Goutham tx_en = cmr_cfg & CMR_PKT_TX_EN; 328500268e9SSunil Goutham rx_en = cmr_cfg & CMR_PKT_RX_EN; 329500268e9SSunil Goutham cmr_cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN); 3304863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 3314863dea3SSunil Goutham 332500268e9SSunil Goutham /* Wait for BGX RX to be idle */ 333500268e9SSunil Goutham if (bgx_poll_reg(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, 334500268e9SSunil Goutham GMI_PORT_CFG_RX_IDLE, false)) { 335500268e9SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d LMAC%d GMI RX not idle\n", 336500268e9SSunil Goutham bgx->bgx_id, lmac->lmacid); 337500268e9SSunil Goutham return; 338500268e9SSunil Goutham } 339500268e9SSunil Goutham 340500268e9SSunil Goutham /* Wait for BGX TX to be idle */ 341500268e9SSunil Goutham if (bgx_poll_reg(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, 342500268e9SSunil Goutham GMI_PORT_CFG_TX_IDLE, false)) { 343500268e9SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d LMAC%d GMI TX not idle\n", 344500268e9SSunil Goutham bgx->bgx_id, lmac->lmacid); 345500268e9SSunil Goutham return; 346500268e9SSunil Goutham } 347500268e9SSunil Goutham 3484863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 3494863dea3SSunil Goutham misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL); 3504863dea3SSunil Goutham 3514863dea3SSunil Goutham if (lmac->link_up) { 3524863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_GMX_ENO; 3534863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_DUPLEX; 3544863dea3SSunil Goutham port_cfg |= (lmac->last_duplex << 2); 3554863dea3SSunil Goutham } else { 3564863dea3SSunil Goutham misc_ctl |= PCS_MISC_CTL_GMX_ENO; 3574863dea3SSunil Goutham } 3584863dea3SSunil Goutham 3594863dea3SSunil Goutham switch (lmac->last_speed) { 3604863dea3SSunil Goutham case 10: 3614863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 3624863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED_MSB; /* speed_msb 1 */ 3634863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 3644863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 3654863dea3SSunil Goutham misc_ctl |= 50; /* samp_pt */ 3664863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 3674863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 3684863dea3SSunil Goutham break; 3694863dea3SSunil Goutham case 100: 3704863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 3714863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 3724863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 3734863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 3744863dea3SSunil Goutham misc_ctl |= 5; /* samp_pt */ 3754863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 3764863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 3774863dea3SSunil Goutham break; 3784863dea3SSunil Goutham case 1000: 3794863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED; /* speed 1 */ 3804863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 3814863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SLOT_TIME; /* slottime 1 */ 3824863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 3834863dea3SSunil Goutham misc_ctl |= 1; /* samp_pt */ 3844863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512); 3854863dea3SSunil Goutham if (lmac->last_duplex) 3864863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 3874863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 0); 3884863dea3SSunil Goutham else 3894863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 3904863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 8192); 3914863dea3SSunil Goutham break; 3924863dea3SSunil Goutham default: 3934863dea3SSunil Goutham break; 3944863dea3SSunil Goutham } 3954863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl); 3964863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg); 3974863dea3SSunil Goutham 398500268e9SSunil Goutham /* Restore CMR config settings */ 399500268e9SSunil Goutham cmr_cfg |= (rx_en ? CMR_PKT_RX_EN : 0) | (tx_en ? CMR_PKT_TX_EN : 0); 4004863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 4016465859aSSunil Goutham 4026465859aSSunil Goutham if (bgx->is_rgx && (cmr_cfg & (CMR_PKT_RX_EN | CMR_PKT_TX_EN))) 4036465859aSSunil Goutham xcv_setup_link(lmac->link_up, lmac->last_speed); 4044863dea3SSunil Goutham } 4054863dea3SSunil Goutham 406fd7ec062SAleksey Makarov static void bgx_lmac_handler(struct net_device *netdev) 4074863dea3SSunil Goutham { 4084863dea3SSunil Goutham struct lmac *lmac = container_of(netdev, struct lmac, netdev); 409099a728dSxypron.glpk@gmx.de struct phy_device *phydev; 4104863dea3SSunil Goutham int link_changed = 0; 4114863dea3SSunil Goutham 4124863dea3SSunil Goutham if (!lmac) 4134863dea3SSunil Goutham return; 4144863dea3SSunil Goutham 415099a728dSxypron.glpk@gmx.de phydev = lmac->phydev; 416099a728dSxypron.glpk@gmx.de 4174863dea3SSunil Goutham if (!phydev->link && lmac->last_link) 4184863dea3SSunil Goutham link_changed = -1; 4194863dea3SSunil Goutham 4204863dea3SSunil Goutham if (phydev->link && 4214863dea3SSunil Goutham (lmac->last_duplex != phydev->duplex || 4224863dea3SSunil Goutham lmac->last_link != phydev->link || 4234863dea3SSunil Goutham lmac->last_speed != phydev->speed)) { 4244863dea3SSunil Goutham link_changed = 1; 4254863dea3SSunil Goutham } 4264863dea3SSunil Goutham 4274863dea3SSunil Goutham lmac->last_link = phydev->link; 4284863dea3SSunil Goutham lmac->last_speed = phydev->speed; 4294863dea3SSunil Goutham lmac->last_duplex = phydev->duplex; 4304863dea3SSunil Goutham 4314863dea3SSunil Goutham if (!link_changed) 4324863dea3SSunil Goutham return; 4334863dea3SSunil Goutham 4344863dea3SSunil Goutham if (link_changed > 0) 4354863dea3SSunil Goutham lmac->link_up = true; 4364863dea3SSunil Goutham else 4374863dea3SSunil Goutham lmac->link_up = false; 4384863dea3SSunil Goutham 4394863dea3SSunil Goutham if (lmac->is_sgmii) 4404863dea3SSunil Goutham bgx_sgmii_change_link_state(lmac); 4414863dea3SSunil Goutham else 4424863dea3SSunil Goutham bgx_xaui_check_link(lmac); 4434863dea3SSunil Goutham } 4444863dea3SSunil Goutham 4454863dea3SSunil Goutham u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx) 4464863dea3SSunil Goutham { 4474863dea3SSunil Goutham struct bgx *bgx; 4484863dea3SSunil Goutham 44978aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx); 4504863dea3SSunil Goutham if (!bgx) 4514863dea3SSunil Goutham return 0; 4524863dea3SSunil Goutham 4534863dea3SSunil Goutham if (idx > 8) 4544863dea3SSunil Goutham lmac = 0; 4554863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8)); 4564863dea3SSunil Goutham } 4574863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_rx_stats); 4584863dea3SSunil Goutham 4594863dea3SSunil Goutham u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx) 4604863dea3SSunil Goutham { 4614863dea3SSunil Goutham struct bgx *bgx; 4624863dea3SSunil Goutham 46378aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx); 4644863dea3SSunil Goutham if (!bgx) 4654863dea3SSunil Goutham return 0; 4664863dea3SSunil Goutham 4674863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8)); 4684863dea3SSunil Goutham } 4694863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_tx_stats); 4704863dea3SSunil Goutham 4714863dea3SSunil Goutham static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac) 4724863dea3SSunil Goutham { 4734863dea3SSunil Goutham u64 offset; 4744863dea3SSunil Goutham 4754863dea3SSunil Goutham while (bgx->lmac[lmac].dmac > 0) { 4764863dea3SSunil Goutham offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) + 4774863dea3SSunil Goutham (lmac * MAX_DMAC_PER_LMAC * sizeof(u64)); 4784863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0); 4794863dea3SSunil Goutham bgx->lmac[lmac].dmac--; 4804863dea3SSunil Goutham } 4814863dea3SSunil Goutham } 4824863dea3SSunil Goutham 483d77a2384SSunil Goutham /* Configure BGX LMAC in internal loopback mode */ 484d77a2384SSunil Goutham void bgx_lmac_internal_loopback(int node, int bgx_idx, 485d77a2384SSunil Goutham int lmac_idx, bool enable) 486d77a2384SSunil Goutham { 487d77a2384SSunil Goutham struct bgx *bgx; 488d77a2384SSunil Goutham struct lmac *lmac; 489d77a2384SSunil Goutham u64 cfg; 490d77a2384SSunil Goutham 49178aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx); 492d77a2384SSunil Goutham if (!bgx) 493d77a2384SSunil Goutham return; 494d77a2384SSunil Goutham 495d77a2384SSunil Goutham lmac = &bgx->lmac[lmac_idx]; 496d77a2384SSunil Goutham if (lmac->is_sgmii) { 497d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL); 498d77a2384SSunil Goutham if (enable) 499d77a2384SSunil Goutham cfg |= PCS_MRX_CTL_LOOPBACK1; 500d77a2384SSunil Goutham else 501d77a2384SSunil Goutham cfg &= ~PCS_MRX_CTL_LOOPBACK1; 502d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg); 503d77a2384SSunil Goutham } else { 504d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1); 505d77a2384SSunil Goutham if (enable) 506d77a2384SSunil Goutham cfg |= SPU_CTL_LOOPBACK; 507d77a2384SSunil Goutham else 508d77a2384SSunil Goutham cfg &= ~SPU_CTL_LOOPBACK; 509d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg); 510d77a2384SSunil Goutham } 511d77a2384SSunil Goutham } 512d77a2384SSunil Goutham EXPORT_SYMBOL(bgx_lmac_internal_loopback); 513d77a2384SSunil Goutham 5143f8057cfSSunil Goutham static int bgx_lmac_sgmii_init(struct bgx *bgx, struct lmac *lmac) 5154863dea3SSunil Goutham { 5163f8057cfSSunil Goutham int lmacid = lmac->lmacid; 5174863dea3SSunil Goutham u64 cfg; 5184863dea3SSunil Goutham 5194863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); 5204863dea3SSunil Goutham /* max packet size */ 5214863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE); 5224863dea3SSunil Goutham 5234863dea3SSunil Goutham /* Disable frame alignment if using preamble */ 5244863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 5254863dea3SSunil Goutham if (cfg & 1) 5264863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0); 5274863dea3SSunil Goutham 5284863dea3SSunil Goutham /* Enable lmac */ 5294863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 5304863dea3SSunil Goutham 5314863dea3SSunil Goutham /* PCS reset */ 5324863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET); 5334863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, 5344863dea3SSunil Goutham PCS_MRX_CTL_RESET, true)) { 5354863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n"); 5364863dea3SSunil Goutham return -1; 5374863dea3SSunil Goutham } 5384863dea3SSunil Goutham 5394863dea3SSunil Goutham /* power down, reset autoneg, autoneg enable */ 5404863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL); 5414863dea3SSunil Goutham cfg &= ~PCS_MRX_CTL_PWR_DN; 542075ad765SThanneeru Srinivasulu cfg |= PCS_MRX_CTL_RST_AN; 543075ad765SThanneeru Srinivasulu if (lmac->phydev) { 544075ad765SThanneeru Srinivasulu cfg |= PCS_MRX_CTL_AN_EN; 545075ad765SThanneeru Srinivasulu } else { 546075ad765SThanneeru Srinivasulu /* In scenarios where PHY driver is not present or it's a 547075ad765SThanneeru Srinivasulu * non-standard PHY, FW sets AN_EN to inform Linux driver 548075ad765SThanneeru Srinivasulu * to do auto-neg and link polling or not. 549075ad765SThanneeru Srinivasulu */ 550075ad765SThanneeru Srinivasulu if (cfg & PCS_MRX_CTL_AN_EN) 551075ad765SThanneeru Srinivasulu lmac->autoneg = true; 552075ad765SThanneeru Srinivasulu } 5534863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); 5544863dea3SSunil Goutham 5553f8057cfSSunil Goutham if (lmac->lmac_type == BGX_MODE_QSGMII) { 5563f8057cfSSunil Goutham /* Disable disparity check for QSGMII */ 5573f8057cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL); 5583f8057cfSSunil Goutham cfg &= ~PCS_MISC_CTL_DISP_EN; 5593f8057cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL, cfg); 5603f8057cfSSunil Goutham return 0; 5613f8057cfSSunil Goutham } 5623f8057cfSSunil Goutham 563075ad765SThanneeru Srinivasulu if ((lmac->lmac_type == BGX_MODE_SGMII) && lmac->phydev) { 5644863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS, 5654863dea3SSunil Goutham PCS_MRX_STATUS_AN_CPT, false)) { 5664863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n"); 5674863dea3SSunil Goutham return -1; 5684863dea3SSunil Goutham } 5696465859aSSunil Goutham } 5704863dea3SSunil Goutham 5714863dea3SSunil Goutham return 0; 5724863dea3SSunil Goutham } 5734863dea3SSunil Goutham 5740bcb7d51SSunil Goutham static int bgx_lmac_xaui_init(struct bgx *bgx, struct lmac *lmac) 5754863dea3SSunil Goutham { 5764863dea3SSunil Goutham u64 cfg; 5770bcb7d51SSunil Goutham int lmacid = lmac->lmacid; 5784863dea3SSunil Goutham 5794863dea3SSunil Goutham /* Reset SPU */ 5804863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET); 5814863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 5824863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 5834863dea3SSunil Goutham return -1; 5844863dea3SSunil Goutham } 5854863dea3SSunil Goutham 5864863dea3SSunil Goutham /* Disable LMAC */ 5874863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 5884863dea3SSunil Goutham cfg &= ~CMR_EN; 5894863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 5904863dea3SSunil Goutham 5914863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 5924863dea3SSunil Goutham /* Set interleaved running disparity for RXAUI */ 59393db2cf8SSunil Goutham if (lmac->lmac_type == BGX_MODE_RXAUI) 5944863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, 59593db2cf8SSunil Goutham SPU_MISC_CTL_INTLV_RDISP); 59693db2cf8SSunil Goutham 59793db2cf8SSunil Goutham /* Clear receive packet disable */ 59893db2cf8SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); 59993db2cf8SSunil Goutham cfg &= ~SPU_MISC_CTL_RX_DIS; 60093db2cf8SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); 6014863dea3SSunil Goutham 6024863dea3SSunil Goutham /* clear all interrupts */ 6034863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT); 6044863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg); 6054863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT); 6064863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg); 6074863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 6084863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 6094863dea3SSunil Goutham 6100bcb7d51SSunil Goutham if (lmac->use_training) { 6114863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00); 6124863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00); 6134863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00); 6144863dea3SSunil Goutham /* training enable */ 6154863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 6164863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, SPU_PMD_CRTL_TRAIN_EN); 6174863dea3SSunil Goutham } 6184863dea3SSunil Goutham 6194863dea3SSunil Goutham /* Append FCS to each packet */ 6204863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D); 6214863dea3SSunil Goutham 6224863dea3SSunil Goutham /* Disable forward error correction */ 6234863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL); 6244863dea3SSunil Goutham cfg &= ~SPU_FEC_CTL_FEC_EN; 6254863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg); 6264863dea3SSunil Goutham 6274863dea3SSunil Goutham /* Disable autoneg */ 6284863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL); 6294863dea3SSunil Goutham cfg = cfg & ~(SPU_AN_CTL_AN_EN | SPU_AN_CTL_XNP_EN); 6304863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg); 6314863dea3SSunil Goutham 6324863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV); 6330bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_10G_KR) 6344863dea3SSunil Goutham cfg |= (1 << 23); 6350bcb7d51SSunil Goutham else if (lmac->lmac_type == BGX_MODE_40G_KR) 6364863dea3SSunil Goutham cfg |= (1 << 24); 6374863dea3SSunil Goutham else 6384863dea3SSunil Goutham cfg &= ~((1 << 23) | (1 << 24)); 6394863dea3SSunil Goutham cfg = cfg & (~((1ULL << 25) | (1ULL << 22) | (1ULL << 12))); 6404863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg); 6414863dea3SSunil Goutham 6424863dea3SSunil Goutham cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL); 6434863dea3SSunil Goutham cfg &= ~SPU_DBG_CTL_AN_ARB_LINK_CHK_EN; 6444863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg); 6454863dea3SSunil Goutham 6464863dea3SSunil Goutham /* Enable lmac */ 6474863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 6484863dea3SSunil Goutham 6494863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1); 6504863dea3SSunil Goutham cfg &= ~SPU_CTL_LOW_POWER; 6514863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg); 6524863dea3SSunil Goutham 6534863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL); 6544863dea3SSunil Goutham cfg &= ~SMU_TX_CTL_UNI_EN; 6554863dea3SSunil Goutham cfg |= SMU_TX_CTL_DIC_EN; 6564863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg); 6574863dea3SSunil Goutham 658430da208SSunil Goutham /* Enable receive and transmission of pause frames */ 659430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_CBFC_CTL, ((0xffffULL << 32) | 660430da208SSunil Goutham BCK_EN | DRP_EN | TX_EN | RX_EN)); 661430da208SSunil Goutham /* Configure pause time and interval */ 662430da208SSunil Goutham bgx_reg_write(bgx, lmacid, 663430da208SSunil Goutham BGX_SMUX_TX_PAUSE_PKT_TIME, DEFAULT_PAUSE_TIME); 664430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_PAUSE_PKT_INTERVAL); 665430da208SSunil Goutham cfg &= ~0xFFFFull; 666430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_PAUSE_PKT_INTERVAL, 667430da208SSunil Goutham cfg | (DEFAULT_PAUSE_TIME - 0x1000)); 668430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_PAUSE_ZERO, 0x01); 669430da208SSunil Goutham 6704863dea3SSunil Goutham /* take lmac_count into account */ 6714863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1)); 6724863dea3SSunil Goutham /* max packet size */ 6734863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); 6744863dea3SSunil Goutham 6754863dea3SSunil Goutham return 0; 6764863dea3SSunil Goutham } 6774863dea3SSunil Goutham 6784863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac) 6794863dea3SSunil Goutham { 6804863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 6814863dea3SSunil Goutham int lmacid = lmac->lmacid; 6820bcb7d51SSunil Goutham int lmac_type = lmac->lmac_type; 6834863dea3SSunil Goutham u64 cfg; 6844863dea3SSunil Goutham 6850bcb7d51SSunil Goutham if (lmac->use_training) { 6864863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 6874863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 6884863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 6894863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 6904863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL); 6914863dea3SSunil Goutham cfg |= (1ull << 0); 6924863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg); 6934863dea3SSunil Goutham return -1; 6944863dea3SSunil Goutham } 6954863dea3SSunil Goutham } 6964863dea3SSunil Goutham 6974863dea3SSunil Goutham /* wait for PCS to come out of reset */ 6984863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 6994863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 7004863dea3SSunil Goutham return -1; 7014863dea3SSunil Goutham } 7024863dea3SSunil Goutham 7034863dea3SSunil Goutham if ((lmac_type == BGX_MODE_10G_KR) || (lmac_type == BGX_MODE_XFI) || 7044863dea3SSunil Goutham (lmac_type == BGX_MODE_40G_KR) || (lmac_type == BGX_MODE_XLAUI)) { 7054863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1, 7064863dea3SSunil Goutham SPU_BR_STATUS_BLK_LOCK, false)) { 7074863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 7084863dea3SSunil Goutham "SPU_BR_STATUS_BLK_LOCK not completed\n"); 7094863dea3SSunil Goutham return -1; 7104863dea3SSunil Goutham } 7114863dea3SSunil Goutham } else { 7124863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS, 7134863dea3SSunil Goutham SPU_BX_STATUS_RX_ALIGN, false)) { 7144863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 7154863dea3SSunil Goutham "SPU_BX_STATUS_RX_ALIGN not completed\n"); 7164863dea3SSunil Goutham return -1; 7174863dea3SSunil Goutham } 7184863dea3SSunil Goutham } 7194863dea3SSunil Goutham 7204863dea3SSunil Goutham /* Clear rcvflt bit (latching high) and read it back */ 7213f4c68cfSSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) 7223f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7233f4c68cfSSunil Goutham BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 7244863dea3SSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 7254863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); 7260bcb7d51SSunil Goutham if (lmac->use_training) { 7274863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 7284863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 7294863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 7304863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 7314863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, 7324863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL); 7334863dea3SSunil Goutham cfg |= (1ull << 0); 7344863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, 7354863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, cfg); 7364863dea3SSunil Goutham return -1; 7374863dea3SSunil Goutham } 7384863dea3SSunil Goutham } 7394863dea3SSunil Goutham return -1; 7404863dea3SSunil Goutham } 7414863dea3SSunil Goutham 7424863dea3SSunil Goutham /* Wait for BGX RX to be idle */ 7434863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { 7444863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); 7454863dea3SSunil Goutham return -1; 7464863dea3SSunil Goutham } 7474863dea3SSunil Goutham 7484863dea3SSunil Goutham /* Wait for BGX TX to be idle */ 7494863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) { 7504863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU TX not idle\n"); 7514863dea3SSunil Goutham return -1; 7524863dea3SSunil Goutham } 7534863dea3SSunil Goutham 7543f4c68cfSSunil Goutham /* Check for MAC RX faults */ 7553f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL); 7563f4c68cfSSunil Goutham /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */ 7573f4c68cfSSunil Goutham cfg &= SMU_RX_CTL_STATUS; 7583f4c68cfSSunil Goutham if (!cfg) 7594863dea3SSunil Goutham return 0; 7603f4c68cfSSunil Goutham 7613f4c68cfSSunil Goutham /* Rx local/remote fault seen. 7623f4c68cfSSunil Goutham * Do lmac reinit to see if condition recovers 7633f4c68cfSSunil Goutham */ 7640bcb7d51SSunil Goutham bgx_lmac_xaui_init(bgx, lmac); 7653f4c68cfSSunil Goutham 7663f4c68cfSSunil Goutham return -1; 7674863dea3SSunil Goutham } 7684863dea3SSunil Goutham 769075ad765SThanneeru Srinivasulu static void bgx_poll_for_sgmii_link(struct lmac *lmac) 770075ad765SThanneeru Srinivasulu { 771075ad765SThanneeru Srinivasulu u64 pcs_link, an_result; 772075ad765SThanneeru Srinivasulu u8 speed; 773075ad765SThanneeru Srinivasulu 774075ad765SThanneeru Srinivasulu pcs_link = bgx_reg_read(lmac->bgx, lmac->lmacid, 775075ad765SThanneeru Srinivasulu BGX_GMP_PCS_MRX_STATUS); 776075ad765SThanneeru Srinivasulu 777075ad765SThanneeru Srinivasulu /*Link state bit is sticky, read it again*/ 778075ad765SThanneeru Srinivasulu if (!(pcs_link & PCS_MRX_STATUS_LINK)) 779075ad765SThanneeru Srinivasulu pcs_link = bgx_reg_read(lmac->bgx, lmac->lmacid, 780075ad765SThanneeru Srinivasulu BGX_GMP_PCS_MRX_STATUS); 781075ad765SThanneeru Srinivasulu 782075ad765SThanneeru Srinivasulu if (bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_GMP_PCS_MRX_STATUS, 783075ad765SThanneeru Srinivasulu PCS_MRX_STATUS_AN_CPT, false)) { 784075ad765SThanneeru Srinivasulu lmac->link_up = false; 785075ad765SThanneeru Srinivasulu lmac->last_speed = SPEED_UNKNOWN; 786075ad765SThanneeru Srinivasulu lmac->last_duplex = DUPLEX_UNKNOWN; 787075ad765SThanneeru Srinivasulu goto next_poll; 788075ad765SThanneeru Srinivasulu } 789075ad765SThanneeru Srinivasulu 790075ad765SThanneeru Srinivasulu lmac->link_up = ((pcs_link & PCS_MRX_STATUS_LINK) != 0) ? true : false; 791075ad765SThanneeru Srinivasulu an_result = bgx_reg_read(lmac->bgx, lmac->lmacid, 792075ad765SThanneeru Srinivasulu BGX_GMP_PCS_ANX_AN_RESULTS); 793075ad765SThanneeru Srinivasulu 794075ad765SThanneeru Srinivasulu speed = (an_result >> 3) & 0x3; 795075ad765SThanneeru Srinivasulu lmac->last_duplex = (an_result >> 1) & 0x1; 796075ad765SThanneeru Srinivasulu switch (speed) { 797075ad765SThanneeru Srinivasulu case 0: 798075ad765SThanneeru Srinivasulu lmac->last_speed = 10; 799075ad765SThanneeru Srinivasulu break; 800075ad765SThanneeru Srinivasulu case 1: 801075ad765SThanneeru Srinivasulu lmac->last_speed = 100; 802075ad765SThanneeru Srinivasulu break; 803075ad765SThanneeru Srinivasulu case 2: 804075ad765SThanneeru Srinivasulu lmac->last_speed = 1000; 805075ad765SThanneeru Srinivasulu break; 806075ad765SThanneeru Srinivasulu default: 807075ad765SThanneeru Srinivasulu lmac->link_up = false; 808075ad765SThanneeru Srinivasulu lmac->last_speed = SPEED_UNKNOWN; 809075ad765SThanneeru Srinivasulu lmac->last_duplex = DUPLEX_UNKNOWN; 810075ad765SThanneeru Srinivasulu break; 811075ad765SThanneeru Srinivasulu } 812075ad765SThanneeru Srinivasulu 813075ad765SThanneeru Srinivasulu next_poll: 814075ad765SThanneeru Srinivasulu 815075ad765SThanneeru Srinivasulu if (lmac->last_link != lmac->link_up) { 816075ad765SThanneeru Srinivasulu if (lmac->link_up) 817075ad765SThanneeru Srinivasulu bgx_sgmii_change_link_state(lmac); 818075ad765SThanneeru Srinivasulu lmac->last_link = lmac->link_up; 819075ad765SThanneeru Srinivasulu } 820075ad765SThanneeru Srinivasulu 821075ad765SThanneeru Srinivasulu queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 3); 822075ad765SThanneeru Srinivasulu } 823075ad765SThanneeru Srinivasulu 8244863dea3SSunil Goutham static void bgx_poll_for_link(struct work_struct *work) 8254863dea3SSunil Goutham { 8264863dea3SSunil Goutham struct lmac *lmac; 8273f4c68cfSSunil Goutham u64 spu_link, smu_link; 8284863dea3SSunil Goutham 8294863dea3SSunil Goutham lmac = container_of(work, struct lmac, dwork.work); 830075ad765SThanneeru Srinivasulu if (lmac->is_sgmii) { 831075ad765SThanneeru Srinivasulu bgx_poll_for_sgmii_link(lmac); 832075ad765SThanneeru Srinivasulu return; 833075ad765SThanneeru Srinivasulu } 8344863dea3SSunil Goutham 8354863dea3SSunil Goutham /* Receive link is latching low. Force it high and verify it */ 8364863dea3SSunil Goutham bgx_reg_modify(lmac->bgx, lmac->lmacid, 8374863dea3SSunil Goutham BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); 8384863dea3SSunil Goutham bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, 8394863dea3SSunil Goutham SPU_STATUS1_RCV_LNK, false); 8404863dea3SSunil Goutham 8413f4c68cfSSunil Goutham spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 8423f4c68cfSSunil Goutham smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); 8433f4c68cfSSunil Goutham 8443f4c68cfSSunil Goutham if ((spu_link & SPU_STATUS1_RCV_LNK) && 8453f4c68cfSSunil Goutham !(smu_link & SMU_RX_CTL_STATUS)) { 8464863dea3SSunil Goutham lmac->link_up = 1; 8470bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_XLAUI) 8484863dea3SSunil Goutham lmac->last_speed = 40000; 8494863dea3SSunil Goutham else 8504863dea3SSunil Goutham lmac->last_speed = 10000; 8514863dea3SSunil Goutham lmac->last_duplex = 1; 8524863dea3SSunil Goutham } else { 8534863dea3SSunil Goutham lmac->link_up = 0; 8540b72a9a1SSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 8550b72a9a1SSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 8564863dea3SSunil Goutham } 8574863dea3SSunil Goutham 8584863dea3SSunil Goutham if (lmac->last_link != lmac->link_up) { 8593f4c68cfSSunil Goutham if (lmac->link_up) { 8603f4c68cfSSunil Goutham if (bgx_xaui_check_link(lmac)) { 8613f4c68cfSSunil Goutham /* Errors, clear link_up state */ 8623f4c68cfSSunil Goutham lmac->link_up = 0; 8633f4c68cfSSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 8643f4c68cfSSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 8653f4c68cfSSunil Goutham } 8663f4c68cfSSunil Goutham } 8674863dea3SSunil Goutham lmac->last_link = lmac->link_up; 8684863dea3SSunil Goutham } 8694863dea3SSunil Goutham 8704863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); 8714863dea3SSunil Goutham } 8724863dea3SSunil Goutham 8733f8057cfSSunil Goutham static int phy_interface_mode(u8 lmac_type) 8743f8057cfSSunil Goutham { 8753f8057cfSSunil Goutham if (lmac_type == BGX_MODE_QSGMII) 8763f8057cfSSunil Goutham return PHY_INTERFACE_MODE_QSGMII; 8776465859aSSunil Goutham if (lmac_type == BGX_MODE_RGMII) 8786465859aSSunil Goutham return PHY_INTERFACE_MODE_RGMII; 8793f8057cfSSunil Goutham 8803f8057cfSSunil Goutham return PHY_INTERFACE_MODE_SGMII; 8813f8057cfSSunil Goutham } 8823f8057cfSSunil Goutham 8834863dea3SSunil Goutham static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid) 8844863dea3SSunil Goutham { 8854863dea3SSunil Goutham struct lmac *lmac; 8864863dea3SSunil Goutham u64 cfg; 8874863dea3SSunil Goutham 8884863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 8894863dea3SSunil Goutham lmac->bgx = bgx; 8904863dea3SSunil Goutham 8913f8057cfSSunil Goutham if ((lmac->lmac_type == BGX_MODE_SGMII) || 8926465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_QSGMII) || 8936465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_RGMII)) { 8944863dea3SSunil Goutham lmac->is_sgmii = 1; 8953f8057cfSSunil Goutham if (bgx_lmac_sgmii_init(bgx, lmac)) 8964863dea3SSunil Goutham return -1; 8974863dea3SSunil Goutham } else { 8984863dea3SSunil Goutham lmac->is_sgmii = 0; 8990bcb7d51SSunil Goutham if (bgx_lmac_xaui_init(bgx, lmac)) 9004863dea3SSunil Goutham return -1; 9014863dea3SSunil Goutham } 9024863dea3SSunil Goutham 9034863dea3SSunil Goutham if (lmac->is_sgmii) { 9044863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 9054863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 9064863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg); 9074863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1); 9084863dea3SSunil Goutham } else { 9094863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND); 9104863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 9114863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg); 9124863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4); 9134863dea3SSunil Goutham } 9144863dea3SSunil Goutham 9154863dea3SSunil Goutham /* Enable lmac */ 916bc69fdfcSSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 9174863dea3SSunil Goutham 9184863dea3SSunil Goutham /* Restore default cfg, incase low level firmware changed it */ 9194863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03); 9204863dea3SSunil Goutham 9210bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 9220bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 9230bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 9240bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR)) { 925075ad765SThanneeru Srinivasulu if (!lmac->phydev) { 926075ad765SThanneeru Srinivasulu if (lmac->autoneg) { 927075ad765SThanneeru Srinivasulu bgx_reg_write(bgx, lmacid, 928075ad765SThanneeru Srinivasulu BGX_GMP_PCS_LINKX_TIMER, 929075ad765SThanneeru Srinivasulu PCS_LINKX_TIMER_COUNT); 930075ad765SThanneeru Srinivasulu goto poll; 931075ad765SThanneeru Srinivasulu } else { 932075ad765SThanneeru Srinivasulu /* Default to below link speed and duplex */ 933075ad765SThanneeru Srinivasulu lmac->link_up = true; 934075ad765SThanneeru Srinivasulu lmac->last_speed = 1000; 935075ad765SThanneeru Srinivasulu lmac->last_duplex = 1; 936075ad765SThanneeru Srinivasulu bgx_sgmii_change_link_state(lmac); 937075ad765SThanneeru Srinivasulu return 0; 938075ad765SThanneeru Srinivasulu } 939075ad765SThanneeru Srinivasulu } 9404863dea3SSunil Goutham lmac->phydev->dev_flags = 0; 9414863dea3SSunil Goutham 9424863dea3SSunil Goutham if (phy_connect_direct(&lmac->netdev, lmac->phydev, 9434863dea3SSunil Goutham bgx_lmac_handler, 9443f8057cfSSunil Goutham phy_interface_mode(lmac->lmac_type))) 9454863dea3SSunil Goutham return -ENODEV; 9464863dea3SSunil Goutham 9474863dea3SSunil Goutham phy_start_aneg(lmac->phydev); 948075ad765SThanneeru Srinivasulu return 0; 949075ad765SThanneeru Srinivasulu } 950075ad765SThanneeru Srinivasulu 951075ad765SThanneeru Srinivasulu poll: 9524863dea3SSunil Goutham lmac->check_link = alloc_workqueue("check_link", WQ_UNBOUND | 9534863dea3SSunil Goutham WQ_MEM_RECLAIM, 1); 9544863dea3SSunil Goutham if (!lmac->check_link) 9554863dea3SSunil Goutham return -ENOMEM; 9564863dea3SSunil Goutham INIT_DELAYED_WORK(&lmac->dwork, bgx_poll_for_link); 9574863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, 0); 9584863dea3SSunil Goutham 9594863dea3SSunil Goutham return 0; 9604863dea3SSunil Goutham } 9614863dea3SSunil Goutham 962fd7ec062SAleksey Makarov static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) 9634863dea3SSunil Goutham { 9644863dea3SSunil Goutham struct lmac *lmac; 9653f4c68cfSSunil Goutham u64 cfg; 9664863dea3SSunil Goutham 9674863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 9684863dea3SSunil Goutham if (lmac->check_link) { 9694863dea3SSunil Goutham /* Destroy work queue */ 970a7b1f535SThanneeru Srinivasulu cancel_delayed_work_sync(&lmac->dwork); 9714863dea3SSunil Goutham destroy_workqueue(lmac->check_link); 9724863dea3SSunil Goutham } 9734863dea3SSunil Goutham 9743f4c68cfSSunil Goutham /* Disable packet reception */ 9753f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 9763f4c68cfSSunil Goutham cfg &= ~CMR_PKT_RX_EN; 9773f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 9783f4c68cfSSunil Goutham 9793f4c68cfSSunil Goutham /* Give chance for Rx/Tx FIFO to get drained */ 9803f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true); 9813f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true); 9823f4c68cfSSunil Goutham 9833f4c68cfSSunil Goutham /* Disable packet transmission */ 9843f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 9853f4c68cfSSunil Goutham cfg &= ~CMR_PKT_TX_EN; 9863f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 9873f4c68cfSSunil Goutham 9883f4c68cfSSunil Goutham /* Disable serdes lanes */ 9893f4c68cfSSunil Goutham if (!lmac->is_sgmii) 9903f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 9913f4c68cfSSunil Goutham BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 9923f4c68cfSSunil Goutham else 9933f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 9943f4c68cfSSunil Goutham BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN); 9953f4c68cfSSunil Goutham 9963f4c68cfSSunil Goutham /* Disable LMAC */ 9973f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 9983f4c68cfSSunil Goutham cfg &= ~CMR_EN; 9993f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 10003f4c68cfSSunil Goutham 10014863dea3SSunil Goutham bgx_flush_dmac_addrs(bgx, lmacid); 10024863dea3SSunil Goutham 10030bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 10040bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 10050bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 10060bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) 10074863dea3SSunil Goutham phy_disconnect(lmac->phydev); 10084863dea3SSunil Goutham 10094863dea3SSunil Goutham lmac->phydev = NULL; 10104863dea3SSunil Goutham } 10114863dea3SSunil Goutham 10124863dea3SSunil Goutham static void bgx_init_hw(struct bgx *bgx) 10134863dea3SSunil Goutham { 10144863dea3SSunil Goutham int i; 10150bcb7d51SSunil Goutham struct lmac *lmac; 10164863dea3SSunil Goutham 10174863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP); 10184863dea3SSunil Goutham if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS)) 10194863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id); 10204863dea3SSunil Goutham 10214863dea3SSunil Goutham /* Set lmac type and lane2serdes mapping */ 10224863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) { 10230bcb7d51SSunil Goutham lmac = &bgx->lmac[i]; 10244863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG, 10250bcb7d51SSunil Goutham (lmac->lmac_type << 8) | lmac->lane_to_sds); 10264863dea3SSunil Goutham bgx->lmac[i].lmacid_bd = lmac_count; 10274863dea3SSunil Goutham lmac_count++; 10284863dea3SSunil Goutham } 10294863dea3SSunil Goutham 10304863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count); 10314863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count); 10324863dea3SSunil Goutham 10334863dea3SSunil Goutham /* Set the backpressure AND mask */ 10344863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) 10354863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND, 10364863dea3SSunil Goutham ((1ULL << MAX_BGX_CHANS_PER_LMAC) - 1) << 10374863dea3SSunil Goutham (i * MAX_BGX_CHANS_PER_LMAC)); 10384863dea3SSunil Goutham 10394863dea3SSunil Goutham /* Disable all MAC filtering */ 10404863dea3SSunil Goutham for (i = 0; i < RX_DMAC_COUNT; i++) 10414863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00); 10424863dea3SSunil Goutham 10434863dea3SSunil Goutham /* Disable MAC steering (NCSI traffic) */ 10444863dea3SSunil Goutham for (i = 0; i < RX_TRAFFIC_STEER_RULE_COUNT; i++) 10454863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00); 10464863dea3SSunil Goutham } 10474863dea3SSunil Goutham 10483f8057cfSSunil Goutham static u8 bgx_get_lane2sds_cfg(struct bgx *bgx, struct lmac *lmac) 10493f8057cfSSunil Goutham { 10503f8057cfSSunil Goutham return (u8)(bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG) & 0xFF); 10513f8057cfSSunil Goutham } 10523f8057cfSSunil Goutham 10530bcb7d51SSunil Goutham static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid) 10544863dea3SSunil Goutham { 10554863dea3SSunil Goutham struct device *dev = &bgx->pdev->dev; 10560bcb7d51SSunil Goutham struct lmac *lmac; 1057c41626ceSArnd Bergmann char str[27]; 105857aaf63cSSunil Goutham 1059fff37fdaSSunil Goutham if (!bgx->is_dlm && lmacid) 106057aaf63cSSunil Goutham return; 10610bcb7d51SSunil Goutham 10620bcb7d51SSunil Goutham lmac = &bgx->lmac[lmacid]; 106309de3917SSunil Goutham if (!bgx->is_dlm) 10640bcb7d51SSunil Goutham sprintf(str, "BGX%d QLM mode", bgx->bgx_id); 106557aaf63cSSunil Goutham else 1066fff37fdaSSunil Goutham sprintf(str, "BGX%d LMAC%d mode", bgx->bgx_id, lmacid); 10670bcb7d51SSunil Goutham 10680bcb7d51SSunil Goutham switch (lmac->lmac_type) { 10690bcb7d51SSunil Goutham case BGX_MODE_SGMII: 10700bcb7d51SSunil Goutham dev_info(dev, "%s: SGMII\n", (char *)str); 10710bcb7d51SSunil Goutham break; 10720bcb7d51SSunil Goutham case BGX_MODE_XAUI: 10730bcb7d51SSunil Goutham dev_info(dev, "%s: XAUI\n", (char *)str); 10740bcb7d51SSunil Goutham break; 10750bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 10760bcb7d51SSunil Goutham dev_info(dev, "%s: RXAUI\n", (char *)str); 10770bcb7d51SSunil Goutham break; 10780bcb7d51SSunil Goutham case BGX_MODE_XFI: 10790bcb7d51SSunil Goutham if (!lmac->use_training) 10800bcb7d51SSunil Goutham dev_info(dev, "%s: XFI\n", (char *)str); 10810bcb7d51SSunil Goutham else 10820bcb7d51SSunil Goutham dev_info(dev, "%s: 10G_KR\n", (char *)str); 10830bcb7d51SSunil Goutham break; 10840bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 10850bcb7d51SSunil Goutham if (!lmac->use_training) 10860bcb7d51SSunil Goutham dev_info(dev, "%s: XLAUI\n", (char *)str); 10870bcb7d51SSunil Goutham else 10880bcb7d51SSunil Goutham dev_info(dev, "%s: 40G_KR4\n", (char *)str); 10890bcb7d51SSunil Goutham break; 10903f8057cfSSunil Goutham case BGX_MODE_QSGMII: 10913f8057cfSSunil Goutham dev_info(dev, "%s: QSGMII\n", (char *)str); 10923f8057cfSSunil Goutham break; 10936465859aSSunil Goutham case BGX_MODE_RGMII: 10946465859aSSunil Goutham dev_info(dev, "%s: RGMII\n", (char *)str); 10956465859aSSunil Goutham break; 10963f8057cfSSunil Goutham case BGX_MODE_INVALID: 10973f8057cfSSunil Goutham /* Nothing to do */ 10983f8057cfSSunil Goutham break; 10990bcb7d51SSunil Goutham } 11000bcb7d51SSunil Goutham } 11010bcb7d51SSunil Goutham 11023f8057cfSSunil Goutham static void lmac_set_lane2sds(struct bgx *bgx, struct lmac *lmac) 11030bcb7d51SSunil Goutham { 11040bcb7d51SSunil Goutham switch (lmac->lmac_type) { 11050bcb7d51SSunil Goutham case BGX_MODE_SGMII: 11060bcb7d51SSunil Goutham case BGX_MODE_XFI: 11070bcb7d51SSunil Goutham lmac->lane_to_sds = lmac->lmacid; 11080bcb7d51SSunil Goutham break; 11090bcb7d51SSunil Goutham case BGX_MODE_XAUI: 11100bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 11116465859aSSunil Goutham case BGX_MODE_RGMII: 11120bcb7d51SSunil Goutham lmac->lane_to_sds = 0xE4; 11130bcb7d51SSunil Goutham break; 11140bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 11150bcb7d51SSunil Goutham lmac->lane_to_sds = (lmac->lmacid) ? 0xE : 0x4; 11160bcb7d51SSunil Goutham break; 11173f8057cfSSunil Goutham case BGX_MODE_QSGMII: 11183f8057cfSSunil Goutham /* There is no way to determine if DLM0/2 is QSGMII or 11193f8057cfSSunil Goutham * DLM1/3 is configured to QSGMII as bootloader will 11203f8057cfSSunil Goutham * configure all LMACs, so take whatever is configured 11213f8057cfSSunil Goutham * by low level firmware. 11223f8057cfSSunil Goutham */ 11233f8057cfSSunil Goutham lmac->lane_to_sds = bgx_get_lane2sds_cfg(bgx, lmac); 11243f8057cfSSunil Goutham break; 11250bcb7d51SSunil Goutham default: 11260bcb7d51SSunil Goutham lmac->lane_to_sds = 0; 11270bcb7d51SSunil Goutham break; 11280bcb7d51SSunil Goutham } 11290bcb7d51SSunil Goutham } 11300bcb7d51SSunil Goutham 11316465859aSSunil Goutham static void lmac_set_training(struct bgx *bgx, struct lmac *lmac, int lmacid) 11326465859aSSunil Goutham { 11336465859aSSunil Goutham if ((lmac->lmac_type != BGX_MODE_10G_KR) && 11346465859aSSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR)) { 11356465859aSSunil Goutham lmac->use_training = 0; 11366465859aSSunil Goutham return; 11376465859aSSunil Goutham } 11386465859aSSunil Goutham 11396465859aSSunil Goutham lmac->use_training = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL) & 11406465859aSSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 11416465859aSSunil Goutham } 11426465859aSSunil Goutham 11430bcb7d51SSunil Goutham static void bgx_set_lmac_config(struct bgx *bgx, u8 idx) 11440bcb7d51SSunil Goutham { 11450bcb7d51SSunil Goutham struct lmac *lmac; 11460bcb7d51SSunil Goutham u64 cmr_cfg; 114757aaf63cSSunil Goutham u8 lmac_type; 114857aaf63cSSunil Goutham u8 lane_to_sds; 11490bcb7d51SSunil Goutham 11500bcb7d51SSunil Goutham lmac = &bgx->lmac[idx]; 11514863dea3SSunil Goutham 115209de3917SSunil Goutham if (!bgx->is_dlm || bgx->is_rgx) { 11534863dea3SSunil Goutham /* Read LMAC0 type to figure out QLM mode 11544863dea3SSunil Goutham * This is configured by low level firmware 11554863dea3SSunil Goutham */ 11560bcb7d51SSunil Goutham cmr_cfg = bgx_reg_read(bgx, 0, BGX_CMRX_CFG); 11570bcb7d51SSunil Goutham lmac->lmac_type = (cmr_cfg >> 8) & 0x07; 11586465859aSSunil Goutham if (bgx->is_rgx) 11596465859aSSunil Goutham lmac->lmac_type = BGX_MODE_RGMII; 11606465859aSSunil Goutham lmac_set_training(bgx, lmac, 0); 11613f8057cfSSunil Goutham lmac_set_lane2sds(bgx, lmac); 116257aaf63cSSunil Goutham return; 116357aaf63cSSunil Goutham } 116457aaf63cSSunil Goutham 1165fff37fdaSSunil Goutham /* For DLMs or SLMs on 80/81/83xx so many lane configurations 1166fff37fdaSSunil Goutham * are possible and vary across boards. Also Kernel doesn't have 1167fff37fdaSSunil Goutham * any way to identify board type/info and since firmware does, 1168fff37fdaSSunil Goutham * just take lmac type and serdes lane config as is. 116957aaf63cSSunil Goutham */ 117057aaf63cSSunil Goutham cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG); 117157aaf63cSSunil Goutham lmac_type = (u8)((cmr_cfg >> 8) & 0x07); 117257aaf63cSSunil Goutham lane_to_sds = (u8)(cmr_cfg & 0xFF); 1173fff37fdaSSunil Goutham /* Check if config is reset value */ 117457aaf63cSSunil Goutham if ((lmac_type == 0) && (lane_to_sds == 0xE4)) 117557aaf63cSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 117657aaf63cSSunil Goutham else 117757aaf63cSSunil Goutham lmac->lmac_type = lmac_type; 1178fff37fdaSSunil Goutham lmac->lane_to_sds = lane_to_sds; 11796465859aSSunil Goutham lmac_set_training(bgx, lmac, lmac->lmacid); 11800bcb7d51SSunil Goutham } 11814863dea3SSunil Goutham 11820bcb7d51SSunil Goutham static void bgx_get_qlm_mode(struct bgx *bgx) 11830bcb7d51SSunil Goutham { 118457aaf63cSSunil Goutham struct lmac *lmac; 11850bcb7d51SSunil Goutham u8 idx; 11860bcb7d51SSunil Goutham 118757aaf63cSSunil Goutham /* Init all LMAC's type to invalid */ 11886465859aSSunil Goutham for (idx = 0; idx < bgx->max_lmac; idx++) { 118957aaf63cSSunil Goutham lmac = &bgx->lmac[idx]; 119057aaf63cSSunil Goutham lmac->lmacid = idx; 11916465859aSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 11926465859aSSunil Goutham lmac->use_training = false; 119357aaf63cSSunil Goutham } 119457aaf63cSSunil Goutham 11950bcb7d51SSunil Goutham /* It is assumed that low level firmware sets this value */ 11960bcb7d51SSunil Goutham bgx->lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7; 11976465859aSSunil Goutham if (bgx->lmac_count > bgx->max_lmac) 11986465859aSSunil Goutham bgx->lmac_count = bgx->max_lmac; 11990bcb7d51SSunil Goutham 120057aaf63cSSunil Goutham for (idx = 0; idx < bgx->lmac_count; idx++) { 1201fff37fdaSSunil Goutham bgx_set_lmac_config(bgx, idx); 1202fff37fdaSSunil Goutham bgx_print_qlm_mode(bgx, idx); 120357aaf63cSSunil Goutham } 12044863dea3SSunil Goutham } 12054863dea3SSunil Goutham 120646b903a0SDavid Daney #ifdef CONFIG_ACPI 120746b903a0SDavid Daney 12081d82efacSRobert Richter static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev, 12091d82efacSRobert Richter u8 *dst) 121046b903a0SDavid Daney { 121146b903a0SDavid Daney u8 mac[ETH_ALEN]; 121246b903a0SDavid Daney int ret; 121346b903a0SDavid Daney 121446b903a0SDavid Daney ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev), 121546b903a0SDavid Daney "mac-address", mac, ETH_ALEN); 121646b903a0SDavid Daney if (ret) 121746b903a0SDavid Daney goto out; 121846b903a0SDavid Daney 121946b903a0SDavid Daney if (!is_valid_ether_addr(mac)) { 12201d82efacSRobert Richter dev_err(dev, "MAC address invalid: %pM\n", mac); 122146b903a0SDavid Daney ret = -EINVAL; 122246b903a0SDavid Daney goto out; 122346b903a0SDavid Daney } 122446b903a0SDavid Daney 12251d82efacSRobert Richter dev_info(dev, "MAC address set to: %pM\n", mac); 12261d82efacSRobert Richter 122746b903a0SDavid Daney memcpy(dst, mac, ETH_ALEN); 122846b903a0SDavid Daney out: 122946b903a0SDavid Daney return ret; 123046b903a0SDavid Daney } 123146b903a0SDavid Daney 123246b903a0SDavid Daney /* Currently only sets the MAC address. */ 123346b903a0SDavid Daney static acpi_status bgx_acpi_register_phy(acpi_handle handle, 123446b903a0SDavid Daney u32 lvl, void *context, void **rv) 123546b903a0SDavid Daney { 123646b903a0SDavid Daney struct bgx *bgx = context; 12371d82efacSRobert Richter struct device *dev = &bgx->pdev->dev; 123846b903a0SDavid Daney struct acpi_device *adev; 123946b903a0SDavid Daney 124046b903a0SDavid Daney if (acpi_bus_get_device(handle, &adev)) 124146b903a0SDavid Daney goto out; 124246b903a0SDavid Daney 12437aa48655SVadim Lomovtsev acpi_get_mac_address(dev, adev, bgx->lmac[bgx->acpi_lmac_idx].mac); 124446b903a0SDavid Daney 12457aa48655SVadim Lomovtsev SET_NETDEV_DEV(&bgx->lmac[bgx->acpi_lmac_idx].netdev, dev); 124646b903a0SDavid Daney 12477aa48655SVadim Lomovtsev bgx->lmac[bgx->acpi_lmac_idx].lmacid = bgx->acpi_lmac_idx; 12487aa48655SVadim Lomovtsev bgx->acpi_lmac_idx++; /* move to next LMAC */ 124946b903a0SDavid Daney out: 125046b903a0SDavid Daney return AE_OK; 125146b903a0SDavid Daney } 125246b903a0SDavid Daney 125346b903a0SDavid Daney static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl, 125446b903a0SDavid Daney void *context, void **ret_val) 125546b903a0SDavid Daney { 125646b903a0SDavid Daney struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL }; 125746b903a0SDavid Daney struct bgx *bgx = context; 125846b903a0SDavid Daney char bgx_sel[5]; 125946b903a0SDavid Daney 126046b903a0SDavid Daney snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id); 126146b903a0SDavid Daney if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &string))) { 126246b903a0SDavid Daney pr_warn("Invalid link device\n"); 126346b903a0SDavid Daney return AE_OK; 126446b903a0SDavid Daney } 126546b903a0SDavid Daney 126646b903a0SDavid Daney if (strncmp(string.pointer, bgx_sel, 4)) 126746b903a0SDavid Daney return AE_OK; 126846b903a0SDavid Daney 126946b903a0SDavid Daney acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, 127046b903a0SDavid Daney bgx_acpi_register_phy, NULL, bgx, NULL); 127146b903a0SDavid Daney 127246b903a0SDavid Daney kfree(string.pointer); 127346b903a0SDavid Daney return AE_CTRL_TERMINATE; 127446b903a0SDavid Daney } 127546b903a0SDavid Daney 127646b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 127746b903a0SDavid Daney { 127846b903a0SDavid Daney acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL); 127946b903a0SDavid Daney return 0; 128046b903a0SDavid Daney } 128146b903a0SDavid Daney 128246b903a0SDavid Daney #else 128346b903a0SDavid Daney 128446b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 128546b903a0SDavid Daney { 128646b903a0SDavid Daney return -ENODEV; 128746b903a0SDavid Daney } 128846b903a0SDavid Daney 128946b903a0SDavid Daney #endif /* CONFIG_ACPI */ 129046b903a0SDavid Daney 1291de387e11SRobert Richter #if IS_ENABLED(CONFIG_OF_MDIO) 1292de387e11SRobert Richter 1293de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 12944863dea3SSunil Goutham { 1295eee326fdSDavid Daney struct fwnode_handle *fwn; 1296b7d3e3d3SDavid Daney struct device_node *node = NULL; 12974863dea3SSunil Goutham u8 lmac = 0; 12984863dea3SSunil Goutham 1299eee326fdSDavid Daney device_for_each_child_node(&bgx->pdev->dev, fwn) { 13005fc7cf17SDavid Daney struct phy_device *pd; 1301eee326fdSDavid Daney struct device_node *phy_np; 1302b7d3e3d3SDavid Daney const char *mac; 1303de387e11SRobert Richter 13045fc7cf17SDavid Daney /* Should always be an OF node. But if it is not, we 13055fc7cf17SDavid Daney * cannot handle it, so exit the loop. 1306eee326fdSDavid Daney */ 1307b7d3e3d3SDavid Daney node = to_of_node(fwn); 1308eee326fdSDavid Daney if (!node) 1309eee326fdSDavid Daney break; 1310eee326fdSDavid Daney 1311eee326fdSDavid Daney mac = of_get_mac_address(node); 13124863dea3SSunil Goutham if (mac) 13134863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmac].mac, mac); 13144863dea3SSunil Goutham 13154863dea3SSunil Goutham SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev); 13164863dea3SSunil Goutham bgx->lmac[lmac].lmacid = lmac; 13175fc7cf17SDavid Daney 13185fc7cf17SDavid Daney phy_np = of_parse_phandle(node, "phy-handle", 0); 13195fc7cf17SDavid Daney /* If there is no phy or defective firmware presents 13205fc7cf17SDavid Daney * this cortina phy, for which there is no driver 13215fc7cf17SDavid Daney * support, ignore it. 13225fc7cf17SDavid Daney */ 13235fc7cf17SDavid Daney if (phy_np && 13245fc7cf17SDavid Daney !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) { 13255fc7cf17SDavid Daney /* Wait until the phy drivers are available */ 13265fc7cf17SDavid Daney pd = of_phy_find_device(phy_np); 13275fc7cf17SDavid Daney if (!pd) 1328b7d3e3d3SDavid Daney goto defer; 13295fc7cf17SDavid Daney bgx->lmac[lmac].phydev = pd; 13305fc7cf17SDavid Daney } 13315fc7cf17SDavid Daney 13324863dea3SSunil Goutham lmac++; 13336465859aSSunil Goutham if (lmac == bgx->max_lmac) { 133465c66af6SDavid Daney of_node_put(node); 13354863dea3SSunil Goutham break; 13364863dea3SSunil Goutham } 133765c66af6SDavid Daney } 1338de387e11SRobert Richter return 0; 1339b7d3e3d3SDavid Daney 1340b7d3e3d3SDavid Daney defer: 1341b7d3e3d3SDavid Daney /* We are bailing out, try not to leak device reference counts 1342b7d3e3d3SDavid Daney * for phy devices we may have already found. 1343b7d3e3d3SDavid Daney */ 1344b7d3e3d3SDavid Daney while (lmac) { 1345b7d3e3d3SDavid Daney if (bgx->lmac[lmac].phydev) { 1346b7d3e3d3SDavid Daney put_device(&bgx->lmac[lmac].phydev->mdio.dev); 1347b7d3e3d3SDavid Daney bgx->lmac[lmac].phydev = NULL; 1348b7d3e3d3SDavid Daney } 1349b7d3e3d3SDavid Daney lmac--; 1350b7d3e3d3SDavid Daney } 1351b7d3e3d3SDavid Daney of_node_put(node); 1352b7d3e3d3SDavid Daney return -EPROBE_DEFER; 1353de387e11SRobert Richter } 1354de387e11SRobert Richter 1355de387e11SRobert Richter #else 1356de387e11SRobert Richter 1357de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 1358de387e11SRobert Richter { 1359de387e11SRobert Richter return -ENODEV; 1360de387e11SRobert Richter } 1361de387e11SRobert Richter 1362de387e11SRobert Richter #endif /* CONFIG_OF_MDIO */ 1363de387e11SRobert Richter 1364de387e11SRobert Richter static int bgx_init_phy(struct bgx *bgx) 1365de387e11SRobert Richter { 136646b903a0SDavid Daney if (!acpi_disabled) 136746b903a0SDavid Daney return bgx_init_acpi_phy(bgx); 136846b903a0SDavid Daney 1369de387e11SRobert Richter return bgx_init_of_phy(bgx); 13704863dea3SSunil Goutham } 13714863dea3SSunil Goutham 13724863dea3SSunil Goutham static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 13734863dea3SSunil Goutham { 13744863dea3SSunil Goutham int err; 13754863dea3SSunil Goutham struct device *dev = &pdev->dev; 13764863dea3SSunil Goutham struct bgx *bgx = NULL; 13774863dea3SSunil Goutham u8 lmac; 137857aaf63cSSunil Goutham u16 sdevid; 13794863dea3SSunil Goutham 13804863dea3SSunil Goutham bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL); 13814863dea3SSunil Goutham if (!bgx) 13824863dea3SSunil Goutham return -ENOMEM; 13834863dea3SSunil Goutham bgx->pdev = pdev; 13844863dea3SSunil Goutham 13854863dea3SSunil Goutham pci_set_drvdata(pdev, bgx); 13864863dea3SSunil Goutham 13874863dea3SSunil Goutham err = pci_enable_device(pdev); 13884863dea3SSunil Goutham if (err) { 13894863dea3SSunil Goutham dev_err(dev, "Failed to enable PCI device\n"); 13904863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 13914863dea3SSunil Goutham return err; 13924863dea3SSunil Goutham } 13934863dea3SSunil Goutham 13944863dea3SSunil Goutham err = pci_request_regions(pdev, DRV_NAME); 13954863dea3SSunil Goutham if (err) { 13964863dea3SSunil Goutham dev_err(dev, "PCI request regions failed 0x%x\n", err); 13974863dea3SSunil Goutham goto err_disable_device; 13984863dea3SSunil Goutham } 13994863dea3SSunil Goutham 14004863dea3SSunil Goutham /* MAP configuration registers */ 14014863dea3SSunil Goutham bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 14024863dea3SSunil Goutham if (!bgx->reg_base) { 14034863dea3SSunil Goutham dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n"); 14044863dea3SSunil Goutham err = -ENOMEM; 14054863dea3SSunil Goutham goto err_release_regions; 14064863dea3SSunil Goutham } 1407d768b678SRobert Richter 140878aacb6fSSunil Goutham set_max_bgx_per_node(pdev); 140978aacb6fSSunil Goutham 14106465859aSSunil Goutham pci_read_config_word(pdev, PCI_DEVICE_ID, &sdevid); 14116465859aSSunil Goutham if (sdevid != PCI_DEVICE_ID_THUNDER_RGX) { 1412612e94bdSRadha Mohan Chintakuntla bgx->bgx_id = (pci_resource_start(pdev, 1413612e94bdSRadha Mohan Chintakuntla PCI_CFG_REG_BAR_NUM) >> 24) & BGX_ID_MASK; 141478aacb6fSSunil Goutham bgx->bgx_id += nic_get_node_id(pdev) * max_bgx_per_node; 14156465859aSSunil Goutham bgx->max_lmac = MAX_LMAC_PER_BGX; 14164863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 14176465859aSSunil Goutham } else { 14186465859aSSunil Goutham bgx->is_rgx = true; 14196465859aSSunil Goutham bgx->max_lmac = 1; 14206465859aSSunil Goutham bgx->bgx_id = MAX_BGX_PER_CN81XX - 1; 14216465859aSSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 14226465859aSSunil Goutham xcv_init_hw(); 14236465859aSSunil Goutham } 14246465859aSSunil Goutham 142509de3917SSunil Goutham /* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one 142609de3917SSunil Goutham * BGX i.e BGX2 can be split across 2 DLMs. 142709de3917SSunil Goutham */ 142809de3917SSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid); 142909de3917SSunil Goutham if ((sdevid == PCI_SUBSYS_DEVID_81XX_BGX) || 143009de3917SSunil Goutham ((sdevid == PCI_SUBSYS_DEVID_83XX_BGX) && (bgx->bgx_id == 2))) 143109de3917SSunil Goutham bgx->is_dlm = true; 143209de3917SSunil Goutham 14334863dea3SSunil Goutham bgx_get_qlm_mode(bgx); 14344863dea3SSunil Goutham 1435de387e11SRobert Richter err = bgx_init_phy(bgx); 1436de387e11SRobert Richter if (err) 1437de387e11SRobert Richter goto err_enable; 14384863dea3SSunil Goutham 14394863dea3SSunil Goutham bgx_init_hw(bgx); 14404863dea3SSunil Goutham 14414863dea3SSunil Goutham /* Enable all LMACs */ 14424863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) { 14434863dea3SSunil Goutham err = bgx_lmac_enable(bgx, lmac); 14444863dea3SSunil Goutham if (err) { 14454863dea3SSunil Goutham dev_err(dev, "BGX%d failed to enable lmac%d\n", 14464863dea3SSunil Goutham bgx->bgx_id, lmac); 144757aaf63cSSunil Goutham while (lmac) 144857aaf63cSSunil Goutham bgx_lmac_disable(bgx, --lmac); 14494863dea3SSunil Goutham goto err_enable; 14504863dea3SSunil Goutham } 14514863dea3SSunil Goutham } 14524863dea3SSunil Goutham 14534863dea3SSunil Goutham return 0; 14544863dea3SSunil Goutham 14554863dea3SSunil Goutham err_enable: 14564863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 14574863dea3SSunil Goutham err_release_regions: 14584863dea3SSunil Goutham pci_release_regions(pdev); 14594863dea3SSunil Goutham err_disable_device: 14604863dea3SSunil Goutham pci_disable_device(pdev); 14614863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 14624863dea3SSunil Goutham return err; 14634863dea3SSunil Goutham } 14644863dea3SSunil Goutham 14654863dea3SSunil Goutham static void bgx_remove(struct pci_dev *pdev) 14664863dea3SSunil Goutham { 14674863dea3SSunil Goutham struct bgx *bgx = pci_get_drvdata(pdev); 14684863dea3SSunil Goutham u8 lmac; 14694863dea3SSunil Goutham 14704863dea3SSunil Goutham /* Disable all LMACs */ 14714863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) 14724863dea3SSunil Goutham bgx_lmac_disable(bgx, lmac); 14734863dea3SSunil Goutham 14744863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 14754863dea3SSunil Goutham pci_release_regions(pdev); 14764863dea3SSunil Goutham pci_disable_device(pdev); 14774863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 14784863dea3SSunil Goutham } 14794863dea3SSunil Goutham 14804863dea3SSunil Goutham static struct pci_driver bgx_driver = { 14814863dea3SSunil Goutham .name = DRV_NAME, 14824863dea3SSunil Goutham .id_table = bgx_id_table, 14834863dea3SSunil Goutham .probe = bgx_probe, 14844863dea3SSunil Goutham .remove = bgx_remove, 14854863dea3SSunil Goutham }; 14864863dea3SSunil Goutham 14874863dea3SSunil Goutham static int __init bgx_init_module(void) 14884863dea3SSunil Goutham { 14894863dea3SSunil Goutham pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 14904863dea3SSunil Goutham 14914863dea3SSunil Goutham return pci_register_driver(&bgx_driver); 14924863dea3SSunil Goutham } 14934863dea3SSunil Goutham 14944863dea3SSunil Goutham static void __exit bgx_cleanup_module(void) 14954863dea3SSunil Goutham { 14964863dea3SSunil Goutham pci_unregister_driver(&bgx_driver); 14974863dea3SSunil Goutham } 14984863dea3SSunil Goutham 14994863dea3SSunil Goutham module_init(bgx_init_module); 15004863dea3SSunil Goutham module_exit(bgx_cleanup_module); 1501