14863dea3SSunil Goutham /* 24863dea3SSunil Goutham * Copyright (C) 2015 Cavium, Inc. 34863dea3SSunil Goutham * 44863dea3SSunil Goutham * This program is free software; you can redistribute it and/or modify it 54863dea3SSunil Goutham * under the terms of version 2 of the GNU General Public License 64863dea3SSunil Goutham * as published by the Free Software Foundation. 74863dea3SSunil Goutham */ 84863dea3SSunil Goutham 946b903a0SDavid Daney #include <linux/acpi.h> 104863dea3SSunil Goutham #include <linux/module.h> 114863dea3SSunil Goutham #include <linux/interrupt.h> 124863dea3SSunil Goutham #include <linux/pci.h> 134863dea3SSunil Goutham #include <linux/netdevice.h> 144863dea3SSunil Goutham #include <linux/etherdevice.h> 154863dea3SSunil Goutham #include <linux/phy.h> 164863dea3SSunil Goutham #include <linux/of.h> 174863dea3SSunil Goutham #include <linux/of_mdio.h> 184863dea3SSunil Goutham #include <linux/of_net.h> 194863dea3SSunil Goutham 204863dea3SSunil Goutham #include "nic_reg.h" 214863dea3SSunil Goutham #include "nic.h" 224863dea3SSunil Goutham #include "thunder_bgx.h" 234863dea3SSunil Goutham 244863dea3SSunil Goutham #define DRV_NAME "thunder-BGX" 254863dea3SSunil Goutham #define DRV_VERSION "1.0" 264863dea3SSunil Goutham 274863dea3SSunil Goutham struct lmac { 284863dea3SSunil Goutham struct bgx *bgx; 294863dea3SSunil Goutham int dmac; 3046b903a0SDavid Daney u8 mac[ETH_ALEN]; 310bcb7d51SSunil Goutham u8 lmac_type; 320bcb7d51SSunil Goutham u8 lane_to_sds; 330bcb7d51SSunil Goutham bool use_training; 344863dea3SSunil Goutham bool link_up; 354863dea3SSunil Goutham int lmacid; /* ID within BGX */ 364863dea3SSunil Goutham int lmacid_bd; /* ID on board */ 374863dea3SSunil Goutham struct net_device netdev; 384863dea3SSunil Goutham struct phy_device *phydev; 394863dea3SSunil Goutham unsigned int last_duplex; 404863dea3SSunil Goutham unsigned int last_link; 414863dea3SSunil Goutham unsigned int last_speed; 424863dea3SSunil Goutham bool is_sgmii; 434863dea3SSunil Goutham struct delayed_work dwork; 444863dea3SSunil Goutham struct workqueue_struct *check_link; 450c886a1dSAleksey Makarov }; 464863dea3SSunil Goutham 474863dea3SSunil Goutham struct bgx { 484863dea3SSunil Goutham u8 bgx_id; 494863dea3SSunil Goutham struct lmac lmac[MAX_LMAC_PER_BGX]; 504863dea3SSunil Goutham int lmac_count; 516465859aSSunil Goutham u8 max_lmac; 524863dea3SSunil Goutham void __iomem *reg_base; 534863dea3SSunil Goutham struct pci_dev *pdev; 5409de3917SSunil Goutham bool is_dlm; 556465859aSSunil Goutham bool is_rgx; 560c886a1dSAleksey Makarov }; 574863dea3SSunil Goutham 58fd7ec062SAleksey Makarov static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; 594863dea3SSunil Goutham static int lmac_count; /* Total no of LMACs in system */ 604863dea3SSunil Goutham 614863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac); 624863dea3SSunil Goutham 634863dea3SSunil Goutham /* Supported devices */ 644863dea3SSunil Goutham static const struct pci_device_id bgx_id_table[] = { 654863dea3SSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_BGX) }, 666465859aSSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_RGX) }, 674863dea3SSunil Goutham { 0, } /* end of table */ 684863dea3SSunil Goutham }; 694863dea3SSunil Goutham 704863dea3SSunil Goutham MODULE_AUTHOR("Cavium Inc"); 714863dea3SSunil Goutham MODULE_DESCRIPTION("Cavium Thunder BGX/MAC Driver"); 724863dea3SSunil Goutham MODULE_LICENSE("GPL v2"); 734863dea3SSunil Goutham MODULE_VERSION(DRV_VERSION); 744863dea3SSunil Goutham MODULE_DEVICE_TABLE(pci, bgx_id_table); 754863dea3SSunil Goutham 764863dea3SSunil Goutham /* The Cavium ThunderX network controller can *only* be found in SoCs 774863dea3SSunil Goutham * containing the ThunderX ARM64 CPU implementation. All accesses to the device 784863dea3SSunil Goutham * registers on this platform are implicitly strongly ordered with respect 794863dea3SSunil Goutham * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 804863dea3SSunil Goutham * with no memory barriers in this driver. The readq()/writeq() functions add 814863dea3SSunil Goutham * explicit ordering operation which in this case are redundant, and only 824863dea3SSunil Goutham * add overhead. 834863dea3SSunil Goutham */ 844863dea3SSunil Goutham 854863dea3SSunil Goutham /* Register read/write APIs */ 864863dea3SSunil Goutham static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset) 874863dea3SSunil Goutham { 884863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 894863dea3SSunil Goutham 904863dea3SSunil Goutham return readq_relaxed(addr); 914863dea3SSunil Goutham } 924863dea3SSunil Goutham 934863dea3SSunil Goutham static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 944863dea3SSunil Goutham { 954863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 964863dea3SSunil Goutham 974863dea3SSunil Goutham writeq_relaxed(val, addr); 984863dea3SSunil Goutham } 994863dea3SSunil Goutham 1004863dea3SSunil Goutham static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 1014863dea3SSunil Goutham { 1024863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 1034863dea3SSunil Goutham 1044863dea3SSunil Goutham writeq_relaxed(val | readq_relaxed(addr), addr); 1054863dea3SSunil Goutham } 1064863dea3SSunil Goutham 1074863dea3SSunil Goutham static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) 1084863dea3SSunil Goutham { 1094863dea3SSunil Goutham int timeout = 100; 1104863dea3SSunil Goutham u64 reg_val; 1114863dea3SSunil Goutham 1124863dea3SSunil Goutham while (timeout) { 1134863dea3SSunil Goutham reg_val = bgx_reg_read(bgx, lmac, reg); 1144863dea3SSunil Goutham if (zero && !(reg_val & mask)) 1154863dea3SSunil Goutham return 0; 1164863dea3SSunil Goutham if (!zero && (reg_val & mask)) 1174863dea3SSunil Goutham return 0; 1184863dea3SSunil Goutham usleep_range(1000, 2000); 1194863dea3SSunil Goutham timeout--; 1204863dea3SSunil Goutham } 1214863dea3SSunil Goutham return 1; 1224863dea3SSunil Goutham } 1234863dea3SSunil Goutham 1244863dea3SSunil Goutham /* Return number of BGX present in HW */ 1254863dea3SSunil Goutham unsigned bgx_get_map(int node) 1264863dea3SSunil Goutham { 1274863dea3SSunil Goutham int i; 1284863dea3SSunil Goutham unsigned map = 0; 1294863dea3SSunil Goutham 13009de3917SSunil Goutham for (i = 0; i < MAX_BGX_PER_NODE; i++) { 13109de3917SSunil Goutham if (bgx_vnic[(node * MAX_BGX_PER_NODE) + i]) 1324863dea3SSunil Goutham map |= (1 << i); 1334863dea3SSunil Goutham } 1344863dea3SSunil Goutham 1354863dea3SSunil Goutham return map; 1364863dea3SSunil Goutham } 1374863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_map); 1384863dea3SSunil Goutham 1394863dea3SSunil Goutham /* Return number of LMAC configured for this BGX */ 1404863dea3SSunil Goutham int bgx_get_lmac_count(int node, int bgx_idx) 1414863dea3SSunil Goutham { 1424863dea3SSunil Goutham struct bgx *bgx; 1434863dea3SSunil Goutham 14409de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1454863dea3SSunil Goutham if (bgx) 1464863dea3SSunil Goutham return bgx->lmac_count; 1474863dea3SSunil Goutham 1484863dea3SSunil Goutham return 0; 1494863dea3SSunil Goutham } 1504863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_count); 1514863dea3SSunil Goutham 1524863dea3SSunil Goutham /* Returns the current link status of LMAC */ 1534863dea3SSunil Goutham void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status) 1544863dea3SSunil Goutham { 1554863dea3SSunil Goutham struct bgx_link_status *link = (struct bgx_link_status *)status; 1564863dea3SSunil Goutham struct bgx *bgx; 1574863dea3SSunil Goutham struct lmac *lmac; 1584863dea3SSunil Goutham 15909de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1604863dea3SSunil Goutham if (!bgx) 1614863dea3SSunil Goutham return; 1624863dea3SSunil Goutham 1634863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 1644863dea3SSunil Goutham link->link_up = lmac->link_up; 1654863dea3SSunil Goutham link->duplex = lmac->last_duplex; 1664863dea3SSunil Goutham link->speed = lmac->last_speed; 1674863dea3SSunil Goutham } 1684863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_link_state); 1694863dea3SSunil Goutham 170e610cb32SAleksey Makarov const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid) 1714863dea3SSunil Goutham { 17209de3917SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1734863dea3SSunil Goutham 1744863dea3SSunil Goutham if (bgx) 1754863dea3SSunil Goutham return bgx->lmac[lmacid].mac; 1764863dea3SSunil Goutham 1774863dea3SSunil Goutham return NULL; 1784863dea3SSunil Goutham } 1794863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_mac); 1804863dea3SSunil Goutham 181e610cb32SAleksey Makarov void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac) 1824863dea3SSunil Goutham { 18309de3917SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1844863dea3SSunil Goutham 1854863dea3SSunil Goutham if (!bgx) 1864863dea3SSunil Goutham return; 1874863dea3SSunil Goutham 1884863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmacid].mac, mac); 1894863dea3SSunil Goutham } 1904863dea3SSunil Goutham EXPORT_SYMBOL(bgx_set_lmac_mac); 1914863dea3SSunil Goutham 192bc69fdfcSSunil Goutham void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable) 193bc69fdfcSSunil Goutham { 19409de3917SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 1956465859aSSunil Goutham struct lmac *lmac; 196bc69fdfcSSunil Goutham u64 cfg; 197bc69fdfcSSunil Goutham 198bc69fdfcSSunil Goutham if (!bgx) 199bc69fdfcSSunil Goutham return; 2006465859aSSunil Goutham lmac = &bgx->lmac[lmacid]; 201bc69fdfcSSunil Goutham 202bc69fdfcSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 203bc69fdfcSSunil Goutham if (enable) 204bc69fdfcSSunil Goutham cfg |= CMR_PKT_RX_EN | CMR_PKT_TX_EN; 205bc69fdfcSSunil Goutham else 206bc69fdfcSSunil Goutham cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN); 207bc69fdfcSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 2086465859aSSunil Goutham 2096465859aSSunil Goutham if (bgx->is_rgx) 2106465859aSSunil Goutham xcv_setup_link(enable ? lmac->link_up : 0, lmac->last_speed); 211bc69fdfcSSunil Goutham } 212bc69fdfcSSunil Goutham EXPORT_SYMBOL(bgx_lmac_rx_tx_enable); 213bc69fdfcSSunil Goutham 2144863dea3SSunil Goutham static void bgx_sgmii_change_link_state(struct lmac *lmac) 2154863dea3SSunil Goutham { 2164863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 2174863dea3SSunil Goutham u64 cmr_cfg; 2184863dea3SSunil Goutham u64 port_cfg = 0; 2194863dea3SSunil Goutham u64 misc_ctl = 0; 2204863dea3SSunil Goutham 2214863dea3SSunil Goutham cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG); 2224863dea3SSunil Goutham cmr_cfg &= ~CMR_EN; 2234863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2244863dea3SSunil Goutham 2254863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2264863dea3SSunil Goutham misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL); 2274863dea3SSunil Goutham 2284863dea3SSunil Goutham if (lmac->link_up) { 2294863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_GMX_ENO; 2304863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_DUPLEX; 2314863dea3SSunil Goutham port_cfg |= (lmac->last_duplex << 2); 2324863dea3SSunil Goutham } else { 2334863dea3SSunil Goutham misc_ctl |= PCS_MISC_CTL_GMX_ENO; 2344863dea3SSunil Goutham } 2354863dea3SSunil Goutham 2364863dea3SSunil Goutham switch (lmac->last_speed) { 2374863dea3SSunil Goutham case 10: 2384863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2394863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED_MSB; /* speed_msb 1 */ 2404863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2414863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2424863dea3SSunil Goutham misc_ctl |= 50; /* samp_pt */ 2434863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2444863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2454863dea3SSunil Goutham break; 2464863dea3SSunil Goutham case 100: 2474863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2484863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2494863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2504863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2514863dea3SSunil Goutham misc_ctl |= 5; /* samp_pt */ 2524863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2534863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2544863dea3SSunil Goutham break; 2554863dea3SSunil Goutham case 1000: 2564863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED; /* speed 1 */ 2574863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2584863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SLOT_TIME; /* slottime 1 */ 2594863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2604863dea3SSunil Goutham misc_ctl |= 1; /* samp_pt */ 2614863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512); 2624863dea3SSunil Goutham if (lmac->last_duplex) 2634863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 2644863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 0); 2654863dea3SSunil Goutham else 2664863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 2674863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 8192); 2684863dea3SSunil Goutham break; 2694863dea3SSunil Goutham default: 2704863dea3SSunil Goutham break; 2714863dea3SSunil Goutham } 2724863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl); 2734863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg); 2744863dea3SSunil Goutham 2754863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2764863dea3SSunil Goutham 2776465859aSSunil Goutham /* Re-enable lmac */ 2784863dea3SSunil Goutham cmr_cfg |= CMR_EN; 2794863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2806465859aSSunil Goutham 2816465859aSSunil Goutham if (bgx->is_rgx && (cmr_cfg & (CMR_PKT_RX_EN | CMR_PKT_TX_EN))) 2826465859aSSunil Goutham xcv_setup_link(lmac->link_up, lmac->last_speed); 2834863dea3SSunil Goutham } 2844863dea3SSunil Goutham 285fd7ec062SAleksey Makarov static void bgx_lmac_handler(struct net_device *netdev) 2864863dea3SSunil Goutham { 2874863dea3SSunil Goutham struct lmac *lmac = container_of(netdev, struct lmac, netdev); 288099a728dSxypron.glpk@gmx.de struct phy_device *phydev; 2894863dea3SSunil Goutham int link_changed = 0; 2904863dea3SSunil Goutham 2914863dea3SSunil Goutham if (!lmac) 2924863dea3SSunil Goutham return; 2934863dea3SSunil Goutham 294099a728dSxypron.glpk@gmx.de phydev = lmac->phydev; 295099a728dSxypron.glpk@gmx.de 2964863dea3SSunil Goutham if (!phydev->link && lmac->last_link) 2974863dea3SSunil Goutham link_changed = -1; 2984863dea3SSunil Goutham 2994863dea3SSunil Goutham if (phydev->link && 3004863dea3SSunil Goutham (lmac->last_duplex != phydev->duplex || 3014863dea3SSunil Goutham lmac->last_link != phydev->link || 3024863dea3SSunil Goutham lmac->last_speed != phydev->speed)) { 3034863dea3SSunil Goutham link_changed = 1; 3044863dea3SSunil Goutham } 3054863dea3SSunil Goutham 3064863dea3SSunil Goutham lmac->last_link = phydev->link; 3074863dea3SSunil Goutham lmac->last_speed = phydev->speed; 3084863dea3SSunil Goutham lmac->last_duplex = phydev->duplex; 3094863dea3SSunil Goutham 3104863dea3SSunil Goutham if (!link_changed) 3114863dea3SSunil Goutham return; 3124863dea3SSunil Goutham 3134863dea3SSunil Goutham if (link_changed > 0) 3144863dea3SSunil Goutham lmac->link_up = true; 3154863dea3SSunil Goutham else 3164863dea3SSunil Goutham lmac->link_up = false; 3174863dea3SSunil Goutham 3184863dea3SSunil Goutham if (lmac->is_sgmii) 3194863dea3SSunil Goutham bgx_sgmii_change_link_state(lmac); 3204863dea3SSunil Goutham else 3214863dea3SSunil Goutham bgx_xaui_check_link(lmac); 3224863dea3SSunil Goutham } 3234863dea3SSunil Goutham 3244863dea3SSunil Goutham u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx) 3254863dea3SSunil Goutham { 3264863dea3SSunil Goutham struct bgx *bgx; 3274863dea3SSunil Goutham 32809de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 3294863dea3SSunil Goutham if (!bgx) 3304863dea3SSunil Goutham return 0; 3314863dea3SSunil Goutham 3324863dea3SSunil Goutham if (idx > 8) 3334863dea3SSunil Goutham lmac = 0; 3344863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8)); 3354863dea3SSunil Goutham } 3364863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_rx_stats); 3374863dea3SSunil Goutham 3384863dea3SSunil Goutham u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx) 3394863dea3SSunil Goutham { 3404863dea3SSunil Goutham struct bgx *bgx; 3414863dea3SSunil Goutham 34209de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 3434863dea3SSunil Goutham if (!bgx) 3444863dea3SSunil Goutham return 0; 3454863dea3SSunil Goutham 3464863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8)); 3474863dea3SSunil Goutham } 3484863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_tx_stats); 3494863dea3SSunil Goutham 3504863dea3SSunil Goutham static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac) 3514863dea3SSunil Goutham { 3524863dea3SSunil Goutham u64 offset; 3534863dea3SSunil Goutham 3544863dea3SSunil Goutham while (bgx->lmac[lmac].dmac > 0) { 3554863dea3SSunil Goutham offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) + 3564863dea3SSunil Goutham (lmac * MAX_DMAC_PER_LMAC * sizeof(u64)); 3574863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0); 3584863dea3SSunil Goutham bgx->lmac[lmac].dmac--; 3594863dea3SSunil Goutham } 3604863dea3SSunil Goutham } 3614863dea3SSunil Goutham 362d77a2384SSunil Goutham /* Configure BGX LMAC in internal loopback mode */ 363d77a2384SSunil Goutham void bgx_lmac_internal_loopback(int node, int bgx_idx, 364d77a2384SSunil Goutham int lmac_idx, bool enable) 365d77a2384SSunil Goutham { 366d77a2384SSunil Goutham struct bgx *bgx; 367d77a2384SSunil Goutham struct lmac *lmac; 368d77a2384SSunil Goutham u64 cfg; 369d77a2384SSunil Goutham 37009de3917SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_NODE) + bgx_idx]; 371d77a2384SSunil Goutham if (!bgx) 372d77a2384SSunil Goutham return; 373d77a2384SSunil Goutham 374d77a2384SSunil Goutham lmac = &bgx->lmac[lmac_idx]; 375d77a2384SSunil Goutham if (lmac->is_sgmii) { 376d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL); 377d77a2384SSunil Goutham if (enable) 378d77a2384SSunil Goutham cfg |= PCS_MRX_CTL_LOOPBACK1; 379d77a2384SSunil Goutham else 380d77a2384SSunil Goutham cfg &= ~PCS_MRX_CTL_LOOPBACK1; 381d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg); 382d77a2384SSunil Goutham } else { 383d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1); 384d77a2384SSunil Goutham if (enable) 385d77a2384SSunil Goutham cfg |= SPU_CTL_LOOPBACK; 386d77a2384SSunil Goutham else 387d77a2384SSunil Goutham cfg &= ~SPU_CTL_LOOPBACK; 388d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg); 389d77a2384SSunil Goutham } 390d77a2384SSunil Goutham } 391d77a2384SSunil Goutham EXPORT_SYMBOL(bgx_lmac_internal_loopback); 392d77a2384SSunil Goutham 3933f8057cfSSunil Goutham static int bgx_lmac_sgmii_init(struct bgx *bgx, struct lmac *lmac) 3944863dea3SSunil Goutham { 3953f8057cfSSunil Goutham int lmacid = lmac->lmacid; 3964863dea3SSunil Goutham u64 cfg; 3974863dea3SSunil Goutham 3984863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); 3994863dea3SSunil Goutham /* max packet size */ 4004863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE); 4014863dea3SSunil Goutham 4024863dea3SSunil Goutham /* Disable frame alignment if using preamble */ 4034863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 4044863dea3SSunil Goutham if (cfg & 1) 4054863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0); 4064863dea3SSunil Goutham 4074863dea3SSunil Goutham /* Enable lmac */ 4084863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 4094863dea3SSunil Goutham 4104863dea3SSunil Goutham /* PCS reset */ 4114863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET); 4124863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, 4134863dea3SSunil Goutham PCS_MRX_CTL_RESET, true)) { 4144863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n"); 4154863dea3SSunil Goutham return -1; 4164863dea3SSunil Goutham } 4174863dea3SSunil Goutham 4184863dea3SSunil Goutham /* power down, reset autoneg, autoneg enable */ 4194863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL); 4204863dea3SSunil Goutham cfg &= ~PCS_MRX_CTL_PWR_DN; 4214863dea3SSunil Goutham cfg |= (PCS_MRX_CTL_RST_AN | PCS_MRX_CTL_AN_EN); 4224863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); 4234863dea3SSunil Goutham 4243f8057cfSSunil Goutham if (lmac->lmac_type == BGX_MODE_QSGMII) { 4253f8057cfSSunil Goutham /* Disable disparity check for QSGMII */ 4263f8057cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL); 4273f8057cfSSunil Goutham cfg &= ~PCS_MISC_CTL_DISP_EN; 4283f8057cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL, cfg); 4293f8057cfSSunil Goutham return 0; 4303f8057cfSSunil Goutham } 4313f8057cfSSunil Goutham 4326465859aSSunil Goutham if (lmac->lmac_type == BGX_MODE_SGMII) { 4334863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS, 4344863dea3SSunil Goutham PCS_MRX_STATUS_AN_CPT, false)) { 4354863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n"); 4364863dea3SSunil Goutham return -1; 4374863dea3SSunil Goutham } 4386465859aSSunil Goutham } 4394863dea3SSunil Goutham 4404863dea3SSunil Goutham return 0; 4414863dea3SSunil Goutham } 4424863dea3SSunil Goutham 4430bcb7d51SSunil Goutham static int bgx_lmac_xaui_init(struct bgx *bgx, struct lmac *lmac) 4444863dea3SSunil Goutham { 4454863dea3SSunil Goutham u64 cfg; 4460bcb7d51SSunil Goutham int lmacid = lmac->lmacid; 4474863dea3SSunil Goutham 4484863dea3SSunil Goutham /* Reset SPU */ 4494863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET); 4504863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 4514863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 4524863dea3SSunil Goutham return -1; 4534863dea3SSunil Goutham } 4544863dea3SSunil Goutham 4554863dea3SSunil Goutham /* Disable LMAC */ 4564863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 4574863dea3SSunil Goutham cfg &= ~CMR_EN; 4584863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 4594863dea3SSunil Goutham 4604863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 4614863dea3SSunil Goutham /* Set interleaved running disparity for RXAUI */ 46293db2cf8SSunil Goutham if (lmac->lmac_type == BGX_MODE_RXAUI) 4634863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, 46493db2cf8SSunil Goutham SPU_MISC_CTL_INTLV_RDISP); 46593db2cf8SSunil Goutham 46693db2cf8SSunil Goutham /* Clear receive packet disable */ 46793db2cf8SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); 46893db2cf8SSunil Goutham cfg &= ~SPU_MISC_CTL_RX_DIS; 46993db2cf8SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); 4704863dea3SSunil Goutham 4714863dea3SSunil Goutham /* clear all interrupts */ 4724863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT); 4734863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg); 4744863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT); 4754863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg); 4764863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 4774863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 4784863dea3SSunil Goutham 4790bcb7d51SSunil Goutham if (lmac->use_training) { 4804863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00); 4814863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00); 4824863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00); 4834863dea3SSunil Goutham /* training enable */ 4844863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 4854863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, SPU_PMD_CRTL_TRAIN_EN); 4864863dea3SSunil Goutham } 4874863dea3SSunil Goutham 4884863dea3SSunil Goutham /* Append FCS to each packet */ 4894863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D); 4904863dea3SSunil Goutham 4914863dea3SSunil Goutham /* Disable forward error correction */ 4924863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL); 4934863dea3SSunil Goutham cfg &= ~SPU_FEC_CTL_FEC_EN; 4944863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg); 4954863dea3SSunil Goutham 4964863dea3SSunil Goutham /* Disable autoneg */ 4974863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL); 4984863dea3SSunil Goutham cfg = cfg & ~(SPU_AN_CTL_AN_EN | SPU_AN_CTL_XNP_EN); 4994863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg); 5004863dea3SSunil Goutham 5014863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV); 5020bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_10G_KR) 5034863dea3SSunil Goutham cfg |= (1 << 23); 5040bcb7d51SSunil Goutham else if (lmac->lmac_type == BGX_MODE_40G_KR) 5054863dea3SSunil Goutham cfg |= (1 << 24); 5064863dea3SSunil Goutham else 5074863dea3SSunil Goutham cfg &= ~((1 << 23) | (1 << 24)); 5084863dea3SSunil Goutham cfg = cfg & (~((1ULL << 25) | (1ULL << 22) | (1ULL << 12))); 5094863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg); 5104863dea3SSunil Goutham 5114863dea3SSunil Goutham cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL); 5124863dea3SSunil Goutham cfg &= ~SPU_DBG_CTL_AN_ARB_LINK_CHK_EN; 5134863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg); 5144863dea3SSunil Goutham 5154863dea3SSunil Goutham /* Enable lmac */ 5164863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 5174863dea3SSunil Goutham 5184863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1); 5194863dea3SSunil Goutham cfg &= ~SPU_CTL_LOW_POWER; 5204863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg); 5214863dea3SSunil Goutham 5224863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL); 5234863dea3SSunil Goutham cfg &= ~SMU_TX_CTL_UNI_EN; 5244863dea3SSunil Goutham cfg |= SMU_TX_CTL_DIC_EN; 5254863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg); 5264863dea3SSunil Goutham 5274863dea3SSunil Goutham /* take lmac_count into account */ 5284863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1)); 5294863dea3SSunil Goutham /* max packet size */ 5304863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); 5314863dea3SSunil Goutham 5324863dea3SSunil Goutham return 0; 5334863dea3SSunil Goutham } 5344863dea3SSunil Goutham 5354863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac) 5364863dea3SSunil Goutham { 5374863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 5384863dea3SSunil Goutham int lmacid = lmac->lmacid; 5390bcb7d51SSunil Goutham int lmac_type = lmac->lmac_type; 5404863dea3SSunil Goutham u64 cfg; 5414863dea3SSunil Goutham 5420bcb7d51SSunil Goutham if (lmac->use_training) { 5434863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5444863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 5454863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 5464863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5474863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL); 5484863dea3SSunil Goutham cfg |= (1ull << 0); 5494863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg); 5504863dea3SSunil Goutham return -1; 5514863dea3SSunil Goutham } 5524863dea3SSunil Goutham } 5534863dea3SSunil Goutham 5544863dea3SSunil Goutham /* wait for PCS to come out of reset */ 5554863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 5564863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 5574863dea3SSunil Goutham return -1; 5584863dea3SSunil Goutham } 5594863dea3SSunil Goutham 5604863dea3SSunil Goutham if ((lmac_type == BGX_MODE_10G_KR) || (lmac_type == BGX_MODE_XFI) || 5614863dea3SSunil Goutham (lmac_type == BGX_MODE_40G_KR) || (lmac_type == BGX_MODE_XLAUI)) { 5624863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1, 5634863dea3SSunil Goutham SPU_BR_STATUS_BLK_LOCK, false)) { 5644863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 5654863dea3SSunil Goutham "SPU_BR_STATUS_BLK_LOCK not completed\n"); 5664863dea3SSunil Goutham return -1; 5674863dea3SSunil Goutham } 5684863dea3SSunil Goutham } else { 5694863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS, 5704863dea3SSunil Goutham SPU_BX_STATUS_RX_ALIGN, false)) { 5714863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 5724863dea3SSunil Goutham "SPU_BX_STATUS_RX_ALIGN not completed\n"); 5734863dea3SSunil Goutham return -1; 5744863dea3SSunil Goutham } 5754863dea3SSunil Goutham } 5764863dea3SSunil Goutham 5774863dea3SSunil Goutham /* Clear rcvflt bit (latching high) and read it back */ 5783f4c68cfSSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) 5793f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 5803f4c68cfSSunil Goutham BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 5814863dea3SSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 5824863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); 5830bcb7d51SSunil Goutham if (lmac->use_training) { 5844863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5854863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 5864863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 5874863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5884863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, 5894863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL); 5904863dea3SSunil Goutham cfg |= (1ull << 0); 5914863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, 5924863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, cfg); 5934863dea3SSunil Goutham return -1; 5944863dea3SSunil Goutham } 5954863dea3SSunil Goutham } 5964863dea3SSunil Goutham return -1; 5974863dea3SSunil Goutham } 5984863dea3SSunil Goutham 5994863dea3SSunil Goutham /* Wait for BGX RX to be idle */ 6004863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { 6014863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); 6024863dea3SSunil Goutham return -1; 6034863dea3SSunil Goutham } 6044863dea3SSunil Goutham 6054863dea3SSunil Goutham /* Wait for BGX TX to be idle */ 6064863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) { 6074863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU TX not idle\n"); 6084863dea3SSunil Goutham return -1; 6094863dea3SSunil Goutham } 6104863dea3SSunil Goutham 6113f4c68cfSSunil Goutham /* Check for MAC RX faults */ 6123f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL); 6133f4c68cfSSunil Goutham /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */ 6143f4c68cfSSunil Goutham cfg &= SMU_RX_CTL_STATUS; 6153f4c68cfSSunil Goutham if (!cfg) 6164863dea3SSunil Goutham return 0; 6173f4c68cfSSunil Goutham 6183f4c68cfSSunil Goutham /* Rx local/remote fault seen. 6193f4c68cfSSunil Goutham * Do lmac reinit to see if condition recovers 6203f4c68cfSSunil Goutham */ 6210bcb7d51SSunil Goutham bgx_lmac_xaui_init(bgx, lmac); 6223f4c68cfSSunil Goutham 6233f4c68cfSSunil Goutham return -1; 6244863dea3SSunil Goutham } 6254863dea3SSunil Goutham 6264863dea3SSunil Goutham static void bgx_poll_for_link(struct work_struct *work) 6274863dea3SSunil Goutham { 6284863dea3SSunil Goutham struct lmac *lmac; 6293f4c68cfSSunil Goutham u64 spu_link, smu_link; 6304863dea3SSunil Goutham 6314863dea3SSunil Goutham lmac = container_of(work, struct lmac, dwork.work); 6324863dea3SSunil Goutham 6334863dea3SSunil Goutham /* Receive link is latching low. Force it high and verify it */ 6344863dea3SSunil Goutham bgx_reg_modify(lmac->bgx, lmac->lmacid, 6354863dea3SSunil Goutham BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); 6364863dea3SSunil Goutham bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, 6374863dea3SSunil Goutham SPU_STATUS1_RCV_LNK, false); 6384863dea3SSunil Goutham 6393f4c68cfSSunil Goutham spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 6403f4c68cfSSunil Goutham smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); 6413f4c68cfSSunil Goutham 6423f4c68cfSSunil Goutham if ((spu_link & SPU_STATUS1_RCV_LNK) && 6433f4c68cfSSunil Goutham !(smu_link & SMU_RX_CTL_STATUS)) { 6444863dea3SSunil Goutham lmac->link_up = 1; 6450bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_XLAUI) 6464863dea3SSunil Goutham lmac->last_speed = 40000; 6474863dea3SSunil Goutham else 6484863dea3SSunil Goutham lmac->last_speed = 10000; 6494863dea3SSunil Goutham lmac->last_duplex = 1; 6504863dea3SSunil Goutham } else { 6514863dea3SSunil Goutham lmac->link_up = 0; 6520b72a9a1SSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 6530b72a9a1SSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 6544863dea3SSunil Goutham } 6554863dea3SSunil Goutham 6564863dea3SSunil Goutham if (lmac->last_link != lmac->link_up) { 6573f4c68cfSSunil Goutham if (lmac->link_up) { 6583f4c68cfSSunil Goutham if (bgx_xaui_check_link(lmac)) { 6593f4c68cfSSunil Goutham /* Errors, clear link_up state */ 6603f4c68cfSSunil Goutham lmac->link_up = 0; 6613f4c68cfSSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 6623f4c68cfSSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 6633f4c68cfSSunil Goutham } 6643f4c68cfSSunil Goutham } 6654863dea3SSunil Goutham lmac->last_link = lmac->link_up; 6664863dea3SSunil Goutham } 6674863dea3SSunil Goutham 6684863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); 6694863dea3SSunil Goutham } 6704863dea3SSunil Goutham 6713f8057cfSSunil Goutham static int phy_interface_mode(u8 lmac_type) 6723f8057cfSSunil Goutham { 6733f8057cfSSunil Goutham if (lmac_type == BGX_MODE_QSGMII) 6743f8057cfSSunil Goutham return PHY_INTERFACE_MODE_QSGMII; 6756465859aSSunil Goutham if (lmac_type == BGX_MODE_RGMII) 6766465859aSSunil Goutham return PHY_INTERFACE_MODE_RGMII; 6773f8057cfSSunil Goutham 6783f8057cfSSunil Goutham return PHY_INTERFACE_MODE_SGMII; 6793f8057cfSSunil Goutham } 6803f8057cfSSunil Goutham 6814863dea3SSunil Goutham static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid) 6824863dea3SSunil Goutham { 6834863dea3SSunil Goutham struct lmac *lmac; 6844863dea3SSunil Goutham u64 cfg; 6854863dea3SSunil Goutham 6864863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 6874863dea3SSunil Goutham lmac->bgx = bgx; 6884863dea3SSunil Goutham 6893f8057cfSSunil Goutham if ((lmac->lmac_type == BGX_MODE_SGMII) || 6906465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_QSGMII) || 6916465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_RGMII)) { 6924863dea3SSunil Goutham lmac->is_sgmii = 1; 6933f8057cfSSunil Goutham if (bgx_lmac_sgmii_init(bgx, lmac)) 6944863dea3SSunil Goutham return -1; 6954863dea3SSunil Goutham } else { 6964863dea3SSunil Goutham lmac->is_sgmii = 0; 6970bcb7d51SSunil Goutham if (bgx_lmac_xaui_init(bgx, lmac)) 6984863dea3SSunil Goutham return -1; 6994863dea3SSunil Goutham } 7004863dea3SSunil Goutham 7014863dea3SSunil Goutham if (lmac->is_sgmii) { 7024863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 7034863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 7044863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg); 7054863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1); 7064863dea3SSunil Goutham } else { 7074863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND); 7084863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 7094863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg); 7104863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4); 7114863dea3SSunil Goutham } 7124863dea3SSunil Goutham 7134863dea3SSunil Goutham /* Enable lmac */ 714bc69fdfcSSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 7154863dea3SSunil Goutham 7164863dea3SSunil Goutham /* Restore default cfg, incase low level firmware changed it */ 7174863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03); 7184863dea3SSunil Goutham 7190bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 7200bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 7210bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 7220bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR)) { 7234863dea3SSunil Goutham if (!lmac->phydev) 7244863dea3SSunil Goutham return -ENODEV; 7254863dea3SSunil Goutham 7264863dea3SSunil Goutham lmac->phydev->dev_flags = 0; 7274863dea3SSunil Goutham 7284863dea3SSunil Goutham if (phy_connect_direct(&lmac->netdev, lmac->phydev, 7294863dea3SSunil Goutham bgx_lmac_handler, 7303f8057cfSSunil Goutham phy_interface_mode(lmac->lmac_type))) 7314863dea3SSunil Goutham return -ENODEV; 7324863dea3SSunil Goutham 7334863dea3SSunil Goutham phy_start_aneg(lmac->phydev); 7344863dea3SSunil Goutham } else { 7354863dea3SSunil Goutham lmac->check_link = alloc_workqueue("check_link", WQ_UNBOUND | 7364863dea3SSunil Goutham WQ_MEM_RECLAIM, 1); 7374863dea3SSunil Goutham if (!lmac->check_link) 7384863dea3SSunil Goutham return -ENOMEM; 7394863dea3SSunil Goutham INIT_DELAYED_WORK(&lmac->dwork, bgx_poll_for_link); 7404863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, 0); 7414863dea3SSunil Goutham } 7424863dea3SSunil Goutham 7434863dea3SSunil Goutham return 0; 7444863dea3SSunil Goutham } 7454863dea3SSunil Goutham 746fd7ec062SAleksey Makarov static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) 7474863dea3SSunil Goutham { 7484863dea3SSunil Goutham struct lmac *lmac; 7493f4c68cfSSunil Goutham u64 cfg; 7504863dea3SSunil Goutham 7514863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 7524863dea3SSunil Goutham if (lmac->check_link) { 7534863dea3SSunil Goutham /* Destroy work queue */ 754a7b1f535SThanneeru Srinivasulu cancel_delayed_work_sync(&lmac->dwork); 7554863dea3SSunil Goutham destroy_workqueue(lmac->check_link); 7564863dea3SSunil Goutham } 7574863dea3SSunil Goutham 7583f4c68cfSSunil Goutham /* Disable packet reception */ 7593f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7603f4c68cfSSunil Goutham cfg &= ~CMR_PKT_RX_EN; 7613f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7623f4c68cfSSunil Goutham 7633f4c68cfSSunil Goutham /* Give chance for Rx/Tx FIFO to get drained */ 7643f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true); 7653f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true); 7663f4c68cfSSunil Goutham 7673f4c68cfSSunil Goutham /* Disable packet transmission */ 7683f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7693f4c68cfSSunil Goutham cfg &= ~CMR_PKT_TX_EN; 7703f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7713f4c68cfSSunil Goutham 7723f4c68cfSSunil Goutham /* Disable serdes lanes */ 7733f4c68cfSSunil Goutham if (!lmac->is_sgmii) 7743f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7753f4c68cfSSunil Goutham BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 7763f4c68cfSSunil Goutham else 7773f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7783f4c68cfSSunil Goutham BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN); 7793f4c68cfSSunil Goutham 7803f4c68cfSSunil Goutham /* Disable LMAC */ 7813f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7823f4c68cfSSunil Goutham cfg &= ~CMR_EN; 7833f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7843f4c68cfSSunil Goutham 7854863dea3SSunil Goutham bgx_flush_dmac_addrs(bgx, lmacid); 7864863dea3SSunil Goutham 7870bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 7880bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 7890bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 7900bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) 7914863dea3SSunil Goutham phy_disconnect(lmac->phydev); 7924863dea3SSunil Goutham 7934863dea3SSunil Goutham lmac->phydev = NULL; 7944863dea3SSunil Goutham } 7954863dea3SSunil Goutham 7964863dea3SSunil Goutham static void bgx_init_hw(struct bgx *bgx) 7974863dea3SSunil Goutham { 7984863dea3SSunil Goutham int i; 7990bcb7d51SSunil Goutham struct lmac *lmac; 8004863dea3SSunil Goutham 8014863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP); 8024863dea3SSunil Goutham if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS)) 8034863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id); 8044863dea3SSunil Goutham 8054863dea3SSunil Goutham /* Set lmac type and lane2serdes mapping */ 8064863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) { 8070bcb7d51SSunil Goutham lmac = &bgx->lmac[i]; 8084863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG, 8090bcb7d51SSunil Goutham (lmac->lmac_type << 8) | lmac->lane_to_sds); 8104863dea3SSunil Goutham bgx->lmac[i].lmacid_bd = lmac_count; 8114863dea3SSunil Goutham lmac_count++; 8124863dea3SSunil Goutham } 8134863dea3SSunil Goutham 8144863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count); 8154863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count); 8164863dea3SSunil Goutham 8174863dea3SSunil Goutham /* Set the backpressure AND mask */ 8184863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) 8194863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND, 8204863dea3SSunil Goutham ((1ULL << MAX_BGX_CHANS_PER_LMAC) - 1) << 8214863dea3SSunil Goutham (i * MAX_BGX_CHANS_PER_LMAC)); 8224863dea3SSunil Goutham 8234863dea3SSunil Goutham /* Disable all MAC filtering */ 8244863dea3SSunil Goutham for (i = 0; i < RX_DMAC_COUNT; i++) 8254863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00); 8264863dea3SSunil Goutham 8274863dea3SSunil Goutham /* Disable MAC steering (NCSI traffic) */ 8284863dea3SSunil Goutham for (i = 0; i < RX_TRAFFIC_STEER_RULE_COUNT; i++) 8294863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00); 8304863dea3SSunil Goutham } 8314863dea3SSunil Goutham 8323f8057cfSSunil Goutham static u8 bgx_get_lane2sds_cfg(struct bgx *bgx, struct lmac *lmac) 8333f8057cfSSunil Goutham { 8343f8057cfSSunil Goutham return (u8)(bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG) & 0xFF); 8353f8057cfSSunil Goutham } 8363f8057cfSSunil Goutham 8370bcb7d51SSunil Goutham static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid) 8384863dea3SSunil Goutham { 8394863dea3SSunil Goutham struct device *dev = &bgx->pdev->dev; 8400bcb7d51SSunil Goutham struct lmac *lmac; 8410bcb7d51SSunil Goutham char str[20]; 84257aaf63cSSunil Goutham u8 dlm; 84357aaf63cSSunil Goutham 8446465859aSSunil Goutham if (lmacid > bgx->max_lmac) 84557aaf63cSSunil Goutham return; 8460bcb7d51SSunil Goutham 8470bcb7d51SSunil Goutham lmac = &bgx->lmac[lmacid]; 84857aaf63cSSunil Goutham dlm = (lmacid / 2) + (bgx->bgx_id * 2); 84909de3917SSunil Goutham if (!bgx->is_dlm) 8500bcb7d51SSunil Goutham sprintf(str, "BGX%d QLM mode", bgx->bgx_id); 85157aaf63cSSunil Goutham else 85257aaf63cSSunil Goutham sprintf(str, "BGX%d DLM%d mode", bgx->bgx_id, dlm); 8530bcb7d51SSunil Goutham 8540bcb7d51SSunil Goutham switch (lmac->lmac_type) { 8550bcb7d51SSunil Goutham case BGX_MODE_SGMII: 8560bcb7d51SSunil Goutham dev_info(dev, "%s: SGMII\n", (char *)str); 8570bcb7d51SSunil Goutham break; 8580bcb7d51SSunil Goutham case BGX_MODE_XAUI: 8590bcb7d51SSunil Goutham dev_info(dev, "%s: XAUI\n", (char *)str); 8600bcb7d51SSunil Goutham break; 8610bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 8620bcb7d51SSunil Goutham dev_info(dev, "%s: RXAUI\n", (char *)str); 8630bcb7d51SSunil Goutham break; 8640bcb7d51SSunil Goutham case BGX_MODE_XFI: 8650bcb7d51SSunil Goutham if (!lmac->use_training) 8660bcb7d51SSunil Goutham dev_info(dev, "%s: XFI\n", (char *)str); 8670bcb7d51SSunil Goutham else 8680bcb7d51SSunil Goutham dev_info(dev, "%s: 10G_KR\n", (char *)str); 8690bcb7d51SSunil Goutham break; 8700bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 8710bcb7d51SSunil Goutham if (!lmac->use_training) 8720bcb7d51SSunil Goutham dev_info(dev, "%s: XLAUI\n", (char *)str); 8730bcb7d51SSunil Goutham else 8740bcb7d51SSunil Goutham dev_info(dev, "%s: 40G_KR4\n", (char *)str); 8750bcb7d51SSunil Goutham break; 8763f8057cfSSunil Goutham case BGX_MODE_QSGMII: 8773f8057cfSSunil Goutham if ((lmacid == 0) && 8783f8057cfSSunil Goutham (bgx_get_lane2sds_cfg(bgx, lmac) != lmacid)) 8793f8057cfSSunil Goutham return; 8803f8057cfSSunil Goutham if ((lmacid == 2) && 8813f8057cfSSunil Goutham (bgx_get_lane2sds_cfg(bgx, lmac) == lmacid)) 8823f8057cfSSunil Goutham return; 8833f8057cfSSunil Goutham dev_info(dev, "%s: QSGMII\n", (char *)str); 8843f8057cfSSunil Goutham break; 8856465859aSSunil Goutham case BGX_MODE_RGMII: 8866465859aSSunil Goutham dev_info(dev, "%s: RGMII\n", (char *)str); 8876465859aSSunil Goutham break; 8883f8057cfSSunil Goutham case BGX_MODE_INVALID: 8893f8057cfSSunil Goutham /* Nothing to do */ 8903f8057cfSSunil Goutham break; 8910bcb7d51SSunil Goutham } 8920bcb7d51SSunil Goutham } 8930bcb7d51SSunil Goutham 8943f8057cfSSunil Goutham static void lmac_set_lane2sds(struct bgx *bgx, struct lmac *lmac) 8950bcb7d51SSunil Goutham { 8960bcb7d51SSunil Goutham switch (lmac->lmac_type) { 8970bcb7d51SSunil Goutham case BGX_MODE_SGMII: 8980bcb7d51SSunil Goutham case BGX_MODE_XFI: 8990bcb7d51SSunil Goutham lmac->lane_to_sds = lmac->lmacid; 9000bcb7d51SSunil Goutham break; 9010bcb7d51SSunil Goutham case BGX_MODE_XAUI: 9020bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 9036465859aSSunil Goutham case BGX_MODE_RGMII: 9040bcb7d51SSunil Goutham lmac->lane_to_sds = 0xE4; 9050bcb7d51SSunil Goutham break; 9060bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 9070bcb7d51SSunil Goutham lmac->lane_to_sds = (lmac->lmacid) ? 0xE : 0x4; 9080bcb7d51SSunil Goutham break; 9093f8057cfSSunil Goutham case BGX_MODE_QSGMII: 9103f8057cfSSunil Goutham /* There is no way to determine if DLM0/2 is QSGMII or 9113f8057cfSSunil Goutham * DLM1/3 is configured to QSGMII as bootloader will 9123f8057cfSSunil Goutham * configure all LMACs, so take whatever is configured 9133f8057cfSSunil Goutham * by low level firmware. 9143f8057cfSSunil Goutham */ 9153f8057cfSSunil Goutham lmac->lane_to_sds = bgx_get_lane2sds_cfg(bgx, lmac); 9163f8057cfSSunil Goutham break; 9170bcb7d51SSunil Goutham default: 9180bcb7d51SSunil Goutham lmac->lane_to_sds = 0; 9190bcb7d51SSunil Goutham break; 9200bcb7d51SSunil Goutham } 9210bcb7d51SSunil Goutham } 9220bcb7d51SSunil Goutham 9236465859aSSunil Goutham static void lmac_set_training(struct bgx *bgx, struct lmac *lmac, int lmacid) 9246465859aSSunil Goutham { 9256465859aSSunil Goutham if ((lmac->lmac_type != BGX_MODE_10G_KR) && 9266465859aSSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR)) { 9276465859aSSunil Goutham lmac->use_training = 0; 9286465859aSSunil Goutham return; 9296465859aSSunil Goutham } 9306465859aSSunil Goutham 9316465859aSSunil Goutham lmac->use_training = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL) & 9326465859aSSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 9336465859aSSunil Goutham } 9346465859aSSunil Goutham 9350bcb7d51SSunil Goutham static void bgx_set_lmac_config(struct bgx *bgx, u8 idx) 9360bcb7d51SSunil Goutham { 9370bcb7d51SSunil Goutham struct lmac *lmac; 93857aaf63cSSunil Goutham struct lmac *olmac; 9390bcb7d51SSunil Goutham u64 cmr_cfg; 94057aaf63cSSunil Goutham u8 lmac_type; 94157aaf63cSSunil Goutham u8 lane_to_sds; 9420bcb7d51SSunil Goutham 9430bcb7d51SSunil Goutham lmac = &bgx->lmac[idx]; 9444863dea3SSunil Goutham 94509de3917SSunil Goutham if (!bgx->is_dlm || bgx->is_rgx) { 9464863dea3SSunil Goutham /* Read LMAC0 type to figure out QLM mode 9474863dea3SSunil Goutham * This is configured by low level firmware 9484863dea3SSunil Goutham */ 9490bcb7d51SSunil Goutham cmr_cfg = bgx_reg_read(bgx, 0, BGX_CMRX_CFG); 9500bcb7d51SSunil Goutham lmac->lmac_type = (cmr_cfg >> 8) & 0x07; 9516465859aSSunil Goutham if (bgx->is_rgx) 9526465859aSSunil Goutham lmac->lmac_type = BGX_MODE_RGMII; 9536465859aSSunil Goutham lmac_set_training(bgx, lmac, 0); 9543f8057cfSSunil Goutham lmac_set_lane2sds(bgx, lmac); 95557aaf63cSSunil Goutham return; 95657aaf63cSSunil Goutham } 95757aaf63cSSunil Goutham 95857aaf63cSSunil Goutham /* On 81xx BGX can be split across 2 DLMs 95957aaf63cSSunil Goutham * firmware programs lmac_type of LMAC0 and LMAC2 96057aaf63cSSunil Goutham */ 96157aaf63cSSunil Goutham if ((idx == 0) || (idx == 2)) { 96257aaf63cSSunil Goutham cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG); 96357aaf63cSSunil Goutham lmac_type = (u8)((cmr_cfg >> 8) & 0x07); 96457aaf63cSSunil Goutham lane_to_sds = (u8)(cmr_cfg & 0xFF); 96557aaf63cSSunil Goutham /* Check if config is not reset value */ 96657aaf63cSSunil Goutham if ((lmac_type == 0) && (lane_to_sds == 0xE4)) 96757aaf63cSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 96857aaf63cSSunil Goutham else 96957aaf63cSSunil Goutham lmac->lmac_type = lmac_type; 9706465859aSSunil Goutham lmac_set_training(bgx, lmac, lmac->lmacid); 9713f8057cfSSunil Goutham lmac_set_lane2sds(bgx, lmac); 97257aaf63cSSunil Goutham 97357aaf63cSSunil Goutham /* Set LMAC type of other lmac on same DLM i.e LMAC 1/3 */ 97457aaf63cSSunil Goutham olmac = &bgx->lmac[idx + 1]; 97557aaf63cSSunil Goutham olmac->lmac_type = lmac->lmac_type; 9766465859aSSunil Goutham lmac_set_training(bgx, olmac, olmac->lmacid); 9773f8057cfSSunil Goutham lmac_set_lane2sds(bgx, olmac); 97857aaf63cSSunil Goutham } 97957aaf63cSSunil Goutham } 98057aaf63cSSunil Goutham 98157aaf63cSSunil Goutham static bool is_dlm0_in_bgx_mode(struct bgx *bgx) 98257aaf63cSSunil Goutham { 98357aaf63cSSunil Goutham struct lmac *lmac; 98457aaf63cSSunil Goutham 98509de3917SSunil Goutham if (!bgx->is_dlm) 98657aaf63cSSunil Goutham return true; 98757aaf63cSSunil Goutham 9883f8057cfSSunil Goutham lmac = &bgx->lmac[0]; 98957aaf63cSSunil Goutham if (lmac->lmac_type == BGX_MODE_INVALID) 99057aaf63cSSunil Goutham return false; 99157aaf63cSSunil Goutham 99257aaf63cSSunil Goutham return true; 9930bcb7d51SSunil Goutham } 9944863dea3SSunil Goutham 9950bcb7d51SSunil Goutham static void bgx_get_qlm_mode(struct bgx *bgx) 9960bcb7d51SSunil Goutham { 99757aaf63cSSunil Goutham struct lmac *lmac; 99857aaf63cSSunil Goutham struct lmac *lmac01; 99957aaf63cSSunil Goutham struct lmac *lmac23; 10000bcb7d51SSunil Goutham u8 idx; 10010bcb7d51SSunil Goutham 100257aaf63cSSunil Goutham /* Init all LMAC's type to invalid */ 10036465859aSSunil Goutham for (idx = 0; idx < bgx->max_lmac; idx++) { 100457aaf63cSSunil Goutham lmac = &bgx->lmac[idx]; 100557aaf63cSSunil Goutham lmac->lmacid = idx; 10066465859aSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 10076465859aSSunil Goutham lmac->use_training = false; 100857aaf63cSSunil Goutham } 100957aaf63cSSunil Goutham 10100bcb7d51SSunil Goutham /* It is assumed that low level firmware sets this value */ 10110bcb7d51SSunil Goutham bgx->lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7; 10126465859aSSunil Goutham if (bgx->lmac_count > bgx->max_lmac) 10136465859aSSunil Goutham bgx->lmac_count = bgx->max_lmac; 10140bcb7d51SSunil Goutham 10156465859aSSunil Goutham for (idx = 0; idx < bgx->max_lmac; idx++) 10160bcb7d51SSunil Goutham bgx_set_lmac_config(bgx, idx); 101757aaf63cSSunil Goutham 101809de3917SSunil Goutham if (!bgx->is_dlm || bgx->is_rgx) { 10190bcb7d51SSunil Goutham bgx_print_qlm_mode(bgx, 0); 102057aaf63cSSunil Goutham return; 102157aaf63cSSunil Goutham } 102257aaf63cSSunil Goutham 102357aaf63cSSunil Goutham if (bgx->lmac_count) { 102457aaf63cSSunil Goutham bgx_print_qlm_mode(bgx, 0); 102557aaf63cSSunil Goutham bgx_print_qlm_mode(bgx, 2); 102657aaf63cSSunil Goutham } 102757aaf63cSSunil Goutham 102857aaf63cSSunil Goutham /* If DLM0 is not in BGX mode then LMAC0/1 have 102957aaf63cSSunil Goutham * to be configured with serdes lanes of DLM1 103057aaf63cSSunil Goutham */ 103157aaf63cSSunil Goutham if (is_dlm0_in_bgx_mode(bgx) || (bgx->lmac_count > 2)) 103257aaf63cSSunil Goutham return; 103357aaf63cSSunil Goutham for (idx = 0; idx < bgx->lmac_count; idx++) { 103457aaf63cSSunil Goutham lmac01 = &bgx->lmac[idx]; 103557aaf63cSSunil Goutham lmac23 = &bgx->lmac[idx + 2]; 103657aaf63cSSunil Goutham lmac01->lmac_type = lmac23->lmac_type; 103757aaf63cSSunil Goutham lmac01->lane_to_sds = lmac23->lane_to_sds; 103857aaf63cSSunil Goutham } 10394863dea3SSunil Goutham } 10404863dea3SSunil Goutham 104146b903a0SDavid Daney #ifdef CONFIG_ACPI 104246b903a0SDavid Daney 10431d82efacSRobert Richter static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev, 10441d82efacSRobert Richter u8 *dst) 104546b903a0SDavid Daney { 104646b903a0SDavid Daney u8 mac[ETH_ALEN]; 104746b903a0SDavid Daney int ret; 104846b903a0SDavid Daney 104946b903a0SDavid Daney ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev), 105046b903a0SDavid Daney "mac-address", mac, ETH_ALEN); 105146b903a0SDavid Daney if (ret) 105246b903a0SDavid Daney goto out; 105346b903a0SDavid Daney 105446b903a0SDavid Daney if (!is_valid_ether_addr(mac)) { 10551d82efacSRobert Richter dev_err(dev, "MAC address invalid: %pM\n", mac); 105646b903a0SDavid Daney ret = -EINVAL; 105746b903a0SDavid Daney goto out; 105846b903a0SDavid Daney } 105946b903a0SDavid Daney 10601d82efacSRobert Richter dev_info(dev, "MAC address set to: %pM\n", mac); 10611d82efacSRobert Richter 106246b903a0SDavid Daney memcpy(dst, mac, ETH_ALEN); 106346b903a0SDavid Daney out: 106446b903a0SDavid Daney return ret; 106546b903a0SDavid Daney } 106646b903a0SDavid Daney 106746b903a0SDavid Daney /* Currently only sets the MAC address. */ 106846b903a0SDavid Daney static acpi_status bgx_acpi_register_phy(acpi_handle handle, 106946b903a0SDavid Daney u32 lvl, void *context, void **rv) 107046b903a0SDavid Daney { 107146b903a0SDavid Daney struct bgx *bgx = context; 10721d82efacSRobert Richter struct device *dev = &bgx->pdev->dev; 107346b903a0SDavid Daney struct acpi_device *adev; 107446b903a0SDavid Daney 107546b903a0SDavid Daney if (acpi_bus_get_device(handle, &adev)) 107646b903a0SDavid Daney goto out; 107746b903a0SDavid Daney 10781d82efacSRobert Richter acpi_get_mac_address(dev, adev, bgx->lmac[bgx->lmac_count].mac); 107946b903a0SDavid Daney 10801d82efacSRobert Richter SET_NETDEV_DEV(&bgx->lmac[bgx->lmac_count].netdev, dev); 108146b903a0SDavid Daney 108246b903a0SDavid Daney bgx->lmac[bgx->lmac_count].lmacid = bgx->lmac_count; 108346b903a0SDavid Daney out: 108446b903a0SDavid Daney bgx->lmac_count++; 108546b903a0SDavid Daney return AE_OK; 108646b903a0SDavid Daney } 108746b903a0SDavid Daney 108846b903a0SDavid Daney static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl, 108946b903a0SDavid Daney void *context, void **ret_val) 109046b903a0SDavid Daney { 109146b903a0SDavid Daney struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL }; 109246b903a0SDavid Daney struct bgx *bgx = context; 109346b903a0SDavid Daney char bgx_sel[5]; 109446b903a0SDavid Daney 109546b903a0SDavid Daney snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id); 109646b903a0SDavid Daney if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &string))) { 109746b903a0SDavid Daney pr_warn("Invalid link device\n"); 109846b903a0SDavid Daney return AE_OK; 109946b903a0SDavid Daney } 110046b903a0SDavid Daney 110146b903a0SDavid Daney if (strncmp(string.pointer, bgx_sel, 4)) 110246b903a0SDavid Daney return AE_OK; 110346b903a0SDavid Daney 110446b903a0SDavid Daney acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, 110546b903a0SDavid Daney bgx_acpi_register_phy, NULL, bgx, NULL); 110646b903a0SDavid Daney 110746b903a0SDavid Daney kfree(string.pointer); 110846b903a0SDavid Daney return AE_CTRL_TERMINATE; 110946b903a0SDavid Daney } 111046b903a0SDavid Daney 111146b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 111246b903a0SDavid Daney { 111346b903a0SDavid Daney acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL); 111446b903a0SDavid Daney return 0; 111546b903a0SDavid Daney } 111646b903a0SDavid Daney 111746b903a0SDavid Daney #else 111846b903a0SDavid Daney 111946b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 112046b903a0SDavid Daney { 112146b903a0SDavid Daney return -ENODEV; 112246b903a0SDavid Daney } 112346b903a0SDavid Daney 112446b903a0SDavid Daney #endif /* CONFIG_ACPI */ 112546b903a0SDavid Daney 1126de387e11SRobert Richter #if IS_ENABLED(CONFIG_OF_MDIO) 1127de387e11SRobert Richter 1128de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 11294863dea3SSunil Goutham { 1130eee326fdSDavid Daney struct fwnode_handle *fwn; 1131b7d3e3d3SDavid Daney struct device_node *node = NULL; 11324863dea3SSunil Goutham u8 lmac = 0; 11334863dea3SSunil Goutham 1134eee326fdSDavid Daney device_for_each_child_node(&bgx->pdev->dev, fwn) { 11355fc7cf17SDavid Daney struct phy_device *pd; 1136eee326fdSDavid Daney struct device_node *phy_np; 1137b7d3e3d3SDavid Daney const char *mac; 1138de387e11SRobert Richter 11395fc7cf17SDavid Daney /* Should always be an OF node. But if it is not, we 11405fc7cf17SDavid Daney * cannot handle it, so exit the loop. 1141eee326fdSDavid Daney */ 1142b7d3e3d3SDavid Daney node = to_of_node(fwn); 1143eee326fdSDavid Daney if (!node) 1144eee326fdSDavid Daney break; 1145eee326fdSDavid Daney 1146eee326fdSDavid Daney mac = of_get_mac_address(node); 11474863dea3SSunil Goutham if (mac) 11484863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmac].mac, mac); 11494863dea3SSunil Goutham 11504863dea3SSunil Goutham SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev); 11514863dea3SSunil Goutham bgx->lmac[lmac].lmacid = lmac; 11525fc7cf17SDavid Daney 11535fc7cf17SDavid Daney phy_np = of_parse_phandle(node, "phy-handle", 0); 11545fc7cf17SDavid Daney /* If there is no phy or defective firmware presents 11555fc7cf17SDavid Daney * this cortina phy, for which there is no driver 11565fc7cf17SDavid Daney * support, ignore it. 11575fc7cf17SDavid Daney */ 11585fc7cf17SDavid Daney if (phy_np && 11595fc7cf17SDavid Daney !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) { 11605fc7cf17SDavid Daney /* Wait until the phy drivers are available */ 11615fc7cf17SDavid Daney pd = of_phy_find_device(phy_np); 11625fc7cf17SDavid Daney if (!pd) 1163b7d3e3d3SDavid Daney goto defer; 11645fc7cf17SDavid Daney bgx->lmac[lmac].phydev = pd; 11655fc7cf17SDavid Daney } 11665fc7cf17SDavid Daney 11674863dea3SSunil Goutham lmac++; 11686465859aSSunil Goutham if (lmac == bgx->max_lmac) { 116965c66af6SDavid Daney of_node_put(node); 11704863dea3SSunil Goutham break; 11714863dea3SSunil Goutham } 117265c66af6SDavid Daney } 1173de387e11SRobert Richter return 0; 1174b7d3e3d3SDavid Daney 1175b7d3e3d3SDavid Daney defer: 1176b7d3e3d3SDavid Daney /* We are bailing out, try not to leak device reference counts 1177b7d3e3d3SDavid Daney * for phy devices we may have already found. 1178b7d3e3d3SDavid Daney */ 1179b7d3e3d3SDavid Daney while (lmac) { 1180b7d3e3d3SDavid Daney if (bgx->lmac[lmac].phydev) { 1181b7d3e3d3SDavid Daney put_device(&bgx->lmac[lmac].phydev->mdio.dev); 1182b7d3e3d3SDavid Daney bgx->lmac[lmac].phydev = NULL; 1183b7d3e3d3SDavid Daney } 1184b7d3e3d3SDavid Daney lmac--; 1185b7d3e3d3SDavid Daney } 1186b7d3e3d3SDavid Daney of_node_put(node); 1187b7d3e3d3SDavid Daney return -EPROBE_DEFER; 1188de387e11SRobert Richter } 1189de387e11SRobert Richter 1190de387e11SRobert Richter #else 1191de387e11SRobert Richter 1192de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 1193de387e11SRobert Richter { 1194de387e11SRobert Richter return -ENODEV; 1195de387e11SRobert Richter } 1196de387e11SRobert Richter 1197de387e11SRobert Richter #endif /* CONFIG_OF_MDIO */ 1198de387e11SRobert Richter 1199de387e11SRobert Richter static int bgx_init_phy(struct bgx *bgx) 1200de387e11SRobert Richter { 120146b903a0SDavid Daney if (!acpi_disabled) 120246b903a0SDavid Daney return bgx_init_acpi_phy(bgx); 120346b903a0SDavid Daney 1204de387e11SRobert Richter return bgx_init_of_phy(bgx); 12054863dea3SSunil Goutham } 12064863dea3SSunil Goutham 12074863dea3SSunil Goutham static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 12084863dea3SSunil Goutham { 12094863dea3SSunil Goutham int err; 12104863dea3SSunil Goutham struct device *dev = &pdev->dev; 12114863dea3SSunil Goutham struct bgx *bgx = NULL; 12124863dea3SSunil Goutham u8 lmac; 121357aaf63cSSunil Goutham u16 sdevid; 12144863dea3SSunil Goutham 12154863dea3SSunil Goutham bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL); 12164863dea3SSunil Goutham if (!bgx) 12174863dea3SSunil Goutham return -ENOMEM; 12184863dea3SSunil Goutham bgx->pdev = pdev; 12194863dea3SSunil Goutham 12204863dea3SSunil Goutham pci_set_drvdata(pdev, bgx); 12214863dea3SSunil Goutham 12224863dea3SSunil Goutham err = pci_enable_device(pdev); 12234863dea3SSunil Goutham if (err) { 12244863dea3SSunil Goutham dev_err(dev, "Failed to enable PCI device\n"); 12254863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 12264863dea3SSunil Goutham return err; 12274863dea3SSunil Goutham } 12284863dea3SSunil Goutham 12294863dea3SSunil Goutham err = pci_request_regions(pdev, DRV_NAME); 12304863dea3SSunil Goutham if (err) { 12314863dea3SSunil Goutham dev_err(dev, "PCI request regions failed 0x%x\n", err); 12324863dea3SSunil Goutham goto err_disable_device; 12334863dea3SSunil Goutham } 12344863dea3SSunil Goutham 12354863dea3SSunil Goutham /* MAP configuration registers */ 12364863dea3SSunil Goutham bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 12374863dea3SSunil Goutham if (!bgx->reg_base) { 12384863dea3SSunil Goutham dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n"); 12394863dea3SSunil Goutham err = -ENOMEM; 12404863dea3SSunil Goutham goto err_release_regions; 12414863dea3SSunil Goutham } 1242d768b678SRobert Richter 12436465859aSSunil Goutham pci_read_config_word(pdev, PCI_DEVICE_ID, &sdevid); 12446465859aSSunil Goutham if (sdevid != PCI_DEVICE_ID_THUNDER_RGX) { 1245612e94bdSRadha Mohan Chintakuntla bgx->bgx_id = (pci_resource_start(pdev, 1246612e94bdSRadha Mohan Chintakuntla PCI_CFG_REG_BAR_NUM) >> 24) & BGX_ID_MASK; 124709de3917SSunil Goutham bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_NODE; 12486465859aSSunil Goutham bgx->max_lmac = MAX_LMAC_PER_BGX; 12494863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 12506465859aSSunil Goutham } else { 12516465859aSSunil Goutham bgx->is_rgx = true; 12526465859aSSunil Goutham bgx->max_lmac = 1; 12536465859aSSunil Goutham bgx->bgx_id = MAX_BGX_PER_CN81XX - 1; 12546465859aSSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 12556465859aSSunil Goutham xcv_init_hw(); 12566465859aSSunil Goutham } 12576465859aSSunil Goutham 125809de3917SSunil Goutham /* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one 125909de3917SSunil Goutham * BGX i.e BGX2 can be split across 2 DLMs. 126009de3917SSunil Goutham */ 126109de3917SSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid); 126209de3917SSunil Goutham if ((sdevid == PCI_SUBSYS_DEVID_81XX_BGX) || 126309de3917SSunil Goutham ((sdevid == PCI_SUBSYS_DEVID_83XX_BGX) && (bgx->bgx_id == 2))) 126409de3917SSunil Goutham bgx->is_dlm = true; 126509de3917SSunil Goutham 12664863dea3SSunil Goutham bgx_get_qlm_mode(bgx); 12674863dea3SSunil Goutham 1268de387e11SRobert Richter err = bgx_init_phy(bgx); 1269de387e11SRobert Richter if (err) 1270de387e11SRobert Richter goto err_enable; 12714863dea3SSunil Goutham 12724863dea3SSunil Goutham bgx_init_hw(bgx); 12734863dea3SSunil Goutham 12744863dea3SSunil Goutham /* Enable all LMACs */ 12754863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) { 12764863dea3SSunil Goutham err = bgx_lmac_enable(bgx, lmac); 12774863dea3SSunil Goutham if (err) { 12784863dea3SSunil Goutham dev_err(dev, "BGX%d failed to enable lmac%d\n", 12794863dea3SSunil Goutham bgx->bgx_id, lmac); 128057aaf63cSSunil Goutham while (lmac) 128157aaf63cSSunil Goutham bgx_lmac_disable(bgx, --lmac); 12824863dea3SSunil Goutham goto err_enable; 12834863dea3SSunil Goutham } 12844863dea3SSunil Goutham } 12854863dea3SSunil Goutham 12864863dea3SSunil Goutham return 0; 12874863dea3SSunil Goutham 12884863dea3SSunil Goutham err_enable: 12894863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 12904863dea3SSunil Goutham err_release_regions: 12914863dea3SSunil Goutham pci_release_regions(pdev); 12924863dea3SSunil Goutham err_disable_device: 12934863dea3SSunil Goutham pci_disable_device(pdev); 12944863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 12954863dea3SSunil Goutham return err; 12964863dea3SSunil Goutham } 12974863dea3SSunil Goutham 12984863dea3SSunil Goutham static void bgx_remove(struct pci_dev *pdev) 12994863dea3SSunil Goutham { 13004863dea3SSunil Goutham struct bgx *bgx = pci_get_drvdata(pdev); 13014863dea3SSunil Goutham u8 lmac; 13024863dea3SSunil Goutham 13034863dea3SSunil Goutham /* Disable all LMACs */ 13044863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) 13054863dea3SSunil Goutham bgx_lmac_disable(bgx, lmac); 13064863dea3SSunil Goutham 13074863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 13084863dea3SSunil Goutham pci_release_regions(pdev); 13094863dea3SSunil Goutham pci_disable_device(pdev); 13104863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 13114863dea3SSunil Goutham } 13124863dea3SSunil Goutham 13134863dea3SSunil Goutham static struct pci_driver bgx_driver = { 13144863dea3SSunil Goutham .name = DRV_NAME, 13154863dea3SSunil Goutham .id_table = bgx_id_table, 13164863dea3SSunil Goutham .probe = bgx_probe, 13174863dea3SSunil Goutham .remove = bgx_remove, 13184863dea3SSunil Goutham }; 13194863dea3SSunil Goutham 13204863dea3SSunil Goutham static int __init bgx_init_module(void) 13214863dea3SSunil Goutham { 13224863dea3SSunil Goutham pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 13234863dea3SSunil Goutham 13244863dea3SSunil Goutham return pci_register_driver(&bgx_driver); 13254863dea3SSunil Goutham } 13264863dea3SSunil Goutham 13274863dea3SSunil Goutham static void __exit bgx_cleanup_module(void) 13284863dea3SSunil Goutham { 13294863dea3SSunil Goutham pci_unregister_driver(&bgx_driver); 13304863dea3SSunil Goutham } 13314863dea3SSunil Goutham 13324863dea3SSunil Goutham module_init(bgx_init_module); 13334863dea3SSunil Goutham module_exit(bgx_cleanup_module); 1334