14863dea3SSunil Goutham /* 24863dea3SSunil Goutham * Copyright (C) 2015 Cavium, Inc. 34863dea3SSunil Goutham * 44863dea3SSunil Goutham * This program is free software; you can redistribute it and/or modify it 54863dea3SSunil Goutham * under the terms of version 2 of the GNU General Public License 64863dea3SSunil Goutham * as published by the Free Software Foundation. 74863dea3SSunil Goutham */ 84863dea3SSunil Goutham 946b903a0SDavid Daney #include <linux/acpi.h> 104863dea3SSunil Goutham #include <linux/module.h> 114863dea3SSunil Goutham #include <linux/interrupt.h> 124863dea3SSunil Goutham #include <linux/pci.h> 134863dea3SSunil Goutham #include <linux/netdevice.h> 144863dea3SSunil Goutham #include <linux/etherdevice.h> 154863dea3SSunil Goutham #include <linux/phy.h> 164863dea3SSunil Goutham #include <linux/of.h> 174863dea3SSunil Goutham #include <linux/of_mdio.h> 184863dea3SSunil Goutham #include <linux/of_net.h> 194863dea3SSunil Goutham 204863dea3SSunil Goutham #include "nic_reg.h" 214863dea3SSunil Goutham #include "nic.h" 224863dea3SSunil Goutham #include "thunder_bgx.h" 234863dea3SSunil Goutham 244863dea3SSunil Goutham #define DRV_NAME "thunder-BGX" 254863dea3SSunil Goutham #define DRV_VERSION "1.0" 264863dea3SSunil Goutham 274863dea3SSunil Goutham struct lmac { 284863dea3SSunil Goutham struct bgx *bgx; 294863dea3SSunil Goutham int dmac; 3046b903a0SDavid Daney u8 mac[ETH_ALEN]; 310bcb7d51SSunil Goutham u8 lmac_type; 320bcb7d51SSunil Goutham u8 lane_to_sds; 330bcb7d51SSunil Goutham bool use_training; 344863dea3SSunil Goutham bool link_up; 354863dea3SSunil Goutham int lmacid; /* ID within BGX */ 364863dea3SSunil Goutham int lmacid_bd; /* ID on board */ 374863dea3SSunil Goutham struct net_device netdev; 384863dea3SSunil Goutham struct phy_device *phydev; 394863dea3SSunil Goutham unsigned int last_duplex; 404863dea3SSunil Goutham unsigned int last_link; 414863dea3SSunil Goutham unsigned int last_speed; 424863dea3SSunil Goutham bool is_sgmii; 434863dea3SSunil Goutham struct delayed_work dwork; 444863dea3SSunil Goutham struct workqueue_struct *check_link; 450c886a1dSAleksey Makarov }; 464863dea3SSunil Goutham 474863dea3SSunil Goutham struct bgx { 484863dea3SSunil Goutham u8 bgx_id; 494863dea3SSunil Goutham struct lmac lmac[MAX_LMAC_PER_BGX]; 504863dea3SSunil Goutham int lmac_count; 514863dea3SSunil Goutham void __iomem *reg_base; 524863dea3SSunil Goutham struct pci_dev *pdev; 5357aaf63cSSunil Goutham bool is_81xx; 540c886a1dSAleksey Makarov }; 554863dea3SSunil Goutham 56fd7ec062SAleksey Makarov static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; 574863dea3SSunil Goutham static int lmac_count; /* Total no of LMACs in system */ 584863dea3SSunil Goutham 594863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac); 604863dea3SSunil Goutham 614863dea3SSunil Goutham /* Supported devices */ 624863dea3SSunil Goutham static const struct pci_device_id bgx_id_table[] = { 634863dea3SSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_BGX) }, 644863dea3SSunil Goutham { 0, } /* end of table */ 654863dea3SSunil Goutham }; 664863dea3SSunil Goutham 674863dea3SSunil Goutham MODULE_AUTHOR("Cavium Inc"); 684863dea3SSunil Goutham MODULE_DESCRIPTION("Cavium Thunder BGX/MAC Driver"); 694863dea3SSunil Goutham MODULE_LICENSE("GPL v2"); 704863dea3SSunil Goutham MODULE_VERSION(DRV_VERSION); 714863dea3SSunil Goutham MODULE_DEVICE_TABLE(pci, bgx_id_table); 724863dea3SSunil Goutham 734863dea3SSunil Goutham /* The Cavium ThunderX network controller can *only* be found in SoCs 744863dea3SSunil Goutham * containing the ThunderX ARM64 CPU implementation. All accesses to the device 754863dea3SSunil Goutham * registers on this platform are implicitly strongly ordered with respect 764863dea3SSunil Goutham * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 774863dea3SSunil Goutham * with no memory barriers in this driver. The readq()/writeq() functions add 784863dea3SSunil Goutham * explicit ordering operation which in this case are redundant, and only 794863dea3SSunil Goutham * add overhead. 804863dea3SSunil Goutham */ 814863dea3SSunil Goutham 824863dea3SSunil Goutham /* Register read/write APIs */ 834863dea3SSunil Goutham static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset) 844863dea3SSunil Goutham { 854863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 864863dea3SSunil Goutham 874863dea3SSunil Goutham return readq_relaxed(addr); 884863dea3SSunil Goutham } 894863dea3SSunil Goutham 904863dea3SSunil Goutham static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 914863dea3SSunil Goutham { 924863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 934863dea3SSunil Goutham 944863dea3SSunil Goutham writeq_relaxed(val, addr); 954863dea3SSunil Goutham } 964863dea3SSunil Goutham 974863dea3SSunil Goutham static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 984863dea3SSunil Goutham { 994863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 1004863dea3SSunil Goutham 1014863dea3SSunil Goutham writeq_relaxed(val | readq_relaxed(addr), addr); 1024863dea3SSunil Goutham } 1034863dea3SSunil Goutham 1044863dea3SSunil Goutham static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) 1054863dea3SSunil Goutham { 1064863dea3SSunil Goutham int timeout = 100; 1074863dea3SSunil Goutham u64 reg_val; 1084863dea3SSunil Goutham 1094863dea3SSunil Goutham while (timeout) { 1104863dea3SSunil Goutham reg_val = bgx_reg_read(bgx, lmac, reg); 1114863dea3SSunil Goutham if (zero && !(reg_val & mask)) 1124863dea3SSunil Goutham return 0; 1134863dea3SSunil Goutham if (!zero && (reg_val & mask)) 1144863dea3SSunil Goutham return 0; 1154863dea3SSunil Goutham usleep_range(1000, 2000); 1164863dea3SSunil Goutham timeout--; 1174863dea3SSunil Goutham } 1184863dea3SSunil Goutham return 1; 1194863dea3SSunil Goutham } 1204863dea3SSunil Goutham 1214863dea3SSunil Goutham /* Return number of BGX present in HW */ 1224863dea3SSunil Goutham unsigned bgx_get_map(int node) 1234863dea3SSunil Goutham { 1244863dea3SSunil Goutham int i; 1254863dea3SSunil Goutham unsigned map = 0; 1264863dea3SSunil Goutham 1274863dea3SSunil Goutham for (i = 0; i < MAX_BGX_PER_CN88XX; i++) { 1284863dea3SSunil Goutham if (bgx_vnic[(node * MAX_BGX_PER_CN88XX) + i]) 1294863dea3SSunil Goutham map |= (1 << i); 1304863dea3SSunil Goutham } 1314863dea3SSunil Goutham 1324863dea3SSunil Goutham return map; 1334863dea3SSunil Goutham } 1344863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_map); 1354863dea3SSunil Goutham 1364863dea3SSunil Goutham /* Return number of LMAC configured for this BGX */ 1374863dea3SSunil Goutham int bgx_get_lmac_count(int node, int bgx_idx) 1384863dea3SSunil Goutham { 1394863dea3SSunil Goutham struct bgx *bgx; 1404863dea3SSunil Goutham 1414863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1424863dea3SSunil Goutham if (bgx) 1434863dea3SSunil Goutham return bgx->lmac_count; 1444863dea3SSunil Goutham 1454863dea3SSunil Goutham return 0; 1464863dea3SSunil Goutham } 1474863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_count); 1484863dea3SSunil Goutham 1494863dea3SSunil Goutham /* Returns the current link status of LMAC */ 1504863dea3SSunil Goutham void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status) 1514863dea3SSunil Goutham { 1524863dea3SSunil Goutham struct bgx_link_status *link = (struct bgx_link_status *)status; 1534863dea3SSunil Goutham struct bgx *bgx; 1544863dea3SSunil Goutham struct lmac *lmac; 1554863dea3SSunil Goutham 1564863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1574863dea3SSunil Goutham if (!bgx) 1584863dea3SSunil Goutham return; 1594863dea3SSunil Goutham 1604863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 1614863dea3SSunil Goutham link->link_up = lmac->link_up; 1624863dea3SSunil Goutham link->duplex = lmac->last_duplex; 1634863dea3SSunil Goutham link->speed = lmac->last_speed; 1644863dea3SSunil Goutham } 1654863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_link_state); 1664863dea3SSunil Goutham 167e610cb32SAleksey Makarov const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid) 1684863dea3SSunil Goutham { 1694863dea3SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1704863dea3SSunil Goutham 1714863dea3SSunil Goutham if (bgx) 1724863dea3SSunil Goutham return bgx->lmac[lmacid].mac; 1734863dea3SSunil Goutham 1744863dea3SSunil Goutham return NULL; 1754863dea3SSunil Goutham } 1764863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_mac); 1774863dea3SSunil Goutham 178e610cb32SAleksey Makarov void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac) 1794863dea3SSunil Goutham { 1804863dea3SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1814863dea3SSunil Goutham 1824863dea3SSunil Goutham if (!bgx) 1834863dea3SSunil Goutham return; 1844863dea3SSunil Goutham 1854863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmacid].mac, mac); 1864863dea3SSunil Goutham } 1874863dea3SSunil Goutham EXPORT_SYMBOL(bgx_set_lmac_mac); 1884863dea3SSunil Goutham 189bc69fdfcSSunil Goutham void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable) 190bc69fdfcSSunil Goutham { 191bc69fdfcSSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 192bc69fdfcSSunil Goutham u64 cfg; 193bc69fdfcSSunil Goutham 194bc69fdfcSSunil Goutham if (!bgx) 195bc69fdfcSSunil Goutham return; 196bc69fdfcSSunil Goutham 197bc69fdfcSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 198bc69fdfcSSunil Goutham if (enable) 199bc69fdfcSSunil Goutham cfg |= CMR_PKT_RX_EN | CMR_PKT_TX_EN; 200bc69fdfcSSunil Goutham else 201bc69fdfcSSunil Goutham cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN); 202bc69fdfcSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 203bc69fdfcSSunil Goutham } 204bc69fdfcSSunil Goutham EXPORT_SYMBOL(bgx_lmac_rx_tx_enable); 205bc69fdfcSSunil Goutham 2064863dea3SSunil Goutham static void bgx_sgmii_change_link_state(struct lmac *lmac) 2074863dea3SSunil Goutham { 2084863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 2094863dea3SSunil Goutham u64 cmr_cfg; 2104863dea3SSunil Goutham u64 port_cfg = 0; 2114863dea3SSunil Goutham u64 misc_ctl = 0; 2124863dea3SSunil Goutham 2134863dea3SSunil Goutham cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG); 2144863dea3SSunil Goutham cmr_cfg &= ~CMR_EN; 2154863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2164863dea3SSunil Goutham 2174863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2184863dea3SSunil Goutham misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL); 2194863dea3SSunil Goutham 2204863dea3SSunil Goutham if (lmac->link_up) { 2214863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_GMX_ENO; 2224863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_DUPLEX; 2234863dea3SSunil Goutham port_cfg |= (lmac->last_duplex << 2); 2244863dea3SSunil Goutham } else { 2254863dea3SSunil Goutham misc_ctl |= PCS_MISC_CTL_GMX_ENO; 2264863dea3SSunil Goutham } 2274863dea3SSunil Goutham 2284863dea3SSunil Goutham switch (lmac->last_speed) { 2294863dea3SSunil Goutham case 10: 2304863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2314863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED_MSB; /* speed_msb 1 */ 2324863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2334863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2344863dea3SSunil Goutham misc_ctl |= 50; /* samp_pt */ 2354863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2364863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2374863dea3SSunil Goutham break; 2384863dea3SSunil Goutham case 100: 2394863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2404863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2414863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2424863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2434863dea3SSunil Goutham misc_ctl |= 5; /* samp_pt */ 2444863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2454863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2464863dea3SSunil Goutham break; 2474863dea3SSunil Goutham case 1000: 2484863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED; /* speed 1 */ 2494863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2504863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SLOT_TIME; /* slottime 1 */ 2514863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2524863dea3SSunil Goutham misc_ctl |= 1; /* samp_pt */ 2534863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512); 2544863dea3SSunil Goutham if (lmac->last_duplex) 2554863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 2564863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 0); 2574863dea3SSunil Goutham else 2584863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 2594863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 8192); 2604863dea3SSunil Goutham break; 2614863dea3SSunil Goutham default: 2624863dea3SSunil Goutham break; 2634863dea3SSunil Goutham } 2644863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl); 2654863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg); 2664863dea3SSunil Goutham 2674863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2684863dea3SSunil Goutham 2694863dea3SSunil Goutham /* renable lmac */ 2704863dea3SSunil Goutham cmr_cfg |= CMR_EN; 2714863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2724863dea3SSunil Goutham } 2734863dea3SSunil Goutham 274fd7ec062SAleksey Makarov static void bgx_lmac_handler(struct net_device *netdev) 2754863dea3SSunil Goutham { 2764863dea3SSunil Goutham struct lmac *lmac = container_of(netdev, struct lmac, netdev); 277099a728dSxypron.glpk@gmx.de struct phy_device *phydev; 2784863dea3SSunil Goutham int link_changed = 0; 2794863dea3SSunil Goutham 2804863dea3SSunil Goutham if (!lmac) 2814863dea3SSunil Goutham return; 2824863dea3SSunil Goutham 283099a728dSxypron.glpk@gmx.de phydev = lmac->phydev; 284099a728dSxypron.glpk@gmx.de 2854863dea3SSunil Goutham if (!phydev->link && lmac->last_link) 2864863dea3SSunil Goutham link_changed = -1; 2874863dea3SSunil Goutham 2884863dea3SSunil Goutham if (phydev->link && 2894863dea3SSunil Goutham (lmac->last_duplex != phydev->duplex || 2904863dea3SSunil Goutham lmac->last_link != phydev->link || 2914863dea3SSunil Goutham lmac->last_speed != phydev->speed)) { 2924863dea3SSunil Goutham link_changed = 1; 2934863dea3SSunil Goutham } 2944863dea3SSunil Goutham 2954863dea3SSunil Goutham lmac->last_link = phydev->link; 2964863dea3SSunil Goutham lmac->last_speed = phydev->speed; 2974863dea3SSunil Goutham lmac->last_duplex = phydev->duplex; 2984863dea3SSunil Goutham 2994863dea3SSunil Goutham if (!link_changed) 3004863dea3SSunil Goutham return; 3014863dea3SSunil Goutham 3024863dea3SSunil Goutham if (link_changed > 0) 3034863dea3SSunil Goutham lmac->link_up = true; 3044863dea3SSunil Goutham else 3054863dea3SSunil Goutham lmac->link_up = false; 3064863dea3SSunil Goutham 3074863dea3SSunil Goutham if (lmac->is_sgmii) 3084863dea3SSunil Goutham bgx_sgmii_change_link_state(lmac); 3094863dea3SSunil Goutham else 3104863dea3SSunil Goutham bgx_xaui_check_link(lmac); 3114863dea3SSunil Goutham } 3124863dea3SSunil Goutham 3134863dea3SSunil Goutham u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx) 3144863dea3SSunil Goutham { 3154863dea3SSunil Goutham struct bgx *bgx; 3164863dea3SSunil Goutham 3174863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 3184863dea3SSunil Goutham if (!bgx) 3194863dea3SSunil Goutham return 0; 3204863dea3SSunil Goutham 3214863dea3SSunil Goutham if (idx > 8) 3224863dea3SSunil Goutham lmac = 0; 3234863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8)); 3244863dea3SSunil Goutham } 3254863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_rx_stats); 3264863dea3SSunil Goutham 3274863dea3SSunil Goutham u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx) 3284863dea3SSunil Goutham { 3294863dea3SSunil Goutham struct bgx *bgx; 3304863dea3SSunil Goutham 3314863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 3324863dea3SSunil Goutham if (!bgx) 3334863dea3SSunil Goutham return 0; 3344863dea3SSunil Goutham 3354863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8)); 3364863dea3SSunil Goutham } 3374863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_tx_stats); 3384863dea3SSunil Goutham 3394863dea3SSunil Goutham static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac) 3404863dea3SSunil Goutham { 3414863dea3SSunil Goutham u64 offset; 3424863dea3SSunil Goutham 3434863dea3SSunil Goutham while (bgx->lmac[lmac].dmac > 0) { 3444863dea3SSunil Goutham offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) + 3454863dea3SSunil Goutham (lmac * MAX_DMAC_PER_LMAC * sizeof(u64)); 3464863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0); 3474863dea3SSunil Goutham bgx->lmac[lmac].dmac--; 3484863dea3SSunil Goutham } 3494863dea3SSunil Goutham } 3504863dea3SSunil Goutham 351d77a2384SSunil Goutham /* Configure BGX LMAC in internal loopback mode */ 352d77a2384SSunil Goutham void bgx_lmac_internal_loopback(int node, int bgx_idx, 353d77a2384SSunil Goutham int lmac_idx, bool enable) 354d77a2384SSunil Goutham { 355d77a2384SSunil Goutham struct bgx *bgx; 356d77a2384SSunil Goutham struct lmac *lmac; 357d77a2384SSunil Goutham u64 cfg; 358d77a2384SSunil Goutham 359d77a2384SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 360d77a2384SSunil Goutham if (!bgx) 361d77a2384SSunil Goutham return; 362d77a2384SSunil Goutham 363d77a2384SSunil Goutham lmac = &bgx->lmac[lmac_idx]; 364d77a2384SSunil Goutham if (lmac->is_sgmii) { 365d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL); 366d77a2384SSunil Goutham if (enable) 367d77a2384SSunil Goutham cfg |= PCS_MRX_CTL_LOOPBACK1; 368d77a2384SSunil Goutham else 369d77a2384SSunil Goutham cfg &= ~PCS_MRX_CTL_LOOPBACK1; 370d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg); 371d77a2384SSunil Goutham } else { 372d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1); 373d77a2384SSunil Goutham if (enable) 374d77a2384SSunil Goutham cfg |= SPU_CTL_LOOPBACK; 375d77a2384SSunil Goutham else 376d77a2384SSunil Goutham cfg &= ~SPU_CTL_LOOPBACK; 377d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg); 378d77a2384SSunil Goutham } 379d77a2384SSunil Goutham } 380d77a2384SSunil Goutham EXPORT_SYMBOL(bgx_lmac_internal_loopback); 381d77a2384SSunil Goutham 3824863dea3SSunil Goutham static int bgx_lmac_sgmii_init(struct bgx *bgx, int lmacid) 3834863dea3SSunil Goutham { 3844863dea3SSunil Goutham u64 cfg; 3854863dea3SSunil Goutham 3864863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); 3874863dea3SSunil Goutham /* max packet size */ 3884863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE); 3894863dea3SSunil Goutham 3904863dea3SSunil Goutham /* Disable frame alignment if using preamble */ 3914863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 3924863dea3SSunil Goutham if (cfg & 1) 3934863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0); 3944863dea3SSunil Goutham 3954863dea3SSunil Goutham /* Enable lmac */ 3964863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 3974863dea3SSunil Goutham 3984863dea3SSunil Goutham /* PCS reset */ 3994863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET); 4004863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, 4014863dea3SSunil Goutham PCS_MRX_CTL_RESET, true)) { 4024863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n"); 4034863dea3SSunil Goutham return -1; 4044863dea3SSunil Goutham } 4054863dea3SSunil Goutham 4064863dea3SSunil Goutham /* power down, reset autoneg, autoneg enable */ 4074863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL); 4084863dea3SSunil Goutham cfg &= ~PCS_MRX_CTL_PWR_DN; 4094863dea3SSunil Goutham cfg |= (PCS_MRX_CTL_RST_AN | PCS_MRX_CTL_AN_EN); 4104863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); 4114863dea3SSunil Goutham 4124863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS, 4134863dea3SSunil Goutham PCS_MRX_STATUS_AN_CPT, false)) { 4144863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n"); 4154863dea3SSunil Goutham return -1; 4164863dea3SSunil Goutham } 4174863dea3SSunil Goutham 4184863dea3SSunil Goutham return 0; 4194863dea3SSunil Goutham } 4204863dea3SSunil Goutham 4210bcb7d51SSunil Goutham static int bgx_lmac_xaui_init(struct bgx *bgx, struct lmac *lmac) 4224863dea3SSunil Goutham { 4234863dea3SSunil Goutham u64 cfg; 4240bcb7d51SSunil Goutham int lmacid = lmac->lmacid; 4254863dea3SSunil Goutham 4264863dea3SSunil Goutham /* Reset SPU */ 4274863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET); 4284863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 4294863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 4304863dea3SSunil Goutham return -1; 4314863dea3SSunil Goutham } 4324863dea3SSunil Goutham 4334863dea3SSunil Goutham /* Disable LMAC */ 4344863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 4354863dea3SSunil Goutham cfg &= ~CMR_EN; 4364863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 4374863dea3SSunil Goutham 4384863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 4394863dea3SSunil Goutham /* Set interleaved running disparity for RXAUI */ 4400bcb7d51SSunil Goutham if (lmac->lmac_type != BGX_MODE_RXAUI) 4414863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 4424863dea3SSunil Goutham BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS); 4434863dea3SSunil Goutham else 4444863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, 4454863dea3SSunil Goutham SPU_MISC_CTL_RX_DIS | SPU_MISC_CTL_INTLV_RDISP); 4464863dea3SSunil Goutham 4474863dea3SSunil Goutham /* clear all interrupts */ 4484863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT); 4494863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg); 4504863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT); 4514863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg); 4524863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 4534863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 4544863dea3SSunil Goutham 4550bcb7d51SSunil Goutham if (lmac->use_training) { 4564863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00); 4574863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00); 4584863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00); 4594863dea3SSunil Goutham /* training enable */ 4604863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 4614863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, SPU_PMD_CRTL_TRAIN_EN); 4624863dea3SSunil Goutham } 4634863dea3SSunil Goutham 4644863dea3SSunil Goutham /* Append FCS to each packet */ 4654863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D); 4664863dea3SSunil Goutham 4674863dea3SSunil Goutham /* Disable forward error correction */ 4684863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL); 4694863dea3SSunil Goutham cfg &= ~SPU_FEC_CTL_FEC_EN; 4704863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg); 4714863dea3SSunil Goutham 4724863dea3SSunil Goutham /* Disable autoneg */ 4734863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL); 4744863dea3SSunil Goutham cfg = cfg & ~(SPU_AN_CTL_AN_EN | SPU_AN_CTL_XNP_EN); 4754863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg); 4764863dea3SSunil Goutham 4774863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV); 4780bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_10G_KR) 4794863dea3SSunil Goutham cfg |= (1 << 23); 4800bcb7d51SSunil Goutham else if (lmac->lmac_type == BGX_MODE_40G_KR) 4814863dea3SSunil Goutham cfg |= (1 << 24); 4824863dea3SSunil Goutham else 4834863dea3SSunil Goutham cfg &= ~((1 << 23) | (1 << 24)); 4844863dea3SSunil Goutham cfg = cfg & (~((1ULL << 25) | (1ULL << 22) | (1ULL << 12))); 4854863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg); 4864863dea3SSunil Goutham 4874863dea3SSunil Goutham cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL); 4884863dea3SSunil Goutham cfg &= ~SPU_DBG_CTL_AN_ARB_LINK_CHK_EN; 4894863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg); 4904863dea3SSunil Goutham 4914863dea3SSunil Goutham /* Enable lmac */ 4924863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 4934863dea3SSunil Goutham 4944863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1); 4954863dea3SSunil Goutham cfg &= ~SPU_CTL_LOW_POWER; 4964863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg); 4974863dea3SSunil Goutham 4984863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL); 4994863dea3SSunil Goutham cfg &= ~SMU_TX_CTL_UNI_EN; 5004863dea3SSunil Goutham cfg |= SMU_TX_CTL_DIC_EN; 5014863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg); 5024863dea3SSunil Goutham 5034863dea3SSunil Goutham /* take lmac_count into account */ 5044863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1)); 5054863dea3SSunil Goutham /* max packet size */ 5064863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); 5074863dea3SSunil Goutham 5084863dea3SSunil Goutham return 0; 5094863dea3SSunil Goutham } 5104863dea3SSunil Goutham 5114863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac) 5124863dea3SSunil Goutham { 5134863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 5144863dea3SSunil Goutham int lmacid = lmac->lmacid; 5150bcb7d51SSunil Goutham int lmac_type = lmac->lmac_type; 5164863dea3SSunil Goutham u64 cfg; 5174863dea3SSunil Goutham 5184863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS); 5190bcb7d51SSunil Goutham if (lmac->use_training) { 5204863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5214863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 5224863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 5234863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5244863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL); 5254863dea3SSunil Goutham cfg |= (1ull << 0); 5264863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg); 5274863dea3SSunil Goutham return -1; 5284863dea3SSunil Goutham } 5294863dea3SSunil Goutham } 5304863dea3SSunil Goutham 5314863dea3SSunil Goutham /* wait for PCS to come out of reset */ 5324863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 5334863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 5344863dea3SSunil Goutham return -1; 5354863dea3SSunil Goutham } 5364863dea3SSunil Goutham 5374863dea3SSunil Goutham if ((lmac_type == BGX_MODE_10G_KR) || (lmac_type == BGX_MODE_XFI) || 5384863dea3SSunil Goutham (lmac_type == BGX_MODE_40G_KR) || (lmac_type == BGX_MODE_XLAUI)) { 5394863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1, 5404863dea3SSunil Goutham SPU_BR_STATUS_BLK_LOCK, false)) { 5414863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 5424863dea3SSunil Goutham "SPU_BR_STATUS_BLK_LOCK not completed\n"); 5434863dea3SSunil Goutham return -1; 5444863dea3SSunil Goutham } 5454863dea3SSunil Goutham } else { 5464863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS, 5474863dea3SSunil Goutham SPU_BX_STATUS_RX_ALIGN, false)) { 5484863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 5494863dea3SSunil Goutham "SPU_BX_STATUS_RX_ALIGN not completed\n"); 5504863dea3SSunil Goutham return -1; 5514863dea3SSunil Goutham } 5524863dea3SSunil Goutham } 5534863dea3SSunil Goutham 5544863dea3SSunil Goutham /* Clear rcvflt bit (latching high) and read it back */ 5553f4c68cfSSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) 5563f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 5573f4c68cfSSunil Goutham BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 5584863dea3SSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 5594863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); 5600bcb7d51SSunil Goutham if (lmac->use_training) { 5614863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5624863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 5634863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 5644863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5654863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, 5664863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL); 5674863dea3SSunil Goutham cfg |= (1ull << 0); 5684863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, 5694863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, cfg); 5704863dea3SSunil Goutham return -1; 5714863dea3SSunil Goutham } 5724863dea3SSunil Goutham } 5734863dea3SSunil Goutham return -1; 5744863dea3SSunil Goutham } 5754863dea3SSunil Goutham 5764863dea3SSunil Goutham /* Wait for BGX RX to be idle */ 5774863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { 5784863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); 5794863dea3SSunil Goutham return -1; 5804863dea3SSunil Goutham } 5814863dea3SSunil Goutham 5824863dea3SSunil Goutham /* Wait for BGX TX to be idle */ 5834863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) { 5844863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU TX not idle\n"); 5854863dea3SSunil Goutham return -1; 5864863dea3SSunil Goutham } 5874863dea3SSunil Goutham 5883f4c68cfSSunil Goutham /* Clear receive packet disable */ 5894863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); 5904863dea3SSunil Goutham cfg &= ~SPU_MISC_CTL_RX_DIS; 5914863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); 5923f4c68cfSSunil Goutham 5933f4c68cfSSunil Goutham /* Check for MAC RX faults */ 5943f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL); 5953f4c68cfSSunil Goutham /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */ 5963f4c68cfSSunil Goutham cfg &= SMU_RX_CTL_STATUS; 5973f4c68cfSSunil Goutham if (!cfg) 5984863dea3SSunil Goutham return 0; 5993f4c68cfSSunil Goutham 6003f4c68cfSSunil Goutham /* Rx local/remote fault seen. 6013f4c68cfSSunil Goutham * Do lmac reinit to see if condition recovers 6023f4c68cfSSunil Goutham */ 6030bcb7d51SSunil Goutham bgx_lmac_xaui_init(bgx, lmac); 6043f4c68cfSSunil Goutham 6053f4c68cfSSunil Goutham return -1; 6064863dea3SSunil Goutham } 6074863dea3SSunil Goutham 6084863dea3SSunil Goutham static void bgx_poll_for_link(struct work_struct *work) 6094863dea3SSunil Goutham { 6104863dea3SSunil Goutham struct lmac *lmac; 6113f4c68cfSSunil Goutham u64 spu_link, smu_link; 6124863dea3SSunil Goutham 6134863dea3SSunil Goutham lmac = container_of(work, struct lmac, dwork.work); 6144863dea3SSunil Goutham 6154863dea3SSunil Goutham /* Receive link is latching low. Force it high and verify it */ 6164863dea3SSunil Goutham bgx_reg_modify(lmac->bgx, lmac->lmacid, 6174863dea3SSunil Goutham BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); 6184863dea3SSunil Goutham bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, 6194863dea3SSunil Goutham SPU_STATUS1_RCV_LNK, false); 6204863dea3SSunil Goutham 6213f4c68cfSSunil Goutham spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 6223f4c68cfSSunil Goutham smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); 6233f4c68cfSSunil Goutham 6243f4c68cfSSunil Goutham if ((spu_link & SPU_STATUS1_RCV_LNK) && 6253f4c68cfSSunil Goutham !(smu_link & SMU_RX_CTL_STATUS)) { 6264863dea3SSunil Goutham lmac->link_up = 1; 6270bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_XLAUI) 6284863dea3SSunil Goutham lmac->last_speed = 40000; 6294863dea3SSunil Goutham else 6304863dea3SSunil Goutham lmac->last_speed = 10000; 6314863dea3SSunil Goutham lmac->last_duplex = 1; 6324863dea3SSunil Goutham } else { 6334863dea3SSunil Goutham lmac->link_up = 0; 6340b72a9a1SSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 6350b72a9a1SSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 6364863dea3SSunil Goutham } 6374863dea3SSunil Goutham 6384863dea3SSunil Goutham if (lmac->last_link != lmac->link_up) { 6393f4c68cfSSunil Goutham if (lmac->link_up) { 6403f4c68cfSSunil Goutham if (bgx_xaui_check_link(lmac)) { 6413f4c68cfSSunil Goutham /* Errors, clear link_up state */ 6423f4c68cfSSunil Goutham lmac->link_up = 0; 6433f4c68cfSSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 6443f4c68cfSSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 6453f4c68cfSSunil Goutham } 6463f4c68cfSSunil Goutham } 6474863dea3SSunil Goutham lmac->last_link = lmac->link_up; 6484863dea3SSunil Goutham } 6494863dea3SSunil Goutham 6504863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); 6514863dea3SSunil Goutham } 6524863dea3SSunil Goutham 6534863dea3SSunil Goutham static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid) 6544863dea3SSunil Goutham { 6554863dea3SSunil Goutham struct lmac *lmac; 6564863dea3SSunil Goutham u64 cfg; 6574863dea3SSunil Goutham 6584863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 6594863dea3SSunil Goutham lmac->bgx = bgx; 6604863dea3SSunil Goutham 6610bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_SGMII) { 6624863dea3SSunil Goutham lmac->is_sgmii = 1; 6634863dea3SSunil Goutham if (bgx_lmac_sgmii_init(bgx, lmacid)) 6644863dea3SSunil Goutham return -1; 6654863dea3SSunil Goutham } else { 6664863dea3SSunil Goutham lmac->is_sgmii = 0; 6670bcb7d51SSunil Goutham if (bgx_lmac_xaui_init(bgx, lmac)) 6684863dea3SSunil Goutham return -1; 6694863dea3SSunil Goutham } 6704863dea3SSunil Goutham 6714863dea3SSunil Goutham if (lmac->is_sgmii) { 6724863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 6734863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 6744863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg); 6754863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1); 6764863dea3SSunil Goutham } else { 6774863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND); 6784863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 6794863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg); 6804863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4); 6814863dea3SSunil Goutham } 6824863dea3SSunil Goutham 6834863dea3SSunil Goutham /* Enable lmac */ 684bc69fdfcSSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 6854863dea3SSunil Goutham 6864863dea3SSunil Goutham /* Restore default cfg, incase low level firmware changed it */ 6874863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03); 6884863dea3SSunil Goutham 6890bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 6900bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 6910bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 6920bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR)) { 6934863dea3SSunil Goutham if (!lmac->phydev) 6944863dea3SSunil Goutham return -ENODEV; 6954863dea3SSunil Goutham 6964863dea3SSunil Goutham lmac->phydev->dev_flags = 0; 6974863dea3SSunil Goutham 6984863dea3SSunil Goutham if (phy_connect_direct(&lmac->netdev, lmac->phydev, 6994863dea3SSunil Goutham bgx_lmac_handler, 7004863dea3SSunil Goutham PHY_INTERFACE_MODE_SGMII)) 7014863dea3SSunil Goutham return -ENODEV; 7024863dea3SSunil Goutham 7034863dea3SSunil Goutham phy_start_aneg(lmac->phydev); 7044863dea3SSunil Goutham } else { 7054863dea3SSunil Goutham lmac->check_link = alloc_workqueue("check_link", WQ_UNBOUND | 7064863dea3SSunil Goutham WQ_MEM_RECLAIM, 1); 7074863dea3SSunil Goutham if (!lmac->check_link) 7084863dea3SSunil Goutham return -ENOMEM; 7094863dea3SSunil Goutham INIT_DELAYED_WORK(&lmac->dwork, bgx_poll_for_link); 7104863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, 0); 7114863dea3SSunil Goutham } 7124863dea3SSunil Goutham 7134863dea3SSunil Goutham return 0; 7144863dea3SSunil Goutham } 7154863dea3SSunil Goutham 716fd7ec062SAleksey Makarov static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) 7174863dea3SSunil Goutham { 7184863dea3SSunil Goutham struct lmac *lmac; 7193f4c68cfSSunil Goutham u64 cfg; 7204863dea3SSunil Goutham 7214863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 7224863dea3SSunil Goutham if (lmac->check_link) { 7234863dea3SSunil Goutham /* Destroy work queue */ 724a7b1f535SThanneeru Srinivasulu cancel_delayed_work_sync(&lmac->dwork); 7254863dea3SSunil Goutham destroy_workqueue(lmac->check_link); 7264863dea3SSunil Goutham } 7274863dea3SSunil Goutham 7283f4c68cfSSunil Goutham /* Disable packet reception */ 7293f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7303f4c68cfSSunil Goutham cfg &= ~CMR_PKT_RX_EN; 7313f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7323f4c68cfSSunil Goutham 7333f4c68cfSSunil Goutham /* Give chance for Rx/Tx FIFO to get drained */ 7343f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true); 7353f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true); 7363f4c68cfSSunil Goutham 7373f4c68cfSSunil Goutham /* Disable packet transmission */ 7383f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7393f4c68cfSSunil Goutham cfg &= ~CMR_PKT_TX_EN; 7403f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7413f4c68cfSSunil Goutham 7423f4c68cfSSunil Goutham /* Disable serdes lanes */ 7433f4c68cfSSunil Goutham if (!lmac->is_sgmii) 7443f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7453f4c68cfSSunil Goutham BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 7463f4c68cfSSunil Goutham else 7473f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7483f4c68cfSSunil Goutham BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN); 7493f4c68cfSSunil Goutham 7503f4c68cfSSunil Goutham /* Disable LMAC */ 7513f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7523f4c68cfSSunil Goutham cfg &= ~CMR_EN; 7533f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7543f4c68cfSSunil Goutham 7554863dea3SSunil Goutham bgx_flush_dmac_addrs(bgx, lmacid); 7564863dea3SSunil Goutham 7570bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) && 7580bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) && 7590bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) && 7600bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) 7614863dea3SSunil Goutham phy_disconnect(lmac->phydev); 7624863dea3SSunil Goutham 7634863dea3SSunil Goutham lmac->phydev = NULL; 7644863dea3SSunil Goutham } 7654863dea3SSunil Goutham 7664863dea3SSunil Goutham static void bgx_init_hw(struct bgx *bgx) 7674863dea3SSunil Goutham { 7684863dea3SSunil Goutham int i; 7690bcb7d51SSunil Goutham struct lmac *lmac; 7704863dea3SSunil Goutham 7714863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP); 7724863dea3SSunil Goutham if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS)) 7734863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id); 7744863dea3SSunil Goutham 7754863dea3SSunil Goutham /* Set lmac type and lane2serdes mapping */ 7764863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) { 7770bcb7d51SSunil Goutham lmac = &bgx->lmac[i]; 7784863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG, 7790bcb7d51SSunil Goutham (lmac->lmac_type << 8) | lmac->lane_to_sds); 7804863dea3SSunil Goutham bgx->lmac[i].lmacid_bd = lmac_count; 7814863dea3SSunil Goutham lmac_count++; 7824863dea3SSunil Goutham } 7834863dea3SSunil Goutham 7844863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count); 7854863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count); 7864863dea3SSunil Goutham 7874863dea3SSunil Goutham /* Set the backpressure AND mask */ 7884863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) 7894863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND, 7904863dea3SSunil Goutham ((1ULL << MAX_BGX_CHANS_PER_LMAC) - 1) << 7914863dea3SSunil Goutham (i * MAX_BGX_CHANS_PER_LMAC)); 7924863dea3SSunil Goutham 7934863dea3SSunil Goutham /* Disable all MAC filtering */ 7944863dea3SSunil Goutham for (i = 0; i < RX_DMAC_COUNT; i++) 7954863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00); 7964863dea3SSunil Goutham 7974863dea3SSunil Goutham /* Disable MAC steering (NCSI traffic) */ 7984863dea3SSunil Goutham for (i = 0; i < RX_TRAFFIC_STEER_RULE_COUNT; i++) 7994863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00); 8004863dea3SSunil Goutham } 8014863dea3SSunil Goutham 8020bcb7d51SSunil Goutham static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid) 8034863dea3SSunil Goutham { 8044863dea3SSunil Goutham struct device *dev = &bgx->pdev->dev; 8050bcb7d51SSunil Goutham struct lmac *lmac; 8060bcb7d51SSunil Goutham char str[20]; 80757aaf63cSSunil Goutham u8 dlm; 80857aaf63cSSunil Goutham 80957aaf63cSSunil Goutham if (lmacid > MAX_LMAC_PER_BGX) 81057aaf63cSSunil Goutham return; 8110bcb7d51SSunil Goutham 8120bcb7d51SSunil Goutham lmac = &bgx->lmac[lmacid]; 81357aaf63cSSunil Goutham dlm = (lmacid / 2) + (bgx->bgx_id * 2); 81457aaf63cSSunil Goutham if (!bgx->is_81xx) 8150bcb7d51SSunil Goutham sprintf(str, "BGX%d QLM mode", bgx->bgx_id); 81657aaf63cSSunil Goutham else 81757aaf63cSSunil Goutham sprintf(str, "BGX%d DLM%d mode", bgx->bgx_id, dlm); 8180bcb7d51SSunil Goutham 8190bcb7d51SSunil Goutham switch (lmac->lmac_type) { 8200bcb7d51SSunil Goutham case BGX_MODE_SGMII: 8210bcb7d51SSunil Goutham dev_info(dev, "%s: SGMII\n", (char *)str); 8220bcb7d51SSunil Goutham break; 8230bcb7d51SSunil Goutham case BGX_MODE_XAUI: 8240bcb7d51SSunil Goutham dev_info(dev, "%s: XAUI\n", (char *)str); 8250bcb7d51SSunil Goutham break; 8260bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 8270bcb7d51SSunil Goutham dev_info(dev, "%s: RXAUI\n", (char *)str); 8280bcb7d51SSunil Goutham break; 8290bcb7d51SSunil Goutham case BGX_MODE_XFI: 8300bcb7d51SSunil Goutham if (!lmac->use_training) 8310bcb7d51SSunil Goutham dev_info(dev, "%s: XFI\n", (char *)str); 8320bcb7d51SSunil Goutham else 8330bcb7d51SSunil Goutham dev_info(dev, "%s: 10G_KR\n", (char *)str); 8340bcb7d51SSunil Goutham break; 8350bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 8360bcb7d51SSunil Goutham if (!lmac->use_training) 8370bcb7d51SSunil Goutham dev_info(dev, "%s: XLAUI\n", (char *)str); 8380bcb7d51SSunil Goutham else 8390bcb7d51SSunil Goutham dev_info(dev, "%s: 40G_KR4\n", (char *)str); 8400bcb7d51SSunil Goutham break; 8410bcb7d51SSunil Goutham default: 8420bcb7d51SSunil Goutham dev_info(dev, "%s: INVALID\n", (char *)str); 8430bcb7d51SSunil Goutham } 8440bcb7d51SSunil Goutham } 8450bcb7d51SSunil Goutham 8460bcb7d51SSunil Goutham static void lmac_set_lane2sds(struct lmac *lmac) 8470bcb7d51SSunil Goutham { 8480bcb7d51SSunil Goutham switch (lmac->lmac_type) { 8490bcb7d51SSunil Goutham case BGX_MODE_SGMII: 8500bcb7d51SSunil Goutham case BGX_MODE_XFI: 8510bcb7d51SSunil Goutham lmac->lane_to_sds = lmac->lmacid; 8520bcb7d51SSunil Goutham break; 8530bcb7d51SSunil Goutham case BGX_MODE_XAUI: 8540bcb7d51SSunil Goutham case BGX_MODE_XLAUI: 8550bcb7d51SSunil Goutham lmac->lane_to_sds = 0xE4; 8560bcb7d51SSunil Goutham break; 8570bcb7d51SSunil Goutham case BGX_MODE_RXAUI: 8580bcb7d51SSunil Goutham lmac->lane_to_sds = (lmac->lmacid) ? 0xE : 0x4; 8590bcb7d51SSunil Goutham break; 8600bcb7d51SSunil Goutham default: 8610bcb7d51SSunil Goutham lmac->lane_to_sds = 0; 8620bcb7d51SSunil Goutham break; 8630bcb7d51SSunil Goutham } 8640bcb7d51SSunil Goutham } 8650bcb7d51SSunil Goutham 8660bcb7d51SSunil Goutham static void bgx_set_lmac_config(struct bgx *bgx, u8 idx) 8670bcb7d51SSunil Goutham { 8680bcb7d51SSunil Goutham struct lmac *lmac; 86957aaf63cSSunil Goutham struct lmac *olmac; 8700bcb7d51SSunil Goutham u64 cmr_cfg; 87157aaf63cSSunil Goutham u8 lmac_type; 87257aaf63cSSunil Goutham u8 lane_to_sds; 8730bcb7d51SSunil Goutham 8740bcb7d51SSunil Goutham lmac = &bgx->lmac[idx]; 8754863dea3SSunil Goutham 87657aaf63cSSunil Goutham if (!bgx->is_81xx) { 8774863dea3SSunil Goutham /* Read LMAC0 type to figure out QLM mode 8784863dea3SSunil Goutham * This is configured by low level firmware 8794863dea3SSunil Goutham */ 8800bcb7d51SSunil Goutham cmr_cfg = bgx_reg_read(bgx, 0, BGX_CMRX_CFG); 8810bcb7d51SSunil Goutham lmac->lmac_type = (cmr_cfg >> 8) & 0x07; 8820bcb7d51SSunil Goutham lmac->use_training = 8830bcb7d51SSunil Goutham bgx_reg_read(bgx, 0, BGX_SPUX_BR_PMD_CRTL) & 8844863dea3SSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 8850bcb7d51SSunil Goutham lmac_set_lane2sds(lmac); 88657aaf63cSSunil Goutham return; 88757aaf63cSSunil Goutham } 88857aaf63cSSunil Goutham 88957aaf63cSSunil Goutham /* On 81xx BGX can be split across 2 DLMs 89057aaf63cSSunil Goutham * firmware programs lmac_type of LMAC0 and LMAC2 89157aaf63cSSunil Goutham */ 89257aaf63cSSunil Goutham if ((idx == 0) || (idx == 2)) { 89357aaf63cSSunil Goutham cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG); 89457aaf63cSSunil Goutham lmac_type = (u8)((cmr_cfg >> 8) & 0x07); 89557aaf63cSSunil Goutham lane_to_sds = (u8)(cmr_cfg & 0xFF); 89657aaf63cSSunil Goutham /* Check if config is not reset value */ 89757aaf63cSSunil Goutham if ((lmac_type == 0) && (lane_to_sds == 0xE4)) 89857aaf63cSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 89957aaf63cSSunil Goutham else 90057aaf63cSSunil Goutham lmac->lmac_type = lmac_type; 90157aaf63cSSunil Goutham lmac->use_training = 90257aaf63cSSunil Goutham bgx_reg_read(bgx, idx, BGX_SPUX_BR_PMD_CRTL) & 90357aaf63cSSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 90457aaf63cSSunil Goutham lmac_set_lane2sds(lmac); 90557aaf63cSSunil Goutham 90657aaf63cSSunil Goutham /* Set LMAC type of other lmac on same DLM i.e LMAC 1/3 */ 90757aaf63cSSunil Goutham olmac = &bgx->lmac[idx + 1]; 90857aaf63cSSunil Goutham olmac->lmac_type = lmac->lmac_type; 90957aaf63cSSunil Goutham olmac->use_training = 91057aaf63cSSunil Goutham bgx_reg_read(bgx, idx + 1, BGX_SPUX_BR_PMD_CRTL) & 91157aaf63cSSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 91257aaf63cSSunil Goutham lmac_set_lane2sds(olmac); 91357aaf63cSSunil Goutham } 91457aaf63cSSunil Goutham } 91557aaf63cSSunil Goutham 91657aaf63cSSunil Goutham static bool is_dlm0_in_bgx_mode(struct bgx *bgx) 91757aaf63cSSunil Goutham { 91857aaf63cSSunil Goutham struct lmac *lmac; 91957aaf63cSSunil Goutham 92057aaf63cSSunil Goutham if (!bgx->is_81xx) 92157aaf63cSSunil Goutham return true; 92257aaf63cSSunil Goutham 92357aaf63cSSunil Goutham lmac = &bgx->lmac[1]; 92457aaf63cSSunil Goutham if (lmac->lmac_type == BGX_MODE_INVALID) 92557aaf63cSSunil Goutham return false; 92657aaf63cSSunil Goutham 92757aaf63cSSunil Goutham return true; 9280bcb7d51SSunil Goutham } 9294863dea3SSunil Goutham 9300bcb7d51SSunil Goutham static void bgx_get_qlm_mode(struct bgx *bgx) 9310bcb7d51SSunil Goutham { 93257aaf63cSSunil Goutham struct lmac *lmac; 93357aaf63cSSunil Goutham struct lmac *lmac01; 93457aaf63cSSunil Goutham struct lmac *lmac23; 9350bcb7d51SSunil Goutham u8 idx; 9360bcb7d51SSunil Goutham 93757aaf63cSSunil Goutham /* Init all LMAC's type to invalid */ 93857aaf63cSSunil Goutham for (idx = 0; idx < MAX_LMAC_PER_BGX; idx++) { 93957aaf63cSSunil Goutham lmac = &bgx->lmac[idx]; 94057aaf63cSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID; 94157aaf63cSSunil Goutham lmac->lmacid = idx; 94257aaf63cSSunil Goutham } 94357aaf63cSSunil Goutham 9440bcb7d51SSunil Goutham /* It is assumed that low level firmware sets this value */ 9450bcb7d51SSunil Goutham bgx->lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7; 9460bcb7d51SSunil Goutham if (bgx->lmac_count > MAX_LMAC_PER_BGX) 9470bcb7d51SSunil Goutham bgx->lmac_count = MAX_LMAC_PER_BGX; 9480bcb7d51SSunil Goutham 9490bcb7d51SSunil Goutham for (idx = 0; idx < bgx->lmac_count; idx++) 9500bcb7d51SSunil Goutham bgx_set_lmac_config(bgx, idx); 95157aaf63cSSunil Goutham 95257aaf63cSSunil Goutham if (!bgx->is_81xx) { 9530bcb7d51SSunil Goutham bgx_print_qlm_mode(bgx, 0); 95457aaf63cSSunil Goutham return; 95557aaf63cSSunil Goutham } 95657aaf63cSSunil Goutham 95757aaf63cSSunil Goutham if (bgx->lmac_count) { 95857aaf63cSSunil Goutham bgx_print_qlm_mode(bgx, 0); 95957aaf63cSSunil Goutham bgx_print_qlm_mode(bgx, 2); 96057aaf63cSSunil Goutham } 96157aaf63cSSunil Goutham 96257aaf63cSSunil Goutham /* If DLM0 is not in BGX mode then LMAC0/1 have 96357aaf63cSSunil Goutham * to be configured with serdes lanes of DLM1 96457aaf63cSSunil Goutham */ 96557aaf63cSSunil Goutham if (is_dlm0_in_bgx_mode(bgx) || (bgx->lmac_count > 2)) 96657aaf63cSSunil Goutham return; 96757aaf63cSSunil Goutham for (idx = 0; idx < bgx->lmac_count; idx++) { 96857aaf63cSSunil Goutham lmac01 = &bgx->lmac[idx]; 96957aaf63cSSunil Goutham lmac23 = &bgx->lmac[idx + 2]; 97057aaf63cSSunil Goutham lmac01->lmac_type = lmac23->lmac_type; 97157aaf63cSSunil Goutham lmac01->lane_to_sds = lmac23->lane_to_sds; 97257aaf63cSSunil Goutham } 9734863dea3SSunil Goutham } 9744863dea3SSunil Goutham 97546b903a0SDavid Daney #ifdef CONFIG_ACPI 97646b903a0SDavid Daney 9771d82efacSRobert Richter static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev, 9781d82efacSRobert Richter u8 *dst) 97946b903a0SDavid Daney { 98046b903a0SDavid Daney u8 mac[ETH_ALEN]; 98146b903a0SDavid Daney int ret; 98246b903a0SDavid Daney 98346b903a0SDavid Daney ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev), 98446b903a0SDavid Daney "mac-address", mac, ETH_ALEN); 98546b903a0SDavid Daney if (ret) 98646b903a0SDavid Daney goto out; 98746b903a0SDavid Daney 98846b903a0SDavid Daney if (!is_valid_ether_addr(mac)) { 9891d82efacSRobert Richter dev_err(dev, "MAC address invalid: %pM\n", mac); 99046b903a0SDavid Daney ret = -EINVAL; 99146b903a0SDavid Daney goto out; 99246b903a0SDavid Daney } 99346b903a0SDavid Daney 9941d82efacSRobert Richter dev_info(dev, "MAC address set to: %pM\n", mac); 9951d82efacSRobert Richter 99646b903a0SDavid Daney memcpy(dst, mac, ETH_ALEN); 99746b903a0SDavid Daney out: 99846b903a0SDavid Daney return ret; 99946b903a0SDavid Daney } 100046b903a0SDavid Daney 100146b903a0SDavid Daney /* Currently only sets the MAC address. */ 100246b903a0SDavid Daney static acpi_status bgx_acpi_register_phy(acpi_handle handle, 100346b903a0SDavid Daney u32 lvl, void *context, void **rv) 100446b903a0SDavid Daney { 100546b903a0SDavid Daney struct bgx *bgx = context; 10061d82efacSRobert Richter struct device *dev = &bgx->pdev->dev; 100746b903a0SDavid Daney struct acpi_device *adev; 100846b903a0SDavid Daney 100946b903a0SDavid Daney if (acpi_bus_get_device(handle, &adev)) 101046b903a0SDavid Daney goto out; 101146b903a0SDavid Daney 10121d82efacSRobert Richter acpi_get_mac_address(dev, adev, bgx->lmac[bgx->lmac_count].mac); 101346b903a0SDavid Daney 10141d82efacSRobert Richter SET_NETDEV_DEV(&bgx->lmac[bgx->lmac_count].netdev, dev); 101546b903a0SDavid Daney 101646b903a0SDavid Daney bgx->lmac[bgx->lmac_count].lmacid = bgx->lmac_count; 101746b903a0SDavid Daney out: 101846b903a0SDavid Daney bgx->lmac_count++; 101946b903a0SDavid Daney return AE_OK; 102046b903a0SDavid Daney } 102146b903a0SDavid Daney 102246b903a0SDavid Daney static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl, 102346b903a0SDavid Daney void *context, void **ret_val) 102446b903a0SDavid Daney { 102546b903a0SDavid Daney struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL }; 102646b903a0SDavid Daney struct bgx *bgx = context; 102746b903a0SDavid Daney char bgx_sel[5]; 102846b903a0SDavid Daney 102946b903a0SDavid Daney snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id); 103046b903a0SDavid Daney if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &string))) { 103146b903a0SDavid Daney pr_warn("Invalid link device\n"); 103246b903a0SDavid Daney return AE_OK; 103346b903a0SDavid Daney } 103446b903a0SDavid Daney 103546b903a0SDavid Daney if (strncmp(string.pointer, bgx_sel, 4)) 103646b903a0SDavid Daney return AE_OK; 103746b903a0SDavid Daney 103846b903a0SDavid Daney acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, 103946b903a0SDavid Daney bgx_acpi_register_phy, NULL, bgx, NULL); 104046b903a0SDavid Daney 104146b903a0SDavid Daney kfree(string.pointer); 104246b903a0SDavid Daney return AE_CTRL_TERMINATE; 104346b903a0SDavid Daney } 104446b903a0SDavid Daney 104546b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 104646b903a0SDavid Daney { 104746b903a0SDavid Daney acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL); 104846b903a0SDavid Daney return 0; 104946b903a0SDavid Daney } 105046b903a0SDavid Daney 105146b903a0SDavid Daney #else 105246b903a0SDavid Daney 105346b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 105446b903a0SDavid Daney { 105546b903a0SDavid Daney return -ENODEV; 105646b903a0SDavid Daney } 105746b903a0SDavid Daney 105846b903a0SDavid Daney #endif /* CONFIG_ACPI */ 105946b903a0SDavid Daney 1060de387e11SRobert Richter #if IS_ENABLED(CONFIG_OF_MDIO) 1061de387e11SRobert Richter 1062de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 10634863dea3SSunil Goutham { 1064eee326fdSDavid Daney struct fwnode_handle *fwn; 1065b7d3e3d3SDavid Daney struct device_node *node = NULL; 10664863dea3SSunil Goutham u8 lmac = 0; 10674863dea3SSunil Goutham 1068eee326fdSDavid Daney device_for_each_child_node(&bgx->pdev->dev, fwn) { 10695fc7cf17SDavid Daney struct phy_device *pd; 1070eee326fdSDavid Daney struct device_node *phy_np; 1071b7d3e3d3SDavid Daney const char *mac; 1072de387e11SRobert Richter 10735fc7cf17SDavid Daney /* Should always be an OF node. But if it is not, we 10745fc7cf17SDavid Daney * cannot handle it, so exit the loop. 1075eee326fdSDavid Daney */ 1076b7d3e3d3SDavid Daney node = to_of_node(fwn); 1077eee326fdSDavid Daney if (!node) 1078eee326fdSDavid Daney break; 1079eee326fdSDavid Daney 1080eee326fdSDavid Daney mac = of_get_mac_address(node); 10814863dea3SSunil Goutham if (mac) 10824863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmac].mac, mac); 10834863dea3SSunil Goutham 10844863dea3SSunil Goutham SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev); 10854863dea3SSunil Goutham bgx->lmac[lmac].lmacid = lmac; 10865fc7cf17SDavid Daney 10875fc7cf17SDavid Daney phy_np = of_parse_phandle(node, "phy-handle", 0); 10885fc7cf17SDavid Daney /* If there is no phy or defective firmware presents 10895fc7cf17SDavid Daney * this cortina phy, for which there is no driver 10905fc7cf17SDavid Daney * support, ignore it. 10915fc7cf17SDavid Daney */ 10925fc7cf17SDavid Daney if (phy_np && 10935fc7cf17SDavid Daney !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) { 10945fc7cf17SDavid Daney /* Wait until the phy drivers are available */ 10955fc7cf17SDavid Daney pd = of_phy_find_device(phy_np); 10965fc7cf17SDavid Daney if (!pd) 1097b7d3e3d3SDavid Daney goto defer; 10985fc7cf17SDavid Daney bgx->lmac[lmac].phydev = pd; 10995fc7cf17SDavid Daney } 11005fc7cf17SDavid Daney 11014863dea3SSunil Goutham lmac++; 110265c66af6SDavid Daney if (lmac == MAX_LMAC_PER_BGX) { 110365c66af6SDavid Daney of_node_put(node); 11044863dea3SSunil Goutham break; 11054863dea3SSunil Goutham } 110665c66af6SDavid Daney } 1107de387e11SRobert Richter return 0; 1108b7d3e3d3SDavid Daney 1109b7d3e3d3SDavid Daney defer: 1110b7d3e3d3SDavid Daney /* We are bailing out, try not to leak device reference counts 1111b7d3e3d3SDavid Daney * for phy devices we may have already found. 1112b7d3e3d3SDavid Daney */ 1113b7d3e3d3SDavid Daney while (lmac) { 1114b7d3e3d3SDavid Daney if (bgx->lmac[lmac].phydev) { 1115b7d3e3d3SDavid Daney put_device(&bgx->lmac[lmac].phydev->mdio.dev); 1116b7d3e3d3SDavid Daney bgx->lmac[lmac].phydev = NULL; 1117b7d3e3d3SDavid Daney } 1118b7d3e3d3SDavid Daney lmac--; 1119b7d3e3d3SDavid Daney } 1120b7d3e3d3SDavid Daney of_node_put(node); 1121b7d3e3d3SDavid Daney return -EPROBE_DEFER; 1122de387e11SRobert Richter } 1123de387e11SRobert Richter 1124de387e11SRobert Richter #else 1125de387e11SRobert Richter 1126de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 1127de387e11SRobert Richter { 1128de387e11SRobert Richter return -ENODEV; 1129de387e11SRobert Richter } 1130de387e11SRobert Richter 1131de387e11SRobert Richter #endif /* CONFIG_OF_MDIO */ 1132de387e11SRobert Richter 1133de387e11SRobert Richter static int bgx_init_phy(struct bgx *bgx) 1134de387e11SRobert Richter { 113546b903a0SDavid Daney if (!acpi_disabled) 113646b903a0SDavid Daney return bgx_init_acpi_phy(bgx); 113746b903a0SDavid Daney 1138de387e11SRobert Richter return bgx_init_of_phy(bgx); 11394863dea3SSunil Goutham } 11404863dea3SSunil Goutham 11414863dea3SSunil Goutham static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 11424863dea3SSunil Goutham { 11434863dea3SSunil Goutham int err; 11444863dea3SSunil Goutham struct device *dev = &pdev->dev; 11454863dea3SSunil Goutham struct bgx *bgx = NULL; 11464863dea3SSunil Goutham u8 lmac; 114757aaf63cSSunil Goutham u16 sdevid; 11484863dea3SSunil Goutham 11494863dea3SSunil Goutham bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL); 11504863dea3SSunil Goutham if (!bgx) 11514863dea3SSunil Goutham return -ENOMEM; 11524863dea3SSunil Goutham bgx->pdev = pdev; 11534863dea3SSunil Goutham 11544863dea3SSunil Goutham pci_set_drvdata(pdev, bgx); 11554863dea3SSunil Goutham 11564863dea3SSunil Goutham err = pci_enable_device(pdev); 11574863dea3SSunil Goutham if (err) { 11584863dea3SSunil Goutham dev_err(dev, "Failed to enable PCI device\n"); 11594863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 11604863dea3SSunil Goutham return err; 11614863dea3SSunil Goutham } 11624863dea3SSunil Goutham 11634863dea3SSunil Goutham err = pci_request_regions(pdev, DRV_NAME); 11644863dea3SSunil Goutham if (err) { 11654863dea3SSunil Goutham dev_err(dev, "PCI request regions failed 0x%x\n", err); 11664863dea3SSunil Goutham goto err_disable_device; 11674863dea3SSunil Goutham } 11684863dea3SSunil Goutham 116957aaf63cSSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid); 117057aaf63cSSunil Goutham if (sdevid == PCI_SUBSYS_DEVID_81XX_BGX) 117157aaf63cSSunil Goutham bgx->is_81xx = true; 117257aaf63cSSunil Goutham 11734863dea3SSunil Goutham /* MAP configuration registers */ 11744863dea3SSunil Goutham bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 11754863dea3SSunil Goutham if (!bgx->reg_base) { 11764863dea3SSunil Goutham dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n"); 11774863dea3SSunil Goutham err = -ENOMEM; 11784863dea3SSunil Goutham goto err_release_regions; 11794863dea3SSunil Goutham } 11804863dea3SSunil Goutham bgx->bgx_id = (pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM) >> 24) & 1; 1181d768b678SRobert Richter bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_CN88XX; 1182d768b678SRobert Richter 11834863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 11844863dea3SSunil Goutham bgx_get_qlm_mode(bgx); 11854863dea3SSunil Goutham 1186de387e11SRobert Richter err = bgx_init_phy(bgx); 1187de387e11SRobert Richter if (err) 1188de387e11SRobert Richter goto err_enable; 11894863dea3SSunil Goutham 11904863dea3SSunil Goutham bgx_init_hw(bgx); 11914863dea3SSunil Goutham 11924863dea3SSunil Goutham /* Enable all LMACs */ 11934863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) { 11944863dea3SSunil Goutham err = bgx_lmac_enable(bgx, lmac); 11954863dea3SSunil Goutham if (err) { 11964863dea3SSunil Goutham dev_err(dev, "BGX%d failed to enable lmac%d\n", 11974863dea3SSunil Goutham bgx->bgx_id, lmac); 119857aaf63cSSunil Goutham while (lmac) 119957aaf63cSSunil Goutham bgx_lmac_disable(bgx, --lmac); 12004863dea3SSunil Goutham goto err_enable; 12014863dea3SSunil Goutham } 12024863dea3SSunil Goutham } 12034863dea3SSunil Goutham 12044863dea3SSunil Goutham return 0; 12054863dea3SSunil Goutham 12064863dea3SSunil Goutham err_enable: 12074863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 12084863dea3SSunil Goutham err_release_regions: 12094863dea3SSunil Goutham pci_release_regions(pdev); 12104863dea3SSunil Goutham err_disable_device: 12114863dea3SSunil Goutham pci_disable_device(pdev); 12124863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 12134863dea3SSunil Goutham return err; 12144863dea3SSunil Goutham } 12154863dea3SSunil Goutham 12164863dea3SSunil Goutham static void bgx_remove(struct pci_dev *pdev) 12174863dea3SSunil Goutham { 12184863dea3SSunil Goutham struct bgx *bgx = pci_get_drvdata(pdev); 12194863dea3SSunil Goutham u8 lmac; 12204863dea3SSunil Goutham 12214863dea3SSunil Goutham /* Disable all LMACs */ 12224863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) 12234863dea3SSunil Goutham bgx_lmac_disable(bgx, lmac); 12244863dea3SSunil Goutham 12254863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 12264863dea3SSunil Goutham pci_release_regions(pdev); 12274863dea3SSunil Goutham pci_disable_device(pdev); 12284863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 12294863dea3SSunil Goutham } 12304863dea3SSunil Goutham 12314863dea3SSunil Goutham static struct pci_driver bgx_driver = { 12324863dea3SSunil Goutham .name = DRV_NAME, 12334863dea3SSunil Goutham .id_table = bgx_id_table, 12344863dea3SSunil Goutham .probe = bgx_probe, 12354863dea3SSunil Goutham .remove = bgx_remove, 12364863dea3SSunil Goutham }; 12374863dea3SSunil Goutham 12384863dea3SSunil Goutham static int __init bgx_init_module(void) 12394863dea3SSunil Goutham { 12404863dea3SSunil Goutham pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 12414863dea3SSunil Goutham 12424863dea3SSunil Goutham return pci_register_driver(&bgx_driver); 12434863dea3SSunil Goutham } 12444863dea3SSunil Goutham 12454863dea3SSunil Goutham static void __exit bgx_cleanup_module(void) 12464863dea3SSunil Goutham { 12474863dea3SSunil Goutham pci_unregister_driver(&bgx_driver); 12484863dea3SSunil Goutham } 12494863dea3SSunil Goutham 12504863dea3SSunil Goutham module_init(bgx_init_module); 12514863dea3SSunil Goutham module_exit(bgx_cleanup_module); 1252