14863dea3SSunil Goutham /* 24863dea3SSunil Goutham * Copyright (C) 2015 Cavium, Inc. 34863dea3SSunil Goutham * 44863dea3SSunil Goutham * This program is free software; you can redistribute it and/or modify it 54863dea3SSunil Goutham * under the terms of version 2 of the GNU General Public License 64863dea3SSunil Goutham * as published by the Free Software Foundation. 74863dea3SSunil Goutham */ 84863dea3SSunil Goutham 946b903a0SDavid Daney #include <linux/acpi.h> 104863dea3SSunil Goutham #include <linux/module.h> 114863dea3SSunil Goutham #include <linux/interrupt.h> 124863dea3SSunil Goutham #include <linux/pci.h> 134863dea3SSunil Goutham #include <linux/netdevice.h> 144863dea3SSunil Goutham #include <linux/etherdevice.h> 154863dea3SSunil Goutham #include <linux/phy.h> 164863dea3SSunil Goutham #include <linux/of.h> 174863dea3SSunil Goutham #include <linux/of_mdio.h> 184863dea3SSunil Goutham #include <linux/of_net.h> 194863dea3SSunil Goutham 204863dea3SSunil Goutham #include "nic_reg.h" 214863dea3SSunil Goutham #include "nic.h" 224863dea3SSunil Goutham #include "thunder_bgx.h" 234863dea3SSunil Goutham 244863dea3SSunil Goutham #define DRV_NAME "thunder-BGX" 254863dea3SSunil Goutham #define DRV_VERSION "1.0" 264863dea3SSunil Goutham 274863dea3SSunil Goutham struct lmac { 284863dea3SSunil Goutham struct bgx *bgx; 294863dea3SSunil Goutham int dmac; 3046b903a0SDavid Daney u8 mac[ETH_ALEN]; 314863dea3SSunil Goutham bool link_up; 324863dea3SSunil Goutham int lmacid; /* ID within BGX */ 334863dea3SSunil Goutham int lmacid_bd; /* ID on board */ 344863dea3SSunil Goutham struct net_device netdev; 354863dea3SSunil Goutham struct phy_device *phydev; 364863dea3SSunil Goutham unsigned int last_duplex; 374863dea3SSunil Goutham unsigned int last_link; 384863dea3SSunil Goutham unsigned int last_speed; 394863dea3SSunil Goutham bool is_sgmii; 404863dea3SSunil Goutham struct delayed_work dwork; 414863dea3SSunil Goutham struct workqueue_struct *check_link; 420c886a1dSAleksey Makarov }; 434863dea3SSunil Goutham 444863dea3SSunil Goutham struct bgx { 454863dea3SSunil Goutham u8 bgx_id; 464863dea3SSunil Goutham u8 qlm_mode; 474863dea3SSunil Goutham struct lmac lmac[MAX_LMAC_PER_BGX]; 484863dea3SSunil Goutham int lmac_count; 494863dea3SSunil Goutham int lmac_type; 504863dea3SSunil Goutham int lane_to_sds; 514863dea3SSunil Goutham int use_training; 524863dea3SSunil Goutham void __iomem *reg_base; 534863dea3SSunil Goutham struct pci_dev *pdev; 540c886a1dSAleksey Makarov }; 554863dea3SSunil Goutham 56fd7ec062SAleksey Makarov static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; 574863dea3SSunil Goutham static int lmac_count; /* Total no of LMACs in system */ 584863dea3SSunil Goutham 594863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac); 604863dea3SSunil Goutham 614863dea3SSunil Goutham /* Supported devices */ 624863dea3SSunil Goutham static const struct pci_device_id bgx_id_table[] = { 634863dea3SSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_BGX) }, 644863dea3SSunil Goutham { 0, } /* end of table */ 654863dea3SSunil Goutham }; 664863dea3SSunil Goutham 674863dea3SSunil Goutham MODULE_AUTHOR("Cavium Inc"); 684863dea3SSunil Goutham MODULE_DESCRIPTION("Cavium Thunder BGX/MAC Driver"); 694863dea3SSunil Goutham MODULE_LICENSE("GPL v2"); 704863dea3SSunil Goutham MODULE_VERSION(DRV_VERSION); 714863dea3SSunil Goutham MODULE_DEVICE_TABLE(pci, bgx_id_table); 724863dea3SSunil Goutham 734863dea3SSunil Goutham /* The Cavium ThunderX network controller can *only* be found in SoCs 744863dea3SSunil Goutham * containing the ThunderX ARM64 CPU implementation. All accesses to the device 754863dea3SSunil Goutham * registers on this platform are implicitly strongly ordered with respect 764863dea3SSunil Goutham * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 774863dea3SSunil Goutham * with no memory barriers in this driver. The readq()/writeq() functions add 784863dea3SSunil Goutham * explicit ordering operation which in this case are redundant, and only 794863dea3SSunil Goutham * add overhead. 804863dea3SSunil Goutham */ 814863dea3SSunil Goutham 824863dea3SSunil Goutham /* Register read/write APIs */ 834863dea3SSunil Goutham static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset) 844863dea3SSunil Goutham { 854863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 864863dea3SSunil Goutham 874863dea3SSunil Goutham return readq_relaxed(addr); 884863dea3SSunil Goutham } 894863dea3SSunil Goutham 904863dea3SSunil Goutham static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 914863dea3SSunil Goutham { 924863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 934863dea3SSunil Goutham 944863dea3SSunil Goutham writeq_relaxed(val, addr); 954863dea3SSunil Goutham } 964863dea3SSunil Goutham 974863dea3SSunil Goutham static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val) 984863dea3SSunil Goutham { 994863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset; 1004863dea3SSunil Goutham 1014863dea3SSunil Goutham writeq_relaxed(val | readq_relaxed(addr), addr); 1024863dea3SSunil Goutham } 1034863dea3SSunil Goutham 1044863dea3SSunil Goutham static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero) 1054863dea3SSunil Goutham { 1064863dea3SSunil Goutham int timeout = 100; 1074863dea3SSunil Goutham u64 reg_val; 1084863dea3SSunil Goutham 1094863dea3SSunil Goutham while (timeout) { 1104863dea3SSunil Goutham reg_val = bgx_reg_read(bgx, lmac, reg); 1114863dea3SSunil Goutham if (zero && !(reg_val & mask)) 1124863dea3SSunil Goutham return 0; 1134863dea3SSunil Goutham if (!zero && (reg_val & mask)) 1144863dea3SSunil Goutham return 0; 1154863dea3SSunil Goutham usleep_range(1000, 2000); 1164863dea3SSunil Goutham timeout--; 1174863dea3SSunil Goutham } 1184863dea3SSunil Goutham return 1; 1194863dea3SSunil Goutham } 1204863dea3SSunil Goutham 1214863dea3SSunil Goutham /* Return number of BGX present in HW */ 1224863dea3SSunil Goutham unsigned bgx_get_map(int node) 1234863dea3SSunil Goutham { 1244863dea3SSunil Goutham int i; 1254863dea3SSunil Goutham unsigned map = 0; 1264863dea3SSunil Goutham 1274863dea3SSunil Goutham for (i = 0; i < MAX_BGX_PER_CN88XX; i++) { 1284863dea3SSunil Goutham if (bgx_vnic[(node * MAX_BGX_PER_CN88XX) + i]) 1294863dea3SSunil Goutham map |= (1 << i); 1304863dea3SSunil Goutham } 1314863dea3SSunil Goutham 1324863dea3SSunil Goutham return map; 1334863dea3SSunil Goutham } 1344863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_map); 1354863dea3SSunil Goutham 1364863dea3SSunil Goutham /* Return number of LMAC configured for this BGX */ 1374863dea3SSunil Goutham int bgx_get_lmac_count(int node, int bgx_idx) 1384863dea3SSunil Goutham { 1394863dea3SSunil Goutham struct bgx *bgx; 1404863dea3SSunil Goutham 1414863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1424863dea3SSunil Goutham if (bgx) 1434863dea3SSunil Goutham return bgx->lmac_count; 1444863dea3SSunil Goutham 1454863dea3SSunil Goutham return 0; 1464863dea3SSunil Goutham } 1474863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_count); 1484863dea3SSunil Goutham 1494863dea3SSunil Goutham /* Returns the current link status of LMAC */ 1504863dea3SSunil Goutham void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status) 1514863dea3SSunil Goutham { 1524863dea3SSunil Goutham struct bgx_link_status *link = (struct bgx_link_status *)status; 1534863dea3SSunil Goutham struct bgx *bgx; 1544863dea3SSunil Goutham struct lmac *lmac; 1554863dea3SSunil Goutham 1564863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1574863dea3SSunil Goutham if (!bgx) 1584863dea3SSunil Goutham return; 1594863dea3SSunil Goutham 1604863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 1614863dea3SSunil Goutham link->link_up = lmac->link_up; 1624863dea3SSunil Goutham link->duplex = lmac->last_duplex; 1634863dea3SSunil Goutham link->speed = lmac->last_speed; 1644863dea3SSunil Goutham } 1654863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_link_state); 1664863dea3SSunil Goutham 167e610cb32SAleksey Makarov const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid) 1684863dea3SSunil Goutham { 1694863dea3SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1704863dea3SSunil Goutham 1714863dea3SSunil Goutham if (bgx) 1724863dea3SSunil Goutham return bgx->lmac[lmacid].mac; 1734863dea3SSunil Goutham 1744863dea3SSunil Goutham return NULL; 1754863dea3SSunil Goutham } 1764863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_mac); 1774863dea3SSunil Goutham 178e610cb32SAleksey Makarov void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac) 1794863dea3SSunil Goutham { 1804863dea3SSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 1814863dea3SSunil Goutham 1824863dea3SSunil Goutham if (!bgx) 1834863dea3SSunil Goutham return; 1844863dea3SSunil Goutham 1854863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmacid].mac, mac); 1864863dea3SSunil Goutham } 1874863dea3SSunil Goutham EXPORT_SYMBOL(bgx_set_lmac_mac); 1884863dea3SSunil Goutham 189bc69fdfcSSunil Goutham void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable) 190bc69fdfcSSunil Goutham { 191bc69fdfcSSunil Goutham struct bgx *bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 192bc69fdfcSSunil Goutham u64 cfg; 193bc69fdfcSSunil Goutham 194bc69fdfcSSunil Goutham if (!bgx) 195bc69fdfcSSunil Goutham return; 196bc69fdfcSSunil Goutham 197bc69fdfcSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 198bc69fdfcSSunil Goutham if (enable) 199bc69fdfcSSunil Goutham cfg |= CMR_PKT_RX_EN | CMR_PKT_TX_EN; 200bc69fdfcSSunil Goutham else 201bc69fdfcSSunil Goutham cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN); 202bc69fdfcSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 203bc69fdfcSSunil Goutham } 204bc69fdfcSSunil Goutham EXPORT_SYMBOL(bgx_lmac_rx_tx_enable); 205bc69fdfcSSunil Goutham 2064863dea3SSunil Goutham static void bgx_sgmii_change_link_state(struct lmac *lmac) 2074863dea3SSunil Goutham { 2084863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 2094863dea3SSunil Goutham u64 cmr_cfg; 2104863dea3SSunil Goutham u64 port_cfg = 0; 2114863dea3SSunil Goutham u64 misc_ctl = 0; 2124863dea3SSunil Goutham 2134863dea3SSunil Goutham cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG); 2144863dea3SSunil Goutham cmr_cfg &= ~CMR_EN; 2154863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2164863dea3SSunil Goutham 2174863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2184863dea3SSunil Goutham misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL); 2194863dea3SSunil Goutham 2204863dea3SSunil Goutham if (lmac->link_up) { 2214863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_GMX_ENO; 2224863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_DUPLEX; 2234863dea3SSunil Goutham port_cfg |= (lmac->last_duplex << 2); 2244863dea3SSunil Goutham } else { 2254863dea3SSunil Goutham misc_ctl |= PCS_MISC_CTL_GMX_ENO; 2264863dea3SSunil Goutham } 2274863dea3SSunil Goutham 2284863dea3SSunil Goutham switch (lmac->last_speed) { 2294863dea3SSunil Goutham case 10: 2304863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2314863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED_MSB; /* speed_msb 1 */ 2324863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2334863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2344863dea3SSunil Goutham misc_ctl |= 50; /* samp_pt */ 2354863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2364863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2374863dea3SSunil Goutham break; 2384863dea3SSunil Goutham case 100: 2394863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */ 2404863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2414863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */ 2424863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2434863dea3SSunil Goutham misc_ctl |= 5; /* samp_pt */ 2444863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64); 2454863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0); 2464863dea3SSunil Goutham break; 2474863dea3SSunil Goutham case 1000: 2484863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED; /* speed 1 */ 2494863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */ 2504863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SLOT_TIME; /* slottime 1 */ 2514863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK; 2524863dea3SSunil Goutham misc_ctl |= 1; /* samp_pt */ 2534863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512); 2544863dea3SSunil Goutham if (lmac->last_duplex) 2554863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 2564863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 0); 2574863dea3SSunil Goutham else 2584863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, 2594863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 8192); 2604863dea3SSunil Goutham break; 2614863dea3SSunil Goutham default: 2624863dea3SSunil Goutham break; 2634863dea3SSunil Goutham } 2644863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl); 2654863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg); 2664863dea3SSunil Goutham 2674863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG); 2684863dea3SSunil Goutham 2694863dea3SSunil Goutham /* renable lmac */ 2704863dea3SSunil Goutham cmr_cfg |= CMR_EN; 2714863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg); 2724863dea3SSunil Goutham } 2734863dea3SSunil Goutham 274fd7ec062SAleksey Makarov static void bgx_lmac_handler(struct net_device *netdev) 2754863dea3SSunil Goutham { 2764863dea3SSunil Goutham struct lmac *lmac = container_of(netdev, struct lmac, netdev); 277099a728dSxypron.glpk@gmx.de struct phy_device *phydev; 2784863dea3SSunil Goutham int link_changed = 0; 2794863dea3SSunil Goutham 2804863dea3SSunil Goutham if (!lmac) 2814863dea3SSunil Goutham return; 2824863dea3SSunil Goutham 283099a728dSxypron.glpk@gmx.de phydev = lmac->phydev; 284099a728dSxypron.glpk@gmx.de 2854863dea3SSunil Goutham if (!phydev->link && lmac->last_link) 2864863dea3SSunil Goutham link_changed = -1; 2874863dea3SSunil Goutham 2884863dea3SSunil Goutham if (phydev->link && 2894863dea3SSunil Goutham (lmac->last_duplex != phydev->duplex || 2904863dea3SSunil Goutham lmac->last_link != phydev->link || 2914863dea3SSunil Goutham lmac->last_speed != phydev->speed)) { 2924863dea3SSunil Goutham link_changed = 1; 2934863dea3SSunil Goutham } 2944863dea3SSunil Goutham 2954863dea3SSunil Goutham lmac->last_link = phydev->link; 2964863dea3SSunil Goutham lmac->last_speed = phydev->speed; 2974863dea3SSunil Goutham lmac->last_duplex = phydev->duplex; 2984863dea3SSunil Goutham 2994863dea3SSunil Goutham if (!link_changed) 3004863dea3SSunil Goutham return; 3014863dea3SSunil Goutham 3024863dea3SSunil Goutham if (link_changed > 0) 3034863dea3SSunil Goutham lmac->link_up = true; 3044863dea3SSunil Goutham else 3054863dea3SSunil Goutham lmac->link_up = false; 3064863dea3SSunil Goutham 3074863dea3SSunil Goutham if (lmac->is_sgmii) 3084863dea3SSunil Goutham bgx_sgmii_change_link_state(lmac); 3094863dea3SSunil Goutham else 3104863dea3SSunil Goutham bgx_xaui_check_link(lmac); 3114863dea3SSunil Goutham } 3124863dea3SSunil Goutham 3134863dea3SSunil Goutham u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx) 3144863dea3SSunil Goutham { 3154863dea3SSunil Goutham struct bgx *bgx; 3164863dea3SSunil Goutham 3174863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 3184863dea3SSunil Goutham if (!bgx) 3194863dea3SSunil Goutham return 0; 3204863dea3SSunil Goutham 3214863dea3SSunil Goutham if (idx > 8) 3224863dea3SSunil Goutham lmac = 0; 3234863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8)); 3244863dea3SSunil Goutham } 3254863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_rx_stats); 3264863dea3SSunil Goutham 3274863dea3SSunil Goutham u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx) 3284863dea3SSunil Goutham { 3294863dea3SSunil Goutham struct bgx *bgx; 3304863dea3SSunil Goutham 3314863dea3SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 3324863dea3SSunil Goutham if (!bgx) 3334863dea3SSunil Goutham return 0; 3344863dea3SSunil Goutham 3354863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8)); 3364863dea3SSunil Goutham } 3374863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_tx_stats); 3384863dea3SSunil Goutham 3394863dea3SSunil Goutham static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac) 3404863dea3SSunil Goutham { 3414863dea3SSunil Goutham u64 offset; 3424863dea3SSunil Goutham 3434863dea3SSunil Goutham while (bgx->lmac[lmac].dmac > 0) { 3444863dea3SSunil Goutham offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) + 3454863dea3SSunil Goutham (lmac * MAX_DMAC_PER_LMAC * sizeof(u64)); 3464863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0); 3474863dea3SSunil Goutham bgx->lmac[lmac].dmac--; 3484863dea3SSunil Goutham } 3494863dea3SSunil Goutham } 3504863dea3SSunil Goutham 351d77a2384SSunil Goutham /* Configure BGX LMAC in internal loopback mode */ 352d77a2384SSunil Goutham void bgx_lmac_internal_loopback(int node, int bgx_idx, 353d77a2384SSunil Goutham int lmac_idx, bool enable) 354d77a2384SSunil Goutham { 355d77a2384SSunil Goutham struct bgx *bgx; 356d77a2384SSunil Goutham struct lmac *lmac; 357d77a2384SSunil Goutham u64 cfg; 358d77a2384SSunil Goutham 359d77a2384SSunil Goutham bgx = bgx_vnic[(node * MAX_BGX_PER_CN88XX) + bgx_idx]; 360d77a2384SSunil Goutham if (!bgx) 361d77a2384SSunil Goutham return; 362d77a2384SSunil Goutham 363d77a2384SSunil Goutham lmac = &bgx->lmac[lmac_idx]; 364d77a2384SSunil Goutham if (lmac->is_sgmii) { 365d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL); 366d77a2384SSunil Goutham if (enable) 367d77a2384SSunil Goutham cfg |= PCS_MRX_CTL_LOOPBACK1; 368d77a2384SSunil Goutham else 369d77a2384SSunil Goutham cfg &= ~PCS_MRX_CTL_LOOPBACK1; 370d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg); 371d77a2384SSunil Goutham } else { 372d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1); 373d77a2384SSunil Goutham if (enable) 374d77a2384SSunil Goutham cfg |= SPU_CTL_LOOPBACK; 375d77a2384SSunil Goutham else 376d77a2384SSunil Goutham cfg &= ~SPU_CTL_LOOPBACK; 377d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg); 378d77a2384SSunil Goutham } 379d77a2384SSunil Goutham } 380d77a2384SSunil Goutham EXPORT_SYMBOL(bgx_lmac_internal_loopback); 381d77a2384SSunil Goutham 3824863dea3SSunil Goutham static int bgx_lmac_sgmii_init(struct bgx *bgx, int lmacid) 3834863dea3SSunil Goutham { 3844863dea3SSunil Goutham u64 cfg; 3854863dea3SSunil Goutham 3864863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30); 3874863dea3SSunil Goutham /* max packet size */ 3884863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE); 3894863dea3SSunil Goutham 3904863dea3SSunil Goutham /* Disable frame alignment if using preamble */ 3914863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 3924863dea3SSunil Goutham if (cfg & 1) 3934863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0); 3944863dea3SSunil Goutham 3954863dea3SSunil Goutham /* Enable lmac */ 3964863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 3974863dea3SSunil Goutham 3984863dea3SSunil Goutham /* PCS reset */ 3994863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET); 4004863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, 4014863dea3SSunil Goutham PCS_MRX_CTL_RESET, true)) { 4024863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n"); 4034863dea3SSunil Goutham return -1; 4044863dea3SSunil Goutham } 4054863dea3SSunil Goutham 4064863dea3SSunil Goutham /* power down, reset autoneg, autoneg enable */ 4074863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL); 4084863dea3SSunil Goutham cfg &= ~PCS_MRX_CTL_PWR_DN; 4094863dea3SSunil Goutham cfg |= (PCS_MRX_CTL_RST_AN | PCS_MRX_CTL_AN_EN); 4104863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg); 4114863dea3SSunil Goutham 4124863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS, 4134863dea3SSunil Goutham PCS_MRX_STATUS_AN_CPT, false)) { 4144863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n"); 4154863dea3SSunil Goutham return -1; 4164863dea3SSunil Goutham } 4174863dea3SSunil Goutham 4184863dea3SSunil Goutham return 0; 4194863dea3SSunil Goutham } 4204863dea3SSunil Goutham 4214863dea3SSunil Goutham static int bgx_lmac_xaui_init(struct bgx *bgx, int lmacid, int lmac_type) 4224863dea3SSunil Goutham { 4234863dea3SSunil Goutham u64 cfg; 4244863dea3SSunil Goutham 4254863dea3SSunil Goutham /* Reset SPU */ 4264863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET); 4274863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 4284863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 4294863dea3SSunil Goutham return -1; 4304863dea3SSunil Goutham } 4314863dea3SSunil Goutham 4324863dea3SSunil Goutham /* Disable LMAC */ 4334863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 4344863dea3SSunil Goutham cfg &= ~CMR_EN; 4354863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 4364863dea3SSunil Goutham 4374863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 4384863dea3SSunil Goutham /* Set interleaved running disparity for RXAUI */ 4394863dea3SSunil Goutham if (bgx->lmac_type != BGX_MODE_RXAUI) 4404863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 4414863dea3SSunil Goutham BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS); 4424863dea3SSunil Goutham else 4434863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, 4444863dea3SSunil Goutham SPU_MISC_CTL_RX_DIS | SPU_MISC_CTL_INTLV_RDISP); 4454863dea3SSunil Goutham 4464863dea3SSunil Goutham /* clear all interrupts */ 4474863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT); 4484863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg); 4494863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT); 4504863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg); 4514863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 4524863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 4534863dea3SSunil Goutham 4544863dea3SSunil Goutham if (bgx->use_training) { 4554863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00); 4564863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00); 4574863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00); 4584863dea3SSunil Goutham /* training enable */ 4594863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, 4604863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, SPU_PMD_CRTL_TRAIN_EN); 4614863dea3SSunil Goutham } 4624863dea3SSunil Goutham 4634863dea3SSunil Goutham /* Append FCS to each packet */ 4644863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D); 4654863dea3SSunil Goutham 4664863dea3SSunil Goutham /* Disable forward error correction */ 4674863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL); 4684863dea3SSunil Goutham cfg &= ~SPU_FEC_CTL_FEC_EN; 4694863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg); 4704863dea3SSunil Goutham 4714863dea3SSunil Goutham /* Disable autoneg */ 4724863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL); 4734863dea3SSunil Goutham cfg = cfg & ~(SPU_AN_CTL_AN_EN | SPU_AN_CTL_XNP_EN); 4744863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg); 4754863dea3SSunil Goutham 4764863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV); 4774863dea3SSunil Goutham if (bgx->lmac_type == BGX_MODE_10G_KR) 4784863dea3SSunil Goutham cfg |= (1 << 23); 4794863dea3SSunil Goutham else if (bgx->lmac_type == BGX_MODE_40G_KR) 4804863dea3SSunil Goutham cfg |= (1 << 24); 4814863dea3SSunil Goutham else 4824863dea3SSunil Goutham cfg &= ~((1 << 23) | (1 << 24)); 4834863dea3SSunil Goutham cfg = cfg & (~((1ULL << 25) | (1ULL << 22) | (1ULL << 12))); 4844863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg); 4854863dea3SSunil Goutham 4864863dea3SSunil Goutham cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL); 4874863dea3SSunil Goutham cfg &= ~SPU_DBG_CTL_AN_ARB_LINK_CHK_EN; 4884863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg); 4894863dea3SSunil Goutham 4904863dea3SSunil Goutham /* Enable lmac */ 4914863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 4924863dea3SSunil Goutham 4934863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1); 4944863dea3SSunil Goutham cfg &= ~SPU_CTL_LOW_POWER; 4954863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg); 4964863dea3SSunil Goutham 4974863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL); 4984863dea3SSunil Goutham cfg &= ~SMU_TX_CTL_UNI_EN; 4994863dea3SSunil Goutham cfg |= SMU_TX_CTL_DIC_EN; 5004863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg); 5014863dea3SSunil Goutham 5024863dea3SSunil Goutham /* take lmac_count into account */ 5034863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1)); 5044863dea3SSunil Goutham /* max packet size */ 5054863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE); 5064863dea3SSunil Goutham 5074863dea3SSunil Goutham return 0; 5084863dea3SSunil Goutham } 5094863dea3SSunil Goutham 5104863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac) 5114863dea3SSunil Goutham { 5124863dea3SSunil Goutham struct bgx *bgx = lmac->bgx; 5134863dea3SSunil Goutham int lmacid = lmac->lmacid; 5144863dea3SSunil Goutham int lmac_type = bgx->lmac_type; 5154863dea3SSunil Goutham u64 cfg; 5164863dea3SSunil Goutham 5174863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL, SPU_MISC_CTL_RX_DIS); 5184863dea3SSunil Goutham if (bgx->use_training) { 5194863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5204863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 5214863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 5224863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5234863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL); 5244863dea3SSunil Goutham cfg |= (1ull << 0); 5254863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg); 5264863dea3SSunil Goutham return -1; 5274863dea3SSunil Goutham } 5284863dea3SSunil Goutham } 5294863dea3SSunil Goutham 5304863dea3SSunil Goutham /* wait for PCS to come out of reset */ 5314863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) { 5324863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n"); 5334863dea3SSunil Goutham return -1; 5344863dea3SSunil Goutham } 5354863dea3SSunil Goutham 5364863dea3SSunil Goutham if ((lmac_type == BGX_MODE_10G_KR) || (lmac_type == BGX_MODE_XFI) || 5374863dea3SSunil Goutham (lmac_type == BGX_MODE_40G_KR) || (lmac_type == BGX_MODE_XLAUI)) { 5384863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1, 5394863dea3SSunil Goutham SPU_BR_STATUS_BLK_LOCK, false)) { 5404863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 5414863dea3SSunil Goutham "SPU_BR_STATUS_BLK_LOCK not completed\n"); 5424863dea3SSunil Goutham return -1; 5434863dea3SSunil Goutham } 5444863dea3SSunil Goutham } else { 5454863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS, 5464863dea3SSunil Goutham SPU_BX_STATUS_RX_ALIGN, false)) { 5474863dea3SSunil Goutham dev_err(&bgx->pdev->dev, 5484863dea3SSunil Goutham "SPU_BX_STATUS_RX_ALIGN not completed\n"); 5494863dea3SSunil Goutham return -1; 5504863dea3SSunil Goutham } 5514863dea3SSunil Goutham } 5524863dea3SSunil Goutham 5534863dea3SSunil Goutham /* Clear rcvflt bit (latching high) and read it back */ 5543f4c68cfSSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) 5553f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 5563f4c68cfSSunil Goutham BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT); 5574863dea3SSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) { 5584863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "Receive fault, retry training\n"); 5594863dea3SSunil Goutham if (bgx->use_training) { 5604863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT); 5614863dea3SSunil Goutham if (!(cfg & (1ull << 13))) { 5624863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14); 5634863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg); 5644863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, 5654863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL); 5664863dea3SSunil Goutham cfg |= (1ull << 0); 5674863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, 5684863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, cfg); 5694863dea3SSunil Goutham return -1; 5704863dea3SSunil Goutham } 5714863dea3SSunil Goutham } 5724863dea3SSunil Goutham return -1; 5734863dea3SSunil Goutham } 5744863dea3SSunil Goutham 5754863dea3SSunil Goutham /* Wait for BGX RX to be idle */ 5764863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) { 5774863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU RX not idle\n"); 5784863dea3SSunil Goutham return -1; 5794863dea3SSunil Goutham } 5804863dea3SSunil Goutham 5814863dea3SSunil Goutham /* Wait for BGX TX to be idle */ 5824863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) { 5834863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU TX not idle\n"); 5844863dea3SSunil Goutham return -1; 5854863dea3SSunil Goutham } 5864863dea3SSunil Goutham 5873f4c68cfSSunil Goutham /* Clear receive packet disable */ 5884863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL); 5894863dea3SSunil Goutham cfg &= ~SPU_MISC_CTL_RX_DIS; 5904863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg); 5913f4c68cfSSunil Goutham 5923f4c68cfSSunil Goutham /* Check for MAC RX faults */ 5933f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL); 5943f4c68cfSSunil Goutham /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */ 5953f4c68cfSSunil Goutham cfg &= SMU_RX_CTL_STATUS; 5963f4c68cfSSunil Goutham if (!cfg) 5974863dea3SSunil Goutham return 0; 5983f4c68cfSSunil Goutham 5993f4c68cfSSunil Goutham /* Rx local/remote fault seen. 6003f4c68cfSSunil Goutham * Do lmac reinit to see if condition recovers 6013f4c68cfSSunil Goutham */ 6023f4c68cfSSunil Goutham bgx_lmac_xaui_init(bgx, lmacid, bgx->lmac_type); 6033f4c68cfSSunil Goutham 6043f4c68cfSSunil Goutham return -1; 6054863dea3SSunil Goutham } 6064863dea3SSunil Goutham 6074863dea3SSunil Goutham static void bgx_poll_for_link(struct work_struct *work) 6084863dea3SSunil Goutham { 6094863dea3SSunil Goutham struct lmac *lmac; 6103f4c68cfSSunil Goutham u64 spu_link, smu_link; 6114863dea3SSunil Goutham 6124863dea3SSunil Goutham lmac = container_of(work, struct lmac, dwork.work); 6134863dea3SSunil Goutham 6144863dea3SSunil Goutham /* Receive link is latching low. Force it high and verify it */ 6154863dea3SSunil Goutham bgx_reg_modify(lmac->bgx, lmac->lmacid, 6164863dea3SSunil Goutham BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK); 6174863dea3SSunil Goutham bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1, 6184863dea3SSunil Goutham SPU_STATUS1_RCV_LNK, false); 6194863dea3SSunil Goutham 6203f4c68cfSSunil Goutham spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1); 6213f4c68cfSSunil Goutham smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL); 6223f4c68cfSSunil Goutham 6233f4c68cfSSunil Goutham if ((spu_link & SPU_STATUS1_RCV_LNK) && 6243f4c68cfSSunil Goutham !(smu_link & SMU_RX_CTL_STATUS)) { 6254863dea3SSunil Goutham lmac->link_up = 1; 6264863dea3SSunil Goutham if (lmac->bgx->lmac_type == BGX_MODE_XLAUI) 6274863dea3SSunil Goutham lmac->last_speed = 40000; 6284863dea3SSunil Goutham else 6294863dea3SSunil Goutham lmac->last_speed = 10000; 6304863dea3SSunil Goutham lmac->last_duplex = 1; 6314863dea3SSunil Goutham } else { 6324863dea3SSunil Goutham lmac->link_up = 0; 6330b72a9a1SSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 6340b72a9a1SSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 6354863dea3SSunil Goutham } 6364863dea3SSunil Goutham 6374863dea3SSunil Goutham if (lmac->last_link != lmac->link_up) { 6383f4c68cfSSunil Goutham if (lmac->link_up) { 6393f4c68cfSSunil Goutham if (bgx_xaui_check_link(lmac)) { 6403f4c68cfSSunil Goutham /* Errors, clear link_up state */ 6413f4c68cfSSunil Goutham lmac->link_up = 0; 6423f4c68cfSSunil Goutham lmac->last_speed = SPEED_UNKNOWN; 6433f4c68cfSSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN; 6443f4c68cfSSunil Goutham } 6453f4c68cfSSunil Goutham } 6464863dea3SSunil Goutham lmac->last_link = lmac->link_up; 6474863dea3SSunil Goutham } 6484863dea3SSunil Goutham 6494863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); 6504863dea3SSunil Goutham } 6514863dea3SSunil Goutham 6524863dea3SSunil Goutham static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid) 6534863dea3SSunil Goutham { 6544863dea3SSunil Goutham struct lmac *lmac; 6554863dea3SSunil Goutham u64 cfg; 6564863dea3SSunil Goutham 6574863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 6584863dea3SSunil Goutham lmac->bgx = bgx; 6594863dea3SSunil Goutham 6604863dea3SSunil Goutham if (bgx->lmac_type == BGX_MODE_SGMII) { 6614863dea3SSunil Goutham lmac->is_sgmii = 1; 6624863dea3SSunil Goutham if (bgx_lmac_sgmii_init(bgx, lmacid)) 6634863dea3SSunil Goutham return -1; 6644863dea3SSunil Goutham } else { 6654863dea3SSunil Goutham lmac->is_sgmii = 0; 6664863dea3SSunil Goutham if (bgx_lmac_xaui_init(bgx, lmacid, bgx->lmac_type)) 6674863dea3SSunil Goutham return -1; 6684863dea3SSunil Goutham } 6694863dea3SSunil Goutham 6704863dea3SSunil Goutham if (lmac->is_sgmii) { 6714863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND); 6724863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 6734863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg); 6744863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1); 6754863dea3SSunil Goutham } else { 6764863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND); 6774863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */ 6784863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg); 6794863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4); 6804863dea3SSunil Goutham } 6814863dea3SSunil Goutham 6824863dea3SSunil Goutham /* Enable lmac */ 683bc69fdfcSSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN); 6844863dea3SSunil Goutham 6854863dea3SSunil Goutham /* Restore default cfg, incase low level firmware changed it */ 6864863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03); 6874863dea3SSunil Goutham 6884863dea3SSunil Goutham if ((bgx->lmac_type != BGX_MODE_XFI) && 6894863dea3SSunil Goutham (bgx->lmac_type != BGX_MODE_XLAUI) && 6904863dea3SSunil Goutham (bgx->lmac_type != BGX_MODE_40G_KR) && 6914863dea3SSunil Goutham (bgx->lmac_type != BGX_MODE_10G_KR)) { 6924863dea3SSunil Goutham if (!lmac->phydev) 6934863dea3SSunil Goutham return -ENODEV; 6944863dea3SSunil Goutham 6954863dea3SSunil Goutham lmac->phydev->dev_flags = 0; 6964863dea3SSunil Goutham 6974863dea3SSunil Goutham if (phy_connect_direct(&lmac->netdev, lmac->phydev, 6984863dea3SSunil Goutham bgx_lmac_handler, 6994863dea3SSunil Goutham PHY_INTERFACE_MODE_SGMII)) 7004863dea3SSunil Goutham return -ENODEV; 7014863dea3SSunil Goutham 7024863dea3SSunil Goutham phy_start_aneg(lmac->phydev); 7034863dea3SSunil Goutham } else { 7044863dea3SSunil Goutham lmac->check_link = alloc_workqueue("check_link", WQ_UNBOUND | 7054863dea3SSunil Goutham WQ_MEM_RECLAIM, 1); 7064863dea3SSunil Goutham if (!lmac->check_link) 7074863dea3SSunil Goutham return -ENOMEM; 7084863dea3SSunil Goutham INIT_DELAYED_WORK(&lmac->dwork, bgx_poll_for_link); 7094863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, 0); 7104863dea3SSunil Goutham } 7114863dea3SSunil Goutham 7124863dea3SSunil Goutham return 0; 7134863dea3SSunil Goutham } 7144863dea3SSunil Goutham 715fd7ec062SAleksey Makarov static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) 7164863dea3SSunil Goutham { 7174863dea3SSunil Goutham struct lmac *lmac; 7183f4c68cfSSunil Goutham u64 cfg; 7194863dea3SSunil Goutham 7204863dea3SSunil Goutham lmac = &bgx->lmac[lmacid]; 7214863dea3SSunil Goutham if (lmac->check_link) { 7224863dea3SSunil Goutham /* Destroy work queue */ 723a7b1f535SThanneeru Srinivasulu cancel_delayed_work_sync(&lmac->dwork); 7244863dea3SSunil Goutham destroy_workqueue(lmac->check_link); 7254863dea3SSunil Goutham } 7264863dea3SSunil Goutham 7273f4c68cfSSunil Goutham /* Disable packet reception */ 7283f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7293f4c68cfSSunil Goutham cfg &= ~CMR_PKT_RX_EN; 7303f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7313f4c68cfSSunil Goutham 7323f4c68cfSSunil Goutham /* Give chance for Rx/Tx FIFO to get drained */ 7333f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true); 7343f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true); 7353f4c68cfSSunil Goutham 7363f4c68cfSSunil Goutham /* Disable packet transmission */ 7373f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7383f4c68cfSSunil Goutham cfg &= ~CMR_PKT_TX_EN; 7393f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7403f4c68cfSSunil Goutham 7413f4c68cfSSunil Goutham /* Disable serdes lanes */ 7423f4c68cfSSunil Goutham if (!lmac->is_sgmii) 7433f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7443f4c68cfSSunil Goutham BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER); 7453f4c68cfSSunil Goutham else 7463f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid, 7473f4c68cfSSunil Goutham BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN); 7483f4c68cfSSunil Goutham 7493f4c68cfSSunil Goutham /* Disable LMAC */ 7503f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG); 7513f4c68cfSSunil Goutham cfg &= ~CMR_EN; 7523f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg); 7533f4c68cfSSunil Goutham 7544863dea3SSunil Goutham bgx_flush_dmac_addrs(bgx, lmacid); 7554863dea3SSunil Goutham 75660f83c89SThanneeru Srinivasulu if ((bgx->lmac_type != BGX_MODE_XFI) && 75760f83c89SThanneeru Srinivasulu (bgx->lmac_type != BGX_MODE_XLAUI) && 75860f83c89SThanneeru Srinivasulu (bgx->lmac_type != BGX_MODE_40G_KR) && 75960f83c89SThanneeru Srinivasulu (bgx->lmac_type != BGX_MODE_10G_KR) && lmac->phydev) 7604863dea3SSunil Goutham phy_disconnect(lmac->phydev); 7614863dea3SSunil Goutham 7624863dea3SSunil Goutham lmac->phydev = NULL; 7634863dea3SSunil Goutham } 7644863dea3SSunil Goutham 7654863dea3SSunil Goutham static void bgx_set_num_ports(struct bgx *bgx) 7664863dea3SSunil Goutham { 7674863dea3SSunil Goutham u64 lmac_count; 7684863dea3SSunil Goutham 7694863dea3SSunil Goutham switch (bgx->qlm_mode) { 7704863dea3SSunil Goutham case QLM_MODE_SGMII: 7714863dea3SSunil Goutham bgx->lmac_count = 4; 7724863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_SGMII; 7734863dea3SSunil Goutham bgx->lane_to_sds = 0; 7744863dea3SSunil Goutham break; 7754863dea3SSunil Goutham case QLM_MODE_XAUI_1X4: 7764863dea3SSunil Goutham bgx->lmac_count = 1; 7774863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_XAUI; 7784863dea3SSunil Goutham bgx->lane_to_sds = 0xE4; 7794863dea3SSunil Goutham break; 7804863dea3SSunil Goutham case QLM_MODE_RXAUI_2X2: 7814863dea3SSunil Goutham bgx->lmac_count = 2; 7824863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_RXAUI; 7834863dea3SSunil Goutham bgx->lane_to_sds = 0xE4; 7844863dea3SSunil Goutham break; 7854863dea3SSunil Goutham case QLM_MODE_XFI_4X1: 7864863dea3SSunil Goutham bgx->lmac_count = 4; 7874863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_XFI; 7884863dea3SSunil Goutham bgx->lane_to_sds = 0; 7894863dea3SSunil Goutham break; 7904863dea3SSunil Goutham case QLM_MODE_XLAUI_1X4: 7914863dea3SSunil Goutham bgx->lmac_count = 1; 7924863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_XLAUI; 7934863dea3SSunil Goutham bgx->lane_to_sds = 0xE4; 7944863dea3SSunil Goutham break; 7954863dea3SSunil Goutham case QLM_MODE_10G_KR_4X1: 7964863dea3SSunil Goutham bgx->lmac_count = 4; 7974863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_10G_KR; 7984863dea3SSunil Goutham bgx->lane_to_sds = 0; 7994863dea3SSunil Goutham bgx->use_training = 1; 8004863dea3SSunil Goutham break; 8014863dea3SSunil Goutham case QLM_MODE_40G_KR4_1X4: 8024863dea3SSunil Goutham bgx->lmac_count = 1; 8034863dea3SSunil Goutham bgx->lmac_type = BGX_MODE_40G_KR; 8044863dea3SSunil Goutham bgx->lane_to_sds = 0xE4; 8054863dea3SSunil Goutham bgx->use_training = 1; 8064863dea3SSunil Goutham break; 8074863dea3SSunil Goutham default: 8084863dea3SSunil Goutham bgx->lmac_count = 0; 8094863dea3SSunil Goutham break; 8104863dea3SSunil Goutham } 8114863dea3SSunil Goutham 8124863dea3SSunil Goutham /* Check if low level firmware has programmed LMAC count 8134863dea3SSunil Goutham * based on board type, if yes consider that otherwise 8144863dea3SSunil Goutham * the default static values 8154863dea3SSunil Goutham */ 8164863dea3SSunil Goutham lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7; 8174863dea3SSunil Goutham if (lmac_count != 4) 8184863dea3SSunil Goutham bgx->lmac_count = lmac_count; 8194863dea3SSunil Goutham } 8204863dea3SSunil Goutham 8214863dea3SSunil Goutham static void bgx_init_hw(struct bgx *bgx) 8224863dea3SSunil Goutham { 8234863dea3SSunil Goutham int i; 8244863dea3SSunil Goutham 8254863dea3SSunil Goutham bgx_set_num_ports(bgx); 8264863dea3SSunil Goutham 8274863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP); 8284863dea3SSunil Goutham if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS)) 8294863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id); 8304863dea3SSunil Goutham 8314863dea3SSunil Goutham /* Set lmac type and lane2serdes mapping */ 8324863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) { 8334863dea3SSunil Goutham if (bgx->lmac_type == BGX_MODE_RXAUI) { 8344863dea3SSunil Goutham if (i) 8354863dea3SSunil Goutham bgx->lane_to_sds = 0x0e; 8364863dea3SSunil Goutham else 8374863dea3SSunil Goutham bgx->lane_to_sds = 0x04; 8384863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG, 8394863dea3SSunil Goutham (bgx->lmac_type << 8) | bgx->lane_to_sds); 8404863dea3SSunil Goutham continue; 8414863dea3SSunil Goutham } 8424863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG, 8434863dea3SSunil Goutham (bgx->lmac_type << 8) | (bgx->lane_to_sds + i)); 8444863dea3SSunil Goutham bgx->lmac[i].lmacid_bd = lmac_count; 8454863dea3SSunil Goutham lmac_count++; 8464863dea3SSunil Goutham } 8474863dea3SSunil Goutham 8484863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count); 8494863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count); 8504863dea3SSunil Goutham 8514863dea3SSunil Goutham /* Set the backpressure AND mask */ 8524863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) 8534863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND, 8544863dea3SSunil Goutham ((1ULL << MAX_BGX_CHANS_PER_LMAC) - 1) << 8554863dea3SSunil Goutham (i * MAX_BGX_CHANS_PER_LMAC)); 8564863dea3SSunil Goutham 8574863dea3SSunil Goutham /* Disable all MAC filtering */ 8584863dea3SSunil Goutham for (i = 0; i < RX_DMAC_COUNT; i++) 8594863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00); 8604863dea3SSunil Goutham 8614863dea3SSunil Goutham /* Disable MAC steering (NCSI traffic) */ 8624863dea3SSunil Goutham for (i = 0; i < RX_TRAFFIC_STEER_RULE_COUNT; i++) 8634863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_STREERING + (i * 8), 0x00); 8644863dea3SSunil Goutham } 8654863dea3SSunil Goutham 8664863dea3SSunil Goutham static void bgx_get_qlm_mode(struct bgx *bgx) 8674863dea3SSunil Goutham { 8684863dea3SSunil Goutham struct device *dev = &bgx->pdev->dev; 8694863dea3SSunil Goutham int lmac_type; 8704863dea3SSunil Goutham int train_en; 8714863dea3SSunil Goutham 8724863dea3SSunil Goutham /* Read LMAC0 type to figure out QLM mode 8734863dea3SSunil Goutham * This is configured by low level firmware 8744863dea3SSunil Goutham */ 8754863dea3SSunil Goutham lmac_type = bgx_reg_read(bgx, 0, BGX_CMRX_CFG); 8764863dea3SSunil Goutham lmac_type = (lmac_type >> 8) & 0x07; 8774863dea3SSunil Goutham 8784863dea3SSunil Goutham train_en = bgx_reg_read(bgx, 0, BGX_SPUX_BR_PMD_CRTL) & 8794863dea3SSunil Goutham SPU_PMD_CRTL_TRAIN_EN; 8804863dea3SSunil Goutham 8814863dea3SSunil Goutham switch (lmac_type) { 8824863dea3SSunil Goutham case BGX_MODE_SGMII: 8834863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_SGMII; 8844863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: SGMII\n", bgx->bgx_id); 8854863dea3SSunil Goutham break; 8864863dea3SSunil Goutham case BGX_MODE_XAUI: 8874863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_XAUI_1X4; 8884863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: XAUI\n", bgx->bgx_id); 8894863dea3SSunil Goutham break; 8904863dea3SSunil Goutham case BGX_MODE_RXAUI: 8914863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_RXAUI_2X2; 8924863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: RXAUI\n", bgx->bgx_id); 8934863dea3SSunil Goutham break; 8944863dea3SSunil Goutham case BGX_MODE_XFI: 8954863dea3SSunil Goutham if (!train_en) { 8964863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_XFI_4X1; 8974863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: XFI\n", bgx->bgx_id); 8984863dea3SSunil Goutham } else { 8994863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_10G_KR_4X1; 9004863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: 10G_KR\n", bgx->bgx_id); 9014863dea3SSunil Goutham } 9024863dea3SSunil Goutham break; 9034863dea3SSunil Goutham case BGX_MODE_XLAUI: 9044863dea3SSunil Goutham if (!train_en) { 9054863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_XLAUI_1X4; 9064863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: XLAUI\n", bgx->bgx_id); 9074863dea3SSunil Goutham } else { 9084863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_40G_KR4_1X4; 9094863dea3SSunil Goutham dev_info(dev, "BGX%d QLM mode: 40G_KR4\n", bgx->bgx_id); 9104863dea3SSunil Goutham } 9114863dea3SSunil Goutham break; 9124863dea3SSunil Goutham default: 9134863dea3SSunil Goutham bgx->qlm_mode = QLM_MODE_SGMII; 9144863dea3SSunil Goutham dev_info(dev, "BGX%d QLM default mode: SGMII\n", bgx->bgx_id); 9154863dea3SSunil Goutham } 9164863dea3SSunil Goutham } 9174863dea3SSunil Goutham 91846b903a0SDavid Daney #ifdef CONFIG_ACPI 91946b903a0SDavid Daney 9201d82efacSRobert Richter static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev, 9211d82efacSRobert Richter u8 *dst) 92246b903a0SDavid Daney { 92346b903a0SDavid Daney u8 mac[ETH_ALEN]; 92446b903a0SDavid Daney int ret; 92546b903a0SDavid Daney 92646b903a0SDavid Daney ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev), 92746b903a0SDavid Daney "mac-address", mac, ETH_ALEN); 92846b903a0SDavid Daney if (ret) 92946b903a0SDavid Daney goto out; 93046b903a0SDavid Daney 93146b903a0SDavid Daney if (!is_valid_ether_addr(mac)) { 9321d82efacSRobert Richter dev_err(dev, "MAC address invalid: %pM\n", mac); 93346b903a0SDavid Daney ret = -EINVAL; 93446b903a0SDavid Daney goto out; 93546b903a0SDavid Daney } 93646b903a0SDavid Daney 9371d82efacSRobert Richter dev_info(dev, "MAC address set to: %pM\n", mac); 9381d82efacSRobert Richter 93946b903a0SDavid Daney memcpy(dst, mac, ETH_ALEN); 94046b903a0SDavid Daney out: 94146b903a0SDavid Daney return ret; 94246b903a0SDavid Daney } 94346b903a0SDavid Daney 94446b903a0SDavid Daney /* Currently only sets the MAC address. */ 94546b903a0SDavid Daney static acpi_status bgx_acpi_register_phy(acpi_handle handle, 94646b903a0SDavid Daney u32 lvl, void *context, void **rv) 94746b903a0SDavid Daney { 94846b903a0SDavid Daney struct bgx *bgx = context; 9491d82efacSRobert Richter struct device *dev = &bgx->pdev->dev; 95046b903a0SDavid Daney struct acpi_device *adev; 95146b903a0SDavid Daney 95246b903a0SDavid Daney if (acpi_bus_get_device(handle, &adev)) 95346b903a0SDavid Daney goto out; 95446b903a0SDavid Daney 9551d82efacSRobert Richter acpi_get_mac_address(dev, adev, bgx->lmac[bgx->lmac_count].mac); 95646b903a0SDavid Daney 9571d82efacSRobert Richter SET_NETDEV_DEV(&bgx->lmac[bgx->lmac_count].netdev, dev); 95846b903a0SDavid Daney 95946b903a0SDavid Daney bgx->lmac[bgx->lmac_count].lmacid = bgx->lmac_count; 96046b903a0SDavid Daney out: 96146b903a0SDavid Daney bgx->lmac_count++; 96246b903a0SDavid Daney return AE_OK; 96346b903a0SDavid Daney } 96446b903a0SDavid Daney 96546b903a0SDavid Daney static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl, 96646b903a0SDavid Daney void *context, void **ret_val) 96746b903a0SDavid Daney { 96846b903a0SDavid Daney struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL }; 96946b903a0SDavid Daney struct bgx *bgx = context; 97046b903a0SDavid Daney char bgx_sel[5]; 97146b903a0SDavid Daney 97246b903a0SDavid Daney snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id); 97346b903a0SDavid Daney if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &string))) { 97446b903a0SDavid Daney pr_warn("Invalid link device\n"); 97546b903a0SDavid Daney return AE_OK; 97646b903a0SDavid Daney } 97746b903a0SDavid Daney 97846b903a0SDavid Daney if (strncmp(string.pointer, bgx_sel, 4)) 97946b903a0SDavid Daney return AE_OK; 98046b903a0SDavid Daney 98146b903a0SDavid Daney acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, 98246b903a0SDavid Daney bgx_acpi_register_phy, NULL, bgx, NULL); 98346b903a0SDavid Daney 98446b903a0SDavid Daney kfree(string.pointer); 98546b903a0SDavid Daney return AE_CTRL_TERMINATE; 98646b903a0SDavid Daney } 98746b903a0SDavid Daney 98846b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 98946b903a0SDavid Daney { 99046b903a0SDavid Daney acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL); 99146b903a0SDavid Daney return 0; 99246b903a0SDavid Daney } 99346b903a0SDavid Daney 99446b903a0SDavid Daney #else 99546b903a0SDavid Daney 99646b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx) 99746b903a0SDavid Daney { 99846b903a0SDavid Daney return -ENODEV; 99946b903a0SDavid Daney } 100046b903a0SDavid Daney 100146b903a0SDavid Daney #endif /* CONFIG_ACPI */ 100246b903a0SDavid Daney 1003de387e11SRobert Richter #if IS_ENABLED(CONFIG_OF_MDIO) 1004de387e11SRobert Richter 1005de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 10064863dea3SSunil Goutham { 1007eee326fdSDavid Daney struct fwnode_handle *fwn; 1008b7d3e3d3SDavid Daney struct device_node *node = NULL; 10094863dea3SSunil Goutham u8 lmac = 0; 10104863dea3SSunil Goutham 1011eee326fdSDavid Daney device_for_each_child_node(&bgx->pdev->dev, fwn) { 10125fc7cf17SDavid Daney struct phy_device *pd; 1013eee326fdSDavid Daney struct device_node *phy_np; 1014b7d3e3d3SDavid Daney const char *mac; 1015de387e11SRobert Richter 10165fc7cf17SDavid Daney /* Should always be an OF node. But if it is not, we 10175fc7cf17SDavid Daney * cannot handle it, so exit the loop. 1018eee326fdSDavid Daney */ 1019b7d3e3d3SDavid Daney node = to_of_node(fwn); 1020eee326fdSDavid Daney if (!node) 1021eee326fdSDavid Daney break; 1022eee326fdSDavid Daney 1023eee326fdSDavid Daney mac = of_get_mac_address(node); 10244863dea3SSunil Goutham if (mac) 10254863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmac].mac, mac); 10264863dea3SSunil Goutham 10274863dea3SSunil Goutham SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev); 10284863dea3SSunil Goutham bgx->lmac[lmac].lmacid = lmac; 10295fc7cf17SDavid Daney 10305fc7cf17SDavid Daney phy_np = of_parse_phandle(node, "phy-handle", 0); 10315fc7cf17SDavid Daney /* If there is no phy or defective firmware presents 10325fc7cf17SDavid Daney * this cortina phy, for which there is no driver 10335fc7cf17SDavid Daney * support, ignore it. 10345fc7cf17SDavid Daney */ 10355fc7cf17SDavid Daney if (phy_np && 10365fc7cf17SDavid Daney !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) { 10375fc7cf17SDavid Daney /* Wait until the phy drivers are available */ 10385fc7cf17SDavid Daney pd = of_phy_find_device(phy_np); 10395fc7cf17SDavid Daney if (!pd) 1040b7d3e3d3SDavid Daney goto defer; 10415fc7cf17SDavid Daney bgx->lmac[lmac].phydev = pd; 10425fc7cf17SDavid Daney } 10435fc7cf17SDavid Daney 10444863dea3SSunil Goutham lmac++; 104565c66af6SDavid Daney if (lmac == MAX_LMAC_PER_BGX) { 104665c66af6SDavid Daney of_node_put(node); 10474863dea3SSunil Goutham break; 10484863dea3SSunil Goutham } 104965c66af6SDavid Daney } 1050de387e11SRobert Richter return 0; 1051b7d3e3d3SDavid Daney 1052b7d3e3d3SDavid Daney defer: 1053b7d3e3d3SDavid Daney /* We are bailing out, try not to leak device reference counts 1054b7d3e3d3SDavid Daney * for phy devices we may have already found. 1055b7d3e3d3SDavid Daney */ 1056b7d3e3d3SDavid Daney while (lmac) { 1057b7d3e3d3SDavid Daney if (bgx->lmac[lmac].phydev) { 1058b7d3e3d3SDavid Daney put_device(&bgx->lmac[lmac].phydev->mdio.dev); 1059b7d3e3d3SDavid Daney bgx->lmac[lmac].phydev = NULL; 1060b7d3e3d3SDavid Daney } 1061b7d3e3d3SDavid Daney lmac--; 1062b7d3e3d3SDavid Daney } 1063b7d3e3d3SDavid Daney of_node_put(node); 1064b7d3e3d3SDavid Daney return -EPROBE_DEFER; 1065de387e11SRobert Richter } 1066de387e11SRobert Richter 1067de387e11SRobert Richter #else 1068de387e11SRobert Richter 1069de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx) 1070de387e11SRobert Richter { 1071de387e11SRobert Richter return -ENODEV; 1072de387e11SRobert Richter } 1073de387e11SRobert Richter 1074de387e11SRobert Richter #endif /* CONFIG_OF_MDIO */ 1075de387e11SRobert Richter 1076de387e11SRobert Richter static int bgx_init_phy(struct bgx *bgx) 1077de387e11SRobert Richter { 107846b903a0SDavid Daney if (!acpi_disabled) 107946b903a0SDavid Daney return bgx_init_acpi_phy(bgx); 108046b903a0SDavid Daney 1081de387e11SRobert Richter return bgx_init_of_phy(bgx); 10824863dea3SSunil Goutham } 10834863dea3SSunil Goutham 10844863dea3SSunil Goutham static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 10854863dea3SSunil Goutham { 10864863dea3SSunil Goutham int err; 10874863dea3SSunil Goutham struct device *dev = &pdev->dev; 10884863dea3SSunil Goutham struct bgx *bgx = NULL; 10894863dea3SSunil Goutham u8 lmac; 10904863dea3SSunil Goutham 10914863dea3SSunil Goutham bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL); 10924863dea3SSunil Goutham if (!bgx) 10934863dea3SSunil Goutham return -ENOMEM; 10944863dea3SSunil Goutham bgx->pdev = pdev; 10954863dea3SSunil Goutham 10964863dea3SSunil Goutham pci_set_drvdata(pdev, bgx); 10974863dea3SSunil Goutham 10984863dea3SSunil Goutham err = pci_enable_device(pdev); 10994863dea3SSunil Goutham if (err) { 11004863dea3SSunil Goutham dev_err(dev, "Failed to enable PCI device\n"); 11014863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 11024863dea3SSunil Goutham return err; 11034863dea3SSunil Goutham } 11044863dea3SSunil Goutham 11054863dea3SSunil Goutham err = pci_request_regions(pdev, DRV_NAME); 11064863dea3SSunil Goutham if (err) { 11074863dea3SSunil Goutham dev_err(dev, "PCI request regions failed 0x%x\n", err); 11084863dea3SSunil Goutham goto err_disable_device; 11094863dea3SSunil Goutham } 11104863dea3SSunil Goutham 11114863dea3SSunil Goutham /* MAP configuration registers */ 11124863dea3SSunil Goutham bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 11134863dea3SSunil Goutham if (!bgx->reg_base) { 11144863dea3SSunil Goutham dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n"); 11154863dea3SSunil Goutham err = -ENOMEM; 11164863dea3SSunil Goutham goto err_release_regions; 11174863dea3SSunil Goutham } 11184863dea3SSunil Goutham bgx->bgx_id = (pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM) >> 24) & 1; 1119d768b678SRobert Richter bgx->bgx_id += nic_get_node_id(pdev) * MAX_BGX_PER_CN88XX; 1120d768b678SRobert Richter 11214863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = bgx; 11224863dea3SSunil Goutham bgx_get_qlm_mode(bgx); 11234863dea3SSunil Goutham 1124de387e11SRobert Richter err = bgx_init_phy(bgx); 1125de387e11SRobert Richter if (err) 1126de387e11SRobert Richter goto err_enable; 11274863dea3SSunil Goutham 11284863dea3SSunil Goutham bgx_init_hw(bgx); 11294863dea3SSunil Goutham 11304863dea3SSunil Goutham /* Enable all LMACs */ 11314863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) { 11324863dea3SSunil Goutham err = bgx_lmac_enable(bgx, lmac); 11334863dea3SSunil Goutham if (err) { 11344863dea3SSunil Goutham dev_err(dev, "BGX%d failed to enable lmac%d\n", 11354863dea3SSunil Goutham bgx->bgx_id, lmac); 11364863dea3SSunil Goutham goto err_enable; 11374863dea3SSunil Goutham } 11384863dea3SSunil Goutham } 11394863dea3SSunil Goutham 11404863dea3SSunil Goutham return 0; 11414863dea3SSunil Goutham 11424863dea3SSunil Goutham err_enable: 11434863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 11444863dea3SSunil Goutham err_release_regions: 11454863dea3SSunil Goutham pci_release_regions(pdev); 11464863dea3SSunil Goutham err_disable_device: 11474863dea3SSunil Goutham pci_disable_device(pdev); 11484863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 11494863dea3SSunil Goutham return err; 11504863dea3SSunil Goutham } 11514863dea3SSunil Goutham 11524863dea3SSunil Goutham static void bgx_remove(struct pci_dev *pdev) 11534863dea3SSunil Goutham { 11544863dea3SSunil Goutham struct bgx *bgx = pci_get_drvdata(pdev); 11554863dea3SSunil Goutham u8 lmac; 11564863dea3SSunil Goutham 11574863dea3SSunil Goutham /* Disable all LMACs */ 11584863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) 11594863dea3SSunil Goutham bgx_lmac_disable(bgx, lmac); 11604863dea3SSunil Goutham 11614863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL; 11624863dea3SSunil Goutham pci_release_regions(pdev); 11634863dea3SSunil Goutham pci_disable_device(pdev); 11644863dea3SSunil Goutham pci_set_drvdata(pdev, NULL); 11654863dea3SSunil Goutham } 11664863dea3SSunil Goutham 11674863dea3SSunil Goutham static struct pci_driver bgx_driver = { 11684863dea3SSunil Goutham .name = DRV_NAME, 11694863dea3SSunil Goutham .id_table = bgx_id_table, 11704863dea3SSunil Goutham .probe = bgx_probe, 11714863dea3SSunil Goutham .remove = bgx_remove, 11724863dea3SSunil Goutham }; 11734863dea3SSunil Goutham 11744863dea3SSunil Goutham static int __init bgx_init_module(void) 11754863dea3SSunil Goutham { 11764863dea3SSunil Goutham pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 11774863dea3SSunil Goutham 11784863dea3SSunil Goutham return pci_register_driver(&bgx_driver); 11794863dea3SSunil Goutham } 11804863dea3SSunil Goutham 11814863dea3SSunil Goutham static void __exit bgx_cleanup_module(void) 11824863dea3SSunil Goutham { 11834863dea3SSunil Goutham pci_unregister_driver(&bgx_driver); 11844863dea3SSunil Goutham } 11854863dea3SSunil Goutham 11864863dea3SSunil Goutham module_init(bgx_init_module); 11874863dea3SSunil Goutham module_exit(bgx_cleanup_module); 1188