125763b3cSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
24863dea3SSunil Goutham /*
34863dea3SSunil Goutham * Copyright (C) 2015 Cavium, Inc.
44863dea3SSunil Goutham */
54863dea3SSunil Goutham
646b903a0SDavid Daney #include <linux/acpi.h>
74863dea3SSunil Goutham #include <linux/module.h>
84863dea3SSunil Goutham #include <linux/interrupt.h>
94863dea3SSunil Goutham #include <linux/pci.h>
104863dea3SSunil Goutham #include <linux/netdevice.h>
114863dea3SSunil Goutham #include <linux/etherdevice.h>
124863dea3SSunil Goutham #include <linux/phy.h>
134863dea3SSunil Goutham #include <linux/of.h>
144863dea3SSunil Goutham #include <linux/of_mdio.h>
154863dea3SSunil Goutham #include <linux/of_net.h>
164863dea3SSunil Goutham
174863dea3SSunil Goutham #include "nic_reg.h"
184863dea3SSunil Goutham #include "nic.h"
194863dea3SSunil Goutham #include "thunder_bgx.h"
204863dea3SSunil Goutham
216b9e6547SVadim Lomovtsev #define DRV_NAME "thunder_bgx"
224863dea3SSunil Goutham #define DRV_VERSION "1.0"
234863dea3SSunil Goutham
24f8ad1f3fSVadim Lomovtsev /* RX_DMAC_CTL configuration */
25f8ad1f3fSVadim Lomovtsev enum MCAST_MODE {
26f8ad1f3fSVadim Lomovtsev MCAST_MODE_REJECT = 0x0,
27f8ad1f3fSVadim Lomovtsev MCAST_MODE_ACCEPT = 0x1,
28f8ad1f3fSVadim Lomovtsev MCAST_MODE_CAM_FILTER = 0x2,
29f8ad1f3fSVadim Lomovtsev RSVD = 0x3
30f8ad1f3fSVadim Lomovtsev };
31f8ad1f3fSVadim Lomovtsev
32f8ad1f3fSVadim Lomovtsev #define BCAST_ACCEPT BIT(0)
33f8ad1f3fSVadim Lomovtsev #define CAM_ACCEPT BIT(3)
34f8ad1f3fSVadim Lomovtsev #define MCAST_MODE_MASK 0x3
35f8ad1f3fSVadim Lomovtsev #define BGX_MCAST_MODE(x) (x << 1)
36f8ad1f3fSVadim Lomovtsev
373a34ecfdSVadim Lomovtsev struct dmac_map {
383a34ecfdSVadim Lomovtsev u64 vf_map;
393a34ecfdSVadim Lomovtsev u64 dmac;
403a34ecfdSVadim Lomovtsev };
413a34ecfdSVadim Lomovtsev
424863dea3SSunil Goutham struct lmac {
434863dea3SSunil Goutham struct bgx *bgx;
443a34ecfdSVadim Lomovtsev /* actual number of DMACs configured */
453a34ecfdSVadim Lomovtsev u8 dmacs_cfg;
463a34ecfdSVadim Lomovtsev /* overal number of possible DMACs could be configured per LMAC */
473a34ecfdSVadim Lomovtsev u8 dmacs_count;
483a34ecfdSVadim Lomovtsev struct dmac_map *dmacs; /* DMAC:VFs tracking filter array */
4946b903a0SDavid Daney u8 mac[ETH_ALEN];
500bcb7d51SSunil Goutham u8 lmac_type;
510bcb7d51SSunil Goutham u8 lane_to_sds;
520bcb7d51SSunil Goutham bool use_training;
53075ad765SThanneeru Srinivasulu bool autoneg;
544863dea3SSunil Goutham bool link_up;
554863dea3SSunil Goutham int lmacid; /* ID within BGX */
564863dea3SSunil Goutham int lmacid_bd; /* ID on board */
574863dea3SSunil Goutham struct net_device netdev;
584863dea3SSunil Goutham struct phy_device *phydev;
594863dea3SSunil Goutham unsigned int last_duplex;
604863dea3SSunil Goutham unsigned int last_link;
614863dea3SSunil Goutham unsigned int last_speed;
624863dea3SSunil Goutham bool is_sgmii;
634863dea3SSunil Goutham struct delayed_work dwork;
644863dea3SSunil Goutham struct workqueue_struct *check_link;
650c886a1dSAleksey Makarov };
664863dea3SSunil Goutham
674863dea3SSunil Goutham struct bgx {
684863dea3SSunil Goutham u8 bgx_id;
694863dea3SSunil Goutham struct lmac lmac[MAX_LMAC_PER_BGX];
707aa48655SVadim Lomovtsev u8 lmac_count;
716465859aSSunil Goutham u8 max_lmac;
727aa48655SVadim Lomovtsev u8 acpi_lmac_idx;
734863dea3SSunil Goutham void __iomem *reg_base;
744863dea3SSunil Goutham struct pci_dev *pdev;
7509de3917SSunil Goutham bool is_dlm;
766465859aSSunil Goutham bool is_rgx;
770c886a1dSAleksey Makarov };
784863dea3SSunil Goutham
79fd7ec062SAleksey Makarov static struct bgx *bgx_vnic[MAX_BGX_THUNDER];
804863dea3SSunil Goutham static int lmac_count; /* Total no of LMACs in system */
814863dea3SSunil Goutham
824863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac);
834863dea3SSunil Goutham
844863dea3SSunil Goutham /* Supported devices */
854863dea3SSunil Goutham static const struct pci_device_id bgx_id_table[] = {
864863dea3SSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_BGX) },
876465859aSSunil Goutham { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_RGX) },
884863dea3SSunil Goutham { 0, } /* end of table */
894863dea3SSunil Goutham };
904863dea3SSunil Goutham
914863dea3SSunil Goutham MODULE_AUTHOR("Cavium Inc");
924863dea3SSunil Goutham MODULE_DESCRIPTION("Cavium Thunder BGX/MAC Driver");
934863dea3SSunil Goutham MODULE_LICENSE("GPL v2");
944863dea3SSunil Goutham MODULE_VERSION(DRV_VERSION);
954863dea3SSunil Goutham MODULE_DEVICE_TABLE(pci, bgx_id_table);
964863dea3SSunil Goutham
974863dea3SSunil Goutham /* The Cavium ThunderX network controller can *only* be found in SoCs
984863dea3SSunil Goutham * containing the ThunderX ARM64 CPU implementation. All accesses to the device
994863dea3SSunil Goutham * registers on this platform are implicitly strongly ordered with respect
1004863dea3SSunil Goutham * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
1014863dea3SSunil Goutham * with no memory barriers in this driver. The readq()/writeq() functions add
1024863dea3SSunil Goutham * explicit ordering operation which in this case are redundant, and only
1034863dea3SSunil Goutham * add overhead.
1044863dea3SSunil Goutham */
1054863dea3SSunil Goutham
1064863dea3SSunil Goutham /* Register read/write APIs */
bgx_reg_read(struct bgx * bgx,u8 lmac,u64 offset)1074863dea3SSunil Goutham static u64 bgx_reg_read(struct bgx *bgx, u8 lmac, u64 offset)
1084863dea3SSunil Goutham {
1094863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset;
1104863dea3SSunil Goutham
1114863dea3SSunil Goutham return readq_relaxed(addr);
1124863dea3SSunil Goutham }
1134863dea3SSunil Goutham
bgx_reg_write(struct bgx * bgx,u8 lmac,u64 offset,u64 val)1144863dea3SSunil Goutham static void bgx_reg_write(struct bgx *bgx, u8 lmac, u64 offset, u64 val)
1154863dea3SSunil Goutham {
1164863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset;
1174863dea3SSunil Goutham
1184863dea3SSunil Goutham writeq_relaxed(val, addr);
1194863dea3SSunil Goutham }
1204863dea3SSunil Goutham
bgx_reg_modify(struct bgx * bgx,u8 lmac,u64 offset,u64 val)1214863dea3SSunil Goutham static void bgx_reg_modify(struct bgx *bgx, u8 lmac, u64 offset, u64 val)
1224863dea3SSunil Goutham {
1234863dea3SSunil Goutham void __iomem *addr = bgx->reg_base + ((u32)lmac << 20) + offset;
1244863dea3SSunil Goutham
1254863dea3SSunil Goutham writeq_relaxed(val | readq_relaxed(addr), addr);
1264863dea3SSunil Goutham }
1274863dea3SSunil Goutham
bgx_poll_reg(struct bgx * bgx,u8 lmac,u64 reg,u64 mask,bool zero)1284863dea3SSunil Goutham static int bgx_poll_reg(struct bgx *bgx, u8 lmac, u64 reg, u64 mask, bool zero)
1294863dea3SSunil Goutham {
1304863dea3SSunil Goutham int timeout = 100;
1314863dea3SSunil Goutham u64 reg_val;
1324863dea3SSunil Goutham
1334863dea3SSunil Goutham while (timeout) {
1344863dea3SSunil Goutham reg_val = bgx_reg_read(bgx, lmac, reg);
1354863dea3SSunil Goutham if (zero && !(reg_val & mask))
1364863dea3SSunil Goutham return 0;
1374863dea3SSunil Goutham if (!zero && (reg_val & mask))
1384863dea3SSunil Goutham return 0;
1394863dea3SSunil Goutham usleep_range(1000, 2000);
1404863dea3SSunil Goutham timeout--;
1414863dea3SSunil Goutham }
1424863dea3SSunil Goutham return 1;
1434863dea3SSunil Goutham }
1444863dea3SSunil Goutham
14578aacb6fSSunil Goutham static int max_bgx_per_node;
set_max_bgx_per_node(struct pci_dev * pdev)14678aacb6fSSunil Goutham static void set_max_bgx_per_node(struct pci_dev *pdev)
14778aacb6fSSunil Goutham {
14878aacb6fSSunil Goutham u16 sdevid;
14978aacb6fSSunil Goutham
15078aacb6fSSunil Goutham if (max_bgx_per_node)
15178aacb6fSSunil Goutham return;
15278aacb6fSSunil Goutham
15378aacb6fSSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid);
15478aacb6fSSunil Goutham switch (sdevid) {
15578aacb6fSSunil Goutham case PCI_SUBSYS_DEVID_81XX_BGX:
156b47a57a2SGeorge Cherian case PCI_SUBSYS_DEVID_81XX_RGX:
15778aacb6fSSunil Goutham max_bgx_per_node = MAX_BGX_PER_CN81XX;
15878aacb6fSSunil Goutham break;
15978aacb6fSSunil Goutham case PCI_SUBSYS_DEVID_83XX_BGX:
16078aacb6fSSunil Goutham max_bgx_per_node = MAX_BGX_PER_CN83XX;
16178aacb6fSSunil Goutham break;
16278aacb6fSSunil Goutham case PCI_SUBSYS_DEVID_88XX_BGX:
16378aacb6fSSunil Goutham default:
16478aacb6fSSunil Goutham max_bgx_per_node = MAX_BGX_PER_CN88XX;
16578aacb6fSSunil Goutham break;
16678aacb6fSSunil Goutham }
16778aacb6fSSunil Goutham }
16878aacb6fSSunil Goutham
get_bgx(int node,int bgx_idx)16978aacb6fSSunil Goutham static struct bgx *get_bgx(int node, int bgx_idx)
17078aacb6fSSunil Goutham {
17178aacb6fSSunil Goutham int idx = (node * max_bgx_per_node) + bgx_idx;
17278aacb6fSSunil Goutham
17378aacb6fSSunil Goutham return bgx_vnic[idx];
17478aacb6fSSunil Goutham }
17578aacb6fSSunil Goutham
1764863dea3SSunil Goutham /* Return number of BGX present in HW */
bgx_get_map(int node)1774863dea3SSunil Goutham unsigned bgx_get_map(int node)
1784863dea3SSunil Goutham {
1794863dea3SSunil Goutham int i;
1804863dea3SSunil Goutham unsigned map = 0;
1814863dea3SSunil Goutham
18278aacb6fSSunil Goutham for (i = 0; i < max_bgx_per_node; i++) {
18378aacb6fSSunil Goutham if (bgx_vnic[(node * max_bgx_per_node) + i])
1844863dea3SSunil Goutham map |= (1 << i);
1854863dea3SSunil Goutham }
1864863dea3SSunil Goutham
1874863dea3SSunil Goutham return map;
1884863dea3SSunil Goutham }
1894863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_map);
1904863dea3SSunil Goutham
1914863dea3SSunil Goutham /* Return number of LMAC configured for this BGX */
bgx_get_lmac_count(int node,int bgx_idx)1924863dea3SSunil Goutham int bgx_get_lmac_count(int node, int bgx_idx)
1934863dea3SSunil Goutham {
1944863dea3SSunil Goutham struct bgx *bgx;
1954863dea3SSunil Goutham
19678aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx);
1974863dea3SSunil Goutham if (bgx)
1984863dea3SSunil Goutham return bgx->lmac_count;
1994863dea3SSunil Goutham
2004863dea3SSunil Goutham return 0;
2014863dea3SSunil Goutham }
2024863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_count);
2034863dea3SSunil Goutham
2044863dea3SSunil Goutham /* Returns the current link status of LMAC */
bgx_get_lmac_link_state(int node,int bgx_idx,int lmacid,void * status)2054863dea3SSunil Goutham void bgx_get_lmac_link_state(int node, int bgx_idx, int lmacid, void *status)
2064863dea3SSunil Goutham {
2074863dea3SSunil Goutham struct bgx_link_status *link = (struct bgx_link_status *)status;
2084863dea3SSunil Goutham struct bgx *bgx;
2094863dea3SSunil Goutham struct lmac *lmac;
2104863dea3SSunil Goutham
21178aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx);
2124863dea3SSunil Goutham if (!bgx)
2134863dea3SSunil Goutham return;
2144863dea3SSunil Goutham
2154863dea3SSunil Goutham lmac = &bgx->lmac[lmacid];
2161cc70259SThanneeru Srinivasulu link->mac_type = lmac->lmac_type;
2174863dea3SSunil Goutham link->link_up = lmac->link_up;
2184863dea3SSunil Goutham link->duplex = lmac->last_duplex;
2194863dea3SSunil Goutham link->speed = lmac->last_speed;
2204863dea3SSunil Goutham }
2214863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_link_state);
2224863dea3SSunil Goutham
bgx_get_lmac_mac(int node,int bgx_idx,int lmacid)223e610cb32SAleksey Makarov const u8 *bgx_get_lmac_mac(int node, int bgx_idx, int lmacid)
2244863dea3SSunil Goutham {
22578aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx);
2264863dea3SSunil Goutham
2274863dea3SSunil Goutham if (bgx)
2284863dea3SSunil Goutham return bgx->lmac[lmacid].mac;
2294863dea3SSunil Goutham
2304863dea3SSunil Goutham return NULL;
2314863dea3SSunil Goutham }
2324863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_lmac_mac);
2334863dea3SSunil Goutham
bgx_set_lmac_mac(int node,int bgx_idx,int lmacid,const u8 * mac)234e610cb32SAleksey Makarov void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac)
2354863dea3SSunil Goutham {
23678aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx);
2374863dea3SSunil Goutham
2384863dea3SSunil Goutham if (!bgx)
2394863dea3SSunil Goutham return;
2404863dea3SSunil Goutham
2414863dea3SSunil Goutham ether_addr_copy(bgx->lmac[lmacid].mac, mac);
2424863dea3SSunil Goutham }
2434863dea3SSunil Goutham EXPORT_SYMBOL(bgx_set_lmac_mac);
2444863dea3SSunil Goutham
bgx_flush_dmac_cam_filter(struct bgx * bgx,int lmacid)2453a34ecfdSVadim Lomovtsev static void bgx_flush_dmac_cam_filter(struct bgx *bgx, int lmacid)
2463a34ecfdSVadim Lomovtsev {
2473a34ecfdSVadim Lomovtsev struct lmac *lmac = NULL;
2483a34ecfdSVadim Lomovtsev u8 idx = 0;
2493a34ecfdSVadim Lomovtsev
2503a34ecfdSVadim Lomovtsev lmac = &bgx->lmac[lmacid];
2513a34ecfdSVadim Lomovtsev /* reset CAM filters */
2523a34ecfdSVadim Lomovtsev for (idx = 0; idx < lmac->dmacs_count; idx++)
2533a34ecfdSVadim Lomovtsev bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM +
2543a34ecfdSVadim Lomovtsev ((lmacid * lmac->dmacs_count) + idx) *
2553a34ecfdSVadim Lomovtsev sizeof(u64), 0);
2563a34ecfdSVadim Lomovtsev }
2573a34ecfdSVadim Lomovtsev
bgx_lmac_remove_filters(struct lmac * lmac,u8 vf_id)258ceb9ea21SVadim Lomovtsev static void bgx_lmac_remove_filters(struct lmac *lmac, u8 vf_id)
259ceb9ea21SVadim Lomovtsev {
260ceb9ea21SVadim Lomovtsev int i = 0;
261ceb9ea21SVadim Lomovtsev
262ceb9ea21SVadim Lomovtsev if (!lmac)
263ceb9ea21SVadim Lomovtsev return;
264ceb9ea21SVadim Lomovtsev
265ceb9ea21SVadim Lomovtsev /* We've got reset filters request from some of attached VF, while the
266ceb9ea21SVadim Lomovtsev * others might want to keep their configuration. So in this case lets
267ceb9ea21SVadim Lomovtsev * iterate over all of configured filters and decrease number of
268ceb9ea21SVadim Lomovtsev * referencies. if some addresses get zero refs remove them from list
269ceb9ea21SVadim Lomovtsev */
270ceb9ea21SVadim Lomovtsev for (i = lmac->dmacs_cfg - 1; i >= 0; i--) {
271ceb9ea21SVadim Lomovtsev lmac->dmacs[i].vf_map &= ~BIT_ULL(vf_id);
272ceb9ea21SVadim Lomovtsev if (!lmac->dmacs[i].vf_map) {
273ceb9ea21SVadim Lomovtsev lmac->dmacs_cfg--;
274ceb9ea21SVadim Lomovtsev lmac->dmacs[i].dmac = 0;
275ceb9ea21SVadim Lomovtsev lmac->dmacs[i].vf_map = 0;
276ceb9ea21SVadim Lomovtsev }
277ceb9ea21SVadim Lomovtsev }
278ceb9ea21SVadim Lomovtsev }
279ceb9ea21SVadim Lomovtsev
bgx_lmac_save_filter(struct lmac * lmac,u64 dmac,u8 vf_id)280ceb9ea21SVadim Lomovtsev static int bgx_lmac_save_filter(struct lmac *lmac, u64 dmac, u8 vf_id)
281ceb9ea21SVadim Lomovtsev {
282ceb9ea21SVadim Lomovtsev u8 i = 0;
283ceb9ea21SVadim Lomovtsev
284ceb9ea21SVadim Lomovtsev if (!lmac)
285ceb9ea21SVadim Lomovtsev return -1;
286ceb9ea21SVadim Lomovtsev
287ceb9ea21SVadim Lomovtsev /* At the same time we could have several VFs 'attached' to some
288ceb9ea21SVadim Lomovtsev * particular LMAC, and each VF is represented as network interface
289ceb9ea21SVadim Lomovtsev * for kernel. So from user perspective it should be possible to
290ceb9ea21SVadim Lomovtsev * manipulate with its' (VF) receive modes. However from PF
291ceb9ea21SVadim Lomovtsev * driver perspective we need to keep track of filter configurations
292ceb9ea21SVadim Lomovtsev * for different VFs to prevent filter values dupes
293ceb9ea21SVadim Lomovtsev */
294ceb9ea21SVadim Lomovtsev for (i = 0; i < lmac->dmacs_cfg; i++) {
295ceb9ea21SVadim Lomovtsev if (lmac->dmacs[i].dmac == dmac) {
296ceb9ea21SVadim Lomovtsev lmac->dmacs[i].vf_map |= BIT_ULL(vf_id);
297ceb9ea21SVadim Lomovtsev return -1;
298ceb9ea21SVadim Lomovtsev }
299ceb9ea21SVadim Lomovtsev }
300ceb9ea21SVadim Lomovtsev
301ceb9ea21SVadim Lomovtsev if (!(lmac->dmacs_cfg < lmac->dmacs_count))
302ceb9ea21SVadim Lomovtsev return -1;
303ceb9ea21SVadim Lomovtsev
304ceb9ea21SVadim Lomovtsev /* keep it for further tracking */
305ceb9ea21SVadim Lomovtsev lmac->dmacs[lmac->dmacs_cfg].dmac = dmac;
306ceb9ea21SVadim Lomovtsev lmac->dmacs[lmac->dmacs_cfg].vf_map = BIT_ULL(vf_id);
307ceb9ea21SVadim Lomovtsev lmac->dmacs_cfg++;
308ceb9ea21SVadim Lomovtsev return 0;
309ceb9ea21SVadim Lomovtsev }
310ceb9ea21SVadim Lomovtsev
bgx_set_dmac_cam_filter_mac(struct bgx * bgx,int lmacid,u64 cam_dmac,u8 idx)311ceb9ea21SVadim Lomovtsev static int bgx_set_dmac_cam_filter_mac(struct bgx *bgx, int lmacid,
312ceb9ea21SVadim Lomovtsev u64 cam_dmac, u8 idx)
313ceb9ea21SVadim Lomovtsev {
314ceb9ea21SVadim Lomovtsev struct lmac *lmac = NULL;
315ceb9ea21SVadim Lomovtsev u64 cfg = 0;
316ceb9ea21SVadim Lomovtsev
317ceb9ea21SVadim Lomovtsev /* skip zero addresses as meaningless */
318ceb9ea21SVadim Lomovtsev if (!cam_dmac || !bgx)
319ceb9ea21SVadim Lomovtsev return -1;
320ceb9ea21SVadim Lomovtsev
321ceb9ea21SVadim Lomovtsev lmac = &bgx->lmac[lmacid];
322ceb9ea21SVadim Lomovtsev
323ceb9ea21SVadim Lomovtsev /* configure DCAM filtering for designated LMAC */
324ceb9ea21SVadim Lomovtsev cfg = RX_DMACX_CAM_LMACID(lmacid & LMAC_ID_MASK) |
325ceb9ea21SVadim Lomovtsev RX_DMACX_CAM_EN | cam_dmac;
326ceb9ea21SVadim Lomovtsev bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM +
327ceb9ea21SVadim Lomovtsev ((lmacid * lmac->dmacs_count) + idx) * sizeof(u64), cfg);
328ceb9ea21SVadim Lomovtsev return 0;
329ceb9ea21SVadim Lomovtsev }
330ceb9ea21SVadim Lomovtsev
bgx_set_dmac_cam_filter(int node,int bgx_idx,int lmacid,u64 cam_dmac,u8 vf_id)331ceb9ea21SVadim Lomovtsev void bgx_set_dmac_cam_filter(int node, int bgx_idx, int lmacid,
332ceb9ea21SVadim Lomovtsev u64 cam_dmac, u8 vf_id)
333ceb9ea21SVadim Lomovtsev {
334ceb9ea21SVadim Lomovtsev struct bgx *bgx = get_bgx(node, bgx_idx);
335ceb9ea21SVadim Lomovtsev struct lmac *lmac = NULL;
336ceb9ea21SVadim Lomovtsev
337ceb9ea21SVadim Lomovtsev if (!bgx)
338ceb9ea21SVadim Lomovtsev return;
339ceb9ea21SVadim Lomovtsev
340ceb9ea21SVadim Lomovtsev lmac = &bgx->lmac[lmacid];
341ceb9ea21SVadim Lomovtsev
342ceb9ea21SVadim Lomovtsev if (!cam_dmac)
343ceb9ea21SVadim Lomovtsev cam_dmac = ether_addr_to_u64(lmac->mac);
344ceb9ea21SVadim Lomovtsev
345ceb9ea21SVadim Lomovtsev /* since we might have several VFs attached to particular LMAC
346ceb9ea21SVadim Lomovtsev * and kernel could call mcast config for each of them with the
347ceb9ea21SVadim Lomovtsev * same MAC, check if requested MAC is already in filtering list and
348ceb9ea21SVadim Lomovtsev * updare/prepare list of MACs to be applied later to HW filters
349ceb9ea21SVadim Lomovtsev */
350ceb9ea21SVadim Lomovtsev bgx_lmac_save_filter(lmac, cam_dmac, vf_id);
351ceb9ea21SVadim Lomovtsev }
352ceb9ea21SVadim Lomovtsev EXPORT_SYMBOL(bgx_set_dmac_cam_filter);
353ceb9ea21SVadim Lomovtsev
bgx_set_xcast_mode(int node,int bgx_idx,int lmacid,u8 mode)354ceb9ea21SVadim Lomovtsev void bgx_set_xcast_mode(int node, int bgx_idx, int lmacid, u8 mode)
355ceb9ea21SVadim Lomovtsev {
356ceb9ea21SVadim Lomovtsev struct bgx *bgx = get_bgx(node, bgx_idx);
357ceb9ea21SVadim Lomovtsev struct lmac *lmac = NULL;
358ceb9ea21SVadim Lomovtsev u64 cfg = 0;
359ceb9ea21SVadim Lomovtsev u8 i = 0;
360ceb9ea21SVadim Lomovtsev
361ceb9ea21SVadim Lomovtsev if (!bgx)
362ceb9ea21SVadim Lomovtsev return;
363ceb9ea21SVadim Lomovtsev
364ceb9ea21SVadim Lomovtsev lmac = &bgx->lmac[lmacid];
365ceb9ea21SVadim Lomovtsev
366ceb9ea21SVadim Lomovtsev cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL);
367ceb9ea21SVadim Lomovtsev if (mode & BGX_XCAST_BCAST_ACCEPT)
368ceb9ea21SVadim Lomovtsev cfg |= BCAST_ACCEPT;
369ceb9ea21SVadim Lomovtsev else
370ceb9ea21SVadim Lomovtsev cfg &= ~BCAST_ACCEPT;
371ceb9ea21SVadim Lomovtsev
372ceb9ea21SVadim Lomovtsev /* disable all MCASTs and DMAC filtering */
373ceb9ea21SVadim Lomovtsev cfg &= ~(CAM_ACCEPT | BGX_MCAST_MODE(MCAST_MODE_MASK));
374ceb9ea21SVadim Lomovtsev
375ceb9ea21SVadim Lomovtsev /* check requested bits and set filtergin mode appropriately */
376ceb9ea21SVadim Lomovtsev if (mode & (BGX_XCAST_MCAST_ACCEPT)) {
377ceb9ea21SVadim Lomovtsev cfg |= (BGX_MCAST_MODE(MCAST_MODE_ACCEPT));
378ceb9ea21SVadim Lomovtsev } else if (mode & BGX_XCAST_MCAST_FILTER) {
379ceb9ea21SVadim Lomovtsev cfg |= (BGX_MCAST_MODE(MCAST_MODE_CAM_FILTER) | CAM_ACCEPT);
380ceb9ea21SVadim Lomovtsev for (i = 0; i < lmac->dmacs_cfg; i++)
381ceb9ea21SVadim Lomovtsev bgx_set_dmac_cam_filter_mac(bgx, lmacid,
382ceb9ea21SVadim Lomovtsev lmac->dmacs[i].dmac, i);
383ceb9ea21SVadim Lomovtsev }
384ceb9ea21SVadim Lomovtsev bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, cfg);
385ceb9ea21SVadim Lomovtsev }
386ceb9ea21SVadim Lomovtsev EXPORT_SYMBOL(bgx_set_xcast_mode);
387ceb9ea21SVadim Lomovtsev
bgx_reset_xcast_mode(int node,int bgx_idx,int lmacid,u8 vf_id)388ceb9ea21SVadim Lomovtsev void bgx_reset_xcast_mode(int node, int bgx_idx, int lmacid, u8 vf_id)
389ceb9ea21SVadim Lomovtsev {
390ceb9ea21SVadim Lomovtsev struct bgx *bgx = get_bgx(node, bgx_idx);
391ceb9ea21SVadim Lomovtsev
392ceb9ea21SVadim Lomovtsev if (!bgx)
393ceb9ea21SVadim Lomovtsev return;
394ceb9ea21SVadim Lomovtsev
395ceb9ea21SVadim Lomovtsev bgx_lmac_remove_filters(&bgx->lmac[lmacid], vf_id);
396ceb9ea21SVadim Lomovtsev bgx_flush_dmac_cam_filter(bgx, lmacid);
397ceb9ea21SVadim Lomovtsev bgx_set_xcast_mode(node, bgx_idx, lmacid,
398ceb9ea21SVadim Lomovtsev (BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT));
399ceb9ea21SVadim Lomovtsev }
400ceb9ea21SVadim Lomovtsev EXPORT_SYMBOL(bgx_reset_xcast_mode);
401ceb9ea21SVadim Lomovtsev
bgx_lmac_rx_tx_enable(int node,int bgx_idx,int lmacid,bool enable)402bc69fdfcSSunil Goutham void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable)
403bc69fdfcSSunil Goutham {
40478aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx);
4056465859aSSunil Goutham struct lmac *lmac;
406bc69fdfcSSunil Goutham u64 cfg;
407bc69fdfcSSunil Goutham
408bc69fdfcSSunil Goutham if (!bgx)
409bc69fdfcSSunil Goutham return;
4106465859aSSunil Goutham lmac = &bgx->lmac[lmacid];
411bc69fdfcSSunil Goutham
412bc69fdfcSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG);
413971617c3STim Harvey if (enable) {
414bc69fdfcSSunil Goutham cfg |= CMR_PKT_RX_EN | CMR_PKT_TX_EN;
415971617c3STim Harvey
416971617c3STim Harvey /* enable TX FIFO Underflow interrupt */
417971617c3STim Harvey bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_INT_ENA_W1S,
418971617c3STim Harvey GMI_TXX_INT_UNDFLW);
419971617c3STim Harvey } else {
420bc69fdfcSSunil Goutham cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN);
421971617c3STim Harvey
422971617c3STim Harvey /* Disable TX FIFO Underflow interrupt */
423971617c3STim Harvey bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_INT_ENA_W1C,
424971617c3STim Harvey GMI_TXX_INT_UNDFLW);
425971617c3STim Harvey }
426bc69fdfcSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg);
4276465859aSSunil Goutham
4286465859aSSunil Goutham if (bgx->is_rgx)
4296465859aSSunil Goutham xcv_setup_link(enable ? lmac->link_up : 0, lmac->last_speed);
430bc69fdfcSSunil Goutham }
431bc69fdfcSSunil Goutham EXPORT_SYMBOL(bgx_lmac_rx_tx_enable);
432bc69fdfcSSunil Goutham
4334a875509SSunil Goutham /* Enables or disables timestamp insertion by BGX for Rx packets */
bgx_config_timestamping(int node,int bgx_idx,int lmacid,bool enable)4344a875509SSunil Goutham void bgx_config_timestamping(int node, int bgx_idx, int lmacid, bool enable)
4354a875509SSunil Goutham {
4364a875509SSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx);
4374a875509SSunil Goutham struct lmac *lmac;
4384a875509SSunil Goutham u64 csr_offset, cfg;
4394a875509SSunil Goutham
4404a875509SSunil Goutham if (!bgx)
4414a875509SSunil Goutham return;
4424a875509SSunil Goutham
4434a875509SSunil Goutham lmac = &bgx->lmac[lmacid];
4444a875509SSunil Goutham
4454a875509SSunil Goutham if (lmac->lmac_type == BGX_MODE_SGMII ||
4464a875509SSunil Goutham lmac->lmac_type == BGX_MODE_QSGMII ||
4474a875509SSunil Goutham lmac->lmac_type == BGX_MODE_RGMII)
4484a875509SSunil Goutham csr_offset = BGX_GMP_GMI_RXX_FRM_CTL;
4494a875509SSunil Goutham else
4504a875509SSunil Goutham csr_offset = BGX_SMUX_RX_FRM_CTL;
4514a875509SSunil Goutham
4524a875509SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, csr_offset);
4534a875509SSunil Goutham
4544a875509SSunil Goutham if (enable)
4554a875509SSunil Goutham cfg |= BGX_PKT_RX_PTP_EN;
4564a875509SSunil Goutham else
4574a875509SSunil Goutham cfg &= ~BGX_PKT_RX_PTP_EN;
4584a875509SSunil Goutham bgx_reg_write(bgx, lmacid, csr_offset, cfg);
4594a875509SSunil Goutham }
4604a875509SSunil Goutham EXPORT_SYMBOL(bgx_config_timestamping);
4614a875509SSunil Goutham
bgx_lmac_get_pfc(int node,int bgx_idx,int lmacid,void * pause)462430da208SSunil Goutham void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause)
463430da208SSunil Goutham {
464430da208SSunil Goutham struct pfc *pfc = (struct pfc *)pause;
46578aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx);
466430da208SSunil Goutham struct lmac *lmac;
467430da208SSunil Goutham u64 cfg;
468430da208SSunil Goutham
469430da208SSunil Goutham if (!bgx)
470430da208SSunil Goutham return;
471430da208SSunil Goutham lmac = &bgx->lmac[lmacid];
472430da208SSunil Goutham if (lmac->is_sgmii)
473430da208SSunil Goutham return;
474430da208SSunil Goutham
475430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_CBFC_CTL);
476430da208SSunil Goutham pfc->fc_rx = cfg & RX_EN;
477430da208SSunil Goutham pfc->fc_tx = cfg & TX_EN;
478430da208SSunil Goutham pfc->autoneg = 0;
479430da208SSunil Goutham }
480430da208SSunil Goutham EXPORT_SYMBOL(bgx_lmac_get_pfc);
481430da208SSunil Goutham
bgx_lmac_set_pfc(int node,int bgx_idx,int lmacid,void * pause)482430da208SSunil Goutham void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause)
483430da208SSunil Goutham {
484430da208SSunil Goutham struct pfc *pfc = (struct pfc *)pause;
48578aacb6fSSunil Goutham struct bgx *bgx = get_bgx(node, bgx_idx);
486430da208SSunil Goutham struct lmac *lmac;
487430da208SSunil Goutham u64 cfg;
488430da208SSunil Goutham
489430da208SSunil Goutham if (!bgx)
490430da208SSunil Goutham return;
491430da208SSunil Goutham lmac = &bgx->lmac[lmacid];
492430da208SSunil Goutham if (lmac->is_sgmii)
493430da208SSunil Goutham return;
494430da208SSunil Goutham
495430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_CBFC_CTL);
496430da208SSunil Goutham cfg &= ~(RX_EN | TX_EN);
497430da208SSunil Goutham cfg |= (pfc->fc_rx ? RX_EN : 0x00);
498430da208SSunil Goutham cfg |= (pfc->fc_tx ? TX_EN : 0x00);
499430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_CBFC_CTL, cfg);
500430da208SSunil Goutham }
501430da208SSunil Goutham EXPORT_SYMBOL(bgx_lmac_set_pfc);
502430da208SSunil Goutham
bgx_sgmii_change_link_state(struct lmac * lmac)5034863dea3SSunil Goutham static void bgx_sgmii_change_link_state(struct lmac *lmac)
5044863dea3SSunil Goutham {
5054863dea3SSunil Goutham struct bgx *bgx = lmac->bgx;
5064863dea3SSunil Goutham u64 cmr_cfg;
5074863dea3SSunil Goutham u64 port_cfg = 0;
5084863dea3SSunil Goutham u64 misc_ctl = 0;
509500268e9SSunil Goutham bool tx_en, rx_en;
5104863dea3SSunil Goutham
5114863dea3SSunil Goutham cmr_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG);
512500268e9SSunil Goutham tx_en = cmr_cfg & CMR_PKT_TX_EN;
513500268e9SSunil Goutham rx_en = cmr_cfg & CMR_PKT_RX_EN;
514500268e9SSunil Goutham cmr_cfg &= ~(CMR_PKT_RX_EN | CMR_PKT_TX_EN);
5154863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg);
5164863dea3SSunil Goutham
517500268e9SSunil Goutham /* Wait for BGX RX to be idle */
518500268e9SSunil Goutham if (bgx_poll_reg(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG,
519500268e9SSunil Goutham GMI_PORT_CFG_RX_IDLE, false)) {
520500268e9SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d LMAC%d GMI RX not idle\n",
521500268e9SSunil Goutham bgx->bgx_id, lmac->lmacid);
522500268e9SSunil Goutham return;
523500268e9SSunil Goutham }
524500268e9SSunil Goutham
525500268e9SSunil Goutham /* Wait for BGX TX to be idle */
526500268e9SSunil Goutham if (bgx_poll_reg(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG,
527500268e9SSunil Goutham GMI_PORT_CFG_TX_IDLE, false)) {
528500268e9SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d LMAC%d GMI TX not idle\n",
529500268e9SSunil Goutham bgx->bgx_id, lmac->lmacid);
530500268e9SSunil Goutham return;
531500268e9SSunil Goutham }
532500268e9SSunil Goutham
5334863dea3SSunil Goutham port_cfg = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG);
5344863dea3SSunil Goutham misc_ctl = bgx_reg_read(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL);
5354863dea3SSunil Goutham
5364863dea3SSunil Goutham if (lmac->link_up) {
5374863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_GMX_ENO;
5384863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_DUPLEX;
5394863dea3SSunil Goutham port_cfg |= (lmac->last_duplex << 2);
5404863dea3SSunil Goutham } else {
5414863dea3SSunil Goutham misc_ctl |= PCS_MISC_CTL_GMX_ENO;
5424863dea3SSunil Goutham }
5434863dea3SSunil Goutham
5444863dea3SSunil Goutham switch (lmac->last_speed) {
5454863dea3SSunil Goutham case 10:
5464863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */
5474863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED_MSB; /* speed_msb 1 */
5484863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */
5494863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK;
5504863dea3SSunil Goutham misc_ctl |= 50; /* samp_pt */
5514863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64);
5524863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0);
5534863dea3SSunil Goutham break;
5544863dea3SSunil Goutham case 100:
5554863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED; /* speed 0 */
5564863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */
5574863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SLOT_TIME; /* slottime 0 */
5584863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK;
5594863dea3SSunil Goutham misc_ctl |= 5; /* samp_pt */
5604863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 64);
5614863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_BURST, 0);
5624863dea3SSunil Goutham break;
5634863dea3SSunil Goutham case 1000:
5644863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SPEED; /* speed 1 */
5654863dea3SSunil Goutham port_cfg &= ~GMI_PORT_CFG_SPEED_MSB; /* speed_msb 0 */
5664863dea3SSunil Goutham port_cfg |= GMI_PORT_CFG_SLOT_TIME; /* slottime 1 */
5674863dea3SSunil Goutham misc_ctl &= ~PCS_MISC_CTL_SAMP_PT_MASK;
5684863dea3SSunil Goutham misc_ctl |= 1; /* samp_pt */
5694863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_TXX_SLOT, 512);
5704863dea3SSunil Goutham if (lmac->last_duplex)
5714863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid,
5724863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 0);
5734863dea3SSunil Goutham else
5744863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid,
5754863dea3SSunil Goutham BGX_GMP_GMI_TXX_BURST, 8192);
5764863dea3SSunil Goutham break;
5774863dea3SSunil Goutham default:
5784863dea3SSunil Goutham break;
5794863dea3SSunil Goutham }
5804863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_PCS_MISCX_CTL, misc_ctl);
5814863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_GMP_GMI_PRTX_CFG, port_cfg);
5824863dea3SSunil Goutham
583500268e9SSunil Goutham /* Restore CMR config settings */
584500268e9SSunil Goutham cmr_cfg |= (rx_en ? CMR_PKT_RX_EN : 0) | (tx_en ? CMR_PKT_TX_EN : 0);
5854863dea3SSunil Goutham bgx_reg_write(bgx, lmac->lmacid, BGX_CMRX_CFG, cmr_cfg);
5866465859aSSunil Goutham
5876465859aSSunil Goutham if (bgx->is_rgx && (cmr_cfg & (CMR_PKT_RX_EN | CMR_PKT_TX_EN)))
5886465859aSSunil Goutham xcv_setup_link(lmac->link_up, lmac->last_speed);
5894863dea3SSunil Goutham }
5904863dea3SSunil Goutham
bgx_lmac_handler(struct net_device * netdev)591fd7ec062SAleksey Makarov static void bgx_lmac_handler(struct net_device *netdev)
5924863dea3SSunil Goutham {
5934863dea3SSunil Goutham struct lmac *lmac = container_of(netdev, struct lmac, netdev);
594099a728dSxypron.glpk@gmx.de struct phy_device *phydev;
5954863dea3SSunil Goutham int link_changed = 0;
5964863dea3SSunil Goutham
597099a728dSxypron.glpk@gmx.de phydev = lmac->phydev;
598099a728dSxypron.glpk@gmx.de
5994863dea3SSunil Goutham if (!phydev->link && lmac->last_link)
6004863dea3SSunil Goutham link_changed = -1;
6014863dea3SSunil Goutham
6024863dea3SSunil Goutham if (phydev->link &&
6034863dea3SSunil Goutham (lmac->last_duplex != phydev->duplex ||
6044863dea3SSunil Goutham lmac->last_link != phydev->link ||
6054863dea3SSunil Goutham lmac->last_speed != phydev->speed)) {
6064863dea3SSunil Goutham link_changed = 1;
6074863dea3SSunil Goutham }
6084863dea3SSunil Goutham
6094863dea3SSunil Goutham lmac->last_link = phydev->link;
6104863dea3SSunil Goutham lmac->last_speed = phydev->speed;
6114863dea3SSunil Goutham lmac->last_duplex = phydev->duplex;
6124863dea3SSunil Goutham
6134863dea3SSunil Goutham if (!link_changed)
6144863dea3SSunil Goutham return;
6154863dea3SSunil Goutham
6164863dea3SSunil Goutham if (link_changed > 0)
6174863dea3SSunil Goutham lmac->link_up = true;
6184863dea3SSunil Goutham else
6194863dea3SSunil Goutham lmac->link_up = false;
6204863dea3SSunil Goutham
6214863dea3SSunil Goutham if (lmac->is_sgmii)
6224863dea3SSunil Goutham bgx_sgmii_change_link_state(lmac);
6234863dea3SSunil Goutham else
6244863dea3SSunil Goutham bgx_xaui_check_link(lmac);
6254863dea3SSunil Goutham }
6264863dea3SSunil Goutham
bgx_get_rx_stats(int node,int bgx_idx,int lmac,int idx)6274863dea3SSunil Goutham u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx)
6284863dea3SSunil Goutham {
6294863dea3SSunil Goutham struct bgx *bgx;
6304863dea3SSunil Goutham
63178aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx);
6324863dea3SSunil Goutham if (!bgx)
6334863dea3SSunil Goutham return 0;
6344863dea3SSunil Goutham
6354863dea3SSunil Goutham if (idx > 8)
6364863dea3SSunil Goutham lmac = 0;
6374863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_RX_STAT0 + (idx * 8));
6384863dea3SSunil Goutham }
6394863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_rx_stats);
6404863dea3SSunil Goutham
bgx_get_tx_stats(int node,int bgx_idx,int lmac,int idx)6414863dea3SSunil Goutham u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx)
6424863dea3SSunil Goutham {
6434863dea3SSunil Goutham struct bgx *bgx;
6444863dea3SSunil Goutham
64578aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx);
6464863dea3SSunil Goutham if (!bgx)
6474863dea3SSunil Goutham return 0;
6484863dea3SSunil Goutham
6494863dea3SSunil Goutham return bgx_reg_read(bgx, lmac, BGX_CMRX_TX_STAT0 + (idx * 8));
6504863dea3SSunil Goutham }
6514863dea3SSunil Goutham EXPORT_SYMBOL(bgx_get_tx_stats);
6524863dea3SSunil Goutham
653d77a2384SSunil Goutham /* Configure BGX LMAC in internal loopback mode */
bgx_lmac_internal_loopback(int node,int bgx_idx,int lmac_idx,bool enable)654d77a2384SSunil Goutham void bgx_lmac_internal_loopback(int node, int bgx_idx,
655d77a2384SSunil Goutham int lmac_idx, bool enable)
656d77a2384SSunil Goutham {
657d77a2384SSunil Goutham struct bgx *bgx;
658d77a2384SSunil Goutham struct lmac *lmac;
659d77a2384SSunil Goutham u64 cfg;
660d77a2384SSunil Goutham
66178aacb6fSSunil Goutham bgx = get_bgx(node, bgx_idx);
662d77a2384SSunil Goutham if (!bgx)
663d77a2384SSunil Goutham return;
664d77a2384SSunil Goutham
665d77a2384SSunil Goutham lmac = &bgx->lmac[lmac_idx];
666d77a2384SSunil Goutham if (lmac->is_sgmii) {
667d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL);
668d77a2384SSunil Goutham if (enable)
669d77a2384SSunil Goutham cfg |= PCS_MRX_CTL_LOOPBACK1;
670d77a2384SSunil Goutham else
671d77a2384SSunil Goutham cfg &= ~PCS_MRX_CTL_LOOPBACK1;
672d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_GMP_PCS_MRX_CTL, cfg);
673d77a2384SSunil Goutham } else {
674d77a2384SSunil Goutham cfg = bgx_reg_read(bgx, lmac_idx, BGX_SPUX_CONTROL1);
675d77a2384SSunil Goutham if (enable)
676d77a2384SSunil Goutham cfg |= SPU_CTL_LOOPBACK;
677d77a2384SSunil Goutham else
678d77a2384SSunil Goutham cfg &= ~SPU_CTL_LOOPBACK;
679d77a2384SSunil Goutham bgx_reg_write(bgx, lmac_idx, BGX_SPUX_CONTROL1, cfg);
680d77a2384SSunil Goutham }
681d77a2384SSunil Goutham }
682d77a2384SSunil Goutham EXPORT_SYMBOL(bgx_lmac_internal_loopback);
683d77a2384SSunil Goutham
bgx_lmac_sgmii_init(struct bgx * bgx,struct lmac * lmac)6843f8057cfSSunil Goutham static int bgx_lmac_sgmii_init(struct bgx *bgx, struct lmac *lmac)
6854863dea3SSunil Goutham {
6863f8057cfSSunil Goutham int lmacid = lmac->lmacid;
6874863dea3SSunil Goutham u64 cfg;
6884863dea3SSunil Goutham
6894863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_THRESH, 0x30);
6904863dea3SSunil Goutham /* max packet size */
6914863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_RXX_JABBER, MAX_FRAME_SIZE);
6924863dea3SSunil Goutham
6934863dea3SSunil Goutham /* Disable frame alignment if using preamble */
6944863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND);
6954863dea3SSunil Goutham if (cfg & 1)
6964863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_SGMII_CTL, 0);
6974863dea3SSunil Goutham
6984863dea3SSunil Goutham /* Enable lmac */
6994863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN);
7004863dea3SSunil Goutham
7014863dea3SSunil Goutham /* PCS reset */
7024863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_RESET);
7034863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_CTL,
7044863dea3SSunil Goutham PCS_MRX_CTL_RESET, true)) {
7054863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX PCS reset not completed\n");
7064863dea3SSunil Goutham return -1;
7074863dea3SSunil Goutham }
7084863dea3SSunil Goutham
7094863dea3SSunil Goutham /* power down, reset autoneg, autoneg enable */
7104863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MRX_CTL);
7114863dea3SSunil Goutham cfg &= ~PCS_MRX_CTL_PWR_DN;
712075ad765SThanneeru Srinivasulu cfg |= PCS_MRX_CTL_RST_AN;
713075ad765SThanneeru Srinivasulu if (lmac->phydev) {
714075ad765SThanneeru Srinivasulu cfg |= PCS_MRX_CTL_AN_EN;
715075ad765SThanneeru Srinivasulu } else {
716075ad765SThanneeru Srinivasulu /* In scenarios where PHY driver is not present or it's a
717075ad765SThanneeru Srinivasulu * non-standard PHY, FW sets AN_EN to inform Linux driver
718075ad765SThanneeru Srinivasulu * to do auto-neg and link polling or not.
719075ad765SThanneeru Srinivasulu */
720075ad765SThanneeru Srinivasulu if (cfg & PCS_MRX_CTL_AN_EN)
721075ad765SThanneeru Srinivasulu lmac->autoneg = true;
722075ad765SThanneeru Srinivasulu }
7234863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MRX_CTL, cfg);
7244863dea3SSunil Goutham
7253f8057cfSSunil Goutham if (lmac->lmac_type == BGX_MODE_QSGMII) {
7263f8057cfSSunil Goutham /* Disable disparity check for QSGMII */
7273f8057cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL);
7283f8057cfSSunil Goutham cfg &= ~PCS_MISC_CTL_DISP_EN;
7293f8057cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_PCS_MISCX_CTL, cfg);
7303f8057cfSSunil Goutham return 0;
7313f8057cfSSunil Goutham }
7323f8057cfSSunil Goutham
733075ad765SThanneeru Srinivasulu if ((lmac->lmac_type == BGX_MODE_SGMII) && lmac->phydev) {
7344863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_GMP_PCS_MRX_STATUS,
7354863dea3SSunil Goutham PCS_MRX_STATUS_AN_CPT, false)) {
7364863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX AN_CPT not completed\n");
7374863dea3SSunil Goutham return -1;
7384863dea3SSunil Goutham }
7396465859aSSunil Goutham }
7404863dea3SSunil Goutham
7414863dea3SSunil Goutham return 0;
7424863dea3SSunil Goutham }
7434863dea3SSunil Goutham
bgx_lmac_xaui_init(struct bgx * bgx,struct lmac * lmac)7440bcb7d51SSunil Goutham static int bgx_lmac_xaui_init(struct bgx *bgx, struct lmac *lmac)
7454863dea3SSunil Goutham {
7464863dea3SSunil Goutham u64 cfg;
7470bcb7d51SSunil Goutham int lmacid = lmac->lmacid;
7484863dea3SSunil Goutham
7494863dea3SSunil Goutham /* Reset SPU */
7504863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET);
7514863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) {
7524863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n");
7534863dea3SSunil Goutham return -1;
7544863dea3SSunil Goutham }
7554863dea3SSunil Goutham
7564863dea3SSunil Goutham /* Disable LMAC */
7574863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG);
7584863dea3SSunil Goutham cfg &= ~CMR_EN;
7594863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg);
7604863dea3SSunil Goutham
7614863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER);
7624863dea3SSunil Goutham /* Set interleaved running disparity for RXAUI */
76393db2cf8SSunil Goutham if (lmac->lmac_type == BGX_MODE_RXAUI)
7644863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SPUX_MISC_CONTROL,
76593db2cf8SSunil Goutham SPU_MISC_CTL_INTLV_RDISP);
76693db2cf8SSunil Goutham
76793db2cf8SSunil Goutham /* Clear receive packet disable */
76893db2cf8SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_MISC_CONTROL);
76993db2cf8SSunil Goutham cfg &= ~SPU_MISC_CTL_RX_DIS;
77093db2cf8SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_MISC_CONTROL, cfg);
7714863dea3SSunil Goutham
7724863dea3SSunil Goutham /* clear all interrupts */
7734863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_INT);
7744863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_RX_INT, cfg);
7754863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_INT);
7764863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_INT, cfg);
7774863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT);
7784863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg);
7794863dea3SSunil Goutham
7800bcb7d51SSunil Goutham if (lmac->use_training) {
7814863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LP_CUP, 0x00);
7824863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_CUP, 0x00);
7834863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_LD_REP, 0x00);
7844863dea3SSunil Goutham /* training enable */
7854863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid,
7864863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, SPU_PMD_CRTL_TRAIN_EN);
7874863dea3SSunil Goutham }
7884863dea3SSunil Goutham
7894863dea3SSunil Goutham /* Append FCS to each packet */
7904863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, SMU_TX_APPEND_FCS_D);
7914863dea3SSunil Goutham
7924863dea3SSunil Goutham /* Disable forward error correction */
7934863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_FEC_CONTROL);
7944863dea3SSunil Goutham cfg &= ~SPU_FEC_CTL_FEC_EN;
7954863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_FEC_CONTROL, cfg);
7964863dea3SSunil Goutham
7974863dea3SSunil Goutham /* Disable autoneg */
7984863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_CONTROL);
7994863dea3SSunil Goutham cfg = cfg & ~(SPU_AN_CTL_AN_EN | SPU_AN_CTL_XNP_EN);
8004863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_CONTROL, cfg);
8014863dea3SSunil Goutham
8024863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_AN_ADV);
8030bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_10G_KR)
8044863dea3SSunil Goutham cfg |= (1 << 23);
8050bcb7d51SSunil Goutham else if (lmac->lmac_type == BGX_MODE_40G_KR)
8064863dea3SSunil Goutham cfg |= (1 << 24);
8074863dea3SSunil Goutham else
8084863dea3SSunil Goutham cfg &= ~((1 << 23) | (1 << 24));
8094863dea3SSunil Goutham cfg = cfg & (~((1ULL << 25) | (1ULL << 22) | (1ULL << 12)));
8104863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_AN_ADV, cfg);
8114863dea3SSunil Goutham
8124863dea3SSunil Goutham cfg = bgx_reg_read(bgx, 0, BGX_SPU_DBG_CONTROL);
8134863dea3SSunil Goutham cfg &= ~SPU_DBG_CTL_AN_ARB_LINK_CHK_EN;
8144863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_SPU_DBG_CONTROL, cfg);
8154863dea3SSunil Goutham
8164863dea3SSunil Goutham /* Enable lmac */
8174863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN);
8184863dea3SSunil Goutham
8194863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_CONTROL1);
8204863dea3SSunil Goutham cfg &= ~SPU_CTL_LOW_POWER;
8214863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_CONTROL1, cfg);
8224863dea3SSunil Goutham
8234863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_CTL);
8244863dea3SSunil Goutham cfg &= ~SMU_TX_CTL_UNI_EN;
8254863dea3SSunil Goutham cfg |= SMU_TX_CTL_DIC_EN;
8264863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_CTL, cfg);
8274863dea3SSunil Goutham
828430da208SSunil Goutham /* Enable receive and transmission of pause frames */
829430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_CBFC_CTL, ((0xffffULL << 32) |
830430da208SSunil Goutham BCK_EN | DRP_EN | TX_EN | RX_EN));
831430da208SSunil Goutham /* Configure pause time and interval */
832430da208SSunil Goutham bgx_reg_write(bgx, lmacid,
833430da208SSunil Goutham BGX_SMUX_TX_PAUSE_PKT_TIME, DEFAULT_PAUSE_TIME);
834430da208SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_PAUSE_PKT_INTERVAL);
835430da208SSunil Goutham cfg &= ~0xFFFFull;
836430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_PAUSE_PKT_INTERVAL,
837430da208SSunil Goutham cfg | (DEFAULT_PAUSE_TIME - 0x1000));
838430da208SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_PAUSE_ZERO, 0x01);
839430da208SSunil Goutham
8404863dea3SSunil Goutham /* take lmac_count into account */
8414863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_THRESH, (0x100 - 1));
8424863dea3SSunil Goutham /* max packet size */
8434863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_RX_JABBER, MAX_FRAME_SIZE);
8444863dea3SSunil Goutham
8454863dea3SSunil Goutham return 0;
8464863dea3SSunil Goutham }
8474863dea3SSunil Goutham
bgx_xaui_check_link(struct lmac * lmac)8484863dea3SSunil Goutham static int bgx_xaui_check_link(struct lmac *lmac)
8494863dea3SSunil Goutham {
8504863dea3SSunil Goutham struct bgx *bgx = lmac->bgx;
8514863dea3SSunil Goutham int lmacid = lmac->lmacid;
8520bcb7d51SSunil Goutham int lmac_type = lmac->lmac_type;
8534863dea3SSunil Goutham u64 cfg;
8544863dea3SSunil Goutham
8550bcb7d51SSunil Goutham if (lmac->use_training) {
8564863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT);
8574863dea3SSunil Goutham if (!(cfg & (1ull << 13))) {
8584863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14);
8594863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg);
8604863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL);
8614863dea3SSunil Goutham cfg |= (1ull << 0);
8624863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL, cfg);
8634863dea3SSunil Goutham return -1;
8644863dea3SSunil Goutham }
8654863dea3SSunil Goutham }
8664863dea3SSunil Goutham
8674863dea3SSunil Goutham /* wait for PCS to come out of reset */
8684863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_CONTROL1, SPU_CTL_RESET, true)) {
8694863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX SPU reset not completed\n");
8704863dea3SSunil Goutham return -1;
8714863dea3SSunil Goutham }
8724863dea3SSunil Goutham
8734863dea3SSunil Goutham if ((lmac_type == BGX_MODE_10G_KR) || (lmac_type == BGX_MODE_XFI) ||
8744863dea3SSunil Goutham (lmac_type == BGX_MODE_40G_KR) || (lmac_type == BGX_MODE_XLAUI)) {
8754863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BR_STATUS1,
8764863dea3SSunil Goutham SPU_BR_STATUS_BLK_LOCK, false)) {
8774863dea3SSunil Goutham dev_err(&bgx->pdev->dev,
8784863dea3SSunil Goutham "SPU_BR_STATUS_BLK_LOCK not completed\n");
8794863dea3SSunil Goutham return -1;
8804863dea3SSunil Goutham }
8814863dea3SSunil Goutham } else {
8824863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SPUX_BX_STATUS,
8834863dea3SSunil Goutham SPU_BX_STATUS_RX_ALIGN, false)) {
8844863dea3SSunil Goutham dev_err(&bgx->pdev->dev,
8854863dea3SSunil Goutham "SPU_BX_STATUS_RX_ALIGN not completed\n");
8864863dea3SSunil Goutham return -1;
8874863dea3SSunil Goutham }
8884863dea3SSunil Goutham }
8894863dea3SSunil Goutham
8904863dea3SSunil Goutham /* Clear rcvflt bit (latching high) and read it back */
8913f4c68cfSSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT)
8923f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid,
8933f4c68cfSSunil Goutham BGX_SPUX_STATUS2, SPU_STATUS2_RCVFLT);
8944863dea3SSunil Goutham if (bgx_reg_read(bgx, lmacid, BGX_SPUX_STATUS2) & SPU_STATUS2_RCVFLT) {
8954863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "Receive fault, retry training\n");
8960bcb7d51SSunil Goutham if (lmac->use_training) {
8974863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SPUX_INT);
8984863dea3SSunil Goutham if (!(cfg & (1ull << 13))) {
8994863dea3SSunil Goutham cfg = (1ull << 13) | (1ull << 14);
9004863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SPUX_INT, cfg);
9014863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid,
9024863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL);
9034863dea3SSunil Goutham cfg |= (1ull << 0);
9044863dea3SSunil Goutham bgx_reg_write(bgx, lmacid,
9054863dea3SSunil Goutham BGX_SPUX_BR_PMD_CRTL, cfg);
9064863dea3SSunil Goutham return -1;
9074863dea3SSunil Goutham }
9084863dea3SSunil Goutham }
9094863dea3SSunil Goutham return -1;
9104863dea3SSunil Goutham }
9114863dea3SSunil Goutham
9124863dea3SSunil Goutham /* Wait for BGX RX to be idle */
9134863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_RX_IDLE, false)) {
9144863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU RX not idle\n");
9154863dea3SSunil Goutham return -1;
9164863dea3SSunil Goutham }
9174863dea3SSunil Goutham
9184863dea3SSunil Goutham /* Wait for BGX TX to be idle */
9194863dea3SSunil Goutham if (bgx_poll_reg(bgx, lmacid, BGX_SMUX_CTL, SMU_CTL_TX_IDLE, false)) {
9204863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "SMU TX not idle\n");
9214863dea3SSunil Goutham return -1;
9224863dea3SSunil Goutham }
9234863dea3SSunil Goutham
9243f4c68cfSSunil Goutham /* Check for MAC RX faults */
9253f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_RX_CTL);
9263f4c68cfSSunil Goutham /* 0 - Link is okay, 1 - Local fault, 2 - Remote fault */
9273f4c68cfSSunil Goutham cfg &= SMU_RX_CTL_STATUS;
9283f4c68cfSSunil Goutham if (!cfg)
9294863dea3SSunil Goutham return 0;
9303f4c68cfSSunil Goutham
9313f4c68cfSSunil Goutham /* Rx local/remote fault seen.
9323f4c68cfSSunil Goutham * Do lmac reinit to see if condition recovers
9333f4c68cfSSunil Goutham */
9340bcb7d51SSunil Goutham bgx_lmac_xaui_init(bgx, lmac);
9353f4c68cfSSunil Goutham
9363f4c68cfSSunil Goutham return -1;
9374863dea3SSunil Goutham }
9384863dea3SSunil Goutham
bgx_poll_for_sgmii_link(struct lmac * lmac)939075ad765SThanneeru Srinivasulu static void bgx_poll_for_sgmii_link(struct lmac *lmac)
940075ad765SThanneeru Srinivasulu {
941075ad765SThanneeru Srinivasulu u64 pcs_link, an_result;
942075ad765SThanneeru Srinivasulu u8 speed;
943075ad765SThanneeru Srinivasulu
944075ad765SThanneeru Srinivasulu pcs_link = bgx_reg_read(lmac->bgx, lmac->lmacid,
945075ad765SThanneeru Srinivasulu BGX_GMP_PCS_MRX_STATUS);
946075ad765SThanneeru Srinivasulu
947075ad765SThanneeru Srinivasulu /*Link state bit is sticky, read it again*/
948075ad765SThanneeru Srinivasulu if (!(pcs_link & PCS_MRX_STATUS_LINK))
949075ad765SThanneeru Srinivasulu pcs_link = bgx_reg_read(lmac->bgx, lmac->lmacid,
950075ad765SThanneeru Srinivasulu BGX_GMP_PCS_MRX_STATUS);
951075ad765SThanneeru Srinivasulu
952075ad765SThanneeru Srinivasulu if (bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_GMP_PCS_MRX_STATUS,
953075ad765SThanneeru Srinivasulu PCS_MRX_STATUS_AN_CPT, false)) {
954075ad765SThanneeru Srinivasulu lmac->link_up = false;
955075ad765SThanneeru Srinivasulu lmac->last_speed = SPEED_UNKNOWN;
956075ad765SThanneeru Srinivasulu lmac->last_duplex = DUPLEX_UNKNOWN;
957075ad765SThanneeru Srinivasulu goto next_poll;
958075ad765SThanneeru Srinivasulu }
959075ad765SThanneeru Srinivasulu
960075ad765SThanneeru Srinivasulu lmac->link_up = ((pcs_link & PCS_MRX_STATUS_LINK) != 0) ? true : false;
961075ad765SThanneeru Srinivasulu an_result = bgx_reg_read(lmac->bgx, lmac->lmacid,
962075ad765SThanneeru Srinivasulu BGX_GMP_PCS_ANX_AN_RESULTS);
963075ad765SThanneeru Srinivasulu
964075ad765SThanneeru Srinivasulu speed = (an_result >> 3) & 0x3;
965075ad765SThanneeru Srinivasulu lmac->last_duplex = (an_result >> 1) & 0x1;
966075ad765SThanneeru Srinivasulu switch (speed) {
967075ad765SThanneeru Srinivasulu case 0:
9687f301cffSMichael Zhivich lmac->last_speed = SPEED_10;
969075ad765SThanneeru Srinivasulu break;
970075ad765SThanneeru Srinivasulu case 1:
9717f301cffSMichael Zhivich lmac->last_speed = SPEED_100;
972075ad765SThanneeru Srinivasulu break;
973075ad765SThanneeru Srinivasulu case 2:
9747f301cffSMichael Zhivich lmac->last_speed = SPEED_1000;
975075ad765SThanneeru Srinivasulu break;
976075ad765SThanneeru Srinivasulu default:
977075ad765SThanneeru Srinivasulu lmac->link_up = false;
978075ad765SThanneeru Srinivasulu lmac->last_speed = SPEED_UNKNOWN;
979075ad765SThanneeru Srinivasulu lmac->last_duplex = DUPLEX_UNKNOWN;
980075ad765SThanneeru Srinivasulu break;
981075ad765SThanneeru Srinivasulu }
982075ad765SThanneeru Srinivasulu
983075ad765SThanneeru Srinivasulu next_poll:
984075ad765SThanneeru Srinivasulu
985075ad765SThanneeru Srinivasulu if (lmac->last_link != lmac->link_up) {
986075ad765SThanneeru Srinivasulu if (lmac->link_up)
987075ad765SThanneeru Srinivasulu bgx_sgmii_change_link_state(lmac);
988075ad765SThanneeru Srinivasulu lmac->last_link = lmac->link_up;
989075ad765SThanneeru Srinivasulu }
990075ad765SThanneeru Srinivasulu
991075ad765SThanneeru Srinivasulu queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 3);
992075ad765SThanneeru Srinivasulu }
993075ad765SThanneeru Srinivasulu
bgx_poll_for_link(struct work_struct * work)9944863dea3SSunil Goutham static void bgx_poll_for_link(struct work_struct *work)
9954863dea3SSunil Goutham {
9964863dea3SSunil Goutham struct lmac *lmac;
9973f4c68cfSSunil Goutham u64 spu_link, smu_link;
9984863dea3SSunil Goutham
9994863dea3SSunil Goutham lmac = container_of(work, struct lmac, dwork.work);
1000075ad765SThanneeru Srinivasulu if (lmac->is_sgmii) {
1001075ad765SThanneeru Srinivasulu bgx_poll_for_sgmii_link(lmac);
1002075ad765SThanneeru Srinivasulu return;
1003075ad765SThanneeru Srinivasulu }
10044863dea3SSunil Goutham
10054863dea3SSunil Goutham /* Receive link is latching low. Force it high and verify it */
10064863dea3SSunil Goutham bgx_reg_modify(lmac->bgx, lmac->lmacid,
10074863dea3SSunil Goutham BGX_SPUX_STATUS1, SPU_STATUS1_RCV_LNK);
10084863dea3SSunil Goutham bgx_poll_reg(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1,
10094863dea3SSunil Goutham SPU_STATUS1_RCV_LNK, false);
10104863dea3SSunil Goutham
10113f4c68cfSSunil Goutham spu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SPUX_STATUS1);
10123f4c68cfSSunil Goutham smu_link = bgx_reg_read(lmac->bgx, lmac->lmacid, BGX_SMUX_RX_CTL);
10133f4c68cfSSunil Goutham
10143f4c68cfSSunil Goutham if ((spu_link & SPU_STATUS1_RCV_LNK) &&
10153f4c68cfSSunil Goutham !(smu_link & SMU_RX_CTL_STATUS)) {
1016cb5ff33fSSaurav Girepunje lmac->link_up = true;
10170bcb7d51SSunil Goutham if (lmac->lmac_type == BGX_MODE_XLAUI)
10187f301cffSMichael Zhivich lmac->last_speed = SPEED_40000;
10194863dea3SSunil Goutham else
10207f301cffSMichael Zhivich lmac->last_speed = SPEED_10000;
10217f301cffSMichael Zhivich lmac->last_duplex = DUPLEX_FULL;
10224863dea3SSunil Goutham } else {
1023cb5ff33fSSaurav Girepunje lmac->link_up = false;
10240b72a9a1SSunil Goutham lmac->last_speed = SPEED_UNKNOWN;
10250b72a9a1SSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN;
10264863dea3SSunil Goutham }
10274863dea3SSunil Goutham
10284863dea3SSunil Goutham if (lmac->last_link != lmac->link_up) {
10293f4c68cfSSunil Goutham if (lmac->link_up) {
10303f4c68cfSSunil Goutham if (bgx_xaui_check_link(lmac)) {
10313f4c68cfSSunil Goutham /* Errors, clear link_up state */
1032cb5ff33fSSaurav Girepunje lmac->link_up = false;
10333f4c68cfSSunil Goutham lmac->last_speed = SPEED_UNKNOWN;
10343f4c68cfSSunil Goutham lmac->last_duplex = DUPLEX_UNKNOWN;
10353f4c68cfSSunil Goutham }
10363f4c68cfSSunil Goutham }
10374863dea3SSunil Goutham lmac->last_link = lmac->link_up;
10384863dea3SSunil Goutham }
10394863dea3SSunil Goutham
10404863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2);
10414863dea3SSunil Goutham }
10424863dea3SSunil Goutham
phy_interface_mode(u8 lmac_type)10433f8057cfSSunil Goutham static int phy_interface_mode(u8 lmac_type)
10443f8057cfSSunil Goutham {
10453f8057cfSSunil Goutham if (lmac_type == BGX_MODE_QSGMII)
10463f8057cfSSunil Goutham return PHY_INTERFACE_MODE_QSGMII;
10476465859aSSunil Goutham if (lmac_type == BGX_MODE_RGMII)
104829ca3b31STim Harvey return PHY_INTERFACE_MODE_RGMII_RXID;
10493f8057cfSSunil Goutham
10503f8057cfSSunil Goutham return PHY_INTERFACE_MODE_SGMII;
10513f8057cfSSunil Goutham }
10523f8057cfSSunil Goutham
bgx_lmac_enable(struct bgx * bgx,u8 lmacid)10534863dea3SSunil Goutham static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
10544863dea3SSunil Goutham {
10554863dea3SSunil Goutham struct lmac *lmac;
10564863dea3SSunil Goutham u64 cfg;
10574863dea3SSunil Goutham
10584863dea3SSunil Goutham lmac = &bgx->lmac[lmacid];
10594863dea3SSunil Goutham lmac->bgx = bgx;
10604863dea3SSunil Goutham
10613f8057cfSSunil Goutham if ((lmac->lmac_type == BGX_MODE_SGMII) ||
10626465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_QSGMII) ||
10636465859aSSunil Goutham (lmac->lmac_type == BGX_MODE_RGMII)) {
1064cb5ff33fSSaurav Girepunje lmac->is_sgmii = true;
10653f8057cfSSunil Goutham if (bgx_lmac_sgmii_init(bgx, lmac))
10664863dea3SSunil Goutham return -1;
10674863dea3SSunil Goutham } else {
1068cb5ff33fSSaurav Girepunje lmac->is_sgmii = false;
10690bcb7d51SSunil Goutham if (bgx_lmac_xaui_init(bgx, lmac))
10704863dea3SSunil Goutham return -1;
10714863dea3SSunil Goutham }
10724863dea3SSunil Goutham
10734863dea3SSunil Goutham if (lmac->is_sgmii) {
10744863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND);
10754863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */
10764863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_GMP_GMI_TXX_APPEND, cfg);
10774863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_GMP_GMI_TXX_MIN_PKT, 60 - 1);
10784863dea3SSunil Goutham } else {
10794863dea3SSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_SMUX_TX_APPEND);
10804863dea3SSunil Goutham cfg |= ((1ull << 2) | (1ull << 1)); /* FCS and PAD */
10814863dea3SSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_SMUX_TX_APPEND, cfg);
10824863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4);
10834863dea3SSunil Goutham }
10844863dea3SSunil Goutham
10853a34ecfdSVadim Lomovtsev /* actual number of filters available to exact LMAC */
10863a34ecfdSVadim Lomovtsev lmac->dmacs_count = (RX_DMAC_COUNT / bgx->lmac_count);
10873a34ecfdSVadim Lomovtsev lmac->dmacs = kcalloc(lmac->dmacs_count, sizeof(*lmac->dmacs),
10883a34ecfdSVadim Lomovtsev GFP_KERNEL);
1089a94cead7SColin Ian King if (!lmac->dmacs)
1090a94cead7SColin Ian King return -ENOMEM;
10913a34ecfdSVadim Lomovtsev
10924863dea3SSunil Goutham /* Enable lmac */
1093bc69fdfcSSunil Goutham bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN);
10944863dea3SSunil Goutham
10954863dea3SSunil Goutham /* Restore default cfg, incase low level firmware changed it */
10964863dea3SSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, 0x03);
10974863dea3SSunil Goutham
10980bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) &&
10990bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) &&
11000bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) &&
11010bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR)) {
1102075ad765SThanneeru Srinivasulu if (!lmac->phydev) {
1103075ad765SThanneeru Srinivasulu if (lmac->autoneg) {
1104075ad765SThanneeru Srinivasulu bgx_reg_write(bgx, lmacid,
1105075ad765SThanneeru Srinivasulu BGX_GMP_PCS_LINKX_TIMER,
1106075ad765SThanneeru Srinivasulu PCS_LINKX_TIMER_COUNT);
1107075ad765SThanneeru Srinivasulu goto poll;
1108075ad765SThanneeru Srinivasulu } else {
1109075ad765SThanneeru Srinivasulu /* Default to below link speed and duplex */
1110075ad765SThanneeru Srinivasulu lmac->link_up = true;
11117f301cffSMichael Zhivich lmac->last_speed = SPEED_1000;
11127f301cffSMichael Zhivich lmac->last_duplex = DUPLEX_FULL;
1113075ad765SThanneeru Srinivasulu bgx_sgmii_change_link_state(lmac);
1114075ad765SThanneeru Srinivasulu return 0;
1115075ad765SThanneeru Srinivasulu }
1116075ad765SThanneeru Srinivasulu }
11174863dea3SSunil Goutham lmac->phydev->dev_flags = 0;
11184863dea3SSunil Goutham
11194863dea3SSunil Goutham if (phy_connect_direct(&lmac->netdev, lmac->phydev,
11204863dea3SSunil Goutham bgx_lmac_handler,
11213f8057cfSSunil Goutham phy_interface_mode(lmac->lmac_type)))
11224863dea3SSunil Goutham return -ENODEV;
11234863dea3SSunil Goutham
1124a350d2e7SMian Yousaf Kaukab phy_start(lmac->phydev);
1125075ad765SThanneeru Srinivasulu return 0;
1126075ad765SThanneeru Srinivasulu }
1127075ad765SThanneeru Srinivasulu
1128075ad765SThanneeru Srinivasulu poll:
1129*25c8c0d9STejun Heo lmac->check_link = alloc_ordered_workqueue("check_link", WQ_MEM_RECLAIM);
11304863dea3SSunil Goutham if (!lmac->check_link)
11314863dea3SSunil Goutham return -ENOMEM;
11324863dea3SSunil Goutham INIT_DELAYED_WORK(&lmac->dwork, bgx_poll_for_link);
11334863dea3SSunil Goutham queue_delayed_work(lmac->check_link, &lmac->dwork, 0);
11344863dea3SSunil Goutham
11354863dea3SSunil Goutham return 0;
11364863dea3SSunil Goutham }
11374863dea3SSunil Goutham
bgx_lmac_disable(struct bgx * bgx,u8 lmacid)1138fd7ec062SAleksey Makarov static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid)
11394863dea3SSunil Goutham {
11404863dea3SSunil Goutham struct lmac *lmac;
11413f4c68cfSSunil Goutham u64 cfg;
11424863dea3SSunil Goutham
11434863dea3SSunil Goutham lmac = &bgx->lmac[lmacid];
11444863dea3SSunil Goutham if (lmac->check_link) {
11454863dea3SSunil Goutham /* Destroy work queue */
1146a7b1f535SThanneeru Srinivasulu cancel_delayed_work_sync(&lmac->dwork);
11474863dea3SSunil Goutham destroy_workqueue(lmac->check_link);
11484863dea3SSunil Goutham }
11494863dea3SSunil Goutham
11503f4c68cfSSunil Goutham /* Disable packet reception */
11513f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG);
11523f4c68cfSSunil Goutham cfg &= ~CMR_PKT_RX_EN;
11533f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg);
11543f4c68cfSSunil Goutham
11553f4c68cfSSunil Goutham /* Give chance for Rx/Tx FIFO to get drained */
11563f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_RX_FIFO_LEN, (u64)0x1FFF, true);
11573f4c68cfSSunil Goutham bgx_poll_reg(bgx, lmacid, BGX_CMRX_TX_FIFO_LEN, (u64)0x3FFF, true);
11583f4c68cfSSunil Goutham
11593f4c68cfSSunil Goutham /* Disable packet transmission */
11603f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG);
11613f4c68cfSSunil Goutham cfg &= ~CMR_PKT_TX_EN;
11623f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg);
11633f4c68cfSSunil Goutham
11643f4c68cfSSunil Goutham /* Disable serdes lanes */
11653f4c68cfSSunil Goutham if (!lmac->is_sgmii)
11663f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid,
11673f4c68cfSSunil Goutham BGX_SPUX_CONTROL1, SPU_CTL_LOW_POWER);
11683f4c68cfSSunil Goutham else
11693f4c68cfSSunil Goutham bgx_reg_modify(bgx, lmacid,
11703f4c68cfSSunil Goutham BGX_GMP_PCS_MRX_CTL, PCS_MRX_CTL_PWR_DN);
11713f4c68cfSSunil Goutham
11723f4c68cfSSunil Goutham /* Disable LMAC */
11733f4c68cfSSunil Goutham cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_CFG);
11743f4c68cfSSunil Goutham cfg &= ~CMR_EN;
11753f4c68cfSSunil Goutham bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg);
11763f4c68cfSSunil Goutham
11773a34ecfdSVadim Lomovtsev bgx_flush_dmac_cam_filter(bgx, lmacid);
11783a34ecfdSVadim Lomovtsev kfree(lmac->dmacs);
11794863dea3SSunil Goutham
11800bcb7d51SSunil Goutham if ((lmac->lmac_type != BGX_MODE_XFI) &&
11810bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_XLAUI) &&
11820bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR) &&
11830bcb7d51SSunil Goutham (lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev)
11844863dea3SSunil Goutham phy_disconnect(lmac->phydev);
11854863dea3SSunil Goutham
11864863dea3SSunil Goutham lmac->phydev = NULL;
11874863dea3SSunil Goutham }
11884863dea3SSunil Goutham
bgx_init_hw(struct bgx * bgx)11894863dea3SSunil Goutham static void bgx_init_hw(struct bgx *bgx)
11904863dea3SSunil Goutham {
11914863dea3SSunil Goutham int i;
11920bcb7d51SSunil Goutham struct lmac *lmac;
11934863dea3SSunil Goutham
11944863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_GLOBAL_CFG, CMR_GLOBAL_CFG_FCS_STRIP);
11954863dea3SSunil Goutham if (bgx_reg_read(bgx, 0, BGX_CMR_BIST_STATUS))
11964863dea3SSunil Goutham dev_err(&bgx->pdev->dev, "BGX%d BIST failed\n", bgx->bgx_id);
11974863dea3SSunil Goutham
11984863dea3SSunil Goutham /* Set lmac type and lane2serdes mapping */
11994863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++) {
12000bcb7d51SSunil Goutham lmac = &bgx->lmac[i];
12014863dea3SSunil Goutham bgx_reg_write(bgx, i, BGX_CMRX_CFG,
12020bcb7d51SSunil Goutham (lmac->lmac_type << 8) | lmac->lane_to_sds);
12034863dea3SSunil Goutham bgx->lmac[i].lmacid_bd = lmac_count;
12044863dea3SSunil Goutham lmac_count++;
12054863dea3SSunil Goutham }
12064863dea3SSunil Goutham
12074863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_TX_LMACS, bgx->lmac_count);
12084863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_LMACS, bgx->lmac_count);
12094863dea3SSunil Goutham
12104863dea3SSunil Goutham /* Set the backpressure AND mask */
12114863dea3SSunil Goutham for (i = 0; i < bgx->lmac_count; i++)
12124863dea3SSunil Goutham bgx_reg_modify(bgx, 0, BGX_CMR_CHAN_MSK_AND,
12134863dea3SSunil Goutham ((1ULL << MAX_BGX_CHANS_PER_LMAC) - 1) <<
12144863dea3SSunil Goutham (i * MAX_BGX_CHANS_PER_LMAC));
12154863dea3SSunil Goutham
12164863dea3SSunil Goutham /* Disable all MAC filtering */
12174863dea3SSunil Goutham for (i = 0; i < RX_DMAC_COUNT; i++)
12184863dea3SSunil Goutham bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + (i * 8), 0x00);
12194863dea3SSunil Goutham
12204863dea3SSunil Goutham /* Disable MAC steering (NCSI traffic) */
12214863dea3SSunil Goutham for (i = 0; i < RX_TRAFFIC_STEER_RULE_COUNT; i++)
1222f6d25acaSVadim Lomovtsev bgx_reg_write(bgx, 0, BGX_CMR_RX_STEERING + (i * 8), 0x00);
12234863dea3SSunil Goutham }
12244863dea3SSunil Goutham
bgx_get_lane2sds_cfg(struct bgx * bgx,struct lmac * lmac)12253f8057cfSSunil Goutham static u8 bgx_get_lane2sds_cfg(struct bgx *bgx, struct lmac *lmac)
12263f8057cfSSunil Goutham {
12273f8057cfSSunil Goutham return (u8)(bgx_reg_read(bgx, lmac->lmacid, BGX_CMRX_CFG) & 0xFF);
12283f8057cfSSunil Goutham }
12293f8057cfSSunil Goutham
bgx_print_qlm_mode(struct bgx * bgx,u8 lmacid)12300bcb7d51SSunil Goutham static void bgx_print_qlm_mode(struct bgx *bgx, u8 lmacid)
12314863dea3SSunil Goutham {
12324863dea3SSunil Goutham struct device *dev = &bgx->pdev->dev;
12330bcb7d51SSunil Goutham struct lmac *lmac;
1234c41626ceSArnd Bergmann char str[27];
123557aaf63cSSunil Goutham
1236fff37fdaSSunil Goutham if (!bgx->is_dlm && lmacid)
123757aaf63cSSunil Goutham return;
12380bcb7d51SSunil Goutham
12390bcb7d51SSunil Goutham lmac = &bgx->lmac[lmacid];
124009de3917SSunil Goutham if (!bgx->is_dlm)
12410bcb7d51SSunil Goutham sprintf(str, "BGX%d QLM mode", bgx->bgx_id);
124257aaf63cSSunil Goutham else
1243fff37fdaSSunil Goutham sprintf(str, "BGX%d LMAC%d mode", bgx->bgx_id, lmacid);
12440bcb7d51SSunil Goutham
12450bcb7d51SSunil Goutham switch (lmac->lmac_type) {
12460bcb7d51SSunil Goutham case BGX_MODE_SGMII:
12470bcb7d51SSunil Goutham dev_info(dev, "%s: SGMII\n", (char *)str);
12480bcb7d51SSunil Goutham break;
12490bcb7d51SSunil Goutham case BGX_MODE_XAUI:
12500bcb7d51SSunil Goutham dev_info(dev, "%s: XAUI\n", (char *)str);
12510bcb7d51SSunil Goutham break;
12520bcb7d51SSunil Goutham case BGX_MODE_RXAUI:
12530bcb7d51SSunil Goutham dev_info(dev, "%s: RXAUI\n", (char *)str);
12540bcb7d51SSunil Goutham break;
12550bcb7d51SSunil Goutham case BGX_MODE_XFI:
12560bcb7d51SSunil Goutham if (!lmac->use_training)
12570bcb7d51SSunil Goutham dev_info(dev, "%s: XFI\n", (char *)str);
12580bcb7d51SSunil Goutham else
12590bcb7d51SSunil Goutham dev_info(dev, "%s: 10G_KR\n", (char *)str);
12600bcb7d51SSunil Goutham break;
12610bcb7d51SSunil Goutham case BGX_MODE_XLAUI:
12620bcb7d51SSunil Goutham if (!lmac->use_training)
12630bcb7d51SSunil Goutham dev_info(dev, "%s: XLAUI\n", (char *)str);
12640bcb7d51SSunil Goutham else
12650bcb7d51SSunil Goutham dev_info(dev, "%s: 40G_KR4\n", (char *)str);
12660bcb7d51SSunil Goutham break;
12673f8057cfSSunil Goutham case BGX_MODE_QSGMII:
12683f8057cfSSunil Goutham dev_info(dev, "%s: QSGMII\n", (char *)str);
12693f8057cfSSunil Goutham break;
12706465859aSSunil Goutham case BGX_MODE_RGMII:
12716465859aSSunil Goutham dev_info(dev, "%s: RGMII\n", (char *)str);
12726465859aSSunil Goutham break;
12733f8057cfSSunil Goutham case BGX_MODE_INVALID:
12743f8057cfSSunil Goutham /* Nothing to do */
12753f8057cfSSunil Goutham break;
12760bcb7d51SSunil Goutham }
12770bcb7d51SSunil Goutham }
12780bcb7d51SSunil Goutham
lmac_set_lane2sds(struct bgx * bgx,struct lmac * lmac)12793f8057cfSSunil Goutham static void lmac_set_lane2sds(struct bgx *bgx, struct lmac *lmac)
12800bcb7d51SSunil Goutham {
12810bcb7d51SSunil Goutham switch (lmac->lmac_type) {
12820bcb7d51SSunil Goutham case BGX_MODE_SGMII:
12830bcb7d51SSunil Goutham case BGX_MODE_XFI:
12840bcb7d51SSunil Goutham lmac->lane_to_sds = lmac->lmacid;
12850bcb7d51SSunil Goutham break;
12860bcb7d51SSunil Goutham case BGX_MODE_XAUI:
12870bcb7d51SSunil Goutham case BGX_MODE_XLAUI:
12886465859aSSunil Goutham case BGX_MODE_RGMII:
12890bcb7d51SSunil Goutham lmac->lane_to_sds = 0xE4;
12900bcb7d51SSunil Goutham break;
12910bcb7d51SSunil Goutham case BGX_MODE_RXAUI:
12920bcb7d51SSunil Goutham lmac->lane_to_sds = (lmac->lmacid) ? 0xE : 0x4;
12930bcb7d51SSunil Goutham break;
12943f8057cfSSunil Goutham case BGX_MODE_QSGMII:
12953f8057cfSSunil Goutham /* There is no way to determine if DLM0/2 is QSGMII or
12963f8057cfSSunil Goutham * DLM1/3 is configured to QSGMII as bootloader will
12973f8057cfSSunil Goutham * configure all LMACs, so take whatever is configured
12983f8057cfSSunil Goutham * by low level firmware.
12993f8057cfSSunil Goutham */
13003f8057cfSSunil Goutham lmac->lane_to_sds = bgx_get_lane2sds_cfg(bgx, lmac);
13013f8057cfSSunil Goutham break;
13020bcb7d51SSunil Goutham default:
13030bcb7d51SSunil Goutham lmac->lane_to_sds = 0;
13040bcb7d51SSunil Goutham break;
13050bcb7d51SSunil Goutham }
13060bcb7d51SSunil Goutham }
13070bcb7d51SSunil Goutham
lmac_set_training(struct bgx * bgx,struct lmac * lmac,int lmacid)13086465859aSSunil Goutham static void lmac_set_training(struct bgx *bgx, struct lmac *lmac, int lmacid)
13096465859aSSunil Goutham {
13106465859aSSunil Goutham if ((lmac->lmac_type != BGX_MODE_10G_KR) &&
13116465859aSSunil Goutham (lmac->lmac_type != BGX_MODE_40G_KR)) {
1312cb5ff33fSSaurav Girepunje lmac->use_training = false;
13136465859aSSunil Goutham return;
13146465859aSSunil Goutham }
13156465859aSSunil Goutham
13166465859aSSunil Goutham lmac->use_training = bgx_reg_read(bgx, lmacid, BGX_SPUX_BR_PMD_CRTL) &
13176465859aSSunil Goutham SPU_PMD_CRTL_TRAIN_EN;
13186465859aSSunil Goutham }
13196465859aSSunil Goutham
bgx_set_lmac_config(struct bgx * bgx,u8 idx)13200bcb7d51SSunil Goutham static void bgx_set_lmac_config(struct bgx *bgx, u8 idx)
13210bcb7d51SSunil Goutham {
13220bcb7d51SSunil Goutham struct lmac *lmac;
13230bcb7d51SSunil Goutham u64 cmr_cfg;
132457aaf63cSSunil Goutham u8 lmac_type;
132557aaf63cSSunil Goutham u8 lane_to_sds;
13260bcb7d51SSunil Goutham
13270bcb7d51SSunil Goutham lmac = &bgx->lmac[idx];
13284863dea3SSunil Goutham
132909de3917SSunil Goutham if (!bgx->is_dlm || bgx->is_rgx) {
13304863dea3SSunil Goutham /* Read LMAC0 type to figure out QLM mode
13314863dea3SSunil Goutham * This is configured by low level firmware
13324863dea3SSunil Goutham */
13330bcb7d51SSunil Goutham cmr_cfg = bgx_reg_read(bgx, 0, BGX_CMRX_CFG);
13340bcb7d51SSunil Goutham lmac->lmac_type = (cmr_cfg >> 8) & 0x07;
13356465859aSSunil Goutham if (bgx->is_rgx)
13366465859aSSunil Goutham lmac->lmac_type = BGX_MODE_RGMII;
13376465859aSSunil Goutham lmac_set_training(bgx, lmac, 0);
13383f8057cfSSunil Goutham lmac_set_lane2sds(bgx, lmac);
133957aaf63cSSunil Goutham return;
134057aaf63cSSunil Goutham }
134157aaf63cSSunil Goutham
1342fff37fdaSSunil Goutham /* For DLMs or SLMs on 80/81/83xx so many lane configurations
1343fff37fdaSSunil Goutham * are possible and vary across boards. Also Kernel doesn't have
1344fff37fdaSSunil Goutham * any way to identify board type/info and since firmware does,
1345fff37fdaSSunil Goutham * just take lmac type and serdes lane config as is.
134657aaf63cSSunil Goutham */
134757aaf63cSSunil Goutham cmr_cfg = bgx_reg_read(bgx, idx, BGX_CMRX_CFG);
134857aaf63cSSunil Goutham lmac_type = (u8)((cmr_cfg >> 8) & 0x07);
134957aaf63cSSunil Goutham lane_to_sds = (u8)(cmr_cfg & 0xFF);
1350fff37fdaSSunil Goutham /* Check if config is reset value */
135157aaf63cSSunil Goutham if ((lmac_type == 0) && (lane_to_sds == 0xE4))
135257aaf63cSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID;
135357aaf63cSSunil Goutham else
135457aaf63cSSunil Goutham lmac->lmac_type = lmac_type;
1355fff37fdaSSunil Goutham lmac->lane_to_sds = lane_to_sds;
13566465859aSSunil Goutham lmac_set_training(bgx, lmac, lmac->lmacid);
13570bcb7d51SSunil Goutham }
13584863dea3SSunil Goutham
bgx_get_qlm_mode(struct bgx * bgx)13590bcb7d51SSunil Goutham static void bgx_get_qlm_mode(struct bgx *bgx)
13600bcb7d51SSunil Goutham {
136157aaf63cSSunil Goutham struct lmac *lmac;
13620bcb7d51SSunil Goutham u8 idx;
13630bcb7d51SSunil Goutham
136457aaf63cSSunil Goutham /* Init all LMAC's type to invalid */
13656465859aSSunil Goutham for (idx = 0; idx < bgx->max_lmac; idx++) {
136657aaf63cSSunil Goutham lmac = &bgx->lmac[idx];
136757aaf63cSSunil Goutham lmac->lmacid = idx;
13686465859aSSunil Goutham lmac->lmac_type = BGX_MODE_INVALID;
13696465859aSSunil Goutham lmac->use_training = false;
137057aaf63cSSunil Goutham }
137157aaf63cSSunil Goutham
13720bcb7d51SSunil Goutham /* It is assumed that low level firmware sets this value */
13730bcb7d51SSunil Goutham bgx->lmac_count = bgx_reg_read(bgx, 0, BGX_CMR_RX_LMACS) & 0x7;
13746465859aSSunil Goutham if (bgx->lmac_count > bgx->max_lmac)
13756465859aSSunil Goutham bgx->lmac_count = bgx->max_lmac;
13760bcb7d51SSunil Goutham
137757aaf63cSSunil Goutham for (idx = 0; idx < bgx->lmac_count; idx++) {
1378fff37fdaSSunil Goutham bgx_set_lmac_config(bgx, idx);
1379fff37fdaSSunil Goutham bgx_print_qlm_mode(bgx, idx);
138057aaf63cSSunil Goutham }
13814863dea3SSunil Goutham }
13824863dea3SSunil Goutham
138346b903a0SDavid Daney #ifdef CONFIG_ACPI
138446b903a0SDavid Daney
acpi_get_mac_address(struct device * dev,struct acpi_device * adev,u8 * dst)13851d82efacSRobert Richter static int acpi_get_mac_address(struct device *dev, struct acpi_device *adev,
13861d82efacSRobert Richter u8 *dst)
138746b903a0SDavid Daney {
138846b903a0SDavid Daney u8 mac[ETH_ALEN];
13898017c4d8SJakub Kicinski int ret;
139046b903a0SDavid Daney
13910a14501eSJakub Kicinski ret = fwnode_get_mac_address(acpi_fwnode_handle(adev), mac);
13928017c4d8SJakub Kicinski if (ret) {
13931d82efacSRobert Richter dev_err(dev, "MAC address invalid: %pM\n", mac);
1394d86afb89SAndy Shevchenko return -EINVAL;
139546b903a0SDavid Daney }
139646b903a0SDavid Daney
13971d82efacSRobert Richter dev_info(dev, "MAC address set to: %pM\n", mac);
13981d82efacSRobert Richter
1399d86afb89SAndy Shevchenko ether_addr_copy(dst, mac);
1400d86afb89SAndy Shevchenko return 0;
140146b903a0SDavid Daney }
140246b903a0SDavid Daney
140346b903a0SDavid Daney /* Currently only sets the MAC address. */
bgx_acpi_register_phy(acpi_handle handle,u32 lvl,void * context,void ** rv)140446b903a0SDavid Daney static acpi_status bgx_acpi_register_phy(acpi_handle handle,
140546b903a0SDavid Daney u32 lvl, void *context, void **rv)
140646b903a0SDavid Daney {
140746b903a0SDavid Daney struct bgx *bgx = context;
14081d82efacSRobert Richter struct device *dev = &bgx->pdev->dev;
140946b903a0SDavid Daney struct acpi_device *adev;
141046b903a0SDavid Daney
141152dae93fSRafael J. Wysocki adev = acpi_fetch_acpi_dev(handle);
141252dae93fSRafael J. Wysocki if (!adev)
141346b903a0SDavid Daney goto out;
141446b903a0SDavid Daney
14157aa48655SVadim Lomovtsev acpi_get_mac_address(dev, adev, bgx->lmac[bgx->acpi_lmac_idx].mac);
141646b903a0SDavid Daney
14177aa48655SVadim Lomovtsev SET_NETDEV_DEV(&bgx->lmac[bgx->acpi_lmac_idx].netdev, dev);
141846b903a0SDavid Daney
14197aa48655SVadim Lomovtsev bgx->lmac[bgx->acpi_lmac_idx].lmacid = bgx->acpi_lmac_idx;
14207aa48655SVadim Lomovtsev bgx->acpi_lmac_idx++; /* move to next LMAC */
142146b903a0SDavid Daney out:
142246b903a0SDavid Daney return AE_OK;
142346b903a0SDavid Daney }
142446b903a0SDavid Daney
bgx_acpi_match_id(acpi_handle handle,u32 lvl,void * context,void ** ret_val)142546b903a0SDavid Daney static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl,
142646b903a0SDavid Daney void *context, void **ret_val)
142746b903a0SDavid Daney {
142846b903a0SDavid Daney struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL };
142946b903a0SDavid Daney struct bgx *bgx = context;
143046b903a0SDavid Daney char bgx_sel[5];
143146b903a0SDavid Daney
143246b903a0SDavid Daney snprintf(bgx_sel, 5, "BGX%d", bgx->bgx_id);
143346b903a0SDavid Daney if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &string))) {
143446b903a0SDavid Daney pr_warn("Invalid link device\n");
143546b903a0SDavid Daney return AE_OK;
143646b903a0SDavid Daney }
143746b903a0SDavid Daney
1438661e5ebbSYu Liao if (strncmp(string.pointer, bgx_sel, 4)) {
1439661e5ebbSYu Liao kfree(string.pointer);
144046b903a0SDavid Daney return AE_OK;
1441661e5ebbSYu Liao }
144246b903a0SDavid Daney
144346b903a0SDavid Daney acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
144446b903a0SDavid Daney bgx_acpi_register_phy, NULL, bgx, NULL);
144546b903a0SDavid Daney
144646b903a0SDavid Daney kfree(string.pointer);
144746b903a0SDavid Daney return AE_CTRL_TERMINATE;
144846b903a0SDavid Daney }
144946b903a0SDavid Daney
bgx_init_acpi_phy(struct bgx * bgx)145046b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx)
145146b903a0SDavid Daney {
145246b903a0SDavid Daney acpi_get_devices(NULL, bgx_acpi_match_id, bgx, (void **)NULL);
145346b903a0SDavid Daney return 0;
145446b903a0SDavid Daney }
145546b903a0SDavid Daney
145646b903a0SDavid Daney #else
145746b903a0SDavid Daney
bgx_init_acpi_phy(struct bgx * bgx)145846b903a0SDavid Daney static int bgx_init_acpi_phy(struct bgx *bgx)
145946b903a0SDavid Daney {
146046b903a0SDavid Daney return -ENODEV;
146146b903a0SDavid Daney }
146246b903a0SDavid Daney
146346b903a0SDavid Daney #endif /* CONFIG_ACPI */
146446b903a0SDavid Daney
1465de387e11SRobert Richter #if IS_ENABLED(CONFIG_OF_MDIO)
1466de387e11SRobert Richter
bgx_init_of_phy(struct bgx * bgx)1467de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx)
14684863dea3SSunil Goutham {
1469eee326fdSDavid Daney struct fwnode_handle *fwn;
1470b7d3e3d3SDavid Daney struct device_node *node = NULL;
14714863dea3SSunil Goutham u8 lmac = 0;
14724863dea3SSunil Goutham
1473eee326fdSDavid Daney device_for_each_child_node(&bgx->pdev->dev, fwn) {
14745fc7cf17SDavid Daney struct phy_device *pd;
1475eee326fdSDavid Daney struct device_node *phy_np;
1476de387e11SRobert Richter
14775fc7cf17SDavid Daney /* Should always be an OF node. But if it is not, we
14785fc7cf17SDavid Daney * cannot handle it, so exit the loop.
1479eee326fdSDavid Daney */
1480b7d3e3d3SDavid Daney node = to_of_node(fwn);
1481eee326fdSDavid Daney if (!node)
1482eee326fdSDavid Daney break;
1483eee326fdSDavid Daney
148483216e39SMichael Walle of_get_mac_address(node, bgx->lmac[lmac].mac);
14854863dea3SSunil Goutham
14864863dea3SSunil Goutham SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev);
14874863dea3SSunil Goutham bgx->lmac[lmac].lmacid = lmac;
14885fc7cf17SDavid Daney
14895fc7cf17SDavid Daney phy_np = of_parse_phandle(node, "phy-handle", 0);
14905fc7cf17SDavid Daney /* If there is no phy or defective firmware presents
14915fc7cf17SDavid Daney * this cortina phy, for which there is no driver
14925fc7cf17SDavid Daney * support, ignore it.
14935fc7cf17SDavid Daney */
14945fc7cf17SDavid Daney if (phy_np &&
14955fc7cf17SDavid Daney !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) {
14965fc7cf17SDavid Daney /* Wait until the phy drivers are available */
14975fc7cf17SDavid Daney pd = of_phy_find_device(phy_np);
14985fc7cf17SDavid Daney if (!pd)
1499b7d3e3d3SDavid Daney goto defer;
15005fc7cf17SDavid Daney bgx->lmac[lmac].phydev = pd;
15015fc7cf17SDavid Daney }
15025fc7cf17SDavid Daney
15034863dea3SSunil Goutham lmac++;
15046465859aSSunil Goutham if (lmac == bgx->max_lmac) {
150565c66af6SDavid Daney of_node_put(node);
15064863dea3SSunil Goutham break;
15074863dea3SSunil Goutham }
150865c66af6SDavid Daney }
1509de387e11SRobert Richter return 0;
1510b7d3e3d3SDavid Daney
1511b7d3e3d3SDavid Daney defer:
1512b7d3e3d3SDavid Daney /* We are bailing out, try not to leak device reference counts
1513b7d3e3d3SDavid Daney * for phy devices we may have already found.
1514b7d3e3d3SDavid Daney */
1515b7d3e3d3SDavid Daney while (lmac) {
1516b7d3e3d3SDavid Daney if (bgx->lmac[lmac].phydev) {
1517b7d3e3d3SDavid Daney put_device(&bgx->lmac[lmac].phydev->mdio.dev);
1518b7d3e3d3SDavid Daney bgx->lmac[lmac].phydev = NULL;
1519b7d3e3d3SDavid Daney }
1520b7d3e3d3SDavid Daney lmac--;
1521b7d3e3d3SDavid Daney }
1522b7d3e3d3SDavid Daney of_node_put(node);
1523b7d3e3d3SDavid Daney return -EPROBE_DEFER;
1524de387e11SRobert Richter }
1525de387e11SRobert Richter
1526de387e11SRobert Richter #else
1527de387e11SRobert Richter
bgx_init_of_phy(struct bgx * bgx)1528de387e11SRobert Richter static int bgx_init_of_phy(struct bgx *bgx)
1529de387e11SRobert Richter {
1530de387e11SRobert Richter return -ENODEV;
1531de387e11SRobert Richter }
1532de387e11SRobert Richter
1533de387e11SRobert Richter #endif /* CONFIG_OF_MDIO */
1534de387e11SRobert Richter
bgx_init_phy(struct bgx * bgx)1535de387e11SRobert Richter static int bgx_init_phy(struct bgx *bgx)
1536de387e11SRobert Richter {
153746b903a0SDavid Daney if (!acpi_disabled)
153846b903a0SDavid Daney return bgx_init_acpi_phy(bgx);
153946b903a0SDavid Daney
1540de387e11SRobert Richter return bgx_init_of_phy(bgx);
15414863dea3SSunil Goutham }
15424863dea3SSunil Goutham
bgx_intr_handler(int irq,void * data)1543971617c3STim Harvey static irqreturn_t bgx_intr_handler(int irq, void *data)
1544971617c3STim Harvey {
1545971617c3STim Harvey struct bgx *bgx = (struct bgx *)data;
1546971617c3STim Harvey u64 status, val;
1547971617c3STim Harvey int lmac;
1548971617c3STim Harvey
1549971617c3STim Harvey for (lmac = 0; lmac < bgx->lmac_count; lmac++) {
1550971617c3STim Harvey status = bgx_reg_read(bgx, lmac, BGX_GMP_GMI_TXX_INT);
1551971617c3STim Harvey if (status & GMI_TXX_INT_UNDFLW) {
1552971617c3STim Harvey pci_err(bgx->pdev, "BGX%d lmac%d UNDFLW\n",
1553971617c3STim Harvey bgx->bgx_id, lmac);
1554971617c3STim Harvey val = bgx_reg_read(bgx, lmac, BGX_CMRX_CFG);
1555971617c3STim Harvey val &= ~CMR_EN;
1556971617c3STim Harvey bgx_reg_write(bgx, lmac, BGX_CMRX_CFG, val);
1557971617c3STim Harvey val |= CMR_EN;
1558971617c3STim Harvey bgx_reg_write(bgx, lmac, BGX_CMRX_CFG, val);
1559971617c3STim Harvey }
1560971617c3STim Harvey /* clear interrupts */
1561971617c3STim Harvey bgx_reg_write(bgx, lmac, BGX_GMP_GMI_TXX_INT, status);
1562971617c3STim Harvey }
1563971617c3STim Harvey
1564971617c3STim Harvey return IRQ_HANDLED;
1565971617c3STim Harvey }
1566971617c3STim Harvey
bgx_register_intr(struct pci_dev * pdev)1567971617c3STim Harvey static void bgx_register_intr(struct pci_dev *pdev)
1568971617c3STim Harvey {
1569971617c3STim Harvey struct bgx *bgx = pci_get_drvdata(pdev);
1570971617c3STim Harvey int ret;
1571971617c3STim Harvey
1572971617c3STim Harvey ret = pci_alloc_irq_vectors(pdev, BGX_LMAC_VEC_OFFSET,
1573971617c3STim Harvey BGX_LMAC_VEC_OFFSET, PCI_IRQ_ALL_TYPES);
1574971617c3STim Harvey if (ret < 0) {
1575971617c3STim Harvey pci_err(pdev, "Req for #%d msix vectors failed\n",
1576971617c3STim Harvey BGX_LMAC_VEC_OFFSET);
1577971617c3STim Harvey return;
1578971617c3STim Harvey }
1579971617c3STim Harvey ret = pci_request_irq(pdev, GMPX_GMI_TX_INT, bgx_intr_handler, NULL,
1580971617c3STim Harvey bgx, "BGX%d", bgx->bgx_id);
1581971617c3STim Harvey if (ret)
1582971617c3STim Harvey pci_free_irq(pdev, GMPX_GMI_TX_INT, bgx);
1583971617c3STim Harvey }
1584971617c3STim Harvey
bgx_probe(struct pci_dev * pdev,const struct pci_device_id * ent)15854863dea3SSunil Goutham static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15864863dea3SSunil Goutham {
15874863dea3SSunil Goutham int err;
15884863dea3SSunil Goutham struct device *dev = &pdev->dev;
15894863dea3SSunil Goutham struct bgx *bgx = NULL;
15904863dea3SSunil Goutham u8 lmac;
159157aaf63cSSunil Goutham u16 sdevid;
15924863dea3SSunil Goutham
15934863dea3SSunil Goutham bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL);
15944863dea3SSunil Goutham if (!bgx)
15954863dea3SSunil Goutham return -ENOMEM;
15964863dea3SSunil Goutham bgx->pdev = pdev;
15974863dea3SSunil Goutham
15984863dea3SSunil Goutham pci_set_drvdata(pdev, bgx);
15994863dea3SSunil Goutham
1600971617c3STim Harvey err = pcim_enable_device(pdev);
16014863dea3SSunil Goutham if (err) {
16024863dea3SSunil Goutham pci_set_drvdata(pdev, NULL);
160352583c8dSCai Huoqing return dev_err_probe(dev, err, "Failed to enable PCI device\n");
16044863dea3SSunil Goutham }
16054863dea3SSunil Goutham
16064863dea3SSunil Goutham err = pci_request_regions(pdev, DRV_NAME);
16074863dea3SSunil Goutham if (err) {
16084863dea3SSunil Goutham dev_err(dev, "PCI request regions failed 0x%x\n", err);
16094863dea3SSunil Goutham goto err_disable_device;
16104863dea3SSunil Goutham }
16114863dea3SSunil Goutham
16124863dea3SSunil Goutham /* MAP configuration registers */
16134863dea3SSunil Goutham bgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
16144863dea3SSunil Goutham if (!bgx->reg_base) {
16154863dea3SSunil Goutham dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n");
16164863dea3SSunil Goutham err = -ENOMEM;
16174863dea3SSunil Goutham goto err_release_regions;
16184863dea3SSunil Goutham }
1619d768b678SRobert Richter
162078aacb6fSSunil Goutham set_max_bgx_per_node(pdev);
162178aacb6fSSunil Goutham
16226465859aSSunil Goutham pci_read_config_word(pdev, PCI_DEVICE_ID, &sdevid);
16236465859aSSunil Goutham if (sdevid != PCI_DEVICE_ID_THUNDER_RGX) {
1624612e94bdSRadha Mohan Chintakuntla bgx->bgx_id = (pci_resource_start(pdev,
1625612e94bdSRadha Mohan Chintakuntla PCI_CFG_REG_BAR_NUM) >> 24) & BGX_ID_MASK;
162678aacb6fSSunil Goutham bgx->bgx_id += nic_get_node_id(pdev) * max_bgx_per_node;
16276465859aSSunil Goutham bgx->max_lmac = MAX_LMAC_PER_BGX;
16284863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = bgx;
16296465859aSSunil Goutham } else {
16306465859aSSunil Goutham bgx->is_rgx = true;
16316465859aSSunil Goutham bgx->max_lmac = 1;
16326465859aSSunil Goutham bgx->bgx_id = MAX_BGX_PER_CN81XX - 1;
16336465859aSSunil Goutham bgx_vnic[bgx->bgx_id] = bgx;
16346465859aSSunil Goutham xcv_init_hw();
16356465859aSSunil Goutham }
16366465859aSSunil Goutham
163709de3917SSunil Goutham /* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one
163809de3917SSunil Goutham * BGX i.e BGX2 can be split across 2 DLMs.
163909de3917SSunil Goutham */
164009de3917SSunil Goutham pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sdevid);
164109de3917SSunil Goutham if ((sdevid == PCI_SUBSYS_DEVID_81XX_BGX) ||
164209de3917SSunil Goutham ((sdevid == PCI_SUBSYS_DEVID_83XX_BGX) && (bgx->bgx_id == 2)))
164309de3917SSunil Goutham bgx->is_dlm = true;
164409de3917SSunil Goutham
16454863dea3SSunil Goutham bgx_get_qlm_mode(bgx);
16464863dea3SSunil Goutham
1647de387e11SRobert Richter err = bgx_init_phy(bgx);
1648de387e11SRobert Richter if (err)
1649de387e11SRobert Richter goto err_enable;
16504863dea3SSunil Goutham
16514863dea3SSunil Goutham bgx_init_hw(bgx);
16524863dea3SSunil Goutham
1653971617c3STim Harvey bgx_register_intr(pdev);
1654971617c3STim Harvey
16554863dea3SSunil Goutham /* Enable all LMACs */
16564863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++) {
16574863dea3SSunil Goutham err = bgx_lmac_enable(bgx, lmac);
16584863dea3SSunil Goutham if (err) {
16594863dea3SSunil Goutham dev_err(dev, "BGX%d failed to enable lmac%d\n",
16604863dea3SSunil Goutham bgx->bgx_id, lmac);
166157aaf63cSSunil Goutham while (lmac)
166257aaf63cSSunil Goutham bgx_lmac_disable(bgx, --lmac);
16634863dea3SSunil Goutham goto err_enable;
16644863dea3SSunil Goutham }
16654863dea3SSunil Goutham }
16664863dea3SSunil Goutham
16674863dea3SSunil Goutham return 0;
16684863dea3SSunil Goutham
16694863dea3SSunil Goutham err_enable:
16704863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL;
1671971617c3STim Harvey pci_free_irq(pdev, GMPX_GMI_TX_INT, bgx);
16724863dea3SSunil Goutham err_release_regions:
16734863dea3SSunil Goutham pci_release_regions(pdev);
16744863dea3SSunil Goutham err_disable_device:
16754863dea3SSunil Goutham pci_disable_device(pdev);
16764863dea3SSunil Goutham pci_set_drvdata(pdev, NULL);
16774863dea3SSunil Goutham return err;
16784863dea3SSunil Goutham }
16794863dea3SSunil Goutham
bgx_remove(struct pci_dev * pdev)16804863dea3SSunil Goutham static void bgx_remove(struct pci_dev *pdev)
16814863dea3SSunil Goutham {
16824863dea3SSunil Goutham struct bgx *bgx = pci_get_drvdata(pdev);
16834863dea3SSunil Goutham u8 lmac;
16844863dea3SSunil Goutham
16854863dea3SSunil Goutham /* Disable all LMACs */
16864863dea3SSunil Goutham for (lmac = 0; lmac < bgx->lmac_count; lmac++)
16874863dea3SSunil Goutham bgx_lmac_disable(bgx, lmac);
16884863dea3SSunil Goutham
1689971617c3STim Harvey pci_free_irq(pdev, GMPX_GMI_TX_INT, bgx);
1690971617c3STim Harvey
16914863dea3SSunil Goutham bgx_vnic[bgx->bgx_id] = NULL;
16924863dea3SSunil Goutham pci_release_regions(pdev);
16934863dea3SSunil Goutham pci_disable_device(pdev);
16944863dea3SSunil Goutham pci_set_drvdata(pdev, NULL);
16954863dea3SSunil Goutham }
16964863dea3SSunil Goutham
16974863dea3SSunil Goutham static struct pci_driver bgx_driver = {
16984863dea3SSunil Goutham .name = DRV_NAME,
16994863dea3SSunil Goutham .id_table = bgx_id_table,
17004863dea3SSunil Goutham .probe = bgx_probe,
17014863dea3SSunil Goutham .remove = bgx_remove,
17024863dea3SSunil Goutham };
17034863dea3SSunil Goutham
bgx_init_module(void)17044863dea3SSunil Goutham static int __init bgx_init_module(void)
17054863dea3SSunil Goutham {
17064863dea3SSunil Goutham pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
17074863dea3SSunil Goutham
17084863dea3SSunil Goutham return pci_register_driver(&bgx_driver);
17094863dea3SSunil Goutham }
17104863dea3SSunil Goutham
bgx_cleanup_module(void)17114863dea3SSunil Goutham static void __exit bgx_cleanup_module(void)
17124863dea3SSunil Goutham {
17134863dea3SSunil Goutham pci_unregister_driver(&bgx_driver);
17144863dea3SSunil Goutham }
17154863dea3SSunil Goutham
17164863dea3SSunil Goutham module_init(bgx_init_module);
17174863dea3SSunil Goutham module_exit(bgx_cleanup_module);
1718