1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2015 Cavium, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/interrupt.h> 8 #include <linux/pci.h> 9 #include <linux/netdevice.h> 10 #include <linux/if_vlan.h> 11 #include <linux/etherdevice.h> 12 #include <linux/ethtool.h> 13 #include <linux/log2.h> 14 #include <linux/prefetch.h> 15 #include <linux/irq.h> 16 #include <linux/iommu.h> 17 #include <linux/bpf.h> 18 #include <linux/bpf_trace.h> 19 #include <linux/filter.h> 20 #include <linux/net_tstamp.h> 21 #include <linux/workqueue.h> 22 23 #include "nic_reg.h" 24 #include "nic.h" 25 #include "nicvf_queues.h" 26 #include "thunder_bgx.h" 27 #include "../common/cavium_ptp.h" 28 29 #define DRV_NAME "nicvf" 30 #define DRV_VERSION "1.0" 31 32 /* NOTE: Packets bigger than 1530 are split across multiple pages and XDP needs 33 * the buffer to be contiguous. Allow XDP to be set up only if we don't exceed 34 * this value, keeping headroom for the 14 byte Ethernet header and two 35 * VLAN tags (for QinQ) 36 */ 37 #define MAX_XDP_MTU (1530 - ETH_HLEN - VLAN_HLEN * 2) 38 39 /* Supported devices */ 40 static const struct pci_device_id nicvf_id_table[] = { 41 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, 42 PCI_DEVICE_ID_THUNDER_NIC_VF, 43 PCI_VENDOR_ID_CAVIUM, 44 PCI_SUBSYS_DEVID_88XX_NIC_VF) }, 45 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, 46 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF, 47 PCI_VENDOR_ID_CAVIUM, 48 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) }, 49 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, 50 PCI_DEVICE_ID_THUNDER_NIC_VF, 51 PCI_VENDOR_ID_CAVIUM, 52 PCI_SUBSYS_DEVID_81XX_NIC_VF) }, 53 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, 54 PCI_DEVICE_ID_THUNDER_NIC_VF, 55 PCI_VENDOR_ID_CAVIUM, 56 PCI_SUBSYS_DEVID_83XX_NIC_VF) }, 57 { 0, } /* end of table */ 58 }; 59 60 MODULE_AUTHOR("Sunil Goutham"); 61 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver"); 62 MODULE_LICENSE("GPL v2"); 63 MODULE_VERSION(DRV_VERSION); 64 MODULE_DEVICE_TABLE(pci, nicvf_id_table); 65 66 static int debug = 0x00; 67 module_param(debug, int, 0644); 68 MODULE_PARM_DESC(debug, "Debug message level bitmap"); 69 70 static int cpi_alg = CPI_ALG_NONE; 71 module_param(cpi_alg, int, 0444); 72 MODULE_PARM_DESC(cpi_alg, 73 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)"); 74 75 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx) 76 { 77 if (nic->sqs_mode) 78 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS); 79 else 80 return qidx; 81 } 82 83 /* The Cavium ThunderX network controller can *only* be found in SoCs 84 * containing the ThunderX ARM64 CPU implementation. All accesses to the device 85 * registers on this platform are implicitly strongly ordered with respect 86 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use 87 * with no memory barriers in this driver. The readq()/writeq() functions add 88 * explicit ordering operation which in this case are redundant, and only 89 * add overhead. 90 */ 91 92 /* Register read/write APIs */ 93 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val) 94 { 95 writeq_relaxed(val, nic->reg_base + offset); 96 } 97 98 u64 nicvf_reg_read(struct nicvf *nic, u64 offset) 99 { 100 return readq_relaxed(nic->reg_base + offset); 101 } 102 103 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset, 104 u64 qidx, u64 val) 105 { 106 void __iomem *addr = nic->reg_base + offset; 107 108 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT)); 109 } 110 111 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx) 112 { 113 void __iomem *addr = nic->reg_base + offset; 114 115 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT)); 116 } 117 118 /* VF -> PF mailbox communication */ 119 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx) 120 { 121 u64 *msg = (u64 *)mbx; 122 123 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]); 124 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]); 125 } 126 127 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx) 128 { 129 unsigned long timeout; 130 int ret = 0; 131 132 mutex_lock(&nic->rx_mode_mtx); 133 134 nic->pf_acked = false; 135 nic->pf_nacked = false; 136 137 nicvf_write_to_mbx(nic, mbx); 138 139 timeout = jiffies + msecs_to_jiffies(NIC_MBOX_MSG_TIMEOUT); 140 /* Wait for previous message to be acked, timeout 2sec */ 141 while (!nic->pf_acked) { 142 if (nic->pf_nacked) { 143 netdev_err(nic->netdev, 144 "PF NACK to mbox msg 0x%02x from VF%d\n", 145 (mbx->msg.msg & 0xFF), nic->vf_id); 146 ret = -EINVAL; 147 break; 148 } 149 usleep_range(8000, 10000); 150 if (nic->pf_acked) 151 break; 152 if (time_after(jiffies, timeout)) { 153 netdev_err(nic->netdev, 154 "PF didn't ACK to mbox msg 0x%02x from VF%d\n", 155 (mbx->msg.msg & 0xFF), nic->vf_id); 156 ret = -EBUSY; 157 break; 158 } 159 } 160 mutex_unlock(&nic->rx_mode_mtx); 161 return ret; 162 } 163 164 /* Checks if VF is able to comminicate with PF 165 * and also gets the VNIC number this VF is associated to. 166 */ 167 static int nicvf_check_pf_ready(struct nicvf *nic) 168 { 169 union nic_mbx mbx = {}; 170 171 mbx.msg.msg = NIC_MBOX_MSG_READY; 172 if (nicvf_send_msg_to_pf(nic, &mbx)) { 173 netdev_err(nic->netdev, 174 "PF didn't respond to READY msg\n"); 175 return 0; 176 } 177 178 return 1; 179 } 180 181 static void nicvf_send_cfg_done(struct nicvf *nic) 182 { 183 union nic_mbx mbx = {}; 184 185 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE; 186 if (nicvf_send_msg_to_pf(nic, &mbx)) { 187 netdev_err(nic->netdev, 188 "PF didn't respond to CFG DONE msg\n"); 189 } 190 } 191 192 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx) 193 { 194 if (bgx->rx) 195 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats; 196 else 197 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats; 198 } 199 200 static void nicvf_handle_mbx_intr(struct nicvf *nic) 201 { 202 union nic_mbx mbx = {}; 203 u64 *mbx_data; 204 u64 mbx_addr; 205 int i; 206 207 mbx_addr = NIC_VF_PF_MAILBOX_0_1; 208 mbx_data = (u64 *)&mbx; 209 210 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) { 211 *mbx_data = nicvf_reg_read(nic, mbx_addr); 212 mbx_data++; 213 mbx_addr += sizeof(u64); 214 } 215 216 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg); 217 switch (mbx.msg.msg) { 218 case NIC_MBOX_MSG_READY: 219 nic->pf_acked = true; 220 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F; 221 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F; 222 nic->node = mbx.nic_cfg.node_id; 223 if (!nic->set_mac_pending) 224 ether_addr_copy(nic->netdev->dev_addr, 225 mbx.nic_cfg.mac_addr); 226 nic->sqs_mode = mbx.nic_cfg.sqs_mode; 227 nic->loopback_supported = mbx.nic_cfg.loopback_supported; 228 nic->link_up = false; 229 nic->duplex = 0; 230 nic->speed = 0; 231 break; 232 case NIC_MBOX_MSG_ACK: 233 nic->pf_acked = true; 234 break; 235 case NIC_MBOX_MSG_NACK: 236 nic->pf_nacked = true; 237 break; 238 case NIC_MBOX_MSG_RSS_SIZE: 239 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size; 240 nic->pf_acked = true; 241 break; 242 case NIC_MBOX_MSG_BGX_STATS: 243 nicvf_read_bgx_stats(nic, &mbx.bgx_stats); 244 nic->pf_acked = true; 245 break; 246 case NIC_MBOX_MSG_BGX_LINK_CHANGE: 247 nic->pf_acked = true; 248 if (nic->link_up != mbx.link_status.link_up) { 249 nic->link_up = mbx.link_status.link_up; 250 nic->duplex = mbx.link_status.duplex; 251 nic->speed = mbx.link_status.speed; 252 nic->mac_type = mbx.link_status.mac_type; 253 if (nic->link_up) { 254 netdev_info(nic->netdev, 255 "Link is Up %d Mbps %s duplex\n", 256 nic->speed, 257 nic->duplex == DUPLEX_FULL ? 258 "Full" : "Half"); 259 netif_carrier_on(nic->netdev); 260 netif_tx_start_all_queues(nic->netdev); 261 } else { 262 netdev_info(nic->netdev, "Link is Down\n"); 263 netif_carrier_off(nic->netdev); 264 netif_tx_stop_all_queues(nic->netdev); 265 } 266 } 267 break; 268 case NIC_MBOX_MSG_ALLOC_SQS: 269 nic->sqs_count = mbx.sqs_alloc.qs_count; 270 nic->pf_acked = true; 271 break; 272 case NIC_MBOX_MSG_SNICVF_PTR: 273 /* Primary VF: make note of secondary VF's pointer 274 * to be used while packet transmission. 275 */ 276 nic->snicvf[mbx.nicvf.sqs_id] = 277 (struct nicvf *)mbx.nicvf.nicvf; 278 nic->pf_acked = true; 279 break; 280 case NIC_MBOX_MSG_PNICVF_PTR: 281 /* Secondary VF/Qset: make note of primary VF's pointer 282 * to be used while packet reception, to handover packet 283 * to primary VF's netdev. 284 */ 285 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf; 286 nic->pf_acked = true; 287 break; 288 case NIC_MBOX_MSG_PFC: 289 nic->pfc.autoneg = mbx.pfc.autoneg; 290 nic->pfc.fc_rx = mbx.pfc.fc_rx; 291 nic->pfc.fc_tx = mbx.pfc.fc_tx; 292 nic->pf_acked = true; 293 break; 294 default: 295 netdev_err(nic->netdev, 296 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg); 297 break; 298 } 299 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0); 300 } 301 302 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev) 303 { 304 union nic_mbx mbx = {}; 305 306 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC; 307 mbx.mac.vf_id = nic->vf_id; 308 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr); 309 310 return nicvf_send_msg_to_pf(nic, &mbx); 311 } 312 313 static void nicvf_config_cpi(struct nicvf *nic) 314 { 315 union nic_mbx mbx = {}; 316 317 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG; 318 mbx.cpi_cfg.vf_id = nic->vf_id; 319 mbx.cpi_cfg.cpi_alg = nic->cpi_alg; 320 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt; 321 322 nicvf_send_msg_to_pf(nic, &mbx); 323 } 324 325 static void nicvf_get_rss_size(struct nicvf *nic) 326 { 327 union nic_mbx mbx = {}; 328 329 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE; 330 mbx.rss_size.vf_id = nic->vf_id; 331 nicvf_send_msg_to_pf(nic, &mbx); 332 } 333 334 void nicvf_config_rss(struct nicvf *nic) 335 { 336 union nic_mbx mbx = {}; 337 struct nicvf_rss_info *rss = &nic->rss_info; 338 int ind_tbl_len = rss->rss_size; 339 int i, nextq = 0; 340 341 mbx.rss_cfg.vf_id = nic->vf_id; 342 mbx.rss_cfg.hash_bits = rss->hash_bits; 343 while (ind_tbl_len) { 344 mbx.rss_cfg.tbl_offset = nextq; 345 mbx.rss_cfg.tbl_len = min(ind_tbl_len, 346 RSS_IND_TBL_LEN_PER_MBX_MSG); 347 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ? 348 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG; 349 350 for (i = 0; i < mbx.rss_cfg.tbl_len; i++) 351 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++]; 352 353 nicvf_send_msg_to_pf(nic, &mbx); 354 355 ind_tbl_len -= mbx.rss_cfg.tbl_len; 356 } 357 } 358 359 void nicvf_set_rss_key(struct nicvf *nic) 360 { 361 struct nicvf_rss_info *rss = &nic->rss_info; 362 u64 key_addr = NIC_VNIC_RSS_KEY_0_4; 363 int idx; 364 365 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) { 366 nicvf_reg_write(nic, key_addr, rss->key[idx]); 367 key_addr += sizeof(u64); 368 } 369 } 370 371 static int nicvf_rss_init(struct nicvf *nic) 372 { 373 struct nicvf_rss_info *rss = &nic->rss_info; 374 int idx; 375 376 nicvf_get_rss_size(nic); 377 378 if (cpi_alg != CPI_ALG_NONE) { 379 rss->enable = false; 380 rss->hash_bits = 0; 381 return 0; 382 } 383 384 rss->enable = true; 385 386 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64)); 387 nicvf_set_rss_key(nic); 388 389 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA; 390 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg); 391 392 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size)); 393 394 for (idx = 0; idx < rss->rss_size; idx++) 395 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx, 396 nic->rx_queues); 397 nicvf_config_rss(nic); 398 return 1; 399 } 400 401 /* Request PF to allocate additional Qsets */ 402 static void nicvf_request_sqs(struct nicvf *nic) 403 { 404 union nic_mbx mbx = {}; 405 int sqs; 406 int sqs_count = nic->sqs_count; 407 int rx_queues = 0, tx_queues = 0; 408 409 /* Only primary VF should request */ 410 if (nic->sqs_mode || !nic->sqs_count) 411 return; 412 413 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS; 414 mbx.sqs_alloc.vf_id = nic->vf_id; 415 mbx.sqs_alloc.qs_count = nic->sqs_count; 416 if (nicvf_send_msg_to_pf(nic, &mbx)) { 417 /* No response from PF */ 418 nic->sqs_count = 0; 419 return; 420 } 421 422 /* Return if no Secondary Qsets available */ 423 if (!nic->sqs_count) 424 return; 425 426 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS) 427 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS; 428 429 tx_queues = nic->tx_queues + nic->xdp_tx_queues; 430 if (tx_queues > MAX_SND_QUEUES_PER_QS) 431 tx_queues = tx_queues - MAX_SND_QUEUES_PER_QS; 432 433 /* Set no of Rx/Tx queues in each of the SQsets */ 434 for (sqs = 0; sqs < nic->sqs_count; sqs++) { 435 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR; 436 mbx.nicvf.vf_id = nic->vf_id; 437 mbx.nicvf.sqs_id = sqs; 438 nicvf_send_msg_to_pf(nic, &mbx); 439 440 nic->snicvf[sqs]->sqs_id = sqs; 441 if (rx_queues > MAX_RCV_QUEUES_PER_QS) { 442 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS; 443 rx_queues -= MAX_RCV_QUEUES_PER_QS; 444 } else { 445 nic->snicvf[sqs]->qs->rq_cnt = rx_queues; 446 rx_queues = 0; 447 } 448 449 if (tx_queues > MAX_SND_QUEUES_PER_QS) { 450 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS; 451 tx_queues -= MAX_SND_QUEUES_PER_QS; 452 } else { 453 nic->snicvf[sqs]->qs->sq_cnt = tx_queues; 454 tx_queues = 0; 455 } 456 457 nic->snicvf[sqs]->qs->cq_cnt = 458 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt); 459 460 /* Initialize secondary Qset's queues and its interrupts */ 461 nicvf_open(nic->snicvf[sqs]->netdev); 462 } 463 464 /* Update stack with actual Rx/Tx queue count allocated */ 465 if (sqs_count != nic->sqs_count) 466 nicvf_set_real_num_queues(nic->netdev, 467 nic->tx_queues, nic->rx_queues); 468 } 469 470 /* Send this Qset's nicvf pointer to PF. 471 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs 472 * so that packets received by these Qsets can use primary VF's netdev 473 */ 474 static void nicvf_send_vf_struct(struct nicvf *nic) 475 { 476 union nic_mbx mbx = {}; 477 478 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR; 479 mbx.nicvf.sqs_mode = nic->sqs_mode; 480 mbx.nicvf.nicvf = (u64)nic; 481 nicvf_send_msg_to_pf(nic, &mbx); 482 } 483 484 static void nicvf_get_primary_vf_struct(struct nicvf *nic) 485 { 486 union nic_mbx mbx = {}; 487 488 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR; 489 nicvf_send_msg_to_pf(nic, &mbx); 490 } 491 492 int nicvf_set_real_num_queues(struct net_device *netdev, 493 int tx_queues, int rx_queues) 494 { 495 int err = 0; 496 497 err = netif_set_real_num_tx_queues(netdev, tx_queues); 498 if (err) { 499 netdev_err(netdev, 500 "Failed to set no of Tx queues: %d\n", tx_queues); 501 return err; 502 } 503 504 err = netif_set_real_num_rx_queues(netdev, rx_queues); 505 if (err) 506 netdev_err(netdev, 507 "Failed to set no of Rx queues: %d\n", rx_queues); 508 return err; 509 } 510 511 static int nicvf_init_resources(struct nicvf *nic) 512 { 513 int err; 514 515 /* Enable Qset */ 516 nicvf_qset_config(nic, true); 517 518 /* Initialize queues and HW for data transfer */ 519 err = nicvf_config_data_transfer(nic, true); 520 if (err) { 521 netdev_err(nic->netdev, 522 "Failed to alloc/config VF's QSet resources\n"); 523 return err; 524 } 525 526 return 0; 527 } 528 529 static inline bool nicvf_xdp_rx(struct nicvf *nic, struct bpf_prog *prog, 530 struct cqe_rx_t *cqe_rx, struct snd_queue *sq, 531 struct rcv_queue *rq, struct sk_buff **skb) 532 { 533 unsigned char *hard_start, *data; 534 struct xdp_buff xdp; 535 struct page *page; 536 u32 action; 537 u16 len, offset = 0; 538 u64 dma_addr, cpu_addr; 539 void *orig_data; 540 541 /* Retrieve packet buffer's DMA address and length */ 542 len = *((u16 *)((void *)cqe_rx + (3 * sizeof(u64)))); 543 dma_addr = *((u64 *)((void *)cqe_rx + (7 * sizeof(u64)))); 544 545 cpu_addr = nicvf_iova_to_phys(nic, dma_addr); 546 if (!cpu_addr) 547 return false; 548 cpu_addr = (u64)phys_to_virt(cpu_addr); 549 page = virt_to_page((void *)cpu_addr); 550 551 xdp_init_buff(&xdp, RCV_FRAG_LEN + XDP_PACKET_HEADROOM, 552 &rq->xdp_rxq); 553 hard_start = page_address(page); 554 data = (unsigned char *)cpu_addr; 555 xdp_prepare_buff(&xdp, hard_start, data - hard_start, len, false); 556 orig_data = xdp.data; 557 558 action = bpf_prog_run_xdp(prog, &xdp); 559 560 len = xdp.data_end - xdp.data; 561 /* Check if XDP program has changed headers */ 562 if (orig_data != xdp.data) { 563 offset = orig_data - xdp.data; 564 dma_addr -= offset; 565 } 566 567 switch (action) { 568 case XDP_PASS: 569 /* Check if it's a recycled page, if not 570 * unmap the DMA mapping. 571 * 572 * Recycled page holds an extra reference. 573 */ 574 if (page_ref_count(page) == 1) { 575 dma_addr &= PAGE_MASK; 576 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr, 577 RCV_FRAG_LEN + XDP_PACKET_HEADROOM, 578 DMA_FROM_DEVICE, 579 DMA_ATTR_SKIP_CPU_SYNC); 580 } 581 582 /* Build SKB and pass on packet to network stack */ 583 *skb = build_skb(xdp.data, 584 RCV_FRAG_LEN - cqe_rx->align_pad + offset); 585 if (!*skb) 586 put_page(page); 587 else 588 skb_put(*skb, len); 589 return false; 590 case XDP_TX: 591 nicvf_xdp_sq_append_pkt(nic, sq, (u64)xdp.data, dma_addr, len); 592 return true; 593 default: 594 bpf_warn_invalid_xdp_action(action); 595 fallthrough; 596 case XDP_ABORTED: 597 trace_xdp_exception(nic->netdev, prog, action); 598 fallthrough; 599 case XDP_DROP: 600 /* Check if it's a recycled page, if not 601 * unmap the DMA mapping. 602 * 603 * Recycled page holds an extra reference. 604 */ 605 if (page_ref_count(page) == 1) { 606 dma_addr &= PAGE_MASK; 607 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr, 608 RCV_FRAG_LEN + XDP_PACKET_HEADROOM, 609 DMA_FROM_DEVICE, 610 DMA_ATTR_SKIP_CPU_SYNC); 611 } 612 put_page(page); 613 return true; 614 } 615 return false; 616 } 617 618 static void nicvf_snd_ptp_handler(struct net_device *netdev, 619 struct cqe_send_t *cqe_tx) 620 { 621 struct nicvf *nic = netdev_priv(netdev); 622 struct skb_shared_hwtstamps ts; 623 u64 ns; 624 625 nic = nic->pnicvf; 626 627 /* Sync for 'ptp_skb' */ 628 smp_rmb(); 629 630 /* New timestamp request can be queued now */ 631 atomic_set(&nic->tx_ptp_skbs, 0); 632 633 /* Check for timestamp requested skb */ 634 if (!nic->ptp_skb) 635 return; 636 637 /* Check if timestamping is timedout, which is set to 10us */ 638 if (cqe_tx->send_status == CQ_TX_ERROP_TSTMP_TIMEOUT || 639 cqe_tx->send_status == CQ_TX_ERROP_TSTMP_CONFLICT) 640 goto no_tstamp; 641 642 /* Get the timestamp */ 643 memset(&ts, 0, sizeof(ts)); 644 ns = cavium_ptp_tstamp2time(nic->ptp_clock, cqe_tx->ptp_timestamp); 645 ts.hwtstamp = ns_to_ktime(ns); 646 skb_tstamp_tx(nic->ptp_skb, &ts); 647 648 no_tstamp: 649 /* Free the original skb */ 650 dev_kfree_skb_any(nic->ptp_skb); 651 nic->ptp_skb = NULL; 652 /* Sync 'ptp_skb' */ 653 smp_wmb(); 654 } 655 656 static void nicvf_snd_pkt_handler(struct net_device *netdev, 657 struct cqe_send_t *cqe_tx, 658 int budget, int *subdesc_cnt, 659 unsigned int *tx_pkts, unsigned int *tx_bytes) 660 { 661 struct sk_buff *skb = NULL; 662 struct page *page; 663 struct nicvf *nic = netdev_priv(netdev); 664 struct snd_queue *sq; 665 struct sq_hdr_subdesc *hdr; 666 struct sq_hdr_subdesc *tso_sqe; 667 668 sq = &nic->qs->sq[cqe_tx->sq_idx]; 669 670 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr); 671 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER) 672 return; 673 674 /* Check for errors */ 675 if (cqe_tx->send_status) 676 nicvf_check_cqe_tx_errs(nic->pnicvf, cqe_tx); 677 678 /* Is this a XDP designated Tx queue */ 679 if (sq->is_xdp) { 680 page = (struct page *)sq->xdp_page[cqe_tx->sqe_ptr]; 681 /* Check if it's recycled page or else unmap DMA mapping */ 682 if (page && (page_ref_count(page) == 1)) 683 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr, 684 hdr->subdesc_cnt); 685 686 /* Release page reference for recycling */ 687 if (page) 688 put_page(page); 689 sq->xdp_page[cqe_tx->sqe_ptr] = (u64)NULL; 690 *subdesc_cnt += hdr->subdesc_cnt + 1; 691 return; 692 } 693 694 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr]; 695 if (skb) { 696 /* Check for dummy descriptor used for HW TSO offload on 88xx */ 697 if (hdr->dont_send) { 698 /* Get actual TSO descriptors and free them */ 699 tso_sqe = 700 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2); 701 nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2, 702 tso_sqe->subdesc_cnt); 703 *subdesc_cnt += tso_sqe->subdesc_cnt + 1; 704 } else { 705 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr, 706 hdr->subdesc_cnt); 707 } 708 *subdesc_cnt += hdr->subdesc_cnt + 1; 709 prefetch(skb); 710 (*tx_pkts)++; 711 *tx_bytes += skb->len; 712 /* If timestamp is requested for this skb, don't free it */ 713 if (skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS && 714 !nic->pnicvf->ptp_skb) 715 nic->pnicvf->ptp_skb = skb; 716 else 717 napi_consume_skb(skb, budget); 718 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL; 719 } else { 720 /* In case of SW TSO on 88xx, only last segment will have 721 * a SKB attached, so just free SQEs here. 722 */ 723 if (!nic->hw_tso) 724 *subdesc_cnt += hdr->subdesc_cnt + 1; 725 } 726 } 727 728 static inline void nicvf_set_rxhash(struct net_device *netdev, 729 struct cqe_rx_t *cqe_rx, 730 struct sk_buff *skb) 731 { 732 u8 hash_type; 733 u32 hash; 734 735 if (!(netdev->features & NETIF_F_RXHASH)) 736 return; 737 738 switch (cqe_rx->rss_alg) { 739 case RSS_ALG_TCP_IP: 740 case RSS_ALG_UDP_IP: 741 hash_type = PKT_HASH_TYPE_L4; 742 hash = cqe_rx->rss_tag; 743 break; 744 case RSS_ALG_IP: 745 hash_type = PKT_HASH_TYPE_L3; 746 hash = cqe_rx->rss_tag; 747 break; 748 default: 749 hash_type = PKT_HASH_TYPE_NONE; 750 hash = 0; 751 } 752 753 skb_set_hash(skb, hash, hash_type); 754 } 755 756 static inline void nicvf_set_rxtstamp(struct nicvf *nic, struct sk_buff *skb) 757 { 758 u64 ns; 759 760 if (!nic->ptp_clock || !nic->hw_rx_tstamp) 761 return; 762 763 /* The first 8 bytes is the timestamp */ 764 ns = cavium_ptp_tstamp2time(nic->ptp_clock, 765 be64_to_cpu(*(__be64 *)skb->data)); 766 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns); 767 768 __skb_pull(skb, 8); 769 } 770 771 static void nicvf_rcv_pkt_handler(struct net_device *netdev, 772 struct napi_struct *napi, 773 struct cqe_rx_t *cqe_rx, 774 struct snd_queue *sq, struct rcv_queue *rq) 775 { 776 struct sk_buff *skb = NULL; 777 struct nicvf *nic = netdev_priv(netdev); 778 struct nicvf *snic = nic; 779 int err = 0; 780 int rq_idx; 781 782 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx); 783 784 if (nic->sqs_mode) { 785 /* Use primary VF's 'nicvf' struct */ 786 nic = nic->pnicvf; 787 netdev = nic->netdev; 788 } 789 790 /* Check for errors */ 791 if (cqe_rx->err_level || cqe_rx->err_opcode) { 792 err = nicvf_check_cqe_rx_errs(nic, cqe_rx); 793 if (err && !cqe_rx->rb_cnt) 794 return; 795 } 796 797 /* For XDP, ignore pkts spanning multiple pages */ 798 if (nic->xdp_prog && (cqe_rx->rb_cnt == 1)) { 799 /* Packet consumed by XDP */ 800 if (nicvf_xdp_rx(snic, nic->xdp_prog, cqe_rx, sq, rq, &skb)) 801 return; 802 } else { 803 skb = nicvf_get_rcv_skb(snic, cqe_rx, 804 nic->xdp_prog ? true : false); 805 } 806 807 if (!skb) 808 return; 809 810 if (netif_msg_pktdata(nic)) { 811 netdev_info(nic->netdev, "skb 0x%p, len=%d\n", skb, skb->len); 812 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, 813 skb->data, skb->len, true); 814 } 815 816 /* If error packet, drop it here */ 817 if (err) { 818 dev_kfree_skb_any(skb); 819 return; 820 } 821 822 nicvf_set_rxtstamp(nic, skb); 823 nicvf_set_rxhash(netdev, cqe_rx, skb); 824 825 skb_record_rx_queue(skb, rq_idx); 826 if (netdev->hw_features & NETIF_F_RXCSUM) { 827 /* HW by default verifies TCP/UDP/SCTP checksums */ 828 skb->ip_summed = CHECKSUM_UNNECESSARY; 829 } else { 830 skb_checksum_none_assert(skb); 831 } 832 833 skb->protocol = eth_type_trans(skb, netdev); 834 835 /* Check for stripped VLAN */ 836 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped) 837 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 838 ntohs((__force __be16)cqe_rx->vlan_tci)); 839 840 if (napi && (netdev->features & NETIF_F_GRO)) 841 napi_gro_receive(napi, skb); 842 else 843 netif_receive_skb(skb); 844 } 845 846 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx, 847 struct napi_struct *napi, int budget) 848 { 849 int processed_cqe, work_done = 0, tx_done = 0; 850 int cqe_count, cqe_head; 851 int subdesc_cnt = 0; 852 struct nicvf *nic = netdev_priv(netdev); 853 struct queue_set *qs = nic->qs; 854 struct cmp_queue *cq = &qs->cq[cq_idx]; 855 struct cqe_rx_t *cq_desc; 856 struct netdev_queue *txq; 857 struct snd_queue *sq = &qs->sq[cq_idx]; 858 struct rcv_queue *rq = &qs->rq[cq_idx]; 859 unsigned int tx_pkts = 0, tx_bytes = 0, txq_idx; 860 861 spin_lock_bh(&cq->lock); 862 loop: 863 processed_cqe = 0; 864 /* Get no of valid CQ entries to process */ 865 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx); 866 cqe_count &= CQ_CQE_COUNT; 867 if (!cqe_count) 868 goto done; 869 870 /* Get head of the valid CQ entries */ 871 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9; 872 cqe_head &= 0xFFFF; 873 874 while (processed_cqe < cqe_count) { 875 /* Get the CQ descriptor */ 876 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head); 877 cqe_head++; 878 cqe_head &= (cq->dmem.q_len - 1); 879 /* Initiate prefetch for next descriptor */ 880 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head)); 881 882 if ((work_done >= budget) && napi && 883 (cq_desc->cqe_type != CQE_TYPE_SEND)) { 884 break; 885 } 886 887 switch (cq_desc->cqe_type) { 888 case CQE_TYPE_RX: 889 nicvf_rcv_pkt_handler(netdev, napi, cq_desc, sq, rq); 890 work_done++; 891 break; 892 case CQE_TYPE_SEND: 893 nicvf_snd_pkt_handler(netdev, (void *)cq_desc, 894 budget, &subdesc_cnt, 895 &tx_pkts, &tx_bytes); 896 tx_done++; 897 break; 898 case CQE_TYPE_SEND_PTP: 899 nicvf_snd_ptp_handler(netdev, (void *)cq_desc); 900 break; 901 case CQE_TYPE_INVALID: 902 case CQE_TYPE_RX_SPLIT: 903 case CQE_TYPE_RX_TCP: 904 /* Ignore for now */ 905 break; 906 } 907 processed_cqe++; 908 } 909 910 /* Ring doorbell to inform H/W to reuse processed CQEs */ 911 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR, 912 cq_idx, processed_cqe); 913 914 if ((work_done < budget) && napi) 915 goto loop; 916 917 done: 918 /* Update SQ's descriptor free count */ 919 if (subdesc_cnt) 920 nicvf_put_sq_desc(sq, subdesc_cnt); 921 922 txq_idx = nicvf_netdev_qidx(nic, cq_idx); 923 /* Handle XDP TX queues */ 924 if (nic->pnicvf->xdp_prog) { 925 if (txq_idx < nic->pnicvf->xdp_tx_queues) { 926 nicvf_xdp_sq_doorbell(nic, sq, cq_idx); 927 goto out; 928 } 929 nic = nic->pnicvf; 930 txq_idx -= nic->pnicvf->xdp_tx_queues; 931 } 932 933 /* Wakeup TXQ if its stopped earlier due to SQ full */ 934 if (tx_done || 935 (atomic_read(&sq->free_cnt) >= MIN_SQ_DESC_PER_PKT_XMIT)) { 936 netdev = nic->pnicvf->netdev; 937 txq = netdev_get_tx_queue(netdev, txq_idx); 938 if (tx_pkts) 939 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes); 940 941 /* To read updated queue and carrier status */ 942 smp_mb(); 943 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) { 944 netif_tx_wake_queue(txq); 945 nic = nic->pnicvf; 946 this_cpu_inc(nic->drv_stats->txq_wake); 947 netif_warn(nic, tx_err, netdev, 948 "Transmit queue wakeup SQ%d\n", txq_idx); 949 } 950 } 951 952 out: 953 spin_unlock_bh(&cq->lock); 954 return work_done; 955 } 956 957 static int nicvf_poll(struct napi_struct *napi, int budget) 958 { 959 u64 cq_head; 960 int work_done = 0; 961 struct net_device *netdev = napi->dev; 962 struct nicvf *nic = netdev_priv(netdev); 963 struct nicvf_cq_poll *cq; 964 965 cq = container_of(napi, struct nicvf_cq_poll, napi); 966 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget); 967 968 if (work_done < budget) { 969 /* Slow packet rate, exit polling */ 970 napi_complete_done(napi, work_done); 971 /* Re-enable interrupts */ 972 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, 973 cq->cq_idx); 974 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx); 975 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD, 976 cq->cq_idx, cq_head); 977 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx); 978 } 979 return work_done; 980 } 981 982 /* Qset error interrupt handler 983 * 984 * As of now only CQ errors are handled 985 */ 986 static void nicvf_handle_qs_err(struct tasklet_struct *t) 987 { 988 struct nicvf *nic = from_tasklet(nic, t, qs_err_task); 989 struct queue_set *qs = nic->qs; 990 int qidx; 991 u64 status; 992 993 netif_tx_disable(nic->netdev); 994 995 /* Check if it is CQ err */ 996 for (qidx = 0; qidx < qs->cq_cnt; qidx++) { 997 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, 998 qidx); 999 if (!(status & CQ_ERR_MASK)) 1000 continue; 1001 /* Process already queued CQEs and reconfig CQ */ 1002 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 1003 nicvf_sq_disable(nic, qidx); 1004 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0); 1005 nicvf_cmp_queue_config(nic, qs, qidx, true); 1006 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx); 1007 nicvf_sq_enable(nic, &qs->sq[qidx], qidx); 1008 1009 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx); 1010 } 1011 1012 netif_tx_start_all_queues(nic->netdev); 1013 /* Re-enable Qset error interrupt */ 1014 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0); 1015 } 1016 1017 static void nicvf_dump_intr_status(struct nicvf *nic) 1018 { 1019 netif_info(nic, intr, nic->netdev, "interrupt status 0x%llx\n", 1020 nicvf_reg_read(nic, NIC_VF_INT)); 1021 } 1022 1023 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq) 1024 { 1025 struct nicvf *nic = (struct nicvf *)nicvf_irq; 1026 u64 intr; 1027 1028 nicvf_dump_intr_status(nic); 1029 1030 intr = nicvf_reg_read(nic, NIC_VF_INT); 1031 /* Check for spurious interrupt */ 1032 if (!(intr & NICVF_INTR_MBOX_MASK)) 1033 return IRQ_HANDLED; 1034 1035 nicvf_handle_mbx_intr(nic); 1036 1037 return IRQ_HANDLED; 1038 } 1039 1040 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq) 1041 { 1042 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq; 1043 struct nicvf *nic = cq_poll->nicvf; 1044 int qidx = cq_poll->cq_idx; 1045 1046 nicvf_dump_intr_status(nic); 1047 1048 /* Disable interrupts */ 1049 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 1050 1051 /* Schedule NAPI */ 1052 napi_schedule_irqoff(&cq_poll->napi); 1053 1054 /* Clear interrupt */ 1055 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx); 1056 1057 return IRQ_HANDLED; 1058 } 1059 1060 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq) 1061 { 1062 struct nicvf *nic = (struct nicvf *)nicvf_irq; 1063 u8 qidx; 1064 1065 1066 nicvf_dump_intr_status(nic); 1067 1068 /* Disable RBDR interrupt and schedule softirq */ 1069 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) { 1070 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx)) 1071 continue; 1072 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx); 1073 tasklet_hi_schedule(&nic->rbdr_task); 1074 /* Clear interrupt */ 1075 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx); 1076 } 1077 1078 return IRQ_HANDLED; 1079 } 1080 1081 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq) 1082 { 1083 struct nicvf *nic = (struct nicvf *)nicvf_irq; 1084 1085 nicvf_dump_intr_status(nic); 1086 1087 /* Disable Qset err interrupt and schedule softirq */ 1088 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0); 1089 tasklet_hi_schedule(&nic->qs_err_task); 1090 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0); 1091 1092 return IRQ_HANDLED; 1093 } 1094 1095 static void nicvf_set_irq_affinity(struct nicvf *nic) 1096 { 1097 int vec, cpu; 1098 1099 for (vec = 0; vec < nic->num_vec; vec++) { 1100 if (!nic->irq_allocated[vec]) 1101 continue; 1102 1103 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL)) 1104 return; 1105 /* CQ interrupts */ 1106 if (vec < NICVF_INTR_ID_SQ) 1107 /* Leave CPU0 for RBDR and other interrupts */ 1108 cpu = nicvf_netdev_qidx(nic, vec) + 1; 1109 else 1110 cpu = 0; 1111 1112 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node), 1113 nic->affinity_mask[vec]); 1114 irq_set_affinity_hint(pci_irq_vector(nic->pdev, vec), 1115 nic->affinity_mask[vec]); 1116 } 1117 } 1118 1119 static int nicvf_register_interrupts(struct nicvf *nic) 1120 { 1121 int irq, ret = 0; 1122 1123 for_each_cq_irq(irq) 1124 sprintf(nic->irq_name[irq], "%s-rxtx-%d", 1125 nic->pnicvf->netdev->name, 1126 nicvf_netdev_qidx(nic, irq)); 1127 1128 for_each_sq_irq(irq) 1129 sprintf(nic->irq_name[irq], "%s-sq-%d", 1130 nic->pnicvf->netdev->name, 1131 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ)); 1132 1133 for_each_rbdr_irq(irq) 1134 sprintf(nic->irq_name[irq], "%s-rbdr-%d", 1135 nic->pnicvf->netdev->name, 1136 nic->sqs_mode ? (nic->sqs_id + 1) : 0); 1137 1138 /* Register CQ interrupts */ 1139 for (irq = 0; irq < nic->qs->cq_cnt; irq++) { 1140 ret = request_irq(pci_irq_vector(nic->pdev, irq), 1141 nicvf_intr_handler, 1142 0, nic->irq_name[irq], nic->napi[irq]); 1143 if (ret) 1144 goto err; 1145 nic->irq_allocated[irq] = true; 1146 } 1147 1148 /* Register RBDR interrupt */ 1149 for (irq = NICVF_INTR_ID_RBDR; 1150 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) { 1151 ret = request_irq(pci_irq_vector(nic->pdev, irq), 1152 nicvf_rbdr_intr_handler, 1153 0, nic->irq_name[irq], nic); 1154 if (ret) 1155 goto err; 1156 nic->irq_allocated[irq] = true; 1157 } 1158 1159 /* Register QS error interrupt */ 1160 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d", 1161 nic->pnicvf->netdev->name, 1162 nic->sqs_mode ? (nic->sqs_id + 1) : 0); 1163 irq = NICVF_INTR_ID_QS_ERR; 1164 ret = request_irq(pci_irq_vector(nic->pdev, irq), 1165 nicvf_qs_err_intr_handler, 1166 0, nic->irq_name[irq], nic); 1167 if (ret) 1168 goto err; 1169 1170 nic->irq_allocated[irq] = true; 1171 1172 /* Set IRQ affinities */ 1173 nicvf_set_irq_affinity(nic); 1174 1175 err: 1176 if (ret) 1177 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq); 1178 1179 return ret; 1180 } 1181 1182 static void nicvf_unregister_interrupts(struct nicvf *nic) 1183 { 1184 struct pci_dev *pdev = nic->pdev; 1185 int irq; 1186 1187 /* Free registered interrupts */ 1188 for (irq = 0; irq < nic->num_vec; irq++) { 1189 if (!nic->irq_allocated[irq]) 1190 continue; 1191 1192 irq_set_affinity_hint(pci_irq_vector(pdev, irq), NULL); 1193 free_cpumask_var(nic->affinity_mask[irq]); 1194 1195 if (irq < NICVF_INTR_ID_SQ) 1196 free_irq(pci_irq_vector(pdev, irq), nic->napi[irq]); 1197 else 1198 free_irq(pci_irq_vector(pdev, irq), nic); 1199 1200 nic->irq_allocated[irq] = false; 1201 } 1202 1203 /* Disable MSI-X */ 1204 pci_free_irq_vectors(pdev); 1205 nic->num_vec = 0; 1206 } 1207 1208 /* Initialize MSIX vectors and register MISC interrupt. 1209 * Send READY message to PF to check if its alive 1210 */ 1211 static int nicvf_register_misc_interrupt(struct nicvf *nic) 1212 { 1213 int ret = 0; 1214 int irq = NICVF_INTR_ID_MISC; 1215 1216 /* Return if mailbox interrupt is already registered */ 1217 if (nic->pdev->msix_enabled) 1218 return 0; 1219 1220 /* Enable MSI-X */ 1221 nic->num_vec = pci_msix_vec_count(nic->pdev); 1222 ret = pci_alloc_irq_vectors(nic->pdev, nic->num_vec, nic->num_vec, 1223 PCI_IRQ_MSIX); 1224 if (ret < 0) { 1225 netdev_err(nic->netdev, 1226 "Req for #%d msix vectors failed\n", nic->num_vec); 1227 return 1; 1228 } 1229 1230 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF"); 1231 /* Register Misc interrupt */ 1232 ret = request_irq(pci_irq_vector(nic->pdev, irq), 1233 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic); 1234 1235 if (ret) 1236 return ret; 1237 nic->irq_allocated[irq] = true; 1238 1239 /* Enable mailbox interrupt */ 1240 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0); 1241 1242 /* Check if VF is able to communicate with PF */ 1243 if (!nicvf_check_pf_ready(nic)) { 1244 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1245 nicvf_unregister_interrupts(nic); 1246 return 1; 1247 } 1248 1249 return 0; 1250 } 1251 1252 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev) 1253 { 1254 struct nicvf *nic = netdev_priv(netdev); 1255 int qid = skb_get_queue_mapping(skb); 1256 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid); 1257 struct nicvf *snic; 1258 struct snd_queue *sq; 1259 int tmp; 1260 1261 /* Check for minimum packet length */ 1262 if (skb->len <= ETH_HLEN) { 1263 dev_kfree_skb(skb); 1264 return NETDEV_TX_OK; 1265 } 1266 1267 /* In XDP case, initial HW tx queues are used for XDP, 1268 * but stack's queue mapping starts at '0', so skip the 1269 * Tx queues attached to Rx queues for XDP. 1270 */ 1271 if (nic->xdp_prog) 1272 qid += nic->xdp_tx_queues; 1273 1274 snic = nic; 1275 /* Get secondary Qset's SQ structure */ 1276 if (qid >= MAX_SND_QUEUES_PER_QS) { 1277 tmp = qid / MAX_SND_QUEUES_PER_QS; 1278 snic = (struct nicvf *)nic->snicvf[tmp - 1]; 1279 if (!snic) { 1280 netdev_warn(nic->netdev, 1281 "Secondary Qset#%d's ptr not initialized\n", 1282 tmp - 1); 1283 dev_kfree_skb(skb); 1284 return NETDEV_TX_OK; 1285 } 1286 qid = qid % MAX_SND_QUEUES_PER_QS; 1287 } 1288 1289 sq = &snic->qs->sq[qid]; 1290 if (!netif_tx_queue_stopped(txq) && 1291 !nicvf_sq_append_skb(snic, sq, skb, qid)) { 1292 netif_tx_stop_queue(txq); 1293 1294 /* Barrier, so that stop_queue visible to other cpus */ 1295 smp_mb(); 1296 1297 /* Check again, incase another cpu freed descriptors */ 1298 if (atomic_read(&sq->free_cnt) > MIN_SQ_DESC_PER_PKT_XMIT) { 1299 netif_tx_wake_queue(txq); 1300 } else { 1301 this_cpu_inc(nic->drv_stats->txq_stop); 1302 netif_warn(nic, tx_err, netdev, 1303 "Transmit ring full, stopping SQ%d\n", qid); 1304 } 1305 return NETDEV_TX_BUSY; 1306 } 1307 1308 return NETDEV_TX_OK; 1309 } 1310 1311 static inline void nicvf_free_cq_poll(struct nicvf *nic) 1312 { 1313 struct nicvf_cq_poll *cq_poll; 1314 int qidx; 1315 1316 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) { 1317 cq_poll = nic->napi[qidx]; 1318 if (!cq_poll) 1319 continue; 1320 nic->napi[qidx] = NULL; 1321 kfree(cq_poll); 1322 } 1323 } 1324 1325 int nicvf_stop(struct net_device *netdev) 1326 { 1327 int irq, qidx; 1328 struct nicvf *nic = netdev_priv(netdev); 1329 struct queue_set *qs = nic->qs; 1330 struct nicvf_cq_poll *cq_poll = NULL; 1331 union nic_mbx mbx = {}; 1332 1333 /* wait till all queued set_rx_mode tasks completes */ 1334 if (nic->nicvf_rx_mode_wq) { 1335 cancel_delayed_work_sync(&nic->link_change_work); 1336 drain_workqueue(nic->nicvf_rx_mode_wq); 1337 } 1338 1339 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN; 1340 nicvf_send_msg_to_pf(nic, &mbx); 1341 1342 netif_carrier_off(netdev); 1343 netif_tx_stop_all_queues(nic->netdev); 1344 nic->link_up = false; 1345 1346 /* Teardown secondary qsets first */ 1347 if (!nic->sqs_mode) { 1348 for (qidx = 0; qidx < nic->sqs_count; qidx++) { 1349 if (!nic->snicvf[qidx]) 1350 continue; 1351 nicvf_stop(nic->snicvf[qidx]->netdev); 1352 nic->snicvf[qidx] = NULL; 1353 } 1354 } 1355 1356 /* Disable RBDR & QS error interrupts */ 1357 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) { 1358 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx); 1359 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx); 1360 } 1361 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0); 1362 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0); 1363 1364 /* Wait for pending IRQ handlers to finish */ 1365 for (irq = 0; irq < nic->num_vec; irq++) 1366 synchronize_irq(pci_irq_vector(nic->pdev, irq)); 1367 1368 tasklet_kill(&nic->rbdr_task); 1369 tasklet_kill(&nic->qs_err_task); 1370 if (nic->rb_work_scheduled) 1371 cancel_delayed_work_sync(&nic->rbdr_work); 1372 1373 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) { 1374 cq_poll = nic->napi[qidx]; 1375 if (!cq_poll) 1376 continue; 1377 napi_synchronize(&cq_poll->napi); 1378 /* CQ intr is enabled while napi_complete, 1379 * so disable it now 1380 */ 1381 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx); 1382 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx); 1383 napi_disable(&cq_poll->napi); 1384 netif_napi_del(&cq_poll->napi); 1385 } 1386 1387 netif_tx_disable(netdev); 1388 1389 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++) 1390 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx)); 1391 1392 /* Free resources */ 1393 nicvf_config_data_transfer(nic, false); 1394 1395 /* Disable HW Qset */ 1396 nicvf_qset_config(nic, false); 1397 1398 /* disable mailbox interrupt */ 1399 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1400 1401 nicvf_unregister_interrupts(nic); 1402 1403 nicvf_free_cq_poll(nic); 1404 1405 /* Free any pending SKB saved to receive timestamp */ 1406 if (nic->ptp_skb) { 1407 dev_kfree_skb_any(nic->ptp_skb); 1408 nic->ptp_skb = NULL; 1409 } 1410 1411 /* Clear multiqset info */ 1412 nic->pnicvf = nic; 1413 1414 return 0; 1415 } 1416 1417 static int nicvf_config_hw_rx_tstamp(struct nicvf *nic, bool enable) 1418 { 1419 union nic_mbx mbx = {}; 1420 1421 mbx.ptp.msg = NIC_MBOX_MSG_PTP_CFG; 1422 mbx.ptp.enable = enable; 1423 1424 return nicvf_send_msg_to_pf(nic, &mbx); 1425 } 1426 1427 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu) 1428 { 1429 union nic_mbx mbx = {}; 1430 1431 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS; 1432 mbx.frs.max_frs = mtu; 1433 mbx.frs.vf_id = nic->vf_id; 1434 1435 return nicvf_send_msg_to_pf(nic, &mbx); 1436 } 1437 1438 static void nicvf_link_status_check_task(struct work_struct *work_arg) 1439 { 1440 struct nicvf *nic = container_of(work_arg, 1441 struct nicvf, 1442 link_change_work.work); 1443 union nic_mbx mbx = {}; 1444 mbx.msg.msg = NIC_MBOX_MSG_BGX_LINK_CHANGE; 1445 nicvf_send_msg_to_pf(nic, &mbx); 1446 queue_delayed_work(nic->nicvf_rx_mode_wq, 1447 &nic->link_change_work, 2 * HZ); 1448 } 1449 1450 int nicvf_open(struct net_device *netdev) 1451 { 1452 int cpu, err, qidx; 1453 struct nicvf *nic = netdev_priv(netdev); 1454 struct queue_set *qs = nic->qs; 1455 struct nicvf_cq_poll *cq_poll = NULL; 1456 1457 /* wait till all queued set_rx_mode tasks completes if any */ 1458 if (nic->nicvf_rx_mode_wq) 1459 drain_workqueue(nic->nicvf_rx_mode_wq); 1460 1461 netif_carrier_off(netdev); 1462 1463 err = nicvf_register_misc_interrupt(nic); 1464 if (err) 1465 return err; 1466 1467 /* Register NAPI handler for processing CQEs */ 1468 for (qidx = 0; qidx < qs->cq_cnt; qidx++) { 1469 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL); 1470 if (!cq_poll) { 1471 err = -ENOMEM; 1472 goto napi_del; 1473 } 1474 cq_poll->cq_idx = qidx; 1475 cq_poll->nicvf = nic; 1476 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll, 1477 NAPI_POLL_WEIGHT); 1478 napi_enable(&cq_poll->napi); 1479 nic->napi[qidx] = cq_poll; 1480 } 1481 1482 /* Check if we got MAC address from PF or else generate a radom MAC */ 1483 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) { 1484 eth_hw_addr_random(netdev); 1485 nicvf_hw_set_mac_addr(nic, netdev); 1486 } 1487 1488 if (nic->set_mac_pending) { 1489 nic->set_mac_pending = false; 1490 nicvf_hw_set_mac_addr(nic, netdev); 1491 } 1492 1493 /* Init tasklet for handling Qset err interrupt */ 1494 tasklet_setup(&nic->qs_err_task, nicvf_handle_qs_err); 1495 1496 /* Init RBDR tasklet which will refill RBDR */ 1497 tasklet_setup(&nic->rbdr_task, nicvf_rbdr_task); 1498 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work); 1499 1500 /* Configure CPI alorithm */ 1501 nic->cpi_alg = cpi_alg; 1502 if (!nic->sqs_mode) 1503 nicvf_config_cpi(nic); 1504 1505 nicvf_request_sqs(nic); 1506 if (nic->sqs_mode) 1507 nicvf_get_primary_vf_struct(nic); 1508 1509 /* Configure PTP timestamp */ 1510 if (nic->ptp_clock) 1511 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp); 1512 atomic_set(&nic->tx_ptp_skbs, 0); 1513 nic->ptp_skb = NULL; 1514 1515 /* Configure receive side scaling and MTU */ 1516 if (!nic->sqs_mode) { 1517 nicvf_rss_init(nic); 1518 err = nicvf_update_hw_max_frs(nic, netdev->mtu); 1519 if (err) 1520 goto cleanup; 1521 1522 /* Clear percpu stats */ 1523 for_each_possible_cpu(cpu) 1524 memset(per_cpu_ptr(nic->drv_stats, cpu), 0, 1525 sizeof(struct nicvf_drv_stats)); 1526 } 1527 1528 err = nicvf_register_interrupts(nic); 1529 if (err) 1530 goto cleanup; 1531 1532 /* Initialize the queues */ 1533 err = nicvf_init_resources(nic); 1534 if (err) 1535 goto cleanup; 1536 1537 /* Make sure queue initialization is written */ 1538 wmb(); 1539 1540 nicvf_reg_write(nic, NIC_VF_INT, -1); 1541 /* Enable Qset err interrupt */ 1542 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0); 1543 1544 /* Enable completion queue interrupt */ 1545 for (qidx = 0; qidx < qs->cq_cnt; qidx++) 1546 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx); 1547 1548 /* Enable RBDR threshold interrupt */ 1549 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) 1550 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx); 1551 1552 /* Send VF config done msg to PF */ 1553 nicvf_send_cfg_done(nic); 1554 1555 if (nic->nicvf_rx_mode_wq) { 1556 INIT_DELAYED_WORK(&nic->link_change_work, 1557 nicvf_link_status_check_task); 1558 queue_delayed_work(nic->nicvf_rx_mode_wq, 1559 &nic->link_change_work, 0); 1560 } 1561 1562 return 0; 1563 cleanup: 1564 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0); 1565 nicvf_unregister_interrupts(nic); 1566 tasklet_kill(&nic->qs_err_task); 1567 tasklet_kill(&nic->rbdr_task); 1568 napi_del: 1569 for (qidx = 0; qidx < qs->cq_cnt; qidx++) { 1570 cq_poll = nic->napi[qidx]; 1571 if (!cq_poll) 1572 continue; 1573 napi_disable(&cq_poll->napi); 1574 netif_napi_del(&cq_poll->napi); 1575 } 1576 nicvf_free_cq_poll(nic); 1577 return err; 1578 } 1579 1580 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu) 1581 { 1582 struct nicvf *nic = netdev_priv(netdev); 1583 int orig_mtu = netdev->mtu; 1584 1585 /* For now just support only the usual MTU sized frames, 1586 * plus some headroom for VLAN, QinQ. 1587 */ 1588 if (nic->xdp_prog && new_mtu > MAX_XDP_MTU) { 1589 netdev_warn(netdev, "Jumbo frames not yet supported with XDP, current MTU %d.\n", 1590 netdev->mtu); 1591 return -EINVAL; 1592 } 1593 1594 netdev->mtu = new_mtu; 1595 1596 if (!netif_running(netdev)) 1597 return 0; 1598 1599 if (nicvf_update_hw_max_frs(nic, new_mtu)) { 1600 netdev->mtu = orig_mtu; 1601 return -EINVAL; 1602 } 1603 1604 return 0; 1605 } 1606 1607 static int nicvf_set_mac_address(struct net_device *netdev, void *p) 1608 { 1609 struct sockaddr *addr = p; 1610 struct nicvf *nic = netdev_priv(netdev); 1611 1612 if (!is_valid_ether_addr(addr->sa_data)) 1613 return -EADDRNOTAVAIL; 1614 1615 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 1616 1617 if (nic->pdev->msix_enabled) { 1618 if (nicvf_hw_set_mac_addr(nic, netdev)) 1619 return -EBUSY; 1620 } else { 1621 nic->set_mac_pending = true; 1622 } 1623 1624 return 0; 1625 } 1626 1627 void nicvf_update_lmac_stats(struct nicvf *nic) 1628 { 1629 int stat = 0; 1630 union nic_mbx mbx = {}; 1631 1632 if (!netif_running(nic->netdev)) 1633 return; 1634 1635 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS; 1636 mbx.bgx_stats.vf_id = nic->vf_id; 1637 /* Rx stats */ 1638 mbx.bgx_stats.rx = 1; 1639 while (stat < BGX_RX_STATS_COUNT) { 1640 mbx.bgx_stats.idx = stat; 1641 if (nicvf_send_msg_to_pf(nic, &mbx)) 1642 return; 1643 stat++; 1644 } 1645 1646 stat = 0; 1647 1648 /* Tx stats */ 1649 mbx.bgx_stats.rx = 0; 1650 while (stat < BGX_TX_STATS_COUNT) { 1651 mbx.bgx_stats.idx = stat; 1652 if (nicvf_send_msg_to_pf(nic, &mbx)) 1653 return; 1654 stat++; 1655 } 1656 } 1657 1658 void nicvf_update_stats(struct nicvf *nic) 1659 { 1660 int qidx, cpu; 1661 u64 tmp_stats = 0; 1662 struct nicvf_hw_stats *stats = &nic->hw_stats; 1663 struct nicvf_drv_stats *drv_stats; 1664 struct queue_set *qs = nic->qs; 1665 1666 #define GET_RX_STATS(reg) \ 1667 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3)) 1668 #define GET_TX_STATS(reg) \ 1669 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3)) 1670 1671 stats->rx_bytes = GET_RX_STATS(RX_OCTS); 1672 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST); 1673 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST); 1674 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST); 1675 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS); 1676 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR); 1677 stats->rx_drop_red = GET_RX_STATS(RX_RED); 1678 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS); 1679 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN); 1680 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS); 1681 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST); 1682 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST); 1683 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST); 1684 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST); 1685 1686 stats->tx_bytes = GET_TX_STATS(TX_OCTS); 1687 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST); 1688 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST); 1689 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST); 1690 stats->tx_drops = GET_TX_STATS(TX_DROP); 1691 1692 /* On T88 pass 2.0, the dummy SQE added for TSO notification 1693 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed 1694 * pointed by dummy SQE and results in tx_drops counter being 1695 * incremented. Subtracting it from tx_tso counter will give 1696 * exact tx_drops counter. 1697 */ 1698 if (nic->t88 && nic->hw_tso) { 1699 for_each_possible_cpu(cpu) { 1700 drv_stats = per_cpu_ptr(nic->drv_stats, cpu); 1701 tmp_stats += drv_stats->tx_tso; 1702 } 1703 stats->tx_drops = tmp_stats - stats->tx_drops; 1704 } 1705 stats->tx_frames = stats->tx_ucast_frames + 1706 stats->tx_bcast_frames + 1707 stats->tx_mcast_frames; 1708 stats->rx_frames = stats->rx_ucast_frames + 1709 stats->rx_bcast_frames + 1710 stats->rx_mcast_frames; 1711 stats->rx_drops = stats->rx_drop_red + 1712 stats->rx_drop_overrun; 1713 1714 /* Update RQ and SQ stats */ 1715 for (qidx = 0; qidx < qs->rq_cnt; qidx++) 1716 nicvf_update_rq_stats(nic, qidx); 1717 for (qidx = 0; qidx < qs->sq_cnt; qidx++) 1718 nicvf_update_sq_stats(nic, qidx); 1719 } 1720 1721 static void nicvf_get_stats64(struct net_device *netdev, 1722 struct rtnl_link_stats64 *stats) 1723 { 1724 struct nicvf *nic = netdev_priv(netdev); 1725 struct nicvf_hw_stats *hw_stats = &nic->hw_stats; 1726 1727 nicvf_update_stats(nic); 1728 1729 stats->rx_bytes = hw_stats->rx_bytes; 1730 stats->rx_packets = hw_stats->rx_frames; 1731 stats->rx_dropped = hw_stats->rx_drops; 1732 stats->multicast = hw_stats->rx_mcast_frames; 1733 1734 stats->tx_bytes = hw_stats->tx_bytes; 1735 stats->tx_packets = hw_stats->tx_frames; 1736 stats->tx_dropped = hw_stats->tx_drops; 1737 1738 } 1739 1740 static void nicvf_tx_timeout(struct net_device *dev, unsigned int txqueue) 1741 { 1742 struct nicvf *nic = netdev_priv(dev); 1743 1744 netif_warn(nic, tx_err, dev, "Transmit timed out, resetting\n"); 1745 1746 this_cpu_inc(nic->drv_stats->tx_timeout); 1747 schedule_work(&nic->reset_task); 1748 } 1749 1750 static void nicvf_reset_task(struct work_struct *work) 1751 { 1752 struct nicvf *nic; 1753 1754 nic = container_of(work, struct nicvf, reset_task); 1755 1756 if (!netif_running(nic->netdev)) 1757 return; 1758 1759 nicvf_stop(nic->netdev); 1760 nicvf_open(nic->netdev); 1761 netif_trans_update(nic->netdev); 1762 } 1763 1764 static int nicvf_config_loopback(struct nicvf *nic, 1765 netdev_features_t features) 1766 { 1767 union nic_mbx mbx = {}; 1768 1769 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK; 1770 mbx.lbk.vf_id = nic->vf_id; 1771 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0; 1772 1773 return nicvf_send_msg_to_pf(nic, &mbx); 1774 } 1775 1776 static netdev_features_t nicvf_fix_features(struct net_device *netdev, 1777 netdev_features_t features) 1778 { 1779 struct nicvf *nic = netdev_priv(netdev); 1780 1781 if ((features & NETIF_F_LOOPBACK) && 1782 netif_running(netdev) && !nic->loopback_supported) 1783 features &= ~NETIF_F_LOOPBACK; 1784 1785 return features; 1786 } 1787 1788 static int nicvf_set_features(struct net_device *netdev, 1789 netdev_features_t features) 1790 { 1791 struct nicvf *nic = netdev_priv(netdev); 1792 netdev_features_t changed = features ^ netdev->features; 1793 1794 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 1795 nicvf_config_vlan_stripping(nic, features); 1796 1797 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev)) 1798 return nicvf_config_loopback(nic, features); 1799 1800 return 0; 1801 } 1802 1803 static void nicvf_set_xdp_queues(struct nicvf *nic, bool bpf_attached) 1804 { 1805 u8 cq_count, txq_count; 1806 1807 /* Set XDP Tx queue count same as Rx queue count */ 1808 if (!bpf_attached) 1809 nic->xdp_tx_queues = 0; 1810 else 1811 nic->xdp_tx_queues = nic->rx_queues; 1812 1813 /* If queue count > MAX_CMP_QUEUES_PER_QS, then additional qsets 1814 * needs to be allocated, check how many. 1815 */ 1816 txq_count = nic->xdp_tx_queues + nic->tx_queues; 1817 cq_count = max(nic->rx_queues, txq_count); 1818 if (cq_count > MAX_CMP_QUEUES_PER_QS) { 1819 nic->sqs_count = roundup(cq_count, MAX_CMP_QUEUES_PER_QS); 1820 nic->sqs_count = (nic->sqs_count / MAX_CMP_QUEUES_PER_QS) - 1; 1821 } else { 1822 nic->sqs_count = 0; 1823 } 1824 1825 /* Set primary Qset's resources */ 1826 nic->qs->rq_cnt = min_t(u8, nic->rx_queues, MAX_RCV_QUEUES_PER_QS); 1827 nic->qs->sq_cnt = min_t(u8, txq_count, MAX_SND_QUEUES_PER_QS); 1828 nic->qs->cq_cnt = max_t(u8, nic->qs->rq_cnt, nic->qs->sq_cnt); 1829 1830 /* Update stack */ 1831 nicvf_set_real_num_queues(nic->netdev, nic->tx_queues, nic->rx_queues); 1832 } 1833 1834 static int nicvf_xdp_setup(struct nicvf *nic, struct bpf_prog *prog) 1835 { 1836 struct net_device *dev = nic->netdev; 1837 bool if_up = netif_running(nic->netdev); 1838 struct bpf_prog *old_prog; 1839 bool bpf_attached = false; 1840 int ret = 0; 1841 1842 /* For now just support only the usual MTU sized frames, 1843 * plus some headroom for VLAN, QinQ. 1844 */ 1845 if (prog && dev->mtu > MAX_XDP_MTU) { 1846 netdev_warn(dev, "Jumbo frames not yet supported with XDP, current MTU %d.\n", 1847 dev->mtu); 1848 return -EOPNOTSUPP; 1849 } 1850 1851 /* ALL SQs attached to CQs i.e same as RQs, are treated as 1852 * XDP Tx queues and more Tx queues are allocated for 1853 * network stack to send pkts out. 1854 * 1855 * No of Tx queues are either same as Rx queues or whatever 1856 * is left in max no of queues possible. 1857 */ 1858 if ((nic->rx_queues + nic->tx_queues) > nic->max_queues) { 1859 netdev_warn(dev, 1860 "Failed to attach BPF prog, RXQs + TXQs > Max %d\n", 1861 nic->max_queues); 1862 return -ENOMEM; 1863 } 1864 1865 if (if_up) 1866 nicvf_stop(nic->netdev); 1867 1868 old_prog = xchg(&nic->xdp_prog, prog); 1869 /* Detach old prog, if any */ 1870 if (old_prog) 1871 bpf_prog_put(old_prog); 1872 1873 if (nic->xdp_prog) { 1874 /* Attach BPF program */ 1875 bpf_prog_add(nic->xdp_prog, nic->rx_queues - 1); 1876 bpf_attached = true; 1877 } 1878 1879 /* Calculate Tx queues needed for XDP and network stack */ 1880 nicvf_set_xdp_queues(nic, bpf_attached); 1881 1882 if (if_up) { 1883 /* Reinitialize interface, clean slate */ 1884 nicvf_open(nic->netdev); 1885 netif_trans_update(nic->netdev); 1886 } 1887 1888 return ret; 1889 } 1890 1891 static int nicvf_xdp(struct net_device *netdev, struct netdev_bpf *xdp) 1892 { 1893 struct nicvf *nic = netdev_priv(netdev); 1894 1895 /* To avoid checks while retrieving buffer address from CQE_RX, 1896 * do not support XDP for T88 pass1.x silicons which are anyway 1897 * not in use widely. 1898 */ 1899 if (pass1_silicon(nic->pdev)) 1900 return -EOPNOTSUPP; 1901 1902 switch (xdp->command) { 1903 case XDP_SETUP_PROG: 1904 return nicvf_xdp_setup(nic, xdp->prog); 1905 default: 1906 return -EINVAL; 1907 } 1908 } 1909 1910 static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr) 1911 { 1912 struct hwtstamp_config config; 1913 struct nicvf *nic = netdev_priv(netdev); 1914 1915 if (!nic->ptp_clock) 1916 return -ENODEV; 1917 1918 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) 1919 return -EFAULT; 1920 1921 /* reserved for future extensions */ 1922 if (config.flags) 1923 return -EINVAL; 1924 1925 switch (config.tx_type) { 1926 case HWTSTAMP_TX_OFF: 1927 case HWTSTAMP_TX_ON: 1928 break; 1929 default: 1930 return -ERANGE; 1931 } 1932 1933 switch (config.rx_filter) { 1934 case HWTSTAMP_FILTER_NONE: 1935 nic->hw_rx_tstamp = false; 1936 break; 1937 case HWTSTAMP_FILTER_ALL: 1938 case HWTSTAMP_FILTER_SOME: 1939 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 1940 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 1941 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 1942 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 1943 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 1944 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 1945 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 1946 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 1947 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 1948 case HWTSTAMP_FILTER_PTP_V2_EVENT: 1949 case HWTSTAMP_FILTER_PTP_V2_SYNC: 1950 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 1951 nic->hw_rx_tstamp = true; 1952 config.rx_filter = HWTSTAMP_FILTER_ALL; 1953 break; 1954 default: 1955 return -ERANGE; 1956 } 1957 1958 if (netif_running(netdev)) 1959 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp); 1960 1961 if (copy_to_user(ifr->ifr_data, &config, sizeof(config))) 1962 return -EFAULT; 1963 1964 return 0; 1965 } 1966 1967 static int nicvf_ioctl(struct net_device *netdev, struct ifreq *req, int cmd) 1968 { 1969 switch (cmd) { 1970 case SIOCSHWTSTAMP: 1971 return nicvf_config_hwtstamp(netdev, req); 1972 default: 1973 return -EOPNOTSUPP; 1974 } 1975 } 1976 1977 static void __nicvf_set_rx_mode_task(u8 mode, struct xcast_addr_list *mc_addrs, 1978 struct nicvf *nic) 1979 { 1980 union nic_mbx mbx = {}; 1981 int idx; 1982 1983 /* From the inside of VM code flow we have only 128 bits memory 1984 * available to send message to host's PF, so send all mc addrs 1985 * one by one, starting from flush command in case if kernel 1986 * requests to configure specific MAC filtering 1987 */ 1988 1989 /* flush DMAC filters and reset RX mode */ 1990 mbx.xcast.msg = NIC_MBOX_MSG_RESET_XCAST; 1991 if (nicvf_send_msg_to_pf(nic, &mbx) < 0) 1992 goto free_mc; 1993 1994 if (mode & BGX_XCAST_MCAST_FILTER) { 1995 /* once enabling filtering, we need to signal to PF to add 1996 * its' own LMAC to the filter to accept packets for it. 1997 */ 1998 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST; 1999 mbx.xcast.mac = 0; 2000 if (nicvf_send_msg_to_pf(nic, &mbx) < 0) 2001 goto free_mc; 2002 } 2003 2004 /* check if we have any specific MACs to be added to PF DMAC filter */ 2005 if (mc_addrs) { 2006 /* now go through kernel list of MACs and add them one by one */ 2007 for (idx = 0; idx < mc_addrs->count; idx++) { 2008 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST; 2009 mbx.xcast.mac = mc_addrs->mc[idx]; 2010 if (nicvf_send_msg_to_pf(nic, &mbx) < 0) 2011 goto free_mc; 2012 } 2013 } 2014 2015 /* and finally set rx mode for PF accordingly */ 2016 mbx.xcast.msg = NIC_MBOX_MSG_SET_XCAST; 2017 mbx.xcast.mode = mode; 2018 2019 nicvf_send_msg_to_pf(nic, &mbx); 2020 free_mc: 2021 kfree(mc_addrs); 2022 } 2023 2024 static void nicvf_set_rx_mode_task(struct work_struct *work_arg) 2025 { 2026 struct nicvf_work *vf_work = container_of(work_arg, struct nicvf_work, 2027 work); 2028 struct nicvf *nic = container_of(vf_work, struct nicvf, rx_mode_work); 2029 u8 mode; 2030 struct xcast_addr_list *mc; 2031 2032 if (!vf_work) 2033 return; 2034 2035 /* Save message data locally to prevent them from 2036 * being overwritten by next ndo_set_rx_mode call(). 2037 */ 2038 spin_lock_bh(&nic->rx_mode_wq_lock); 2039 mode = vf_work->mode; 2040 mc = vf_work->mc; 2041 vf_work->mc = NULL; 2042 spin_unlock_bh(&nic->rx_mode_wq_lock); 2043 2044 __nicvf_set_rx_mode_task(mode, mc, nic); 2045 } 2046 2047 static void nicvf_set_rx_mode(struct net_device *netdev) 2048 { 2049 struct nicvf *nic = netdev_priv(netdev); 2050 struct netdev_hw_addr *ha; 2051 struct xcast_addr_list *mc_list = NULL; 2052 u8 mode = 0; 2053 2054 if (netdev->flags & IFF_PROMISC) { 2055 mode = BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT; 2056 } else { 2057 if (netdev->flags & IFF_BROADCAST) 2058 mode |= BGX_XCAST_BCAST_ACCEPT; 2059 2060 if (netdev->flags & IFF_ALLMULTI) { 2061 mode |= BGX_XCAST_MCAST_ACCEPT; 2062 } else if (netdev->flags & IFF_MULTICAST) { 2063 mode |= BGX_XCAST_MCAST_FILTER; 2064 /* here we need to copy mc addrs */ 2065 if (netdev_mc_count(netdev)) { 2066 mc_list = kmalloc(struct_size(mc_list, mc, 2067 netdev_mc_count(netdev)), 2068 GFP_ATOMIC); 2069 if (unlikely(!mc_list)) 2070 return; 2071 mc_list->count = 0; 2072 netdev_hw_addr_list_for_each(ha, &netdev->mc) { 2073 mc_list->mc[mc_list->count] = 2074 ether_addr_to_u64(ha->addr); 2075 mc_list->count++; 2076 } 2077 } 2078 } 2079 } 2080 spin_lock(&nic->rx_mode_wq_lock); 2081 kfree(nic->rx_mode_work.mc); 2082 nic->rx_mode_work.mc = mc_list; 2083 nic->rx_mode_work.mode = mode; 2084 queue_work(nic->nicvf_rx_mode_wq, &nic->rx_mode_work.work); 2085 spin_unlock(&nic->rx_mode_wq_lock); 2086 } 2087 2088 static const struct net_device_ops nicvf_netdev_ops = { 2089 .ndo_open = nicvf_open, 2090 .ndo_stop = nicvf_stop, 2091 .ndo_start_xmit = nicvf_xmit, 2092 .ndo_change_mtu = nicvf_change_mtu, 2093 .ndo_set_mac_address = nicvf_set_mac_address, 2094 .ndo_get_stats64 = nicvf_get_stats64, 2095 .ndo_tx_timeout = nicvf_tx_timeout, 2096 .ndo_fix_features = nicvf_fix_features, 2097 .ndo_set_features = nicvf_set_features, 2098 .ndo_bpf = nicvf_xdp, 2099 .ndo_eth_ioctl = nicvf_ioctl, 2100 .ndo_set_rx_mode = nicvf_set_rx_mode, 2101 }; 2102 2103 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2104 { 2105 struct device *dev = &pdev->dev; 2106 struct net_device *netdev; 2107 struct nicvf *nic; 2108 int err, qcount; 2109 u16 sdevid; 2110 struct cavium_ptp *ptp_clock; 2111 2112 ptp_clock = cavium_ptp_get(); 2113 if (IS_ERR(ptp_clock)) { 2114 if (PTR_ERR(ptp_clock) == -ENODEV) 2115 /* In virtualized environment we proceed without ptp */ 2116 ptp_clock = NULL; 2117 else 2118 return PTR_ERR(ptp_clock); 2119 } 2120 2121 err = pci_enable_device(pdev); 2122 if (err) { 2123 dev_err(dev, "Failed to enable PCI device\n"); 2124 return err; 2125 } 2126 2127 err = pci_request_regions(pdev, DRV_NAME); 2128 if (err) { 2129 dev_err(dev, "PCI request regions failed 0x%x\n", err); 2130 goto err_disable_device; 2131 } 2132 2133 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); 2134 if (err) { 2135 dev_err(dev, "Unable to get usable DMA configuration\n"); 2136 goto err_release_regions; 2137 } 2138 2139 qcount = netif_get_num_default_rss_queues(); 2140 2141 /* Restrict multiqset support only for host bound VFs */ 2142 if (pdev->is_virtfn) { 2143 /* Set max number of queues per VF */ 2144 qcount = min_t(int, num_online_cpus(), 2145 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS); 2146 } 2147 2148 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount); 2149 if (!netdev) { 2150 err = -ENOMEM; 2151 goto err_release_regions; 2152 } 2153 2154 pci_set_drvdata(pdev, netdev); 2155 2156 SET_NETDEV_DEV(netdev, &pdev->dev); 2157 2158 nic = netdev_priv(netdev); 2159 nic->netdev = netdev; 2160 nic->pdev = pdev; 2161 nic->pnicvf = nic; 2162 nic->max_queues = qcount; 2163 /* If no of CPUs are too low, there won't be any queues left 2164 * for XDP_TX, hence double it. 2165 */ 2166 if (!nic->t88) 2167 nic->max_queues *= 2; 2168 nic->ptp_clock = ptp_clock; 2169 2170 /* Initialize mutex that serializes usage of VF's mailbox */ 2171 mutex_init(&nic->rx_mode_mtx); 2172 2173 /* MAP VF's configuration registers */ 2174 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); 2175 if (!nic->reg_base) { 2176 dev_err(dev, "Cannot map config register space, aborting\n"); 2177 err = -ENOMEM; 2178 goto err_free_netdev; 2179 } 2180 2181 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats); 2182 if (!nic->drv_stats) { 2183 err = -ENOMEM; 2184 goto err_free_netdev; 2185 } 2186 2187 err = nicvf_set_qset_resources(nic); 2188 if (err) 2189 goto err_free_netdev; 2190 2191 /* Check if PF is alive and get MAC address for this VF */ 2192 err = nicvf_register_misc_interrupt(nic); 2193 if (err) 2194 goto err_free_netdev; 2195 2196 nicvf_send_vf_struct(nic); 2197 2198 if (!pass1_silicon(nic->pdev)) 2199 nic->hw_tso = true; 2200 2201 /* Get iommu domain for iova to physical addr conversion */ 2202 nic->iommu_domain = iommu_get_domain_for_dev(dev); 2203 2204 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid); 2205 if (sdevid == 0xA134) 2206 nic->t88 = true; 2207 2208 /* Check if this VF is in QS only mode */ 2209 if (nic->sqs_mode) 2210 return 0; 2211 2212 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues); 2213 if (err) 2214 goto err_unregister_interrupts; 2215 2216 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_SG | 2217 NETIF_F_TSO | NETIF_F_GRO | NETIF_F_TSO6 | 2218 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 2219 NETIF_F_HW_VLAN_CTAG_RX); 2220 2221 netdev->hw_features |= NETIF_F_RXHASH; 2222 2223 netdev->features |= netdev->hw_features; 2224 netdev->hw_features |= NETIF_F_LOOPBACK; 2225 2226 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | 2227 NETIF_F_IPV6_CSUM | NETIF_F_TSO | NETIF_F_TSO6; 2228 2229 netdev->netdev_ops = &nicvf_netdev_ops; 2230 netdev->watchdog_timeo = NICVF_TX_TIMEOUT; 2231 2232 /* MTU range: 64 - 9200 */ 2233 netdev->min_mtu = NIC_HW_MIN_FRS; 2234 netdev->max_mtu = NIC_HW_MAX_FRS; 2235 2236 INIT_WORK(&nic->reset_task, nicvf_reset_task); 2237 2238 nic->nicvf_rx_mode_wq = alloc_ordered_workqueue("nicvf_rx_mode_wq_VF%d", 2239 WQ_MEM_RECLAIM, 2240 nic->vf_id); 2241 if (!nic->nicvf_rx_mode_wq) { 2242 err = -ENOMEM; 2243 dev_err(dev, "Failed to allocate work queue\n"); 2244 goto err_unregister_interrupts; 2245 } 2246 2247 INIT_WORK(&nic->rx_mode_work.work, nicvf_set_rx_mode_task); 2248 spin_lock_init(&nic->rx_mode_wq_lock); 2249 2250 err = register_netdev(netdev); 2251 if (err) { 2252 dev_err(dev, "Failed to register netdevice\n"); 2253 goto err_unregister_interrupts; 2254 } 2255 2256 nic->msg_enable = debug; 2257 2258 nicvf_set_ethtool_ops(netdev); 2259 2260 return 0; 2261 2262 err_unregister_interrupts: 2263 nicvf_unregister_interrupts(nic); 2264 err_free_netdev: 2265 pci_set_drvdata(pdev, NULL); 2266 if (nic->drv_stats) 2267 free_percpu(nic->drv_stats); 2268 free_netdev(netdev); 2269 err_release_regions: 2270 pci_release_regions(pdev); 2271 err_disable_device: 2272 pci_disable_device(pdev); 2273 return err; 2274 } 2275 2276 static void nicvf_remove(struct pci_dev *pdev) 2277 { 2278 struct net_device *netdev = pci_get_drvdata(pdev); 2279 struct nicvf *nic; 2280 struct net_device *pnetdev; 2281 2282 if (!netdev) 2283 return; 2284 2285 nic = netdev_priv(netdev); 2286 pnetdev = nic->pnicvf->netdev; 2287 2288 /* Check if this Qset is assigned to different VF. 2289 * If yes, clean primary and all secondary Qsets. 2290 */ 2291 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED)) 2292 unregister_netdev(pnetdev); 2293 if (nic->nicvf_rx_mode_wq) { 2294 destroy_workqueue(nic->nicvf_rx_mode_wq); 2295 nic->nicvf_rx_mode_wq = NULL; 2296 } 2297 nicvf_unregister_interrupts(nic); 2298 pci_set_drvdata(pdev, NULL); 2299 if (nic->drv_stats) 2300 free_percpu(nic->drv_stats); 2301 cavium_ptp_put(nic->ptp_clock); 2302 free_netdev(netdev); 2303 pci_release_regions(pdev); 2304 pci_disable_device(pdev); 2305 } 2306 2307 static void nicvf_shutdown(struct pci_dev *pdev) 2308 { 2309 nicvf_remove(pdev); 2310 } 2311 2312 static struct pci_driver nicvf_driver = { 2313 .name = DRV_NAME, 2314 .id_table = nicvf_id_table, 2315 .probe = nicvf_probe, 2316 .remove = nicvf_remove, 2317 .shutdown = nicvf_shutdown, 2318 }; 2319 2320 static int __init nicvf_init_module(void) 2321 { 2322 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION); 2323 return pci_register_driver(&nicvf_driver); 2324 } 2325 2326 static void __exit nicvf_cleanup_module(void) 2327 { 2328 pci_unregister_driver(&nicvf_driver); 2329 } 2330 2331 module_init(nicvf_init_module); 2332 module_exit(nicvf_cleanup_module); 2333