1f21fb3edSRaghu Vatsavayi /**********************************************************************
2f21fb3edSRaghu Vatsavayi * Author: Cavium, Inc.
3f21fb3edSRaghu Vatsavayi *
4f21fb3edSRaghu Vatsavayi * Contact: support@cavium.com
5f21fb3edSRaghu Vatsavayi * Please include "LiquidIO" in the subject.
6f21fb3edSRaghu Vatsavayi *
750579d3dSRaghu Vatsavayi * Copyright (c) 2003-2016 Cavium, Inc.
8f21fb3edSRaghu Vatsavayi *
9f21fb3edSRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify
10f21fb3edSRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as
11f21fb3edSRaghu Vatsavayi * published by the Free Software Foundation.
12f21fb3edSRaghu Vatsavayi *
13f21fb3edSRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but
14f21fb3edSRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15f21fb3edSRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16f21fb3edSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more
17f21fb3edSRaghu Vatsavayi * details.
18f21fb3edSRaghu Vatsavayi **********************************************************************/
19f21fb3edSRaghu Vatsavayi #include <linux/pci.h>
20f21fb3edSRaghu Vatsavayi #include <linux/netdevice.h>
21f21fb3edSRaghu Vatsavayi #include "liquidio_common.h"
22f21fb3edSRaghu Vatsavayi #include "octeon_droq.h"
23f21fb3edSRaghu Vatsavayi #include "octeon_iq.h"
24f21fb3edSRaghu Vatsavayi #include "response_manager.h"
25f21fb3edSRaghu Vatsavayi #include "octeon_device.h"
26f21fb3edSRaghu Vatsavayi #include "octeon_main.h"
27f21fb3edSRaghu Vatsavayi
28f21fb3edSRaghu Vatsavayi static void oct_poll_req_completion(struct work_struct *work);
29f21fb3edSRaghu Vatsavayi
octeon_setup_response_list(struct octeon_device * oct)30f21fb3edSRaghu Vatsavayi int octeon_setup_response_list(struct octeon_device *oct)
31f21fb3edSRaghu Vatsavayi {
32f21fb3edSRaghu Vatsavayi int i, ret = 0;
33f21fb3edSRaghu Vatsavayi struct cavium_wq *cwq;
34f21fb3edSRaghu Vatsavayi
35f21fb3edSRaghu Vatsavayi for (i = 0; i < MAX_RESPONSE_LISTS; i++) {
36f21fb3edSRaghu Vatsavayi INIT_LIST_HEAD(&oct->response_list[i].head);
37f21fb3edSRaghu Vatsavayi spin_lock_init(&oct->response_list[i].lock);
38f21fb3edSRaghu Vatsavayi atomic_set(&oct->response_list[i].pending_req_count, 0);
39f21fb3edSRaghu Vatsavayi }
4060441888SRaghu Vatsavayi spin_lock_init(&oct->cmd_resp_wqlock);
41f21fb3edSRaghu Vatsavayi
42523a61b4SBhaktipriya Shridhar oct->dma_comp_wq.wq = alloc_workqueue("dma-comp", WQ_MEM_RECLAIM, 0);
43f21fb3edSRaghu Vatsavayi if (!oct->dma_comp_wq.wq) {
44f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "failed to create wq thread\n");
45f21fb3edSRaghu Vatsavayi return -ENOMEM;
46f21fb3edSRaghu Vatsavayi }
47f21fb3edSRaghu Vatsavayi
48f21fb3edSRaghu Vatsavayi cwq = &oct->dma_comp_wq;
49f21fb3edSRaghu Vatsavayi INIT_DELAYED_WORK(&cwq->wk.work, oct_poll_req_completion);
50f21fb3edSRaghu Vatsavayi cwq->wk.ctxptr = oct;
5160441888SRaghu Vatsavayi oct->cmd_resp_state = OCT_DRV_ONLINE;
52f21fb3edSRaghu Vatsavayi
53f21fb3edSRaghu Vatsavayi return ret;
54f21fb3edSRaghu Vatsavayi }
55*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(octeon_setup_response_list);
56f21fb3edSRaghu Vatsavayi
octeon_delete_response_list(struct octeon_device * oct)57f21fb3edSRaghu Vatsavayi void octeon_delete_response_list(struct octeon_device *oct)
58f21fb3edSRaghu Vatsavayi {
59f21fb3edSRaghu Vatsavayi cancel_delayed_work_sync(&oct->dma_comp_wq.wk.work);
60f21fb3edSRaghu Vatsavayi destroy_workqueue(oct->dma_comp_wq.wq);
61f21fb3edSRaghu Vatsavayi }
62*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(octeon_delete_response_list);
63f21fb3edSRaghu Vatsavayi
lio_process_ordered_list(struct octeon_device * octeon_dev,u32 force_quit)64f21fb3edSRaghu Vatsavayi int lio_process_ordered_list(struct octeon_device *octeon_dev,
65f21fb3edSRaghu Vatsavayi u32 force_quit)
66f21fb3edSRaghu Vatsavayi {
67f21fb3edSRaghu Vatsavayi struct octeon_response_list *ordered_sc_list;
68f21fb3edSRaghu Vatsavayi struct octeon_soft_command *sc;
69f21fb3edSRaghu Vatsavayi int request_complete = 0;
70f21fb3edSRaghu Vatsavayi int resp_to_process = MAX_ORD_REQS_TO_PROCESS;
71f21fb3edSRaghu Vatsavayi u32 status;
72f21fb3edSRaghu Vatsavayi u64 status64;
73f21fb3edSRaghu Vatsavayi
74c9aec052SFelix Manlunas octeon_free_sc_done_list(octeon_dev);
75c9aec052SFelix Manlunas
76f21fb3edSRaghu Vatsavayi ordered_sc_list = &octeon_dev->response_list[OCTEON_ORDERED_SC_LIST];
77f21fb3edSRaghu Vatsavayi
78f21fb3edSRaghu Vatsavayi do {
79f21fb3edSRaghu Vatsavayi spin_lock_bh(&ordered_sc_list->lock);
80f21fb3edSRaghu Vatsavayi
81b229487bSRick Farrington if (list_empty(&ordered_sc_list->head)) {
82763185a3SRaghu Vatsavayi spin_unlock_bh(&ordered_sc_list->lock);
83f21fb3edSRaghu Vatsavayi return 1;
84f21fb3edSRaghu Vatsavayi }
85f21fb3edSRaghu Vatsavayi
86b229487bSRick Farrington sc = list_first_entry(&ordered_sc_list->head,
87b229487bSRick Farrington struct octeon_soft_command, node);
88f21fb3edSRaghu Vatsavayi
89f21fb3edSRaghu Vatsavayi status = OCTEON_REQUEST_PENDING;
90f21fb3edSRaghu Vatsavayi
91f21fb3edSRaghu Vatsavayi /* check if octeon has finished DMA'ing a response
92f21fb3edSRaghu Vatsavayi * to where rptr is pointing to
93f21fb3edSRaghu Vatsavayi */
94f21fb3edSRaghu Vatsavayi status64 = *sc->status_word;
95f21fb3edSRaghu Vatsavayi
96f21fb3edSRaghu Vatsavayi if (status64 != COMPLETION_WORD_INIT) {
97b229487bSRick Farrington /* This logic ensures that all 64b have been written.
98b229487bSRick Farrington * 1. check byte 0 for non-FF
99b229487bSRick Farrington * 2. if non-FF, then swap result from BE to host order
100b229487bSRick Farrington * 3. check byte 7 (swapped to 0) for non-FF
101b229487bSRick Farrington * 4. if non-FF, use the low 32-bit status code
102b229487bSRick Farrington * 5. if either byte 0 or byte 7 is FF, don't use status
103b229487bSRick Farrington */
104f21fb3edSRaghu Vatsavayi if ((status64 & 0xff) != 0xff) {
105f21fb3edSRaghu Vatsavayi octeon_swap_8B_data(&status64, 1);
106f21fb3edSRaghu Vatsavayi if (((status64 & 0xff) != 0xff)) {
1079549c6c8SRick Farrington /* retrieve 16-bit firmware status */
1089549c6c8SRick Farrington status = (u32)(status64 & 0xffffULL);
1099549c6c8SRick Farrington if (status) {
1109549c6c8SRick Farrington status =
1119549c6c8SRick Farrington FIRMWARE_STATUS_CODE(status);
1129549c6c8SRick Farrington } else {
1139549c6c8SRick Farrington /* i.e. no error */
1149549c6c8SRick Farrington status = OCTEON_REQUEST_DONE;
1159549c6c8SRick Farrington }
116f21fb3edSRaghu Vatsavayi }
117f21fb3edSRaghu Vatsavayi }
118c9aec052SFelix Manlunas } else if (unlikely(force_quit) || (sc->expiry_time &&
119c9aec052SFelix Manlunas time_after(jiffies, (unsigned long)sc->expiry_time))) {
120c9aec052SFelix Manlunas struct octeon_instr_irh *irh =
121c9aec052SFelix Manlunas (struct octeon_instr_irh *)&sc->cmd.cmd3.irh;
122c9aec052SFelix Manlunas
123c9aec052SFelix Manlunas dev_err(&octeon_dev->pci_dev->dev, "%s: ", __func__);
124c9aec052SFelix Manlunas dev_err(&octeon_dev->pci_dev->dev,
125c9aec052SFelix Manlunas "cmd %x/%x/%llx/%llx failed, ",
126c9aec052SFelix Manlunas irh->opcode, irh->subcode,
127c9aec052SFelix Manlunas sc->cmd.cmd3.ossp[0], sc->cmd.cmd3.ossp[1]);
128c9aec052SFelix Manlunas dev_err(&octeon_dev->pci_dev->dev,
129c9aec052SFelix Manlunas "timeout (%ld, %ld)\n",
130c9aec052SFelix Manlunas (long)jiffies, (long)sc->expiry_time);
131f21fb3edSRaghu Vatsavayi status = OCTEON_REQUEST_TIMEOUT;
132f21fb3edSRaghu Vatsavayi }
133f21fb3edSRaghu Vatsavayi
134f21fb3edSRaghu Vatsavayi if (status != OCTEON_REQUEST_PENDING) {
135c9aec052SFelix Manlunas sc->sc_status = status;
136c9aec052SFelix Manlunas
137f21fb3edSRaghu Vatsavayi /* we have received a response or we have timed out */
138f21fb3edSRaghu Vatsavayi /* remove node from linked list */
139f21fb3edSRaghu Vatsavayi list_del(&sc->node);
140f21fb3edSRaghu Vatsavayi atomic_dec(&octeon_dev->response_list
141f21fb3edSRaghu Vatsavayi [OCTEON_ORDERED_SC_LIST].
142f21fb3edSRaghu Vatsavayi pending_req_count);
143f21fb3edSRaghu Vatsavayi
144c9aec052SFelix Manlunas if (!sc->callback) {
145c9aec052SFelix Manlunas atomic_inc(&octeon_dev->response_list
146c9aec052SFelix Manlunas [OCTEON_DONE_SC_LIST].
147c9aec052SFelix Manlunas pending_req_count);
148c9aec052SFelix Manlunas list_add_tail(&sc->node,
149c9aec052SFelix Manlunas &octeon_dev->response_list
150c9aec052SFelix Manlunas [OCTEON_DONE_SC_LIST].head);
151c9aec052SFelix Manlunas
152c9aec052SFelix Manlunas if (unlikely(READ_ONCE(sc->caller_is_done))) {
153c9aec052SFelix Manlunas /* caller does not wait for response
154c9aec052SFelix Manlunas * from firmware
155c9aec052SFelix Manlunas */
156c9aec052SFelix Manlunas if (status != OCTEON_REQUEST_DONE) {
157c9aec052SFelix Manlunas struct octeon_instr_irh *irh;
158c9aec052SFelix Manlunas
159c9aec052SFelix Manlunas irh =
160c9aec052SFelix Manlunas (struct octeon_instr_irh *)
161c9aec052SFelix Manlunas &sc->cmd.cmd3.irh;
162c9aec052SFelix Manlunas dev_dbg
163c9aec052SFelix Manlunas (&octeon_dev->pci_dev->dev,
164c9aec052SFelix Manlunas "%s: sc failed: opcode=%x, ",
165c9aec052SFelix Manlunas __func__, irh->opcode);
166c9aec052SFelix Manlunas dev_dbg
167c9aec052SFelix Manlunas (&octeon_dev->pci_dev->dev,
168c9aec052SFelix Manlunas "subcode=%x, ossp[0]=%llx, ",
169c9aec052SFelix Manlunas irh->subcode,
170c9aec052SFelix Manlunas sc->cmd.cmd3.ossp[0]);
171c9aec052SFelix Manlunas dev_dbg
172c9aec052SFelix Manlunas (&octeon_dev->pci_dev->dev,
173c9aec052SFelix Manlunas "ossp[1]=%llx, status=%d\n",
174c9aec052SFelix Manlunas sc->cmd.cmd3.ossp[1],
175c9aec052SFelix Manlunas status);
176c9aec052SFelix Manlunas }
177c9aec052SFelix Manlunas } else {
178c9aec052SFelix Manlunas complete(&sc->complete);
179c9aec052SFelix Manlunas }
180c9aec052SFelix Manlunas
181c9aec052SFelix Manlunas spin_unlock_bh(&ordered_sc_list->lock);
182c9aec052SFelix Manlunas } else {
183c9aec052SFelix Manlunas /* sc with callback function */
184c9aec052SFelix Manlunas if (status == OCTEON_REQUEST_TIMEOUT) {
185c9aec052SFelix Manlunas atomic_inc(&octeon_dev->response_list
186c9aec052SFelix Manlunas [OCTEON_ZOMBIE_SC_LIST].
187c9aec052SFelix Manlunas pending_req_count);
188c9aec052SFelix Manlunas list_add_tail(&sc->node,
189c9aec052SFelix Manlunas &octeon_dev->response_list
190c9aec052SFelix Manlunas [OCTEON_ZOMBIE_SC_LIST].
191c9aec052SFelix Manlunas head);
192c9aec052SFelix Manlunas }
193c9aec052SFelix Manlunas
194c9aec052SFelix Manlunas spin_unlock_bh(&ordered_sc_list->lock);
195c9aec052SFelix Manlunas
196f21fb3edSRaghu Vatsavayi sc->callback(octeon_dev, status,
197f21fb3edSRaghu Vatsavayi sc->callback_arg);
198c9aec052SFelix Manlunas /* sc is freed by caller */
199c9aec052SFelix Manlunas }
200f21fb3edSRaghu Vatsavayi
201f21fb3edSRaghu Vatsavayi request_complete++;
202f21fb3edSRaghu Vatsavayi
203f21fb3edSRaghu Vatsavayi } else {
204f21fb3edSRaghu Vatsavayi /* no response yet */
205f21fb3edSRaghu Vatsavayi request_complete = 0;
206f21fb3edSRaghu Vatsavayi spin_unlock_bh
207f21fb3edSRaghu Vatsavayi (&ordered_sc_list->lock);
208f21fb3edSRaghu Vatsavayi }
209f21fb3edSRaghu Vatsavayi
210f21fb3edSRaghu Vatsavayi /* If we hit the Max Ordered requests to process every loop,
211f21fb3edSRaghu Vatsavayi * we quit
212f21fb3edSRaghu Vatsavayi * and let this function be invoked the next time the poll
213f21fb3edSRaghu Vatsavayi * thread runs
214f21fb3edSRaghu Vatsavayi * to process the remaining requests. This function can take up
215f21fb3edSRaghu Vatsavayi * the entire CPU if there is no upper limit to the requests
216f21fb3edSRaghu Vatsavayi * processed.
217f21fb3edSRaghu Vatsavayi */
218f21fb3edSRaghu Vatsavayi if (request_complete >= resp_to_process)
219f21fb3edSRaghu Vatsavayi break;
220f21fb3edSRaghu Vatsavayi } while (request_complete);
221f21fb3edSRaghu Vatsavayi
222f21fb3edSRaghu Vatsavayi return 0;
223f21fb3edSRaghu Vatsavayi }
224*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(lio_process_ordered_list);
225f21fb3edSRaghu Vatsavayi
oct_poll_req_completion(struct work_struct * work)226f21fb3edSRaghu Vatsavayi static void oct_poll_req_completion(struct work_struct *work)
227f21fb3edSRaghu Vatsavayi {
228f21fb3edSRaghu Vatsavayi struct cavium_wk *wk = (struct cavium_wk *)work;
229f21fb3edSRaghu Vatsavayi struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
230f21fb3edSRaghu Vatsavayi struct cavium_wq *cwq = &oct->dma_comp_wq;
231f21fb3edSRaghu Vatsavayi
232f21fb3edSRaghu Vatsavayi lio_process_ordered_list(oct, 0);
233cecd8d81SPrasad Kanneganti
234cecd8d81SPrasad Kanneganti if (atomic_read(&oct->response_list
235cecd8d81SPrasad Kanneganti [OCTEON_ORDERED_SC_LIST].pending_req_count))
236cecd8d81SPrasad Kanneganti queue_delayed_work(cwq->wq, &cwq->wk.work, msecs_to_jiffies(1));
237f21fb3edSRaghu Vatsavayi }
238