1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/pci.h> 19 #include <linux/netdevice.h> 20 #include "liquidio_common.h" 21 #include "octeon_droq.h" 22 #include "octeon_iq.h" 23 #include "response_manager.h" 24 #include "octeon_device.h" 25 #include "octeon_main.h" 26 #include "octeon_mailbox.h" 27 28 /** 29 * octeon_mbox_read: 30 * @oct: Pointer mailbox 31 * 32 * Reads the 8-bytes of data from the mbox register 33 * Writes back the acknowldgement inidcating completion of read 34 */ 35 int octeon_mbox_read(struct octeon_mbox *mbox) 36 { 37 union octeon_mbox_message msg; 38 int ret = 0; 39 40 spin_lock(&mbox->lock); 41 42 msg.u64 = readq(mbox->mbox_read_reg); 43 44 if ((msg.u64 == OCTEON_PFVFACK) || (msg.u64 == OCTEON_PFVFSIG)) { 45 spin_unlock(&mbox->lock); 46 return 0; 47 } 48 49 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { 50 mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64; 51 mbox->mbox_req.recv_len++; 52 } else { 53 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { 54 mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] = 55 msg.u64; 56 mbox->mbox_resp.recv_len++; 57 } else { 58 if ((mbox->state & OCTEON_MBOX_STATE_IDLE) && 59 (msg.s.type == OCTEON_MBOX_REQUEST)) { 60 mbox->state &= ~OCTEON_MBOX_STATE_IDLE; 61 mbox->state |= 62 OCTEON_MBOX_STATE_REQUEST_RECEIVING; 63 mbox->mbox_req.msg.u64 = msg.u64; 64 mbox->mbox_req.q_no = mbox->q_no; 65 mbox->mbox_req.recv_len = 1; 66 } else { 67 if ((mbox->state & 68 OCTEON_MBOX_STATE_RESPONSE_PENDING) && 69 (msg.s.type == OCTEON_MBOX_RESPONSE)) { 70 mbox->state &= 71 ~OCTEON_MBOX_STATE_RESPONSE_PENDING; 72 mbox->state |= 73 OCTEON_MBOX_STATE_RESPONSE_RECEIVING 74 ; 75 mbox->mbox_resp.msg.u64 = msg.u64; 76 mbox->mbox_resp.q_no = mbox->q_no; 77 mbox->mbox_resp.recv_len = 1; 78 } else { 79 writeq(OCTEON_PFVFERR, 80 mbox->mbox_read_reg); 81 mbox->state |= OCTEON_MBOX_STATE_ERROR; 82 spin_unlock(&mbox->lock); 83 return 1; 84 } 85 } 86 } 87 } 88 89 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { 90 if (mbox->mbox_req.recv_len < mbox->mbox_req.msg.s.len) { 91 ret = 0; 92 } else { 93 mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVING; 94 mbox->state |= OCTEON_MBOX_STATE_REQUEST_RECEIVED; 95 ret = 1; 96 } 97 } else { 98 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { 99 if (mbox->mbox_resp.recv_len < 100 mbox->mbox_resp.msg.s.len) { 101 ret = 0; 102 } else { 103 mbox->state &= 104 ~OCTEON_MBOX_STATE_RESPONSE_RECEIVING; 105 mbox->state |= 106 OCTEON_MBOX_STATE_RESPONSE_RECEIVED; 107 ret = 1; 108 } 109 } else { 110 WARN_ON(1); 111 } 112 } 113 114 writeq(OCTEON_PFVFACK, mbox->mbox_read_reg); 115 116 spin_unlock(&mbox->lock); 117 118 return ret; 119 } 120 121 /** 122 * octeon_mbox_write: 123 * @oct: Pointer Octeon Device 124 * @mbox_cmd: Cmd to send to mailbox. 125 * 126 * Populates the queue specific mbox structure 127 * with cmd information. 128 * Write the cmd to mbox register 129 */ 130 int octeon_mbox_write(struct octeon_device *oct, 131 struct octeon_mbox_cmd *mbox_cmd) 132 { 133 struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no]; 134 u32 count, i, ret = OCTEON_MBOX_STATUS_SUCCESS; 135 long timeout = LIO_MBOX_WRITE_WAIT_TIME; 136 unsigned long flags; 137 138 spin_lock_irqsave(&mbox->lock, flags); 139 140 if ((mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) && 141 !(mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED)) { 142 spin_unlock_irqrestore(&mbox->lock, flags); 143 return OCTEON_MBOX_STATUS_FAILED; 144 } 145 146 if ((mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) && 147 !(mbox->state & OCTEON_MBOX_STATE_IDLE)) { 148 spin_unlock_irqrestore(&mbox->lock, flags); 149 return OCTEON_MBOX_STATUS_BUSY; 150 } 151 152 if (mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) { 153 memcpy(&mbox->mbox_resp, mbox_cmd, 154 sizeof(struct octeon_mbox_cmd)); 155 mbox->state = OCTEON_MBOX_STATE_RESPONSE_PENDING; 156 } 157 158 spin_unlock_irqrestore(&mbox->lock, flags); 159 160 count = 0; 161 162 while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) { 163 schedule_timeout_uninterruptible(timeout); 164 if (count++ == LIO_MBOX_WRITE_WAIT_CNT) { 165 ret = OCTEON_MBOX_STATUS_FAILED; 166 break; 167 } 168 } 169 170 if (ret == OCTEON_MBOX_STATUS_SUCCESS) { 171 writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg); 172 for (i = 0; i < (u32)(mbox_cmd->msg.s.len - 1); i++) { 173 count = 0; 174 while (readq(mbox->mbox_write_reg) != 175 OCTEON_PFVFACK) { 176 schedule_timeout_uninterruptible(timeout); 177 if (count++ == LIO_MBOX_WRITE_WAIT_CNT) { 178 ret = OCTEON_MBOX_STATUS_FAILED; 179 break; 180 } 181 } 182 if (ret == OCTEON_MBOX_STATUS_SUCCESS) 183 writeq(mbox_cmd->data[i], mbox->mbox_write_reg); 184 else 185 break; 186 } 187 } 188 189 spin_lock_irqsave(&mbox->lock, flags); 190 if (mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) { 191 mbox->state = OCTEON_MBOX_STATE_IDLE; 192 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 193 } else { 194 if ((!mbox_cmd->msg.s.resp_needed) || 195 (ret == OCTEON_MBOX_STATUS_FAILED)) { 196 mbox->state &= ~OCTEON_MBOX_STATE_RESPONSE_PENDING; 197 if (!(mbox->state & 198 (OCTEON_MBOX_STATE_REQUEST_RECEIVING | 199 OCTEON_MBOX_STATE_REQUEST_RECEIVED))) 200 mbox->state = OCTEON_MBOX_STATE_IDLE; 201 } 202 } 203 spin_unlock_irqrestore(&mbox->lock, flags); 204 205 return ret; 206 } 207 208 /** 209 * octeon_mbox_process_cmd: 210 * @mbox: Pointer mailbox 211 * @mbox_cmd: Pointer to command received 212 * 213 * Process the cmd received in mbox 214 */ 215 static int octeon_mbox_process_cmd(struct octeon_mbox *mbox, 216 struct octeon_mbox_cmd *mbox_cmd) 217 { 218 struct octeon_device *oct = mbox->oct_dev; 219 220 switch (mbox_cmd->msg.s.cmd) { 221 case OCTEON_VF_ACTIVE: 222 dev_dbg(&oct->pci_dev->dev, "got vfactive sending data back\n"); 223 mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE; 224 mbox_cmd->msg.s.resp_needed = 1; 225 mbox_cmd->msg.s.len = 2; 226 mbox_cmd->data[0] = 0; /* VF version is in mbox_cmd->data[0] */ 227 ((struct lio_version *)&mbox_cmd->data[0])->major = 228 LIQUIDIO_BASE_MAJOR_VERSION; 229 ((struct lio_version *)&mbox_cmd->data[0])->minor = 230 LIQUIDIO_BASE_MINOR_VERSION; 231 ((struct lio_version *)&mbox_cmd->data[0])->micro = 232 LIQUIDIO_BASE_MICRO_VERSION; 233 memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6); 234 /* Sending core cofig info to the corresponding active VF.*/ 235 octeon_mbox_write(oct, mbox_cmd); 236 break; 237 238 case OCTEON_VF_FLR_REQUEST: 239 dev_info(&oct->pci_dev->dev, 240 "got a request for FLR from VF that owns DPI ring %u\n", 241 mbox->q_no); 242 pcie_capability_set_word( 243 oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no], 244 PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); 245 break; 246 247 case OCTEON_PF_CHANGED_VF_MACADDR: 248 if (OCTEON_CN23XX_VF(oct)) 249 octeon_pf_changed_vf_macaddr(oct, 250 mbox_cmd->msg.s.params); 251 break; 252 253 default: 254 break; 255 } 256 return 0; 257 } 258 259 /** 260 *octeon_mbox_process_message: 261 * 262 * Process the received mbox message. 263 */ 264 int octeon_mbox_process_message(struct octeon_mbox *mbox) 265 { 266 struct octeon_mbox_cmd mbox_cmd; 267 unsigned long flags; 268 269 spin_lock_irqsave(&mbox->lock, flags); 270 271 if (mbox->state & OCTEON_MBOX_STATE_ERROR) { 272 if (mbox->state & (OCTEON_MBOX_STATE_RESPONSE_PENDING | 273 OCTEON_MBOX_STATE_RESPONSE_RECEIVING)) { 274 memcpy(&mbox_cmd, &mbox->mbox_resp, 275 sizeof(struct octeon_mbox_cmd)); 276 mbox->state = OCTEON_MBOX_STATE_IDLE; 277 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 278 spin_unlock_irqrestore(&mbox->lock, flags); 279 mbox_cmd.recv_status = 1; 280 if (mbox_cmd.fn) 281 mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, 282 mbox_cmd.fn_arg); 283 return 0; 284 } 285 286 mbox->state = OCTEON_MBOX_STATE_IDLE; 287 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 288 spin_unlock_irqrestore(&mbox->lock, flags); 289 return 0; 290 } 291 292 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVED) { 293 memcpy(&mbox_cmd, &mbox->mbox_resp, 294 sizeof(struct octeon_mbox_cmd)); 295 mbox->state = OCTEON_MBOX_STATE_IDLE; 296 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 297 spin_unlock_irqrestore(&mbox->lock, flags); 298 mbox_cmd.recv_status = 0; 299 if (mbox_cmd.fn) 300 mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, mbox_cmd.fn_arg); 301 return 0; 302 } 303 304 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED) { 305 memcpy(&mbox_cmd, &mbox->mbox_req, 306 sizeof(struct octeon_mbox_cmd)); 307 if (!mbox_cmd.msg.s.resp_needed) { 308 mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVED; 309 if (!(mbox->state & 310 OCTEON_MBOX_STATE_RESPONSE_PENDING)) 311 mbox->state = OCTEON_MBOX_STATE_IDLE; 312 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 313 } 314 315 spin_unlock_irqrestore(&mbox->lock, flags); 316 octeon_mbox_process_cmd(mbox, &mbox_cmd); 317 return 0; 318 } 319 320 spin_unlock_irqrestore(&mbox->lock, flags); 321 WARN_ON(1); 322 323 return 0; 324 } 325