1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/pci.h> 19 #include <linux/netdevice.h> 20 #include "liquidio_common.h" 21 #include "octeon_droq.h" 22 #include "octeon_iq.h" 23 #include "response_manager.h" 24 #include "octeon_device.h" 25 #include "octeon_main.h" 26 #include "octeon_mailbox.h" 27 28 /** 29 * octeon_mbox_read: 30 * @oct: Pointer mailbox 31 * 32 * Reads the 8-bytes of data from the mbox register 33 * Writes back the acknowldgement inidcating completion of read 34 */ 35 int octeon_mbox_read(struct octeon_mbox *mbox) 36 { 37 union octeon_mbox_message msg; 38 int ret = 0; 39 40 spin_lock(&mbox->lock); 41 42 msg.u64 = readq(mbox->mbox_read_reg); 43 44 if ((msg.u64 == OCTEON_PFVFACK) || (msg.u64 == OCTEON_PFVFSIG)) { 45 spin_unlock(&mbox->lock); 46 return 0; 47 } 48 49 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { 50 mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64; 51 mbox->mbox_req.recv_len++; 52 } else { 53 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { 54 mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] = 55 msg.u64; 56 mbox->mbox_resp.recv_len++; 57 } else { 58 if ((mbox->state & OCTEON_MBOX_STATE_IDLE) && 59 (msg.s.type == OCTEON_MBOX_REQUEST)) { 60 mbox->state &= ~OCTEON_MBOX_STATE_IDLE; 61 mbox->state |= 62 OCTEON_MBOX_STATE_REQUEST_RECEIVING; 63 mbox->mbox_req.msg.u64 = msg.u64; 64 mbox->mbox_req.q_no = mbox->q_no; 65 mbox->mbox_req.recv_len = 1; 66 } else { 67 if ((mbox->state & 68 OCTEON_MBOX_STATE_RESPONSE_PENDING) && 69 (msg.s.type == OCTEON_MBOX_RESPONSE)) { 70 mbox->state &= 71 ~OCTEON_MBOX_STATE_RESPONSE_PENDING; 72 mbox->state |= 73 OCTEON_MBOX_STATE_RESPONSE_RECEIVING 74 ; 75 mbox->mbox_resp.msg.u64 = msg.u64; 76 mbox->mbox_resp.q_no = mbox->q_no; 77 mbox->mbox_resp.recv_len = 1; 78 } else { 79 writeq(OCTEON_PFVFERR, 80 mbox->mbox_read_reg); 81 mbox->state |= OCTEON_MBOX_STATE_ERROR; 82 spin_unlock(&mbox->lock); 83 return 1; 84 } 85 } 86 } 87 } 88 89 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { 90 if (mbox->mbox_req.recv_len < msg.s.len) { 91 ret = 0; 92 } else { 93 mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVING; 94 mbox->state |= OCTEON_MBOX_STATE_REQUEST_RECEIVED; 95 ret = 1; 96 } 97 } else { 98 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { 99 if (mbox->mbox_resp.recv_len < msg.s.len) { 100 ret = 0; 101 } else { 102 mbox->state &= 103 ~OCTEON_MBOX_STATE_RESPONSE_RECEIVING; 104 mbox->state |= 105 OCTEON_MBOX_STATE_RESPONSE_RECEIVED; 106 ret = 1; 107 } 108 } else { 109 WARN_ON(1); 110 } 111 } 112 113 writeq(OCTEON_PFVFACK, mbox->mbox_read_reg); 114 115 spin_unlock(&mbox->lock); 116 117 return ret; 118 } 119 120 /** 121 * octeon_mbox_write: 122 * @oct: Pointer Octeon Device 123 * @mbox_cmd: Cmd to send to mailbox. 124 * 125 * Populates the queue specific mbox structure 126 * with cmd information. 127 * Write the cmd to mbox register 128 */ 129 int octeon_mbox_write(struct octeon_device *oct, 130 struct octeon_mbox_cmd *mbox_cmd) 131 { 132 struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no]; 133 u32 count, i, ret = OCTEON_MBOX_STATUS_SUCCESS; 134 unsigned long flags; 135 136 spin_lock_irqsave(&mbox->lock, flags); 137 138 if ((mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) && 139 !(mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED)) { 140 spin_unlock_irqrestore(&mbox->lock, flags); 141 return OCTEON_MBOX_STATUS_FAILED; 142 } 143 144 if ((mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) && 145 !(mbox->state & OCTEON_MBOX_STATE_IDLE)) { 146 spin_unlock_irqrestore(&mbox->lock, flags); 147 return OCTEON_MBOX_STATUS_BUSY; 148 } 149 150 if (mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) { 151 memcpy(&mbox->mbox_resp, mbox_cmd, 152 sizeof(struct octeon_mbox_cmd)); 153 mbox->state = OCTEON_MBOX_STATE_RESPONSE_PENDING; 154 } 155 156 spin_unlock_irqrestore(&mbox->lock, flags); 157 158 count = 0; 159 160 while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) { 161 schedule_timeout_uninterruptible(LIO_MBOX_WRITE_WAIT_TIME); 162 if (count++ == LIO_MBOX_WRITE_WAIT_CNT) { 163 ret = OCTEON_MBOX_STATUS_FAILED; 164 break; 165 } 166 } 167 168 if (ret == OCTEON_MBOX_STATUS_SUCCESS) { 169 writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg); 170 for (i = 0; i < (u32)(mbox_cmd->msg.s.len - 1); i++) { 171 count = 0; 172 while (readq(mbox->mbox_write_reg) != 173 OCTEON_PFVFACK) { 174 schedule_timeout_uninterruptible(10); 175 if (count++ == LIO_MBOX_WRITE_WAIT_CNT) { 176 ret = OCTEON_MBOX_STATUS_FAILED; 177 break; 178 } 179 } 180 writeq(mbox_cmd->data[i], mbox->mbox_write_reg); 181 } 182 } 183 184 spin_lock_irqsave(&mbox->lock, flags); 185 if (mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) { 186 mbox->state = OCTEON_MBOX_STATE_IDLE; 187 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 188 } else { 189 if ((!mbox_cmd->msg.s.resp_needed) || 190 (ret == OCTEON_MBOX_STATUS_FAILED)) { 191 mbox->state &= ~OCTEON_MBOX_STATE_RESPONSE_PENDING; 192 if (!(mbox->state & 193 (OCTEON_MBOX_STATE_REQUEST_RECEIVING | 194 OCTEON_MBOX_STATE_REQUEST_RECEIVED))) 195 mbox->state = OCTEON_MBOX_STATE_IDLE; 196 } 197 } 198 spin_unlock_irqrestore(&mbox->lock, flags); 199 200 return ret; 201 } 202 203 /** 204 * octeon_mbox_process_cmd: 205 * @mbox: Pointer mailbox 206 * @mbox_cmd: Pointer to command received 207 * 208 * Process the cmd received in mbox 209 */ 210 static int octeon_mbox_process_cmd(struct octeon_mbox *mbox, 211 struct octeon_mbox_cmd *mbox_cmd) 212 { 213 struct octeon_device *oct = mbox->oct_dev; 214 215 switch (mbox_cmd->msg.s.cmd) { 216 case OCTEON_VF_ACTIVE: 217 dev_dbg(&oct->pci_dev->dev, "got vfactive sending data back\n"); 218 mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE; 219 mbox_cmd->msg.s.resp_needed = 1; 220 mbox_cmd->msg.s.len = 2; 221 mbox_cmd->data[0] = 0; /* VF version is in mbox_cmd->data[0] */ 222 ((struct lio_version *)&mbox_cmd->data[0])->major = 223 LIQUIDIO_BASE_MAJOR_VERSION; 224 ((struct lio_version *)&mbox_cmd->data[0])->minor = 225 LIQUIDIO_BASE_MINOR_VERSION; 226 ((struct lio_version *)&mbox_cmd->data[0])->micro = 227 LIQUIDIO_BASE_MICRO_VERSION; 228 memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6); 229 /* Sending core cofig info to the corresponding active VF.*/ 230 octeon_mbox_write(oct, mbox_cmd); 231 break; 232 233 case OCTEON_VF_FLR_REQUEST: 234 dev_info(&oct->pci_dev->dev, 235 "got a request for FLR from VF that owns DPI ring %u\n", 236 mbox->q_no); 237 pcie_capability_set_word( 238 oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no], 239 PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); 240 break; 241 242 case OCTEON_PF_CHANGED_VF_MACADDR: 243 if (OCTEON_CN23XX_VF(oct)) 244 octeon_pf_changed_vf_macaddr(oct, 245 mbox_cmd->msg.s.params); 246 break; 247 248 default: 249 break; 250 } 251 return 0; 252 } 253 254 /** 255 *octeon_mbox_process_message: 256 * 257 * Process the received mbox message. 258 */ 259 int octeon_mbox_process_message(struct octeon_mbox *mbox) 260 { 261 struct octeon_mbox_cmd mbox_cmd; 262 unsigned long flags; 263 264 spin_lock_irqsave(&mbox->lock, flags); 265 266 if (mbox->state & OCTEON_MBOX_STATE_ERROR) { 267 if (mbox->state & (OCTEON_MBOX_STATE_RESPONSE_PENDING | 268 OCTEON_MBOX_STATE_RESPONSE_RECEIVING)) { 269 memcpy(&mbox_cmd, &mbox->mbox_resp, 270 sizeof(struct octeon_mbox_cmd)); 271 mbox->state = OCTEON_MBOX_STATE_IDLE; 272 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 273 spin_unlock_irqrestore(&mbox->lock, flags); 274 mbox_cmd.recv_status = 1; 275 if (mbox_cmd.fn) 276 mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, 277 mbox_cmd.fn_arg); 278 return 0; 279 } 280 281 mbox->state = OCTEON_MBOX_STATE_IDLE; 282 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 283 spin_unlock_irqrestore(&mbox->lock, flags); 284 return 0; 285 } 286 287 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVED) { 288 memcpy(&mbox_cmd, &mbox->mbox_resp, 289 sizeof(struct octeon_mbox_cmd)); 290 mbox->state = OCTEON_MBOX_STATE_IDLE; 291 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 292 spin_unlock_irqrestore(&mbox->lock, flags); 293 mbox_cmd.recv_status = 0; 294 if (mbox_cmd.fn) 295 mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, mbox_cmd.fn_arg); 296 return 0; 297 } 298 299 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED) { 300 memcpy(&mbox_cmd, &mbox->mbox_req, 301 sizeof(struct octeon_mbox_cmd)); 302 if (!mbox_cmd.msg.s.resp_needed) { 303 mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVED; 304 if (!(mbox->state & 305 OCTEON_MBOX_STATE_RESPONSE_PENDING)) 306 mbox->state = OCTEON_MBOX_STATE_IDLE; 307 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 308 } 309 310 spin_unlock_irqrestore(&mbox->lock, flags); 311 octeon_mbox_process_cmd(mbox, &mbox_cmd); 312 return 0; 313 } 314 315 WARN_ON(1); 316 317 return 0; 318 } 319