1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/pci.h> 19 #include <linux/netdevice.h> 20 #include "liquidio_common.h" 21 #include "octeon_droq.h" 22 #include "octeon_iq.h" 23 #include "response_manager.h" 24 #include "octeon_device.h" 25 #include "octeon_main.h" 26 #include "octeon_mailbox.h" 27 28 /** 29 * octeon_mbox_read: 30 * @oct: Pointer mailbox 31 * 32 * Reads the 8-bytes of data from the mbox register 33 * Writes back the acknowldgement inidcating completion of read 34 */ 35 int octeon_mbox_read(struct octeon_mbox *mbox) 36 { 37 union octeon_mbox_message msg; 38 int ret = 0; 39 40 spin_lock(&mbox->lock); 41 42 msg.u64 = readq(mbox->mbox_read_reg); 43 44 if ((msg.u64 == OCTEON_PFVFACK) || (msg.u64 == OCTEON_PFVFSIG)) { 45 spin_unlock(&mbox->lock); 46 return 0; 47 } 48 49 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { 50 mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64; 51 mbox->mbox_req.recv_len++; 52 } else { 53 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { 54 mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] = 55 msg.u64; 56 mbox->mbox_resp.recv_len++; 57 } else { 58 if ((mbox->state & OCTEON_MBOX_STATE_IDLE) && 59 (msg.s.type == OCTEON_MBOX_REQUEST)) { 60 mbox->state &= ~OCTEON_MBOX_STATE_IDLE; 61 mbox->state |= 62 OCTEON_MBOX_STATE_REQUEST_RECEIVING; 63 mbox->mbox_req.msg.u64 = msg.u64; 64 mbox->mbox_req.q_no = mbox->q_no; 65 mbox->mbox_req.recv_len = 1; 66 } else { 67 if ((mbox->state & 68 OCTEON_MBOX_STATE_RESPONSE_PENDING) && 69 (msg.s.type == OCTEON_MBOX_RESPONSE)) { 70 mbox->state &= 71 ~OCTEON_MBOX_STATE_RESPONSE_PENDING; 72 mbox->state |= 73 OCTEON_MBOX_STATE_RESPONSE_RECEIVING 74 ; 75 mbox->mbox_resp.msg.u64 = msg.u64; 76 mbox->mbox_resp.q_no = mbox->q_no; 77 mbox->mbox_resp.recv_len = 1; 78 } else { 79 writeq(OCTEON_PFVFERR, 80 mbox->mbox_read_reg); 81 mbox->state |= OCTEON_MBOX_STATE_ERROR; 82 spin_unlock(&mbox->lock); 83 return 1; 84 } 85 } 86 } 87 } 88 89 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) { 90 if (mbox->mbox_req.recv_len < msg.s.len) { 91 ret = 0; 92 } else { 93 mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVING; 94 mbox->state |= OCTEON_MBOX_STATE_REQUEST_RECEIVED; 95 ret = 1; 96 } 97 } else { 98 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) { 99 if (mbox->mbox_resp.recv_len < msg.s.len) { 100 ret = 0; 101 } else { 102 mbox->state &= 103 ~OCTEON_MBOX_STATE_RESPONSE_RECEIVING; 104 mbox->state |= 105 OCTEON_MBOX_STATE_RESPONSE_RECEIVED; 106 ret = 1; 107 } 108 } else { 109 WARN_ON(1); 110 } 111 } 112 113 writeq(OCTEON_PFVFACK, mbox->mbox_read_reg); 114 115 spin_unlock(&mbox->lock); 116 117 return ret; 118 } 119 120 /** 121 * octeon_mbox_write: 122 * @oct: Pointer Octeon Device 123 * @mbox_cmd: Cmd to send to mailbox. 124 * 125 * Populates the queue specific mbox structure 126 * with cmd information. 127 * Write the cmd to mbox register 128 */ 129 int octeon_mbox_write(struct octeon_device *oct, 130 struct octeon_mbox_cmd *mbox_cmd) 131 { 132 struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no]; 133 u32 count, i, ret = OCTEON_MBOX_STATUS_SUCCESS; 134 long timeout = LIO_MBOX_WRITE_WAIT_TIME; 135 unsigned long flags; 136 137 spin_lock_irqsave(&mbox->lock, flags); 138 139 if ((mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) && 140 !(mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED)) { 141 spin_unlock_irqrestore(&mbox->lock, flags); 142 return OCTEON_MBOX_STATUS_FAILED; 143 } 144 145 if ((mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) && 146 !(mbox->state & OCTEON_MBOX_STATE_IDLE)) { 147 spin_unlock_irqrestore(&mbox->lock, flags); 148 return OCTEON_MBOX_STATUS_BUSY; 149 } 150 151 if (mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) { 152 memcpy(&mbox->mbox_resp, mbox_cmd, 153 sizeof(struct octeon_mbox_cmd)); 154 mbox->state = OCTEON_MBOX_STATE_RESPONSE_PENDING; 155 } 156 157 spin_unlock_irqrestore(&mbox->lock, flags); 158 159 count = 0; 160 161 while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) { 162 schedule_timeout_uninterruptible(timeout); 163 if (count++ == LIO_MBOX_WRITE_WAIT_CNT) { 164 ret = OCTEON_MBOX_STATUS_FAILED; 165 break; 166 } 167 } 168 169 if (ret == OCTEON_MBOX_STATUS_SUCCESS) { 170 writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg); 171 for (i = 0; i < (u32)(mbox_cmd->msg.s.len - 1); i++) { 172 count = 0; 173 while (readq(mbox->mbox_write_reg) != 174 OCTEON_PFVFACK) { 175 schedule_timeout_uninterruptible(timeout); 176 if (count++ == LIO_MBOX_WRITE_WAIT_CNT) { 177 ret = OCTEON_MBOX_STATUS_FAILED; 178 break; 179 } 180 } 181 if (ret == OCTEON_MBOX_STATUS_SUCCESS) 182 writeq(mbox_cmd->data[i], mbox->mbox_write_reg); 183 else 184 break; 185 } 186 } 187 188 spin_lock_irqsave(&mbox->lock, flags); 189 if (mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) { 190 mbox->state = OCTEON_MBOX_STATE_IDLE; 191 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 192 } else { 193 if ((!mbox_cmd->msg.s.resp_needed) || 194 (ret == OCTEON_MBOX_STATUS_FAILED)) { 195 mbox->state &= ~OCTEON_MBOX_STATE_RESPONSE_PENDING; 196 if (!(mbox->state & 197 (OCTEON_MBOX_STATE_REQUEST_RECEIVING | 198 OCTEON_MBOX_STATE_REQUEST_RECEIVED))) 199 mbox->state = OCTEON_MBOX_STATE_IDLE; 200 } 201 } 202 spin_unlock_irqrestore(&mbox->lock, flags); 203 204 return ret; 205 } 206 207 /** 208 * octeon_mbox_process_cmd: 209 * @mbox: Pointer mailbox 210 * @mbox_cmd: Pointer to command received 211 * 212 * Process the cmd received in mbox 213 */ 214 static int octeon_mbox_process_cmd(struct octeon_mbox *mbox, 215 struct octeon_mbox_cmd *mbox_cmd) 216 { 217 struct octeon_device *oct = mbox->oct_dev; 218 219 switch (mbox_cmd->msg.s.cmd) { 220 case OCTEON_VF_ACTIVE: 221 dev_dbg(&oct->pci_dev->dev, "got vfactive sending data back\n"); 222 mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE; 223 mbox_cmd->msg.s.resp_needed = 1; 224 mbox_cmd->msg.s.len = 2; 225 mbox_cmd->data[0] = 0; /* VF version is in mbox_cmd->data[0] */ 226 ((struct lio_version *)&mbox_cmd->data[0])->major = 227 LIQUIDIO_BASE_MAJOR_VERSION; 228 ((struct lio_version *)&mbox_cmd->data[0])->minor = 229 LIQUIDIO_BASE_MINOR_VERSION; 230 ((struct lio_version *)&mbox_cmd->data[0])->micro = 231 LIQUIDIO_BASE_MICRO_VERSION; 232 memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6); 233 /* Sending core cofig info to the corresponding active VF.*/ 234 octeon_mbox_write(oct, mbox_cmd); 235 break; 236 237 case OCTEON_VF_FLR_REQUEST: 238 dev_info(&oct->pci_dev->dev, 239 "got a request for FLR from VF that owns DPI ring %u\n", 240 mbox->q_no); 241 pcie_capability_set_word( 242 oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no], 243 PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); 244 break; 245 246 case OCTEON_PF_CHANGED_VF_MACADDR: 247 if (OCTEON_CN23XX_VF(oct)) 248 octeon_pf_changed_vf_macaddr(oct, 249 mbox_cmd->msg.s.params); 250 break; 251 252 default: 253 break; 254 } 255 return 0; 256 } 257 258 /** 259 *octeon_mbox_process_message: 260 * 261 * Process the received mbox message. 262 */ 263 int octeon_mbox_process_message(struct octeon_mbox *mbox) 264 { 265 struct octeon_mbox_cmd mbox_cmd; 266 unsigned long flags; 267 268 spin_lock_irqsave(&mbox->lock, flags); 269 270 if (mbox->state & OCTEON_MBOX_STATE_ERROR) { 271 if (mbox->state & (OCTEON_MBOX_STATE_RESPONSE_PENDING | 272 OCTEON_MBOX_STATE_RESPONSE_RECEIVING)) { 273 memcpy(&mbox_cmd, &mbox->mbox_resp, 274 sizeof(struct octeon_mbox_cmd)); 275 mbox->state = OCTEON_MBOX_STATE_IDLE; 276 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 277 spin_unlock_irqrestore(&mbox->lock, flags); 278 mbox_cmd.recv_status = 1; 279 if (mbox_cmd.fn) 280 mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, 281 mbox_cmd.fn_arg); 282 return 0; 283 } 284 285 mbox->state = OCTEON_MBOX_STATE_IDLE; 286 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 287 spin_unlock_irqrestore(&mbox->lock, flags); 288 return 0; 289 } 290 291 if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVED) { 292 memcpy(&mbox_cmd, &mbox->mbox_resp, 293 sizeof(struct octeon_mbox_cmd)); 294 mbox->state = OCTEON_MBOX_STATE_IDLE; 295 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 296 spin_unlock_irqrestore(&mbox->lock, flags); 297 mbox_cmd.recv_status = 0; 298 if (mbox_cmd.fn) 299 mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, mbox_cmd.fn_arg); 300 return 0; 301 } 302 303 if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED) { 304 memcpy(&mbox_cmd, &mbox->mbox_req, 305 sizeof(struct octeon_mbox_cmd)); 306 if (!mbox_cmd.msg.s.resp_needed) { 307 mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVED; 308 if (!(mbox->state & 309 OCTEON_MBOX_STATE_RESPONSE_PENDING)) 310 mbox->state = OCTEON_MBOX_STATE_IDLE; 311 writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg); 312 } 313 314 spin_unlock_irqrestore(&mbox->lock, flags); 315 octeon_mbox_process_cmd(mbox, &mbox_cmd); 316 return 0; 317 } 318 319 spin_unlock_irqrestore(&mbox->lock, flags); 320 WARN_ON(1); 321 322 return 0; 323 } 324