1f21fb3edSRaghu Vatsavayi /********************************************************************** 2f21fb3edSRaghu Vatsavayi * Author: Cavium, Inc. 3f21fb3edSRaghu Vatsavayi * 4f21fb3edSRaghu Vatsavayi * Contact: support@cavium.com 5f21fb3edSRaghu Vatsavayi * Please include "LiquidIO" in the subject. 6f21fb3edSRaghu Vatsavayi * 7f21fb3edSRaghu Vatsavayi * Copyright (c) 2003-2015 Cavium, Inc. 8f21fb3edSRaghu Vatsavayi * 9f21fb3edSRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify 10f21fb3edSRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as 11f21fb3edSRaghu Vatsavayi * published by the Free Software Foundation. 12f21fb3edSRaghu Vatsavayi * 13f21fb3edSRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but 14f21fb3edSRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15f21fb3edSRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16f21fb3edSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more 17f21fb3edSRaghu Vatsavayi * details. 18f21fb3edSRaghu Vatsavayi * 19f21fb3edSRaghu Vatsavayi * This file may also be available under a different license from Cavium. 20f21fb3edSRaghu Vatsavayi * Contact Cavium, Inc. for more information 21f21fb3edSRaghu Vatsavayi **********************************************************************/ 22f21fb3edSRaghu Vatsavayi #include <linux/version.h> 23f21fb3edSRaghu Vatsavayi #include <linux/types.h> 24f21fb3edSRaghu Vatsavayi #include <linux/list.h> 25f21fb3edSRaghu Vatsavayi #include <linux/pci.h> 26f21fb3edSRaghu Vatsavayi #include <linux/kthread.h> 27f21fb3edSRaghu Vatsavayi #include <linux/netdevice.h> 285b173cf9SRaghu Vatsavayi #include <linux/vmalloc.h> 29f21fb3edSRaghu Vatsavayi #include "octeon_config.h" 30f21fb3edSRaghu Vatsavayi #include "liquidio_common.h" 31f21fb3edSRaghu Vatsavayi #include "octeon_droq.h" 32f21fb3edSRaghu Vatsavayi #include "octeon_iq.h" 33f21fb3edSRaghu Vatsavayi #include "response_manager.h" 34f21fb3edSRaghu Vatsavayi #include "octeon_device.h" 35f21fb3edSRaghu Vatsavayi #include "octeon_nic.h" 36f21fb3edSRaghu Vatsavayi #include "octeon_main.h" 37f21fb3edSRaghu Vatsavayi #include "octeon_network.h" 38f21fb3edSRaghu Vatsavayi #include "cn66xx_regs.h" 39f21fb3edSRaghu Vatsavayi #include "cn66xx_device.h" 40f21fb3edSRaghu Vatsavayi #include "cn68xx_regs.h" 41f21fb3edSRaghu Vatsavayi #include "cn68xx_device.h" 42f21fb3edSRaghu Vatsavayi #include "liquidio_image.h" 43f21fb3edSRaghu Vatsavayi #include "octeon_mem_ops.h" 44f21fb3edSRaghu Vatsavayi 45f21fb3edSRaghu Vatsavayi /* #define CAVIUM_ONLY_PERF_MODE */ 46f21fb3edSRaghu Vatsavayi 47f21fb3edSRaghu Vatsavayi #define CVM_MIN(d1, d2) (((d1) < (d2)) ? (d1) : (d2)) 48f21fb3edSRaghu Vatsavayi #define CVM_MAX(d1, d2) (((d1) > (d2)) ? (d1) : (d2)) 49f21fb3edSRaghu Vatsavayi 50f21fb3edSRaghu Vatsavayi struct niclist { 51f21fb3edSRaghu Vatsavayi struct list_head list; 52f21fb3edSRaghu Vatsavayi void *ptr; 53f21fb3edSRaghu Vatsavayi }; 54f21fb3edSRaghu Vatsavayi 55f21fb3edSRaghu Vatsavayi struct __dispatch { 56f21fb3edSRaghu Vatsavayi struct list_head list; 57f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 58f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 59f21fb3edSRaghu Vatsavayi }; 60f21fb3edSRaghu Vatsavayi 61f21fb3edSRaghu Vatsavayi /** Get the argument that the user set when registering dispatch 62f21fb3edSRaghu Vatsavayi * function for a given opcode/subcode. 63f21fb3edSRaghu Vatsavayi * @param octeon_dev - the octeon device pointer. 64f21fb3edSRaghu Vatsavayi * @param opcode - the opcode for which the dispatch argument 65f21fb3edSRaghu Vatsavayi * is to be checked. 66f21fb3edSRaghu Vatsavayi * @param subcode - the subcode for which the dispatch argument 67f21fb3edSRaghu Vatsavayi * is to be checked. 68f21fb3edSRaghu Vatsavayi * @return Success: void * (argument to the dispatch function) 69f21fb3edSRaghu Vatsavayi * @return Failure: NULL 70f21fb3edSRaghu Vatsavayi * 71f21fb3edSRaghu Vatsavayi */ 72f21fb3edSRaghu Vatsavayi static inline void *octeon_get_dispatch_arg(struct octeon_device *octeon_dev, 73f21fb3edSRaghu Vatsavayi u16 opcode, u16 subcode) 74f21fb3edSRaghu Vatsavayi { 75f21fb3edSRaghu Vatsavayi int idx; 76f21fb3edSRaghu Vatsavayi struct list_head *dispatch; 77f21fb3edSRaghu Vatsavayi void *fn_arg = NULL; 78f21fb3edSRaghu Vatsavayi u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); 79f21fb3edSRaghu Vatsavayi 80f21fb3edSRaghu Vatsavayi idx = combined_opcode & OCTEON_OPCODE_MASK; 81f21fb3edSRaghu Vatsavayi 82f21fb3edSRaghu Vatsavayi spin_lock_bh(&octeon_dev->dispatch.lock); 83f21fb3edSRaghu Vatsavayi 84f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.count == 0) { 85f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 86f21fb3edSRaghu Vatsavayi return NULL; 87f21fb3edSRaghu Vatsavayi } 88f21fb3edSRaghu Vatsavayi 89f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.dlist[idx].opcode == combined_opcode) { 90f21fb3edSRaghu Vatsavayi fn_arg = octeon_dev->dispatch.dlist[idx].arg; 91f21fb3edSRaghu Vatsavayi } else { 92f21fb3edSRaghu Vatsavayi list_for_each(dispatch, 93f21fb3edSRaghu Vatsavayi &octeon_dev->dispatch.dlist[idx].list) { 94f21fb3edSRaghu Vatsavayi if (((struct octeon_dispatch *)dispatch)->opcode == 95f21fb3edSRaghu Vatsavayi combined_opcode) { 96f21fb3edSRaghu Vatsavayi fn_arg = ((struct octeon_dispatch *) 97f21fb3edSRaghu Vatsavayi dispatch)->arg; 98f21fb3edSRaghu Vatsavayi break; 99f21fb3edSRaghu Vatsavayi } 100f21fb3edSRaghu Vatsavayi } 101f21fb3edSRaghu Vatsavayi } 102f21fb3edSRaghu Vatsavayi 103f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 104f21fb3edSRaghu Vatsavayi return fn_arg; 105f21fb3edSRaghu Vatsavayi } 106f21fb3edSRaghu Vatsavayi 107f21fb3edSRaghu Vatsavayi u32 octeon_droq_check_hw_for_pkts(struct octeon_device *oct, 108f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 109f21fb3edSRaghu Vatsavayi { 110f21fb3edSRaghu Vatsavayi u32 pkt_count = 0; 111f21fb3edSRaghu Vatsavayi 112f21fb3edSRaghu Vatsavayi pkt_count = readl(droq->pkts_sent_reg); 113f21fb3edSRaghu Vatsavayi if (pkt_count) { 114f21fb3edSRaghu Vatsavayi atomic_add(pkt_count, &droq->pkts_pending); 115f21fb3edSRaghu Vatsavayi writel(pkt_count, droq->pkts_sent_reg); 116f21fb3edSRaghu Vatsavayi } 117f21fb3edSRaghu Vatsavayi 118f21fb3edSRaghu Vatsavayi return pkt_count; 119f21fb3edSRaghu Vatsavayi } 120f21fb3edSRaghu Vatsavayi 121f21fb3edSRaghu Vatsavayi static void octeon_droq_compute_max_packet_bufs(struct octeon_droq *droq) 122f21fb3edSRaghu Vatsavayi { 123f21fb3edSRaghu Vatsavayi u32 count = 0; 124f21fb3edSRaghu Vatsavayi 125f21fb3edSRaghu Vatsavayi /* max_empty_descs is the max. no. of descs that can have no buffers. 126f21fb3edSRaghu Vatsavayi * If the empty desc count goes beyond this value, we cannot safely 127f21fb3edSRaghu Vatsavayi * read in a 64K packet sent by Octeon 128f21fb3edSRaghu Vatsavayi * (64K is max pkt size from Octeon) 129f21fb3edSRaghu Vatsavayi */ 130f21fb3edSRaghu Vatsavayi droq->max_empty_descs = 0; 131f21fb3edSRaghu Vatsavayi 132f21fb3edSRaghu Vatsavayi do { 133f21fb3edSRaghu Vatsavayi droq->max_empty_descs++; 134f21fb3edSRaghu Vatsavayi count += droq->buffer_size; 135f21fb3edSRaghu Vatsavayi } while (count < (64 * 1024)); 136f21fb3edSRaghu Vatsavayi 137f21fb3edSRaghu Vatsavayi droq->max_empty_descs = droq->max_count - droq->max_empty_descs; 138f21fb3edSRaghu Vatsavayi } 139f21fb3edSRaghu Vatsavayi 140f21fb3edSRaghu Vatsavayi static void octeon_droq_reset_indices(struct octeon_droq *droq) 141f21fb3edSRaghu Vatsavayi { 142f21fb3edSRaghu Vatsavayi droq->read_idx = 0; 143f21fb3edSRaghu Vatsavayi droq->write_idx = 0; 144f21fb3edSRaghu Vatsavayi droq->refill_idx = 0; 145f21fb3edSRaghu Vatsavayi droq->refill_count = 0; 146f21fb3edSRaghu Vatsavayi atomic_set(&droq->pkts_pending, 0); 147f21fb3edSRaghu Vatsavayi } 148f21fb3edSRaghu Vatsavayi 149f21fb3edSRaghu Vatsavayi static void 150f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(struct octeon_device *oct, 151f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 152f21fb3edSRaghu Vatsavayi { 153f21fb3edSRaghu Vatsavayi u32 i; 154cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 155f21fb3edSRaghu Vatsavayi 156f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 157cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[i].pg_info; 158cabeb13bSRaghu Vatsavayi 159cabeb13bSRaghu Vatsavayi if (pg_info->dma) 160cabeb13bSRaghu Vatsavayi lio_unmap_ring(oct->pci_dev, 161cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 162cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 163cabeb13bSRaghu Vatsavayi 164cabeb13bSRaghu Vatsavayi if (pg_info->page) 165cabeb13bSRaghu Vatsavayi recv_buffer_destroy(droq->recv_buf_list[i].buffer, 166cabeb13bSRaghu Vatsavayi pg_info); 167cabeb13bSRaghu Vatsavayi 168cabeb13bSRaghu Vatsavayi if (droq->desc_ring && droq->desc_ring[i].info_ptr) 169f21fb3edSRaghu Vatsavayi lio_unmap_ring_info(oct->pci_dev, 170f21fb3edSRaghu Vatsavayi (u64)droq-> 171f21fb3edSRaghu Vatsavayi desc_ring[i].info_ptr, 172f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 173f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = NULL; 174f21fb3edSRaghu Vatsavayi } 175f21fb3edSRaghu Vatsavayi 176f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 177f21fb3edSRaghu Vatsavayi } 178f21fb3edSRaghu Vatsavayi 179f21fb3edSRaghu Vatsavayi static int 180f21fb3edSRaghu Vatsavayi octeon_droq_setup_ring_buffers(struct octeon_device *oct, 181f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 182f21fb3edSRaghu Vatsavayi { 183f21fb3edSRaghu Vatsavayi u32 i; 184f21fb3edSRaghu Vatsavayi void *buf; 185f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring = droq->desc_ring; 186f21fb3edSRaghu Vatsavayi 187f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 188cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(oct, &droq->recv_buf_list[i].pg_info); 189f21fb3edSRaghu Vatsavayi 190f21fb3edSRaghu Vatsavayi if (!buf) { 191f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s buffer alloc failed\n", 192f21fb3edSRaghu Vatsavayi __func__); 193cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 194f21fb3edSRaghu Vatsavayi return -ENOMEM; 195f21fb3edSRaghu Vatsavayi } 196f21fb3edSRaghu Vatsavayi 197f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = buf; 198f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].data = get_rbd(buf); 199f21fb3edSRaghu Vatsavayi 200f21fb3edSRaghu Vatsavayi droq->info_list[i].length = 0; 201f21fb3edSRaghu Vatsavayi 202f21fb3edSRaghu Vatsavayi /* map ring buffers into memory */ 203f21fb3edSRaghu Vatsavayi desc_ring[i].info_ptr = lio_map_ring_info(droq, i); 204f21fb3edSRaghu Vatsavayi desc_ring[i].buffer_ptr = 205cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[i].buffer); 206f21fb3edSRaghu Vatsavayi } 207f21fb3edSRaghu Vatsavayi 208f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 209f21fb3edSRaghu Vatsavayi 210f21fb3edSRaghu Vatsavayi octeon_droq_compute_max_packet_bufs(droq); 211f21fb3edSRaghu Vatsavayi 212f21fb3edSRaghu Vatsavayi return 0; 213f21fb3edSRaghu Vatsavayi } 214f21fb3edSRaghu Vatsavayi 215f21fb3edSRaghu Vatsavayi int octeon_delete_droq(struct octeon_device *oct, u32 q_no) 216f21fb3edSRaghu Vatsavayi { 217f21fb3edSRaghu Vatsavayi struct octeon_droq *droq = oct->droq[q_no]; 218f21fb3edSRaghu Vatsavayi 219f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 220f21fb3edSRaghu Vatsavayi 221f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(oct, droq); 222f21fb3edSRaghu Vatsavayi vfree(droq->recv_buf_list); 223f21fb3edSRaghu Vatsavayi 224f21fb3edSRaghu Vatsavayi if (droq->info_base_addr) 225f21fb3edSRaghu Vatsavayi cnnic_free_aligned_dma(oct->pci_dev, droq->info_list, 226f21fb3edSRaghu Vatsavayi droq->info_alloc_size, 227f21fb3edSRaghu Vatsavayi droq->info_base_addr, 228f21fb3edSRaghu Vatsavayi droq->info_list_dma); 229f21fb3edSRaghu Vatsavayi 230f21fb3edSRaghu Vatsavayi if (droq->desc_ring) 231f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 232f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 233f21fb3edSRaghu Vatsavayi 234f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 235f21fb3edSRaghu Vatsavayi 236f21fb3edSRaghu Vatsavayi return 0; 237f21fb3edSRaghu Vatsavayi } 238f21fb3edSRaghu Vatsavayi 239f21fb3edSRaghu Vatsavayi int octeon_init_droq(struct octeon_device *oct, 240f21fb3edSRaghu Vatsavayi u32 q_no, 241f21fb3edSRaghu Vatsavayi u32 num_descs, 242f21fb3edSRaghu Vatsavayi u32 desc_size, 243f21fb3edSRaghu Vatsavayi void *app_ctx) 244f21fb3edSRaghu Vatsavayi { 245f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 246f21fb3edSRaghu Vatsavayi u32 desc_ring_size = 0, c_num_descs = 0, c_buf_size = 0; 247f21fb3edSRaghu Vatsavayi u32 c_pkts_per_intr = 0, c_refill_threshold = 0; 24896ae48b7SRaghu Vatsavayi int orig_node = dev_to_node(&oct->pci_dev->dev); 24996ae48b7SRaghu Vatsavayi int numa_node = cpu_to_node(q_no % num_online_cpus()); 250f21fb3edSRaghu Vatsavayi 251f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 252f21fb3edSRaghu Vatsavayi 253f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 254f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 255f21fb3edSRaghu Vatsavayi 256f21fb3edSRaghu Vatsavayi droq->oct_dev = oct; 257f21fb3edSRaghu Vatsavayi droq->q_no = q_no; 258f21fb3edSRaghu Vatsavayi if (app_ctx) 259f21fb3edSRaghu Vatsavayi droq->app_ctx = app_ctx; 260f21fb3edSRaghu Vatsavayi else 261f21fb3edSRaghu Vatsavayi droq->app_ctx = (void *)(size_t)q_no; 262f21fb3edSRaghu Vatsavayi 263f21fb3edSRaghu Vatsavayi c_num_descs = num_descs; 264f21fb3edSRaghu Vatsavayi c_buf_size = desc_size; 265f21fb3edSRaghu Vatsavayi if (OCTEON_CN6XXX(oct)) { 266f21fb3edSRaghu Vatsavayi struct octeon_config *conf6x = CHIP_FIELD(oct, cn6xxx, conf); 267f21fb3edSRaghu Vatsavayi 268f21fb3edSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf6x); 26996ae48b7SRaghu Vatsavayi c_refill_threshold = 27096ae48b7SRaghu Vatsavayi (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf6x); 27196ae48b7SRaghu Vatsavayi } else { 27296ae48b7SRaghu Vatsavayi return 1; 273f21fb3edSRaghu Vatsavayi } 274f21fb3edSRaghu Vatsavayi 275f21fb3edSRaghu Vatsavayi droq->max_count = c_num_descs; 276f21fb3edSRaghu Vatsavayi droq->buffer_size = c_buf_size; 277f21fb3edSRaghu Vatsavayi 278f21fb3edSRaghu Vatsavayi desc_ring_size = droq->max_count * OCT_DROQ_DESC_SIZE; 27996ae48b7SRaghu Vatsavayi set_dev_node(&oct->pci_dev->dev, numa_node); 28096ae48b7SRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size, 28196ae48b7SRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma); 28296ae48b7SRaghu Vatsavayi set_dev_node(&oct->pci_dev->dev, orig_node); 28396ae48b7SRaghu Vatsavayi if (!droq->desc_ring) 284f21fb3edSRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size, 285f21fb3edSRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma); 286f21fb3edSRaghu Vatsavayi 287f21fb3edSRaghu Vatsavayi if (!droq->desc_ring) { 288f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 289f21fb3edSRaghu Vatsavayi "Output queue %d ring alloc failed\n", q_no); 290f21fb3edSRaghu Vatsavayi return 1; 291f21fb3edSRaghu Vatsavayi } 292f21fb3edSRaghu Vatsavayi 293f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n", 294f21fb3edSRaghu Vatsavayi q_no, droq->desc_ring, droq->desc_ring_dma); 295f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: num_desc: %d\n", q_no, 296f21fb3edSRaghu Vatsavayi droq->max_count); 297f21fb3edSRaghu Vatsavayi 298f21fb3edSRaghu Vatsavayi droq->info_list = 29996ae48b7SRaghu Vatsavayi cnnic_numa_alloc_aligned_dma((droq->max_count * 30096ae48b7SRaghu Vatsavayi OCT_DROQ_INFO_SIZE), 301f21fb3edSRaghu Vatsavayi &droq->info_alloc_size, 302f21fb3edSRaghu Vatsavayi &droq->info_base_addr, 30396ae48b7SRaghu Vatsavayi numa_node); 304f21fb3edSRaghu Vatsavayi if (!droq->info_list) { 305f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Cannot allocate memory for info list.\n"); 306f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 307f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 308f21fb3edSRaghu Vatsavayi return 1; 309f21fb3edSRaghu Vatsavayi } 310f21fb3edSRaghu Vatsavayi 311f21fb3edSRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 31296ae48b7SRaghu Vatsavayi vmalloc_node(droq->max_count * 31396ae48b7SRaghu Vatsavayi OCT_DROQ_RECVBUF_SIZE, 31496ae48b7SRaghu Vatsavayi numa_node); 31596ae48b7SRaghu Vatsavayi if (!droq->recv_buf_list) 31696ae48b7SRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 317f21fb3edSRaghu Vatsavayi vmalloc(droq->max_count * 318f21fb3edSRaghu Vatsavayi OCT_DROQ_RECVBUF_SIZE); 319f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list) { 320f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Output queue recv buf list alloc failed\n"); 321f21fb3edSRaghu Vatsavayi goto init_droq_fail; 322f21fb3edSRaghu Vatsavayi } 323f21fb3edSRaghu Vatsavayi 324f21fb3edSRaghu Vatsavayi if (octeon_droq_setup_ring_buffers(oct, droq)) 325f21fb3edSRaghu Vatsavayi goto init_droq_fail; 326f21fb3edSRaghu Vatsavayi 327f21fb3edSRaghu Vatsavayi droq->pkts_per_intr = c_pkts_per_intr; 328f21fb3edSRaghu Vatsavayi droq->refill_threshold = c_refill_threshold; 329f21fb3edSRaghu Vatsavayi 330f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "DROQ INIT: max_empty_descs: %d\n", 331f21fb3edSRaghu Vatsavayi droq->max_empty_descs); 332f21fb3edSRaghu Vatsavayi 333f21fb3edSRaghu Vatsavayi spin_lock_init(&droq->lock); 334f21fb3edSRaghu Vatsavayi 335f21fb3edSRaghu Vatsavayi INIT_LIST_HEAD(&droq->dispatch_list); 336f21fb3edSRaghu Vatsavayi 337f21fb3edSRaghu Vatsavayi /* For 56xx Pass1, this function won't be called, so no checks. */ 338f21fb3edSRaghu Vatsavayi oct->fn_list.setup_oq_regs(oct, q_no); 339f21fb3edSRaghu Vatsavayi 340f21fb3edSRaghu Vatsavayi oct->io_qmask.oq |= (1 << q_no); 341f21fb3edSRaghu Vatsavayi 342f21fb3edSRaghu Vatsavayi return 0; 343f21fb3edSRaghu Vatsavayi 344f21fb3edSRaghu Vatsavayi init_droq_fail: 345f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no); 346f21fb3edSRaghu Vatsavayi return 1; 347f21fb3edSRaghu Vatsavayi } 348f21fb3edSRaghu Vatsavayi 349f21fb3edSRaghu Vatsavayi /* octeon_create_recv_info 350f21fb3edSRaghu Vatsavayi * Parameters: 351f21fb3edSRaghu Vatsavayi * octeon_dev - pointer to the octeon device structure 352f21fb3edSRaghu Vatsavayi * droq - droq in which the packet arrived. 353f21fb3edSRaghu Vatsavayi * buf_cnt - no. of buffers used by the packet. 354f21fb3edSRaghu Vatsavayi * idx - index in the descriptor for the first buffer in the packet. 355f21fb3edSRaghu Vatsavayi * Description: 356f21fb3edSRaghu Vatsavayi * Allocates a recv_info_t and copies the buffer addresses for packet data 357f21fb3edSRaghu Vatsavayi * into the recv_pkt space which starts at an 8B offset from recv_info_t. 358f21fb3edSRaghu Vatsavayi * Flags the descriptors for refill later. If available descriptors go 359f21fb3edSRaghu Vatsavayi * below the threshold to receive a 64K pkt, new buffers are first allocated 360f21fb3edSRaghu Vatsavayi * before the recv_pkt_t is created. 361f21fb3edSRaghu Vatsavayi * This routine will be called in interrupt context. 362f21fb3edSRaghu Vatsavayi * Returns: 363f21fb3edSRaghu Vatsavayi * Success: Pointer to recv_info_t 364f21fb3edSRaghu Vatsavayi * Failure: NULL. 365f21fb3edSRaghu Vatsavayi * Locks: 366f21fb3edSRaghu Vatsavayi * The droq->lock is held when this routine is called. 367f21fb3edSRaghu Vatsavayi */ 368f21fb3edSRaghu Vatsavayi static inline struct octeon_recv_info *octeon_create_recv_info( 369f21fb3edSRaghu Vatsavayi struct octeon_device *octeon_dev, 370f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 371f21fb3edSRaghu Vatsavayi u32 buf_cnt, 372f21fb3edSRaghu Vatsavayi u32 idx) 373f21fb3edSRaghu Vatsavayi { 374f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 375f21fb3edSRaghu Vatsavayi struct octeon_recv_pkt *recv_pkt; 376f21fb3edSRaghu Vatsavayi struct octeon_recv_info *recv_info; 377f21fb3edSRaghu Vatsavayi u32 i, bytes_left; 378cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 379f21fb3edSRaghu Vatsavayi 380f21fb3edSRaghu Vatsavayi info = &droq->info_list[idx]; 381f21fb3edSRaghu Vatsavayi 382f21fb3edSRaghu Vatsavayi recv_info = octeon_alloc_recv_info(sizeof(struct __dispatch)); 383f21fb3edSRaghu Vatsavayi if (!recv_info) 384f21fb3edSRaghu Vatsavayi return NULL; 385f21fb3edSRaghu Vatsavayi 386f21fb3edSRaghu Vatsavayi recv_pkt = recv_info->recv_pkt; 387f21fb3edSRaghu Vatsavayi recv_pkt->rh = info->rh; 388f21fb3edSRaghu Vatsavayi recv_pkt->length = (u32)info->length; 389f21fb3edSRaghu Vatsavayi recv_pkt->buffer_count = (u16)buf_cnt; 390f21fb3edSRaghu Vatsavayi recv_pkt->octeon_id = (u16)octeon_dev->octeon_id; 391f21fb3edSRaghu Vatsavayi 392f21fb3edSRaghu Vatsavayi i = 0; 393f21fb3edSRaghu Vatsavayi bytes_left = (u32)info->length; 394f21fb3edSRaghu Vatsavayi 395f21fb3edSRaghu Vatsavayi while (buf_cnt) { 396cabeb13bSRaghu Vatsavayi { 397cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[idx].pg_info; 398cabeb13bSRaghu Vatsavayi 399f21fb3edSRaghu Vatsavayi lio_unmap_ring(octeon_dev->pci_dev, 400cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 401cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 402cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 403cabeb13bSRaghu Vatsavayi } 404f21fb3edSRaghu Vatsavayi 405f21fb3edSRaghu Vatsavayi recv_pkt->buffer_size[i] = 406f21fb3edSRaghu Vatsavayi (bytes_left >= 407f21fb3edSRaghu Vatsavayi droq->buffer_size) ? droq->buffer_size : bytes_left; 408f21fb3edSRaghu Vatsavayi 409f21fb3edSRaghu Vatsavayi recv_pkt->buffer_ptr[i] = droq->recv_buf_list[idx].buffer; 410f21fb3edSRaghu Vatsavayi droq->recv_buf_list[idx].buffer = NULL; 411f21fb3edSRaghu Vatsavayi 412f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(idx, droq->max_count); 413f21fb3edSRaghu Vatsavayi bytes_left -= droq->buffer_size; 414f21fb3edSRaghu Vatsavayi i++; 415f21fb3edSRaghu Vatsavayi buf_cnt--; 416f21fb3edSRaghu Vatsavayi } 417f21fb3edSRaghu Vatsavayi 418f21fb3edSRaghu Vatsavayi return recv_info; 419f21fb3edSRaghu Vatsavayi } 420f21fb3edSRaghu Vatsavayi 421f21fb3edSRaghu Vatsavayi /* If we were not able to refill all buffers, try to move around 422f21fb3edSRaghu Vatsavayi * the buffers that were not dispatched. 423f21fb3edSRaghu Vatsavayi */ 424f21fb3edSRaghu Vatsavayi static inline u32 425f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(struct octeon_droq *droq, 426f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring) 427f21fb3edSRaghu Vatsavayi { 428f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 429f21fb3edSRaghu Vatsavayi 430f21fb3edSRaghu Vatsavayi u32 refill_index = droq->refill_idx; 431f21fb3edSRaghu Vatsavayi 432f21fb3edSRaghu Vatsavayi while (refill_index != droq->read_idx) { 433f21fb3edSRaghu Vatsavayi if (droq->recv_buf_list[refill_index].buffer) { 434f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 435f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer; 436f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = 437f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].data; 438f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 439f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr; 440f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer = NULL; 441f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr = 0; 442f21fb3edSRaghu Vatsavayi do { 443f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->refill_idx, 444f21fb3edSRaghu Vatsavayi droq->max_count); 445f21fb3edSRaghu Vatsavayi desc_refilled++; 446f21fb3edSRaghu Vatsavayi droq->refill_count--; 447f21fb3edSRaghu Vatsavayi } while (droq->recv_buf_list[droq->refill_idx]. 448f21fb3edSRaghu Vatsavayi buffer); 449f21fb3edSRaghu Vatsavayi } 450f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(refill_index, droq->max_count); 451f21fb3edSRaghu Vatsavayi } /* while */ 452f21fb3edSRaghu Vatsavayi return desc_refilled; 453f21fb3edSRaghu Vatsavayi } 454f21fb3edSRaghu Vatsavayi 455f21fb3edSRaghu Vatsavayi /* octeon_droq_refill 456f21fb3edSRaghu Vatsavayi * Parameters: 457f21fb3edSRaghu Vatsavayi * droq - droq in which descriptors require new buffers. 458f21fb3edSRaghu Vatsavayi * Description: 459f21fb3edSRaghu Vatsavayi * Called during normal DROQ processing in interrupt mode or by the poll 460f21fb3edSRaghu Vatsavayi * thread to refill the descriptors from which buffers were dispatched 461f21fb3edSRaghu Vatsavayi * to upper layers. Attempts to allocate new buffers. If that fails, moves 462f21fb3edSRaghu Vatsavayi * up buffers (that were not dispatched) to form a contiguous ring. 463f21fb3edSRaghu Vatsavayi * Returns: 464f21fb3edSRaghu Vatsavayi * No of descriptors refilled. 465f21fb3edSRaghu Vatsavayi * Locks: 466f21fb3edSRaghu Vatsavayi * This routine is called with droq->lock held. 467f21fb3edSRaghu Vatsavayi */ 468f21fb3edSRaghu Vatsavayi static u32 469f21fb3edSRaghu Vatsavayi octeon_droq_refill(struct octeon_device *octeon_dev, struct octeon_droq *droq) 470f21fb3edSRaghu Vatsavayi { 471f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring; 472f21fb3edSRaghu Vatsavayi void *buf = NULL; 473f21fb3edSRaghu Vatsavayi u8 *data; 474f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 475cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 476f21fb3edSRaghu Vatsavayi 477f21fb3edSRaghu Vatsavayi desc_ring = droq->desc_ring; 478f21fb3edSRaghu Vatsavayi 479f21fb3edSRaghu Vatsavayi while (droq->refill_count && (desc_refilled < droq->max_count)) { 480f21fb3edSRaghu Vatsavayi /* If a valid buffer exists (happens if there is no dispatch), 481f21fb3edSRaghu Vatsavayi * reuse 482f21fb3edSRaghu Vatsavayi * the buffer, else allocate. 483f21fb3edSRaghu Vatsavayi */ 484f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list[droq->refill_idx].buffer) { 485cabeb13bSRaghu Vatsavayi pg_info = 486cabeb13bSRaghu Vatsavayi &droq->recv_buf_list[droq->refill_idx].pg_info; 487cabeb13bSRaghu Vatsavayi /* Either recycle the existing pages or go for 488cabeb13bSRaghu Vatsavayi * new page alloc 489cabeb13bSRaghu Vatsavayi */ 490cabeb13bSRaghu Vatsavayi if (pg_info->page) 491cabeb13bSRaghu Vatsavayi buf = recv_buffer_reuse(octeon_dev, pg_info); 492cabeb13bSRaghu Vatsavayi else 493cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(octeon_dev, pg_info); 494f21fb3edSRaghu Vatsavayi /* If a buffer could not be allocated, no point in 495f21fb3edSRaghu Vatsavayi * continuing 496f21fb3edSRaghu Vatsavayi */ 497cabeb13bSRaghu Vatsavayi if (!buf) { 498cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 499f21fb3edSRaghu Vatsavayi break; 500cabeb13bSRaghu Vatsavayi } 501f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 502f21fb3edSRaghu Vatsavayi buf; 503f21fb3edSRaghu Vatsavayi data = get_rbd(buf); 504f21fb3edSRaghu Vatsavayi } else { 505f21fb3edSRaghu Vatsavayi data = get_rbd(droq->recv_buf_list 506f21fb3edSRaghu Vatsavayi [droq->refill_idx].buffer); 507f21fb3edSRaghu Vatsavayi } 508f21fb3edSRaghu Vatsavayi 509f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = data; 510f21fb3edSRaghu Vatsavayi 511f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 512cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[droq-> 513cabeb13bSRaghu Vatsavayi refill_idx].buffer); 514f21fb3edSRaghu Vatsavayi /* Reset any previous values in the length field. */ 515f21fb3edSRaghu Vatsavayi droq->info_list[droq->refill_idx].length = 0; 516f21fb3edSRaghu Vatsavayi 517f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->refill_idx, droq->max_count); 518f21fb3edSRaghu Vatsavayi desc_refilled++; 519f21fb3edSRaghu Vatsavayi droq->refill_count--; 520f21fb3edSRaghu Vatsavayi } 521f21fb3edSRaghu Vatsavayi 522f21fb3edSRaghu Vatsavayi if (droq->refill_count) 523f21fb3edSRaghu Vatsavayi desc_refilled += 524f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(droq, desc_ring); 525f21fb3edSRaghu Vatsavayi 526f21fb3edSRaghu Vatsavayi /* if droq->refill_count 527f21fb3edSRaghu Vatsavayi * The refill count would not change in pass two. We only moved buffers 528f21fb3edSRaghu Vatsavayi * to close the gap in the ring, but we would still have the same no. of 529f21fb3edSRaghu Vatsavayi * buffers to refill. 530f21fb3edSRaghu Vatsavayi */ 531f21fb3edSRaghu Vatsavayi return desc_refilled; 532f21fb3edSRaghu Vatsavayi } 533f21fb3edSRaghu Vatsavayi 534f21fb3edSRaghu Vatsavayi static inline u32 535f21fb3edSRaghu Vatsavayi octeon_droq_get_bufcount(u32 buf_size, u32 total_len) 536f21fb3edSRaghu Vatsavayi { 537f21fb3edSRaghu Vatsavayi u32 buf_cnt = 0; 538f21fb3edSRaghu Vatsavayi 539f21fb3edSRaghu Vatsavayi while (total_len > (buf_size * buf_cnt)) 540f21fb3edSRaghu Vatsavayi buf_cnt++; 541f21fb3edSRaghu Vatsavayi return buf_cnt; 542f21fb3edSRaghu Vatsavayi } 543f21fb3edSRaghu Vatsavayi 544f21fb3edSRaghu Vatsavayi static int 545f21fb3edSRaghu Vatsavayi octeon_droq_dispatch_pkt(struct octeon_device *oct, 546f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 547f21fb3edSRaghu Vatsavayi union octeon_rh *rh, 548f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info) 549f21fb3edSRaghu Vatsavayi { 550f21fb3edSRaghu Vatsavayi u32 cnt; 551f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 552f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 553f21fb3edSRaghu Vatsavayi 554f21fb3edSRaghu Vatsavayi cnt = octeon_droq_get_bufcount(droq->buffer_size, (u32)info->length); 555f21fb3edSRaghu Vatsavayi 556f21fb3edSRaghu Vatsavayi disp_fn = octeon_get_dispatch(oct, (u16)rh->r.opcode, 557f21fb3edSRaghu Vatsavayi (u16)rh->r.subcode); 558f21fb3edSRaghu Vatsavayi if (disp_fn) { 559f21fb3edSRaghu Vatsavayi rinfo = octeon_create_recv_info(oct, droq, cnt, droq->read_idx); 560f21fb3edSRaghu Vatsavayi if (rinfo) { 561f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = rinfo->rsvd; 562f21fb3edSRaghu Vatsavayi 563f21fb3edSRaghu Vatsavayi rdisp->rinfo = rinfo; 564f21fb3edSRaghu Vatsavayi rdisp->disp_fn = disp_fn; 565f21fb3edSRaghu Vatsavayi rinfo->recv_pkt->rh = *rh; 566f21fb3edSRaghu Vatsavayi list_add_tail(&rdisp->list, 567f21fb3edSRaghu Vatsavayi &droq->dispatch_list); 568f21fb3edSRaghu Vatsavayi } else { 569f21fb3edSRaghu Vatsavayi droq->stats.dropped_nomem++; 570f21fb3edSRaghu Vatsavayi } 571f21fb3edSRaghu Vatsavayi } else { 572f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function\n"); 573f21fb3edSRaghu Vatsavayi droq->stats.dropped_nodispatch++; 574f21fb3edSRaghu Vatsavayi } /* else (dispatch_fn ... */ 575f21fb3edSRaghu Vatsavayi 576f21fb3edSRaghu Vatsavayi return cnt; 577f21fb3edSRaghu Vatsavayi } 578f21fb3edSRaghu Vatsavayi 579f21fb3edSRaghu Vatsavayi static inline void octeon_droq_drop_packets(struct octeon_device *oct, 580f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 581f21fb3edSRaghu Vatsavayi u32 cnt) 582f21fb3edSRaghu Vatsavayi { 583f21fb3edSRaghu Vatsavayi u32 i = 0, buf_cnt; 584f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 585f21fb3edSRaghu Vatsavayi 586f21fb3edSRaghu Vatsavayi for (i = 0; i < cnt; i++) { 587f21fb3edSRaghu Vatsavayi info = &droq->info_list[droq->read_idx]; 588f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 589f21fb3edSRaghu Vatsavayi 590f21fb3edSRaghu Vatsavayi if (info->length) { 591f21fb3edSRaghu Vatsavayi info->length -= OCT_RH_SIZE; 592f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += info->length; 593f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_get_bufcount(droq->buffer_size, 594f21fb3edSRaghu Vatsavayi (u32)info->length); 595f21fb3edSRaghu Vatsavayi } else { 596f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: In drop: pkt with len 0\n"); 597f21fb3edSRaghu Vatsavayi buf_cnt = 1; 598f21fb3edSRaghu Vatsavayi } 599f21fb3edSRaghu Vatsavayi 600f21fb3edSRaghu Vatsavayi INCR_INDEX(droq->read_idx, buf_cnt, droq->max_count); 601f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 602f21fb3edSRaghu Vatsavayi } 603f21fb3edSRaghu Vatsavayi } 604f21fb3edSRaghu Vatsavayi 605f21fb3edSRaghu Vatsavayi static u32 606f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(struct octeon_device *oct, 607f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 608f21fb3edSRaghu Vatsavayi u32 pkts_to_process) 609f21fb3edSRaghu Vatsavayi { 610f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 611f21fb3edSRaghu Vatsavayi union octeon_rh *rh; 612f21fb3edSRaghu Vatsavayi u32 pkt, total_len = 0, pkt_count; 613f21fb3edSRaghu Vatsavayi 614f21fb3edSRaghu Vatsavayi pkt_count = pkts_to_process; 615f21fb3edSRaghu Vatsavayi 616f21fb3edSRaghu Vatsavayi for (pkt = 0; pkt < pkt_count; pkt++) { 617f21fb3edSRaghu Vatsavayi u32 pkt_len = 0; 618f21fb3edSRaghu Vatsavayi struct sk_buff *nicbuf = NULL; 619cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 620cabeb13bSRaghu Vatsavayi void *buf; 621f21fb3edSRaghu Vatsavayi 622f21fb3edSRaghu Vatsavayi info = &droq->info_list[droq->read_idx]; 623f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 624f21fb3edSRaghu Vatsavayi 625f21fb3edSRaghu Vatsavayi if (!info->length) { 626f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 627f21fb3edSRaghu Vatsavayi "DROQ[%d] idx: %d len:0, pkt_cnt: %d\n", 628f21fb3edSRaghu Vatsavayi droq->q_no, droq->read_idx, pkt_count); 629f21fb3edSRaghu Vatsavayi print_hex_dump_bytes("", DUMP_PREFIX_ADDRESS, 630f21fb3edSRaghu Vatsavayi (u8 *)info, 631f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 632f21fb3edSRaghu Vatsavayi break; 633f21fb3edSRaghu Vatsavayi } 634f21fb3edSRaghu Vatsavayi 635f21fb3edSRaghu Vatsavayi /* Len of resp hdr in included in the received data len. */ 636f21fb3edSRaghu Vatsavayi info->length -= OCT_RH_SIZE; 637f21fb3edSRaghu Vatsavayi rh = &info->rh; 638f21fb3edSRaghu Vatsavayi 639f21fb3edSRaghu Vatsavayi total_len += (u32)info->length; 640f21fb3edSRaghu Vatsavayi if (OPCODE_SLOW_PATH(rh)) { 641f21fb3edSRaghu Vatsavayi u32 buf_cnt; 642f21fb3edSRaghu Vatsavayi 643f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_dispatch_pkt(oct, droq, rh, info); 644f21fb3edSRaghu Vatsavayi INCR_INDEX(droq->read_idx, buf_cnt, droq->max_count); 645f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 646f21fb3edSRaghu Vatsavayi } else { 647f21fb3edSRaghu Vatsavayi if (info->length <= droq->buffer_size) { 648f21fb3edSRaghu Vatsavayi pkt_len = (u32)info->length; 649f21fb3edSRaghu Vatsavayi nicbuf = droq->recv_buf_list[ 650f21fb3edSRaghu Vatsavayi droq->read_idx].buffer; 651cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[ 652cabeb13bSRaghu Vatsavayi droq->read_idx].pg_info; 653cabeb13bSRaghu Vatsavayi if (recv_buffer_recycle(oct, pg_info)) 654cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 655f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->read_idx].buffer = 656f21fb3edSRaghu Vatsavayi NULL; 657f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->read_idx, droq->max_count); 658f21fb3edSRaghu Vatsavayi droq->refill_count++; 659f21fb3edSRaghu Vatsavayi } else { 660cabeb13bSRaghu Vatsavayi nicbuf = octeon_fast_packet_alloc((u32) 661f21fb3edSRaghu Vatsavayi info->length); 662f21fb3edSRaghu Vatsavayi pkt_len = 0; 663f21fb3edSRaghu Vatsavayi /* nicbuf allocation can fail. We'll handle it 664f21fb3edSRaghu Vatsavayi * inside the loop. 665f21fb3edSRaghu Vatsavayi */ 666f21fb3edSRaghu Vatsavayi while (pkt_len < info->length) { 667cabeb13bSRaghu Vatsavayi int cpy_len, idx = droq->read_idx; 668f21fb3edSRaghu Vatsavayi 669cabeb13bSRaghu Vatsavayi cpy_len = ((pkt_len + droq->buffer_size) 670cabeb13bSRaghu Vatsavayi > info->length) ? 671f21fb3edSRaghu Vatsavayi ((u32)info->length - pkt_len) : 672f21fb3edSRaghu Vatsavayi droq->buffer_size; 673f21fb3edSRaghu Vatsavayi 674f21fb3edSRaghu Vatsavayi if (nicbuf) { 675f21fb3edSRaghu Vatsavayi octeon_fast_packet_next(droq, 676f21fb3edSRaghu Vatsavayi nicbuf, 677f21fb3edSRaghu Vatsavayi cpy_len, 678cabeb13bSRaghu Vatsavayi idx); 679cabeb13bSRaghu Vatsavayi buf = droq->recv_buf_list[idx]. 680cabeb13bSRaghu Vatsavayi buffer; 681cabeb13bSRaghu Vatsavayi recv_buffer_fast_free(buf); 682cabeb13bSRaghu Vatsavayi droq->recv_buf_list[idx].buffer 683cabeb13bSRaghu Vatsavayi = NULL; 684cabeb13bSRaghu Vatsavayi } else { 685cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 686f21fb3edSRaghu Vatsavayi } 687f21fb3edSRaghu Vatsavayi 688f21fb3edSRaghu Vatsavayi pkt_len += cpy_len; 689f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->read_idx, 690f21fb3edSRaghu Vatsavayi droq->max_count); 691f21fb3edSRaghu Vatsavayi droq->refill_count++; 692f21fb3edSRaghu Vatsavayi } 693f21fb3edSRaghu Vatsavayi } 694f21fb3edSRaghu Vatsavayi 695f21fb3edSRaghu Vatsavayi if (nicbuf) { 696cabeb13bSRaghu Vatsavayi if (droq->ops.fptr) { 697f21fb3edSRaghu Vatsavayi droq->ops.fptr(oct->octeon_id, 698f21fb3edSRaghu Vatsavayi nicbuf, pkt_len, 699f21fb3edSRaghu Vatsavayi rh, &droq->napi); 700cabeb13bSRaghu Vatsavayi } else { 701f21fb3edSRaghu Vatsavayi recv_buffer_free(nicbuf); 702f21fb3edSRaghu Vatsavayi } 703f21fb3edSRaghu Vatsavayi } 704cabeb13bSRaghu Vatsavayi } 705f21fb3edSRaghu Vatsavayi 706f21fb3edSRaghu Vatsavayi if (droq->refill_count >= droq->refill_threshold) { 707f21fb3edSRaghu Vatsavayi int desc_refilled = octeon_droq_refill(oct, droq); 708f21fb3edSRaghu Vatsavayi 709f21fb3edSRaghu Vatsavayi /* Flush the droq descriptor data to memory to be sure 710f21fb3edSRaghu Vatsavayi * that when we update the credits the data in memory 711f21fb3edSRaghu Vatsavayi * is accurate. 712f21fb3edSRaghu Vatsavayi */ 713f21fb3edSRaghu Vatsavayi wmb(); 714f21fb3edSRaghu Vatsavayi writel((desc_refilled), droq->pkts_credit_reg); 715f21fb3edSRaghu Vatsavayi /* make sure mmio write completes */ 716f21fb3edSRaghu Vatsavayi mmiowb(); 717f21fb3edSRaghu Vatsavayi } 718f21fb3edSRaghu Vatsavayi 719f21fb3edSRaghu Vatsavayi } /* for (each packet)... */ 720f21fb3edSRaghu Vatsavayi 721f21fb3edSRaghu Vatsavayi /* Increment refill_count by the number of buffers processed. */ 722f21fb3edSRaghu Vatsavayi droq->stats.pkts_received += pkt; 723f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += total_len; 724f21fb3edSRaghu Vatsavayi 725f21fb3edSRaghu Vatsavayi if ((droq->ops.drop_on_max) && (pkts_to_process - pkt)) { 726f21fb3edSRaghu Vatsavayi octeon_droq_drop_packets(oct, droq, (pkts_to_process - pkt)); 727f21fb3edSRaghu Vatsavayi 728f21fb3edSRaghu Vatsavayi droq->stats.dropped_toomany += (pkts_to_process - pkt); 729f21fb3edSRaghu Vatsavayi return pkts_to_process; 730f21fb3edSRaghu Vatsavayi } 731f21fb3edSRaghu Vatsavayi 732f21fb3edSRaghu Vatsavayi return pkt; 733f21fb3edSRaghu Vatsavayi } 734f21fb3edSRaghu Vatsavayi 735f21fb3edSRaghu Vatsavayi int 736f21fb3edSRaghu Vatsavayi octeon_droq_process_packets(struct octeon_device *oct, 737f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 738f21fb3edSRaghu Vatsavayi u32 budget) 739f21fb3edSRaghu Vatsavayi { 740f21fb3edSRaghu Vatsavayi u32 pkt_count = 0, pkts_processed = 0; 741f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 742f21fb3edSRaghu Vatsavayi 743f21fb3edSRaghu Vatsavayi pkt_count = atomic_read(&droq->pkts_pending); 744f21fb3edSRaghu Vatsavayi if (!pkt_count) 745f21fb3edSRaghu Vatsavayi return 0; 746f21fb3edSRaghu Vatsavayi 747f21fb3edSRaghu Vatsavayi if (pkt_count > budget) 748f21fb3edSRaghu Vatsavayi pkt_count = budget; 749f21fb3edSRaghu Vatsavayi 750f21fb3edSRaghu Vatsavayi /* Grab the lock */ 751f21fb3edSRaghu Vatsavayi spin_lock(&droq->lock); 752f21fb3edSRaghu Vatsavayi 753f21fb3edSRaghu Vatsavayi pkts_processed = octeon_droq_fast_process_packets(oct, droq, pkt_count); 754f21fb3edSRaghu Vatsavayi 755f21fb3edSRaghu Vatsavayi atomic_sub(pkts_processed, &droq->pkts_pending); 756f21fb3edSRaghu Vatsavayi 757f21fb3edSRaghu Vatsavayi /* Release the spin lock */ 758f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 759f21fb3edSRaghu Vatsavayi 760f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 761f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 762f21fb3edSRaghu Vatsavayi 763f21fb3edSRaghu Vatsavayi list_del(tmp); 764f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 765f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 766f21fb3edSRaghu Vatsavayi (oct, 767f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 768f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 769f21fb3edSRaghu Vatsavayi } 770f21fb3edSRaghu Vatsavayi 771f21fb3edSRaghu Vatsavayi /* If there are packets pending. schedule tasklet again */ 772f21fb3edSRaghu Vatsavayi if (atomic_read(&droq->pkts_pending)) 773f21fb3edSRaghu Vatsavayi return 1; 774f21fb3edSRaghu Vatsavayi 775f21fb3edSRaghu Vatsavayi return 0; 776f21fb3edSRaghu Vatsavayi } 777f21fb3edSRaghu Vatsavayi 778f21fb3edSRaghu Vatsavayi /** 779f21fb3edSRaghu Vatsavayi * Utility function to poll for packets. check_hw_for_packets must be 780f21fb3edSRaghu Vatsavayi * called before calling this routine. 781f21fb3edSRaghu Vatsavayi */ 782f21fb3edSRaghu Vatsavayi 783f21fb3edSRaghu Vatsavayi static int 784f21fb3edSRaghu Vatsavayi octeon_droq_process_poll_pkts(struct octeon_device *oct, 785f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, u32 budget) 786f21fb3edSRaghu Vatsavayi { 787f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 788f21fb3edSRaghu Vatsavayi u32 pkts_available = 0, pkts_processed = 0; 789f21fb3edSRaghu Vatsavayi u32 total_pkts_processed = 0; 790f21fb3edSRaghu Vatsavayi 791f21fb3edSRaghu Vatsavayi if (budget > droq->max_count) 792f21fb3edSRaghu Vatsavayi budget = droq->max_count; 793f21fb3edSRaghu Vatsavayi 794f21fb3edSRaghu Vatsavayi spin_lock(&droq->lock); 795f21fb3edSRaghu Vatsavayi 796f21fb3edSRaghu Vatsavayi while (total_pkts_processed < budget) { 797f21fb3edSRaghu Vatsavayi pkts_available = 798f21fb3edSRaghu Vatsavayi CVM_MIN((budget - total_pkts_processed), 799f21fb3edSRaghu Vatsavayi (u32)(atomic_read(&droq->pkts_pending))); 800f21fb3edSRaghu Vatsavayi 801f21fb3edSRaghu Vatsavayi if (pkts_available == 0) 802f21fb3edSRaghu Vatsavayi break; 803f21fb3edSRaghu Vatsavayi 804f21fb3edSRaghu Vatsavayi pkts_processed = 805f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(oct, droq, 806f21fb3edSRaghu Vatsavayi pkts_available); 807f21fb3edSRaghu Vatsavayi 808f21fb3edSRaghu Vatsavayi atomic_sub(pkts_processed, &droq->pkts_pending); 809f21fb3edSRaghu Vatsavayi 810f21fb3edSRaghu Vatsavayi total_pkts_processed += pkts_processed; 811f21fb3edSRaghu Vatsavayi 812f21fb3edSRaghu Vatsavayi octeon_droq_check_hw_for_pkts(oct, droq); 813f21fb3edSRaghu Vatsavayi } 814f21fb3edSRaghu Vatsavayi 815f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 816f21fb3edSRaghu Vatsavayi 817f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 818f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 819f21fb3edSRaghu Vatsavayi 820f21fb3edSRaghu Vatsavayi list_del(tmp); 821f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 822f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 823f21fb3edSRaghu Vatsavayi (oct, 824f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 825f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 826f21fb3edSRaghu Vatsavayi } 827f21fb3edSRaghu Vatsavayi 828f21fb3edSRaghu Vatsavayi return total_pkts_processed; 829f21fb3edSRaghu Vatsavayi } 830f21fb3edSRaghu Vatsavayi 831f21fb3edSRaghu Vatsavayi int 832f21fb3edSRaghu Vatsavayi octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd, 833f21fb3edSRaghu Vatsavayi u32 arg) 834f21fb3edSRaghu Vatsavayi { 835f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 836f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 837f21fb3edSRaghu Vatsavayi 838f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 839f21fb3edSRaghu Vatsavayi 840f21fb3edSRaghu Vatsavayi if (!oct_cfg) 841f21fb3edSRaghu Vatsavayi return -EINVAL; 842f21fb3edSRaghu Vatsavayi 843f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 844f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 845f21fb3edSRaghu Vatsavayi __func__, q_no, (oct->num_oqs - 1)); 846f21fb3edSRaghu Vatsavayi return -EINVAL; 847f21fb3edSRaghu Vatsavayi } 848f21fb3edSRaghu Vatsavayi 849f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 850f21fb3edSRaghu Vatsavayi 851f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_PROCESS_PKTS) 852f21fb3edSRaghu Vatsavayi return octeon_droq_process_poll_pkts(oct, droq, arg); 853f21fb3edSRaghu Vatsavayi 854f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_PENDING_PKTS) { 855f21fb3edSRaghu Vatsavayi u32 pkt_cnt = atomic_read(&droq->pkts_pending); 856f21fb3edSRaghu Vatsavayi 857f21fb3edSRaghu Vatsavayi return octeon_droq_process_packets(oct, droq, pkt_cnt); 858f21fb3edSRaghu Vatsavayi } 859f21fb3edSRaghu Vatsavayi 860f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_ENABLE_INTR) { 861f21fb3edSRaghu Vatsavayi u32 value; 862f21fb3edSRaghu Vatsavayi unsigned long flags; 863f21fb3edSRaghu Vatsavayi 864f21fb3edSRaghu Vatsavayi /* Enable Pkt Interrupt */ 865f21fb3edSRaghu Vatsavayi switch (oct->chip_id) { 866f21fb3edSRaghu Vatsavayi case OCTEON_CN66XX: 867f21fb3edSRaghu Vatsavayi case OCTEON_CN68XX: { 868f21fb3edSRaghu Vatsavayi struct octeon_cn6xxx *cn6xxx = 869f21fb3edSRaghu Vatsavayi (struct octeon_cn6xxx *)oct->chip; 870f21fb3edSRaghu Vatsavayi spin_lock_irqsave 871f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 872f21fb3edSRaghu Vatsavayi value = 873f21fb3edSRaghu Vatsavayi octeon_read_csr(oct, 874f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_TIME_INT_ENB); 875f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 876f21fb3edSRaghu Vatsavayi octeon_write_csr(oct, 877f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_TIME_INT_ENB, 878f21fb3edSRaghu Vatsavayi value); 879f21fb3edSRaghu Vatsavayi value = 880f21fb3edSRaghu Vatsavayi octeon_read_csr(oct, 881f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_CNT_INT_ENB); 882f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 883f21fb3edSRaghu Vatsavayi octeon_write_csr(oct, 884f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_CNT_INT_ENB, 885f21fb3edSRaghu Vatsavayi value); 886f21fb3edSRaghu Vatsavayi 887f21fb3edSRaghu Vatsavayi /* don't bother flushing the enables */ 888f21fb3edSRaghu Vatsavayi 889f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore 890f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 891f21fb3edSRaghu Vatsavayi return 0; 892f21fb3edSRaghu Vatsavayi } 893f21fb3edSRaghu Vatsavayi break; 894f21fb3edSRaghu Vatsavayi } 895f21fb3edSRaghu Vatsavayi 896f21fb3edSRaghu Vatsavayi return 0; 897f21fb3edSRaghu Vatsavayi } 898f21fb3edSRaghu Vatsavayi 899f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s Unknown command: %d\n", __func__, cmd); 900f21fb3edSRaghu Vatsavayi return -EINVAL; 901f21fb3edSRaghu Vatsavayi } 902f21fb3edSRaghu Vatsavayi 903f21fb3edSRaghu Vatsavayi int octeon_register_droq_ops(struct octeon_device *oct, u32 q_no, 904f21fb3edSRaghu Vatsavayi struct octeon_droq_ops *ops) 905f21fb3edSRaghu Vatsavayi { 906f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 907f21fb3edSRaghu Vatsavayi unsigned long flags; 908f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 909f21fb3edSRaghu Vatsavayi 910f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 911f21fb3edSRaghu Vatsavayi 912f21fb3edSRaghu Vatsavayi if (!oct_cfg) 913f21fb3edSRaghu Vatsavayi return -EINVAL; 914f21fb3edSRaghu Vatsavayi 915f21fb3edSRaghu Vatsavayi if (!(ops)) { 916f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq_ops pointer is NULL\n", 917f21fb3edSRaghu Vatsavayi __func__); 918f21fb3edSRaghu Vatsavayi return -EINVAL; 919f21fb3edSRaghu Vatsavayi } 920f21fb3edSRaghu Vatsavayi 921f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 922f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 923f21fb3edSRaghu Vatsavayi __func__, q_no, (oct->num_oqs - 1)); 924f21fb3edSRaghu Vatsavayi return -EINVAL; 925f21fb3edSRaghu Vatsavayi } 926f21fb3edSRaghu Vatsavayi 927f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 928f21fb3edSRaghu Vatsavayi 929f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 930f21fb3edSRaghu Vatsavayi 931f21fb3edSRaghu Vatsavayi memcpy(&droq->ops, ops, sizeof(struct octeon_droq_ops)); 932f21fb3edSRaghu Vatsavayi 933f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 934f21fb3edSRaghu Vatsavayi 935f21fb3edSRaghu Vatsavayi return 0; 936f21fb3edSRaghu Vatsavayi } 937f21fb3edSRaghu Vatsavayi 938f21fb3edSRaghu Vatsavayi int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no) 939f21fb3edSRaghu Vatsavayi { 940f21fb3edSRaghu Vatsavayi unsigned long flags; 941f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 942f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 943f21fb3edSRaghu Vatsavayi 944f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 945f21fb3edSRaghu Vatsavayi 946f21fb3edSRaghu Vatsavayi if (!oct_cfg) 947f21fb3edSRaghu Vatsavayi return -EINVAL; 948f21fb3edSRaghu Vatsavayi 949f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 950f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 951f21fb3edSRaghu Vatsavayi __func__, q_no, oct->num_oqs - 1); 952f21fb3edSRaghu Vatsavayi return -EINVAL; 953f21fb3edSRaghu Vatsavayi } 954f21fb3edSRaghu Vatsavayi 955f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 956f21fb3edSRaghu Vatsavayi 957f21fb3edSRaghu Vatsavayi if (!droq) { 958f21fb3edSRaghu Vatsavayi dev_info(&oct->pci_dev->dev, 959f21fb3edSRaghu Vatsavayi "Droq id (%d) not available.\n", q_no); 960f21fb3edSRaghu Vatsavayi return 0; 961f21fb3edSRaghu Vatsavayi } 962f21fb3edSRaghu Vatsavayi 963f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 964f21fb3edSRaghu Vatsavayi 965f21fb3edSRaghu Vatsavayi droq->ops.fptr = NULL; 966f21fb3edSRaghu Vatsavayi droq->ops.drop_on_max = 0; 967f21fb3edSRaghu Vatsavayi 968f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 969f21fb3edSRaghu Vatsavayi 970f21fb3edSRaghu Vatsavayi return 0; 971f21fb3edSRaghu Vatsavayi } 972f21fb3edSRaghu Vatsavayi 973f21fb3edSRaghu Vatsavayi int octeon_create_droq(struct octeon_device *oct, 974f21fb3edSRaghu Vatsavayi u32 q_no, u32 num_descs, 975f21fb3edSRaghu Vatsavayi u32 desc_size, void *app_ctx) 976f21fb3edSRaghu Vatsavayi { 977f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 97896ae48b7SRaghu Vatsavayi int numa_node = cpu_to_node(q_no % num_online_cpus()); 979f21fb3edSRaghu Vatsavayi 980f21fb3edSRaghu Vatsavayi if (oct->droq[q_no]) { 981f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "Droq already in use. Cannot create droq %d again\n", 982f21fb3edSRaghu Vatsavayi q_no); 983f21fb3edSRaghu Vatsavayi return 1; 984f21fb3edSRaghu Vatsavayi } 985f21fb3edSRaghu Vatsavayi 986f21fb3edSRaghu Vatsavayi /* Allocate the DS for the new droq. */ 98796ae48b7SRaghu Vatsavayi droq = vmalloc_node(sizeof(*droq), numa_node); 98896ae48b7SRaghu Vatsavayi if (!droq) 989f21fb3edSRaghu Vatsavayi droq = vmalloc(sizeof(*droq)); 990f21fb3edSRaghu Vatsavayi if (!droq) 991f21fb3edSRaghu Vatsavayi goto create_droq_fail; 992f21fb3edSRaghu Vatsavayi memset(droq, 0, sizeof(struct octeon_droq)); 993f21fb3edSRaghu Vatsavayi 994f21fb3edSRaghu Vatsavayi /*Disable the pkt o/p for this Q */ 995f21fb3edSRaghu Vatsavayi octeon_set_droq_pkt_op(oct, q_no, 0); 996f21fb3edSRaghu Vatsavayi oct->droq[q_no] = droq; 997f21fb3edSRaghu Vatsavayi 998f21fb3edSRaghu Vatsavayi /* Initialize the Droq */ 999f21fb3edSRaghu Vatsavayi octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx); 1000f21fb3edSRaghu Vatsavayi 1001f21fb3edSRaghu Vatsavayi oct->num_oqs++; 1002f21fb3edSRaghu Vatsavayi 1003f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s: Total number of OQ: %d\n", __func__, 1004f21fb3edSRaghu Vatsavayi oct->num_oqs); 1005f21fb3edSRaghu Vatsavayi 1006f21fb3edSRaghu Vatsavayi /* Global Droq register settings */ 1007f21fb3edSRaghu Vatsavayi 1008f21fb3edSRaghu Vatsavayi /* As of now not required, as setting are done for all 32 Droqs at 1009f21fb3edSRaghu Vatsavayi * the same time. 1010f21fb3edSRaghu Vatsavayi */ 1011f21fb3edSRaghu Vatsavayi return 0; 1012f21fb3edSRaghu Vatsavayi 1013f21fb3edSRaghu Vatsavayi create_droq_fail: 1014f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no); 101508a965ecSAmitoj Kaur Chawla return -ENOMEM; 1016f21fb3edSRaghu Vatsavayi } 1017