1f21fb3edSRaghu Vatsavayi /********************************************************************** 2f21fb3edSRaghu Vatsavayi * Author: Cavium, Inc. 3f21fb3edSRaghu Vatsavayi * 4f21fb3edSRaghu Vatsavayi * Contact: support@cavium.com 5f21fb3edSRaghu Vatsavayi * Please include "LiquidIO" in the subject. 6f21fb3edSRaghu Vatsavayi * 750579d3dSRaghu Vatsavayi * Copyright (c) 2003-2016 Cavium, Inc. 8f21fb3edSRaghu Vatsavayi * 9f21fb3edSRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify 10f21fb3edSRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as 11f21fb3edSRaghu Vatsavayi * published by the Free Software Foundation. 12f21fb3edSRaghu Vatsavayi * 13f21fb3edSRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but 14f21fb3edSRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15f21fb3edSRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 1650579d3dSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more details. 1750579d3dSRaghu Vatsavayi ***********************************************************************/ 18f21fb3edSRaghu Vatsavayi #include <linux/pci.h> 19f21fb3edSRaghu Vatsavayi #include <linux/netdevice.h> 205b173cf9SRaghu Vatsavayi #include <linux/vmalloc.h> 21f21fb3edSRaghu Vatsavayi #include "liquidio_common.h" 22f21fb3edSRaghu Vatsavayi #include "octeon_droq.h" 23f21fb3edSRaghu Vatsavayi #include "octeon_iq.h" 24f21fb3edSRaghu Vatsavayi #include "response_manager.h" 25f21fb3edSRaghu Vatsavayi #include "octeon_device.h" 26f21fb3edSRaghu Vatsavayi #include "octeon_main.h" 27f21fb3edSRaghu Vatsavayi #include "octeon_network.h" 28f21fb3edSRaghu Vatsavayi #include "cn66xx_regs.h" 29f21fb3edSRaghu Vatsavayi #include "cn66xx_device.h" 305b823514SRaghu Vatsavayi #include "cn23xx_pf_device.h" 319217c3cfSRaghu Vatsavayi #include "cn23xx_vf_device.h" 32f21fb3edSRaghu Vatsavayi 33f21fb3edSRaghu Vatsavayi struct niclist { 34f21fb3edSRaghu Vatsavayi struct list_head list; 35f21fb3edSRaghu Vatsavayi void *ptr; 36f21fb3edSRaghu Vatsavayi }; 37f21fb3edSRaghu Vatsavayi 38f21fb3edSRaghu Vatsavayi struct __dispatch { 39f21fb3edSRaghu Vatsavayi struct list_head list; 40f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 41f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 42f21fb3edSRaghu Vatsavayi }; 43f21fb3edSRaghu Vatsavayi 44f21fb3edSRaghu Vatsavayi /** Get the argument that the user set when registering dispatch 45f21fb3edSRaghu Vatsavayi * function for a given opcode/subcode. 46f21fb3edSRaghu Vatsavayi * @param octeon_dev - the octeon device pointer. 47f21fb3edSRaghu Vatsavayi * @param opcode - the opcode for which the dispatch argument 48f21fb3edSRaghu Vatsavayi * is to be checked. 49f21fb3edSRaghu Vatsavayi * @param subcode - the subcode for which the dispatch argument 50f21fb3edSRaghu Vatsavayi * is to be checked. 51f21fb3edSRaghu Vatsavayi * @return Success: void * (argument to the dispatch function) 52f21fb3edSRaghu Vatsavayi * @return Failure: NULL 53f21fb3edSRaghu Vatsavayi * 54f21fb3edSRaghu Vatsavayi */ 55f21fb3edSRaghu Vatsavayi static inline void *octeon_get_dispatch_arg(struct octeon_device *octeon_dev, 56f21fb3edSRaghu Vatsavayi u16 opcode, u16 subcode) 57f21fb3edSRaghu Vatsavayi { 58f21fb3edSRaghu Vatsavayi int idx; 59f21fb3edSRaghu Vatsavayi struct list_head *dispatch; 60f21fb3edSRaghu Vatsavayi void *fn_arg = NULL; 61f21fb3edSRaghu Vatsavayi u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); 62f21fb3edSRaghu Vatsavayi 63f21fb3edSRaghu Vatsavayi idx = combined_opcode & OCTEON_OPCODE_MASK; 64f21fb3edSRaghu Vatsavayi 65f21fb3edSRaghu Vatsavayi spin_lock_bh(&octeon_dev->dispatch.lock); 66f21fb3edSRaghu Vatsavayi 67f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.count == 0) { 68f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 69f21fb3edSRaghu Vatsavayi return NULL; 70f21fb3edSRaghu Vatsavayi } 71f21fb3edSRaghu Vatsavayi 72f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.dlist[idx].opcode == combined_opcode) { 73f21fb3edSRaghu Vatsavayi fn_arg = octeon_dev->dispatch.dlist[idx].arg; 74f21fb3edSRaghu Vatsavayi } else { 75f21fb3edSRaghu Vatsavayi list_for_each(dispatch, 76f21fb3edSRaghu Vatsavayi &octeon_dev->dispatch.dlist[idx].list) { 77f21fb3edSRaghu Vatsavayi if (((struct octeon_dispatch *)dispatch)->opcode == 78f21fb3edSRaghu Vatsavayi combined_opcode) { 79f21fb3edSRaghu Vatsavayi fn_arg = ((struct octeon_dispatch *) 80f21fb3edSRaghu Vatsavayi dispatch)->arg; 81f21fb3edSRaghu Vatsavayi break; 82f21fb3edSRaghu Vatsavayi } 83f21fb3edSRaghu Vatsavayi } 84f21fb3edSRaghu Vatsavayi } 85f21fb3edSRaghu Vatsavayi 86f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 87f21fb3edSRaghu Vatsavayi return fn_arg; 88f21fb3edSRaghu Vatsavayi } 89f21fb3edSRaghu Vatsavayi 90cd8b1eb4SRaghu Vatsavayi /** Check for packets on Droq. This function should be called with lock held. 91a2c64b67SRaghu Vatsavayi * @param droq - Droq on which count is checked. 92a2c64b67SRaghu Vatsavayi * @return Returns packet count. 93a2c64b67SRaghu Vatsavayi */ 94a7d5a3dcSRaghu Vatsavayi u32 octeon_droq_check_hw_for_pkts(struct octeon_droq *droq) 95f21fb3edSRaghu Vatsavayi { 96f21fb3edSRaghu Vatsavayi u32 pkt_count = 0; 97cd8b1eb4SRaghu Vatsavayi u32 last_count; 98f21fb3edSRaghu Vatsavayi 99f21fb3edSRaghu Vatsavayi pkt_count = readl(droq->pkts_sent_reg); 100f21fb3edSRaghu Vatsavayi 101cd8b1eb4SRaghu Vatsavayi last_count = pkt_count - droq->pkt_count; 102cd8b1eb4SRaghu Vatsavayi droq->pkt_count = pkt_count; 103cd8b1eb4SRaghu Vatsavayi 104cd8b1eb4SRaghu Vatsavayi /* we shall write to cnts at napi irq enable or end of droq tasklet */ 105cd8b1eb4SRaghu Vatsavayi if (last_count) 106cd8b1eb4SRaghu Vatsavayi atomic_add(last_count, &droq->pkts_pending); 107cd8b1eb4SRaghu Vatsavayi 108cd8b1eb4SRaghu Vatsavayi return last_count; 109f21fb3edSRaghu Vatsavayi } 110f21fb3edSRaghu Vatsavayi 111f21fb3edSRaghu Vatsavayi static void octeon_droq_compute_max_packet_bufs(struct octeon_droq *droq) 112f21fb3edSRaghu Vatsavayi { 113f21fb3edSRaghu Vatsavayi u32 count = 0; 114f21fb3edSRaghu Vatsavayi 115f21fb3edSRaghu Vatsavayi /* max_empty_descs is the max. no. of descs that can have no buffers. 116f21fb3edSRaghu Vatsavayi * If the empty desc count goes beyond this value, we cannot safely 117f21fb3edSRaghu Vatsavayi * read in a 64K packet sent by Octeon 118f21fb3edSRaghu Vatsavayi * (64K is max pkt size from Octeon) 119f21fb3edSRaghu Vatsavayi */ 120f21fb3edSRaghu Vatsavayi droq->max_empty_descs = 0; 121f21fb3edSRaghu Vatsavayi 122f21fb3edSRaghu Vatsavayi do { 123f21fb3edSRaghu Vatsavayi droq->max_empty_descs++; 124f21fb3edSRaghu Vatsavayi count += droq->buffer_size; 125f21fb3edSRaghu Vatsavayi } while (count < (64 * 1024)); 126f21fb3edSRaghu Vatsavayi 127f21fb3edSRaghu Vatsavayi droq->max_empty_descs = droq->max_count - droq->max_empty_descs; 128f21fb3edSRaghu Vatsavayi } 129f21fb3edSRaghu Vatsavayi 130f21fb3edSRaghu Vatsavayi static void octeon_droq_reset_indices(struct octeon_droq *droq) 131f21fb3edSRaghu Vatsavayi { 132f21fb3edSRaghu Vatsavayi droq->read_idx = 0; 133f21fb3edSRaghu Vatsavayi droq->write_idx = 0; 134f21fb3edSRaghu Vatsavayi droq->refill_idx = 0; 135f21fb3edSRaghu Vatsavayi droq->refill_count = 0; 136f21fb3edSRaghu Vatsavayi atomic_set(&droq->pkts_pending, 0); 137f21fb3edSRaghu Vatsavayi } 138f21fb3edSRaghu Vatsavayi 139f21fb3edSRaghu Vatsavayi static void 140f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(struct octeon_device *oct, 141f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 142f21fb3edSRaghu Vatsavayi { 143f21fb3edSRaghu Vatsavayi u32 i; 144cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 145f21fb3edSRaghu Vatsavayi 146f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 147cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[i].pg_info; 148cabeb13bSRaghu Vatsavayi 149cabeb13bSRaghu Vatsavayi if (pg_info->dma) 150cabeb13bSRaghu Vatsavayi lio_unmap_ring(oct->pci_dev, 151cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 152cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 153cabeb13bSRaghu Vatsavayi 154cabeb13bSRaghu Vatsavayi if (pg_info->page) 155cabeb13bSRaghu Vatsavayi recv_buffer_destroy(droq->recv_buf_list[i].buffer, 156cabeb13bSRaghu Vatsavayi pg_info); 157cabeb13bSRaghu Vatsavayi 158cabeb13bSRaghu Vatsavayi if (droq->desc_ring && droq->desc_ring[i].info_ptr) 159f21fb3edSRaghu Vatsavayi lio_unmap_ring_info(oct->pci_dev, 160f21fb3edSRaghu Vatsavayi (u64)droq-> 161f21fb3edSRaghu Vatsavayi desc_ring[i].info_ptr, 162f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 163f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = NULL; 164f21fb3edSRaghu Vatsavayi } 165f21fb3edSRaghu Vatsavayi 166f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 167f21fb3edSRaghu Vatsavayi } 168f21fb3edSRaghu Vatsavayi 169f21fb3edSRaghu Vatsavayi static int 170f21fb3edSRaghu Vatsavayi octeon_droq_setup_ring_buffers(struct octeon_device *oct, 171f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 172f21fb3edSRaghu Vatsavayi { 173f21fb3edSRaghu Vatsavayi u32 i; 174f21fb3edSRaghu Vatsavayi void *buf; 175f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring = droq->desc_ring; 176f21fb3edSRaghu Vatsavayi 177f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 178cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(oct, &droq->recv_buf_list[i].pg_info); 179f21fb3edSRaghu Vatsavayi 180f21fb3edSRaghu Vatsavayi if (!buf) { 181f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s buffer alloc failed\n", 182f21fb3edSRaghu Vatsavayi __func__); 183cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 184f21fb3edSRaghu Vatsavayi return -ENOMEM; 185f21fb3edSRaghu Vatsavayi } 186f21fb3edSRaghu Vatsavayi 187f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = buf; 188f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].data = get_rbd(buf); 189f21fb3edSRaghu Vatsavayi droq->info_list[i].length = 0; 190f21fb3edSRaghu Vatsavayi 191f21fb3edSRaghu Vatsavayi /* map ring buffers into memory */ 192f21fb3edSRaghu Vatsavayi desc_ring[i].info_ptr = lio_map_ring_info(droq, i); 193f21fb3edSRaghu Vatsavayi desc_ring[i].buffer_ptr = 194cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[i].buffer); 195f21fb3edSRaghu Vatsavayi } 196f21fb3edSRaghu Vatsavayi 197f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 198f21fb3edSRaghu Vatsavayi 199f21fb3edSRaghu Vatsavayi octeon_droq_compute_max_packet_bufs(droq); 200f21fb3edSRaghu Vatsavayi 201f21fb3edSRaghu Vatsavayi return 0; 202f21fb3edSRaghu Vatsavayi } 203f21fb3edSRaghu Vatsavayi 204f21fb3edSRaghu Vatsavayi int octeon_delete_droq(struct octeon_device *oct, u32 q_no) 205f21fb3edSRaghu Vatsavayi { 206f21fb3edSRaghu Vatsavayi struct octeon_droq *droq = oct->droq[q_no]; 207f21fb3edSRaghu Vatsavayi 208f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 209f21fb3edSRaghu Vatsavayi 210f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(oct, droq); 211f21fb3edSRaghu Vatsavayi vfree(droq->recv_buf_list); 212f21fb3edSRaghu Vatsavayi 213f21fb3edSRaghu Vatsavayi if (droq->info_base_addr) 214f21fb3edSRaghu Vatsavayi cnnic_free_aligned_dma(oct->pci_dev, droq->info_list, 215f21fb3edSRaghu Vatsavayi droq->info_alloc_size, 216f21fb3edSRaghu Vatsavayi droq->info_base_addr, 217f21fb3edSRaghu Vatsavayi droq->info_list_dma); 218f21fb3edSRaghu Vatsavayi 219f21fb3edSRaghu Vatsavayi if (droq->desc_ring) 220f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 221f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 222f21fb3edSRaghu Vatsavayi 223f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 224f21fb3edSRaghu Vatsavayi 225f21fb3edSRaghu Vatsavayi return 0; 226f21fb3edSRaghu Vatsavayi } 227f21fb3edSRaghu Vatsavayi 228f21fb3edSRaghu Vatsavayi int octeon_init_droq(struct octeon_device *oct, 229f21fb3edSRaghu Vatsavayi u32 q_no, 230f21fb3edSRaghu Vatsavayi u32 num_descs, 231f21fb3edSRaghu Vatsavayi u32 desc_size, 232f21fb3edSRaghu Vatsavayi void *app_ctx) 233f21fb3edSRaghu Vatsavayi { 234f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 235f21fb3edSRaghu Vatsavayi u32 desc_ring_size = 0, c_num_descs = 0, c_buf_size = 0; 236f21fb3edSRaghu Vatsavayi u32 c_pkts_per_intr = 0, c_refill_threshold = 0; 237b3ca9af0SVSR Burru int numa_node = dev_to_node(&oct->pci_dev->dev); 238f21fb3edSRaghu Vatsavayi 239f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 240f21fb3edSRaghu Vatsavayi 241f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 242f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 243f21fb3edSRaghu Vatsavayi 244f21fb3edSRaghu Vatsavayi droq->oct_dev = oct; 245f21fb3edSRaghu Vatsavayi droq->q_no = q_no; 246f21fb3edSRaghu Vatsavayi if (app_ctx) 247f21fb3edSRaghu Vatsavayi droq->app_ctx = app_ctx; 248f21fb3edSRaghu Vatsavayi else 249f21fb3edSRaghu Vatsavayi droq->app_ctx = (void *)(size_t)q_no; 250f21fb3edSRaghu Vatsavayi 251f21fb3edSRaghu Vatsavayi c_num_descs = num_descs; 252f21fb3edSRaghu Vatsavayi c_buf_size = desc_size; 253f21fb3edSRaghu Vatsavayi if (OCTEON_CN6XXX(oct)) { 25497a25326SRaghu Vatsavayi struct octeon_config *conf6x = CHIP_CONF(oct, cn6xxx); 255f21fb3edSRaghu Vatsavayi 256f21fb3edSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf6x); 25796ae48b7SRaghu Vatsavayi c_refill_threshold = 25896ae48b7SRaghu Vatsavayi (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf6x); 2595b823514SRaghu Vatsavayi } else if (OCTEON_CN23XX_PF(oct)) { 26097a25326SRaghu Vatsavayi struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_pf); 2615b823514SRaghu Vatsavayi 2625b823514SRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23); 2635b823514SRaghu Vatsavayi c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23); 2649217c3cfSRaghu Vatsavayi } else if (OCTEON_CN23XX_VF(oct)) { 2659217c3cfSRaghu Vatsavayi struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_vf); 2669217c3cfSRaghu Vatsavayi 2679217c3cfSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23); 2689217c3cfSRaghu Vatsavayi c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23); 26996ae48b7SRaghu Vatsavayi } else { 27096ae48b7SRaghu Vatsavayi return 1; 271f21fb3edSRaghu Vatsavayi } 272f21fb3edSRaghu Vatsavayi 273f21fb3edSRaghu Vatsavayi droq->max_count = c_num_descs; 274f21fb3edSRaghu Vatsavayi droq->buffer_size = c_buf_size; 275f21fb3edSRaghu Vatsavayi 276f21fb3edSRaghu Vatsavayi desc_ring_size = droq->max_count * OCT_DROQ_DESC_SIZE; 277f21fb3edSRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size, 278f21fb3edSRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma); 279f21fb3edSRaghu Vatsavayi 280f21fb3edSRaghu Vatsavayi if (!droq->desc_ring) { 281f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 282f21fb3edSRaghu Vatsavayi "Output queue %d ring alloc failed\n", q_no); 283f21fb3edSRaghu Vatsavayi return 1; 284f21fb3edSRaghu Vatsavayi } 285f21fb3edSRaghu Vatsavayi 286f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n", 287f21fb3edSRaghu Vatsavayi q_no, droq->desc_ring, droq->desc_ring_dma); 288f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: num_desc: %d\n", q_no, 289f21fb3edSRaghu Vatsavayi droq->max_count); 290f21fb3edSRaghu Vatsavayi 291f21fb3edSRaghu Vatsavayi droq->info_list = 29296ae48b7SRaghu Vatsavayi cnnic_numa_alloc_aligned_dma((droq->max_count * 29396ae48b7SRaghu Vatsavayi OCT_DROQ_INFO_SIZE), 294f21fb3edSRaghu Vatsavayi &droq->info_alloc_size, 295f21fb3edSRaghu Vatsavayi &droq->info_base_addr, 29696ae48b7SRaghu Vatsavayi numa_node); 297f21fb3edSRaghu Vatsavayi if (!droq->info_list) { 298f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Cannot allocate memory for info list.\n"); 299f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 300f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 301f21fb3edSRaghu Vatsavayi return 1; 302f21fb3edSRaghu Vatsavayi } 303f21fb3edSRaghu Vatsavayi 304f21fb3edSRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 30596ae48b7SRaghu Vatsavayi vmalloc_node(droq->max_count * 30696ae48b7SRaghu Vatsavayi OCT_DROQ_RECVBUF_SIZE, 30796ae48b7SRaghu Vatsavayi numa_node); 30896ae48b7SRaghu Vatsavayi if (!droq->recv_buf_list) 30996ae48b7SRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 310f21fb3edSRaghu Vatsavayi vmalloc(droq->max_count * 311f21fb3edSRaghu Vatsavayi OCT_DROQ_RECVBUF_SIZE); 312f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list) { 313f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Output queue recv buf list alloc failed\n"); 314f21fb3edSRaghu Vatsavayi goto init_droq_fail; 315f21fb3edSRaghu Vatsavayi } 316f21fb3edSRaghu Vatsavayi 317f21fb3edSRaghu Vatsavayi if (octeon_droq_setup_ring_buffers(oct, droq)) 318f21fb3edSRaghu Vatsavayi goto init_droq_fail; 319f21fb3edSRaghu Vatsavayi 320f21fb3edSRaghu Vatsavayi droq->pkts_per_intr = c_pkts_per_intr; 321f21fb3edSRaghu Vatsavayi droq->refill_threshold = c_refill_threshold; 322f21fb3edSRaghu Vatsavayi 323f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "DROQ INIT: max_empty_descs: %d\n", 324f21fb3edSRaghu Vatsavayi droq->max_empty_descs); 325f21fb3edSRaghu Vatsavayi 326f21fb3edSRaghu Vatsavayi spin_lock_init(&droq->lock); 327f21fb3edSRaghu Vatsavayi 328f21fb3edSRaghu Vatsavayi INIT_LIST_HEAD(&droq->dispatch_list); 329f21fb3edSRaghu Vatsavayi 330f21fb3edSRaghu Vatsavayi /* For 56xx Pass1, this function won't be called, so no checks. */ 331f21fb3edSRaghu Vatsavayi oct->fn_list.setup_oq_regs(oct, q_no); 332f21fb3edSRaghu Vatsavayi 333763185a3SRaghu Vatsavayi oct->io_qmask.oq |= BIT_ULL(q_no); 334f21fb3edSRaghu Vatsavayi 335f21fb3edSRaghu Vatsavayi return 0; 336f21fb3edSRaghu Vatsavayi 337f21fb3edSRaghu Vatsavayi init_droq_fail: 338f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no); 339f21fb3edSRaghu Vatsavayi return 1; 340f21fb3edSRaghu Vatsavayi } 341f21fb3edSRaghu Vatsavayi 342f21fb3edSRaghu Vatsavayi /* octeon_create_recv_info 343f21fb3edSRaghu Vatsavayi * Parameters: 344f21fb3edSRaghu Vatsavayi * octeon_dev - pointer to the octeon device structure 345f21fb3edSRaghu Vatsavayi * droq - droq in which the packet arrived. 346f21fb3edSRaghu Vatsavayi * buf_cnt - no. of buffers used by the packet. 347f21fb3edSRaghu Vatsavayi * idx - index in the descriptor for the first buffer in the packet. 348f21fb3edSRaghu Vatsavayi * Description: 349f21fb3edSRaghu Vatsavayi * Allocates a recv_info_t and copies the buffer addresses for packet data 350f21fb3edSRaghu Vatsavayi * into the recv_pkt space which starts at an 8B offset from recv_info_t. 351f21fb3edSRaghu Vatsavayi * Flags the descriptors for refill later. If available descriptors go 352f21fb3edSRaghu Vatsavayi * below the threshold to receive a 64K pkt, new buffers are first allocated 353f21fb3edSRaghu Vatsavayi * before the recv_pkt_t is created. 354f21fb3edSRaghu Vatsavayi * This routine will be called in interrupt context. 355f21fb3edSRaghu Vatsavayi * Returns: 356f21fb3edSRaghu Vatsavayi * Success: Pointer to recv_info_t 357f21fb3edSRaghu Vatsavayi * Failure: NULL. 358f21fb3edSRaghu Vatsavayi * Locks: 359f21fb3edSRaghu Vatsavayi * The droq->lock is held when this routine is called. 360f21fb3edSRaghu Vatsavayi */ 361f21fb3edSRaghu Vatsavayi static inline struct octeon_recv_info *octeon_create_recv_info( 362f21fb3edSRaghu Vatsavayi struct octeon_device *octeon_dev, 363f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 364f21fb3edSRaghu Vatsavayi u32 buf_cnt, 365f21fb3edSRaghu Vatsavayi u32 idx) 366f21fb3edSRaghu Vatsavayi { 367f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 368f21fb3edSRaghu Vatsavayi struct octeon_recv_pkt *recv_pkt; 369f21fb3edSRaghu Vatsavayi struct octeon_recv_info *recv_info; 370f21fb3edSRaghu Vatsavayi u32 i, bytes_left; 371cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 372f21fb3edSRaghu Vatsavayi 373f21fb3edSRaghu Vatsavayi info = &droq->info_list[idx]; 374f21fb3edSRaghu Vatsavayi 375f21fb3edSRaghu Vatsavayi recv_info = octeon_alloc_recv_info(sizeof(struct __dispatch)); 376f21fb3edSRaghu Vatsavayi if (!recv_info) 377f21fb3edSRaghu Vatsavayi return NULL; 378f21fb3edSRaghu Vatsavayi 379f21fb3edSRaghu Vatsavayi recv_pkt = recv_info->recv_pkt; 380f21fb3edSRaghu Vatsavayi recv_pkt->rh = info->rh; 381f21fb3edSRaghu Vatsavayi recv_pkt->length = (u32)info->length; 382f21fb3edSRaghu Vatsavayi recv_pkt->buffer_count = (u16)buf_cnt; 383f21fb3edSRaghu Vatsavayi recv_pkt->octeon_id = (u16)octeon_dev->octeon_id; 384f21fb3edSRaghu Vatsavayi 385f21fb3edSRaghu Vatsavayi i = 0; 386f21fb3edSRaghu Vatsavayi bytes_left = (u32)info->length; 387f21fb3edSRaghu Vatsavayi 388f21fb3edSRaghu Vatsavayi while (buf_cnt) { 389cabeb13bSRaghu Vatsavayi { 390cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[idx].pg_info; 391cabeb13bSRaghu Vatsavayi 392f21fb3edSRaghu Vatsavayi lio_unmap_ring(octeon_dev->pci_dev, 393cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 394cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 395cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 396cabeb13bSRaghu Vatsavayi } 397f21fb3edSRaghu Vatsavayi 398f21fb3edSRaghu Vatsavayi recv_pkt->buffer_size[i] = 399f21fb3edSRaghu Vatsavayi (bytes_left >= 400f21fb3edSRaghu Vatsavayi droq->buffer_size) ? droq->buffer_size : bytes_left; 401f21fb3edSRaghu Vatsavayi 402f21fb3edSRaghu Vatsavayi recv_pkt->buffer_ptr[i] = droq->recv_buf_list[idx].buffer; 403f21fb3edSRaghu Vatsavayi droq->recv_buf_list[idx].buffer = NULL; 404f21fb3edSRaghu Vatsavayi 40597a25326SRaghu Vatsavayi idx = incr_index(idx, 1, droq->max_count); 406f21fb3edSRaghu Vatsavayi bytes_left -= droq->buffer_size; 407f21fb3edSRaghu Vatsavayi i++; 408f21fb3edSRaghu Vatsavayi buf_cnt--; 409f21fb3edSRaghu Vatsavayi } 410f21fb3edSRaghu Vatsavayi 411f21fb3edSRaghu Vatsavayi return recv_info; 412f21fb3edSRaghu Vatsavayi } 413f21fb3edSRaghu Vatsavayi 414f21fb3edSRaghu Vatsavayi /* If we were not able to refill all buffers, try to move around 415f21fb3edSRaghu Vatsavayi * the buffers that were not dispatched. 416f21fb3edSRaghu Vatsavayi */ 417f21fb3edSRaghu Vatsavayi static inline u32 418f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(struct octeon_droq *droq, 419f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring) 420f21fb3edSRaghu Vatsavayi { 421f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 422f21fb3edSRaghu Vatsavayi 423f21fb3edSRaghu Vatsavayi u32 refill_index = droq->refill_idx; 424f21fb3edSRaghu Vatsavayi 425f21fb3edSRaghu Vatsavayi while (refill_index != droq->read_idx) { 426f21fb3edSRaghu Vatsavayi if (droq->recv_buf_list[refill_index].buffer) { 427f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 428f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer; 429f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = 430f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].data; 431f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 432f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr; 433f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer = NULL; 434f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr = 0; 435f21fb3edSRaghu Vatsavayi do { 43697a25326SRaghu Vatsavayi droq->refill_idx = incr_index(droq->refill_idx, 43797a25326SRaghu Vatsavayi 1, 438f21fb3edSRaghu Vatsavayi droq->max_count); 439f21fb3edSRaghu Vatsavayi desc_refilled++; 440f21fb3edSRaghu Vatsavayi droq->refill_count--; 441f21fb3edSRaghu Vatsavayi } while (droq->recv_buf_list[droq->refill_idx]. 442f21fb3edSRaghu Vatsavayi buffer); 443f21fb3edSRaghu Vatsavayi } 44497a25326SRaghu Vatsavayi refill_index = incr_index(refill_index, 1, droq->max_count); 445f21fb3edSRaghu Vatsavayi } /* while */ 446f21fb3edSRaghu Vatsavayi return desc_refilled; 447f21fb3edSRaghu Vatsavayi } 448f21fb3edSRaghu Vatsavayi 449f21fb3edSRaghu Vatsavayi /* octeon_droq_refill 450f21fb3edSRaghu Vatsavayi * Parameters: 451f21fb3edSRaghu Vatsavayi * droq - droq in which descriptors require new buffers. 452f21fb3edSRaghu Vatsavayi * Description: 453f21fb3edSRaghu Vatsavayi * Called during normal DROQ processing in interrupt mode or by the poll 454f21fb3edSRaghu Vatsavayi * thread to refill the descriptors from which buffers were dispatched 455f21fb3edSRaghu Vatsavayi * to upper layers. Attempts to allocate new buffers. If that fails, moves 456f21fb3edSRaghu Vatsavayi * up buffers (that were not dispatched) to form a contiguous ring. 457f21fb3edSRaghu Vatsavayi * Returns: 458f21fb3edSRaghu Vatsavayi * No of descriptors refilled. 459f21fb3edSRaghu Vatsavayi * Locks: 460f21fb3edSRaghu Vatsavayi * This routine is called with droq->lock held. 461f21fb3edSRaghu Vatsavayi */ 462f21fb3edSRaghu Vatsavayi static u32 463f21fb3edSRaghu Vatsavayi octeon_droq_refill(struct octeon_device *octeon_dev, struct octeon_droq *droq) 464f21fb3edSRaghu Vatsavayi { 465f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring; 466f21fb3edSRaghu Vatsavayi void *buf = NULL; 467f21fb3edSRaghu Vatsavayi u8 *data; 468f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 469cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 470f21fb3edSRaghu Vatsavayi 471f21fb3edSRaghu Vatsavayi desc_ring = droq->desc_ring; 472f21fb3edSRaghu Vatsavayi 473f21fb3edSRaghu Vatsavayi while (droq->refill_count && (desc_refilled < droq->max_count)) { 474f21fb3edSRaghu Vatsavayi /* If a valid buffer exists (happens if there is no dispatch), 475f21fb3edSRaghu Vatsavayi * reuse 476f21fb3edSRaghu Vatsavayi * the buffer, else allocate. 477f21fb3edSRaghu Vatsavayi */ 478f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list[droq->refill_idx].buffer) { 479cabeb13bSRaghu Vatsavayi pg_info = 480cabeb13bSRaghu Vatsavayi &droq->recv_buf_list[droq->refill_idx].pg_info; 481cabeb13bSRaghu Vatsavayi /* Either recycle the existing pages or go for 482cabeb13bSRaghu Vatsavayi * new page alloc 483cabeb13bSRaghu Vatsavayi */ 484cabeb13bSRaghu Vatsavayi if (pg_info->page) 485cabeb13bSRaghu Vatsavayi buf = recv_buffer_reuse(octeon_dev, pg_info); 486cabeb13bSRaghu Vatsavayi else 487cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(octeon_dev, pg_info); 488f21fb3edSRaghu Vatsavayi /* If a buffer could not be allocated, no point in 489f21fb3edSRaghu Vatsavayi * continuing 490f21fb3edSRaghu Vatsavayi */ 491cabeb13bSRaghu Vatsavayi if (!buf) { 492cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 493f21fb3edSRaghu Vatsavayi break; 494cabeb13bSRaghu Vatsavayi } 495f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 496f21fb3edSRaghu Vatsavayi buf; 497f21fb3edSRaghu Vatsavayi data = get_rbd(buf); 498f21fb3edSRaghu Vatsavayi } else { 499f21fb3edSRaghu Vatsavayi data = get_rbd(droq->recv_buf_list 500f21fb3edSRaghu Vatsavayi [droq->refill_idx].buffer); 501f21fb3edSRaghu Vatsavayi } 502f21fb3edSRaghu Vatsavayi 503f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = data; 504f21fb3edSRaghu Vatsavayi 505f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 506cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[droq-> 507cabeb13bSRaghu Vatsavayi refill_idx].buffer); 508f21fb3edSRaghu Vatsavayi /* Reset any previous values in the length field. */ 509f21fb3edSRaghu Vatsavayi droq->info_list[droq->refill_idx].length = 0; 510f21fb3edSRaghu Vatsavayi 51197a25326SRaghu Vatsavayi droq->refill_idx = incr_index(droq->refill_idx, 1, 51297a25326SRaghu Vatsavayi droq->max_count); 513f21fb3edSRaghu Vatsavayi desc_refilled++; 514f21fb3edSRaghu Vatsavayi droq->refill_count--; 515f21fb3edSRaghu Vatsavayi } 516f21fb3edSRaghu Vatsavayi 517f21fb3edSRaghu Vatsavayi if (droq->refill_count) 518f21fb3edSRaghu Vatsavayi desc_refilled += 519f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(droq, desc_ring); 520f21fb3edSRaghu Vatsavayi 521f21fb3edSRaghu Vatsavayi /* if droq->refill_count 522f21fb3edSRaghu Vatsavayi * The refill count would not change in pass two. We only moved buffers 523f21fb3edSRaghu Vatsavayi * to close the gap in the ring, but we would still have the same no. of 524f21fb3edSRaghu Vatsavayi * buffers to refill. 525f21fb3edSRaghu Vatsavayi */ 526f21fb3edSRaghu Vatsavayi return desc_refilled; 527f21fb3edSRaghu Vatsavayi } 528f21fb3edSRaghu Vatsavayi 529f21fb3edSRaghu Vatsavayi static inline u32 530f21fb3edSRaghu Vatsavayi octeon_droq_get_bufcount(u32 buf_size, u32 total_len) 531f21fb3edSRaghu Vatsavayi { 532f21fb3edSRaghu Vatsavayi u32 buf_cnt = 0; 533f21fb3edSRaghu Vatsavayi 534f21fb3edSRaghu Vatsavayi while (total_len > (buf_size * buf_cnt)) 535f21fb3edSRaghu Vatsavayi buf_cnt++; 536f21fb3edSRaghu Vatsavayi return buf_cnt; 537f21fb3edSRaghu Vatsavayi } 538f21fb3edSRaghu Vatsavayi 539f21fb3edSRaghu Vatsavayi static int 540f21fb3edSRaghu Vatsavayi octeon_droq_dispatch_pkt(struct octeon_device *oct, 541f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 542f21fb3edSRaghu Vatsavayi union octeon_rh *rh, 543f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info) 544f21fb3edSRaghu Vatsavayi { 545f21fb3edSRaghu Vatsavayi u32 cnt; 546f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 547f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 548f21fb3edSRaghu Vatsavayi 549f21fb3edSRaghu Vatsavayi cnt = octeon_droq_get_bufcount(droq->buffer_size, (u32)info->length); 550f21fb3edSRaghu Vatsavayi 551f21fb3edSRaghu Vatsavayi disp_fn = octeon_get_dispatch(oct, (u16)rh->r.opcode, 552f21fb3edSRaghu Vatsavayi (u16)rh->r.subcode); 553f21fb3edSRaghu Vatsavayi if (disp_fn) { 554f21fb3edSRaghu Vatsavayi rinfo = octeon_create_recv_info(oct, droq, cnt, droq->read_idx); 555f21fb3edSRaghu Vatsavayi if (rinfo) { 556f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = rinfo->rsvd; 557f21fb3edSRaghu Vatsavayi 558f21fb3edSRaghu Vatsavayi rdisp->rinfo = rinfo; 559f21fb3edSRaghu Vatsavayi rdisp->disp_fn = disp_fn; 560f21fb3edSRaghu Vatsavayi rinfo->recv_pkt->rh = *rh; 561f21fb3edSRaghu Vatsavayi list_add_tail(&rdisp->list, 562f21fb3edSRaghu Vatsavayi &droq->dispatch_list); 563f21fb3edSRaghu Vatsavayi } else { 564f21fb3edSRaghu Vatsavayi droq->stats.dropped_nomem++; 565f21fb3edSRaghu Vatsavayi } 566f21fb3edSRaghu Vatsavayi } else { 567a2c64b67SRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function (opcode %u/%u)\n", 568a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.opcode, 569a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.subcode); 570f21fb3edSRaghu Vatsavayi droq->stats.dropped_nodispatch++; 5719ded1a51SRaghu Vatsavayi } 572f21fb3edSRaghu Vatsavayi 573f21fb3edSRaghu Vatsavayi return cnt; 574f21fb3edSRaghu Vatsavayi } 575f21fb3edSRaghu Vatsavayi 576f21fb3edSRaghu Vatsavayi static inline void octeon_droq_drop_packets(struct octeon_device *oct, 577f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 578f21fb3edSRaghu Vatsavayi u32 cnt) 579f21fb3edSRaghu Vatsavayi { 580f21fb3edSRaghu Vatsavayi u32 i = 0, buf_cnt; 581f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 582f21fb3edSRaghu Vatsavayi 583f21fb3edSRaghu Vatsavayi for (i = 0; i < cnt; i++) { 584f21fb3edSRaghu Vatsavayi info = &droq->info_list[droq->read_idx]; 585f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 586f21fb3edSRaghu Vatsavayi 587f21fb3edSRaghu Vatsavayi if (info->length) { 588f21fb3edSRaghu Vatsavayi info->length -= OCT_RH_SIZE; 589f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += info->length; 590f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_get_bufcount(droq->buffer_size, 591f21fb3edSRaghu Vatsavayi (u32)info->length); 592f21fb3edSRaghu Vatsavayi } else { 593f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: In drop: pkt with len 0\n"); 594f21fb3edSRaghu Vatsavayi buf_cnt = 1; 595f21fb3edSRaghu Vatsavayi } 596f21fb3edSRaghu Vatsavayi 59797a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, buf_cnt, 59897a25326SRaghu Vatsavayi droq->max_count); 599f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 600f21fb3edSRaghu Vatsavayi } 601f21fb3edSRaghu Vatsavayi } 602f21fb3edSRaghu Vatsavayi 603f21fb3edSRaghu Vatsavayi static u32 604f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(struct octeon_device *oct, 605f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 606f21fb3edSRaghu Vatsavayi u32 pkts_to_process) 607f21fb3edSRaghu Vatsavayi { 608f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 609f21fb3edSRaghu Vatsavayi union octeon_rh *rh; 610f21fb3edSRaghu Vatsavayi u32 pkt, total_len = 0, pkt_count; 611f21fb3edSRaghu Vatsavayi 612f21fb3edSRaghu Vatsavayi pkt_count = pkts_to_process; 613f21fb3edSRaghu Vatsavayi 614f21fb3edSRaghu Vatsavayi for (pkt = 0; pkt < pkt_count; pkt++) { 615f21fb3edSRaghu Vatsavayi u32 pkt_len = 0; 616f21fb3edSRaghu Vatsavayi struct sk_buff *nicbuf = NULL; 617cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 618cabeb13bSRaghu Vatsavayi void *buf; 619f21fb3edSRaghu Vatsavayi 620f21fb3edSRaghu Vatsavayi info = &droq->info_list[droq->read_idx]; 621f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 622f21fb3edSRaghu Vatsavayi 623f21fb3edSRaghu Vatsavayi if (!info->length) { 624f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 625f21fb3edSRaghu Vatsavayi "DROQ[%d] idx: %d len:0, pkt_cnt: %d\n", 626f21fb3edSRaghu Vatsavayi droq->q_no, droq->read_idx, pkt_count); 627f21fb3edSRaghu Vatsavayi print_hex_dump_bytes("", DUMP_PREFIX_ADDRESS, 628f21fb3edSRaghu Vatsavayi (u8 *)info, 629f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 630f21fb3edSRaghu Vatsavayi break; 631f21fb3edSRaghu Vatsavayi } 632f21fb3edSRaghu Vatsavayi 633f21fb3edSRaghu Vatsavayi /* Len of resp hdr in included in the received data len. */ 634f21fb3edSRaghu Vatsavayi info->length -= OCT_RH_SIZE; 635f21fb3edSRaghu Vatsavayi rh = &info->rh; 636f21fb3edSRaghu Vatsavayi 637f21fb3edSRaghu Vatsavayi total_len += (u32)info->length; 63897a25326SRaghu Vatsavayi if (opcode_slow_path(rh)) { 639f21fb3edSRaghu Vatsavayi u32 buf_cnt; 640f21fb3edSRaghu Vatsavayi 641f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_dispatch_pkt(oct, droq, rh, info); 64297a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, 64397a25326SRaghu Vatsavayi buf_cnt, droq->max_count); 644f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 645f21fb3edSRaghu Vatsavayi } else { 646f21fb3edSRaghu Vatsavayi if (info->length <= droq->buffer_size) { 647f21fb3edSRaghu Vatsavayi pkt_len = (u32)info->length; 648f21fb3edSRaghu Vatsavayi nicbuf = droq->recv_buf_list[ 649f21fb3edSRaghu Vatsavayi droq->read_idx].buffer; 650cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[ 651cabeb13bSRaghu Vatsavayi droq->read_idx].pg_info; 652cabeb13bSRaghu Vatsavayi if (recv_buffer_recycle(oct, pg_info)) 653cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 654f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->read_idx].buffer = 655f21fb3edSRaghu Vatsavayi NULL; 656a2c64b67SRaghu Vatsavayi 65797a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, 1, 65897a25326SRaghu Vatsavayi droq->max_count); 659f21fb3edSRaghu Vatsavayi droq->refill_count++; 660f21fb3edSRaghu Vatsavayi } else { 661cabeb13bSRaghu Vatsavayi nicbuf = octeon_fast_packet_alloc((u32) 662f21fb3edSRaghu Vatsavayi info->length); 663f21fb3edSRaghu Vatsavayi pkt_len = 0; 664f21fb3edSRaghu Vatsavayi /* nicbuf allocation can fail. We'll handle it 665f21fb3edSRaghu Vatsavayi * inside the loop. 666f21fb3edSRaghu Vatsavayi */ 667f21fb3edSRaghu Vatsavayi while (pkt_len < info->length) { 668cabeb13bSRaghu Vatsavayi int cpy_len, idx = droq->read_idx; 669f21fb3edSRaghu Vatsavayi 670cabeb13bSRaghu Vatsavayi cpy_len = ((pkt_len + droq->buffer_size) 671cabeb13bSRaghu Vatsavayi > info->length) ? 672f21fb3edSRaghu Vatsavayi ((u32)info->length - pkt_len) : 673f21fb3edSRaghu Vatsavayi droq->buffer_size; 674f21fb3edSRaghu Vatsavayi 675f21fb3edSRaghu Vatsavayi if (nicbuf) { 676f21fb3edSRaghu Vatsavayi octeon_fast_packet_next(droq, 677f21fb3edSRaghu Vatsavayi nicbuf, 678f21fb3edSRaghu Vatsavayi cpy_len, 679cabeb13bSRaghu Vatsavayi idx); 680cabeb13bSRaghu Vatsavayi buf = droq->recv_buf_list[idx]. 681cabeb13bSRaghu Vatsavayi buffer; 682cabeb13bSRaghu Vatsavayi recv_buffer_fast_free(buf); 683cabeb13bSRaghu Vatsavayi droq->recv_buf_list[idx].buffer 684cabeb13bSRaghu Vatsavayi = NULL; 685cabeb13bSRaghu Vatsavayi } else { 686cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 687f21fb3edSRaghu Vatsavayi } 688f21fb3edSRaghu Vatsavayi 689f21fb3edSRaghu Vatsavayi pkt_len += cpy_len; 69097a25326SRaghu Vatsavayi droq->read_idx = 69197a25326SRaghu Vatsavayi incr_index(droq->read_idx, 1, 692f21fb3edSRaghu Vatsavayi droq->max_count); 693f21fb3edSRaghu Vatsavayi droq->refill_count++; 694f21fb3edSRaghu Vatsavayi } 695f21fb3edSRaghu Vatsavayi } 696f21fb3edSRaghu Vatsavayi 697f21fb3edSRaghu Vatsavayi if (nicbuf) { 698cabeb13bSRaghu Vatsavayi if (droq->ops.fptr) { 699f21fb3edSRaghu Vatsavayi droq->ops.fptr(oct->octeon_id, 700f21fb3edSRaghu Vatsavayi nicbuf, pkt_len, 7010cece6c5SRaghu Vatsavayi rh, &droq->napi, 7020cece6c5SRaghu Vatsavayi droq->ops.farg); 703cabeb13bSRaghu Vatsavayi } else { 704f21fb3edSRaghu Vatsavayi recv_buffer_free(nicbuf); 705f21fb3edSRaghu Vatsavayi } 706f21fb3edSRaghu Vatsavayi } 707cabeb13bSRaghu Vatsavayi } 708f21fb3edSRaghu Vatsavayi 709f21fb3edSRaghu Vatsavayi if (droq->refill_count >= droq->refill_threshold) { 710f21fb3edSRaghu Vatsavayi int desc_refilled = octeon_droq_refill(oct, droq); 711f21fb3edSRaghu Vatsavayi 712f21fb3edSRaghu Vatsavayi /* Flush the droq descriptor data to memory to be sure 713f21fb3edSRaghu Vatsavayi * that when we update the credits the data in memory 714f21fb3edSRaghu Vatsavayi * is accurate. 715f21fb3edSRaghu Vatsavayi */ 716f21fb3edSRaghu Vatsavayi wmb(); 717f21fb3edSRaghu Vatsavayi writel((desc_refilled), droq->pkts_credit_reg); 718f21fb3edSRaghu Vatsavayi /* make sure mmio write completes */ 719f21fb3edSRaghu Vatsavayi mmiowb(); 720f21fb3edSRaghu Vatsavayi } 721f21fb3edSRaghu Vatsavayi 722f21fb3edSRaghu Vatsavayi } /* for (each packet)... */ 723f21fb3edSRaghu Vatsavayi 724f21fb3edSRaghu Vatsavayi /* Increment refill_count by the number of buffers processed. */ 725f21fb3edSRaghu Vatsavayi droq->stats.pkts_received += pkt; 726f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += total_len; 727f21fb3edSRaghu Vatsavayi 728f21fb3edSRaghu Vatsavayi if ((droq->ops.drop_on_max) && (pkts_to_process - pkt)) { 729f21fb3edSRaghu Vatsavayi octeon_droq_drop_packets(oct, droq, (pkts_to_process - pkt)); 730f21fb3edSRaghu Vatsavayi 731f21fb3edSRaghu Vatsavayi droq->stats.dropped_toomany += (pkts_to_process - pkt); 732f21fb3edSRaghu Vatsavayi return pkts_to_process; 733f21fb3edSRaghu Vatsavayi } 734f21fb3edSRaghu Vatsavayi 735f21fb3edSRaghu Vatsavayi return pkt; 736f21fb3edSRaghu Vatsavayi } 737f21fb3edSRaghu Vatsavayi 738f21fb3edSRaghu Vatsavayi int 739f21fb3edSRaghu Vatsavayi octeon_droq_process_packets(struct octeon_device *oct, 740f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 741f21fb3edSRaghu Vatsavayi u32 budget) 742f21fb3edSRaghu Vatsavayi { 743f21fb3edSRaghu Vatsavayi u32 pkt_count = 0, pkts_processed = 0; 744f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 745f21fb3edSRaghu Vatsavayi 746cd8b1eb4SRaghu Vatsavayi /* Grab the droq lock */ 747cd8b1eb4SRaghu Vatsavayi spin_lock(&droq->lock); 748cd8b1eb4SRaghu Vatsavayi 749cd8b1eb4SRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq); 750f21fb3edSRaghu Vatsavayi pkt_count = atomic_read(&droq->pkts_pending); 751cd8b1eb4SRaghu Vatsavayi 752cd8b1eb4SRaghu Vatsavayi if (!pkt_count) { 753cd8b1eb4SRaghu Vatsavayi spin_unlock(&droq->lock); 754f21fb3edSRaghu Vatsavayi return 0; 755cd8b1eb4SRaghu Vatsavayi } 756f21fb3edSRaghu Vatsavayi 757f21fb3edSRaghu Vatsavayi if (pkt_count > budget) 758f21fb3edSRaghu Vatsavayi pkt_count = budget; 759f21fb3edSRaghu Vatsavayi 760f21fb3edSRaghu Vatsavayi pkts_processed = octeon_droq_fast_process_packets(oct, droq, pkt_count); 761f21fb3edSRaghu Vatsavayi 762f21fb3edSRaghu Vatsavayi atomic_sub(pkts_processed, &droq->pkts_pending); 763f21fb3edSRaghu Vatsavayi 764f21fb3edSRaghu Vatsavayi /* Release the spin lock */ 765f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 766f21fb3edSRaghu Vatsavayi 767f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 768f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 769f21fb3edSRaghu Vatsavayi 770f21fb3edSRaghu Vatsavayi list_del(tmp); 771f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 772f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 773f21fb3edSRaghu Vatsavayi (oct, 774f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 775f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 776f21fb3edSRaghu Vatsavayi } 777f21fb3edSRaghu Vatsavayi 778f21fb3edSRaghu Vatsavayi /* If there are packets pending. schedule tasklet again */ 779f21fb3edSRaghu Vatsavayi if (atomic_read(&droq->pkts_pending)) 780f21fb3edSRaghu Vatsavayi return 1; 781f21fb3edSRaghu Vatsavayi 782f21fb3edSRaghu Vatsavayi return 0; 783f21fb3edSRaghu Vatsavayi } 784f21fb3edSRaghu Vatsavayi 785f21fb3edSRaghu Vatsavayi /** 786f21fb3edSRaghu Vatsavayi * Utility function to poll for packets. check_hw_for_packets must be 787f21fb3edSRaghu Vatsavayi * called before calling this routine. 788f21fb3edSRaghu Vatsavayi */ 789f21fb3edSRaghu Vatsavayi 790f21fb3edSRaghu Vatsavayi static int 791f21fb3edSRaghu Vatsavayi octeon_droq_process_poll_pkts(struct octeon_device *oct, 792f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, u32 budget) 793f21fb3edSRaghu Vatsavayi { 794f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 795f21fb3edSRaghu Vatsavayi u32 pkts_available = 0, pkts_processed = 0; 796f21fb3edSRaghu Vatsavayi u32 total_pkts_processed = 0; 797f21fb3edSRaghu Vatsavayi 798f21fb3edSRaghu Vatsavayi if (budget > droq->max_count) 799f21fb3edSRaghu Vatsavayi budget = droq->max_count; 800f21fb3edSRaghu Vatsavayi 801f21fb3edSRaghu Vatsavayi spin_lock(&droq->lock); 802f21fb3edSRaghu Vatsavayi 803f21fb3edSRaghu Vatsavayi while (total_pkts_processed < budget) { 804cd8b1eb4SRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq); 805cd8b1eb4SRaghu Vatsavayi 80697a25326SRaghu Vatsavayi pkts_available = min((budget - total_pkts_processed), 807f21fb3edSRaghu Vatsavayi (u32)(atomic_read(&droq->pkts_pending))); 808f21fb3edSRaghu Vatsavayi 809f21fb3edSRaghu Vatsavayi if (pkts_available == 0) 810f21fb3edSRaghu Vatsavayi break; 811f21fb3edSRaghu Vatsavayi 812f21fb3edSRaghu Vatsavayi pkts_processed = 813f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(oct, droq, 814f21fb3edSRaghu Vatsavayi pkts_available); 815f21fb3edSRaghu Vatsavayi 816f21fb3edSRaghu Vatsavayi atomic_sub(pkts_processed, &droq->pkts_pending); 817f21fb3edSRaghu Vatsavayi 818f21fb3edSRaghu Vatsavayi total_pkts_processed += pkts_processed; 819f21fb3edSRaghu Vatsavayi } 820f21fb3edSRaghu Vatsavayi 821f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 822f21fb3edSRaghu Vatsavayi 823f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 824f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 825f21fb3edSRaghu Vatsavayi 826f21fb3edSRaghu Vatsavayi list_del(tmp); 827f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 828f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 829f21fb3edSRaghu Vatsavayi (oct, 830f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 831f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 832f21fb3edSRaghu Vatsavayi } 833f21fb3edSRaghu Vatsavayi 834f21fb3edSRaghu Vatsavayi return total_pkts_processed; 835f21fb3edSRaghu Vatsavayi } 836f21fb3edSRaghu Vatsavayi 837f21fb3edSRaghu Vatsavayi int 838f21fb3edSRaghu Vatsavayi octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd, 839f21fb3edSRaghu Vatsavayi u32 arg) 840f21fb3edSRaghu Vatsavayi { 841f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 842f21fb3edSRaghu Vatsavayi 843f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 844f21fb3edSRaghu Vatsavayi 845f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_PROCESS_PKTS) 846f21fb3edSRaghu Vatsavayi return octeon_droq_process_poll_pkts(oct, droq, arg); 847f21fb3edSRaghu Vatsavayi 848f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_PENDING_PKTS) { 849f21fb3edSRaghu Vatsavayi u32 pkt_cnt = atomic_read(&droq->pkts_pending); 850f21fb3edSRaghu Vatsavayi 851f21fb3edSRaghu Vatsavayi return octeon_droq_process_packets(oct, droq, pkt_cnt); 852f21fb3edSRaghu Vatsavayi } 853f21fb3edSRaghu Vatsavayi 854f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_ENABLE_INTR) { 855f21fb3edSRaghu Vatsavayi u32 value; 856f21fb3edSRaghu Vatsavayi unsigned long flags; 857f21fb3edSRaghu Vatsavayi 858f21fb3edSRaghu Vatsavayi /* Enable Pkt Interrupt */ 859f21fb3edSRaghu Vatsavayi switch (oct->chip_id) { 860f21fb3edSRaghu Vatsavayi case OCTEON_CN66XX: 861f21fb3edSRaghu Vatsavayi case OCTEON_CN68XX: { 862f21fb3edSRaghu Vatsavayi struct octeon_cn6xxx *cn6xxx = 863f21fb3edSRaghu Vatsavayi (struct octeon_cn6xxx *)oct->chip; 864f21fb3edSRaghu Vatsavayi spin_lock_irqsave 865f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 866f21fb3edSRaghu Vatsavayi value = 867f21fb3edSRaghu Vatsavayi octeon_read_csr(oct, 868f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_TIME_INT_ENB); 869f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 870f21fb3edSRaghu Vatsavayi octeon_write_csr(oct, 871f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_TIME_INT_ENB, 872f21fb3edSRaghu Vatsavayi value); 873f21fb3edSRaghu Vatsavayi value = 874f21fb3edSRaghu Vatsavayi octeon_read_csr(oct, 875f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_CNT_INT_ENB); 876f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 877f21fb3edSRaghu Vatsavayi octeon_write_csr(oct, 878f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_CNT_INT_ENB, 879f21fb3edSRaghu Vatsavayi value); 880f21fb3edSRaghu Vatsavayi 881f21fb3edSRaghu Vatsavayi /* don't bother flushing the enables */ 882f21fb3edSRaghu Vatsavayi 883f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore 884f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 885f21fb3edSRaghu Vatsavayi return 0; 886f21fb3edSRaghu Vatsavayi } 887f21fb3edSRaghu Vatsavayi break; 8889ded1a51SRaghu Vatsavayi case OCTEON_CN23XX_PF_VID: { 8899ded1a51SRaghu Vatsavayi lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]); 890f21fb3edSRaghu Vatsavayi } 8919ded1a51SRaghu Vatsavayi break; 8929217c3cfSRaghu Vatsavayi 8939217c3cfSRaghu Vatsavayi case OCTEON_CN23XX_VF_VID: 8949217c3cfSRaghu Vatsavayi lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]); 8959217c3cfSRaghu Vatsavayi break; 8969ded1a51SRaghu Vatsavayi } 897f21fb3edSRaghu Vatsavayi return 0; 898f21fb3edSRaghu Vatsavayi } 899f21fb3edSRaghu Vatsavayi 900f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s Unknown command: %d\n", __func__, cmd); 901f21fb3edSRaghu Vatsavayi return -EINVAL; 902f21fb3edSRaghu Vatsavayi } 903f21fb3edSRaghu Vatsavayi 904f21fb3edSRaghu Vatsavayi int octeon_register_droq_ops(struct octeon_device *oct, u32 q_no, 905f21fb3edSRaghu Vatsavayi struct octeon_droq_ops *ops) 906f21fb3edSRaghu Vatsavayi { 907f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 908f21fb3edSRaghu Vatsavayi unsigned long flags; 909f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 910f21fb3edSRaghu Vatsavayi 911f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 912f21fb3edSRaghu Vatsavayi 913f21fb3edSRaghu Vatsavayi if (!oct_cfg) 914f21fb3edSRaghu Vatsavayi return -EINVAL; 915f21fb3edSRaghu Vatsavayi 916f21fb3edSRaghu Vatsavayi if (!(ops)) { 917f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq_ops pointer is NULL\n", 918f21fb3edSRaghu Vatsavayi __func__); 919f21fb3edSRaghu Vatsavayi return -EINVAL; 920f21fb3edSRaghu Vatsavayi } 921f21fb3edSRaghu Vatsavayi 922f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 923f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 924f21fb3edSRaghu Vatsavayi __func__, q_no, (oct->num_oqs - 1)); 925f21fb3edSRaghu Vatsavayi return -EINVAL; 926f21fb3edSRaghu Vatsavayi } 927f21fb3edSRaghu Vatsavayi 928f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 929f21fb3edSRaghu Vatsavayi 930f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 931f21fb3edSRaghu Vatsavayi 932f21fb3edSRaghu Vatsavayi memcpy(&droq->ops, ops, sizeof(struct octeon_droq_ops)); 933f21fb3edSRaghu Vatsavayi 934f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 935f21fb3edSRaghu Vatsavayi 936f21fb3edSRaghu Vatsavayi return 0; 937f21fb3edSRaghu Vatsavayi } 938f21fb3edSRaghu Vatsavayi 939f21fb3edSRaghu Vatsavayi int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no) 940f21fb3edSRaghu Vatsavayi { 941f21fb3edSRaghu Vatsavayi unsigned long flags; 942f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 943f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 944f21fb3edSRaghu Vatsavayi 945f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 946f21fb3edSRaghu Vatsavayi 947f21fb3edSRaghu Vatsavayi if (!oct_cfg) 948f21fb3edSRaghu Vatsavayi return -EINVAL; 949f21fb3edSRaghu Vatsavayi 950f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 951f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 952f21fb3edSRaghu Vatsavayi __func__, q_no, oct->num_oqs - 1); 953f21fb3edSRaghu Vatsavayi return -EINVAL; 954f21fb3edSRaghu Vatsavayi } 955f21fb3edSRaghu Vatsavayi 956f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 957f21fb3edSRaghu Vatsavayi 958f21fb3edSRaghu Vatsavayi if (!droq) { 959f21fb3edSRaghu Vatsavayi dev_info(&oct->pci_dev->dev, 960f21fb3edSRaghu Vatsavayi "Droq id (%d) not available.\n", q_no); 961f21fb3edSRaghu Vatsavayi return 0; 962f21fb3edSRaghu Vatsavayi } 963f21fb3edSRaghu Vatsavayi 964f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 965f21fb3edSRaghu Vatsavayi 966f21fb3edSRaghu Vatsavayi droq->ops.fptr = NULL; 9670cece6c5SRaghu Vatsavayi droq->ops.farg = NULL; 968f21fb3edSRaghu Vatsavayi droq->ops.drop_on_max = 0; 969f21fb3edSRaghu Vatsavayi 970f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 971f21fb3edSRaghu Vatsavayi 972f21fb3edSRaghu Vatsavayi return 0; 973f21fb3edSRaghu Vatsavayi } 974f21fb3edSRaghu Vatsavayi 975f21fb3edSRaghu Vatsavayi int octeon_create_droq(struct octeon_device *oct, 976f21fb3edSRaghu Vatsavayi u32 q_no, u32 num_descs, 977f21fb3edSRaghu Vatsavayi u32 desc_size, void *app_ctx) 978f21fb3edSRaghu Vatsavayi { 979f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 980b3ca9af0SVSR Burru int numa_node = dev_to_node(&oct->pci_dev->dev); 981f21fb3edSRaghu Vatsavayi 982f21fb3edSRaghu Vatsavayi if (oct->droq[q_no]) { 983f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "Droq already in use. Cannot create droq %d again\n", 984f21fb3edSRaghu Vatsavayi q_no); 985f21fb3edSRaghu Vatsavayi return 1; 986f21fb3edSRaghu Vatsavayi } 987f21fb3edSRaghu Vatsavayi 988f21fb3edSRaghu Vatsavayi /* Allocate the DS for the new droq. */ 98996ae48b7SRaghu Vatsavayi droq = vmalloc_node(sizeof(*droq), numa_node); 99096ae48b7SRaghu Vatsavayi if (!droq) 991f21fb3edSRaghu Vatsavayi droq = vmalloc(sizeof(*droq)); 992f21fb3edSRaghu Vatsavayi if (!droq) 993515e752dSRaghu Vatsavayi return -1; 994515e752dSRaghu Vatsavayi 995f21fb3edSRaghu Vatsavayi memset(droq, 0, sizeof(struct octeon_droq)); 996f21fb3edSRaghu Vatsavayi 997f21fb3edSRaghu Vatsavayi /*Disable the pkt o/p for this Q */ 998f21fb3edSRaghu Vatsavayi octeon_set_droq_pkt_op(oct, q_no, 0); 999f21fb3edSRaghu Vatsavayi oct->droq[q_no] = droq; 1000f21fb3edSRaghu Vatsavayi 1001f21fb3edSRaghu Vatsavayi /* Initialize the Droq */ 1002515e752dSRaghu Vatsavayi if (octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx)) { 1003515e752dSRaghu Vatsavayi vfree(oct->droq[q_no]); 1004515e752dSRaghu Vatsavayi oct->droq[q_no] = NULL; 1005515e752dSRaghu Vatsavayi return -1; 1006515e752dSRaghu Vatsavayi } 1007f21fb3edSRaghu Vatsavayi 1008f21fb3edSRaghu Vatsavayi oct->num_oqs++; 1009f21fb3edSRaghu Vatsavayi 1010f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s: Total number of OQ: %d\n", __func__, 1011f21fb3edSRaghu Vatsavayi oct->num_oqs); 1012f21fb3edSRaghu Vatsavayi 1013f21fb3edSRaghu Vatsavayi /* Global Droq register settings */ 1014f21fb3edSRaghu Vatsavayi 1015f21fb3edSRaghu Vatsavayi /* As of now not required, as setting are done for all 32 Droqs at 1016f21fb3edSRaghu Vatsavayi * the same time. 1017f21fb3edSRaghu Vatsavayi */ 1018f21fb3edSRaghu Vatsavayi return 0; 1019f21fb3edSRaghu Vatsavayi } 1020