1f21fb3edSRaghu Vatsavayi /********************************************************************** 2f21fb3edSRaghu Vatsavayi * Author: Cavium, Inc. 3f21fb3edSRaghu Vatsavayi * 4f21fb3edSRaghu Vatsavayi * Contact: support@cavium.com 5f21fb3edSRaghu Vatsavayi * Please include "LiquidIO" in the subject. 6f21fb3edSRaghu Vatsavayi * 7f21fb3edSRaghu Vatsavayi * Copyright (c) 2003-2015 Cavium, Inc. 8f21fb3edSRaghu Vatsavayi * 9f21fb3edSRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify 10f21fb3edSRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as 11f21fb3edSRaghu Vatsavayi * published by the Free Software Foundation. 12f21fb3edSRaghu Vatsavayi * 13f21fb3edSRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but 14f21fb3edSRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15f21fb3edSRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16f21fb3edSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more 17f21fb3edSRaghu Vatsavayi * details. 18f21fb3edSRaghu Vatsavayi * 19f21fb3edSRaghu Vatsavayi * This file may also be available under a different license from Cavium. 20f21fb3edSRaghu Vatsavayi * Contact Cavium, Inc. for more information 21f21fb3edSRaghu Vatsavayi **********************************************************************/ 22f21fb3edSRaghu Vatsavayi #include <linux/pci.h> 23f21fb3edSRaghu Vatsavayi #include <linux/netdevice.h> 245b173cf9SRaghu Vatsavayi #include <linux/vmalloc.h> 25f21fb3edSRaghu Vatsavayi #include "liquidio_common.h" 26f21fb3edSRaghu Vatsavayi #include "octeon_droq.h" 27f21fb3edSRaghu Vatsavayi #include "octeon_iq.h" 28f21fb3edSRaghu Vatsavayi #include "response_manager.h" 29f21fb3edSRaghu Vatsavayi #include "octeon_device.h" 30f21fb3edSRaghu Vatsavayi #include "octeon_main.h" 31f21fb3edSRaghu Vatsavayi #include "octeon_network.h" 32f21fb3edSRaghu Vatsavayi #include "cn66xx_regs.h" 33f21fb3edSRaghu Vatsavayi #include "cn66xx_device.h" 34f21fb3edSRaghu Vatsavayi 35f21fb3edSRaghu Vatsavayi #define CVM_MIN(d1, d2) (((d1) < (d2)) ? (d1) : (d2)) 36f21fb3edSRaghu Vatsavayi #define CVM_MAX(d1, d2) (((d1) > (d2)) ? (d1) : (d2)) 37f21fb3edSRaghu Vatsavayi 38f21fb3edSRaghu Vatsavayi struct niclist { 39f21fb3edSRaghu Vatsavayi struct list_head list; 40f21fb3edSRaghu Vatsavayi void *ptr; 41f21fb3edSRaghu Vatsavayi }; 42f21fb3edSRaghu Vatsavayi 43f21fb3edSRaghu Vatsavayi struct __dispatch { 44f21fb3edSRaghu Vatsavayi struct list_head list; 45f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 46f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 47f21fb3edSRaghu Vatsavayi }; 48f21fb3edSRaghu Vatsavayi 49f21fb3edSRaghu Vatsavayi /** Get the argument that the user set when registering dispatch 50f21fb3edSRaghu Vatsavayi * function for a given opcode/subcode. 51f21fb3edSRaghu Vatsavayi * @param octeon_dev - the octeon device pointer. 52f21fb3edSRaghu Vatsavayi * @param opcode - the opcode for which the dispatch argument 53f21fb3edSRaghu Vatsavayi * is to be checked. 54f21fb3edSRaghu Vatsavayi * @param subcode - the subcode for which the dispatch argument 55f21fb3edSRaghu Vatsavayi * is to be checked. 56f21fb3edSRaghu Vatsavayi * @return Success: void * (argument to the dispatch function) 57f21fb3edSRaghu Vatsavayi * @return Failure: NULL 58f21fb3edSRaghu Vatsavayi * 59f21fb3edSRaghu Vatsavayi */ 60f21fb3edSRaghu Vatsavayi static inline void *octeon_get_dispatch_arg(struct octeon_device *octeon_dev, 61f21fb3edSRaghu Vatsavayi u16 opcode, u16 subcode) 62f21fb3edSRaghu Vatsavayi { 63f21fb3edSRaghu Vatsavayi int idx; 64f21fb3edSRaghu Vatsavayi struct list_head *dispatch; 65f21fb3edSRaghu Vatsavayi void *fn_arg = NULL; 66f21fb3edSRaghu Vatsavayi u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); 67f21fb3edSRaghu Vatsavayi 68f21fb3edSRaghu Vatsavayi idx = combined_opcode & OCTEON_OPCODE_MASK; 69f21fb3edSRaghu Vatsavayi 70f21fb3edSRaghu Vatsavayi spin_lock_bh(&octeon_dev->dispatch.lock); 71f21fb3edSRaghu Vatsavayi 72f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.count == 0) { 73f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 74f21fb3edSRaghu Vatsavayi return NULL; 75f21fb3edSRaghu Vatsavayi } 76f21fb3edSRaghu Vatsavayi 77f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.dlist[idx].opcode == combined_opcode) { 78f21fb3edSRaghu Vatsavayi fn_arg = octeon_dev->dispatch.dlist[idx].arg; 79f21fb3edSRaghu Vatsavayi } else { 80f21fb3edSRaghu Vatsavayi list_for_each(dispatch, 81f21fb3edSRaghu Vatsavayi &octeon_dev->dispatch.dlist[idx].list) { 82f21fb3edSRaghu Vatsavayi if (((struct octeon_dispatch *)dispatch)->opcode == 83f21fb3edSRaghu Vatsavayi combined_opcode) { 84f21fb3edSRaghu Vatsavayi fn_arg = ((struct octeon_dispatch *) 85f21fb3edSRaghu Vatsavayi dispatch)->arg; 86f21fb3edSRaghu Vatsavayi break; 87f21fb3edSRaghu Vatsavayi } 88f21fb3edSRaghu Vatsavayi } 89f21fb3edSRaghu Vatsavayi } 90f21fb3edSRaghu Vatsavayi 91f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 92f21fb3edSRaghu Vatsavayi return fn_arg; 93f21fb3edSRaghu Vatsavayi } 94f21fb3edSRaghu Vatsavayi 95a2c64b67SRaghu Vatsavayi /** Check for packets on Droq. This function should be called with 96a2c64b67SRaghu Vatsavayi * lock held. 97a2c64b67SRaghu Vatsavayi * @param droq - Droq on which count is checked. 98a2c64b67SRaghu Vatsavayi * @return Returns packet count. 99a2c64b67SRaghu Vatsavayi */ 100a7d5a3dcSRaghu Vatsavayi u32 octeon_droq_check_hw_for_pkts(struct octeon_droq *droq) 101f21fb3edSRaghu Vatsavayi { 102f21fb3edSRaghu Vatsavayi u32 pkt_count = 0; 103f21fb3edSRaghu Vatsavayi 104f21fb3edSRaghu Vatsavayi pkt_count = readl(droq->pkts_sent_reg); 105f21fb3edSRaghu Vatsavayi if (pkt_count) { 106f21fb3edSRaghu Vatsavayi atomic_add(pkt_count, &droq->pkts_pending); 107f21fb3edSRaghu Vatsavayi writel(pkt_count, droq->pkts_sent_reg); 108f21fb3edSRaghu Vatsavayi } 109f21fb3edSRaghu Vatsavayi 110f21fb3edSRaghu Vatsavayi return pkt_count; 111f21fb3edSRaghu Vatsavayi } 112f21fb3edSRaghu Vatsavayi 113f21fb3edSRaghu Vatsavayi static void octeon_droq_compute_max_packet_bufs(struct octeon_droq *droq) 114f21fb3edSRaghu Vatsavayi { 115f21fb3edSRaghu Vatsavayi u32 count = 0; 116f21fb3edSRaghu Vatsavayi 117f21fb3edSRaghu Vatsavayi /* max_empty_descs is the max. no. of descs that can have no buffers. 118f21fb3edSRaghu Vatsavayi * If the empty desc count goes beyond this value, we cannot safely 119f21fb3edSRaghu Vatsavayi * read in a 64K packet sent by Octeon 120f21fb3edSRaghu Vatsavayi * (64K is max pkt size from Octeon) 121f21fb3edSRaghu Vatsavayi */ 122f21fb3edSRaghu Vatsavayi droq->max_empty_descs = 0; 123f21fb3edSRaghu Vatsavayi 124f21fb3edSRaghu Vatsavayi do { 125f21fb3edSRaghu Vatsavayi droq->max_empty_descs++; 126f21fb3edSRaghu Vatsavayi count += droq->buffer_size; 127f21fb3edSRaghu Vatsavayi } while (count < (64 * 1024)); 128f21fb3edSRaghu Vatsavayi 129f21fb3edSRaghu Vatsavayi droq->max_empty_descs = droq->max_count - droq->max_empty_descs; 130f21fb3edSRaghu Vatsavayi } 131f21fb3edSRaghu Vatsavayi 132f21fb3edSRaghu Vatsavayi static void octeon_droq_reset_indices(struct octeon_droq *droq) 133f21fb3edSRaghu Vatsavayi { 134f21fb3edSRaghu Vatsavayi droq->read_idx = 0; 135f21fb3edSRaghu Vatsavayi droq->write_idx = 0; 136f21fb3edSRaghu Vatsavayi droq->refill_idx = 0; 137f21fb3edSRaghu Vatsavayi droq->refill_count = 0; 138f21fb3edSRaghu Vatsavayi atomic_set(&droq->pkts_pending, 0); 139f21fb3edSRaghu Vatsavayi } 140f21fb3edSRaghu Vatsavayi 141f21fb3edSRaghu Vatsavayi static void 142f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(struct octeon_device *oct, 143f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 144f21fb3edSRaghu Vatsavayi { 145f21fb3edSRaghu Vatsavayi u32 i; 146cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 147f21fb3edSRaghu Vatsavayi 148f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 149cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[i].pg_info; 150cabeb13bSRaghu Vatsavayi 151cabeb13bSRaghu Vatsavayi if (pg_info->dma) 152cabeb13bSRaghu Vatsavayi lio_unmap_ring(oct->pci_dev, 153cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 154cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 155cabeb13bSRaghu Vatsavayi 156cabeb13bSRaghu Vatsavayi if (pg_info->page) 157cabeb13bSRaghu Vatsavayi recv_buffer_destroy(droq->recv_buf_list[i].buffer, 158cabeb13bSRaghu Vatsavayi pg_info); 159cabeb13bSRaghu Vatsavayi 160cabeb13bSRaghu Vatsavayi if (droq->desc_ring && droq->desc_ring[i].info_ptr) 161f21fb3edSRaghu Vatsavayi lio_unmap_ring_info(oct->pci_dev, 162f21fb3edSRaghu Vatsavayi (u64)droq-> 163f21fb3edSRaghu Vatsavayi desc_ring[i].info_ptr, 164f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 165f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = NULL; 166f21fb3edSRaghu Vatsavayi } 167f21fb3edSRaghu Vatsavayi 168f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 169f21fb3edSRaghu Vatsavayi } 170f21fb3edSRaghu Vatsavayi 171f21fb3edSRaghu Vatsavayi static int 172f21fb3edSRaghu Vatsavayi octeon_droq_setup_ring_buffers(struct octeon_device *oct, 173f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 174f21fb3edSRaghu Vatsavayi { 175f21fb3edSRaghu Vatsavayi u32 i; 176f21fb3edSRaghu Vatsavayi void *buf; 177f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring = droq->desc_ring; 178f21fb3edSRaghu Vatsavayi 179f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 180cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(oct, &droq->recv_buf_list[i].pg_info); 181f21fb3edSRaghu Vatsavayi 182f21fb3edSRaghu Vatsavayi if (!buf) { 183f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s buffer alloc failed\n", 184f21fb3edSRaghu Vatsavayi __func__); 185cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 186f21fb3edSRaghu Vatsavayi return -ENOMEM; 187f21fb3edSRaghu Vatsavayi } 188f21fb3edSRaghu Vatsavayi 189f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = buf; 190f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].data = get_rbd(buf); 191f21fb3edSRaghu Vatsavayi droq->info_list[i].length = 0; 192f21fb3edSRaghu Vatsavayi 193f21fb3edSRaghu Vatsavayi /* map ring buffers into memory */ 194f21fb3edSRaghu Vatsavayi desc_ring[i].info_ptr = lio_map_ring_info(droq, i); 195f21fb3edSRaghu Vatsavayi desc_ring[i].buffer_ptr = 196cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[i].buffer); 197f21fb3edSRaghu Vatsavayi } 198f21fb3edSRaghu Vatsavayi 199f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 200f21fb3edSRaghu Vatsavayi 201f21fb3edSRaghu Vatsavayi octeon_droq_compute_max_packet_bufs(droq); 202f21fb3edSRaghu Vatsavayi 203f21fb3edSRaghu Vatsavayi return 0; 204f21fb3edSRaghu Vatsavayi } 205f21fb3edSRaghu Vatsavayi 206f21fb3edSRaghu Vatsavayi int octeon_delete_droq(struct octeon_device *oct, u32 q_no) 207f21fb3edSRaghu Vatsavayi { 208f21fb3edSRaghu Vatsavayi struct octeon_droq *droq = oct->droq[q_no]; 209f21fb3edSRaghu Vatsavayi 210f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 211f21fb3edSRaghu Vatsavayi 212f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(oct, droq); 213f21fb3edSRaghu Vatsavayi vfree(droq->recv_buf_list); 214f21fb3edSRaghu Vatsavayi 215f21fb3edSRaghu Vatsavayi if (droq->info_base_addr) 216f21fb3edSRaghu Vatsavayi cnnic_free_aligned_dma(oct->pci_dev, droq->info_list, 217f21fb3edSRaghu Vatsavayi droq->info_alloc_size, 218f21fb3edSRaghu Vatsavayi droq->info_base_addr, 219f21fb3edSRaghu Vatsavayi droq->info_list_dma); 220f21fb3edSRaghu Vatsavayi 221f21fb3edSRaghu Vatsavayi if (droq->desc_ring) 222f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 223f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 224f21fb3edSRaghu Vatsavayi 225f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 226f21fb3edSRaghu Vatsavayi 227f21fb3edSRaghu Vatsavayi return 0; 228f21fb3edSRaghu Vatsavayi } 229f21fb3edSRaghu Vatsavayi 230f21fb3edSRaghu Vatsavayi int octeon_init_droq(struct octeon_device *oct, 231f21fb3edSRaghu Vatsavayi u32 q_no, 232f21fb3edSRaghu Vatsavayi u32 num_descs, 233f21fb3edSRaghu Vatsavayi u32 desc_size, 234f21fb3edSRaghu Vatsavayi void *app_ctx) 235f21fb3edSRaghu Vatsavayi { 236f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 237f21fb3edSRaghu Vatsavayi u32 desc_ring_size = 0, c_num_descs = 0, c_buf_size = 0; 238f21fb3edSRaghu Vatsavayi u32 c_pkts_per_intr = 0, c_refill_threshold = 0; 23996ae48b7SRaghu Vatsavayi int orig_node = dev_to_node(&oct->pci_dev->dev); 24096ae48b7SRaghu Vatsavayi int numa_node = cpu_to_node(q_no % num_online_cpus()); 241f21fb3edSRaghu Vatsavayi 242f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 243f21fb3edSRaghu Vatsavayi 244f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 245f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 246f21fb3edSRaghu Vatsavayi 247f21fb3edSRaghu Vatsavayi droq->oct_dev = oct; 248f21fb3edSRaghu Vatsavayi droq->q_no = q_no; 249f21fb3edSRaghu Vatsavayi if (app_ctx) 250f21fb3edSRaghu Vatsavayi droq->app_ctx = app_ctx; 251f21fb3edSRaghu Vatsavayi else 252f21fb3edSRaghu Vatsavayi droq->app_ctx = (void *)(size_t)q_no; 253f21fb3edSRaghu Vatsavayi 254f21fb3edSRaghu Vatsavayi c_num_descs = num_descs; 255f21fb3edSRaghu Vatsavayi c_buf_size = desc_size; 256f21fb3edSRaghu Vatsavayi if (OCTEON_CN6XXX(oct)) { 257f21fb3edSRaghu Vatsavayi struct octeon_config *conf6x = CHIP_FIELD(oct, cn6xxx, conf); 258f21fb3edSRaghu Vatsavayi 259f21fb3edSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf6x); 26096ae48b7SRaghu Vatsavayi c_refill_threshold = 26196ae48b7SRaghu Vatsavayi (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf6x); 26296ae48b7SRaghu Vatsavayi } else { 26396ae48b7SRaghu Vatsavayi return 1; 264f21fb3edSRaghu Vatsavayi } 265f21fb3edSRaghu Vatsavayi 266f21fb3edSRaghu Vatsavayi droq->max_count = c_num_descs; 267f21fb3edSRaghu Vatsavayi droq->buffer_size = c_buf_size; 268f21fb3edSRaghu Vatsavayi 269f21fb3edSRaghu Vatsavayi desc_ring_size = droq->max_count * OCT_DROQ_DESC_SIZE; 27096ae48b7SRaghu Vatsavayi set_dev_node(&oct->pci_dev->dev, numa_node); 27196ae48b7SRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size, 27296ae48b7SRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma); 27396ae48b7SRaghu Vatsavayi set_dev_node(&oct->pci_dev->dev, orig_node); 27496ae48b7SRaghu Vatsavayi if (!droq->desc_ring) 275f21fb3edSRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size, 276f21fb3edSRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma); 277f21fb3edSRaghu Vatsavayi 278f21fb3edSRaghu Vatsavayi if (!droq->desc_ring) { 279f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 280f21fb3edSRaghu Vatsavayi "Output queue %d ring alloc failed\n", q_no); 281f21fb3edSRaghu Vatsavayi return 1; 282f21fb3edSRaghu Vatsavayi } 283f21fb3edSRaghu Vatsavayi 284f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n", 285f21fb3edSRaghu Vatsavayi q_no, droq->desc_ring, droq->desc_ring_dma); 286f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: num_desc: %d\n", q_no, 287f21fb3edSRaghu Vatsavayi droq->max_count); 288f21fb3edSRaghu Vatsavayi 289f21fb3edSRaghu Vatsavayi droq->info_list = 29096ae48b7SRaghu Vatsavayi cnnic_numa_alloc_aligned_dma((droq->max_count * 29196ae48b7SRaghu Vatsavayi OCT_DROQ_INFO_SIZE), 292f21fb3edSRaghu Vatsavayi &droq->info_alloc_size, 293f21fb3edSRaghu Vatsavayi &droq->info_base_addr, 29496ae48b7SRaghu Vatsavayi numa_node); 295f21fb3edSRaghu Vatsavayi if (!droq->info_list) { 296f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Cannot allocate memory for info list.\n"); 297f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 298f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 299f21fb3edSRaghu Vatsavayi return 1; 300f21fb3edSRaghu Vatsavayi } 301f21fb3edSRaghu Vatsavayi 302f21fb3edSRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 30396ae48b7SRaghu Vatsavayi vmalloc_node(droq->max_count * 30496ae48b7SRaghu Vatsavayi OCT_DROQ_RECVBUF_SIZE, 30596ae48b7SRaghu Vatsavayi numa_node); 30696ae48b7SRaghu Vatsavayi if (!droq->recv_buf_list) 30796ae48b7SRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 308f21fb3edSRaghu Vatsavayi vmalloc(droq->max_count * 309f21fb3edSRaghu Vatsavayi OCT_DROQ_RECVBUF_SIZE); 310f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list) { 311f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Output queue recv buf list alloc failed\n"); 312f21fb3edSRaghu Vatsavayi goto init_droq_fail; 313f21fb3edSRaghu Vatsavayi } 314f21fb3edSRaghu Vatsavayi 315f21fb3edSRaghu Vatsavayi if (octeon_droq_setup_ring_buffers(oct, droq)) 316f21fb3edSRaghu Vatsavayi goto init_droq_fail; 317f21fb3edSRaghu Vatsavayi 318f21fb3edSRaghu Vatsavayi droq->pkts_per_intr = c_pkts_per_intr; 319f21fb3edSRaghu Vatsavayi droq->refill_threshold = c_refill_threshold; 320f21fb3edSRaghu Vatsavayi 321f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "DROQ INIT: max_empty_descs: %d\n", 322f21fb3edSRaghu Vatsavayi droq->max_empty_descs); 323f21fb3edSRaghu Vatsavayi 324f21fb3edSRaghu Vatsavayi spin_lock_init(&droq->lock); 325f21fb3edSRaghu Vatsavayi 326f21fb3edSRaghu Vatsavayi INIT_LIST_HEAD(&droq->dispatch_list); 327f21fb3edSRaghu Vatsavayi 328f21fb3edSRaghu Vatsavayi /* For 56xx Pass1, this function won't be called, so no checks. */ 329f21fb3edSRaghu Vatsavayi oct->fn_list.setup_oq_regs(oct, q_no); 330f21fb3edSRaghu Vatsavayi 33163da8404SRaghu Vatsavayi oct->io_qmask.oq |= (1ULL << q_no); 332f21fb3edSRaghu Vatsavayi 333f21fb3edSRaghu Vatsavayi return 0; 334f21fb3edSRaghu Vatsavayi 335f21fb3edSRaghu Vatsavayi init_droq_fail: 336f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no); 337f21fb3edSRaghu Vatsavayi return 1; 338f21fb3edSRaghu Vatsavayi } 339f21fb3edSRaghu Vatsavayi 340f21fb3edSRaghu Vatsavayi /* octeon_create_recv_info 341f21fb3edSRaghu Vatsavayi * Parameters: 342f21fb3edSRaghu Vatsavayi * octeon_dev - pointer to the octeon device structure 343f21fb3edSRaghu Vatsavayi * droq - droq in which the packet arrived. 344f21fb3edSRaghu Vatsavayi * buf_cnt - no. of buffers used by the packet. 345f21fb3edSRaghu Vatsavayi * idx - index in the descriptor for the first buffer in the packet. 346f21fb3edSRaghu Vatsavayi * Description: 347f21fb3edSRaghu Vatsavayi * Allocates a recv_info_t and copies the buffer addresses for packet data 348f21fb3edSRaghu Vatsavayi * into the recv_pkt space which starts at an 8B offset from recv_info_t. 349f21fb3edSRaghu Vatsavayi * Flags the descriptors for refill later. If available descriptors go 350f21fb3edSRaghu Vatsavayi * below the threshold to receive a 64K pkt, new buffers are first allocated 351f21fb3edSRaghu Vatsavayi * before the recv_pkt_t is created. 352f21fb3edSRaghu Vatsavayi * This routine will be called in interrupt context. 353f21fb3edSRaghu Vatsavayi * Returns: 354f21fb3edSRaghu Vatsavayi * Success: Pointer to recv_info_t 355f21fb3edSRaghu Vatsavayi * Failure: NULL. 356f21fb3edSRaghu Vatsavayi * Locks: 357f21fb3edSRaghu Vatsavayi * The droq->lock is held when this routine is called. 358f21fb3edSRaghu Vatsavayi */ 359f21fb3edSRaghu Vatsavayi static inline struct octeon_recv_info *octeon_create_recv_info( 360f21fb3edSRaghu Vatsavayi struct octeon_device *octeon_dev, 361f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 362f21fb3edSRaghu Vatsavayi u32 buf_cnt, 363f21fb3edSRaghu Vatsavayi u32 idx) 364f21fb3edSRaghu Vatsavayi { 365f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 366f21fb3edSRaghu Vatsavayi struct octeon_recv_pkt *recv_pkt; 367f21fb3edSRaghu Vatsavayi struct octeon_recv_info *recv_info; 368f21fb3edSRaghu Vatsavayi u32 i, bytes_left; 369cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 370f21fb3edSRaghu Vatsavayi 371f21fb3edSRaghu Vatsavayi info = &droq->info_list[idx]; 372f21fb3edSRaghu Vatsavayi 373f21fb3edSRaghu Vatsavayi recv_info = octeon_alloc_recv_info(sizeof(struct __dispatch)); 374f21fb3edSRaghu Vatsavayi if (!recv_info) 375f21fb3edSRaghu Vatsavayi return NULL; 376f21fb3edSRaghu Vatsavayi 377f21fb3edSRaghu Vatsavayi recv_pkt = recv_info->recv_pkt; 378f21fb3edSRaghu Vatsavayi recv_pkt->rh = info->rh; 379f21fb3edSRaghu Vatsavayi recv_pkt->length = (u32)info->length; 380f21fb3edSRaghu Vatsavayi recv_pkt->buffer_count = (u16)buf_cnt; 381f21fb3edSRaghu Vatsavayi recv_pkt->octeon_id = (u16)octeon_dev->octeon_id; 382f21fb3edSRaghu Vatsavayi 383f21fb3edSRaghu Vatsavayi i = 0; 384f21fb3edSRaghu Vatsavayi bytes_left = (u32)info->length; 385f21fb3edSRaghu Vatsavayi 386f21fb3edSRaghu Vatsavayi while (buf_cnt) { 387cabeb13bSRaghu Vatsavayi { 388cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[idx].pg_info; 389cabeb13bSRaghu Vatsavayi 390f21fb3edSRaghu Vatsavayi lio_unmap_ring(octeon_dev->pci_dev, 391cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 392cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 393cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 394cabeb13bSRaghu Vatsavayi } 395f21fb3edSRaghu Vatsavayi 396f21fb3edSRaghu Vatsavayi recv_pkt->buffer_size[i] = 397f21fb3edSRaghu Vatsavayi (bytes_left >= 398f21fb3edSRaghu Vatsavayi droq->buffer_size) ? droq->buffer_size : bytes_left; 399f21fb3edSRaghu Vatsavayi 400f21fb3edSRaghu Vatsavayi recv_pkt->buffer_ptr[i] = droq->recv_buf_list[idx].buffer; 401f21fb3edSRaghu Vatsavayi droq->recv_buf_list[idx].buffer = NULL; 402f21fb3edSRaghu Vatsavayi 403f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(idx, droq->max_count); 404f21fb3edSRaghu Vatsavayi bytes_left -= droq->buffer_size; 405f21fb3edSRaghu Vatsavayi i++; 406f21fb3edSRaghu Vatsavayi buf_cnt--; 407f21fb3edSRaghu Vatsavayi } 408f21fb3edSRaghu Vatsavayi 409f21fb3edSRaghu Vatsavayi return recv_info; 410f21fb3edSRaghu Vatsavayi } 411f21fb3edSRaghu Vatsavayi 412f21fb3edSRaghu Vatsavayi /* If we were not able to refill all buffers, try to move around 413f21fb3edSRaghu Vatsavayi * the buffers that were not dispatched. 414f21fb3edSRaghu Vatsavayi */ 415f21fb3edSRaghu Vatsavayi static inline u32 416f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(struct octeon_droq *droq, 417f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring) 418f21fb3edSRaghu Vatsavayi { 419f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 420f21fb3edSRaghu Vatsavayi 421f21fb3edSRaghu Vatsavayi u32 refill_index = droq->refill_idx; 422f21fb3edSRaghu Vatsavayi 423f21fb3edSRaghu Vatsavayi while (refill_index != droq->read_idx) { 424f21fb3edSRaghu Vatsavayi if (droq->recv_buf_list[refill_index].buffer) { 425f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 426f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer; 427f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = 428f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].data; 429f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 430f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr; 431f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer = NULL; 432f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr = 0; 433f21fb3edSRaghu Vatsavayi do { 434f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->refill_idx, 435f21fb3edSRaghu Vatsavayi droq->max_count); 436f21fb3edSRaghu Vatsavayi desc_refilled++; 437f21fb3edSRaghu Vatsavayi droq->refill_count--; 438f21fb3edSRaghu Vatsavayi } while (droq->recv_buf_list[droq->refill_idx]. 439f21fb3edSRaghu Vatsavayi buffer); 440f21fb3edSRaghu Vatsavayi } 441f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(refill_index, droq->max_count); 442f21fb3edSRaghu Vatsavayi } /* while */ 443f21fb3edSRaghu Vatsavayi return desc_refilled; 444f21fb3edSRaghu Vatsavayi } 445f21fb3edSRaghu Vatsavayi 446f21fb3edSRaghu Vatsavayi /* octeon_droq_refill 447f21fb3edSRaghu Vatsavayi * Parameters: 448f21fb3edSRaghu Vatsavayi * droq - droq in which descriptors require new buffers. 449f21fb3edSRaghu Vatsavayi * Description: 450f21fb3edSRaghu Vatsavayi * Called during normal DROQ processing in interrupt mode or by the poll 451f21fb3edSRaghu Vatsavayi * thread to refill the descriptors from which buffers were dispatched 452f21fb3edSRaghu Vatsavayi * to upper layers. Attempts to allocate new buffers. If that fails, moves 453f21fb3edSRaghu Vatsavayi * up buffers (that were not dispatched) to form a contiguous ring. 454f21fb3edSRaghu Vatsavayi * Returns: 455f21fb3edSRaghu Vatsavayi * No of descriptors refilled. 456f21fb3edSRaghu Vatsavayi * Locks: 457f21fb3edSRaghu Vatsavayi * This routine is called with droq->lock held. 458f21fb3edSRaghu Vatsavayi */ 459f21fb3edSRaghu Vatsavayi static u32 460f21fb3edSRaghu Vatsavayi octeon_droq_refill(struct octeon_device *octeon_dev, struct octeon_droq *droq) 461f21fb3edSRaghu Vatsavayi { 462f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring; 463f21fb3edSRaghu Vatsavayi void *buf = NULL; 464f21fb3edSRaghu Vatsavayi u8 *data; 465f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 466cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 467f21fb3edSRaghu Vatsavayi 468f21fb3edSRaghu Vatsavayi desc_ring = droq->desc_ring; 469f21fb3edSRaghu Vatsavayi 470f21fb3edSRaghu Vatsavayi while (droq->refill_count && (desc_refilled < droq->max_count)) { 471f21fb3edSRaghu Vatsavayi /* If a valid buffer exists (happens if there is no dispatch), 472f21fb3edSRaghu Vatsavayi * reuse 473f21fb3edSRaghu Vatsavayi * the buffer, else allocate. 474f21fb3edSRaghu Vatsavayi */ 475f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list[droq->refill_idx].buffer) { 476cabeb13bSRaghu Vatsavayi pg_info = 477cabeb13bSRaghu Vatsavayi &droq->recv_buf_list[droq->refill_idx].pg_info; 478cabeb13bSRaghu Vatsavayi /* Either recycle the existing pages or go for 479cabeb13bSRaghu Vatsavayi * new page alloc 480cabeb13bSRaghu Vatsavayi */ 481cabeb13bSRaghu Vatsavayi if (pg_info->page) 482cabeb13bSRaghu Vatsavayi buf = recv_buffer_reuse(octeon_dev, pg_info); 483cabeb13bSRaghu Vatsavayi else 484cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(octeon_dev, pg_info); 485f21fb3edSRaghu Vatsavayi /* If a buffer could not be allocated, no point in 486f21fb3edSRaghu Vatsavayi * continuing 487f21fb3edSRaghu Vatsavayi */ 488cabeb13bSRaghu Vatsavayi if (!buf) { 489cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 490f21fb3edSRaghu Vatsavayi break; 491cabeb13bSRaghu Vatsavayi } 492f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 493f21fb3edSRaghu Vatsavayi buf; 494f21fb3edSRaghu Vatsavayi data = get_rbd(buf); 495f21fb3edSRaghu Vatsavayi } else { 496f21fb3edSRaghu Vatsavayi data = get_rbd(droq->recv_buf_list 497f21fb3edSRaghu Vatsavayi [droq->refill_idx].buffer); 498f21fb3edSRaghu Vatsavayi } 499f21fb3edSRaghu Vatsavayi 500f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = data; 501f21fb3edSRaghu Vatsavayi 502f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 503cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[droq-> 504cabeb13bSRaghu Vatsavayi refill_idx].buffer); 505f21fb3edSRaghu Vatsavayi /* Reset any previous values in the length field. */ 506f21fb3edSRaghu Vatsavayi droq->info_list[droq->refill_idx].length = 0; 507f21fb3edSRaghu Vatsavayi 508f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->refill_idx, droq->max_count); 509f21fb3edSRaghu Vatsavayi desc_refilled++; 510f21fb3edSRaghu Vatsavayi droq->refill_count--; 511f21fb3edSRaghu Vatsavayi } 512f21fb3edSRaghu Vatsavayi 513f21fb3edSRaghu Vatsavayi if (droq->refill_count) 514f21fb3edSRaghu Vatsavayi desc_refilled += 515f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(droq, desc_ring); 516f21fb3edSRaghu Vatsavayi 517f21fb3edSRaghu Vatsavayi /* if droq->refill_count 518f21fb3edSRaghu Vatsavayi * The refill count would not change in pass two. We only moved buffers 519f21fb3edSRaghu Vatsavayi * to close the gap in the ring, but we would still have the same no. of 520f21fb3edSRaghu Vatsavayi * buffers to refill. 521f21fb3edSRaghu Vatsavayi */ 522f21fb3edSRaghu Vatsavayi return desc_refilled; 523f21fb3edSRaghu Vatsavayi } 524f21fb3edSRaghu Vatsavayi 525f21fb3edSRaghu Vatsavayi static inline u32 526f21fb3edSRaghu Vatsavayi octeon_droq_get_bufcount(u32 buf_size, u32 total_len) 527f21fb3edSRaghu Vatsavayi { 528f21fb3edSRaghu Vatsavayi u32 buf_cnt = 0; 529f21fb3edSRaghu Vatsavayi 530f21fb3edSRaghu Vatsavayi while (total_len > (buf_size * buf_cnt)) 531f21fb3edSRaghu Vatsavayi buf_cnt++; 532f21fb3edSRaghu Vatsavayi return buf_cnt; 533f21fb3edSRaghu Vatsavayi } 534f21fb3edSRaghu Vatsavayi 535f21fb3edSRaghu Vatsavayi static int 536f21fb3edSRaghu Vatsavayi octeon_droq_dispatch_pkt(struct octeon_device *oct, 537f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 538f21fb3edSRaghu Vatsavayi union octeon_rh *rh, 539f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info) 540f21fb3edSRaghu Vatsavayi { 541f21fb3edSRaghu Vatsavayi u32 cnt; 542f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 543f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 544f21fb3edSRaghu Vatsavayi 545f21fb3edSRaghu Vatsavayi cnt = octeon_droq_get_bufcount(droq->buffer_size, (u32)info->length); 546f21fb3edSRaghu Vatsavayi 547f21fb3edSRaghu Vatsavayi disp_fn = octeon_get_dispatch(oct, (u16)rh->r.opcode, 548f21fb3edSRaghu Vatsavayi (u16)rh->r.subcode); 549f21fb3edSRaghu Vatsavayi if (disp_fn) { 550f21fb3edSRaghu Vatsavayi rinfo = octeon_create_recv_info(oct, droq, cnt, droq->read_idx); 551f21fb3edSRaghu Vatsavayi if (rinfo) { 552f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = rinfo->rsvd; 553f21fb3edSRaghu Vatsavayi 554f21fb3edSRaghu Vatsavayi rdisp->rinfo = rinfo; 555f21fb3edSRaghu Vatsavayi rdisp->disp_fn = disp_fn; 556f21fb3edSRaghu Vatsavayi rinfo->recv_pkt->rh = *rh; 557f21fb3edSRaghu Vatsavayi list_add_tail(&rdisp->list, 558f21fb3edSRaghu Vatsavayi &droq->dispatch_list); 559f21fb3edSRaghu Vatsavayi } else { 560f21fb3edSRaghu Vatsavayi droq->stats.dropped_nomem++; 561f21fb3edSRaghu Vatsavayi } 562f21fb3edSRaghu Vatsavayi } else { 563a2c64b67SRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function (opcode %u/%u)\n", 564a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.opcode, 565a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.subcode); 566f21fb3edSRaghu Vatsavayi droq->stats.dropped_nodispatch++; 567f21fb3edSRaghu Vatsavayi } /* else (dispatch_fn ... */ 568f21fb3edSRaghu Vatsavayi 569f21fb3edSRaghu Vatsavayi return cnt; 570f21fb3edSRaghu Vatsavayi } 571f21fb3edSRaghu Vatsavayi 572f21fb3edSRaghu Vatsavayi static inline void octeon_droq_drop_packets(struct octeon_device *oct, 573f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 574f21fb3edSRaghu Vatsavayi u32 cnt) 575f21fb3edSRaghu Vatsavayi { 576f21fb3edSRaghu Vatsavayi u32 i = 0, buf_cnt; 577f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 578f21fb3edSRaghu Vatsavayi 579f21fb3edSRaghu Vatsavayi for (i = 0; i < cnt; i++) { 580f21fb3edSRaghu Vatsavayi info = &droq->info_list[droq->read_idx]; 581f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 582f21fb3edSRaghu Vatsavayi 583f21fb3edSRaghu Vatsavayi if (info->length) { 584f21fb3edSRaghu Vatsavayi info->length -= OCT_RH_SIZE; 585f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += info->length; 586f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_get_bufcount(droq->buffer_size, 587f21fb3edSRaghu Vatsavayi (u32)info->length); 588f21fb3edSRaghu Vatsavayi } else { 589f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: In drop: pkt with len 0\n"); 590f21fb3edSRaghu Vatsavayi buf_cnt = 1; 591f21fb3edSRaghu Vatsavayi } 592f21fb3edSRaghu Vatsavayi 593f21fb3edSRaghu Vatsavayi INCR_INDEX(droq->read_idx, buf_cnt, droq->max_count); 594f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 595f21fb3edSRaghu Vatsavayi } 596f21fb3edSRaghu Vatsavayi } 597f21fb3edSRaghu Vatsavayi 598f21fb3edSRaghu Vatsavayi static u32 599f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(struct octeon_device *oct, 600f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 601f21fb3edSRaghu Vatsavayi u32 pkts_to_process) 602f21fb3edSRaghu Vatsavayi { 603f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 604f21fb3edSRaghu Vatsavayi union octeon_rh *rh; 605f21fb3edSRaghu Vatsavayi u32 pkt, total_len = 0, pkt_count; 606f21fb3edSRaghu Vatsavayi 607f21fb3edSRaghu Vatsavayi pkt_count = pkts_to_process; 608f21fb3edSRaghu Vatsavayi 609f21fb3edSRaghu Vatsavayi for (pkt = 0; pkt < pkt_count; pkt++) { 610f21fb3edSRaghu Vatsavayi u32 pkt_len = 0; 611f21fb3edSRaghu Vatsavayi struct sk_buff *nicbuf = NULL; 612cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 613cabeb13bSRaghu Vatsavayi void *buf; 614f21fb3edSRaghu Vatsavayi 615f21fb3edSRaghu Vatsavayi info = &droq->info_list[droq->read_idx]; 616f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 617f21fb3edSRaghu Vatsavayi 618f21fb3edSRaghu Vatsavayi if (!info->length) { 619f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 620f21fb3edSRaghu Vatsavayi "DROQ[%d] idx: %d len:0, pkt_cnt: %d\n", 621f21fb3edSRaghu Vatsavayi droq->q_no, droq->read_idx, pkt_count); 622f21fb3edSRaghu Vatsavayi print_hex_dump_bytes("", DUMP_PREFIX_ADDRESS, 623f21fb3edSRaghu Vatsavayi (u8 *)info, 624f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 625f21fb3edSRaghu Vatsavayi break; 626f21fb3edSRaghu Vatsavayi } 627f21fb3edSRaghu Vatsavayi 628f21fb3edSRaghu Vatsavayi /* Len of resp hdr in included in the received data len. */ 629f21fb3edSRaghu Vatsavayi info->length -= OCT_RH_SIZE; 630f21fb3edSRaghu Vatsavayi rh = &info->rh; 631f21fb3edSRaghu Vatsavayi 632f21fb3edSRaghu Vatsavayi total_len += (u32)info->length; 633f21fb3edSRaghu Vatsavayi if (OPCODE_SLOW_PATH(rh)) { 634f21fb3edSRaghu Vatsavayi u32 buf_cnt; 635f21fb3edSRaghu Vatsavayi 636f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_dispatch_pkt(oct, droq, rh, info); 637f21fb3edSRaghu Vatsavayi INCR_INDEX(droq->read_idx, buf_cnt, droq->max_count); 638f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 639f21fb3edSRaghu Vatsavayi } else { 640f21fb3edSRaghu Vatsavayi if (info->length <= droq->buffer_size) { 641f21fb3edSRaghu Vatsavayi pkt_len = (u32)info->length; 642f21fb3edSRaghu Vatsavayi nicbuf = droq->recv_buf_list[ 643f21fb3edSRaghu Vatsavayi droq->read_idx].buffer; 644cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[ 645cabeb13bSRaghu Vatsavayi droq->read_idx].pg_info; 646cabeb13bSRaghu Vatsavayi if (recv_buffer_recycle(oct, pg_info)) 647cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 648f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->read_idx].buffer = 649f21fb3edSRaghu Vatsavayi NULL; 650a2c64b67SRaghu Vatsavayi 651f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->read_idx, droq->max_count); 652f21fb3edSRaghu Vatsavayi droq->refill_count++; 653f21fb3edSRaghu Vatsavayi } else { 654cabeb13bSRaghu Vatsavayi nicbuf = octeon_fast_packet_alloc((u32) 655f21fb3edSRaghu Vatsavayi info->length); 656f21fb3edSRaghu Vatsavayi pkt_len = 0; 657f21fb3edSRaghu Vatsavayi /* nicbuf allocation can fail. We'll handle it 658f21fb3edSRaghu Vatsavayi * inside the loop. 659f21fb3edSRaghu Vatsavayi */ 660f21fb3edSRaghu Vatsavayi while (pkt_len < info->length) { 661cabeb13bSRaghu Vatsavayi int cpy_len, idx = droq->read_idx; 662f21fb3edSRaghu Vatsavayi 663cabeb13bSRaghu Vatsavayi cpy_len = ((pkt_len + droq->buffer_size) 664cabeb13bSRaghu Vatsavayi > info->length) ? 665f21fb3edSRaghu Vatsavayi ((u32)info->length - pkt_len) : 666f21fb3edSRaghu Vatsavayi droq->buffer_size; 667f21fb3edSRaghu Vatsavayi 668f21fb3edSRaghu Vatsavayi if (nicbuf) { 669f21fb3edSRaghu Vatsavayi octeon_fast_packet_next(droq, 670f21fb3edSRaghu Vatsavayi nicbuf, 671f21fb3edSRaghu Vatsavayi cpy_len, 672cabeb13bSRaghu Vatsavayi idx); 673cabeb13bSRaghu Vatsavayi buf = droq->recv_buf_list[idx]. 674cabeb13bSRaghu Vatsavayi buffer; 675cabeb13bSRaghu Vatsavayi recv_buffer_fast_free(buf); 676cabeb13bSRaghu Vatsavayi droq->recv_buf_list[idx].buffer 677cabeb13bSRaghu Vatsavayi = NULL; 678cabeb13bSRaghu Vatsavayi } else { 679cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 680f21fb3edSRaghu Vatsavayi } 681f21fb3edSRaghu Vatsavayi 682f21fb3edSRaghu Vatsavayi pkt_len += cpy_len; 683f21fb3edSRaghu Vatsavayi INCR_INDEX_BY1(droq->read_idx, 684f21fb3edSRaghu Vatsavayi droq->max_count); 685f21fb3edSRaghu Vatsavayi droq->refill_count++; 686f21fb3edSRaghu Vatsavayi } 687f21fb3edSRaghu Vatsavayi } 688f21fb3edSRaghu Vatsavayi 689f21fb3edSRaghu Vatsavayi if (nicbuf) { 690cabeb13bSRaghu Vatsavayi if (droq->ops.fptr) { 691f21fb3edSRaghu Vatsavayi droq->ops.fptr(oct->octeon_id, 692f21fb3edSRaghu Vatsavayi nicbuf, pkt_len, 6930cece6c5SRaghu Vatsavayi rh, &droq->napi, 6940cece6c5SRaghu Vatsavayi droq->ops.farg); 695cabeb13bSRaghu Vatsavayi } else { 696f21fb3edSRaghu Vatsavayi recv_buffer_free(nicbuf); 697f21fb3edSRaghu Vatsavayi } 698f21fb3edSRaghu Vatsavayi } 699cabeb13bSRaghu Vatsavayi } 700f21fb3edSRaghu Vatsavayi 701f21fb3edSRaghu Vatsavayi if (droq->refill_count >= droq->refill_threshold) { 702f21fb3edSRaghu Vatsavayi int desc_refilled = octeon_droq_refill(oct, droq); 703f21fb3edSRaghu Vatsavayi 704f21fb3edSRaghu Vatsavayi /* Flush the droq descriptor data to memory to be sure 705f21fb3edSRaghu Vatsavayi * that when we update the credits the data in memory 706f21fb3edSRaghu Vatsavayi * is accurate. 707f21fb3edSRaghu Vatsavayi */ 708f21fb3edSRaghu Vatsavayi wmb(); 709f21fb3edSRaghu Vatsavayi writel((desc_refilled), droq->pkts_credit_reg); 710f21fb3edSRaghu Vatsavayi /* make sure mmio write completes */ 711f21fb3edSRaghu Vatsavayi mmiowb(); 712f21fb3edSRaghu Vatsavayi } 713f21fb3edSRaghu Vatsavayi 714f21fb3edSRaghu Vatsavayi } /* for (each packet)... */ 715f21fb3edSRaghu Vatsavayi 716f21fb3edSRaghu Vatsavayi /* Increment refill_count by the number of buffers processed. */ 717f21fb3edSRaghu Vatsavayi droq->stats.pkts_received += pkt; 718f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += total_len; 719f21fb3edSRaghu Vatsavayi 720f21fb3edSRaghu Vatsavayi if ((droq->ops.drop_on_max) && (pkts_to_process - pkt)) { 721f21fb3edSRaghu Vatsavayi octeon_droq_drop_packets(oct, droq, (pkts_to_process - pkt)); 722f21fb3edSRaghu Vatsavayi 723f21fb3edSRaghu Vatsavayi droq->stats.dropped_toomany += (pkts_to_process - pkt); 724f21fb3edSRaghu Vatsavayi return pkts_to_process; 725f21fb3edSRaghu Vatsavayi } 726f21fb3edSRaghu Vatsavayi 727f21fb3edSRaghu Vatsavayi return pkt; 728f21fb3edSRaghu Vatsavayi } 729f21fb3edSRaghu Vatsavayi 730f21fb3edSRaghu Vatsavayi int 731f21fb3edSRaghu Vatsavayi octeon_droq_process_packets(struct octeon_device *oct, 732f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 733f21fb3edSRaghu Vatsavayi u32 budget) 734f21fb3edSRaghu Vatsavayi { 735f21fb3edSRaghu Vatsavayi u32 pkt_count = 0, pkts_processed = 0; 736f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 737f21fb3edSRaghu Vatsavayi 738f21fb3edSRaghu Vatsavayi pkt_count = atomic_read(&droq->pkts_pending); 739f21fb3edSRaghu Vatsavayi if (!pkt_count) 740f21fb3edSRaghu Vatsavayi return 0; 741f21fb3edSRaghu Vatsavayi 742f21fb3edSRaghu Vatsavayi if (pkt_count > budget) 743f21fb3edSRaghu Vatsavayi pkt_count = budget; 744f21fb3edSRaghu Vatsavayi 745a2c64b67SRaghu Vatsavayi /* Grab the droq lock */ 746f21fb3edSRaghu Vatsavayi spin_lock(&droq->lock); 747f21fb3edSRaghu Vatsavayi 748f21fb3edSRaghu Vatsavayi pkts_processed = octeon_droq_fast_process_packets(oct, droq, pkt_count); 749f21fb3edSRaghu Vatsavayi 750f21fb3edSRaghu Vatsavayi atomic_sub(pkts_processed, &droq->pkts_pending); 751f21fb3edSRaghu Vatsavayi 752f21fb3edSRaghu Vatsavayi /* Release the spin lock */ 753f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 754f21fb3edSRaghu Vatsavayi 755f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 756f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 757f21fb3edSRaghu Vatsavayi 758f21fb3edSRaghu Vatsavayi list_del(tmp); 759f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 760f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 761f21fb3edSRaghu Vatsavayi (oct, 762f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 763f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 764f21fb3edSRaghu Vatsavayi } 765f21fb3edSRaghu Vatsavayi 766f21fb3edSRaghu Vatsavayi /* If there are packets pending. schedule tasklet again */ 767f21fb3edSRaghu Vatsavayi if (atomic_read(&droq->pkts_pending)) 768f21fb3edSRaghu Vatsavayi return 1; 769f21fb3edSRaghu Vatsavayi 770f21fb3edSRaghu Vatsavayi return 0; 771f21fb3edSRaghu Vatsavayi } 772f21fb3edSRaghu Vatsavayi 773f21fb3edSRaghu Vatsavayi /** 774f21fb3edSRaghu Vatsavayi * Utility function to poll for packets. check_hw_for_packets must be 775f21fb3edSRaghu Vatsavayi * called before calling this routine. 776f21fb3edSRaghu Vatsavayi */ 777f21fb3edSRaghu Vatsavayi 778f21fb3edSRaghu Vatsavayi static int 779f21fb3edSRaghu Vatsavayi octeon_droq_process_poll_pkts(struct octeon_device *oct, 780f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, u32 budget) 781f21fb3edSRaghu Vatsavayi { 782f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 783f21fb3edSRaghu Vatsavayi u32 pkts_available = 0, pkts_processed = 0; 784f21fb3edSRaghu Vatsavayi u32 total_pkts_processed = 0; 785f21fb3edSRaghu Vatsavayi 786f21fb3edSRaghu Vatsavayi if (budget > droq->max_count) 787f21fb3edSRaghu Vatsavayi budget = droq->max_count; 788f21fb3edSRaghu Vatsavayi 789f21fb3edSRaghu Vatsavayi spin_lock(&droq->lock); 790f21fb3edSRaghu Vatsavayi 791f21fb3edSRaghu Vatsavayi while (total_pkts_processed < budget) { 792f21fb3edSRaghu Vatsavayi pkts_available = 793f21fb3edSRaghu Vatsavayi CVM_MIN((budget - total_pkts_processed), 794f21fb3edSRaghu Vatsavayi (u32)(atomic_read(&droq->pkts_pending))); 795f21fb3edSRaghu Vatsavayi 796f21fb3edSRaghu Vatsavayi if (pkts_available == 0) 797f21fb3edSRaghu Vatsavayi break; 798f21fb3edSRaghu Vatsavayi 799f21fb3edSRaghu Vatsavayi pkts_processed = 800f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(oct, droq, 801f21fb3edSRaghu Vatsavayi pkts_available); 802f21fb3edSRaghu Vatsavayi 803f21fb3edSRaghu Vatsavayi atomic_sub(pkts_processed, &droq->pkts_pending); 804f21fb3edSRaghu Vatsavayi 805f21fb3edSRaghu Vatsavayi total_pkts_processed += pkts_processed; 806f21fb3edSRaghu Vatsavayi 807a7d5a3dcSRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq); 808f21fb3edSRaghu Vatsavayi } 809f21fb3edSRaghu Vatsavayi 810f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 811f21fb3edSRaghu Vatsavayi 812f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 813f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 814f21fb3edSRaghu Vatsavayi 815f21fb3edSRaghu Vatsavayi list_del(tmp); 816f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 817f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 818f21fb3edSRaghu Vatsavayi (oct, 819f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 820f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 821f21fb3edSRaghu Vatsavayi } 822f21fb3edSRaghu Vatsavayi 823f21fb3edSRaghu Vatsavayi return total_pkts_processed; 824f21fb3edSRaghu Vatsavayi } 825f21fb3edSRaghu Vatsavayi 826f21fb3edSRaghu Vatsavayi int 827f21fb3edSRaghu Vatsavayi octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd, 828f21fb3edSRaghu Vatsavayi u32 arg) 829f21fb3edSRaghu Vatsavayi { 830f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 831f21fb3edSRaghu Vatsavayi 832f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 833f21fb3edSRaghu Vatsavayi 834f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_PROCESS_PKTS) 835f21fb3edSRaghu Vatsavayi return octeon_droq_process_poll_pkts(oct, droq, arg); 836f21fb3edSRaghu Vatsavayi 837f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_PENDING_PKTS) { 838f21fb3edSRaghu Vatsavayi u32 pkt_cnt = atomic_read(&droq->pkts_pending); 839f21fb3edSRaghu Vatsavayi 840f21fb3edSRaghu Vatsavayi return octeon_droq_process_packets(oct, droq, pkt_cnt); 841f21fb3edSRaghu Vatsavayi } 842f21fb3edSRaghu Vatsavayi 843f21fb3edSRaghu Vatsavayi if (cmd == POLL_EVENT_ENABLE_INTR) { 844f21fb3edSRaghu Vatsavayi u32 value; 845f21fb3edSRaghu Vatsavayi unsigned long flags; 846f21fb3edSRaghu Vatsavayi 847f21fb3edSRaghu Vatsavayi /* Enable Pkt Interrupt */ 848f21fb3edSRaghu Vatsavayi switch (oct->chip_id) { 849f21fb3edSRaghu Vatsavayi case OCTEON_CN66XX: 850f21fb3edSRaghu Vatsavayi case OCTEON_CN68XX: { 851f21fb3edSRaghu Vatsavayi struct octeon_cn6xxx *cn6xxx = 852f21fb3edSRaghu Vatsavayi (struct octeon_cn6xxx *)oct->chip; 853f21fb3edSRaghu Vatsavayi spin_lock_irqsave 854f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 855f21fb3edSRaghu Vatsavayi value = 856f21fb3edSRaghu Vatsavayi octeon_read_csr(oct, 857f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_TIME_INT_ENB); 858f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 859f21fb3edSRaghu Vatsavayi octeon_write_csr(oct, 860f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_TIME_INT_ENB, 861f21fb3edSRaghu Vatsavayi value); 862f21fb3edSRaghu Vatsavayi value = 863f21fb3edSRaghu Vatsavayi octeon_read_csr(oct, 864f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_CNT_INT_ENB); 865f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 866f21fb3edSRaghu Vatsavayi octeon_write_csr(oct, 867f21fb3edSRaghu Vatsavayi CN6XXX_SLI_PKT_CNT_INT_ENB, 868f21fb3edSRaghu Vatsavayi value); 869f21fb3edSRaghu Vatsavayi 870f21fb3edSRaghu Vatsavayi /* don't bother flushing the enables */ 871f21fb3edSRaghu Vatsavayi 872f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore 873f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 874f21fb3edSRaghu Vatsavayi return 0; 875f21fb3edSRaghu Vatsavayi } 876f21fb3edSRaghu Vatsavayi break; 877f21fb3edSRaghu Vatsavayi } 878f21fb3edSRaghu Vatsavayi 879f21fb3edSRaghu Vatsavayi return 0; 880f21fb3edSRaghu Vatsavayi } 881f21fb3edSRaghu Vatsavayi 882f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s Unknown command: %d\n", __func__, cmd); 883f21fb3edSRaghu Vatsavayi return -EINVAL; 884f21fb3edSRaghu Vatsavayi } 885f21fb3edSRaghu Vatsavayi 886f21fb3edSRaghu Vatsavayi int octeon_register_droq_ops(struct octeon_device *oct, u32 q_no, 887f21fb3edSRaghu Vatsavayi struct octeon_droq_ops *ops) 888f21fb3edSRaghu Vatsavayi { 889f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 890f21fb3edSRaghu Vatsavayi unsigned long flags; 891f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 892f21fb3edSRaghu Vatsavayi 893f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 894f21fb3edSRaghu Vatsavayi 895f21fb3edSRaghu Vatsavayi if (!oct_cfg) 896f21fb3edSRaghu Vatsavayi return -EINVAL; 897f21fb3edSRaghu Vatsavayi 898f21fb3edSRaghu Vatsavayi if (!(ops)) { 899f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq_ops pointer is NULL\n", 900f21fb3edSRaghu Vatsavayi __func__); 901f21fb3edSRaghu Vatsavayi return -EINVAL; 902f21fb3edSRaghu Vatsavayi } 903f21fb3edSRaghu Vatsavayi 904f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 905f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 906f21fb3edSRaghu Vatsavayi __func__, q_no, (oct->num_oqs - 1)); 907f21fb3edSRaghu Vatsavayi return -EINVAL; 908f21fb3edSRaghu Vatsavayi } 909f21fb3edSRaghu Vatsavayi 910f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 911f21fb3edSRaghu Vatsavayi 912f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 913f21fb3edSRaghu Vatsavayi 914f21fb3edSRaghu Vatsavayi memcpy(&droq->ops, ops, sizeof(struct octeon_droq_ops)); 915f21fb3edSRaghu Vatsavayi 916f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 917f21fb3edSRaghu Vatsavayi 918f21fb3edSRaghu Vatsavayi return 0; 919f21fb3edSRaghu Vatsavayi } 920f21fb3edSRaghu Vatsavayi 921f21fb3edSRaghu Vatsavayi int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no) 922f21fb3edSRaghu Vatsavayi { 923f21fb3edSRaghu Vatsavayi unsigned long flags; 924f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 925f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 926f21fb3edSRaghu Vatsavayi 927f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 928f21fb3edSRaghu Vatsavayi 929f21fb3edSRaghu Vatsavayi if (!oct_cfg) 930f21fb3edSRaghu Vatsavayi return -EINVAL; 931f21fb3edSRaghu Vatsavayi 932f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 933f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 934f21fb3edSRaghu Vatsavayi __func__, q_no, oct->num_oqs - 1); 935f21fb3edSRaghu Vatsavayi return -EINVAL; 936f21fb3edSRaghu Vatsavayi } 937f21fb3edSRaghu Vatsavayi 938f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 939f21fb3edSRaghu Vatsavayi 940f21fb3edSRaghu Vatsavayi if (!droq) { 941f21fb3edSRaghu Vatsavayi dev_info(&oct->pci_dev->dev, 942f21fb3edSRaghu Vatsavayi "Droq id (%d) not available.\n", q_no); 943f21fb3edSRaghu Vatsavayi return 0; 944f21fb3edSRaghu Vatsavayi } 945f21fb3edSRaghu Vatsavayi 946f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 947f21fb3edSRaghu Vatsavayi 948f21fb3edSRaghu Vatsavayi droq->ops.fptr = NULL; 9490cece6c5SRaghu Vatsavayi droq->ops.farg = NULL; 950f21fb3edSRaghu Vatsavayi droq->ops.drop_on_max = 0; 951f21fb3edSRaghu Vatsavayi 952f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 953f21fb3edSRaghu Vatsavayi 954f21fb3edSRaghu Vatsavayi return 0; 955f21fb3edSRaghu Vatsavayi } 956f21fb3edSRaghu Vatsavayi 957f21fb3edSRaghu Vatsavayi int octeon_create_droq(struct octeon_device *oct, 958f21fb3edSRaghu Vatsavayi u32 q_no, u32 num_descs, 959f21fb3edSRaghu Vatsavayi u32 desc_size, void *app_ctx) 960f21fb3edSRaghu Vatsavayi { 961f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 96296ae48b7SRaghu Vatsavayi int numa_node = cpu_to_node(q_no % num_online_cpus()); 963f21fb3edSRaghu Vatsavayi 964f21fb3edSRaghu Vatsavayi if (oct->droq[q_no]) { 965f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "Droq already in use. Cannot create droq %d again\n", 966f21fb3edSRaghu Vatsavayi q_no); 967f21fb3edSRaghu Vatsavayi return 1; 968f21fb3edSRaghu Vatsavayi } 969f21fb3edSRaghu Vatsavayi 970f21fb3edSRaghu Vatsavayi /* Allocate the DS for the new droq. */ 97196ae48b7SRaghu Vatsavayi droq = vmalloc_node(sizeof(*droq), numa_node); 97296ae48b7SRaghu Vatsavayi if (!droq) 973f21fb3edSRaghu Vatsavayi droq = vmalloc(sizeof(*droq)); 974f21fb3edSRaghu Vatsavayi if (!droq) 975f21fb3edSRaghu Vatsavayi goto create_droq_fail; 976f21fb3edSRaghu Vatsavayi memset(droq, 0, sizeof(struct octeon_droq)); 977f21fb3edSRaghu Vatsavayi 978f21fb3edSRaghu Vatsavayi /*Disable the pkt o/p for this Q */ 979f21fb3edSRaghu Vatsavayi octeon_set_droq_pkt_op(oct, q_no, 0); 980f21fb3edSRaghu Vatsavayi oct->droq[q_no] = droq; 981f21fb3edSRaghu Vatsavayi 982f21fb3edSRaghu Vatsavayi /* Initialize the Droq */ 983f21fb3edSRaghu Vatsavayi octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx); 984f21fb3edSRaghu Vatsavayi 985f21fb3edSRaghu Vatsavayi oct->num_oqs++; 986f21fb3edSRaghu Vatsavayi 987f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s: Total number of OQ: %d\n", __func__, 988f21fb3edSRaghu Vatsavayi oct->num_oqs); 989f21fb3edSRaghu Vatsavayi 990f21fb3edSRaghu Vatsavayi /* Global Droq register settings */ 991f21fb3edSRaghu Vatsavayi 992f21fb3edSRaghu Vatsavayi /* As of now not required, as setting are done for all 32 Droqs at 993f21fb3edSRaghu Vatsavayi * the same time. 994f21fb3edSRaghu Vatsavayi */ 995f21fb3edSRaghu Vatsavayi return 0; 996f21fb3edSRaghu Vatsavayi 997f21fb3edSRaghu Vatsavayi create_droq_fail: 998f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no); 99908a965ecSAmitoj Kaur Chawla return -ENOMEM; 1000f21fb3edSRaghu Vatsavayi } 1001