1f21fb3edSRaghu Vatsavayi /********************************************************************** 2f21fb3edSRaghu Vatsavayi * Author: Cavium, Inc. 3f21fb3edSRaghu Vatsavayi * 4f21fb3edSRaghu Vatsavayi * Contact: support@cavium.com 5f21fb3edSRaghu Vatsavayi * Please include "LiquidIO" in the subject. 6f21fb3edSRaghu Vatsavayi * 750579d3dSRaghu Vatsavayi * Copyright (c) 2003-2016 Cavium, Inc. 8f21fb3edSRaghu Vatsavayi * 9f21fb3edSRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify 10f21fb3edSRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as 11f21fb3edSRaghu Vatsavayi * published by the Free Software Foundation. 12f21fb3edSRaghu Vatsavayi * 13f21fb3edSRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but 14f21fb3edSRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15f21fb3edSRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 1650579d3dSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more details. 1750579d3dSRaghu Vatsavayi ***********************************************************************/ 18f21fb3edSRaghu Vatsavayi #include <linux/pci.h> 19f21fb3edSRaghu Vatsavayi #include <linux/netdevice.h> 205b173cf9SRaghu Vatsavayi #include <linux/vmalloc.h> 21f21fb3edSRaghu Vatsavayi #include "liquidio_common.h" 22f21fb3edSRaghu Vatsavayi #include "octeon_droq.h" 23f21fb3edSRaghu Vatsavayi #include "octeon_iq.h" 24f21fb3edSRaghu Vatsavayi #include "response_manager.h" 25f21fb3edSRaghu Vatsavayi #include "octeon_device.h" 26f21fb3edSRaghu Vatsavayi #include "octeon_main.h" 27f21fb3edSRaghu Vatsavayi #include "octeon_network.h" 28f21fb3edSRaghu Vatsavayi #include "cn66xx_regs.h" 29f21fb3edSRaghu Vatsavayi #include "cn66xx_device.h" 305b823514SRaghu Vatsavayi #include "cn23xx_pf_device.h" 319217c3cfSRaghu Vatsavayi #include "cn23xx_vf_device.h" 32f21fb3edSRaghu Vatsavayi 33f21fb3edSRaghu Vatsavayi struct niclist { 34f21fb3edSRaghu Vatsavayi struct list_head list; 35f21fb3edSRaghu Vatsavayi void *ptr; 36f21fb3edSRaghu Vatsavayi }; 37f21fb3edSRaghu Vatsavayi 38f21fb3edSRaghu Vatsavayi struct __dispatch { 39f21fb3edSRaghu Vatsavayi struct list_head list; 40f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 41f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 42f21fb3edSRaghu Vatsavayi }; 43f21fb3edSRaghu Vatsavayi 44f21fb3edSRaghu Vatsavayi /** Get the argument that the user set when registering dispatch 45f21fb3edSRaghu Vatsavayi * function for a given opcode/subcode. 46f21fb3edSRaghu Vatsavayi * @param octeon_dev - the octeon device pointer. 47f21fb3edSRaghu Vatsavayi * @param opcode - the opcode for which the dispatch argument 48f21fb3edSRaghu Vatsavayi * is to be checked. 49f21fb3edSRaghu Vatsavayi * @param subcode - the subcode for which the dispatch argument 50f21fb3edSRaghu Vatsavayi * is to be checked. 51f21fb3edSRaghu Vatsavayi * @return Success: void * (argument to the dispatch function) 52f21fb3edSRaghu Vatsavayi * @return Failure: NULL 53f21fb3edSRaghu Vatsavayi * 54f21fb3edSRaghu Vatsavayi */ 55bf534588SVijaya Mohan Guvva void *octeon_get_dispatch_arg(struct octeon_device *octeon_dev, 56f21fb3edSRaghu Vatsavayi u16 opcode, u16 subcode) 57f21fb3edSRaghu Vatsavayi { 58f21fb3edSRaghu Vatsavayi int idx; 59f21fb3edSRaghu Vatsavayi struct list_head *dispatch; 60f21fb3edSRaghu Vatsavayi void *fn_arg = NULL; 61f21fb3edSRaghu Vatsavayi u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); 62f21fb3edSRaghu Vatsavayi 63f21fb3edSRaghu Vatsavayi idx = combined_opcode & OCTEON_OPCODE_MASK; 64f21fb3edSRaghu Vatsavayi 65f21fb3edSRaghu Vatsavayi spin_lock_bh(&octeon_dev->dispatch.lock); 66f21fb3edSRaghu Vatsavayi 67f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.count == 0) { 68f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 69f21fb3edSRaghu Vatsavayi return NULL; 70f21fb3edSRaghu Vatsavayi } 71f21fb3edSRaghu Vatsavayi 72f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.dlist[idx].opcode == combined_opcode) { 73f21fb3edSRaghu Vatsavayi fn_arg = octeon_dev->dispatch.dlist[idx].arg; 74f21fb3edSRaghu Vatsavayi } else { 75f21fb3edSRaghu Vatsavayi list_for_each(dispatch, 76f21fb3edSRaghu Vatsavayi &octeon_dev->dispatch.dlist[idx].list) { 77f21fb3edSRaghu Vatsavayi if (((struct octeon_dispatch *)dispatch)->opcode == 78f21fb3edSRaghu Vatsavayi combined_opcode) { 79f21fb3edSRaghu Vatsavayi fn_arg = ((struct octeon_dispatch *) 80f21fb3edSRaghu Vatsavayi dispatch)->arg; 81f21fb3edSRaghu Vatsavayi break; 82f21fb3edSRaghu Vatsavayi } 83f21fb3edSRaghu Vatsavayi } 84f21fb3edSRaghu Vatsavayi } 85f21fb3edSRaghu Vatsavayi 86f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock); 87f21fb3edSRaghu Vatsavayi return fn_arg; 88f21fb3edSRaghu Vatsavayi } 89f21fb3edSRaghu Vatsavayi 90cd8b1eb4SRaghu Vatsavayi /** Check for packets on Droq. This function should be called with lock held. 91a2c64b67SRaghu Vatsavayi * @param droq - Droq on which count is checked. 92a2c64b67SRaghu Vatsavayi * @return Returns packet count. 93a2c64b67SRaghu Vatsavayi */ 94a7d5a3dcSRaghu Vatsavayi u32 octeon_droq_check_hw_for_pkts(struct octeon_droq *droq) 95f21fb3edSRaghu Vatsavayi { 96f21fb3edSRaghu Vatsavayi u32 pkt_count = 0; 97cd8b1eb4SRaghu Vatsavayi u32 last_count; 98f21fb3edSRaghu Vatsavayi 99f21fb3edSRaghu Vatsavayi pkt_count = readl(droq->pkts_sent_reg); 100f21fb3edSRaghu Vatsavayi 101cd8b1eb4SRaghu Vatsavayi last_count = pkt_count - droq->pkt_count; 102cd8b1eb4SRaghu Vatsavayi droq->pkt_count = pkt_count; 103cd8b1eb4SRaghu Vatsavayi 104cd8b1eb4SRaghu Vatsavayi /* we shall write to cnts at napi irq enable or end of droq tasklet */ 105cd8b1eb4SRaghu Vatsavayi if (last_count) 106cd8b1eb4SRaghu Vatsavayi atomic_add(last_count, &droq->pkts_pending); 107cd8b1eb4SRaghu Vatsavayi 108cd8b1eb4SRaghu Vatsavayi return last_count; 109f21fb3edSRaghu Vatsavayi } 110f21fb3edSRaghu Vatsavayi 111f21fb3edSRaghu Vatsavayi static void octeon_droq_compute_max_packet_bufs(struct octeon_droq *droq) 112f21fb3edSRaghu Vatsavayi { 113f21fb3edSRaghu Vatsavayi u32 count = 0; 114f21fb3edSRaghu Vatsavayi 115f21fb3edSRaghu Vatsavayi /* max_empty_descs is the max. no. of descs that can have no buffers. 116f21fb3edSRaghu Vatsavayi * If the empty desc count goes beyond this value, we cannot safely 117f21fb3edSRaghu Vatsavayi * read in a 64K packet sent by Octeon 118f21fb3edSRaghu Vatsavayi * (64K is max pkt size from Octeon) 119f21fb3edSRaghu Vatsavayi */ 120f21fb3edSRaghu Vatsavayi droq->max_empty_descs = 0; 121f21fb3edSRaghu Vatsavayi 122f21fb3edSRaghu Vatsavayi do { 123f21fb3edSRaghu Vatsavayi droq->max_empty_descs++; 124f21fb3edSRaghu Vatsavayi count += droq->buffer_size; 125f21fb3edSRaghu Vatsavayi } while (count < (64 * 1024)); 126f21fb3edSRaghu Vatsavayi 127f21fb3edSRaghu Vatsavayi droq->max_empty_descs = droq->max_count - droq->max_empty_descs; 128f21fb3edSRaghu Vatsavayi } 129f21fb3edSRaghu Vatsavayi 130f21fb3edSRaghu Vatsavayi static void octeon_droq_reset_indices(struct octeon_droq *droq) 131f21fb3edSRaghu Vatsavayi { 132f21fb3edSRaghu Vatsavayi droq->read_idx = 0; 133f21fb3edSRaghu Vatsavayi droq->write_idx = 0; 134f21fb3edSRaghu Vatsavayi droq->refill_idx = 0; 135f21fb3edSRaghu Vatsavayi droq->refill_count = 0; 136f21fb3edSRaghu Vatsavayi atomic_set(&droq->pkts_pending, 0); 137f21fb3edSRaghu Vatsavayi } 138f21fb3edSRaghu Vatsavayi 139f21fb3edSRaghu Vatsavayi static void 140f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(struct octeon_device *oct, 141f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 142f21fb3edSRaghu Vatsavayi { 143f21fb3edSRaghu Vatsavayi u32 i; 144cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 145f21fb3edSRaghu Vatsavayi 146f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 147cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[i].pg_info; 148689062a1SRick Farrington if (!pg_info) 149689062a1SRick Farrington continue; 150cabeb13bSRaghu Vatsavayi 151cabeb13bSRaghu Vatsavayi if (pg_info->dma) 152cabeb13bSRaghu Vatsavayi lio_unmap_ring(oct->pci_dev, 153cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 154cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 155cabeb13bSRaghu Vatsavayi 156cabeb13bSRaghu Vatsavayi if (pg_info->page) 157cabeb13bSRaghu Vatsavayi recv_buffer_destroy(droq->recv_buf_list[i].buffer, 158cabeb13bSRaghu Vatsavayi pg_info); 159cabeb13bSRaghu Vatsavayi 160f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = NULL; 161f21fb3edSRaghu Vatsavayi } 162f21fb3edSRaghu Vatsavayi 163f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 164f21fb3edSRaghu Vatsavayi } 165f21fb3edSRaghu Vatsavayi 166f21fb3edSRaghu Vatsavayi static int 167f21fb3edSRaghu Vatsavayi octeon_droq_setup_ring_buffers(struct octeon_device *oct, 168f21fb3edSRaghu Vatsavayi struct octeon_droq *droq) 169f21fb3edSRaghu Vatsavayi { 170f21fb3edSRaghu Vatsavayi u32 i; 171f21fb3edSRaghu Vatsavayi void *buf; 172f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring = droq->desc_ring; 173f21fb3edSRaghu Vatsavayi 174f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) { 175cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(oct, &droq->recv_buf_list[i].pg_info); 176f21fb3edSRaghu Vatsavayi 177f21fb3edSRaghu Vatsavayi if (!buf) { 178f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s buffer alloc failed\n", 179f21fb3edSRaghu Vatsavayi __func__); 180cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 181f21fb3edSRaghu Vatsavayi return -ENOMEM; 182f21fb3edSRaghu Vatsavayi } 183f21fb3edSRaghu Vatsavayi 184f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = buf; 185f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].data = get_rbd(buf); 186c4ee5d81SPrasad Kanneganti desc_ring[i].info_ptr = 0; 187f21fb3edSRaghu Vatsavayi desc_ring[i].buffer_ptr = 188cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[i].buffer); 189f21fb3edSRaghu Vatsavayi } 190f21fb3edSRaghu Vatsavayi 191f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq); 192f21fb3edSRaghu Vatsavayi 193f21fb3edSRaghu Vatsavayi octeon_droq_compute_max_packet_bufs(droq); 194f21fb3edSRaghu Vatsavayi 195f21fb3edSRaghu Vatsavayi return 0; 196f21fb3edSRaghu Vatsavayi } 197f21fb3edSRaghu Vatsavayi 198f21fb3edSRaghu Vatsavayi int octeon_delete_droq(struct octeon_device *oct, u32 q_no) 199f21fb3edSRaghu Vatsavayi { 200f21fb3edSRaghu Vatsavayi struct octeon_droq *droq = oct->droq[q_no]; 201f21fb3edSRaghu Vatsavayi 202f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 203f21fb3edSRaghu Vatsavayi 204f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(oct, droq); 205f21fb3edSRaghu Vatsavayi vfree(droq->recv_buf_list); 206f21fb3edSRaghu Vatsavayi 207f21fb3edSRaghu Vatsavayi if (droq->desc_ring) 208f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), 209f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma); 210f21fb3edSRaghu Vatsavayi 211f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 212c1550fdeSIntiyaz Basha oct->io_qmask.oq &= ~(1ULL << q_no); 213c1550fdeSIntiyaz Basha vfree(oct->droq[q_no]); 214c1550fdeSIntiyaz Basha oct->droq[q_no] = NULL; 215c1550fdeSIntiyaz Basha oct->num_oqs--; 216f21fb3edSRaghu Vatsavayi 217f21fb3edSRaghu Vatsavayi return 0; 218f21fb3edSRaghu Vatsavayi } 219f21fb3edSRaghu Vatsavayi 220f21fb3edSRaghu Vatsavayi int octeon_init_droq(struct octeon_device *oct, 221f21fb3edSRaghu Vatsavayi u32 q_no, 222f21fb3edSRaghu Vatsavayi u32 num_descs, 223f21fb3edSRaghu Vatsavayi u32 desc_size, 224f21fb3edSRaghu Vatsavayi void *app_ctx) 225f21fb3edSRaghu Vatsavayi { 226f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 227f21fb3edSRaghu Vatsavayi u32 desc_ring_size = 0, c_num_descs = 0, c_buf_size = 0; 228f21fb3edSRaghu Vatsavayi u32 c_pkts_per_intr = 0, c_refill_threshold = 0; 229b3ca9af0SVSR Burru int numa_node = dev_to_node(&oct->pci_dev->dev); 230f21fb3edSRaghu Vatsavayi 231f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); 232f21fb3edSRaghu Vatsavayi 233f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 234f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE); 235f21fb3edSRaghu Vatsavayi 236f21fb3edSRaghu Vatsavayi droq->oct_dev = oct; 237f21fb3edSRaghu Vatsavayi droq->q_no = q_no; 238f21fb3edSRaghu Vatsavayi if (app_ctx) 239f21fb3edSRaghu Vatsavayi droq->app_ctx = app_ctx; 240f21fb3edSRaghu Vatsavayi else 241f21fb3edSRaghu Vatsavayi droq->app_ctx = (void *)(size_t)q_no; 242f21fb3edSRaghu Vatsavayi 243f21fb3edSRaghu Vatsavayi c_num_descs = num_descs; 244f21fb3edSRaghu Vatsavayi c_buf_size = desc_size; 245f21fb3edSRaghu Vatsavayi if (OCTEON_CN6XXX(oct)) { 24697a25326SRaghu Vatsavayi struct octeon_config *conf6x = CHIP_CONF(oct, cn6xxx); 247f21fb3edSRaghu Vatsavayi 248f21fb3edSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf6x); 24996ae48b7SRaghu Vatsavayi c_refill_threshold = 25096ae48b7SRaghu Vatsavayi (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf6x); 2515b823514SRaghu Vatsavayi } else if (OCTEON_CN23XX_PF(oct)) { 25297a25326SRaghu Vatsavayi struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_pf); 2535b823514SRaghu Vatsavayi 2545b823514SRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23); 2555b823514SRaghu Vatsavayi c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23); 2569217c3cfSRaghu Vatsavayi } else if (OCTEON_CN23XX_VF(oct)) { 2579217c3cfSRaghu Vatsavayi struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_vf); 2589217c3cfSRaghu Vatsavayi 2599217c3cfSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23); 2609217c3cfSRaghu Vatsavayi c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23); 26196ae48b7SRaghu Vatsavayi } else { 26296ae48b7SRaghu Vatsavayi return 1; 263f21fb3edSRaghu Vatsavayi } 264f21fb3edSRaghu Vatsavayi 265f21fb3edSRaghu Vatsavayi droq->max_count = c_num_descs; 266f21fb3edSRaghu Vatsavayi droq->buffer_size = c_buf_size; 267f21fb3edSRaghu Vatsavayi 268f21fb3edSRaghu Vatsavayi desc_ring_size = droq->max_count * OCT_DROQ_DESC_SIZE; 269f21fb3edSRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size, 270f21fb3edSRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma); 271f21fb3edSRaghu Vatsavayi 272f21fb3edSRaghu Vatsavayi if (!droq->desc_ring) { 273f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 274f21fb3edSRaghu Vatsavayi "Output queue %d ring alloc failed\n", q_no); 275f21fb3edSRaghu Vatsavayi return 1; 276f21fb3edSRaghu Vatsavayi } 277f21fb3edSRaghu Vatsavayi 278f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n", 279f21fb3edSRaghu Vatsavayi q_no, droq->desc_ring, droq->desc_ring_dma); 280f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: num_desc: %d\n", q_no, 281f21fb3edSRaghu Vatsavayi droq->max_count); 282f21fb3edSRaghu Vatsavayi 283f21fb3edSRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 284fd7becedSKees Cook vzalloc_node(array_size(droq->max_count, OCT_DROQ_RECVBUF_SIZE), 28596ae48b7SRaghu Vatsavayi numa_node); 28696ae48b7SRaghu Vatsavayi if (!droq->recv_buf_list) 28796ae48b7SRaghu Vatsavayi droq->recv_buf_list = (struct octeon_recv_buffer *) 288fad953ceSKees Cook vzalloc(array_size(droq->max_count, 289fad953ceSKees Cook OCT_DROQ_RECVBUF_SIZE)); 290f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list) { 291f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Output queue recv buf list alloc failed\n"); 292f21fb3edSRaghu Vatsavayi goto init_droq_fail; 293f21fb3edSRaghu Vatsavayi } 294f21fb3edSRaghu Vatsavayi 295f21fb3edSRaghu Vatsavayi if (octeon_droq_setup_ring_buffers(oct, droq)) 296f21fb3edSRaghu Vatsavayi goto init_droq_fail; 297f21fb3edSRaghu Vatsavayi 298f21fb3edSRaghu Vatsavayi droq->pkts_per_intr = c_pkts_per_intr; 299f21fb3edSRaghu Vatsavayi droq->refill_threshold = c_refill_threshold; 300f21fb3edSRaghu Vatsavayi 301f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "DROQ INIT: max_empty_descs: %d\n", 302f21fb3edSRaghu Vatsavayi droq->max_empty_descs); 303f21fb3edSRaghu Vatsavayi 304f21fb3edSRaghu Vatsavayi spin_lock_init(&droq->lock); 305f21fb3edSRaghu Vatsavayi 306f21fb3edSRaghu Vatsavayi INIT_LIST_HEAD(&droq->dispatch_list); 307f21fb3edSRaghu Vatsavayi 308f21fb3edSRaghu Vatsavayi /* For 56xx Pass1, this function won't be called, so no checks. */ 309f21fb3edSRaghu Vatsavayi oct->fn_list.setup_oq_regs(oct, q_no); 310f21fb3edSRaghu Vatsavayi 311763185a3SRaghu Vatsavayi oct->io_qmask.oq |= BIT_ULL(q_no); 312f21fb3edSRaghu Vatsavayi 313f21fb3edSRaghu Vatsavayi return 0; 314f21fb3edSRaghu Vatsavayi 315f21fb3edSRaghu Vatsavayi init_droq_fail: 316f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no); 317f21fb3edSRaghu Vatsavayi return 1; 318f21fb3edSRaghu Vatsavayi } 319f21fb3edSRaghu Vatsavayi 320f21fb3edSRaghu Vatsavayi /* octeon_create_recv_info 321f21fb3edSRaghu Vatsavayi * Parameters: 322f21fb3edSRaghu Vatsavayi * octeon_dev - pointer to the octeon device structure 323f21fb3edSRaghu Vatsavayi * droq - droq in which the packet arrived. 324f21fb3edSRaghu Vatsavayi * buf_cnt - no. of buffers used by the packet. 325f21fb3edSRaghu Vatsavayi * idx - index in the descriptor for the first buffer in the packet. 326f21fb3edSRaghu Vatsavayi * Description: 327f21fb3edSRaghu Vatsavayi * Allocates a recv_info_t and copies the buffer addresses for packet data 328f21fb3edSRaghu Vatsavayi * into the recv_pkt space which starts at an 8B offset from recv_info_t. 329f21fb3edSRaghu Vatsavayi * Flags the descriptors for refill later. If available descriptors go 330f21fb3edSRaghu Vatsavayi * below the threshold to receive a 64K pkt, new buffers are first allocated 331f21fb3edSRaghu Vatsavayi * before the recv_pkt_t is created. 332f21fb3edSRaghu Vatsavayi * This routine will be called in interrupt context. 333f21fb3edSRaghu Vatsavayi * Returns: 334f21fb3edSRaghu Vatsavayi * Success: Pointer to recv_info_t 335f21fb3edSRaghu Vatsavayi * Failure: NULL. 336f21fb3edSRaghu Vatsavayi */ 337f21fb3edSRaghu Vatsavayi static inline struct octeon_recv_info *octeon_create_recv_info( 338f21fb3edSRaghu Vatsavayi struct octeon_device *octeon_dev, 339f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 340f21fb3edSRaghu Vatsavayi u32 buf_cnt, 341f21fb3edSRaghu Vatsavayi u32 idx) 342f21fb3edSRaghu Vatsavayi { 343f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 344f21fb3edSRaghu Vatsavayi struct octeon_recv_pkt *recv_pkt; 345f21fb3edSRaghu Vatsavayi struct octeon_recv_info *recv_info; 346f21fb3edSRaghu Vatsavayi u32 i, bytes_left; 347cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 348f21fb3edSRaghu Vatsavayi 349c4ee5d81SPrasad Kanneganti info = (struct octeon_droq_info *)droq->recv_buf_list[idx].data; 350f21fb3edSRaghu Vatsavayi 351f21fb3edSRaghu Vatsavayi recv_info = octeon_alloc_recv_info(sizeof(struct __dispatch)); 352f21fb3edSRaghu Vatsavayi if (!recv_info) 353f21fb3edSRaghu Vatsavayi return NULL; 354f21fb3edSRaghu Vatsavayi 355f21fb3edSRaghu Vatsavayi recv_pkt = recv_info->recv_pkt; 356f21fb3edSRaghu Vatsavayi recv_pkt->rh = info->rh; 357f21fb3edSRaghu Vatsavayi recv_pkt->length = (u32)info->length; 358f21fb3edSRaghu Vatsavayi recv_pkt->buffer_count = (u16)buf_cnt; 359f21fb3edSRaghu Vatsavayi recv_pkt->octeon_id = (u16)octeon_dev->octeon_id; 360f21fb3edSRaghu Vatsavayi 361f21fb3edSRaghu Vatsavayi i = 0; 362f21fb3edSRaghu Vatsavayi bytes_left = (u32)info->length; 363f21fb3edSRaghu Vatsavayi 364f21fb3edSRaghu Vatsavayi while (buf_cnt) { 365cabeb13bSRaghu Vatsavayi { 366cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[idx].pg_info; 367cabeb13bSRaghu Vatsavayi 368f21fb3edSRaghu Vatsavayi lio_unmap_ring(octeon_dev->pci_dev, 369cabeb13bSRaghu Vatsavayi (u64)pg_info->dma); 370cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 371cabeb13bSRaghu Vatsavayi pg_info->dma = 0; 372cabeb13bSRaghu Vatsavayi } 373f21fb3edSRaghu Vatsavayi 374f21fb3edSRaghu Vatsavayi recv_pkt->buffer_size[i] = 375f21fb3edSRaghu Vatsavayi (bytes_left >= 376f21fb3edSRaghu Vatsavayi droq->buffer_size) ? droq->buffer_size : bytes_left; 377f21fb3edSRaghu Vatsavayi 378f21fb3edSRaghu Vatsavayi recv_pkt->buffer_ptr[i] = droq->recv_buf_list[idx].buffer; 379f21fb3edSRaghu Vatsavayi droq->recv_buf_list[idx].buffer = NULL; 380f21fb3edSRaghu Vatsavayi 38197a25326SRaghu Vatsavayi idx = incr_index(idx, 1, droq->max_count); 382f21fb3edSRaghu Vatsavayi bytes_left -= droq->buffer_size; 383f21fb3edSRaghu Vatsavayi i++; 384f21fb3edSRaghu Vatsavayi buf_cnt--; 385f21fb3edSRaghu Vatsavayi } 386f21fb3edSRaghu Vatsavayi 387f21fb3edSRaghu Vatsavayi return recv_info; 388f21fb3edSRaghu Vatsavayi } 389f21fb3edSRaghu Vatsavayi 390f21fb3edSRaghu Vatsavayi /* If we were not able to refill all buffers, try to move around 391f21fb3edSRaghu Vatsavayi * the buffers that were not dispatched. 392f21fb3edSRaghu Vatsavayi */ 393f21fb3edSRaghu Vatsavayi static inline u32 394f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(struct octeon_droq *droq, 395f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring) 396f21fb3edSRaghu Vatsavayi { 397f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 398f21fb3edSRaghu Vatsavayi 399f21fb3edSRaghu Vatsavayi u32 refill_index = droq->refill_idx; 400f21fb3edSRaghu Vatsavayi 401f21fb3edSRaghu Vatsavayi while (refill_index != droq->read_idx) { 402f21fb3edSRaghu Vatsavayi if (droq->recv_buf_list[refill_index].buffer) { 403f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 404f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer; 405f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = 406f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].data; 407f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 408f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr; 409f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer = NULL; 410f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr = 0; 411f21fb3edSRaghu Vatsavayi do { 41297a25326SRaghu Vatsavayi droq->refill_idx = incr_index(droq->refill_idx, 41397a25326SRaghu Vatsavayi 1, 414f21fb3edSRaghu Vatsavayi droq->max_count); 415f21fb3edSRaghu Vatsavayi desc_refilled++; 416f21fb3edSRaghu Vatsavayi droq->refill_count--; 4179ae122c6SSatanand Burla } while (droq->recv_buf_list[droq->refill_idx].buffer); 418f21fb3edSRaghu Vatsavayi } 41997a25326SRaghu Vatsavayi refill_index = incr_index(refill_index, 1, droq->max_count); 420f21fb3edSRaghu Vatsavayi } /* while */ 421f21fb3edSRaghu Vatsavayi return desc_refilled; 422f21fb3edSRaghu Vatsavayi } 423f21fb3edSRaghu Vatsavayi 424f21fb3edSRaghu Vatsavayi /* octeon_droq_refill 425f21fb3edSRaghu Vatsavayi * Parameters: 426f21fb3edSRaghu Vatsavayi * droq - droq in which descriptors require new buffers. 427f21fb3edSRaghu Vatsavayi * Description: 428f21fb3edSRaghu Vatsavayi * Called during normal DROQ processing in interrupt mode or by the poll 429f21fb3edSRaghu Vatsavayi * thread to refill the descriptors from which buffers were dispatched 430f21fb3edSRaghu Vatsavayi * to upper layers. Attempts to allocate new buffers. If that fails, moves 431f21fb3edSRaghu Vatsavayi * up buffers (that were not dispatched) to form a contiguous ring. 432f21fb3edSRaghu Vatsavayi * Returns: 433f21fb3edSRaghu Vatsavayi * No of descriptors refilled. 434f21fb3edSRaghu Vatsavayi */ 435f21fb3edSRaghu Vatsavayi static u32 436f21fb3edSRaghu Vatsavayi octeon_droq_refill(struct octeon_device *octeon_dev, struct octeon_droq *droq) 437f21fb3edSRaghu Vatsavayi { 438f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring; 439f21fb3edSRaghu Vatsavayi void *buf = NULL; 440f21fb3edSRaghu Vatsavayi u8 *data; 441f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0; 442cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 443f21fb3edSRaghu Vatsavayi 444f21fb3edSRaghu Vatsavayi desc_ring = droq->desc_ring; 445f21fb3edSRaghu Vatsavayi 446f21fb3edSRaghu Vatsavayi while (droq->refill_count && (desc_refilled < droq->max_count)) { 447f21fb3edSRaghu Vatsavayi /* If a valid buffer exists (happens if there is no dispatch), 4484b6e326bSIntiyaz Basha * reuse the buffer, else allocate. 449f21fb3edSRaghu Vatsavayi */ 450f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list[droq->refill_idx].buffer) { 451cabeb13bSRaghu Vatsavayi pg_info = 452cabeb13bSRaghu Vatsavayi &droq->recv_buf_list[droq->refill_idx].pg_info; 453cabeb13bSRaghu Vatsavayi /* Either recycle the existing pages or go for 454cabeb13bSRaghu Vatsavayi * new page alloc 455cabeb13bSRaghu Vatsavayi */ 456cabeb13bSRaghu Vatsavayi if (pg_info->page) 457cabeb13bSRaghu Vatsavayi buf = recv_buffer_reuse(octeon_dev, pg_info); 458cabeb13bSRaghu Vatsavayi else 459cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(octeon_dev, pg_info); 460f21fb3edSRaghu Vatsavayi /* If a buffer could not be allocated, no point in 461f21fb3edSRaghu Vatsavayi * continuing 462f21fb3edSRaghu Vatsavayi */ 463cabeb13bSRaghu Vatsavayi if (!buf) { 464cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 465f21fb3edSRaghu Vatsavayi break; 466cabeb13bSRaghu Vatsavayi } 467f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer = 468f21fb3edSRaghu Vatsavayi buf; 469f21fb3edSRaghu Vatsavayi data = get_rbd(buf); 470f21fb3edSRaghu Vatsavayi } else { 471f21fb3edSRaghu Vatsavayi data = get_rbd(droq->recv_buf_list 472f21fb3edSRaghu Vatsavayi [droq->refill_idx].buffer); 473f21fb3edSRaghu Vatsavayi } 474f21fb3edSRaghu Vatsavayi 475f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = data; 476f21fb3edSRaghu Vatsavayi 477f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr = 4789ae122c6SSatanand Burla lio_map_ring(droq->recv_buf_list[ 4799ae122c6SSatanand Burla droq->refill_idx].buffer); 480f21fb3edSRaghu Vatsavayi 48197a25326SRaghu Vatsavayi droq->refill_idx = incr_index(droq->refill_idx, 1, 48297a25326SRaghu Vatsavayi droq->max_count); 483f21fb3edSRaghu Vatsavayi desc_refilled++; 484f21fb3edSRaghu Vatsavayi droq->refill_count--; 485f21fb3edSRaghu Vatsavayi } 486f21fb3edSRaghu Vatsavayi 487f21fb3edSRaghu Vatsavayi if (droq->refill_count) 488f21fb3edSRaghu Vatsavayi desc_refilled += 489f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(droq, desc_ring); 490f21fb3edSRaghu Vatsavayi 491f21fb3edSRaghu Vatsavayi /* if droq->refill_count 492f21fb3edSRaghu Vatsavayi * The refill count would not change in pass two. We only moved buffers 493f21fb3edSRaghu Vatsavayi * to close the gap in the ring, but we would still have the same no. of 494f21fb3edSRaghu Vatsavayi * buffers to refill. 495f21fb3edSRaghu Vatsavayi */ 496f21fb3edSRaghu Vatsavayi return desc_refilled; 497f21fb3edSRaghu Vatsavayi } 498f21fb3edSRaghu Vatsavayi 499031d4f12SSatanand Burla /** check if we can allocate packets to get out of oom. 500031d4f12SSatanand Burla * @param droq - Droq being checked. 5014b6e326bSIntiyaz Basha * @return 1 if fails to refill minimum 502031d4f12SSatanand Burla */ 5034b6e326bSIntiyaz Basha int octeon_retry_droq_refill(struct octeon_droq *droq) 504031d4f12SSatanand Burla { 505031d4f12SSatanand Burla struct octeon_device *oct = droq->oct_dev; 5064b6e326bSIntiyaz Basha int desc_refilled, reschedule = 1; 5074b6e326bSIntiyaz Basha u32 pkts_credit; 508031d4f12SSatanand Burla 509031d4f12SSatanand Burla spin_lock_bh(&droq->lock); 5104b6e326bSIntiyaz Basha pkts_credit = readl(droq->pkts_credit_reg); 511031d4f12SSatanand Burla desc_refilled = octeon_droq_refill(oct, droq); 512031d4f12SSatanand Burla if (desc_refilled) { 513031d4f12SSatanand Burla /* Flush the droq descriptor data to memory to be sure 514031d4f12SSatanand Burla * that when we update the credits the data in memory 515031d4f12SSatanand Burla * is accurate. 516031d4f12SSatanand Burla */ 517031d4f12SSatanand Burla wmb(); 518031d4f12SSatanand Burla writel(desc_refilled, droq->pkts_credit_reg); 519031d4f12SSatanand Burla /* make sure mmio write completes */ 520031d4f12SSatanand Burla mmiowb(); 5214b6e326bSIntiyaz Basha 5224b6e326bSIntiyaz Basha if (pkts_credit + desc_refilled >= CN23XX_SLI_DEF_BP) 5234b6e326bSIntiyaz Basha reschedule = 0; 524031d4f12SSatanand Burla } 525031d4f12SSatanand Burla spin_unlock_bh(&droq->lock); 5264b6e326bSIntiyaz Basha 5274b6e326bSIntiyaz Basha return reschedule; 528031d4f12SSatanand Burla } 529031d4f12SSatanand Burla 530f21fb3edSRaghu Vatsavayi static inline u32 531f21fb3edSRaghu Vatsavayi octeon_droq_get_bufcount(u32 buf_size, u32 total_len) 532f21fb3edSRaghu Vatsavayi { 533c4ee5d81SPrasad Kanneganti return ((total_len + buf_size - 1) / buf_size); 534f21fb3edSRaghu Vatsavayi } 535f21fb3edSRaghu Vatsavayi 536f21fb3edSRaghu Vatsavayi static int 537f21fb3edSRaghu Vatsavayi octeon_droq_dispatch_pkt(struct octeon_device *oct, 538f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 539f21fb3edSRaghu Vatsavayi union octeon_rh *rh, 540f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info) 541f21fb3edSRaghu Vatsavayi { 542f21fb3edSRaghu Vatsavayi u32 cnt; 543f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn; 544f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo; 545f21fb3edSRaghu Vatsavayi 546f21fb3edSRaghu Vatsavayi cnt = octeon_droq_get_bufcount(droq->buffer_size, (u32)info->length); 547f21fb3edSRaghu Vatsavayi 548f21fb3edSRaghu Vatsavayi disp_fn = octeon_get_dispatch(oct, (u16)rh->r.opcode, 549f21fb3edSRaghu Vatsavayi (u16)rh->r.subcode); 550f21fb3edSRaghu Vatsavayi if (disp_fn) { 551f21fb3edSRaghu Vatsavayi rinfo = octeon_create_recv_info(oct, droq, cnt, droq->read_idx); 552f21fb3edSRaghu Vatsavayi if (rinfo) { 553f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = rinfo->rsvd; 554f21fb3edSRaghu Vatsavayi 555f21fb3edSRaghu Vatsavayi rdisp->rinfo = rinfo; 556f21fb3edSRaghu Vatsavayi rdisp->disp_fn = disp_fn; 557f21fb3edSRaghu Vatsavayi rinfo->recv_pkt->rh = *rh; 558f21fb3edSRaghu Vatsavayi list_add_tail(&rdisp->list, 559f21fb3edSRaghu Vatsavayi &droq->dispatch_list); 560f21fb3edSRaghu Vatsavayi } else { 561f21fb3edSRaghu Vatsavayi droq->stats.dropped_nomem++; 562f21fb3edSRaghu Vatsavayi } 563f21fb3edSRaghu Vatsavayi } else { 564a2c64b67SRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function (opcode %u/%u)\n", 565a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.opcode, 566a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.subcode); 567f21fb3edSRaghu Vatsavayi droq->stats.dropped_nodispatch++; 5689ded1a51SRaghu Vatsavayi } 569f21fb3edSRaghu Vatsavayi 570f21fb3edSRaghu Vatsavayi return cnt; 571f21fb3edSRaghu Vatsavayi } 572f21fb3edSRaghu Vatsavayi 573f21fb3edSRaghu Vatsavayi static inline void octeon_droq_drop_packets(struct octeon_device *oct, 574f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 575f21fb3edSRaghu Vatsavayi u32 cnt) 576f21fb3edSRaghu Vatsavayi { 577f21fb3edSRaghu Vatsavayi u32 i = 0, buf_cnt; 578f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 579f21fb3edSRaghu Vatsavayi 580f21fb3edSRaghu Vatsavayi for (i = 0; i < cnt; i++) { 581c4ee5d81SPrasad Kanneganti info = (struct octeon_droq_info *) 582c4ee5d81SPrasad Kanneganti droq->recv_buf_list[droq->read_idx].data; 583f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 584f21fb3edSRaghu Vatsavayi 585f21fb3edSRaghu Vatsavayi if (info->length) { 586c4ee5d81SPrasad Kanneganti info->length += OCTNET_FRM_LENGTH_SIZE; 587f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += info->length; 588f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_get_bufcount(droq->buffer_size, 589f21fb3edSRaghu Vatsavayi (u32)info->length); 590f21fb3edSRaghu Vatsavayi } else { 591f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: In drop: pkt with len 0\n"); 592f21fb3edSRaghu Vatsavayi buf_cnt = 1; 593f21fb3edSRaghu Vatsavayi } 594f21fb3edSRaghu Vatsavayi 59597a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, buf_cnt, 59697a25326SRaghu Vatsavayi droq->max_count); 597f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 598f21fb3edSRaghu Vatsavayi } 599f21fb3edSRaghu Vatsavayi } 600f21fb3edSRaghu Vatsavayi 601f21fb3edSRaghu Vatsavayi static u32 602f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(struct octeon_device *oct, 603f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 604f21fb3edSRaghu Vatsavayi u32 pkts_to_process) 605f21fb3edSRaghu Vatsavayi { 6064b6e326bSIntiyaz Basha u32 pkt, total_len = 0, pkt_count, retval; 607f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info; 608f21fb3edSRaghu Vatsavayi union octeon_rh *rh; 609f21fb3edSRaghu Vatsavayi 610f21fb3edSRaghu Vatsavayi pkt_count = pkts_to_process; 611f21fb3edSRaghu Vatsavayi 612f21fb3edSRaghu Vatsavayi for (pkt = 0; pkt < pkt_count; pkt++) { 613f21fb3edSRaghu Vatsavayi u32 pkt_len = 0; 614f21fb3edSRaghu Vatsavayi struct sk_buff *nicbuf = NULL; 615cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info; 616cabeb13bSRaghu Vatsavayi void *buf; 617f21fb3edSRaghu Vatsavayi 618c4ee5d81SPrasad Kanneganti info = (struct octeon_droq_info *) 619c4ee5d81SPrasad Kanneganti droq->recv_buf_list[droq->read_idx].data; 620f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2); 621f21fb3edSRaghu Vatsavayi 622f21fb3edSRaghu Vatsavayi if (!info->length) { 623f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, 624f21fb3edSRaghu Vatsavayi "DROQ[%d] idx: %d len:0, pkt_cnt: %d\n", 625f21fb3edSRaghu Vatsavayi droq->q_no, droq->read_idx, pkt_count); 626f21fb3edSRaghu Vatsavayi print_hex_dump_bytes("", DUMP_PREFIX_ADDRESS, 627f21fb3edSRaghu Vatsavayi (u8 *)info, 628f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE); 629f21fb3edSRaghu Vatsavayi break; 630f21fb3edSRaghu Vatsavayi } 631f21fb3edSRaghu Vatsavayi 632f21fb3edSRaghu Vatsavayi /* Len of resp hdr in included in the received data len. */ 633f21fb3edSRaghu Vatsavayi rh = &info->rh; 634f21fb3edSRaghu Vatsavayi 635c4ee5d81SPrasad Kanneganti info->length += OCTNET_FRM_LENGTH_SIZE; 636c4ee5d81SPrasad Kanneganti rh->r_dh.len += (ROUNDUP8(OCT_DROQ_INFO_SIZE) / sizeof(u64)); 637f21fb3edSRaghu Vatsavayi total_len += (u32)info->length; 63897a25326SRaghu Vatsavayi if (opcode_slow_path(rh)) { 639f21fb3edSRaghu Vatsavayi u32 buf_cnt; 640f21fb3edSRaghu Vatsavayi 641f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_dispatch_pkt(oct, droq, rh, info); 64297a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, 64397a25326SRaghu Vatsavayi buf_cnt, droq->max_count); 644f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt; 645f21fb3edSRaghu Vatsavayi } else { 646f21fb3edSRaghu Vatsavayi if (info->length <= droq->buffer_size) { 647f21fb3edSRaghu Vatsavayi pkt_len = (u32)info->length; 648f21fb3edSRaghu Vatsavayi nicbuf = droq->recv_buf_list[ 649f21fb3edSRaghu Vatsavayi droq->read_idx].buffer; 650cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[ 651cabeb13bSRaghu Vatsavayi droq->read_idx].pg_info; 652cabeb13bSRaghu Vatsavayi if (recv_buffer_recycle(oct, pg_info)) 653cabeb13bSRaghu Vatsavayi pg_info->page = NULL; 654f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->read_idx].buffer = 655f21fb3edSRaghu Vatsavayi NULL; 656a2c64b67SRaghu Vatsavayi 65797a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, 1, 65897a25326SRaghu Vatsavayi droq->max_count); 659f21fb3edSRaghu Vatsavayi droq->refill_count++; 660f21fb3edSRaghu Vatsavayi } else { 661cabeb13bSRaghu Vatsavayi nicbuf = octeon_fast_packet_alloc((u32) 662f21fb3edSRaghu Vatsavayi info->length); 663f21fb3edSRaghu Vatsavayi pkt_len = 0; 664f21fb3edSRaghu Vatsavayi /* nicbuf allocation can fail. We'll handle it 665f21fb3edSRaghu Vatsavayi * inside the loop. 666f21fb3edSRaghu Vatsavayi */ 667f21fb3edSRaghu Vatsavayi while (pkt_len < info->length) { 668cabeb13bSRaghu Vatsavayi int cpy_len, idx = droq->read_idx; 669f21fb3edSRaghu Vatsavayi 670cabeb13bSRaghu Vatsavayi cpy_len = ((pkt_len + droq->buffer_size) 671cabeb13bSRaghu Vatsavayi > info->length) ? 672f21fb3edSRaghu Vatsavayi ((u32)info->length - pkt_len) : 673f21fb3edSRaghu Vatsavayi droq->buffer_size; 674f21fb3edSRaghu Vatsavayi 675f21fb3edSRaghu Vatsavayi if (nicbuf) { 676f21fb3edSRaghu Vatsavayi octeon_fast_packet_next(droq, 677f21fb3edSRaghu Vatsavayi nicbuf, 678f21fb3edSRaghu Vatsavayi cpy_len, 679cabeb13bSRaghu Vatsavayi idx); 6809ae122c6SSatanand Burla buf = droq->recv_buf_list[ 6819ae122c6SSatanand Burla idx].buffer; 682cabeb13bSRaghu Vatsavayi recv_buffer_fast_free(buf); 683cabeb13bSRaghu Vatsavayi droq->recv_buf_list[idx].buffer 684cabeb13bSRaghu Vatsavayi = NULL; 685cabeb13bSRaghu Vatsavayi } else { 686cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++; 687f21fb3edSRaghu Vatsavayi } 688f21fb3edSRaghu Vatsavayi 689f21fb3edSRaghu Vatsavayi pkt_len += cpy_len; 69097a25326SRaghu Vatsavayi droq->read_idx = 69197a25326SRaghu Vatsavayi incr_index(droq->read_idx, 1, 692f21fb3edSRaghu Vatsavayi droq->max_count); 693f21fb3edSRaghu Vatsavayi droq->refill_count++; 694f21fb3edSRaghu Vatsavayi } 695f21fb3edSRaghu Vatsavayi } 696f21fb3edSRaghu Vatsavayi 697f21fb3edSRaghu Vatsavayi if (nicbuf) { 698cabeb13bSRaghu Vatsavayi if (droq->ops.fptr) { 699f21fb3edSRaghu Vatsavayi droq->ops.fptr(oct->octeon_id, 700f21fb3edSRaghu Vatsavayi nicbuf, pkt_len, 7010cece6c5SRaghu Vatsavayi rh, &droq->napi, 7020cece6c5SRaghu Vatsavayi droq->ops.farg); 703cabeb13bSRaghu Vatsavayi } else { 704f21fb3edSRaghu Vatsavayi recv_buffer_free(nicbuf); 705f21fb3edSRaghu Vatsavayi } 706f21fb3edSRaghu Vatsavayi } 707cabeb13bSRaghu Vatsavayi } 708f21fb3edSRaghu Vatsavayi 709f21fb3edSRaghu Vatsavayi if (droq->refill_count >= droq->refill_threshold) { 710f21fb3edSRaghu Vatsavayi int desc_refilled = octeon_droq_refill(oct, droq); 711f21fb3edSRaghu Vatsavayi 7124b6e326bSIntiyaz Basha if (desc_refilled) { 7134b6e326bSIntiyaz Basha /* Flush the droq descriptor data to memory to 7144b6e326bSIntiyaz Basha * be sure that when we update the credits the 7154b6e326bSIntiyaz Basha * data in memory is accurate. 716f21fb3edSRaghu Vatsavayi */ 717f21fb3edSRaghu Vatsavayi wmb(); 7184b6e326bSIntiyaz Basha writel(desc_refilled, droq->pkts_credit_reg); 719f21fb3edSRaghu Vatsavayi /* make sure mmio write completes */ 720f21fb3edSRaghu Vatsavayi mmiowb(); 721f21fb3edSRaghu Vatsavayi } 7224b6e326bSIntiyaz Basha } 723f21fb3edSRaghu Vatsavayi } /* for (each packet)... */ 724f21fb3edSRaghu Vatsavayi 725f21fb3edSRaghu Vatsavayi /* Increment refill_count by the number of buffers processed. */ 726f21fb3edSRaghu Vatsavayi droq->stats.pkts_received += pkt; 727f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += total_len; 728f21fb3edSRaghu Vatsavayi 7294b6e326bSIntiyaz Basha retval = pkt; 730f21fb3edSRaghu Vatsavayi if ((droq->ops.drop_on_max) && (pkts_to_process - pkt)) { 731f21fb3edSRaghu Vatsavayi octeon_droq_drop_packets(oct, droq, (pkts_to_process - pkt)); 732f21fb3edSRaghu Vatsavayi 733f21fb3edSRaghu Vatsavayi droq->stats.dropped_toomany += (pkts_to_process - pkt); 7344b6e326bSIntiyaz Basha retval = pkts_to_process; 735f21fb3edSRaghu Vatsavayi } 736f21fb3edSRaghu Vatsavayi 7374b6e326bSIntiyaz Basha atomic_sub(retval, &droq->pkts_pending); 7384b6e326bSIntiyaz Basha 7394b6e326bSIntiyaz Basha if (droq->refill_count >= droq->refill_threshold && 7404b6e326bSIntiyaz Basha readl(droq->pkts_credit_reg) < CN23XX_SLI_DEF_BP) { 7414b6e326bSIntiyaz Basha octeon_droq_check_hw_for_pkts(droq); 7424b6e326bSIntiyaz Basha 7434b6e326bSIntiyaz Basha /* Make sure there are no pkts_pending */ 7444b6e326bSIntiyaz Basha if (!atomic_read(&droq->pkts_pending)) 7454b6e326bSIntiyaz Basha octeon_schedule_rxq_oom_work(oct, droq); 7464b6e326bSIntiyaz Basha } 7474b6e326bSIntiyaz Basha 7484b6e326bSIntiyaz Basha return retval; 749f21fb3edSRaghu Vatsavayi } 750f21fb3edSRaghu Vatsavayi 751f21fb3edSRaghu Vatsavayi int 752f21fb3edSRaghu Vatsavayi octeon_droq_process_packets(struct octeon_device *oct, 753f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, 754f21fb3edSRaghu Vatsavayi u32 budget) 755f21fb3edSRaghu Vatsavayi { 7564b6e326bSIntiyaz Basha u32 pkt_count = 0; 757f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 758f21fb3edSRaghu Vatsavayi 759cd8b1eb4SRaghu Vatsavayi /* Grab the droq lock */ 760cd8b1eb4SRaghu Vatsavayi spin_lock(&droq->lock); 761cd8b1eb4SRaghu Vatsavayi 762cd8b1eb4SRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq); 763f21fb3edSRaghu Vatsavayi pkt_count = atomic_read(&droq->pkts_pending); 764cd8b1eb4SRaghu Vatsavayi 765cd8b1eb4SRaghu Vatsavayi if (!pkt_count) { 766cd8b1eb4SRaghu Vatsavayi spin_unlock(&droq->lock); 767f21fb3edSRaghu Vatsavayi return 0; 768cd8b1eb4SRaghu Vatsavayi } 769f21fb3edSRaghu Vatsavayi 770f21fb3edSRaghu Vatsavayi if (pkt_count > budget) 771f21fb3edSRaghu Vatsavayi pkt_count = budget; 772f21fb3edSRaghu Vatsavayi 7734b6e326bSIntiyaz Basha octeon_droq_fast_process_packets(oct, droq, pkt_count); 774f21fb3edSRaghu Vatsavayi 775f21fb3edSRaghu Vatsavayi /* Release the spin lock */ 776f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 777f21fb3edSRaghu Vatsavayi 778f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 779f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 780f21fb3edSRaghu Vatsavayi 781f21fb3edSRaghu Vatsavayi list_del(tmp); 782f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 783f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 784f21fb3edSRaghu Vatsavayi (oct, 785f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 786f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 787f21fb3edSRaghu Vatsavayi } 788f21fb3edSRaghu Vatsavayi 789f21fb3edSRaghu Vatsavayi /* If there are packets pending. schedule tasklet again */ 790f21fb3edSRaghu Vatsavayi if (atomic_read(&droq->pkts_pending)) 791f21fb3edSRaghu Vatsavayi return 1; 792f21fb3edSRaghu Vatsavayi 793f21fb3edSRaghu Vatsavayi return 0; 794f21fb3edSRaghu Vatsavayi } 795f21fb3edSRaghu Vatsavayi 796f21fb3edSRaghu Vatsavayi /** 797f21fb3edSRaghu Vatsavayi * Utility function to poll for packets. check_hw_for_packets must be 798f21fb3edSRaghu Vatsavayi * called before calling this routine. 799f21fb3edSRaghu Vatsavayi */ 800f21fb3edSRaghu Vatsavayi 8015eb297a9SIntiyaz Basha int 802f21fb3edSRaghu Vatsavayi octeon_droq_process_poll_pkts(struct octeon_device *oct, 803f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, u32 budget) 804f21fb3edSRaghu Vatsavayi { 805f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2; 806f21fb3edSRaghu Vatsavayi u32 pkts_available = 0, pkts_processed = 0; 807f21fb3edSRaghu Vatsavayi u32 total_pkts_processed = 0; 808f21fb3edSRaghu Vatsavayi 809f21fb3edSRaghu Vatsavayi if (budget > droq->max_count) 810f21fb3edSRaghu Vatsavayi budget = droq->max_count; 811f21fb3edSRaghu Vatsavayi 812f21fb3edSRaghu Vatsavayi spin_lock(&droq->lock); 813f21fb3edSRaghu Vatsavayi 814f21fb3edSRaghu Vatsavayi while (total_pkts_processed < budget) { 815cd8b1eb4SRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq); 816cd8b1eb4SRaghu Vatsavayi 81797a25326SRaghu Vatsavayi pkts_available = min((budget - total_pkts_processed), 818f21fb3edSRaghu Vatsavayi (u32)(atomic_read(&droq->pkts_pending))); 819f21fb3edSRaghu Vatsavayi 820f21fb3edSRaghu Vatsavayi if (pkts_available == 0) 821f21fb3edSRaghu Vatsavayi break; 822f21fb3edSRaghu Vatsavayi 823f21fb3edSRaghu Vatsavayi pkts_processed = 824f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(oct, droq, 825f21fb3edSRaghu Vatsavayi pkts_available); 826f21fb3edSRaghu Vatsavayi 827f21fb3edSRaghu Vatsavayi total_pkts_processed += pkts_processed; 828f21fb3edSRaghu Vatsavayi } 829f21fb3edSRaghu Vatsavayi 830f21fb3edSRaghu Vatsavayi spin_unlock(&droq->lock); 831f21fb3edSRaghu Vatsavayi 832f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) { 833f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp; 834f21fb3edSRaghu Vatsavayi 835f21fb3edSRaghu Vatsavayi list_del(tmp); 836f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo, 837f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg 838f21fb3edSRaghu Vatsavayi (oct, 839f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode, 840f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode)); 841f21fb3edSRaghu Vatsavayi } 842f21fb3edSRaghu Vatsavayi 843f21fb3edSRaghu Vatsavayi return total_pkts_processed; 844f21fb3edSRaghu Vatsavayi } 845f21fb3edSRaghu Vatsavayi 846f21fb3edSRaghu Vatsavayi /* Enable Pkt Interrupt */ 8475eb297a9SIntiyaz Basha int 8485eb297a9SIntiyaz Basha octeon_enable_irq(struct octeon_device *oct, u32 q_no) 8495eb297a9SIntiyaz Basha { 850f21fb3edSRaghu Vatsavayi switch (oct->chip_id) { 851f21fb3edSRaghu Vatsavayi case OCTEON_CN66XX: 852f21fb3edSRaghu Vatsavayi case OCTEON_CN68XX: { 853f21fb3edSRaghu Vatsavayi struct octeon_cn6xxx *cn6xxx = 854f21fb3edSRaghu Vatsavayi (struct octeon_cn6xxx *)oct->chip; 8555eb297a9SIntiyaz Basha unsigned long flags; 8565eb297a9SIntiyaz Basha u32 value; 8575eb297a9SIntiyaz Basha 858f21fb3edSRaghu Vatsavayi spin_lock_irqsave 859f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 8605eb297a9SIntiyaz Basha value = octeon_read_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB); 861f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 8625eb297a9SIntiyaz Basha octeon_write_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB, value); 8635eb297a9SIntiyaz Basha value = octeon_read_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB); 864f21fb3edSRaghu Vatsavayi value |= (1 << q_no); 8655eb297a9SIntiyaz Basha octeon_write_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB, value); 866f21fb3edSRaghu Vatsavayi 867f21fb3edSRaghu Vatsavayi /* don't bother flushing the enables */ 868f21fb3edSRaghu Vatsavayi 869f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore 870f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags); 871f21fb3edSRaghu Vatsavayi } 872f21fb3edSRaghu Vatsavayi break; 8735eb297a9SIntiyaz Basha case OCTEON_CN23XX_PF_VID: 8749ded1a51SRaghu Vatsavayi lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]); 8759ded1a51SRaghu Vatsavayi break; 8769217c3cfSRaghu Vatsavayi 8779217c3cfSRaghu Vatsavayi case OCTEON_CN23XX_VF_VID: 8789217c3cfSRaghu Vatsavayi lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]); 8799217c3cfSRaghu Vatsavayi break; 8805eb297a9SIntiyaz Basha default: 8815eb297a9SIntiyaz Basha dev_err(&oct->pci_dev->dev, "%s Unknown Chip\n", __func__); 8825eb297a9SIntiyaz Basha return 1; 883f21fb3edSRaghu Vatsavayi } 884f21fb3edSRaghu Vatsavayi 8855eb297a9SIntiyaz Basha return 0; 886f21fb3edSRaghu Vatsavayi } 887f21fb3edSRaghu Vatsavayi 888f21fb3edSRaghu Vatsavayi int octeon_register_droq_ops(struct octeon_device *oct, u32 q_no, 889f21fb3edSRaghu Vatsavayi struct octeon_droq_ops *ops) 890f21fb3edSRaghu Vatsavayi { 891f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 892f21fb3edSRaghu Vatsavayi unsigned long flags; 893f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 894f21fb3edSRaghu Vatsavayi 895f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 896f21fb3edSRaghu Vatsavayi 897f21fb3edSRaghu Vatsavayi if (!oct_cfg) 898f21fb3edSRaghu Vatsavayi return -EINVAL; 899f21fb3edSRaghu Vatsavayi 900f21fb3edSRaghu Vatsavayi if (!(ops)) { 901f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq_ops pointer is NULL\n", 902f21fb3edSRaghu Vatsavayi __func__); 903f21fb3edSRaghu Vatsavayi return -EINVAL; 904f21fb3edSRaghu Vatsavayi } 905f21fb3edSRaghu Vatsavayi 906f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 907f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 908f21fb3edSRaghu Vatsavayi __func__, q_no, (oct->num_oqs - 1)); 909f21fb3edSRaghu Vatsavayi return -EINVAL; 910f21fb3edSRaghu Vatsavayi } 911f21fb3edSRaghu Vatsavayi 912f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 913f21fb3edSRaghu Vatsavayi 914f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 915f21fb3edSRaghu Vatsavayi 916f21fb3edSRaghu Vatsavayi memcpy(&droq->ops, ops, sizeof(struct octeon_droq_ops)); 917f21fb3edSRaghu Vatsavayi 918f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 919f21fb3edSRaghu Vatsavayi 920f21fb3edSRaghu Vatsavayi return 0; 921f21fb3edSRaghu Vatsavayi } 922f21fb3edSRaghu Vatsavayi 923f21fb3edSRaghu Vatsavayi int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no) 924f21fb3edSRaghu Vatsavayi { 925f21fb3edSRaghu Vatsavayi unsigned long flags; 926f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 927f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL; 928f21fb3edSRaghu Vatsavayi 929f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct); 930f21fb3edSRaghu Vatsavayi 931f21fb3edSRaghu Vatsavayi if (!oct_cfg) 932f21fb3edSRaghu Vatsavayi return -EINVAL; 933f21fb3edSRaghu Vatsavayi 934f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) { 935f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n", 936f21fb3edSRaghu Vatsavayi __func__, q_no, oct->num_oqs - 1); 937f21fb3edSRaghu Vatsavayi return -EINVAL; 938f21fb3edSRaghu Vatsavayi } 939f21fb3edSRaghu Vatsavayi 940f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no]; 941f21fb3edSRaghu Vatsavayi 942f21fb3edSRaghu Vatsavayi if (!droq) { 943f21fb3edSRaghu Vatsavayi dev_info(&oct->pci_dev->dev, 944f21fb3edSRaghu Vatsavayi "Droq id (%d) not available.\n", q_no); 945f21fb3edSRaghu Vatsavayi return 0; 946f21fb3edSRaghu Vatsavayi } 947f21fb3edSRaghu Vatsavayi 948f21fb3edSRaghu Vatsavayi spin_lock_irqsave(&droq->lock, flags); 949f21fb3edSRaghu Vatsavayi 950f21fb3edSRaghu Vatsavayi droq->ops.fptr = NULL; 9510cece6c5SRaghu Vatsavayi droq->ops.farg = NULL; 952f21fb3edSRaghu Vatsavayi droq->ops.drop_on_max = 0; 953f21fb3edSRaghu Vatsavayi 954f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore(&droq->lock, flags); 955f21fb3edSRaghu Vatsavayi 956f21fb3edSRaghu Vatsavayi return 0; 957f21fb3edSRaghu Vatsavayi } 958f21fb3edSRaghu Vatsavayi 959f21fb3edSRaghu Vatsavayi int octeon_create_droq(struct octeon_device *oct, 960f21fb3edSRaghu Vatsavayi u32 q_no, u32 num_descs, 961f21fb3edSRaghu Vatsavayi u32 desc_size, void *app_ctx) 962f21fb3edSRaghu Vatsavayi { 963f21fb3edSRaghu Vatsavayi struct octeon_droq *droq; 964b3ca9af0SVSR Burru int numa_node = dev_to_node(&oct->pci_dev->dev); 965f21fb3edSRaghu Vatsavayi 966f21fb3edSRaghu Vatsavayi if (oct->droq[q_no]) { 967f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "Droq already in use. Cannot create droq %d again\n", 968f21fb3edSRaghu Vatsavayi q_no); 969f21fb3edSRaghu Vatsavayi return 1; 970f21fb3edSRaghu Vatsavayi } 971f21fb3edSRaghu Vatsavayi 972f21fb3edSRaghu Vatsavayi /* Allocate the DS for the new droq. */ 97396ae48b7SRaghu Vatsavayi droq = vmalloc_node(sizeof(*droq), numa_node); 97496ae48b7SRaghu Vatsavayi if (!droq) 975f21fb3edSRaghu Vatsavayi droq = vmalloc(sizeof(*droq)); 976f21fb3edSRaghu Vatsavayi if (!droq) 977515e752dSRaghu Vatsavayi return -1; 978515e752dSRaghu Vatsavayi 979f21fb3edSRaghu Vatsavayi memset(droq, 0, sizeof(struct octeon_droq)); 980f21fb3edSRaghu Vatsavayi 981f21fb3edSRaghu Vatsavayi /*Disable the pkt o/p for this Q */ 982f21fb3edSRaghu Vatsavayi octeon_set_droq_pkt_op(oct, q_no, 0); 983f21fb3edSRaghu Vatsavayi oct->droq[q_no] = droq; 984f21fb3edSRaghu Vatsavayi 985f21fb3edSRaghu Vatsavayi /* Initialize the Droq */ 986515e752dSRaghu Vatsavayi if (octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx)) { 987515e752dSRaghu Vatsavayi vfree(oct->droq[q_no]); 988515e752dSRaghu Vatsavayi oct->droq[q_no] = NULL; 989515e752dSRaghu Vatsavayi return -1; 990515e752dSRaghu Vatsavayi } 991f21fb3edSRaghu Vatsavayi 992f21fb3edSRaghu Vatsavayi oct->num_oqs++; 993f21fb3edSRaghu Vatsavayi 994f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s: Total number of OQ: %d\n", __func__, 995f21fb3edSRaghu Vatsavayi oct->num_oqs); 996f21fb3edSRaghu Vatsavayi 997f21fb3edSRaghu Vatsavayi /* Global Droq register settings */ 998f21fb3edSRaghu Vatsavayi 999f21fb3edSRaghu Vatsavayi /* As of now not required, as setting are done for all 32 Droqs at 1000f21fb3edSRaghu Vatsavayi * the same time. 1001f21fb3edSRaghu Vatsavayi */ 1002f21fb3edSRaghu Vatsavayi return 0; 1003f21fb3edSRaghu Vatsavayi } 1004