1f21fb3edSRaghu Vatsavayi /**********************************************************************
2f21fb3edSRaghu Vatsavayi * Author: Cavium, Inc.
3f21fb3edSRaghu Vatsavayi *
4f21fb3edSRaghu Vatsavayi * Contact: support@cavium.com
5f21fb3edSRaghu Vatsavayi * Please include "LiquidIO" in the subject.
6f21fb3edSRaghu Vatsavayi *
750579d3dSRaghu Vatsavayi * Copyright (c) 2003-2016 Cavium, Inc.
8f21fb3edSRaghu Vatsavayi *
9f21fb3edSRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify
10f21fb3edSRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as
11f21fb3edSRaghu Vatsavayi * published by the Free Software Foundation.
12f21fb3edSRaghu Vatsavayi *
13f21fb3edSRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but
14f21fb3edSRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15f21fb3edSRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
1650579d3dSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more details.
1750579d3dSRaghu Vatsavayi ***********************************************************************/
18f21fb3edSRaghu Vatsavayi #include <linux/pci.h>
19f21fb3edSRaghu Vatsavayi #include <linux/netdevice.h>
205b173cf9SRaghu Vatsavayi #include <linux/vmalloc.h>
21f21fb3edSRaghu Vatsavayi #include "liquidio_common.h"
22f21fb3edSRaghu Vatsavayi #include "octeon_droq.h"
23f21fb3edSRaghu Vatsavayi #include "octeon_iq.h"
24f21fb3edSRaghu Vatsavayi #include "response_manager.h"
25f21fb3edSRaghu Vatsavayi #include "octeon_device.h"
26f21fb3edSRaghu Vatsavayi #include "octeon_main.h"
27f21fb3edSRaghu Vatsavayi #include "octeon_network.h"
28f21fb3edSRaghu Vatsavayi #include "cn66xx_regs.h"
29f21fb3edSRaghu Vatsavayi #include "cn66xx_device.h"
305b823514SRaghu Vatsavayi #include "cn23xx_pf_device.h"
319217c3cfSRaghu Vatsavayi #include "cn23xx_vf_device.h"
32f21fb3edSRaghu Vatsavayi
33f21fb3edSRaghu Vatsavayi struct niclist {
34f21fb3edSRaghu Vatsavayi struct list_head list;
35f21fb3edSRaghu Vatsavayi void *ptr;
36f21fb3edSRaghu Vatsavayi };
37f21fb3edSRaghu Vatsavayi
38f21fb3edSRaghu Vatsavayi struct __dispatch {
39f21fb3edSRaghu Vatsavayi struct list_head list;
40f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo;
41f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn;
42f21fb3edSRaghu Vatsavayi };
43f21fb3edSRaghu Vatsavayi
44f21fb3edSRaghu Vatsavayi /** Get the argument that the user set when registering dispatch
45f21fb3edSRaghu Vatsavayi * function for a given opcode/subcode.
46f21fb3edSRaghu Vatsavayi * @param octeon_dev - the octeon device pointer.
47f21fb3edSRaghu Vatsavayi * @param opcode - the opcode for which the dispatch argument
48f21fb3edSRaghu Vatsavayi * is to be checked.
49f21fb3edSRaghu Vatsavayi * @param subcode - the subcode for which the dispatch argument
50f21fb3edSRaghu Vatsavayi * is to be checked.
51f21fb3edSRaghu Vatsavayi * @return Success: void * (argument to the dispatch function)
52f21fb3edSRaghu Vatsavayi * @return Failure: NULL
53f21fb3edSRaghu Vatsavayi *
54f21fb3edSRaghu Vatsavayi */
octeon_get_dispatch_arg(struct octeon_device * octeon_dev,u16 opcode,u16 subcode)55bf534588SVijaya Mohan Guvva void *octeon_get_dispatch_arg(struct octeon_device *octeon_dev,
56f21fb3edSRaghu Vatsavayi u16 opcode, u16 subcode)
57f21fb3edSRaghu Vatsavayi {
58f21fb3edSRaghu Vatsavayi int idx;
59f21fb3edSRaghu Vatsavayi struct list_head *dispatch;
60f21fb3edSRaghu Vatsavayi void *fn_arg = NULL;
61f21fb3edSRaghu Vatsavayi u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode);
62f21fb3edSRaghu Vatsavayi
63f21fb3edSRaghu Vatsavayi idx = combined_opcode & OCTEON_OPCODE_MASK;
64f21fb3edSRaghu Vatsavayi
65f21fb3edSRaghu Vatsavayi spin_lock_bh(&octeon_dev->dispatch.lock);
66f21fb3edSRaghu Vatsavayi
67f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.count == 0) {
68f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock);
69f21fb3edSRaghu Vatsavayi return NULL;
70f21fb3edSRaghu Vatsavayi }
71f21fb3edSRaghu Vatsavayi
72f21fb3edSRaghu Vatsavayi if (octeon_dev->dispatch.dlist[idx].opcode == combined_opcode) {
73f21fb3edSRaghu Vatsavayi fn_arg = octeon_dev->dispatch.dlist[idx].arg;
74f21fb3edSRaghu Vatsavayi } else {
75f21fb3edSRaghu Vatsavayi list_for_each(dispatch,
76f21fb3edSRaghu Vatsavayi &octeon_dev->dispatch.dlist[idx].list) {
77f21fb3edSRaghu Vatsavayi if (((struct octeon_dispatch *)dispatch)->opcode ==
78f21fb3edSRaghu Vatsavayi combined_opcode) {
79f21fb3edSRaghu Vatsavayi fn_arg = ((struct octeon_dispatch *)
80f21fb3edSRaghu Vatsavayi dispatch)->arg;
81f21fb3edSRaghu Vatsavayi break;
82f21fb3edSRaghu Vatsavayi }
83f21fb3edSRaghu Vatsavayi }
84f21fb3edSRaghu Vatsavayi }
85f21fb3edSRaghu Vatsavayi
86f21fb3edSRaghu Vatsavayi spin_unlock_bh(&octeon_dev->dispatch.lock);
87f21fb3edSRaghu Vatsavayi return fn_arg;
88f21fb3edSRaghu Vatsavayi }
89f21fb3edSRaghu Vatsavayi
90cd8b1eb4SRaghu Vatsavayi /** Check for packets on Droq. This function should be called with lock held.
91a2c64b67SRaghu Vatsavayi * @param droq - Droq on which count is checked.
92a2c64b67SRaghu Vatsavayi * @return Returns packet count.
93a2c64b67SRaghu Vatsavayi */
octeon_droq_check_hw_for_pkts(struct octeon_droq * droq)94a7d5a3dcSRaghu Vatsavayi u32 octeon_droq_check_hw_for_pkts(struct octeon_droq *droq)
95f21fb3edSRaghu Vatsavayi {
96f21fb3edSRaghu Vatsavayi u32 pkt_count = 0;
97cd8b1eb4SRaghu Vatsavayi u32 last_count;
98f21fb3edSRaghu Vatsavayi
99f21fb3edSRaghu Vatsavayi pkt_count = readl(droq->pkts_sent_reg);
100f21fb3edSRaghu Vatsavayi
101cd8b1eb4SRaghu Vatsavayi last_count = pkt_count - droq->pkt_count;
102cd8b1eb4SRaghu Vatsavayi droq->pkt_count = pkt_count;
103cd8b1eb4SRaghu Vatsavayi
104cd8b1eb4SRaghu Vatsavayi /* we shall write to cnts at napi irq enable or end of droq tasklet */
105cd8b1eb4SRaghu Vatsavayi if (last_count)
106cd8b1eb4SRaghu Vatsavayi atomic_add(last_count, &droq->pkts_pending);
107cd8b1eb4SRaghu Vatsavayi
108cd8b1eb4SRaghu Vatsavayi return last_count;
109f21fb3edSRaghu Vatsavayi }
110*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(octeon_droq_check_hw_for_pkts);
111f21fb3edSRaghu Vatsavayi
octeon_droq_compute_max_packet_bufs(struct octeon_droq * droq)112f21fb3edSRaghu Vatsavayi static void octeon_droq_compute_max_packet_bufs(struct octeon_droq *droq)
113f21fb3edSRaghu Vatsavayi {
114f21fb3edSRaghu Vatsavayi u32 count = 0;
115f21fb3edSRaghu Vatsavayi
116f21fb3edSRaghu Vatsavayi /* max_empty_descs is the max. no. of descs that can have no buffers.
117f21fb3edSRaghu Vatsavayi * If the empty desc count goes beyond this value, we cannot safely
118f21fb3edSRaghu Vatsavayi * read in a 64K packet sent by Octeon
119f21fb3edSRaghu Vatsavayi * (64K is max pkt size from Octeon)
120f21fb3edSRaghu Vatsavayi */
121f21fb3edSRaghu Vatsavayi droq->max_empty_descs = 0;
122f21fb3edSRaghu Vatsavayi
123f21fb3edSRaghu Vatsavayi do {
124f21fb3edSRaghu Vatsavayi droq->max_empty_descs++;
125f21fb3edSRaghu Vatsavayi count += droq->buffer_size;
126f21fb3edSRaghu Vatsavayi } while (count < (64 * 1024));
127f21fb3edSRaghu Vatsavayi
128f21fb3edSRaghu Vatsavayi droq->max_empty_descs = droq->max_count - droq->max_empty_descs;
129f21fb3edSRaghu Vatsavayi }
130f21fb3edSRaghu Vatsavayi
octeon_droq_reset_indices(struct octeon_droq * droq)131f21fb3edSRaghu Vatsavayi static void octeon_droq_reset_indices(struct octeon_droq *droq)
132f21fb3edSRaghu Vatsavayi {
133f21fb3edSRaghu Vatsavayi droq->read_idx = 0;
134f21fb3edSRaghu Vatsavayi droq->write_idx = 0;
135f21fb3edSRaghu Vatsavayi droq->refill_idx = 0;
136f21fb3edSRaghu Vatsavayi droq->refill_count = 0;
137f21fb3edSRaghu Vatsavayi atomic_set(&droq->pkts_pending, 0);
138f21fb3edSRaghu Vatsavayi }
139f21fb3edSRaghu Vatsavayi
140f21fb3edSRaghu Vatsavayi static void
octeon_droq_destroy_ring_buffers(struct octeon_device * oct,struct octeon_droq * droq)141f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(struct octeon_device *oct,
142f21fb3edSRaghu Vatsavayi struct octeon_droq *droq)
143f21fb3edSRaghu Vatsavayi {
144f21fb3edSRaghu Vatsavayi u32 i;
145cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info;
146f21fb3edSRaghu Vatsavayi
147f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) {
148cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[i].pg_info;
149689062a1SRick Farrington if (!pg_info)
150689062a1SRick Farrington continue;
151cabeb13bSRaghu Vatsavayi
152cabeb13bSRaghu Vatsavayi if (pg_info->dma)
153cabeb13bSRaghu Vatsavayi lio_unmap_ring(oct->pci_dev,
154cabeb13bSRaghu Vatsavayi (u64)pg_info->dma);
155cabeb13bSRaghu Vatsavayi pg_info->dma = 0;
156cabeb13bSRaghu Vatsavayi
157cabeb13bSRaghu Vatsavayi if (pg_info->page)
158cabeb13bSRaghu Vatsavayi recv_buffer_destroy(droq->recv_buf_list[i].buffer,
159cabeb13bSRaghu Vatsavayi pg_info);
160cabeb13bSRaghu Vatsavayi
161f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = NULL;
162f21fb3edSRaghu Vatsavayi }
163f21fb3edSRaghu Vatsavayi
164f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq);
165f21fb3edSRaghu Vatsavayi }
166f21fb3edSRaghu Vatsavayi
167f21fb3edSRaghu Vatsavayi static int
octeon_droq_setup_ring_buffers(struct octeon_device * oct,struct octeon_droq * droq)168f21fb3edSRaghu Vatsavayi octeon_droq_setup_ring_buffers(struct octeon_device *oct,
169f21fb3edSRaghu Vatsavayi struct octeon_droq *droq)
170f21fb3edSRaghu Vatsavayi {
171f21fb3edSRaghu Vatsavayi u32 i;
172f21fb3edSRaghu Vatsavayi void *buf;
173f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring = droq->desc_ring;
174f21fb3edSRaghu Vatsavayi
175f21fb3edSRaghu Vatsavayi for (i = 0; i < droq->max_count; i++) {
176cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(oct, &droq->recv_buf_list[i].pg_info);
177f21fb3edSRaghu Vatsavayi
178f21fb3edSRaghu Vatsavayi if (!buf) {
179f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s buffer alloc failed\n",
180f21fb3edSRaghu Vatsavayi __func__);
181cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++;
182f21fb3edSRaghu Vatsavayi return -ENOMEM;
183f21fb3edSRaghu Vatsavayi }
184f21fb3edSRaghu Vatsavayi
185f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].buffer = buf;
186f21fb3edSRaghu Vatsavayi droq->recv_buf_list[i].data = get_rbd(buf);
187c4ee5d81SPrasad Kanneganti desc_ring[i].info_ptr = 0;
188f21fb3edSRaghu Vatsavayi desc_ring[i].buffer_ptr =
189cabeb13bSRaghu Vatsavayi lio_map_ring(droq->recv_buf_list[i].buffer);
190f21fb3edSRaghu Vatsavayi }
191f21fb3edSRaghu Vatsavayi
192f21fb3edSRaghu Vatsavayi octeon_droq_reset_indices(droq);
193f21fb3edSRaghu Vatsavayi
194f21fb3edSRaghu Vatsavayi octeon_droq_compute_max_packet_bufs(droq);
195f21fb3edSRaghu Vatsavayi
196f21fb3edSRaghu Vatsavayi return 0;
197f21fb3edSRaghu Vatsavayi }
198f21fb3edSRaghu Vatsavayi
octeon_delete_droq(struct octeon_device * oct,u32 q_no)199f21fb3edSRaghu Vatsavayi int octeon_delete_droq(struct octeon_device *oct, u32 q_no)
200f21fb3edSRaghu Vatsavayi {
201f21fb3edSRaghu Vatsavayi struct octeon_droq *droq = oct->droq[q_no];
202f21fb3edSRaghu Vatsavayi
203f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no);
204f21fb3edSRaghu Vatsavayi
205f21fb3edSRaghu Vatsavayi octeon_droq_destroy_ring_buffers(oct, droq);
206f21fb3edSRaghu Vatsavayi vfree(droq->recv_buf_list);
207f21fb3edSRaghu Vatsavayi
208f21fb3edSRaghu Vatsavayi if (droq->desc_ring)
209f21fb3edSRaghu Vatsavayi lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE),
210f21fb3edSRaghu Vatsavayi droq->desc_ring, droq->desc_ring_dma);
211f21fb3edSRaghu Vatsavayi
212f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE);
213c1550fdeSIntiyaz Basha oct->io_qmask.oq &= ~(1ULL << q_no);
214c1550fdeSIntiyaz Basha vfree(oct->droq[q_no]);
215c1550fdeSIntiyaz Basha oct->droq[q_no] = NULL;
216c1550fdeSIntiyaz Basha oct->num_oqs--;
217f21fb3edSRaghu Vatsavayi
218f21fb3edSRaghu Vatsavayi return 0;
219f21fb3edSRaghu Vatsavayi }
220*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(octeon_delete_droq);
221f21fb3edSRaghu Vatsavayi
octeon_init_droq(struct octeon_device * oct,u32 q_no,u32 num_descs,u32 desc_size,void * app_ctx)222f21fb3edSRaghu Vatsavayi int octeon_init_droq(struct octeon_device *oct,
223f21fb3edSRaghu Vatsavayi u32 q_no,
224f21fb3edSRaghu Vatsavayi u32 num_descs,
225f21fb3edSRaghu Vatsavayi u32 desc_size,
226f21fb3edSRaghu Vatsavayi void *app_ctx)
227f21fb3edSRaghu Vatsavayi {
228f21fb3edSRaghu Vatsavayi struct octeon_droq *droq;
229f21fb3edSRaghu Vatsavayi u32 desc_ring_size = 0, c_num_descs = 0, c_buf_size = 0;
230f21fb3edSRaghu Vatsavayi u32 c_pkts_per_intr = 0, c_refill_threshold = 0;
231b3ca9af0SVSR Burru int numa_node = dev_to_node(&oct->pci_dev->dev);
232f21fb3edSRaghu Vatsavayi
233f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no);
234f21fb3edSRaghu Vatsavayi
235f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no];
236f21fb3edSRaghu Vatsavayi memset(droq, 0, OCT_DROQ_SIZE);
237f21fb3edSRaghu Vatsavayi
238f21fb3edSRaghu Vatsavayi droq->oct_dev = oct;
239f21fb3edSRaghu Vatsavayi droq->q_no = q_no;
240f21fb3edSRaghu Vatsavayi if (app_ctx)
241f21fb3edSRaghu Vatsavayi droq->app_ctx = app_ctx;
242f21fb3edSRaghu Vatsavayi else
243f21fb3edSRaghu Vatsavayi droq->app_ctx = (void *)(size_t)q_no;
244f21fb3edSRaghu Vatsavayi
245f21fb3edSRaghu Vatsavayi c_num_descs = num_descs;
246f21fb3edSRaghu Vatsavayi c_buf_size = desc_size;
247f21fb3edSRaghu Vatsavayi if (OCTEON_CN6XXX(oct)) {
24897a25326SRaghu Vatsavayi struct octeon_config *conf6x = CHIP_CONF(oct, cn6xxx);
249f21fb3edSRaghu Vatsavayi
250f21fb3edSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf6x);
25196ae48b7SRaghu Vatsavayi c_refill_threshold =
25296ae48b7SRaghu Vatsavayi (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf6x);
2535b823514SRaghu Vatsavayi } else if (OCTEON_CN23XX_PF(oct)) {
25497a25326SRaghu Vatsavayi struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_pf);
2555b823514SRaghu Vatsavayi
2565b823514SRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23);
2575b823514SRaghu Vatsavayi c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23);
2589217c3cfSRaghu Vatsavayi } else if (OCTEON_CN23XX_VF(oct)) {
2599217c3cfSRaghu Vatsavayi struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_vf);
2609217c3cfSRaghu Vatsavayi
2619217c3cfSRaghu Vatsavayi c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23);
2629217c3cfSRaghu Vatsavayi c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23);
26396ae48b7SRaghu Vatsavayi } else {
26496ae48b7SRaghu Vatsavayi return 1;
265f21fb3edSRaghu Vatsavayi }
266f21fb3edSRaghu Vatsavayi
267f21fb3edSRaghu Vatsavayi droq->max_count = c_num_descs;
268f21fb3edSRaghu Vatsavayi droq->buffer_size = c_buf_size;
269f21fb3edSRaghu Vatsavayi
270f21fb3edSRaghu Vatsavayi desc_ring_size = droq->max_count * OCT_DROQ_DESC_SIZE;
271f21fb3edSRaghu Vatsavayi droq->desc_ring = lio_dma_alloc(oct, desc_ring_size,
272f21fb3edSRaghu Vatsavayi (dma_addr_t *)&droq->desc_ring_dma);
273f21fb3edSRaghu Vatsavayi
274f21fb3edSRaghu Vatsavayi if (!droq->desc_ring) {
275f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev,
276f21fb3edSRaghu Vatsavayi "Output queue %d ring alloc failed\n", q_no);
277f21fb3edSRaghu Vatsavayi return 1;
278f21fb3edSRaghu Vatsavayi }
279f21fb3edSRaghu Vatsavayi
280f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n",
281f21fb3edSRaghu Vatsavayi q_no, droq->desc_ring, droq->desc_ring_dma);
282f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "droq[%d]: num_desc: %d\n", q_no,
283f21fb3edSRaghu Vatsavayi droq->max_count);
284f21fb3edSRaghu Vatsavayi
2858aa639e1SYueHaibing droq->recv_buf_list = vzalloc_node(array_size(droq->max_count, OCT_DROQ_RECVBUF_SIZE),
28696ae48b7SRaghu Vatsavayi numa_node);
28796ae48b7SRaghu Vatsavayi if (!droq->recv_buf_list)
2888aa639e1SYueHaibing droq->recv_buf_list = vzalloc(array_size(droq->max_count, OCT_DROQ_RECVBUF_SIZE));
289f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list) {
290f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "Output queue recv buf list alloc failed\n");
291f21fb3edSRaghu Vatsavayi goto init_droq_fail;
292f21fb3edSRaghu Vatsavayi }
293f21fb3edSRaghu Vatsavayi
294f21fb3edSRaghu Vatsavayi if (octeon_droq_setup_ring_buffers(oct, droq))
295f21fb3edSRaghu Vatsavayi goto init_droq_fail;
296f21fb3edSRaghu Vatsavayi
297f21fb3edSRaghu Vatsavayi droq->pkts_per_intr = c_pkts_per_intr;
298f21fb3edSRaghu Vatsavayi droq->refill_threshold = c_refill_threshold;
299f21fb3edSRaghu Vatsavayi
300f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "DROQ INIT: max_empty_descs: %d\n",
301f21fb3edSRaghu Vatsavayi droq->max_empty_descs);
302f21fb3edSRaghu Vatsavayi
303f21fb3edSRaghu Vatsavayi INIT_LIST_HEAD(&droq->dispatch_list);
304f21fb3edSRaghu Vatsavayi
305f21fb3edSRaghu Vatsavayi /* For 56xx Pass1, this function won't be called, so no checks. */
306f21fb3edSRaghu Vatsavayi oct->fn_list.setup_oq_regs(oct, q_no);
307f21fb3edSRaghu Vatsavayi
308763185a3SRaghu Vatsavayi oct->io_qmask.oq |= BIT_ULL(q_no);
309f21fb3edSRaghu Vatsavayi
310f21fb3edSRaghu Vatsavayi return 0;
311f21fb3edSRaghu Vatsavayi
312f21fb3edSRaghu Vatsavayi init_droq_fail:
313f21fb3edSRaghu Vatsavayi octeon_delete_droq(oct, q_no);
314f21fb3edSRaghu Vatsavayi return 1;
315f21fb3edSRaghu Vatsavayi }
316f21fb3edSRaghu Vatsavayi
317f21fb3edSRaghu Vatsavayi /* octeon_create_recv_info
318f21fb3edSRaghu Vatsavayi * Parameters:
319f21fb3edSRaghu Vatsavayi * octeon_dev - pointer to the octeon device structure
320f21fb3edSRaghu Vatsavayi * droq - droq in which the packet arrived.
321f21fb3edSRaghu Vatsavayi * buf_cnt - no. of buffers used by the packet.
322f21fb3edSRaghu Vatsavayi * idx - index in the descriptor for the first buffer in the packet.
323f21fb3edSRaghu Vatsavayi * Description:
324f21fb3edSRaghu Vatsavayi * Allocates a recv_info_t and copies the buffer addresses for packet data
325f21fb3edSRaghu Vatsavayi * into the recv_pkt space which starts at an 8B offset from recv_info_t.
326f21fb3edSRaghu Vatsavayi * Flags the descriptors for refill later. If available descriptors go
327f21fb3edSRaghu Vatsavayi * below the threshold to receive a 64K pkt, new buffers are first allocated
328f21fb3edSRaghu Vatsavayi * before the recv_pkt_t is created.
329f21fb3edSRaghu Vatsavayi * This routine will be called in interrupt context.
330f21fb3edSRaghu Vatsavayi * Returns:
331f21fb3edSRaghu Vatsavayi * Success: Pointer to recv_info_t
332f21fb3edSRaghu Vatsavayi * Failure: NULL.
333f21fb3edSRaghu Vatsavayi */
octeon_create_recv_info(struct octeon_device * octeon_dev,struct octeon_droq * droq,u32 buf_cnt,u32 idx)334f21fb3edSRaghu Vatsavayi static inline struct octeon_recv_info *octeon_create_recv_info(
335f21fb3edSRaghu Vatsavayi struct octeon_device *octeon_dev,
336f21fb3edSRaghu Vatsavayi struct octeon_droq *droq,
337f21fb3edSRaghu Vatsavayi u32 buf_cnt,
338f21fb3edSRaghu Vatsavayi u32 idx)
339f21fb3edSRaghu Vatsavayi {
340f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info;
341f21fb3edSRaghu Vatsavayi struct octeon_recv_pkt *recv_pkt;
342f21fb3edSRaghu Vatsavayi struct octeon_recv_info *recv_info;
343f21fb3edSRaghu Vatsavayi u32 i, bytes_left;
344cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info;
345f21fb3edSRaghu Vatsavayi
346c4ee5d81SPrasad Kanneganti info = (struct octeon_droq_info *)droq->recv_buf_list[idx].data;
347f21fb3edSRaghu Vatsavayi
348f21fb3edSRaghu Vatsavayi recv_info = octeon_alloc_recv_info(sizeof(struct __dispatch));
349f21fb3edSRaghu Vatsavayi if (!recv_info)
350f21fb3edSRaghu Vatsavayi return NULL;
351f21fb3edSRaghu Vatsavayi
352f21fb3edSRaghu Vatsavayi recv_pkt = recv_info->recv_pkt;
353f21fb3edSRaghu Vatsavayi recv_pkt->rh = info->rh;
354f21fb3edSRaghu Vatsavayi recv_pkt->length = (u32)info->length;
355f21fb3edSRaghu Vatsavayi recv_pkt->buffer_count = (u16)buf_cnt;
356f21fb3edSRaghu Vatsavayi recv_pkt->octeon_id = (u16)octeon_dev->octeon_id;
357f21fb3edSRaghu Vatsavayi
358f21fb3edSRaghu Vatsavayi i = 0;
359f21fb3edSRaghu Vatsavayi bytes_left = (u32)info->length;
360f21fb3edSRaghu Vatsavayi
361f21fb3edSRaghu Vatsavayi while (buf_cnt) {
362cabeb13bSRaghu Vatsavayi {
363cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[idx].pg_info;
364cabeb13bSRaghu Vatsavayi
365f21fb3edSRaghu Vatsavayi lio_unmap_ring(octeon_dev->pci_dev,
366cabeb13bSRaghu Vatsavayi (u64)pg_info->dma);
367cabeb13bSRaghu Vatsavayi pg_info->page = NULL;
368cabeb13bSRaghu Vatsavayi pg_info->dma = 0;
369cabeb13bSRaghu Vatsavayi }
370f21fb3edSRaghu Vatsavayi
371f21fb3edSRaghu Vatsavayi recv_pkt->buffer_size[i] =
372f21fb3edSRaghu Vatsavayi (bytes_left >=
373f21fb3edSRaghu Vatsavayi droq->buffer_size) ? droq->buffer_size : bytes_left;
374f21fb3edSRaghu Vatsavayi
375f21fb3edSRaghu Vatsavayi recv_pkt->buffer_ptr[i] = droq->recv_buf_list[idx].buffer;
376f21fb3edSRaghu Vatsavayi droq->recv_buf_list[idx].buffer = NULL;
377f21fb3edSRaghu Vatsavayi
37897a25326SRaghu Vatsavayi idx = incr_index(idx, 1, droq->max_count);
379f21fb3edSRaghu Vatsavayi bytes_left -= droq->buffer_size;
380f21fb3edSRaghu Vatsavayi i++;
381f21fb3edSRaghu Vatsavayi buf_cnt--;
382f21fb3edSRaghu Vatsavayi }
383f21fb3edSRaghu Vatsavayi
384f21fb3edSRaghu Vatsavayi return recv_info;
385f21fb3edSRaghu Vatsavayi }
386f21fb3edSRaghu Vatsavayi
387f21fb3edSRaghu Vatsavayi /* If we were not able to refill all buffers, try to move around
388f21fb3edSRaghu Vatsavayi * the buffers that were not dispatched.
389f21fb3edSRaghu Vatsavayi */
390f21fb3edSRaghu Vatsavayi static inline u32
octeon_droq_refill_pullup_descs(struct octeon_droq * droq,struct octeon_droq_desc * desc_ring)391f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(struct octeon_droq *droq,
392f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring)
393f21fb3edSRaghu Vatsavayi {
394f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0;
395f21fb3edSRaghu Vatsavayi
396f21fb3edSRaghu Vatsavayi u32 refill_index = droq->refill_idx;
397f21fb3edSRaghu Vatsavayi
398f21fb3edSRaghu Vatsavayi while (refill_index != droq->read_idx) {
399f21fb3edSRaghu Vatsavayi if (droq->recv_buf_list[refill_index].buffer) {
400f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer =
401f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer;
402f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data =
403f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].data;
404f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr =
405f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr;
406f21fb3edSRaghu Vatsavayi droq->recv_buf_list[refill_index].buffer = NULL;
407f21fb3edSRaghu Vatsavayi desc_ring[refill_index].buffer_ptr = 0;
408f21fb3edSRaghu Vatsavayi do {
40997a25326SRaghu Vatsavayi droq->refill_idx = incr_index(droq->refill_idx,
41097a25326SRaghu Vatsavayi 1,
411f21fb3edSRaghu Vatsavayi droq->max_count);
412f21fb3edSRaghu Vatsavayi desc_refilled++;
413f21fb3edSRaghu Vatsavayi droq->refill_count--;
4149ae122c6SSatanand Burla } while (droq->recv_buf_list[droq->refill_idx].buffer);
415f21fb3edSRaghu Vatsavayi }
41697a25326SRaghu Vatsavayi refill_index = incr_index(refill_index, 1, droq->max_count);
417f21fb3edSRaghu Vatsavayi } /* while */
418f21fb3edSRaghu Vatsavayi return desc_refilled;
419f21fb3edSRaghu Vatsavayi }
420f21fb3edSRaghu Vatsavayi
421f21fb3edSRaghu Vatsavayi /* octeon_droq_refill
422f21fb3edSRaghu Vatsavayi * Parameters:
423f21fb3edSRaghu Vatsavayi * droq - droq in which descriptors require new buffers.
424f21fb3edSRaghu Vatsavayi * Description:
425f21fb3edSRaghu Vatsavayi * Called during normal DROQ processing in interrupt mode or by the poll
426f21fb3edSRaghu Vatsavayi * thread to refill the descriptors from which buffers were dispatched
427f21fb3edSRaghu Vatsavayi * to upper layers. Attempts to allocate new buffers. If that fails, moves
428f21fb3edSRaghu Vatsavayi * up buffers (that were not dispatched) to form a contiguous ring.
429f21fb3edSRaghu Vatsavayi * Returns:
430f21fb3edSRaghu Vatsavayi * No of descriptors refilled.
431f21fb3edSRaghu Vatsavayi */
432f21fb3edSRaghu Vatsavayi static u32
octeon_droq_refill(struct octeon_device * octeon_dev,struct octeon_droq * droq)433f21fb3edSRaghu Vatsavayi octeon_droq_refill(struct octeon_device *octeon_dev, struct octeon_droq *droq)
434f21fb3edSRaghu Vatsavayi {
435f21fb3edSRaghu Vatsavayi struct octeon_droq_desc *desc_ring;
436f21fb3edSRaghu Vatsavayi void *buf = NULL;
437f21fb3edSRaghu Vatsavayi u8 *data;
438f21fb3edSRaghu Vatsavayi u32 desc_refilled = 0;
439cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info;
440f21fb3edSRaghu Vatsavayi
441f21fb3edSRaghu Vatsavayi desc_ring = droq->desc_ring;
442f21fb3edSRaghu Vatsavayi
443f21fb3edSRaghu Vatsavayi while (droq->refill_count && (desc_refilled < droq->max_count)) {
444f21fb3edSRaghu Vatsavayi /* If a valid buffer exists (happens if there is no dispatch),
4454b6e326bSIntiyaz Basha * reuse the buffer, else allocate.
446f21fb3edSRaghu Vatsavayi */
447f21fb3edSRaghu Vatsavayi if (!droq->recv_buf_list[droq->refill_idx].buffer) {
448cabeb13bSRaghu Vatsavayi pg_info =
449cabeb13bSRaghu Vatsavayi &droq->recv_buf_list[droq->refill_idx].pg_info;
450cabeb13bSRaghu Vatsavayi /* Either recycle the existing pages or go for
451cabeb13bSRaghu Vatsavayi * new page alloc
452cabeb13bSRaghu Vatsavayi */
453cabeb13bSRaghu Vatsavayi if (pg_info->page)
454cabeb13bSRaghu Vatsavayi buf = recv_buffer_reuse(octeon_dev, pg_info);
455cabeb13bSRaghu Vatsavayi else
456cabeb13bSRaghu Vatsavayi buf = recv_buffer_alloc(octeon_dev, pg_info);
457f21fb3edSRaghu Vatsavayi /* If a buffer could not be allocated, no point in
458f21fb3edSRaghu Vatsavayi * continuing
459f21fb3edSRaghu Vatsavayi */
460cabeb13bSRaghu Vatsavayi if (!buf) {
461cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++;
462f21fb3edSRaghu Vatsavayi break;
463cabeb13bSRaghu Vatsavayi }
464f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].buffer =
465f21fb3edSRaghu Vatsavayi buf;
466f21fb3edSRaghu Vatsavayi data = get_rbd(buf);
467f21fb3edSRaghu Vatsavayi } else {
468f21fb3edSRaghu Vatsavayi data = get_rbd(droq->recv_buf_list
469f21fb3edSRaghu Vatsavayi [droq->refill_idx].buffer);
470f21fb3edSRaghu Vatsavayi }
471f21fb3edSRaghu Vatsavayi
472f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->refill_idx].data = data;
473f21fb3edSRaghu Vatsavayi
474f21fb3edSRaghu Vatsavayi desc_ring[droq->refill_idx].buffer_ptr =
4759ae122c6SSatanand Burla lio_map_ring(droq->recv_buf_list[
4769ae122c6SSatanand Burla droq->refill_idx].buffer);
477f21fb3edSRaghu Vatsavayi
47897a25326SRaghu Vatsavayi droq->refill_idx = incr_index(droq->refill_idx, 1,
47997a25326SRaghu Vatsavayi droq->max_count);
480f21fb3edSRaghu Vatsavayi desc_refilled++;
481f21fb3edSRaghu Vatsavayi droq->refill_count--;
482f21fb3edSRaghu Vatsavayi }
483f21fb3edSRaghu Vatsavayi
484f21fb3edSRaghu Vatsavayi if (droq->refill_count)
485f21fb3edSRaghu Vatsavayi desc_refilled +=
486f21fb3edSRaghu Vatsavayi octeon_droq_refill_pullup_descs(droq, desc_ring);
487f21fb3edSRaghu Vatsavayi
488f21fb3edSRaghu Vatsavayi /* if droq->refill_count
489f21fb3edSRaghu Vatsavayi * The refill count would not change in pass two. We only moved buffers
490f21fb3edSRaghu Vatsavayi * to close the gap in the ring, but we would still have the same no. of
491f21fb3edSRaghu Vatsavayi * buffers to refill.
492f21fb3edSRaghu Vatsavayi */
493f21fb3edSRaghu Vatsavayi return desc_refilled;
494f21fb3edSRaghu Vatsavayi }
495f21fb3edSRaghu Vatsavayi
496031d4f12SSatanand Burla /** check if we can allocate packets to get out of oom.
497031d4f12SSatanand Burla * @param droq - Droq being checked.
4984b6e326bSIntiyaz Basha * @return 1 if fails to refill minimum
499031d4f12SSatanand Burla */
octeon_retry_droq_refill(struct octeon_droq * droq)5004b6e326bSIntiyaz Basha int octeon_retry_droq_refill(struct octeon_droq *droq)
501031d4f12SSatanand Burla {
502031d4f12SSatanand Burla struct octeon_device *oct = droq->oct_dev;
5034b6e326bSIntiyaz Basha int desc_refilled, reschedule = 1;
5044b6e326bSIntiyaz Basha u32 pkts_credit;
505031d4f12SSatanand Burla
5064b6e326bSIntiyaz Basha pkts_credit = readl(droq->pkts_credit_reg);
507031d4f12SSatanand Burla desc_refilled = octeon_droq_refill(oct, droq);
508031d4f12SSatanand Burla if (desc_refilled) {
509031d4f12SSatanand Burla /* Flush the droq descriptor data to memory to be sure
510031d4f12SSatanand Burla * that when we update the credits the data in memory
511031d4f12SSatanand Burla * is accurate.
512031d4f12SSatanand Burla */
513031d4f12SSatanand Burla wmb();
514031d4f12SSatanand Burla writel(desc_refilled, droq->pkts_credit_reg);
5154b6e326bSIntiyaz Basha
5164b6e326bSIntiyaz Basha if (pkts_credit + desc_refilled >= CN23XX_SLI_DEF_BP)
5174b6e326bSIntiyaz Basha reschedule = 0;
518031d4f12SSatanand Burla }
5194b6e326bSIntiyaz Basha
5204b6e326bSIntiyaz Basha return reschedule;
521031d4f12SSatanand Burla }
522031d4f12SSatanand Burla
523f21fb3edSRaghu Vatsavayi static inline u32
octeon_droq_get_bufcount(u32 buf_size,u32 total_len)524f21fb3edSRaghu Vatsavayi octeon_droq_get_bufcount(u32 buf_size, u32 total_len)
525f21fb3edSRaghu Vatsavayi {
526f8a1988fSzhong jiang return DIV_ROUND_UP(total_len, buf_size);
527f21fb3edSRaghu Vatsavayi }
528f21fb3edSRaghu Vatsavayi
529f21fb3edSRaghu Vatsavayi static int
octeon_droq_dispatch_pkt(struct octeon_device * oct,struct octeon_droq * droq,union octeon_rh * rh,struct octeon_droq_info * info)530f21fb3edSRaghu Vatsavayi octeon_droq_dispatch_pkt(struct octeon_device *oct,
531f21fb3edSRaghu Vatsavayi struct octeon_droq *droq,
532f21fb3edSRaghu Vatsavayi union octeon_rh *rh,
533f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info)
534f21fb3edSRaghu Vatsavayi {
535f21fb3edSRaghu Vatsavayi u32 cnt;
536f21fb3edSRaghu Vatsavayi octeon_dispatch_fn_t disp_fn;
537f21fb3edSRaghu Vatsavayi struct octeon_recv_info *rinfo;
538f21fb3edSRaghu Vatsavayi
539f21fb3edSRaghu Vatsavayi cnt = octeon_droq_get_bufcount(droq->buffer_size, (u32)info->length);
540f21fb3edSRaghu Vatsavayi
541f21fb3edSRaghu Vatsavayi disp_fn = octeon_get_dispatch(oct, (u16)rh->r.opcode,
542f21fb3edSRaghu Vatsavayi (u16)rh->r.subcode);
543f21fb3edSRaghu Vatsavayi if (disp_fn) {
544f21fb3edSRaghu Vatsavayi rinfo = octeon_create_recv_info(oct, droq, cnt, droq->read_idx);
545f21fb3edSRaghu Vatsavayi if (rinfo) {
546f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = rinfo->rsvd;
547f21fb3edSRaghu Vatsavayi
548f21fb3edSRaghu Vatsavayi rdisp->rinfo = rinfo;
549f21fb3edSRaghu Vatsavayi rdisp->disp_fn = disp_fn;
550f21fb3edSRaghu Vatsavayi rinfo->recv_pkt->rh = *rh;
551f21fb3edSRaghu Vatsavayi list_add_tail(&rdisp->list,
552f21fb3edSRaghu Vatsavayi &droq->dispatch_list);
553f21fb3edSRaghu Vatsavayi } else {
554f21fb3edSRaghu Vatsavayi droq->stats.dropped_nomem++;
555f21fb3edSRaghu Vatsavayi }
556f21fb3edSRaghu Vatsavayi } else {
557a2c64b67SRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: No dispatch function (opcode %u/%u)\n",
558a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.opcode,
559a2c64b67SRaghu Vatsavayi (unsigned int)rh->r.subcode);
560f21fb3edSRaghu Vatsavayi droq->stats.dropped_nodispatch++;
5619ded1a51SRaghu Vatsavayi }
562f21fb3edSRaghu Vatsavayi
563f21fb3edSRaghu Vatsavayi return cnt;
564f21fb3edSRaghu Vatsavayi }
565f21fb3edSRaghu Vatsavayi
octeon_droq_drop_packets(struct octeon_device * oct,struct octeon_droq * droq,u32 cnt)566f21fb3edSRaghu Vatsavayi static inline void octeon_droq_drop_packets(struct octeon_device *oct,
567f21fb3edSRaghu Vatsavayi struct octeon_droq *droq,
568f21fb3edSRaghu Vatsavayi u32 cnt)
569f21fb3edSRaghu Vatsavayi {
570f21fb3edSRaghu Vatsavayi u32 i = 0, buf_cnt;
571f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info;
572f21fb3edSRaghu Vatsavayi
573f21fb3edSRaghu Vatsavayi for (i = 0; i < cnt; i++) {
574c4ee5d81SPrasad Kanneganti info = (struct octeon_droq_info *)
575c4ee5d81SPrasad Kanneganti droq->recv_buf_list[droq->read_idx].data;
576f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2);
577f21fb3edSRaghu Vatsavayi
578f21fb3edSRaghu Vatsavayi if (info->length) {
579c4ee5d81SPrasad Kanneganti info->length += OCTNET_FRM_LENGTH_SIZE;
580f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += info->length;
581f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_get_bufcount(droq->buffer_size,
582f21fb3edSRaghu Vatsavayi (u32)info->length);
583f21fb3edSRaghu Vatsavayi } else {
584f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "DROQ: In drop: pkt with len 0\n");
585f21fb3edSRaghu Vatsavayi buf_cnt = 1;
586f21fb3edSRaghu Vatsavayi }
587f21fb3edSRaghu Vatsavayi
58897a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, buf_cnt,
58997a25326SRaghu Vatsavayi droq->max_count);
590f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt;
591f21fb3edSRaghu Vatsavayi }
592f21fb3edSRaghu Vatsavayi }
593f21fb3edSRaghu Vatsavayi
594f21fb3edSRaghu Vatsavayi static u32
octeon_droq_fast_process_packets(struct octeon_device * oct,struct octeon_droq * droq,u32 pkts_to_process)595f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(struct octeon_device *oct,
596f21fb3edSRaghu Vatsavayi struct octeon_droq *droq,
597f21fb3edSRaghu Vatsavayi u32 pkts_to_process)
598f21fb3edSRaghu Vatsavayi {
5994b6e326bSIntiyaz Basha u32 pkt, total_len = 0, pkt_count, retval;
600f21fb3edSRaghu Vatsavayi struct octeon_droq_info *info;
601f21fb3edSRaghu Vatsavayi union octeon_rh *rh;
602f21fb3edSRaghu Vatsavayi
603f21fb3edSRaghu Vatsavayi pkt_count = pkts_to_process;
604f21fb3edSRaghu Vatsavayi
605f21fb3edSRaghu Vatsavayi for (pkt = 0; pkt < pkt_count; pkt++) {
606f21fb3edSRaghu Vatsavayi u32 pkt_len = 0;
607f21fb3edSRaghu Vatsavayi struct sk_buff *nicbuf = NULL;
608cabeb13bSRaghu Vatsavayi struct octeon_skb_page_info *pg_info;
609cabeb13bSRaghu Vatsavayi void *buf;
610f21fb3edSRaghu Vatsavayi
611c4ee5d81SPrasad Kanneganti info = (struct octeon_droq_info *)
612c4ee5d81SPrasad Kanneganti droq->recv_buf_list[droq->read_idx].data;
613f21fb3edSRaghu Vatsavayi octeon_swap_8B_data((u64 *)info, 2);
614f21fb3edSRaghu Vatsavayi
615f21fb3edSRaghu Vatsavayi if (!info->length) {
616f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev,
617f21fb3edSRaghu Vatsavayi "DROQ[%d] idx: %d len:0, pkt_cnt: %d\n",
618f21fb3edSRaghu Vatsavayi droq->q_no, droq->read_idx, pkt_count);
619f21fb3edSRaghu Vatsavayi print_hex_dump_bytes("", DUMP_PREFIX_ADDRESS,
620f21fb3edSRaghu Vatsavayi (u8 *)info,
621f21fb3edSRaghu Vatsavayi OCT_DROQ_INFO_SIZE);
622f21fb3edSRaghu Vatsavayi break;
623f21fb3edSRaghu Vatsavayi }
624f21fb3edSRaghu Vatsavayi
625f21fb3edSRaghu Vatsavayi /* Len of resp hdr in included in the received data len. */
626f21fb3edSRaghu Vatsavayi rh = &info->rh;
627f21fb3edSRaghu Vatsavayi
628c4ee5d81SPrasad Kanneganti info->length += OCTNET_FRM_LENGTH_SIZE;
629c4ee5d81SPrasad Kanneganti rh->r_dh.len += (ROUNDUP8(OCT_DROQ_INFO_SIZE) / sizeof(u64));
630f21fb3edSRaghu Vatsavayi total_len += (u32)info->length;
63197a25326SRaghu Vatsavayi if (opcode_slow_path(rh)) {
632f21fb3edSRaghu Vatsavayi u32 buf_cnt;
633f21fb3edSRaghu Vatsavayi
634f21fb3edSRaghu Vatsavayi buf_cnt = octeon_droq_dispatch_pkt(oct, droq, rh, info);
63597a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx,
63697a25326SRaghu Vatsavayi buf_cnt, droq->max_count);
637f21fb3edSRaghu Vatsavayi droq->refill_count += buf_cnt;
638f21fb3edSRaghu Vatsavayi } else {
639f21fb3edSRaghu Vatsavayi if (info->length <= droq->buffer_size) {
640f21fb3edSRaghu Vatsavayi pkt_len = (u32)info->length;
641f21fb3edSRaghu Vatsavayi nicbuf = droq->recv_buf_list[
642f21fb3edSRaghu Vatsavayi droq->read_idx].buffer;
643cabeb13bSRaghu Vatsavayi pg_info = &droq->recv_buf_list[
644cabeb13bSRaghu Vatsavayi droq->read_idx].pg_info;
645cabeb13bSRaghu Vatsavayi if (recv_buffer_recycle(oct, pg_info))
646cabeb13bSRaghu Vatsavayi pg_info->page = NULL;
647f21fb3edSRaghu Vatsavayi droq->recv_buf_list[droq->read_idx].buffer =
648f21fb3edSRaghu Vatsavayi NULL;
649a2c64b67SRaghu Vatsavayi
65097a25326SRaghu Vatsavayi droq->read_idx = incr_index(droq->read_idx, 1,
65197a25326SRaghu Vatsavayi droq->max_count);
652f21fb3edSRaghu Vatsavayi droq->refill_count++;
653f21fb3edSRaghu Vatsavayi } else {
654cabeb13bSRaghu Vatsavayi nicbuf = octeon_fast_packet_alloc((u32)
655f21fb3edSRaghu Vatsavayi info->length);
656f21fb3edSRaghu Vatsavayi pkt_len = 0;
657f21fb3edSRaghu Vatsavayi /* nicbuf allocation can fail. We'll handle it
658f21fb3edSRaghu Vatsavayi * inside the loop.
659f21fb3edSRaghu Vatsavayi */
660f21fb3edSRaghu Vatsavayi while (pkt_len < info->length) {
661cabeb13bSRaghu Vatsavayi int cpy_len, idx = droq->read_idx;
662f21fb3edSRaghu Vatsavayi
663cabeb13bSRaghu Vatsavayi cpy_len = ((pkt_len + droq->buffer_size)
664cabeb13bSRaghu Vatsavayi > info->length) ?
665f21fb3edSRaghu Vatsavayi ((u32)info->length - pkt_len) :
666f21fb3edSRaghu Vatsavayi droq->buffer_size;
667f21fb3edSRaghu Vatsavayi
668f21fb3edSRaghu Vatsavayi if (nicbuf) {
669f21fb3edSRaghu Vatsavayi octeon_fast_packet_next(droq,
670f21fb3edSRaghu Vatsavayi nicbuf,
671f21fb3edSRaghu Vatsavayi cpy_len,
672cabeb13bSRaghu Vatsavayi idx);
6739ae122c6SSatanand Burla buf = droq->recv_buf_list[
6749ae122c6SSatanand Burla idx].buffer;
675cabeb13bSRaghu Vatsavayi recv_buffer_fast_free(buf);
676cabeb13bSRaghu Vatsavayi droq->recv_buf_list[idx].buffer
677cabeb13bSRaghu Vatsavayi = NULL;
678cabeb13bSRaghu Vatsavayi } else {
679cabeb13bSRaghu Vatsavayi droq->stats.rx_alloc_failure++;
680f21fb3edSRaghu Vatsavayi }
681f21fb3edSRaghu Vatsavayi
682f21fb3edSRaghu Vatsavayi pkt_len += cpy_len;
68397a25326SRaghu Vatsavayi droq->read_idx =
68497a25326SRaghu Vatsavayi incr_index(droq->read_idx, 1,
685f21fb3edSRaghu Vatsavayi droq->max_count);
686f21fb3edSRaghu Vatsavayi droq->refill_count++;
687f21fb3edSRaghu Vatsavayi }
688f21fb3edSRaghu Vatsavayi }
689f21fb3edSRaghu Vatsavayi
690f21fb3edSRaghu Vatsavayi if (nicbuf) {
691cabeb13bSRaghu Vatsavayi if (droq->ops.fptr) {
692f21fb3edSRaghu Vatsavayi droq->ops.fptr(oct->octeon_id,
693f21fb3edSRaghu Vatsavayi nicbuf, pkt_len,
6940cece6c5SRaghu Vatsavayi rh, &droq->napi,
6950cece6c5SRaghu Vatsavayi droq->ops.farg);
696cabeb13bSRaghu Vatsavayi } else {
697f21fb3edSRaghu Vatsavayi recv_buffer_free(nicbuf);
698f21fb3edSRaghu Vatsavayi }
699f21fb3edSRaghu Vatsavayi }
700cabeb13bSRaghu Vatsavayi }
701f21fb3edSRaghu Vatsavayi
702f21fb3edSRaghu Vatsavayi if (droq->refill_count >= droq->refill_threshold) {
703f21fb3edSRaghu Vatsavayi int desc_refilled = octeon_droq_refill(oct, droq);
704f21fb3edSRaghu Vatsavayi
7054b6e326bSIntiyaz Basha if (desc_refilled) {
7064b6e326bSIntiyaz Basha /* Flush the droq descriptor data to memory to
7074b6e326bSIntiyaz Basha * be sure that when we update the credits the
7084b6e326bSIntiyaz Basha * data in memory is accurate.
709f21fb3edSRaghu Vatsavayi */
710f21fb3edSRaghu Vatsavayi wmb();
7114b6e326bSIntiyaz Basha writel(desc_refilled, droq->pkts_credit_reg);
712f21fb3edSRaghu Vatsavayi }
7134b6e326bSIntiyaz Basha }
714f21fb3edSRaghu Vatsavayi } /* for (each packet)... */
715f21fb3edSRaghu Vatsavayi
716f21fb3edSRaghu Vatsavayi /* Increment refill_count by the number of buffers processed. */
717f21fb3edSRaghu Vatsavayi droq->stats.pkts_received += pkt;
718f21fb3edSRaghu Vatsavayi droq->stats.bytes_received += total_len;
719f21fb3edSRaghu Vatsavayi
7204b6e326bSIntiyaz Basha retval = pkt;
721f21fb3edSRaghu Vatsavayi if ((droq->ops.drop_on_max) && (pkts_to_process - pkt)) {
722f21fb3edSRaghu Vatsavayi octeon_droq_drop_packets(oct, droq, (pkts_to_process - pkt));
723f21fb3edSRaghu Vatsavayi
724f21fb3edSRaghu Vatsavayi droq->stats.dropped_toomany += (pkts_to_process - pkt);
7254b6e326bSIntiyaz Basha retval = pkts_to_process;
726f21fb3edSRaghu Vatsavayi }
727f21fb3edSRaghu Vatsavayi
7284b6e326bSIntiyaz Basha atomic_sub(retval, &droq->pkts_pending);
7294b6e326bSIntiyaz Basha
7304b6e326bSIntiyaz Basha if (droq->refill_count >= droq->refill_threshold &&
7314b6e326bSIntiyaz Basha readl(droq->pkts_credit_reg) < CN23XX_SLI_DEF_BP) {
7324b6e326bSIntiyaz Basha octeon_droq_check_hw_for_pkts(droq);
7334b6e326bSIntiyaz Basha
7344b6e326bSIntiyaz Basha /* Make sure there are no pkts_pending */
7354b6e326bSIntiyaz Basha if (!atomic_read(&droq->pkts_pending))
7364b6e326bSIntiyaz Basha octeon_schedule_rxq_oom_work(oct, droq);
7374b6e326bSIntiyaz Basha }
7384b6e326bSIntiyaz Basha
7394b6e326bSIntiyaz Basha return retval;
740f21fb3edSRaghu Vatsavayi }
741f21fb3edSRaghu Vatsavayi
742f21fb3edSRaghu Vatsavayi int
octeon_droq_process_packets(struct octeon_device * oct,struct octeon_droq * droq,u32 budget)743f21fb3edSRaghu Vatsavayi octeon_droq_process_packets(struct octeon_device *oct,
744f21fb3edSRaghu Vatsavayi struct octeon_droq *droq,
745f21fb3edSRaghu Vatsavayi u32 budget)
746f21fb3edSRaghu Vatsavayi {
7474b6e326bSIntiyaz Basha u32 pkt_count = 0;
748f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2;
749f21fb3edSRaghu Vatsavayi
750cd8b1eb4SRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq);
751f21fb3edSRaghu Vatsavayi pkt_count = atomic_read(&droq->pkts_pending);
752cd8b1eb4SRaghu Vatsavayi
7538bf6edcdSIntiyaz Basha if (!pkt_count)
754f21fb3edSRaghu Vatsavayi return 0;
755f21fb3edSRaghu Vatsavayi
756f21fb3edSRaghu Vatsavayi if (pkt_count > budget)
757f21fb3edSRaghu Vatsavayi pkt_count = budget;
758f21fb3edSRaghu Vatsavayi
7594b6e326bSIntiyaz Basha octeon_droq_fast_process_packets(oct, droq, pkt_count);
760f21fb3edSRaghu Vatsavayi
761f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) {
762f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp;
763f21fb3edSRaghu Vatsavayi
764f21fb3edSRaghu Vatsavayi list_del(tmp);
765f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo,
766f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg
767f21fb3edSRaghu Vatsavayi (oct,
768f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode,
769f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode));
770f21fb3edSRaghu Vatsavayi }
771f21fb3edSRaghu Vatsavayi
772f21fb3edSRaghu Vatsavayi /* If there are packets pending. schedule tasklet again */
773f21fb3edSRaghu Vatsavayi if (atomic_read(&droq->pkts_pending))
774f21fb3edSRaghu Vatsavayi return 1;
775f21fb3edSRaghu Vatsavayi
776f21fb3edSRaghu Vatsavayi return 0;
777f21fb3edSRaghu Vatsavayi }
778*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(octeon_droq_process_packets);
779f21fb3edSRaghu Vatsavayi
780d0ea5cbdSJesse Brandeburg /*
781f21fb3edSRaghu Vatsavayi * Utility function to poll for packets. check_hw_for_packets must be
782f21fb3edSRaghu Vatsavayi * called before calling this routine.
783f21fb3edSRaghu Vatsavayi */
784f21fb3edSRaghu Vatsavayi
7855eb297a9SIntiyaz Basha int
octeon_droq_process_poll_pkts(struct octeon_device * oct,struct octeon_droq * droq,u32 budget)786f21fb3edSRaghu Vatsavayi octeon_droq_process_poll_pkts(struct octeon_device *oct,
787f21fb3edSRaghu Vatsavayi struct octeon_droq *droq, u32 budget)
788f21fb3edSRaghu Vatsavayi {
789f21fb3edSRaghu Vatsavayi struct list_head *tmp, *tmp2;
790f21fb3edSRaghu Vatsavayi u32 pkts_available = 0, pkts_processed = 0;
791f21fb3edSRaghu Vatsavayi u32 total_pkts_processed = 0;
792f21fb3edSRaghu Vatsavayi
793f21fb3edSRaghu Vatsavayi if (budget > droq->max_count)
794f21fb3edSRaghu Vatsavayi budget = droq->max_count;
795f21fb3edSRaghu Vatsavayi
796f21fb3edSRaghu Vatsavayi while (total_pkts_processed < budget) {
797cd8b1eb4SRaghu Vatsavayi octeon_droq_check_hw_for_pkts(droq);
798cd8b1eb4SRaghu Vatsavayi
79997a25326SRaghu Vatsavayi pkts_available = min((budget - total_pkts_processed),
800f21fb3edSRaghu Vatsavayi (u32)(atomic_read(&droq->pkts_pending)));
801f21fb3edSRaghu Vatsavayi
802f21fb3edSRaghu Vatsavayi if (pkts_available == 0)
803f21fb3edSRaghu Vatsavayi break;
804f21fb3edSRaghu Vatsavayi
805f21fb3edSRaghu Vatsavayi pkts_processed =
806f21fb3edSRaghu Vatsavayi octeon_droq_fast_process_packets(oct, droq,
807f21fb3edSRaghu Vatsavayi pkts_available);
808f21fb3edSRaghu Vatsavayi
809f21fb3edSRaghu Vatsavayi total_pkts_processed += pkts_processed;
810f21fb3edSRaghu Vatsavayi }
811f21fb3edSRaghu Vatsavayi
812f21fb3edSRaghu Vatsavayi list_for_each_safe(tmp, tmp2, &droq->dispatch_list) {
813f21fb3edSRaghu Vatsavayi struct __dispatch *rdisp = (struct __dispatch *)tmp;
814f21fb3edSRaghu Vatsavayi
815f21fb3edSRaghu Vatsavayi list_del(tmp);
816f21fb3edSRaghu Vatsavayi rdisp->disp_fn(rdisp->rinfo,
817f21fb3edSRaghu Vatsavayi octeon_get_dispatch_arg
818f21fb3edSRaghu Vatsavayi (oct,
819f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.opcode,
820f21fb3edSRaghu Vatsavayi (u16)rdisp->rinfo->recv_pkt->rh.r.subcode));
821f21fb3edSRaghu Vatsavayi }
822f21fb3edSRaghu Vatsavayi
823f21fb3edSRaghu Vatsavayi return total_pkts_processed;
824f21fb3edSRaghu Vatsavayi }
825f21fb3edSRaghu Vatsavayi
826f21fb3edSRaghu Vatsavayi /* Enable Pkt Interrupt */
8275eb297a9SIntiyaz Basha int
octeon_enable_irq(struct octeon_device * oct,u32 q_no)8285eb297a9SIntiyaz Basha octeon_enable_irq(struct octeon_device *oct, u32 q_no)
8295eb297a9SIntiyaz Basha {
830f21fb3edSRaghu Vatsavayi switch (oct->chip_id) {
831f21fb3edSRaghu Vatsavayi case OCTEON_CN66XX:
832f21fb3edSRaghu Vatsavayi case OCTEON_CN68XX: {
833f21fb3edSRaghu Vatsavayi struct octeon_cn6xxx *cn6xxx =
834f21fb3edSRaghu Vatsavayi (struct octeon_cn6xxx *)oct->chip;
8355eb297a9SIntiyaz Basha unsigned long flags;
8365eb297a9SIntiyaz Basha u32 value;
8375eb297a9SIntiyaz Basha
838f21fb3edSRaghu Vatsavayi spin_lock_irqsave
839f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags);
8405eb297a9SIntiyaz Basha value = octeon_read_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB);
841f21fb3edSRaghu Vatsavayi value |= (1 << q_no);
8425eb297a9SIntiyaz Basha octeon_write_csr(oct, CN6XXX_SLI_PKT_TIME_INT_ENB, value);
8435eb297a9SIntiyaz Basha value = octeon_read_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB);
844f21fb3edSRaghu Vatsavayi value |= (1 << q_no);
8455eb297a9SIntiyaz Basha octeon_write_csr(oct, CN6XXX_SLI_PKT_CNT_INT_ENB, value);
846f21fb3edSRaghu Vatsavayi
847f21fb3edSRaghu Vatsavayi /* don't bother flushing the enables */
848f21fb3edSRaghu Vatsavayi
849f21fb3edSRaghu Vatsavayi spin_unlock_irqrestore
850f21fb3edSRaghu Vatsavayi (&cn6xxx->lock_for_droq_int_enb_reg, flags);
851f21fb3edSRaghu Vatsavayi }
852f21fb3edSRaghu Vatsavayi break;
8535eb297a9SIntiyaz Basha case OCTEON_CN23XX_PF_VID:
8549ded1a51SRaghu Vatsavayi lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
8559ded1a51SRaghu Vatsavayi break;
8569217c3cfSRaghu Vatsavayi
8579217c3cfSRaghu Vatsavayi case OCTEON_CN23XX_VF_VID:
8589217c3cfSRaghu Vatsavayi lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
8599217c3cfSRaghu Vatsavayi break;
8605eb297a9SIntiyaz Basha default:
8615eb297a9SIntiyaz Basha dev_err(&oct->pci_dev->dev, "%s Unknown Chip\n", __func__);
8625eb297a9SIntiyaz Basha return 1;
863f21fb3edSRaghu Vatsavayi }
864f21fb3edSRaghu Vatsavayi
8655eb297a9SIntiyaz Basha return 0;
866f21fb3edSRaghu Vatsavayi }
867f21fb3edSRaghu Vatsavayi
octeon_register_droq_ops(struct octeon_device * oct,u32 q_no,struct octeon_droq_ops * ops)868f21fb3edSRaghu Vatsavayi int octeon_register_droq_ops(struct octeon_device *oct, u32 q_no,
869f21fb3edSRaghu Vatsavayi struct octeon_droq_ops *ops)
870f21fb3edSRaghu Vatsavayi {
871f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL;
8728bf6edcdSIntiyaz Basha struct octeon_droq *droq;
873f21fb3edSRaghu Vatsavayi
874f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct);
875f21fb3edSRaghu Vatsavayi
876f21fb3edSRaghu Vatsavayi if (!oct_cfg)
877f21fb3edSRaghu Vatsavayi return -EINVAL;
878f21fb3edSRaghu Vatsavayi
879f21fb3edSRaghu Vatsavayi if (!(ops)) {
880f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq_ops pointer is NULL\n",
881f21fb3edSRaghu Vatsavayi __func__);
882f21fb3edSRaghu Vatsavayi return -EINVAL;
883f21fb3edSRaghu Vatsavayi }
884f21fb3edSRaghu Vatsavayi
885f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) {
886f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n",
887f21fb3edSRaghu Vatsavayi __func__, q_no, (oct->num_oqs - 1));
888f21fb3edSRaghu Vatsavayi return -EINVAL;
889f21fb3edSRaghu Vatsavayi }
890f21fb3edSRaghu Vatsavayi
891f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no];
892f21fb3edSRaghu Vatsavayi memcpy(&droq->ops, ops, sizeof(struct octeon_droq_ops));
893f21fb3edSRaghu Vatsavayi
894f21fb3edSRaghu Vatsavayi return 0;
895f21fb3edSRaghu Vatsavayi }
896f21fb3edSRaghu Vatsavayi
octeon_unregister_droq_ops(struct octeon_device * oct,u32 q_no)897f21fb3edSRaghu Vatsavayi int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no)
898f21fb3edSRaghu Vatsavayi {
899f21fb3edSRaghu Vatsavayi struct octeon_config *oct_cfg = NULL;
9008bf6edcdSIntiyaz Basha struct octeon_droq *droq;
901f21fb3edSRaghu Vatsavayi
902f21fb3edSRaghu Vatsavayi oct_cfg = octeon_get_conf(oct);
903f21fb3edSRaghu Vatsavayi
904f21fb3edSRaghu Vatsavayi if (!oct_cfg)
905f21fb3edSRaghu Vatsavayi return -EINVAL;
906f21fb3edSRaghu Vatsavayi
907f21fb3edSRaghu Vatsavayi if (q_no >= CFG_GET_OQ_MAX_Q(oct_cfg)) {
908f21fb3edSRaghu Vatsavayi dev_err(&oct->pci_dev->dev, "%s: droq id (%d) exceeds MAX (%d)\n",
909f21fb3edSRaghu Vatsavayi __func__, q_no, oct->num_oqs - 1);
910f21fb3edSRaghu Vatsavayi return -EINVAL;
911f21fb3edSRaghu Vatsavayi }
912f21fb3edSRaghu Vatsavayi
913f21fb3edSRaghu Vatsavayi droq = oct->droq[q_no];
914f21fb3edSRaghu Vatsavayi
915f21fb3edSRaghu Vatsavayi if (!droq) {
916f21fb3edSRaghu Vatsavayi dev_info(&oct->pci_dev->dev,
917f21fb3edSRaghu Vatsavayi "Droq id (%d) not available.\n", q_no);
918f21fb3edSRaghu Vatsavayi return 0;
919f21fb3edSRaghu Vatsavayi }
920f21fb3edSRaghu Vatsavayi
921f21fb3edSRaghu Vatsavayi droq->ops.fptr = NULL;
9220cece6c5SRaghu Vatsavayi droq->ops.farg = NULL;
923f21fb3edSRaghu Vatsavayi droq->ops.drop_on_max = 0;
924f21fb3edSRaghu Vatsavayi
925f21fb3edSRaghu Vatsavayi return 0;
926f21fb3edSRaghu Vatsavayi }
927*f71be9d0SMasahiro Yamada EXPORT_SYMBOL_GPL(octeon_unregister_droq_ops);
928f21fb3edSRaghu Vatsavayi
octeon_create_droq(struct octeon_device * oct,u32 q_no,u32 num_descs,u32 desc_size,void * app_ctx)929f21fb3edSRaghu Vatsavayi int octeon_create_droq(struct octeon_device *oct,
930f21fb3edSRaghu Vatsavayi u32 q_no, u32 num_descs,
931f21fb3edSRaghu Vatsavayi u32 desc_size, void *app_ctx)
932f21fb3edSRaghu Vatsavayi {
933f21fb3edSRaghu Vatsavayi struct octeon_droq *droq;
934b3ca9af0SVSR Burru int numa_node = dev_to_node(&oct->pci_dev->dev);
935f21fb3edSRaghu Vatsavayi
936f21fb3edSRaghu Vatsavayi if (oct->droq[q_no]) {
937f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "Droq already in use. Cannot create droq %d again\n",
938f21fb3edSRaghu Vatsavayi q_no);
939f21fb3edSRaghu Vatsavayi return 1;
940f21fb3edSRaghu Vatsavayi }
941f21fb3edSRaghu Vatsavayi
942f21fb3edSRaghu Vatsavayi /* Allocate the DS for the new droq. */
94396ae48b7SRaghu Vatsavayi droq = vmalloc_node(sizeof(*droq), numa_node);
94496ae48b7SRaghu Vatsavayi if (!droq)
945f21fb3edSRaghu Vatsavayi droq = vmalloc(sizeof(*droq));
946f21fb3edSRaghu Vatsavayi if (!droq)
947515e752dSRaghu Vatsavayi return -1;
948515e752dSRaghu Vatsavayi
949f21fb3edSRaghu Vatsavayi memset(droq, 0, sizeof(struct octeon_droq));
950f21fb3edSRaghu Vatsavayi
951f21fb3edSRaghu Vatsavayi /*Disable the pkt o/p for this Q */
952f21fb3edSRaghu Vatsavayi octeon_set_droq_pkt_op(oct, q_no, 0);
953f21fb3edSRaghu Vatsavayi oct->droq[q_no] = droq;
954f21fb3edSRaghu Vatsavayi
955f21fb3edSRaghu Vatsavayi /* Initialize the Droq */
956515e752dSRaghu Vatsavayi if (octeon_init_droq(oct, q_no, num_descs, desc_size, app_ctx)) {
957515e752dSRaghu Vatsavayi vfree(oct->droq[q_no]);
958515e752dSRaghu Vatsavayi oct->droq[q_no] = NULL;
959515e752dSRaghu Vatsavayi return -1;
960515e752dSRaghu Vatsavayi }
961f21fb3edSRaghu Vatsavayi
962f21fb3edSRaghu Vatsavayi oct->num_oqs++;
963f21fb3edSRaghu Vatsavayi
964f21fb3edSRaghu Vatsavayi dev_dbg(&oct->pci_dev->dev, "%s: Total number of OQ: %d\n", __func__,
965f21fb3edSRaghu Vatsavayi oct->num_oqs);
966f21fb3edSRaghu Vatsavayi
967f21fb3edSRaghu Vatsavayi /* Global Droq register settings */
968f21fb3edSRaghu Vatsavayi
969f21fb3edSRaghu Vatsavayi /* As of now not required, as setting are done for all 32 Droqs at
970f21fb3edSRaghu Vatsavayi * the same time.
971f21fb3edSRaghu Vatsavayi */
972f21fb3edSRaghu Vatsavayi return 0;
973f21fb3edSRaghu Vatsavayi }
974