1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/module.h> 19 #include <linux/interrupt.h> 20 #include <linux/pci.h> 21 #include <linux/firmware.h> 22 #include <net/vxlan.h> 23 #include <linux/kthread.h> 24 #include "liquidio_common.h" 25 #include "octeon_droq.h" 26 #include "octeon_iq.h" 27 #include "response_manager.h" 28 #include "octeon_device.h" 29 #include "octeon_nic.h" 30 #include "octeon_main.h" 31 #include "octeon_network.h" 32 #include "cn66xx_regs.h" 33 #include "cn66xx_device.h" 34 #include "cn68xx_device.h" 35 #include "cn23xx_pf_device.h" 36 #include "liquidio_image.h" 37 #include "lio_vf_rep.h" 38 39 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>"); 40 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver"); 41 MODULE_LICENSE("GPL"); 42 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME 43 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 44 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME 45 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 46 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME 47 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 48 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME 49 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 50 51 static int ddr_timeout = 10000; 52 module_param(ddr_timeout, int, 0644); 53 MODULE_PARM_DESC(ddr_timeout, 54 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check"); 55 56 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 57 58 static int debug = -1; 59 module_param(debug, int, 0644); 60 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits"); 61 62 static char fw_type[LIO_MAX_FW_TYPE_LEN] = LIO_FW_NAME_TYPE_AUTO; 63 module_param_string(fw_type, fw_type, sizeof(fw_type), 0444); 64 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded (default is \"auto\"), which uses firmware in flash, if present, else loads \"nic\"."); 65 66 static u32 console_bitmask; 67 module_param(console_bitmask, int, 0644); 68 MODULE_PARM_DESC(console_bitmask, 69 "Bitmask indicating which consoles have debug output redirected to syslog."); 70 71 /** 72 * octeon_console_debug_enabled - determines if a given console has debug enabled. 73 * @console: console to check 74 * Return: 1 = enabled. 0 otherwise 75 */ 76 static int octeon_console_debug_enabled(u32 console) 77 { 78 return (console_bitmask >> (console)) & 0x1; 79 } 80 81 /* Polling interval for determining when NIC application is alive */ 82 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100 83 84 /* runtime link query interval */ 85 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000 86 /* update localtime to octeon firmware every 60 seconds. 87 * make firmware to use same time reference, so that it will be easy to 88 * correlate firmware logged events/errors with host events, for debugging. 89 */ 90 #define LIO_SYNC_OCTEON_TIME_INTERVAL_MS 60000 91 92 /* time to wait for possible in-flight requests in milliseconds */ 93 #define WAIT_INFLIGHT_REQUEST msecs_to_jiffies(1000) 94 95 struct oct_link_status_resp { 96 u64 rh; 97 struct oct_link_info link_info; 98 u64 status; 99 }; 100 101 struct oct_timestamp_resp { 102 u64 rh; 103 u64 timestamp; 104 u64 status; 105 }; 106 107 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp)) 108 109 union tx_info { 110 u64 u64; 111 struct { 112 #ifdef __BIG_ENDIAN_BITFIELD 113 u16 gso_size; 114 u16 gso_segs; 115 u32 reserved; 116 #else 117 u32 reserved; 118 u16 gso_segs; 119 u16 gso_size; 120 #endif 121 } s; 122 }; 123 124 /* Octeon device properties to be used by the NIC module. 125 * Each octeon device in the system will be represented 126 * by this structure in the NIC module. 127 */ 128 129 #define OCTNIC_GSO_MAX_HEADER_SIZE 128 130 #define OCTNIC_GSO_MAX_SIZE \ 131 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE) 132 133 struct handshake { 134 struct completion init; 135 struct completion started; 136 struct pci_dev *pci_dev; 137 int init_ok; 138 int started_ok; 139 }; 140 141 #ifdef CONFIG_PCI_IOV 142 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs); 143 #endif 144 145 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 146 char *prefix, char *suffix); 147 148 static int octeon_device_init(struct octeon_device *); 149 static int liquidio_stop(struct net_device *netdev); 150 static void liquidio_remove(struct pci_dev *pdev); 151 static int liquidio_probe(struct pci_dev *pdev, 152 const struct pci_device_id *ent); 153 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 154 int linkstate); 155 156 static struct handshake handshake[MAX_OCTEON_DEVICES]; 157 static struct completion first_stage; 158 159 static void octeon_droq_bh(struct tasklet_struct *t) 160 { 161 int q_no; 162 int reschedule = 0; 163 struct octeon_device_priv *oct_priv = from_tasklet(oct_priv, t, 164 droq_tasklet); 165 struct octeon_device *oct = oct_priv->dev; 166 167 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { 168 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) 169 continue; 170 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], 171 MAX_PACKET_BUDGET); 172 lio_enable_irq(oct->droq[q_no], NULL); 173 174 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) { 175 /* set time and cnt interrupt thresholds for this DROQ 176 * for NAPI 177 */ 178 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; 179 180 octeon_write_csr64( 181 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no), 182 0x5700000040ULL); 183 octeon_write_csr64( 184 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0); 185 } 186 } 187 188 if (reschedule) 189 tasklet_schedule(&oct_priv->droq_tasklet); 190 } 191 192 static int lio_wait_for_oq_pkts(struct octeon_device *oct) 193 { 194 struct octeon_device_priv *oct_priv = 195 (struct octeon_device_priv *)oct->priv; 196 int retry = 100, pkt_cnt = 0, pending_pkts = 0; 197 int i; 198 199 do { 200 pending_pkts = 0; 201 202 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 203 if (!(oct->io_qmask.oq & BIT_ULL(i))) 204 continue; 205 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); 206 } 207 if (pkt_cnt > 0) { 208 pending_pkts += pkt_cnt; 209 tasklet_schedule(&oct_priv->droq_tasklet); 210 } 211 pkt_cnt = 0; 212 schedule_timeout_uninterruptible(1); 213 214 } while (retry-- && pending_pkts); 215 216 return pkt_cnt; 217 } 218 219 /** 220 * force_io_queues_off - Forces all IO queues off on a given device 221 * @oct: Pointer to Octeon device 222 */ 223 static void force_io_queues_off(struct octeon_device *oct) 224 { 225 if ((oct->chip_id == OCTEON_CN66XX) || 226 (oct->chip_id == OCTEON_CN68XX)) { 227 /* Reset the Enable bits for Input Queues. */ 228 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0); 229 230 /* Reset the Enable bits for Output Queues. */ 231 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0); 232 } 233 } 234 235 /** 236 * pcierror_quiesce_device - Cause device to go quiet so it can be safely removed/reset/etc 237 * @oct: Pointer to Octeon device 238 */ 239 static inline void pcierror_quiesce_device(struct octeon_device *oct) 240 { 241 int i; 242 243 /* Disable the input and output queues now. No more packets will 244 * arrive from Octeon, but we should wait for all packet processing 245 * to finish. 246 */ 247 force_io_queues_off(oct); 248 249 /* To allow for in-flight requests */ 250 schedule_timeout_uninterruptible(WAIT_INFLIGHT_REQUEST); 251 252 if (wait_for_pending_requests(oct)) 253 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 254 255 /* Force all requests waiting to be fetched by OCTEON to complete. */ 256 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 257 struct octeon_instr_queue *iq; 258 259 if (!(oct->io_qmask.iq & BIT_ULL(i))) 260 continue; 261 iq = oct->instr_queue[i]; 262 263 if (atomic_read(&iq->instr_pending)) { 264 spin_lock_bh(&iq->lock); 265 iq->fill_cnt = 0; 266 iq->octeon_read_index = iq->host_write_index; 267 iq->stats.instr_processed += 268 atomic_read(&iq->instr_pending); 269 lio_process_iq_request_list(oct, iq, 0); 270 spin_unlock_bh(&iq->lock); 271 } 272 } 273 274 /* Force all pending ordered list requests to time out. */ 275 lio_process_ordered_list(oct, 1); 276 277 /* We do not need to wait for output queue packets to be processed. */ 278 } 279 280 /** 281 * cleanup_aer_uncorrect_error_status - Cleanup PCI AER uncorrectable error status 282 * @dev: Pointer to PCI device 283 */ 284 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 285 { 286 int pos = 0x100; 287 u32 status, mask; 288 289 pr_info("%s :\n", __func__); 290 291 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); 292 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); 293 if (dev->error_state == pci_channel_io_normal) 294 status &= ~mask; /* Clear corresponding nonfatal bits */ 295 else 296 status &= mask; /* Clear corresponding fatal bits */ 297 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); 298 } 299 300 /** 301 * stop_pci_io - Stop all PCI IO to a given device 302 * @oct: Pointer to Octeon device 303 */ 304 static void stop_pci_io(struct octeon_device *oct) 305 { 306 /* No more instructions will be forwarded. */ 307 atomic_set(&oct->status, OCT_DEV_IN_RESET); 308 309 pci_disable_device(oct->pci_dev); 310 311 /* Disable interrupts */ 312 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 313 314 pcierror_quiesce_device(oct); 315 316 /* Release the interrupt line */ 317 free_irq(oct->pci_dev->irq, oct); 318 319 if (oct->flags & LIO_FLAG_MSI_ENABLED) 320 pci_disable_msi(oct->pci_dev); 321 322 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 323 lio_get_state_string(&oct->status)); 324 325 /* making it a common function for all OCTEON models */ 326 cleanup_aer_uncorrect_error_status(oct->pci_dev); 327 } 328 329 /** 330 * liquidio_pcie_error_detected - called when PCI error is detected 331 * @pdev: Pointer to PCI device 332 * @state: The current pci connection state 333 * 334 * This function is called after a PCI bus error affecting 335 * this device has been detected. 336 */ 337 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev, 338 pci_channel_state_t state) 339 { 340 struct octeon_device *oct = pci_get_drvdata(pdev); 341 342 /* Non-correctable Non-fatal errors */ 343 if (state == pci_channel_io_normal) { 344 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n"); 345 cleanup_aer_uncorrect_error_status(oct->pci_dev); 346 return PCI_ERS_RESULT_CAN_RECOVER; 347 } 348 349 /* Non-correctable Fatal errors */ 350 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n"); 351 stop_pci_io(oct); 352 353 /* Always return a DISCONNECT. There is no support for recovery but only 354 * for a clean shutdown. 355 */ 356 return PCI_ERS_RESULT_DISCONNECT; 357 } 358 359 /** 360 * liquidio_pcie_mmio_enabled - mmio handler 361 * @pdev: Pointer to PCI device 362 */ 363 static pci_ers_result_t liquidio_pcie_mmio_enabled(struct pci_dev __maybe_unused *pdev) 364 { 365 /* We should never hit this since we never ask for a reset for a Fatal 366 * Error. We always return DISCONNECT in io_error above. 367 * But play safe and return RECOVERED for now. 368 */ 369 return PCI_ERS_RESULT_RECOVERED; 370 } 371 372 /** 373 * liquidio_pcie_slot_reset - called after the pci bus has been reset. 374 * @pdev: Pointer to PCI device 375 * 376 * Restart the card from scratch, as if from a cold-boot. Implementation 377 * resembles the first-half of the octeon_resume routine. 378 */ 379 static pci_ers_result_t liquidio_pcie_slot_reset(struct pci_dev __maybe_unused *pdev) 380 { 381 /* We should never hit this since we never ask for a reset for a Fatal 382 * Error. We always return DISCONNECT in io_error above. 383 * But play safe and return RECOVERED for now. 384 */ 385 return PCI_ERS_RESULT_RECOVERED; 386 } 387 388 /** 389 * liquidio_pcie_resume - called when traffic can start flowing again. 390 * @pdev: Pointer to PCI device 391 * 392 * This callback is called when the error recovery driver tells us that 393 * its OK to resume normal operation. Implementation resembles the 394 * second-half of the octeon_resume routine. 395 */ 396 static void liquidio_pcie_resume(struct pci_dev __maybe_unused *pdev) 397 { 398 /* Nothing to be done here. */ 399 } 400 401 #define liquidio_suspend NULL 402 #define liquidio_resume NULL 403 404 /* For PCI-E Advanced Error Recovery (AER) Interface */ 405 static const struct pci_error_handlers liquidio_err_handler = { 406 .error_detected = liquidio_pcie_error_detected, 407 .mmio_enabled = liquidio_pcie_mmio_enabled, 408 .slot_reset = liquidio_pcie_slot_reset, 409 .resume = liquidio_pcie_resume, 410 }; 411 412 static const struct pci_device_id liquidio_pci_tbl[] = { 413 { /* 68xx */ 414 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 415 }, 416 { /* 66xx */ 417 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 418 }, 419 { /* 23xx pf */ 420 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 421 }, 422 { 423 0, 0, 0, 0, 0, 0, 0 424 } 425 }; 426 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl); 427 428 static SIMPLE_DEV_PM_OPS(liquidio_pm_ops, liquidio_suspend, liquidio_resume); 429 430 static struct pci_driver liquidio_pci_driver = { 431 .name = "LiquidIO", 432 .id_table = liquidio_pci_tbl, 433 .probe = liquidio_probe, 434 .remove = liquidio_remove, 435 .err_handler = &liquidio_err_handler, /* For AER */ 436 .driver.pm = &liquidio_pm_ops, 437 #ifdef CONFIG_PCI_IOV 438 .sriov_configure = liquidio_enable_sriov, 439 #endif 440 }; 441 442 /** 443 * liquidio_init_pci - register PCI driver 444 */ 445 static int liquidio_init_pci(void) 446 { 447 return pci_register_driver(&liquidio_pci_driver); 448 } 449 450 /** 451 * liquidio_deinit_pci - unregister PCI driver 452 */ 453 static void liquidio_deinit_pci(void) 454 { 455 pci_unregister_driver(&liquidio_pci_driver); 456 } 457 458 /** 459 * check_txq_status - Check Tx queue status, and take appropriate action 460 * @lio: per-network private data 461 * Return: 0 if full, number of queues woken up otherwise 462 */ 463 static inline int check_txq_status(struct lio *lio) 464 { 465 int numqs = lio->netdev->real_num_tx_queues; 466 int ret_val = 0; 467 int q, iq; 468 469 /* check each sub-queue state */ 470 for (q = 0; q < numqs; q++) { 471 iq = lio->linfo.txpciq[q % 472 lio->oct_dev->num_iqs].s.q_no; 473 if (octnet_iq_is_full(lio->oct_dev, iq)) 474 continue; 475 if (__netif_subqueue_stopped(lio->netdev, q)) { 476 netif_wake_subqueue(lio->netdev, q); 477 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, 478 tx_restart, 1); 479 ret_val++; 480 } 481 } 482 483 return ret_val; 484 } 485 486 /** 487 * print_link_info - Print link information 488 * @netdev: network device 489 */ 490 static void print_link_info(struct net_device *netdev) 491 { 492 struct lio *lio = GET_LIO(netdev); 493 494 if (!ifstate_check(lio, LIO_IFSTATE_RESETTING) && 495 ifstate_check(lio, LIO_IFSTATE_REGISTERED)) { 496 struct oct_link_info *linfo = &lio->linfo; 497 498 if (linfo->link.s.link_up) { 499 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n", 500 linfo->link.s.speed, 501 (linfo->link.s.duplex) ? "Full" : "Half"); 502 } else { 503 netif_info(lio, link, lio->netdev, "Link Down\n"); 504 } 505 } 506 } 507 508 /** 509 * octnet_link_status_change - Routine to notify MTU change 510 * @work: work_struct data structure 511 */ 512 static void octnet_link_status_change(struct work_struct *work) 513 { 514 struct cavium_wk *wk = (struct cavium_wk *)work; 515 struct lio *lio = (struct lio *)wk->ctxptr; 516 517 /* lio->linfo.link.s.mtu always contains max MTU of the lio interface. 518 * this API is invoked only when new max-MTU of the interface is 519 * less than current MTU. 520 */ 521 rtnl_lock(); 522 dev_set_mtu(lio->netdev, lio->linfo.link.s.mtu); 523 rtnl_unlock(); 524 } 525 526 /** 527 * setup_link_status_change_wq - Sets up the mtu status change work 528 * @netdev: network device 529 */ 530 static inline int setup_link_status_change_wq(struct net_device *netdev) 531 { 532 struct lio *lio = GET_LIO(netdev); 533 struct octeon_device *oct = lio->oct_dev; 534 535 lio->link_status_wq.wq = alloc_workqueue("link-status", 536 WQ_MEM_RECLAIM, 0); 537 if (!lio->link_status_wq.wq) { 538 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n"); 539 return -1; 540 } 541 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work, 542 octnet_link_status_change); 543 lio->link_status_wq.wk.ctxptr = lio; 544 545 return 0; 546 } 547 548 static inline void cleanup_link_status_change_wq(struct net_device *netdev) 549 { 550 struct lio *lio = GET_LIO(netdev); 551 552 if (lio->link_status_wq.wq) { 553 cancel_delayed_work_sync(&lio->link_status_wq.wk.work); 554 destroy_workqueue(lio->link_status_wq.wq); 555 } 556 } 557 558 /** 559 * update_link_status - Update link status 560 * @netdev: network device 561 * @ls: link status structure 562 * 563 * Called on receipt of a link status response from the core application to 564 * update each interface's link status. 565 */ 566 static inline void update_link_status(struct net_device *netdev, 567 union oct_link_status *ls) 568 { 569 struct lio *lio = GET_LIO(netdev); 570 int changed = (lio->linfo.link.u64 != ls->u64); 571 int current_max_mtu = lio->linfo.link.s.mtu; 572 struct octeon_device *oct = lio->oct_dev; 573 574 dev_dbg(&oct->pci_dev->dev, "%s: lio->linfo.link.u64=%llx, ls->u64=%llx\n", 575 __func__, lio->linfo.link.u64, ls->u64); 576 lio->linfo.link.u64 = ls->u64; 577 578 if ((lio->intf_open) && (changed)) { 579 print_link_info(netdev); 580 lio->link_changes++; 581 582 if (lio->linfo.link.s.link_up) { 583 dev_dbg(&oct->pci_dev->dev, "%s: link_up", __func__); 584 netif_carrier_on(netdev); 585 wake_txqs(netdev); 586 } else { 587 dev_dbg(&oct->pci_dev->dev, "%s: link_off", __func__); 588 netif_carrier_off(netdev); 589 stop_txqs(netdev); 590 } 591 if (lio->linfo.link.s.mtu != current_max_mtu) { 592 netif_info(lio, probe, lio->netdev, "Max MTU changed from %d to %d\n", 593 current_max_mtu, lio->linfo.link.s.mtu); 594 netdev->max_mtu = lio->linfo.link.s.mtu; 595 } 596 if (lio->linfo.link.s.mtu < netdev->mtu) { 597 dev_warn(&oct->pci_dev->dev, 598 "Current MTU is higher than new max MTU; Reducing the current mtu from %d to %d\n", 599 netdev->mtu, lio->linfo.link.s.mtu); 600 queue_delayed_work(lio->link_status_wq.wq, 601 &lio->link_status_wq.wk.work, 0); 602 } 603 } 604 } 605 606 /** 607 * lio_sync_octeon_time - send latest localtime to octeon firmware so that 608 * firmware will correct it's time, in case there is a time skew 609 * 610 * @work: work scheduled to send time update to octeon firmware 611 **/ 612 static void lio_sync_octeon_time(struct work_struct *work) 613 { 614 struct cavium_wk *wk = (struct cavium_wk *)work; 615 struct lio *lio = (struct lio *)wk->ctxptr; 616 struct octeon_device *oct = lio->oct_dev; 617 struct octeon_soft_command *sc; 618 struct timespec64 ts; 619 struct lio_time *lt; 620 int ret; 621 622 sc = octeon_alloc_soft_command(oct, sizeof(struct lio_time), 16, 0); 623 if (!sc) { 624 dev_err(&oct->pci_dev->dev, 625 "Failed to sync time to octeon: soft command allocation failed\n"); 626 return; 627 } 628 629 lt = (struct lio_time *)sc->virtdptr; 630 631 /* Get time of the day */ 632 ktime_get_real_ts64(&ts); 633 lt->sec = ts.tv_sec; 634 lt->nsec = ts.tv_nsec; 635 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); 636 637 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 638 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 639 OPCODE_NIC_SYNC_OCTEON_TIME, 0, 0, 0); 640 641 init_completion(&sc->complete); 642 sc->sc_status = OCTEON_REQUEST_PENDING; 643 644 ret = octeon_send_soft_command(oct, sc); 645 if (ret == IQ_SEND_FAILED) { 646 dev_err(&oct->pci_dev->dev, 647 "Failed to sync time to octeon: failed to send soft command\n"); 648 octeon_free_soft_command(oct, sc); 649 } else { 650 WRITE_ONCE(sc->caller_is_done, true); 651 } 652 653 queue_delayed_work(lio->sync_octeon_time_wq.wq, 654 &lio->sync_octeon_time_wq.wk.work, 655 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 656 } 657 658 /** 659 * setup_sync_octeon_time_wq - prepare work to periodically update local time to octeon firmware 660 * 661 * @netdev: network device which should send time update to firmware 662 **/ 663 static inline int setup_sync_octeon_time_wq(struct net_device *netdev) 664 { 665 struct lio *lio = GET_LIO(netdev); 666 struct octeon_device *oct = lio->oct_dev; 667 668 lio->sync_octeon_time_wq.wq = 669 alloc_workqueue("update-octeon-time", WQ_MEM_RECLAIM, 0); 670 if (!lio->sync_octeon_time_wq.wq) { 671 dev_err(&oct->pci_dev->dev, "Unable to create wq to update octeon time\n"); 672 return -1; 673 } 674 INIT_DELAYED_WORK(&lio->sync_octeon_time_wq.wk.work, 675 lio_sync_octeon_time); 676 lio->sync_octeon_time_wq.wk.ctxptr = lio; 677 queue_delayed_work(lio->sync_octeon_time_wq.wq, 678 &lio->sync_octeon_time_wq.wk.work, 679 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 680 681 return 0; 682 } 683 684 /** 685 * cleanup_sync_octeon_time_wq - destroy wq 686 * 687 * @netdev: network device which should send time update to firmware 688 * 689 * Stop scheduling and destroy the work created to periodically update local 690 * time to octeon firmware. 691 **/ 692 static inline void cleanup_sync_octeon_time_wq(struct net_device *netdev) 693 { 694 struct lio *lio = GET_LIO(netdev); 695 struct cavium_wq *time_wq = &lio->sync_octeon_time_wq; 696 697 if (time_wq->wq) { 698 cancel_delayed_work_sync(&time_wq->wk.work); 699 destroy_workqueue(time_wq->wq); 700 } 701 } 702 703 static struct octeon_device *get_other_octeon_device(struct octeon_device *oct) 704 { 705 struct octeon_device *other_oct; 706 707 other_oct = lio_get_device(oct->octeon_id + 1); 708 709 if (other_oct && other_oct->pci_dev) { 710 int oct_busnum, other_oct_busnum; 711 712 oct_busnum = oct->pci_dev->bus->number; 713 other_oct_busnum = other_oct->pci_dev->bus->number; 714 715 if (oct_busnum == other_oct_busnum) { 716 int oct_slot, other_oct_slot; 717 718 oct_slot = PCI_SLOT(oct->pci_dev->devfn); 719 other_oct_slot = PCI_SLOT(other_oct->pci_dev->devfn); 720 721 if (oct_slot == other_oct_slot) 722 return other_oct; 723 } 724 } 725 726 return NULL; 727 } 728 729 static void disable_all_vf_links(struct octeon_device *oct) 730 { 731 struct net_device *netdev; 732 int max_vfs, vf, i; 733 734 if (!oct) 735 return; 736 737 max_vfs = oct->sriov_info.max_vfs; 738 739 for (i = 0; i < oct->ifcount; i++) { 740 netdev = oct->props[i].netdev; 741 if (!netdev) 742 continue; 743 744 for (vf = 0; vf < max_vfs; vf++) 745 liquidio_set_vf_link_state(netdev, vf, 746 IFLA_VF_LINK_STATE_DISABLE); 747 } 748 } 749 750 static int liquidio_watchdog(void *param) 751 { 752 bool err_msg_was_printed[LIO_MAX_CORES]; 753 u16 mask_of_crashed_or_stuck_cores = 0; 754 bool all_vf_links_are_disabled = false; 755 struct octeon_device *oct = param; 756 struct octeon_device *other_oct; 757 #ifdef CONFIG_MODULE_UNLOAD 758 long refcount, vfs_referencing_pf; 759 u64 vfs_mask1, vfs_mask2; 760 #endif 761 int core; 762 763 memset(err_msg_was_printed, 0, sizeof(err_msg_was_printed)); 764 765 while (!kthread_should_stop()) { 766 /* sleep for a couple of seconds so that we don't hog the CPU */ 767 set_current_state(TASK_INTERRUPTIBLE); 768 schedule_timeout(msecs_to_jiffies(2000)); 769 770 mask_of_crashed_or_stuck_cores = 771 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2); 772 773 if (!mask_of_crashed_or_stuck_cores) 774 continue; 775 776 WRITE_ONCE(oct->cores_crashed, true); 777 other_oct = get_other_octeon_device(oct); 778 if (other_oct) 779 WRITE_ONCE(other_oct->cores_crashed, true); 780 781 for (core = 0; core < LIO_MAX_CORES; core++) { 782 bool core_crashed_or_got_stuck; 783 784 core_crashed_or_got_stuck = 785 (mask_of_crashed_or_stuck_cores 786 >> core) & 1; 787 788 if (core_crashed_or_got_stuck && 789 !err_msg_was_printed[core]) { 790 dev_err(&oct->pci_dev->dev, 791 "ERROR: Octeon core %d crashed or got stuck! See oct-fwdump for details.\n", 792 core); 793 err_msg_was_printed[core] = true; 794 } 795 } 796 797 if (all_vf_links_are_disabled) 798 continue; 799 800 disable_all_vf_links(oct); 801 disable_all_vf_links(other_oct); 802 all_vf_links_are_disabled = true; 803 804 #ifdef CONFIG_MODULE_UNLOAD 805 vfs_mask1 = READ_ONCE(oct->sriov_info.vf_drv_loaded_mask); 806 vfs_mask2 = READ_ONCE(other_oct->sriov_info.vf_drv_loaded_mask); 807 808 vfs_referencing_pf = hweight64(vfs_mask1); 809 vfs_referencing_pf += hweight64(vfs_mask2); 810 811 refcount = module_refcount(THIS_MODULE); 812 if (refcount >= vfs_referencing_pf) { 813 while (vfs_referencing_pf) { 814 module_put(THIS_MODULE); 815 vfs_referencing_pf--; 816 } 817 } 818 #endif 819 } 820 821 return 0; 822 } 823 824 /** 825 * liquidio_probe - PCI probe handler 826 * @pdev: PCI device structure 827 * @ent: unused 828 */ 829 static int 830 liquidio_probe(struct pci_dev *pdev, const struct pci_device_id __maybe_unused *ent) 831 { 832 struct octeon_device *oct_dev = NULL; 833 struct handshake *hs; 834 835 oct_dev = octeon_allocate_device(pdev->device, 836 sizeof(struct octeon_device_priv)); 837 if (!oct_dev) { 838 dev_err(&pdev->dev, "Unable to allocate device\n"); 839 return -ENOMEM; 840 } 841 842 if (pdev->device == OCTEON_CN23XX_PF_VID) 843 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED; 844 845 /* Enable PTP for 6XXX Device */ 846 if (((pdev->device == OCTEON_CN66XX) || 847 (pdev->device == OCTEON_CN68XX))) 848 oct_dev->ptp_enable = true; 849 else 850 oct_dev->ptp_enable = false; 851 852 dev_info(&pdev->dev, "Initializing device %x:%x.\n", 853 (u32)pdev->vendor, (u32)pdev->device); 854 855 /* Assign octeon_device for this device to the private data area. */ 856 pci_set_drvdata(pdev, oct_dev); 857 858 /* set linux specific device pointer */ 859 oct_dev->pci_dev = (void *)pdev; 860 861 oct_dev->subsystem_id = pdev->subsystem_vendor | 862 (pdev->subsystem_device << 16); 863 864 hs = &handshake[oct_dev->octeon_id]; 865 init_completion(&hs->init); 866 init_completion(&hs->started); 867 hs->pci_dev = pdev; 868 869 if (oct_dev->octeon_id == 0) 870 /* first LiquidIO NIC is detected */ 871 complete(&first_stage); 872 873 if (octeon_device_init(oct_dev)) { 874 complete(&hs->init); 875 liquidio_remove(pdev); 876 return -ENOMEM; 877 } 878 879 if (OCTEON_CN23XX_PF(oct_dev)) { 880 u8 bus, device, function; 881 882 if (atomic_read(oct_dev->adapter_refcount) == 1) { 883 /* Each NIC gets one watchdog kernel thread. The first 884 * PF (of each NIC) that gets pci_driver->probe()'d 885 * creates that thread. 886 */ 887 bus = pdev->bus->number; 888 device = PCI_SLOT(pdev->devfn); 889 function = PCI_FUNC(pdev->devfn); 890 oct_dev->watchdog_task = kthread_run(liquidio_watchdog, 891 oct_dev, 892 "liowd/%02hhx:%02hhx.%hhx", 893 bus, device, function); 894 if (IS_ERR(oct_dev->watchdog_task)) { 895 oct_dev->watchdog_task = NULL; 896 dev_err(&oct_dev->pci_dev->dev, 897 "failed to create kernel_thread\n"); 898 liquidio_remove(pdev); 899 return -1; 900 } 901 } 902 } 903 904 oct_dev->rx_pause = 1; 905 oct_dev->tx_pause = 1; 906 907 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n"); 908 909 return 0; 910 } 911 912 static bool fw_type_is_auto(void) 913 { 914 return strncmp(fw_type, LIO_FW_NAME_TYPE_AUTO, 915 sizeof(LIO_FW_NAME_TYPE_AUTO)) == 0; 916 } 917 918 /** 919 * octeon_pci_flr - PCI FLR for each Octeon device. 920 * @oct: octeon device 921 */ 922 static void octeon_pci_flr(struct octeon_device *oct) 923 { 924 int rc; 925 926 pci_save_state(oct->pci_dev); 927 928 pci_cfg_access_lock(oct->pci_dev); 929 930 /* Quiesce the device completely */ 931 pci_write_config_word(oct->pci_dev, PCI_COMMAND, 932 PCI_COMMAND_INTX_DISABLE); 933 934 rc = __pci_reset_function_locked(oct->pci_dev); 935 936 if (rc != 0) 937 dev_err(&oct->pci_dev->dev, "Error %d resetting PCI function %d\n", 938 rc, oct->pf_num); 939 940 pci_cfg_access_unlock(oct->pci_dev); 941 942 pci_restore_state(oct->pci_dev); 943 } 944 945 /** 946 * octeon_destroy_resources - Destroy resources associated with octeon device 947 * @oct: octeon device 948 */ 949 static void octeon_destroy_resources(struct octeon_device *oct) 950 { 951 int i, refcount; 952 struct msix_entry *msix_entries; 953 struct octeon_device_priv *oct_priv = 954 (struct octeon_device_priv *)oct->priv; 955 956 struct handshake *hs; 957 958 switch (atomic_read(&oct->status)) { 959 case OCT_DEV_RUNNING: 960 case OCT_DEV_CORE_OK: 961 962 /* No more instructions will be forwarded. */ 963 atomic_set(&oct->status, OCT_DEV_IN_RESET); 964 965 oct->app_mode = CVM_DRV_INVALID_APP; 966 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 967 lio_get_state_string(&oct->status)); 968 969 schedule_timeout_uninterruptible(HZ / 10); 970 971 fallthrough; 972 case OCT_DEV_HOST_OK: 973 974 case OCT_DEV_CONSOLE_INIT_DONE: 975 /* Remove any consoles */ 976 octeon_remove_consoles(oct); 977 978 fallthrough; 979 case OCT_DEV_IO_QUEUES_DONE: 980 if (lio_wait_for_instr_fetch(oct)) 981 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); 982 983 if (wait_for_pending_requests(oct)) 984 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 985 986 /* Disable the input and output queues now. No more packets will 987 * arrive from Octeon, but we should wait for all packet 988 * processing to finish. 989 */ 990 oct->fn_list.disable_io_queues(oct); 991 992 if (lio_wait_for_oq_pkts(oct)) 993 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n"); 994 995 /* Force all requests waiting to be fetched by OCTEON to 996 * complete. 997 */ 998 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 999 struct octeon_instr_queue *iq; 1000 1001 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1002 continue; 1003 iq = oct->instr_queue[i]; 1004 1005 if (atomic_read(&iq->instr_pending)) { 1006 spin_lock_bh(&iq->lock); 1007 iq->fill_cnt = 0; 1008 iq->octeon_read_index = iq->host_write_index; 1009 iq->stats.instr_processed += 1010 atomic_read(&iq->instr_pending); 1011 lio_process_iq_request_list(oct, iq, 0); 1012 spin_unlock_bh(&iq->lock); 1013 } 1014 } 1015 1016 lio_process_ordered_list(oct, 1); 1017 octeon_free_sc_done_list(oct); 1018 octeon_free_sc_zombie_list(oct); 1019 1020 fallthrough; 1021 case OCT_DEV_INTR_SET_DONE: 1022 /* Disable interrupts */ 1023 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 1024 1025 if (oct->msix_on) { 1026 msix_entries = (struct msix_entry *)oct->msix_entries; 1027 for (i = 0; i < oct->num_msix_irqs - 1; i++) { 1028 if (oct->ioq_vector[i].vector) { 1029 /* clear the affinity_cpumask */ 1030 irq_set_affinity_hint( 1031 msix_entries[i].vector, 1032 NULL); 1033 free_irq(msix_entries[i].vector, 1034 &oct->ioq_vector[i]); 1035 oct->ioq_vector[i].vector = 0; 1036 } 1037 } 1038 /* non-iov vector's argument is oct struct */ 1039 free_irq(msix_entries[i].vector, oct); 1040 1041 pci_disable_msix(oct->pci_dev); 1042 kfree(oct->msix_entries); 1043 oct->msix_entries = NULL; 1044 } else { 1045 /* Release the interrupt line */ 1046 free_irq(oct->pci_dev->irq, oct); 1047 1048 if (oct->flags & LIO_FLAG_MSI_ENABLED) 1049 pci_disable_msi(oct->pci_dev); 1050 } 1051 1052 kfree(oct->irq_name_storage); 1053 oct->irq_name_storage = NULL; 1054 1055 fallthrough; 1056 case OCT_DEV_MSIX_ALLOC_VECTOR_DONE: 1057 if (OCTEON_CN23XX_PF(oct)) 1058 octeon_free_ioq_vector(oct); 1059 1060 fallthrough; 1061 case OCT_DEV_MBOX_SETUP_DONE: 1062 if (OCTEON_CN23XX_PF(oct)) 1063 oct->fn_list.free_mbox(oct); 1064 1065 fallthrough; 1066 case OCT_DEV_IN_RESET: 1067 case OCT_DEV_DROQ_INIT_DONE: 1068 /* Wait for any pending operations */ 1069 mdelay(100); 1070 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 1071 if (!(oct->io_qmask.oq & BIT_ULL(i))) 1072 continue; 1073 octeon_delete_droq(oct, i); 1074 } 1075 1076 /* Force any pending handshakes to complete */ 1077 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 1078 hs = &handshake[i]; 1079 1080 if (hs->pci_dev) { 1081 handshake[oct->octeon_id].init_ok = 0; 1082 complete(&handshake[oct->octeon_id].init); 1083 handshake[oct->octeon_id].started_ok = 0; 1084 complete(&handshake[oct->octeon_id].started); 1085 } 1086 } 1087 1088 fallthrough; 1089 case OCT_DEV_RESP_LIST_INIT_DONE: 1090 octeon_delete_response_list(oct); 1091 1092 fallthrough; 1093 case OCT_DEV_INSTR_QUEUE_INIT_DONE: 1094 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1095 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1096 continue; 1097 octeon_delete_instr_queue(oct, i); 1098 } 1099 #ifdef CONFIG_PCI_IOV 1100 if (oct->sriov_info.sriov_enabled) 1101 pci_disable_sriov(oct->pci_dev); 1102 #endif 1103 fallthrough; 1104 case OCT_DEV_SC_BUFF_POOL_INIT_DONE: 1105 octeon_free_sc_buffer_pool(oct); 1106 1107 fallthrough; 1108 case OCT_DEV_DISPATCH_INIT_DONE: 1109 octeon_delete_dispatch_list(oct); 1110 cancel_delayed_work_sync(&oct->nic_poll_work.work); 1111 1112 fallthrough; 1113 case OCT_DEV_PCI_MAP_DONE: 1114 refcount = octeon_deregister_device(oct); 1115 1116 /* Soft reset the octeon device before exiting. 1117 * However, if fw was loaded from card (i.e. autoboot), 1118 * perform an FLR instead. 1119 * Implementation note: only soft-reset the device 1120 * if it is a CN6XXX OR the LAST CN23XX device. 1121 */ 1122 if (atomic_read(oct->adapter_fw_state) == FW_IS_PRELOADED) 1123 octeon_pci_flr(oct); 1124 else if (OCTEON_CN6XXX(oct) || !refcount) 1125 oct->fn_list.soft_reset(oct); 1126 1127 octeon_unmap_pci_barx(oct, 0); 1128 octeon_unmap_pci_barx(oct, 1); 1129 1130 fallthrough; 1131 case OCT_DEV_PCI_ENABLE_DONE: 1132 pci_clear_master(oct->pci_dev); 1133 /* Disable the device, releasing the PCI INT */ 1134 pci_disable_device(oct->pci_dev); 1135 1136 fallthrough; 1137 case OCT_DEV_BEGIN_STATE: 1138 /* Nothing to be done here either */ 1139 break; 1140 } /* end switch (oct->status) */ 1141 1142 tasklet_kill(&oct_priv->droq_tasklet); 1143 } 1144 1145 /** 1146 * send_rx_ctrl_cmd - Send Rx control command 1147 * @lio: per-network private data 1148 * @start_stop: whether to start or stop 1149 */ 1150 static int send_rx_ctrl_cmd(struct lio *lio, int start_stop) 1151 { 1152 struct octeon_soft_command *sc; 1153 union octnet_cmd *ncmd; 1154 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1155 int retval; 1156 1157 if (oct->props[lio->ifidx].rx_on == start_stop) 1158 return 0; 1159 1160 sc = (struct octeon_soft_command *) 1161 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE, 1162 16, 0); 1163 if (!sc) { 1164 netif_info(lio, rx_err, lio->netdev, 1165 "Failed to allocate octeon_soft_command struct\n"); 1166 return -ENOMEM; 1167 } 1168 1169 ncmd = (union octnet_cmd *)sc->virtdptr; 1170 1171 ncmd->u64 = 0; 1172 ncmd->s.cmd = OCTNET_CMD_RX_CTL; 1173 ncmd->s.param1 = start_stop; 1174 1175 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3)); 1176 1177 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 1178 1179 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 1180 OPCODE_NIC_CMD, 0, 0, 0); 1181 1182 init_completion(&sc->complete); 1183 sc->sc_status = OCTEON_REQUEST_PENDING; 1184 1185 retval = octeon_send_soft_command(oct, sc); 1186 if (retval == IQ_SEND_FAILED) { 1187 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n"); 1188 octeon_free_soft_command(oct, sc); 1189 } else { 1190 /* Sleep on a wait queue till the cond flag indicates that the 1191 * response arrived or timed-out. 1192 */ 1193 retval = wait_for_sc_completion_timeout(oct, sc, 0); 1194 if (retval) 1195 return retval; 1196 1197 oct->props[lio->ifidx].rx_on = start_stop; 1198 WRITE_ONCE(sc->caller_is_done, true); 1199 } 1200 1201 return retval; 1202 } 1203 1204 /** 1205 * liquidio_destroy_nic_device - Destroy NIC device interface 1206 * @oct: octeon device 1207 * @ifidx: which interface to destroy 1208 * 1209 * Cleanup associated with each interface for an Octeon device when NIC 1210 * module is being unloaded or if initialization fails during load. 1211 */ 1212 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx) 1213 { 1214 struct net_device *netdev = oct->props[ifidx].netdev; 1215 struct octeon_device_priv *oct_priv = 1216 (struct octeon_device_priv *)oct->priv; 1217 struct napi_struct *napi, *n; 1218 struct lio *lio; 1219 1220 if (!netdev) { 1221 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n", 1222 __func__, ifidx); 1223 return; 1224 } 1225 1226 lio = GET_LIO(netdev); 1227 1228 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n"); 1229 1230 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) 1231 liquidio_stop(netdev); 1232 1233 if (oct->props[lio->ifidx].napi_enabled == 1) { 1234 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1235 napi_disable(napi); 1236 1237 oct->props[lio->ifidx].napi_enabled = 0; 1238 1239 if (OCTEON_CN23XX_PF(oct)) 1240 oct->droq[0]->ops.poll_mode = 0; 1241 } 1242 1243 /* Delete NAPI */ 1244 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1245 netif_napi_del(napi); 1246 1247 tasklet_enable(&oct_priv->droq_tasklet); 1248 1249 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) 1250 unregister_netdev(netdev); 1251 1252 cleanup_sync_octeon_time_wq(netdev); 1253 cleanup_link_status_change_wq(netdev); 1254 1255 cleanup_rx_oom_poll_fn(netdev); 1256 1257 lio_delete_glists(lio); 1258 1259 free_netdev(netdev); 1260 1261 oct->props[ifidx].gmxport = -1; 1262 1263 oct->props[ifidx].netdev = NULL; 1264 } 1265 1266 /** 1267 * liquidio_stop_nic_module - Stop complete NIC functionality 1268 * @oct: octeon device 1269 */ 1270 static int liquidio_stop_nic_module(struct octeon_device *oct) 1271 { 1272 int i, j; 1273 struct lio *lio; 1274 1275 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n"); 1276 device_lock(&oct->pci_dev->dev); 1277 if (oct->devlink) { 1278 devlink_unregister(oct->devlink); 1279 devlink_free(oct->devlink); 1280 oct->devlink = NULL; 1281 } 1282 device_unlock(&oct->pci_dev->dev); 1283 1284 if (!oct->ifcount) { 1285 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n"); 1286 return 1; 1287 } 1288 1289 spin_lock_bh(&oct->cmd_resp_wqlock); 1290 oct->cmd_resp_state = OCT_DRV_OFFLINE; 1291 spin_unlock_bh(&oct->cmd_resp_wqlock); 1292 1293 lio_vf_rep_destroy(oct); 1294 1295 for (i = 0; i < oct->ifcount; i++) { 1296 lio = GET_LIO(oct->props[i].netdev); 1297 for (j = 0; j < oct->num_oqs; j++) 1298 octeon_unregister_droq_ops(oct, 1299 lio->linfo.rxpciq[j].s.q_no); 1300 } 1301 1302 for (i = 0; i < oct->ifcount; i++) 1303 liquidio_destroy_nic_device(oct, i); 1304 1305 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n"); 1306 return 0; 1307 } 1308 1309 /** 1310 * liquidio_remove - Cleans up resources at unload time 1311 * @pdev: PCI device structure 1312 */ 1313 static void liquidio_remove(struct pci_dev *pdev) 1314 { 1315 struct octeon_device *oct_dev = pci_get_drvdata(pdev); 1316 1317 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n"); 1318 1319 if (oct_dev->watchdog_task) 1320 kthread_stop(oct_dev->watchdog_task); 1321 1322 if (!oct_dev->octeon_id && 1323 oct_dev->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) 1324 lio_vf_rep_modexit(); 1325 1326 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP)) 1327 liquidio_stop_nic_module(oct_dev); 1328 1329 /* Reset the octeon device and cleanup all memory allocated for 1330 * the octeon device by driver. 1331 */ 1332 octeon_destroy_resources(oct_dev); 1333 1334 dev_info(&oct_dev->pci_dev->dev, "Device removed\n"); 1335 1336 /* This octeon device has been removed. Update the global 1337 * data structure to reflect this. Free the device structure. 1338 */ 1339 octeon_free_device_mem(oct_dev); 1340 } 1341 1342 /** 1343 * octeon_chip_specific_setup - Identify the Octeon device and to map the BAR address space 1344 * @oct: octeon device 1345 */ 1346 static int octeon_chip_specific_setup(struct octeon_device *oct) 1347 { 1348 u32 dev_id, rev_id; 1349 int ret = 1; 1350 1351 pci_read_config_dword(oct->pci_dev, 0, &dev_id); 1352 pci_read_config_dword(oct->pci_dev, 8, &rev_id); 1353 oct->rev_id = rev_id & 0xff; 1354 1355 switch (dev_id) { 1356 case OCTEON_CN68XX_PCIID: 1357 oct->chip_id = OCTEON_CN68XX; 1358 ret = lio_setup_cn68xx_octeon_device(oct); 1359 break; 1360 1361 case OCTEON_CN66XX_PCIID: 1362 oct->chip_id = OCTEON_CN66XX; 1363 ret = lio_setup_cn66xx_octeon_device(oct); 1364 break; 1365 1366 case OCTEON_CN23XX_PCIID_PF: 1367 oct->chip_id = OCTEON_CN23XX_PF_VID; 1368 ret = setup_cn23xx_octeon_pf_device(oct); 1369 if (ret) 1370 break; 1371 #ifdef CONFIG_PCI_IOV 1372 if (!ret) 1373 pci_sriov_set_totalvfs(oct->pci_dev, 1374 oct->sriov_info.max_vfs); 1375 #endif 1376 break; 1377 1378 default: 1379 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n", 1380 dev_id); 1381 } 1382 1383 return ret; 1384 } 1385 1386 /** 1387 * octeon_pci_os_setup - PCI initialization for each Octeon device. 1388 * @oct: octeon device 1389 */ 1390 static int octeon_pci_os_setup(struct octeon_device *oct) 1391 { 1392 /* setup PCI stuff first */ 1393 if (pci_enable_device(oct->pci_dev)) { 1394 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n"); 1395 return 1; 1396 } 1397 1398 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) { 1399 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n"); 1400 pci_disable_device(oct->pci_dev); 1401 return 1; 1402 } 1403 1404 /* Enable PCI DMA Master. */ 1405 pci_set_master(oct->pci_dev); 1406 1407 return 0; 1408 } 1409 1410 /** 1411 * free_netbuf - Unmap and free network buffer 1412 * @buf: buffer 1413 */ 1414 static void free_netbuf(void *buf) 1415 { 1416 struct sk_buff *skb; 1417 struct octnet_buf_free_info *finfo; 1418 struct lio *lio; 1419 1420 finfo = (struct octnet_buf_free_info *)buf; 1421 skb = finfo->skb; 1422 lio = finfo->lio; 1423 1424 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len, 1425 DMA_TO_DEVICE); 1426 1427 tx_buffer_free(skb); 1428 } 1429 1430 /** 1431 * free_netsgbuf - Unmap and free gather buffer 1432 * @buf: buffer 1433 */ 1434 static void free_netsgbuf(void *buf) 1435 { 1436 struct octnet_buf_free_info *finfo; 1437 struct sk_buff *skb; 1438 struct lio *lio; 1439 struct octnic_gather *g; 1440 int i, frags, iq; 1441 1442 finfo = (struct octnet_buf_free_info *)buf; 1443 skb = finfo->skb; 1444 lio = finfo->lio; 1445 g = finfo->g; 1446 frags = skb_shinfo(skb)->nr_frags; 1447 1448 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1449 g->sg[0].ptr[0], (skb->len - skb->data_len), 1450 DMA_TO_DEVICE); 1451 1452 i = 1; 1453 while (frags--) { 1454 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1455 1456 dma_unmap_page(&lio->oct_dev->pci_dev->dev, 1457 g->sg[(i >> 2)].ptr[(i & 3)], 1458 skb_frag_size(frag), DMA_TO_DEVICE); 1459 i++; 1460 } 1461 1462 iq = skb_iq(lio->oct_dev, skb); 1463 spin_lock(&lio->glist_lock[iq]); 1464 list_add_tail(&g->list, &lio->glist[iq]); 1465 spin_unlock(&lio->glist_lock[iq]); 1466 1467 tx_buffer_free(skb); 1468 } 1469 1470 /** 1471 * free_netsgbuf_with_resp - Unmap and free gather buffer with response 1472 * @buf: buffer 1473 */ 1474 static void free_netsgbuf_with_resp(void *buf) 1475 { 1476 struct octeon_soft_command *sc; 1477 struct octnet_buf_free_info *finfo; 1478 struct sk_buff *skb; 1479 struct lio *lio; 1480 struct octnic_gather *g; 1481 int i, frags, iq; 1482 1483 sc = (struct octeon_soft_command *)buf; 1484 skb = (struct sk_buff *)sc->callback_arg; 1485 finfo = (struct octnet_buf_free_info *)&skb->cb; 1486 1487 lio = finfo->lio; 1488 g = finfo->g; 1489 frags = skb_shinfo(skb)->nr_frags; 1490 1491 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1492 g->sg[0].ptr[0], (skb->len - skb->data_len), 1493 DMA_TO_DEVICE); 1494 1495 i = 1; 1496 while (frags--) { 1497 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1498 1499 dma_unmap_page(&lio->oct_dev->pci_dev->dev, 1500 g->sg[(i >> 2)].ptr[(i & 3)], 1501 skb_frag_size(frag), DMA_TO_DEVICE); 1502 i++; 1503 } 1504 1505 iq = skb_iq(lio->oct_dev, skb); 1506 1507 spin_lock(&lio->glist_lock[iq]); 1508 list_add_tail(&g->list, &lio->glist[iq]); 1509 spin_unlock(&lio->glist_lock[iq]); 1510 1511 /* Don't free the skb yet */ 1512 } 1513 1514 /** 1515 * liquidio_ptp_adjfreq - Adjust ptp frequency 1516 * @ptp: PTP clock info 1517 * @ppb: how much to adjust by, in parts-per-billion 1518 */ 1519 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 1520 { 1521 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1522 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1523 u64 comp, delta; 1524 unsigned long flags; 1525 bool neg_adj = false; 1526 1527 if (ppb < 0) { 1528 neg_adj = true; 1529 ppb = -ppb; 1530 } 1531 1532 /* The hardware adds the clock compensation value to the 1533 * PTP clock on every coprocessor clock cycle, so we 1534 * compute the delta in terms of coprocessor clocks. 1535 */ 1536 delta = (u64)ppb << 32; 1537 do_div(delta, oct->coproc_clock_rate); 1538 1539 spin_lock_irqsave(&lio->ptp_lock, flags); 1540 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP); 1541 if (neg_adj) 1542 comp -= delta; 1543 else 1544 comp += delta; 1545 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1546 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1547 1548 return 0; 1549 } 1550 1551 /** 1552 * liquidio_ptp_adjtime - Adjust ptp time 1553 * @ptp: PTP clock info 1554 * @delta: how much to adjust by, in nanosecs 1555 */ 1556 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 1557 { 1558 unsigned long flags; 1559 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1560 1561 spin_lock_irqsave(&lio->ptp_lock, flags); 1562 lio->ptp_adjust += delta; 1563 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1564 1565 return 0; 1566 } 1567 1568 /** 1569 * liquidio_ptp_gettime - Get hardware clock time, including any adjustment 1570 * @ptp: PTP clock info 1571 * @ts: timespec 1572 */ 1573 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp, 1574 struct timespec64 *ts) 1575 { 1576 u64 ns; 1577 unsigned long flags; 1578 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1579 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1580 1581 spin_lock_irqsave(&lio->ptp_lock, flags); 1582 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI); 1583 ns += lio->ptp_adjust; 1584 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1585 1586 *ts = ns_to_timespec64(ns); 1587 1588 return 0; 1589 } 1590 1591 /** 1592 * liquidio_ptp_settime - Set hardware clock time. Reset adjustment 1593 * @ptp: PTP clock info 1594 * @ts: timespec 1595 */ 1596 static int liquidio_ptp_settime(struct ptp_clock_info *ptp, 1597 const struct timespec64 *ts) 1598 { 1599 u64 ns; 1600 unsigned long flags; 1601 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1602 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1603 1604 ns = timespec64_to_ns(ts); 1605 1606 spin_lock_irqsave(&lio->ptp_lock, flags); 1607 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI); 1608 lio->ptp_adjust = 0; 1609 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1610 1611 return 0; 1612 } 1613 1614 /** 1615 * liquidio_ptp_enable - Check if PTP is enabled 1616 * @ptp: PTP clock info 1617 * @rq: request 1618 * @on: is it on 1619 */ 1620 static int 1621 liquidio_ptp_enable(struct ptp_clock_info __maybe_unused *ptp, 1622 struct ptp_clock_request __maybe_unused *rq, 1623 int __maybe_unused on) 1624 { 1625 return -EOPNOTSUPP; 1626 } 1627 1628 /** 1629 * oct_ptp_open - Open PTP clock source 1630 * @netdev: network device 1631 */ 1632 static void oct_ptp_open(struct net_device *netdev) 1633 { 1634 struct lio *lio = GET_LIO(netdev); 1635 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1636 1637 spin_lock_init(&lio->ptp_lock); 1638 1639 snprintf(lio->ptp_info.name, 16, "%s", netdev->name); 1640 lio->ptp_info.owner = THIS_MODULE; 1641 lio->ptp_info.max_adj = 250000000; 1642 lio->ptp_info.n_alarm = 0; 1643 lio->ptp_info.n_ext_ts = 0; 1644 lio->ptp_info.n_per_out = 0; 1645 lio->ptp_info.pps = 0; 1646 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; 1647 lio->ptp_info.adjtime = liquidio_ptp_adjtime; 1648 lio->ptp_info.gettime64 = liquidio_ptp_gettime; 1649 lio->ptp_info.settime64 = liquidio_ptp_settime; 1650 lio->ptp_info.enable = liquidio_ptp_enable; 1651 1652 lio->ptp_adjust = 0; 1653 1654 lio->ptp_clock = ptp_clock_register(&lio->ptp_info, 1655 &oct->pci_dev->dev); 1656 1657 if (IS_ERR(lio->ptp_clock)) 1658 lio->ptp_clock = NULL; 1659 } 1660 1661 /** 1662 * liquidio_ptp_init - Init PTP clock 1663 * @oct: octeon device 1664 */ 1665 static void liquidio_ptp_init(struct octeon_device *oct) 1666 { 1667 u64 clock_comp, cfg; 1668 1669 clock_comp = (u64)NSEC_PER_SEC << 32; 1670 do_div(clock_comp, oct->coproc_clock_rate); 1671 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1672 1673 /* Enable */ 1674 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG); 1675 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG); 1676 } 1677 1678 /** 1679 * load_firmware - Load firmware to device 1680 * @oct: octeon device 1681 * 1682 * Maps device to firmware filename, requests firmware, and downloads it 1683 */ 1684 static int load_firmware(struct octeon_device *oct) 1685 { 1686 int ret = 0; 1687 const struct firmware *fw; 1688 char fw_name[LIO_MAX_FW_FILENAME_LEN]; 1689 char *tmp_fw_type; 1690 1691 if (fw_type_is_auto()) { 1692 tmp_fw_type = LIO_FW_NAME_TYPE_NIC; 1693 strncpy(fw_type, tmp_fw_type, sizeof(fw_type)); 1694 } else { 1695 tmp_fw_type = fw_type; 1696 } 1697 1698 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME, 1699 octeon_get_conf(oct)->card_name, tmp_fw_type, 1700 LIO_FW_NAME_SUFFIX); 1701 1702 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev); 1703 if (ret) { 1704 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n", 1705 fw_name); 1706 release_firmware(fw); 1707 return ret; 1708 } 1709 1710 ret = octeon_download_firmware(oct, fw->data, fw->size); 1711 1712 release_firmware(fw); 1713 1714 return ret; 1715 } 1716 1717 /** 1718 * octnet_poll_check_txq_status - Poll routine for checking transmit queue status 1719 * @work: work_struct data structure 1720 */ 1721 static void octnet_poll_check_txq_status(struct work_struct *work) 1722 { 1723 struct cavium_wk *wk = (struct cavium_wk *)work; 1724 struct lio *lio = (struct lio *)wk->ctxptr; 1725 1726 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) 1727 return; 1728 1729 check_txq_status(lio); 1730 queue_delayed_work(lio->txq_status_wq.wq, 1731 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1732 } 1733 1734 /** 1735 * setup_tx_poll_fn - Sets up the txq poll check 1736 * @netdev: network device 1737 */ 1738 static inline int setup_tx_poll_fn(struct net_device *netdev) 1739 { 1740 struct lio *lio = GET_LIO(netdev); 1741 struct octeon_device *oct = lio->oct_dev; 1742 1743 lio->txq_status_wq.wq = alloc_workqueue("txq-status", 1744 WQ_MEM_RECLAIM, 0); 1745 if (!lio->txq_status_wq.wq) { 1746 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n"); 1747 return -1; 1748 } 1749 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work, 1750 octnet_poll_check_txq_status); 1751 lio->txq_status_wq.wk.ctxptr = lio; 1752 queue_delayed_work(lio->txq_status_wq.wq, 1753 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1754 return 0; 1755 } 1756 1757 static inline void cleanup_tx_poll_fn(struct net_device *netdev) 1758 { 1759 struct lio *lio = GET_LIO(netdev); 1760 1761 if (lio->txq_status_wq.wq) { 1762 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work); 1763 destroy_workqueue(lio->txq_status_wq.wq); 1764 } 1765 } 1766 1767 /** 1768 * liquidio_open - Net device open for LiquidIO 1769 * @netdev: network device 1770 */ 1771 static int liquidio_open(struct net_device *netdev) 1772 { 1773 struct lio *lio = GET_LIO(netdev); 1774 struct octeon_device *oct = lio->oct_dev; 1775 struct octeon_device_priv *oct_priv = 1776 (struct octeon_device_priv *)oct->priv; 1777 struct napi_struct *napi, *n; 1778 int ret = 0; 1779 1780 if (oct->props[lio->ifidx].napi_enabled == 0) { 1781 tasklet_disable(&oct_priv->droq_tasklet); 1782 1783 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1784 napi_enable(napi); 1785 1786 oct->props[lio->ifidx].napi_enabled = 1; 1787 1788 if (OCTEON_CN23XX_PF(oct)) 1789 oct->droq[0]->ops.poll_mode = 1; 1790 } 1791 1792 if (oct->ptp_enable) 1793 oct_ptp_open(netdev); 1794 1795 ifstate_set(lio, LIO_IFSTATE_RUNNING); 1796 1797 if (!OCTEON_CN23XX_PF(oct) || !oct->msix_on) { 1798 ret = setup_tx_poll_fn(netdev); 1799 if (ret) 1800 goto err_poll; 1801 } 1802 1803 netif_tx_start_all_queues(netdev); 1804 1805 /* Ready for link status updates */ 1806 lio->intf_open = 1; 1807 1808 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n"); 1809 1810 /* tell Octeon to start forwarding packets to host */ 1811 ret = send_rx_ctrl_cmd(lio, 1); 1812 if (ret) 1813 goto err_rx_ctrl; 1814 1815 /* start periodical statistics fetch */ 1816 INIT_DELAYED_WORK(&lio->stats_wk.work, lio_fetch_stats); 1817 lio->stats_wk.ctxptr = lio; 1818 schedule_delayed_work(&lio->stats_wk.work, msecs_to_jiffies 1819 (LIQUIDIO_NDEV_STATS_POLL_TIME_MS)); 1820 1821 dev_info(&oct->pci_dev->dev, "%s interface is opened\n", 1822 netdev->name); 1823 1824 return 0; 1825 1826 err_rx_ctrl: 1827 if (!OCTEON_CN23XX_PF(oct) || !oct->msix_on) 1828 cleanup_tx_poll_fn(netdev); 1829 err_poll: 1830 if (lio->ptp_clock) { 1831 ptp_clock_unregister(lio->ptp_clock); 1832 lio->ptp_clock = NULL; 1833 } 1834 1835 if (oct->props[lio->ifidx].napi_enabled == 1) { 1836 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1837 napi_disable(napi); 1838 1839 oct->props[lio->ifidx].napi_enabled = 0; 1840 1841 if (OCTEON_CN23XX_PF(oct)) 1842 oct->droq[0]->ops.poll_mode = 0; 1843 } 1844 1845 return ret; 1846 } 1847 1848 /** 1849 * liquidio_stop - Net device stop for LiquidIO 1850 * @netdev: network device 1851 */ 1852 static int liquidio_stop(struct net_device *netdev) 1853 { 1854 struct lio *lio = GET_LIO(netdev); 1855 struct octeon_device *oct = lio->oct_dev; 1856 struct octeon_device_priv *oct_priv = 1857 (struct octeon_device_priv *)oct->priv; 1858 struct napi_struct *napi, *n; 1859 int ret = 0; 1860 1861 ifstate_reset(lio, LIO_IFSTATE_RUNNING); 1862 1863 /* Stop any link updates */ 1864 lio->intf_open = 0; 1865 1866 stop_txqs(netdev); 1867 1868 /* Inform that netif carrier is down */ 1869 netif_carrier_off(netdev); 1870 netif_tx_disable(netdev); 1871 1872 lio->linfo.link.s.link_up = 0; 1873 lio->link_changes++; 1874 1875 /* Tell Octeon that nic interface is down. */ 1876 ret = send_rx_ctrl_cmd(lio, 0); 1877 if (ret) 1878 return ret; 1879 1880 if (OCTEON_CN23XX_PF(oct)) { 1881 if (!oct->msix_on) 1882 cleanup_tx_poll_fn(netdev); 1883 } else { 1884 cleanup_tx_poll_fn(netdev); 1885 } 1886 1887 cancel_delayed_work_sync(&lio->stats_wk.work); 1888 1889 if (lio->ptp_clock) { 1890 ptp_clock_unregister(lio->ptp_clock); 1891 lio->ptp_clock = NULL; 1892 } 1893 1894 /* Wait for any pending Rx descriptors */ 1895 if (lio_wait_for_clean_oq(oct)) 1896 netif_info(lio, rx_err, lio->netdev, 1897 "Proceeding with stop interface after partial RX desc processing\n"); 1898 1899 if (oct->props[lio->ifidx].napi_enabled == 1) { 1900 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1901 napi_disable(napi); 1902 1903 oct->props[lio->ifidx].napi_enabled = 0; 1904 1905 if (OCTEON_CN23XX_PF(oct)) 1906 oct->droq[0]->ops.poll_mode = 0; 1907 1908 tasklet_enable(&oct_priv->droq_tasklet); 1909 } 1910 1911 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name); 1912 1913 return ret; 1914 } 1915 1916 /** 1917 * get_new_flags - Converts a mask based on net device flags 1918 * @netdev: network device 1919 * 1920 * This routine generates a octnet_ifflags mask from the net device flags 1921 * received from the OS. 1922 */ 1923 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev) 1924 { 1925 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST; 1926 1927 if (netdev->flags & IFF_PROMISC) 1928 f |= OCTNET_IFFLAG_PROMISC; 1929 1930 if (netdev->flags & IFF_ALLMULTI) 1931 f |= OCTNET_IFFLAG_ALLMULTI; 1932 1933 if (netdev->flags & IFF_MULTICAST) { 1934 f |= OCTNET_IFFLAG_MULTICAST; 1935 1936 /* Accept all multicast addresses if there are more than we 1937 * can handle 1938 */ 1939 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR) 1940 f |= OCTNET_IFFLAG_ALLMULTI; 1941 } 1942 1943 if (netdev->flags & IFF_BROADCAST) 1944 f |= OCTNET_IFFLAG_BROADCAST; 1945 1946 return f; 1947 } 1948 1949 /** 1950 * liquidio_set_mcast_list - Net device set_multicast_list 1951 * @netdev: network device 1952 */ 1953 static void liquidio_set_mcast_list(struct net_device *netdev) 1954 { 1955 struct lio *lio = GET_LIO(netdev); 1956 struct octeon_device *oct = lio->oct_dev; 1957 struct octnic_ctrl_pkt nctrl; 1958 struct netdev_hw_addr *ha; 1959 u64 *mc; 1960 int ret; 1961 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR); 1962 1963 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 1964 1965 /* Create a ctrl pkt command to be sent to core app. */ 1966 nctrl.ncmd.u64 = 0; 1967 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST; 1968 nctrl.ncmd.s.param1 = get_new_flags(netdev); 1969 nctrl.ncmd.s.param2 = mc_count; 1970 nctrl.ncmd.s.more = mc_count; 1971 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 1972 nctrl.netpndev = (u64)netdev; 1973 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 1974 1975 /* copy all the addresses into the udd */ 1976 mc = &nctrl.udd[0]; 1977 netdev_for_each_mc_addr(ha, netdev) { 1978 *mc = 0; 1979 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN); 1980 /* no need to swap bytes */ 1981 1982 if (++mc > &nctrl.udd[mc_count]) 1983 break; 1984 } 1985 1986 /* Apparently, any activity in this call from the kernel has to 1987 * be atomic. So we won't wait for response. 1988 */ 1989 1990 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 1991 if (ret) { 1992 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n", 1993 ret); 1994 } 1995 } 1996 1997 /** 1998 * liquidio_set_mac - Net device set_mac_address 1999 * @netdev: network device 2000 * @p: pointer to sockaddr 2001 */ 2002 static int liquidio_set_mac(struct net_device *netdev, void *p) 2003 { 2004 int ret = 0; 2005 struct lio *lio = GET_LIO(netdev); 2006 struct octeon_device *oct = lio->oct_dev; 2007 struct sockaddr *addr = (struct sockaddr *)p; 2008 struct octnic_ctrl_pkt nctrl; 2009 2010 if (!is_valid_ether_addr(addr->sa_data)) 2011 return -EADDRNOTAVAIL; 2012 2013 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2014 2015 nctrl.ncmd.u64 = 0; 2016 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2017 nctrl.ncmd.s.param1 = 0; 2018 nctrl.ncmd.s.more = 1; 2019 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2020 nctrl.netpndev = (u64)netdev; 2021 2022 nctrl.udd[0] = 0; 2023 /* The MAC Address is presented in network byte order. */ 2024 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN); 2025 2026 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2027 if (ret < 0) { 2028 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n"); 2029 return -ENOMEM; 2030 } 2031 2032 if (nctrl.sc_status) { 2033 dev_err(&oct->pci_dev->dev, 2034 "%s: MAC Address change failed. sc return=%x\n", 2035 __func__, nctrl.sc_status); 2036 return -EIO; 2037 } 2038 2039 eth_hw_addr_set(netdev, addr->sa_data); 2040 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN); 2041 2042 return 0; 2043 } 2044 2045 static void 2046 liquidio_get_stats64(struct net_device *netdev, 2047 struct rtnl_link_stats64 *lstats) 2048 { 2049 struct lio *lio = GET_LIO(netdev); 2050 struct octeon_device *oct; 2051 u64 pkts = 0, drop = 0, bytes = 0; 2052 struct oct_droq_stats *oq_stats; 2053 struct oct_iq_stats *iq_stats; 2054 int i, iq_no, oq_no; 2055 2056 oct = lio->oct_dev; 2057 2058 if (ifstate_check(lio, LIO_IFSTATE_RESETTING)) 2059 return; 2060 2061 for (i = 0; i < oct->num_iqs; i++) { 2062 iq_no = lio->linfo.txpciq[i].s.q_no; 2063 iq_stats = &oct->instr_queue[iq_no]->stats; 2064 pkts += iq_stats->tx_done; 2065 drop += iq_stats->tx_dropped; 2066 bytes += iq_stats->tx_tot_bytes; 2067 } 2068 2069 lstats->tx_packets = pkts; 2070 lstats->tx_bytes = bytes; 2071 lstats->tx_dropped = drop; 2072 2073 pkts = 0; 2074 drop = 0; 2075 bytes = 0; 2076 2077 for (i = 0; i < oct->num_oqs; i++) { 2078 oq_no = lio->linfo.rxpciq[i].s.q_no; 2079 oq_stats = &oct->droq[oq_no]->stats; 2080 pkts += oq_stats->rx_pkts_received; 2081 drop += (oq_stats->rx_dropped + 2082 oq_stats->dropped_nodispatch + 2083 oq_stats->dropped_toomany + 2084 oq_stats->dropped_nomem); 2085 bytes += oq_stats->rx_bytes_received; 2086 } 2087 2088 lstats->rx_bytes = bytes; 2089 lstats->rx_packets = pkts; 2090 lstats->rx_dropped = drop; 2091 2092 lstats->multicast = oct->link_stats.fromwire.fw_total_mcast; 2093 lstats->collisions = oct->link_stats.fromhost.total_collisions; 2094 2095 /* detailed rx_errors: */ 2096 lstats->rx_length_errors = oct->link_stats.fromwire.l2_err; 2097 /* recved pkt with crc error */ 2098 lstats->rx_crc_errors = oct->link_stats.fromwire.fcs_err; 2099 /* recv'd frame alignment error */ 2100 lstats->rx_frame_errors = oct->link_stats.fromwire.frame_err; 2101 /* recv'r fifo overrun */ 2102 lstats->rx_fifo_errors = oct->link_stats.fromwire.fifo_err; 2103 2104 lstats->rx_errors = lstats->rx_length_errors + lstats->rx_crc_errors + 2105 lstats->rx_frame_errors + lstats->rx_fifo_errors; 2106 2107 /* detailed tx_errors */ 2108 lstats->tx_aborted_errors = oct->link_stats.fromhost.fw_err_pko; 2109 lstats->tx_carrier_errors = oct->link_stats.fromhost.fw_err_link; 2110 lstats->tx_fifo_errors = oct->link_stats.fromhost.fifo_err; 2111 2112 lstats->tx_errors = lstats->tx_aborted_errors + 2113 lstats->tx_carrier_errors + 2114 lstats->tx_fifo_errors; 2115 } 2116 2117 /** 2118 * hwtstamp_ioctl - Handler for SIOCSHWTSTAMP ioctl 2119 * @netdev: network device 2120 * @ifr: interface request 2121 */ 2122 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 2123 { 2124 struct hwtstamp_config conf; 2125 struct lio *lio = GET_LIO(netdev); 2126 2127 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf))) 2128 return -EFAULT; 2129 2130 switch (conf.tx_type) { 2131 case HWTSTAMP_TX_ON: 2132 case HWTSTAMP_TX_OFF: 2133 break; 2134 default: 2135 return -ERANGE; 2136 } 2137 2138 switch (conf.rx_filter) { 2139 case HWTSTAMP_FILTER_NONE: 2140 break; 2141 case HWTSTAMP_FILTER_ALL: 2142 case HWTSTAMP_FILTER_SOME: 2143 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2144 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2145 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2146 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2147 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2148 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2149 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2150 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2151 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2152 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2153 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2154 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2155 case HWTSTAMP_FILTER_NTP_ALL: 2156 conf.rx_filter = HWTSTAMP_FILTER_ALL; 2157 break; 2158 default: 2159 return -ERANGE; 2160 } 2161 2162 if (conf.rx_filter == HWTSTAMP_FILTER_ALL) 2163 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2164 2165 else 2166 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2167 2168 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0; 2169 } 2170 2171 /** 2172 * liquidio_ioctl - ioctl handler 2173 * @netdev: network device 2174 * @ifr: interface request 2175 * @cmd: command 2176 */ 2177 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2178 { 2179 struct lio *lio = GET_LIO(netdev); 2180 2181 switch (cmd) { 2182 case SIOCSHWTSTAMP: 2183 if (lio->oct_dev->ptp_enable) 2184 return hwtstamp_ioctl(netdev, ifr); 2185 fallthrough; 2186 default: 2187 return -EOPNOTSUPP; 2188 } 2189 } 2190 2191 /** 2192 * handle_timestamp - handle a Tx timestamp response 2193 * @oct: octeon device 2194 * @status: response status 2195 * @buf: pointer to skb 2196 */ 2197 static void handle_timestamp(struct octeon_device *oct, 2198 u32 status, 2199 void *buf) 2200 { 2201 struct octnet_buf_free_info *finfo; 2202 struct octeon_soft_command *sc; 2203 struct oct_timestamp_resp *resp; 2204 struct lio *lio; 2205 struct sk_buff *skb = (struct sk_buff *)buf; 2206 2207 finfo = (struct octnet_buf_free_info *)skb->cb; 2208 lio = finfo->lio; 2209 sc = finfo->sc; 2210 oct = lio->oct_dev; 2211 resp = (struct oct_timestamp_resp *)sc->virtrptr; 2212 2213 if (status != OCTEON_REQUEST_DONE) { 2214 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n", 2215 CVM_CAST64(status)); 2216 resp->timestamp = 0; 2217 } 2218 2219 octeon_swap_8B_data(&resp->timestamp, 1); 2220 2221 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) { 2222 struct skb_shared_hwtstamps ts; 2223 u64 ns = resp->timestamp; 2224 2225 netif_info(lio, tx_done, lio->netdev, 2226 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n", 2227 skb, (unsigned long long)ns); 2228 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust); 2229 skb_tstamp_tx(skb, &ts); 2230 } 2231 2232 octeon_free_soft_command(oct, sc); 2233 tx_buffer_free(skb); 2234 } 2235 2236 /** 2237 * send_nic_timestamp_pkt - Send a data packet that will be timestamped 2238 * @oct: octeon device 2239 * @ndata: pointer to network data 2240 * @finfo: pointer to private network data 2241 * @xmit_more: more is coming 2242 */ 2243 static inline int send_nic_timestamp_pkt(struct octeon_device *oct, 2244 struct octnic_data_pkt *ndata, 2245 struct octnet_buf_free_info *finfo, 2246 int xmit_more) 2247 { 2248 int retval; 2249 struct octeon_soft_command *sc; 2250 struct lio *lio; 2251 int ring_doorbell; 2252 u32 len; 2253 2254 lio = finfo->lio; 2255 2256 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd, 2257 sizeof(struct oct_timestamp_resp)); 2258 finfo->sc = sc; 2259 2260 if (!sc) { 2261 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n"); 2262 return IQ_SEND_FAILED; 2263 } 2264 2265 if (ndata->reqtype == REQTYPE_NORESP_NET) 2266 ndata->reqtype = REQTYPE_RESP_NET; 2267 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG) 2268 ndata->reqtype = REQTYPE_RESP_NET_SG; 2269 2270 sc->callback = handle_timestamp; 2271 sc->callback_arg = finfo->skb; 2272 sc->iq_no = ndata->q_no; 2273 2274 if (OCTEON_CN23XX_PF(oct)) 2275 len = (u32)((struct octeon_instr_ih3 *) 2276 (&sc->cmd.cmd3.ih3))->dlengsz; 2277 else 2278 len = (u32)((struct octeon_instr_ih2 *) 2279 (&sc->cmd.cmd2.ih2))->dlengsz; 2280 2281 ring_doorbell = !xmit_more; 2282 2283 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd, 2284 sc, len, ndata->reqtype); 2285 2286 if (retval == IQ_SEND_FAILED) { 2287 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n", 2288 retval); 2289 octeon_free_soft_command(oct, sc); 2290 } else { 2291 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n"); 2292 } 2293 2294 return retval; 2295 } 2296 2297 /** 2298 * liquidio_xmit - Transmit networks packets to the Octeon interface 2299 * @skb: skbuff struct to be passed to network layer. 2300 * @netdev: pointer to network device 2301 * 2302 * Return: whether the packet was transmitted to the device okay or not 2303 * (NETDEV_TX_OK or NETDEV_TX_BUSY) 2304 */ 2305 static netdev_tx_t liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) 2306 { 2307 struct lio *lio; 2308 struct octnet_buf_free_info *finfo; 2309 union octnic_cmd_setup cmdsetup; 2310 struct octnic_data_pkt ndata; 2311 struct octeon_device *oct; 2312 struct oct_iq_stats *stats; 2313 struct octeon_instr_irh *irh; 2314 union tx_info *tx_info; 2315 int status = 0; 2316 int q_idx = 0, iq_no = 0; 2317 int j, xmit_more = 0; 2318 u64 dptr = 0; 2319 u32 tag = 0; 2320 2321 lio = GET_LIO(netdev); 2322 oct = lio->oct_dev; 2323 2324 q_idx = skb_iq(oct, skb); 2325 tag = q_idx; 2326 iq_no = lio->linfo.txpciq[q_idx].s.q_no; 2327 2328 stats = &oct->instr_queue[iq_no]->stats; 2329 2330 /* Check for all conditions in which the current packet cannot be 2331 * transmitted. 2332 */ 2333 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) || 2334 (!lio->linfo.link.s.link_up) || 2335 (skb->len <= 0)) { 2336 netif_info(lio, tx_err, lio->netdev, 2337 "Transmit failed link_status : %d\n", 2338 lio->linfo.link.s.link_up); 2339 goto lio_xmit_failed; 2340 } 2341 2342 /* Use space in skb->cb to store info used to unmap and 2343 * free the buffers. 2344 */ 2345 finfo = (struct octnet_buf_free_info *)skb->cb; 2346 finfo->lio = lio; 2347 finfo->skb = skb; 2348 finfo->sc = NULL; 2349 2350 /* Prepare the attributes for the data to be passed to OSI. */ 2351 memset(&ndata, 0, sizeof(struct octnic_data_pkt)); 2352 2353 ndata.buf = (void *)finfo; 2354 2355 ndata.q_no = iq_no; 2356 2357 if (octnet_iq_is_full(oct, ndata.q_no)) { 2358 /* defer sending if queue is full */ 2359 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", 2360 ndata.q_no); 2361 stats->tx_iq_busy++; 2362 return NETDEV_TX_BUSY; 2363 } 2364 2365 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n", 2366 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no); 2367 */ 2368 2369 ndata.datasize = skb->len; 2370 2371 cmdsetup.u64 = 0; 2372 cmdsetup.s.iq_no = iq_no; 2373 2374 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2375 if (skb->encapsulation) { 2376 cmdsetup.s.tnl_csum = 1; 2377 stats->tx_vxlan++; 2378 } else { 2379 cmdsetup.s.transport_csum = 1; 2380 } 2381 } 2382 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { 2383 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2384 cmdsetup.s.timestamp = 1; 2385 } 2386 2387 if (skb_shinfo(skb)->nr_frags == 0) { 2388 cmdsetup.s.u.datasize = skb->len; 2389 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2390 2391 /* Offload checksum calculation for TCP/UDP packets */ 2392 dptr = dma_map_single(&oct->pci_dev->dev, 2393 skb->data, 2394 skb->len, 2395 DMA_TO_DEVICE); 2396 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { 2397 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n", 2398 __func__); 2399 stats->tx_dmamap_fail++; 2400 return NETDEV_TX_BUSY; 2401 } 2402 2403 if (OCTEON_CN23XX_PF(oct)) 2404 ndata.cmd.cmd3.dptr = dptr; 2405 else 2406 ndata.cmd.cmd2.dptr = dptr; 2407 finfo->dptr = dptr; 2408 ndata.reqtype = REQTYPE_NORESP_NET; 2409 2410 } else { 2411 int i, frags; 2412 skb_frag_t *frag; 2413 struct octnic_gather *g; 2414 2415 spin_lock(&lio->glist_lock[q_idx]); 2416 g = (struct octnic_gather *) 2417 lio_list_delete_head(&lio->glist[q_idx]); 2418 spin_unlock(&lio->glist_lock[q_idx]); 2419 2420 if (!g) { 2421 netif_info(lio, tx_err, lio->netdev, 2422 "Transmit scatter gather: glist null!\n"); 2423 goto lio_xmit_failed; 2424 } 2425 2426 cmdsetup.s.gather = 1; 2427 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1); 2428 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2429 2430 memset(g->sg, 0, g->sg_size); 2431 2432 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev, 2433 skb->data, 2434 (skb->len - skb->data_len), 2435 DMA_TO_DEVICE); 2436 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) { 2437 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n", 2438 __func__); 2439 stats->tx_dmamap_fail++; 2440 return NETDEV_TX_BUSY; 2441 } 2442 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0); 2443 2444 frags = skb_shinfo(skb)->nr_frags; 2445 i = 1; 2446 while (frags--) { 2447 frag = &skb_shinfo(skb)->frags[i - 1]; 2448 2449 g->sg[(i >> 2)].ptr[(i & 3)] = 2450 skb_frag_dma_map(&oct->pci_dev->dev, 2451 frag, 0, skb_frag_size(frag), 2452 DMA_TO_DEVICE); 2453 2454 if (dma_mapping_error(&oct->pci_dev->dev, 2455 g->sg[i >> 2].ptr[i & 3])) { 2456 dma_unmap_single(&oct->pci_dev->dev, 2457 g->sg[0].ptr[0], 2458 skb->len - skb->data_len, 2459 DMA_TO_DEVICE); 2460 for (j = 1; j < i; j++) { 2461 frag = &skb_shinfo(skb)->frags[j - 1]; 2462 dma_unmap_page(&oct->pci_dev->dev, 2463 g->sg[j >> 2].ptr[j & 3], 2464 skb_frag_size(frag), 2465 DMA_TO_DEVICE); 2466 } 2467 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n", 2468 __func__); 2469 return NETDEV_TX_BUSY; 2470 } 2471 2472 add_sg_size(&g->sg[(i >> 2)], skb_frag_size(frag), 2473 (i & 3)); 2474 i++; 2475 } 2476 2477 dptr = g->sg_dma_ptr; 2478 2479 if (OCTEON_CN23XX_PF(oct)) 2480 ndata.cmd.cmd3.dptr = dptr; 2481 else 2482 ndata.cmd.cmd2.dptr = dptr; 2483 finfo->dptr = dptr; 2484 finfo->g = g; 2485 2486 ndata.reqtype = REQTYPE_NORESP_NET_SG; 2487 } 2488 2489 if (OCTEON_CN23XX_PF(oct)) { 2490 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh; 2491 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0]; 2492 } else { 2493 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh; 2494 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0]; 2495 } 2496 2497 if (skb_shinfo(skb)->gso_size) { 2498 tx_info->s.gso_size = skb_shinfo(skb)->gso_size; 2499 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs; 2500 stats->tx_gso++; 2501 } 2502 2503 /* HW insert VLAN tag */ 2504 if (skb_vlan_tag_present(skb)) { 2505 irh->priority = skb_vlan_tag_get(skb) >> 13; 2506 irh->vlan = skb_vlan_tag_get(skb) & 0xfff; 2507 } 2508 2509 xmit_more = netdev_xmit_more(); 2510 2511 if (unlikely(cmdsetup.s.timestamp)) 2512 status = send_nic_timestamp_pkt(oct, &ndata, finfo, xmit_more); 2513 else 2514 status = octnet_send_nic_data_pkt(oct, &ndata, xmit_more); 2515 if (status == IQ_SEND_FAILED) 2516 goto lio_xmit_failed; 2517 2518 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n"); 2519 2520 if (status == IQ_SEND_STOP) 2521 netif_stop_subqueue(netdev, q_idx); 2522 2523 netif_trans_update(netdev); 2524 2525 if (tx_info->s.gso_segs) 2526 stats->tx_done += tx_info->s.gso_segs; 2527 else 2528 stats->tx_done++; 2529 stats->tx_tot_bytes += ndata.datasize; 2530 2531 return NETDEV_TX_OK; 2532 2533 lio_xmit_failed: 2534 stats->tx_dropped++; 2535 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n", 2536 iq_no, stats->tx_dropped); 2537 if (dptr) 2538 dma_unmap_single(&oct->pci_dev->dev, dptr, 2539 ndata.datasize, DMA_TO_DEVICE); 2540 2541 octeon_ring_doorbell_locked(oct, iq_no); 2542 2543 tx_buffer_free(skb); 2544 return NETDEV_TX_OK; 2545 } 2546 2547 /** 2548 * liquidio_tx_timeout - Network device Tx timeout 2549 * @netdev: pointer to network device 2550 * @txqueue: index of the hung transmit queue 2551 */ 2552 static void liquidio_tx_timeout(struct net_device *netdev, unsigned int txqueue) 2553 { 2554 struct lio *lio; 2555 2556 lio = GET_LIO(netdev); 2557 2558 netif_info(lio, tx_err, lio->netdev, 2559 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n", 2560 netdev->stats.tx_dropped); 2561 netif_trans_update(netdev); 2562 wake_txqs(netdev); 2563 } 2564 2565 static int liquidio_vlan_rx_add_vid(struct net_device *netdev, 2566 __be16 proto __attribute__((unused)), 2567 u16 vid) 2568 { 2569 struct lio *lio = GET_LIO(netdev); 2570 struct octeon_device *oct = lio->oct_dev; 2571 struct octnic_ctrl_pkt nctrl; 2572 int ret = 0; 2573 2574 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2575 2576 nctrl.ncmd.u64 = 0; 2577 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2578 nctrl.ncmd.s.param1 = vid; 2579 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2580 nctrl.netpndev = (u64)netdev; 2581 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2582 2583 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2584 if (ret) { 2585 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", 2586 ret); 2587 if (ret > 0) 2588 ret = -EIO; 2589 } 2590 2591 return ret; 2592 } 2593 2594 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev, 2595 __be16 proto __attribute__((unused)), 2596 u16 vid) 2597 { 2598 struct lio *lio = GET_LIO(netdev); 2599 struct octeon_device *oct = lio->oct_dev; 2600 struct octnic_ctrl_pkt nctrl; 2601 int ret = 0; 2602 2603 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2604 2605 nctrl.ncmd.u64 = 0; 2606 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2607 nctrl.ncmd.s.param1 = vid; 2608 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2609 nctrl.netpndev = (u64)netdev; 2610 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2611 2612 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2613 if (ret) { 2614 dev_err(&oct->pci_dev->dev, "Del VLAN filter failed in core (ret: 0x%x)\n", 2615 ret); 2616 if (ret > 0) 2617 ret = -EIO; 2618 } 2619 return ret; 2620 } 2621 2622 /** 2623 * liquidio_set_rxcsum_command - Sending command to enable/disable RX checksum offload 2624 * @netdev: pointer to network device 2625 * @command: OCTNET_CMD_TNL_RX_CSUM_CTL 2626 * @rx_cmd: OCTNET_CMD_RXCSUM_ENABLE/OCTNET_CMD_RXCSUM_DISABLE 2627 * Returns: SUCCESS or FAILURE 2628 */ 2629 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command, 2630 u8 rx_cmd) 2631 { 2632 struct lio *lio = GET_LIO(netdev); 2633 struct octeon_device *oct = lio->oct_dev; 2634 struct octnic_ctrl_pkt nctrl; 2635 int ret = 0; 2636 2637 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2638 2639 nctrl.ncmd.u64 = 0; 2640 nctrl.ncmd.s.cmd = command; 2641 nctrl.ncmd.s.param1 = rx_cmd; 2642 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2643 nctrl.netpndev = (u64)netdev; 2644 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2645 2646 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2647 if (ret) { 2648 dev_err(&oct->pci_dev->dev, 2649 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n", 2650 ret); 2651 if (ret > 0) 2652 ret = -EIO; 2653 } 2654 return ret; 2655 } 2656 2657 /** 2658 * liquidio_vxlan_port_command - Sending command to add/delete VxLAN UDP port to firmware 2659 * @netdev: pointer to network device 2660 * @command: OCTNET_CMD_VXLAN_PORT_CONFIG 2661 * @vxlan_port: VxLAN port to be added or deleted 2662 * @vxlan_cmd_bit: OCTNET_CMD_VXLAN_PORT_ADD, 2663 * OCTNET_CMD_VXLAN_PORT_DEL 2664 * Return: SUCCESS or FAILURE 2665 */ 2666 static int liquidio_vxlan_port_command(struct net_device *netdev, int command, 2667 u16 vxlan_port, u8 vxlan_cmd_bit) 2668 { 2669 struct lio *lio = GET_LIO(netdev); 2670 struct octeon_device *oct = lio->oct_dev; 2671 struct octnic_ctrl_pkt nctrl; 2672 int ret = 0; 2673 2674 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2675 2676 nctrl.ncmd.u64 = 0; 2677 nctrl.ncmd.s.cmd = command; 2678 nctrl.ncmd.s.more = vxlan_cmd_bit; 2679 nctrl.ncmd.s.param1 = vxlan_port; 2680 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2681 nctrl.netpndev = (u64)netdev; 2682 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2683 2684 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2685 if (ret) { 2686 dev_err(&oct->pci_dev->dev, 2687 "VxLAN port add/delete failed in core (ret:0x%x)\n", 2688 ret); 2689 if (ret > 0) 2690 ret = -EIO; 2691 } 2692 return ret; 2693 } 2694 2695 static int liquidio_udp_tunnel_set_port(struct net_device *netdev, 2696 unsigned int table, unsigned int entry, 2697 struct udp_tunnel_info *ti) 2698 { 2699 return liquidio_vxlan_port_command(netdev, 2700 OCTNET_CMD_VXLAN_PORT_CONFIG, 2701 htons(ti->port), 2702 OCTNET_CMD_VXLAN_PORT_ADD); 2703 } 2704 2705 static int liquidio_udp_tunnel_unset_port(struct net_device *netdev, 2706 unsigned int table, 2707 unsigned int entry, 2708 struct udp_tunnel_info *ti) 2709 { 2710 return liquidio_vxlan_port_command(netdev, 2711 OCTNET_CMD_VXLAN_PORT_CONFIG, 2712 htons(ti->port), 2713 OCTNET_CMD_VXLAN_PORT_DEL); 2714 } 2715 2716 static const struct udp_tunnel_nic_info liquidio_udp_tunnels = { 2717 .set_port = liquidio_udp_tunnel_set_port, 2718 .unset_port = liquidio_udp_tunnel_unset_port, 2719 .tables = { 2720 { .n_entries = 1024, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 2721 }, 2722 }; 2723 2724 /** 2725 * liquidio_fix_features - Net device fix features 2726 * @netdev: pointer to network device 2727 * @request: features requested 2728 * Return: updated features list 2729 */ 2730 static netdev_features_t liquidio_fix_features(struct net_device *netdev, 2731 netdev_features_t request) 2732 { 2733 struct lio *lio = netdev_priv(netdev); 2734 2735 if ((request & NETIF_F_RXCSUM) && 2736 !(lio->dev_capability & NETIF_F_RXCSUM)) 2737 request &= ~NETIF_F_RXCSUM; 2738 2739 if ((request & NETIF_F_HW_CSUM) && 2740 !(lio->dev_capability & NETIF_F_HW_CSUM)) 2741 request &= ~NETIF_F_HW_CSUM; 2742 2743 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO)) 2744 request &= ~NETIF_F_TSO; 2745 2746 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6)) 2747 request &= ~NETIF_F_TSO6; 2748 2749 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO)) 2750 request &= ~NETIF_F_LRO; 2751 2752 /*Disable LRO if RXCSUM is off */ 2753 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) && 2754 (lio->dev_capability & NETIF_F_LRO)) 2755 request &= ~NETIF_F_LRO; 2756 2757 if ((request & NETIF_F_HW_VLAN_CTAG_FILTER) && 2758 !(lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER)) 2759 request &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 2760 2761 return request; 2762 } 2763 2764 /** 2765 * liquidio_set_features - Net device set features 2766 * @netdev: pointer to network device 2767 * @features: features to enable/disable 2768 */ 2769 static int liquidio_set_features(struct net_device *netdev, 2770 netdev_features_t features) 2771 { 2772 struct lio *lio = netdev_priv(netdev); 2773 2774 if ((features & NETIF_F_LRO) && 2775 (lio->dev_capability & NETIF_F_LRO) && 2776 !(netdev->features & NETIF_F_LRO)) 2777 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 2778 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2779 else if (!(features & NETIF_F_LRO) && 2780 (lio->dev_capability & NETIF_F_LRO) && 2781 (netdev->features & NETIF_F_LRO)) 2782 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE, 2783 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2784 2785 /* Sending command to firmware to enable/disable RX checksum 2786 * offload settings using ethtool 2787 */ 2788 if (!(netdev->features & NETIF_F_RXCSUM) && 2789 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2790 (features & NETIF_F_RXCSUM)) 2791 liquidio_set_rxcsum_command(netdev, 2792 OCTNET_CMD_TNL_RX_CSUM_CTL, 2793 OCTNET_CMD_RXCSUM_ENABLE); 2794 else if ((netdev->features & NETIF_F_RXCSUM) && 2795 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2796 !(features & NETIF_F_RXCSUM)) 2797 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 2798 OCTNET_CMD_RXCSUM_DISABLE); 2799 2800 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2801 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2802 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2803 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2804 OCTNET_CMD_VLAN_FILTER_ENABLE); 2805 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2806 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2807 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2808 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2809 OCTNET_CMD_VLAN_FILTER_DISABLE); 2810 2811 return 0; 2812 } 2813 2814 static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx, 2815 u8 *mac, bool is_admin_assigned) 2816 { 2817 struct lio *lio = GET_LIO(netdev); 2818 struct octeon_device *oct = lio->oct_dev; 2819 struct octnic_ctrl_pkt nctrl; 2820 int ret = 0; 2821 2822 if (!is_valid_ether_addr(mac)) 2823 return -EINVAL; 2824 2825 if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs) 2826 return -EINVAL; 2827 2828 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2829 2830 nctrl.ncmd.u64 = 0; 2831 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2832 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 2833 nctrl.ncmd.s.param1 = vfidx + 1; 2834 nctrl.ncmd.s.more = 1; 2835 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2836 nctrl.netpndev = (u64)netdev; 2837 if (is_admin_assigned) { 2838 nctrl.ncmd.s.param2 = true; 2839 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2840 } 2841 2842 nctrl.udd[0] = 0; 2843 /* The MAC Address is presented in network byte order. */ 2844 ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac); 2845 2846 oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0]; 2847 2848 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2849 if (ret > 0) 2850 ret = -EIO; 2851 2852 return ret; 2853 } 2854 2855 static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac) 2856 { 2857 struct lio *lio = GET_LIO(netdev); 2858 struct octeon_device *oct = lio->oct_dev; 2859 int retval; 2860 2861 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2862 return -EINVAL; 2863 2864 retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true); 2865 if (!retval) 2866 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac); 2867 2868 return retval; 2869 } 2870 2871 static int liquidio_set_vf_spoofchk(struct net_device *netdev, int vfidx, 2872 bool enable) 2873 { 2874 struct lio *lio = GET_LIO(netdev); 2875 struct octeon_device *oct = lio->oct_dev; 2876 struct octnic_ctrl_pkt nctrl; 2877 int retval; 2878 2879 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SPOOFCHK_CAP)) { 2880 netif_info(lio, drv, lio->netdev, 2881 "firmware does not support spoofchk\n"); 2882 return -EOPNOTSUPP; 2883 } 2884 2885 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 2886 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 2887 return -EINVAL; 2888 } 2889 2890 if (enable) { 2891 if (oct->sriov_info.vf_spoofchk[vfidx]) 2892 return 0; 2893 } else { 2894 /* Clear */ 2895 if (!oct->sriov_info.vf_spoofchk[vfidx]) 2896 return 0; 2897 } 2898 2899 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2900 nctrl.ncmd.s.cmdgroup = OCTNET_CMD_GROUP1; 2901 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_SPOOFCHK; 2902 nctrl.ncmd.s.param1 = 2903 vfidx + 1; /* vfidx is 0 based, 2904 * but vf_num (param1) is 1 based 2905 */ 2906 nctrl.ncmd.s.param2 = enable; 2907 nctrl.ncmd.s.more = 0; 2908 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2909 nctrl.cb_fn = NULL; 2910 2911 retval = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2912 2913 if (retval) { 2914 netif_info(lio, drv, lio->netdev, 2915 "Failed to set VF %d spoofchk %s\n", vfidx, 2916 enable ? "on" : "off"); 2917 return -1; 2918 } 2919 2920 oct->sriov_info.vf_spoofchk[vfidx] = enable; 2921 netif_info(lio, drv, lio->netdev, "VF %u spoofchk is %s\n", vfidx, 2922 enable ? "on" : "off"); 2923 2924 return 0; 2925 } 2926 2927 static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx, 2928 u16 vlan, u8 qos, __be16 vlan_proto) 2929 { 2930 struct lio *lio = GET_LIO(netdev); 2931 struct octeon_device *oct = lio->oct_dev; 2932 struct octnic_ctrl_pkt nctrl; 2933 u16 vlantci; 2934 int ret = 0; 2935 2936 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2937 return -EINVAL; 2938 2939 if (vlan_proto != htons(ETH_P_8021Q)) 2940 return -EPROTONOSUPPORT; 2941 2942 if (vlan >= VLAN_N_VID || qos > 7) 2943 return -EINVAL; 2944 2945 if (vlan) 2946 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT; 2947 else 2948 vlantci = 0; 2949 2950 if (oct->sriov_info.vf_vlantci[vfidx] == vlantci) 2951 return 0; 2952 2953 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2954 2955 if (vlan) 2956 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2957 else 2958 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2959 2960 nctrl.ncmd.s.param1 = vlantci; 2961 nctrl.ncmd.s.param2 = 2962 vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */ 2963 nctrl.ncmd.s.more = 0; 2964 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2965 nctrl.cb_fn = NULL; 2966 2967 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2968 if (ret) { 2969 if (ret > 0) 2970 ret = -EIO; 2971 return ret; 2972 } 2973 2974 oct->sriov_info.vf_vlantci[vfidx] = vlantci; 2975 2976 return ret; 2977 } 2978 2979 static int liquidio_get_vf_config(struct net_device *netdev, int vfidx, 2980 struct ifla_vf_info *ivi) 2981 { 2982 struct lio *lio = GET_LIO(netdev); 2983 struct octeon_device *oct = lio->oct_dev; 2984 u8 *macaddr; 2985 2986 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2987 return -EINVAL; 2988 2989 memset(ivi, 0, sizeof(struct ifla_vf_info)); 2990 2991 ivi->vf = vfidx; 2992 macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx]; 2993 ether_addr_copy(&ivi->mac[0], macaddr); 2994 ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK; 2995 ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT; 2996 if (oct->sriov_info.trusted_vf.active && 2997 oct->sriov_info.trusted_vf.id == vfidx) 2998 ivi->trusted = true; 2999 else 3000 ivi->trusted = false; 3001 ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx]; 3002 ivi->spoofchk = oct->sriov_info.vf_spoofchk[vfidx]; 3003 ivi->max_tx_rate = lio->linfo.link.s.speed; 3004 ivi->min_tx_rate = 0; 3005 3006 return 0; 3007 } 3008 3009 static int liquidio_send_vf_trust_cmd(struct lio *lio, int vfidx, bool trusted) 3010 { 3011 struct octeon_device *oct = lio->oct_dev; 3012 struct octeon_soft_command *sc; 3013 int retval; 3014 3015 sc = octeon_alloc_soft_command(oct, 0, 16, 0); 3016 if (!sc) 3017 return -ENOMEM; 3018 3019 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 3020 3021 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3022 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 3023 OPCODE_NIC_SET_TRUSTED_VF, 0, vfidx + 1, 3024 trusted); 3025 3026 init_completion(&sc->complete); 3027 sc->sc_status = OCTEON_REQUEST_PENDING; 3028 3029 retval = octeon_send_soft_command(oct, sc); 3030 if (retval == IQ_SEND_FAILED) { 3031 octeon_free_soft_command(oct, sc); 3032 retval = -1; 3033 } else { 3034 /* Wait for response or timeout */ 3035 retval = wait_for_sc_completion_timeout(oct, sc, 0); 3036 if (retval) 3037 return (retval); 3038 3039 WRITE_ONCE(sc->caller_is_done, true); 3040 } 3041 3042 return retval; 3043 } 3044 3045 static int liquidio_set_vf_trust(struct net_device *netdev, int vfidx, 3046 bool setting) 3047 { 3048 struct lio *lio = GET_LIO(netdev); 3049 struct octeon_device *oct = lio->oct_dev; 3050 3051 if (strcmp(oct->fw_info.liquidio_firmware_version, "1.7.1") < 0) { 3052 /* trusted vf is not supported by firmware older than 1.7.1 */ 3053 return -EOPNOTSUPP; 3054 } 3055 3056 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 3057 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 3058 return -EINVAL; 3059 } 3060 3061 if (setting) { 3062 /* Set */ 3063 3064 if (oct->sriov_info.trusted_vf.active && 3065 oct->sriov_info.trusted_vf.id == vfidx) 3066 return 0; 3067 3068 if (oct->sriov_info.trusted_vf.active) { 3069 netif_info(lio, drv, lio->netdev, "More than one trusted VF is not allowed\n"); 3070 return -EPERM; 3071 } 3072 } else { 3073 /* Clear */ 3074 3075 if (!oct->sriov_info.trusted_vf.active) 3076 return 0; 3077 } 3078 3079 if (!liquidio_send_vf_trust_cmd(lio, vfidx, setting)) { 3080 if (setting) { 3081 oct->sriov_info.trusted_vf.id = vfidx; 3082 oct->sriov_info.trusted_vf.active = true; 3083 } else { 3084 oct->sriov_info.trusted_vf.active = false; 3085 } 3086 3087 netif_info(lio, drv, lio->netdev, "VF %u is %strusted\n", vfidx, 3088 setting ? "" : "not "); 3089 } else { 3090 netif_info(lio, drv, lio->netdev, "Failed to set VF trusted\n"); 3091 return -1; 3092 } 3093 3094 return 0; 3095 } 3096 3097 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 3098 int linkstate) 3099 { 3100 struct lio *lio = GET_LIO(netdev); 3101 struct octeon_device *oct = lio->oct_dev; 3102 struct octnic_ctrl_pkt nctrl; 3103 int ret = 0; 3104 3105 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3106 return -EINVAL; 3107 3108 if (oct->sriov_info.vf_linkstate[vfidx] == linkstate) 3109 return 0; 3110 3111 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 3112 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE; 3113 nctrl.ncmd.s.param1 = 3114 vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3115 nctrl.ncmd.s.param2 = linkstate; 3116 nctrl.ncmd.s.more = 0; 3117 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 3118 nctrl.cb_fn = NULL; 3119 3120 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 3121 3122 if (!ret) 3123 oct->sriov_info.vf_linkstate[vfidx] = linkstate; 3124 else if (ret > 0) 3125 ret = -EIO; 3126 3127 return ret; 3128 } 3129 3130 static int 3131 liquidio_eswitch_mode_get(struct devlink *devlink, u16 *mode) 3132 { 3133 struct lio_devlink_priv *priv; 3134 struct octeon_device *oct; 3135 3136 priv = devlink_priv(devlink); 3137 oct = priv->oct; 3138 3139 *mode = oct->eswitch_mode; 3140 3141 return 0; 3142 } 3143 3144 static int 3145 liquidio_eswitch_mode_set(struct devlink *devlink, u16 mode, 3146 struct netlink_ext_ack *extack) 3147 { 3148 struct lio_devlink_priv *priv; 3149 struct octeon_device *oct; 3150 int ret = 0; 3151 3152 priv = devlink_priv(devlink); 3153 oct = priv->oct; 3154 3155 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP)) 3156 return -EINVAL; 3157 3158 if (oct->eswitch_mode == mode) 3159 return 0; 3160 3161 switch (mode) { 3162 case DEVLINK_ESWITCH_MODE_SWITCHDEV: 3163 oct->eswitch_mode = mode; 3164 ret = lio_vf_rep_create(oct); 3165 break; 3166 3167 case DEVLINK_ESWITCH_MODE_LEGACY: 3168 lio_vf_rep_destroy(oct); 3169 oct->eswitch_mode = mode; 3170 break; 3171 3172 default: 3173 ret = -EINVAL; 3174 } 3175 3176 return ret; 3177 } 3178 3179 static const struct devlink_ops liquidio_devlink_ops = { 3180 .eswitch_mode_get = liquidio_eswitch_mode_get, 3181 .eswitch_mode_set = liquidio_eswitch_mode_set, 3182 }; 3183 3184 static int 3185 liquidio_get_port_parent_id(struct net_device *dev, 3186 struct netdev_phys_item_id *ppid) 3187 { 3188 struct lio *lio = GET_LIO(dev); 3189 struct octeon_device *oct = lio->oct_dev; 3190 3191 if (oct->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) 3192 return -EOPNOTSUPP; 3193 3194 ppid->id_len = ETH_ALEN; 3195 ether_addr_copy(ppid->id, (void *)&lio->linfo.hw_addr + 2); 3196 3197 return 0; 3198 } 3199 3200 static int liquidio_get_vf_stats(struct net_device *netdev, int vfidx, 3201 struct ifla_vf_stats *vf_stats) 3202 { 3203 struct lio *lio = GET_LIO(netdev); 3204 struct octeon_device *oct = lio->oct_dev; 3205 struct oct_vf_stats stats; 3206 int ret; 3207 3208 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3209 return -EINVAL; 3210 3211 memset(&stats, 0, sizeof(struct oct_vf_stats)); 3212 ret = cn23xx_get_vf_stats(oct, vfidx, &stats); 3213 if (!ret) { 3214 vf_stats->rx_packets = stats.rx_packets; 3215 vf_stats->tx_packets = stats.tx_packets; 3216 vf_stats->rx_bytes = stats.rx_bytes; 3217 vf_stats->tx_bytes = stats.tx_bytes; 3218 vf_stats->broadcast = stats.broadcast; 3219 vf_stats->multicast = stats.multicast; 3220 } 3221 3222 return ret; 3223 } 3224 3225 static const struct net_device_ops lionetdevops = { 3226 .ndo_open = liquidio_open, 3227 .ndo_stop = liquidio_stop, 3228 .ndo_start_xmit = liquidio_xmit, 3229 .ndo_get_stats64 = liquidio_get_stats64, 3230 .ndo_set_mac_address = liquidio_set_mac, 3231 .ndo_set_rx_mode = liquidio_set_mcast_list, 3232 .ndo_tx_timeout = liquidio_tx_timeout, 3233 3234 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid, 3235 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid, 3236 .ndo_change_mtu = liquidio_change_mtu, 3237 .ndo_eth_ioctl = liquidio_ioctl, 3238 .ndo_fix_features = liquidio_fix_features, 3239 .ndo_set_features = liquidio_set_features, 3240 .ndo_set_vf_mac = liquidio_set_vf_mac, 3241 .ndo_set_vf_vlan = liquidio_set_vf_vlan, 3242 .ndo_get_vf_config = liquidio_get_vf_config, 3243 .ndo_set_vf_spoofchk = liquidio_set_vf_spoofchk, 3244 .ndo_set_vf_trust = liquidio_set_vf_trust, 3245 .ndo_set_vf_link_state = liquidio_set_vf_link_state, 3246 .ndo_get_vf_stats = liquidio_get_vf_stats, 3247 .ndo_get_port_parent_id = liquidio_get_port_parent_id, 3248 }; 3249 3250 /** 3251 * liquidio_init - Entry point for the liquidio module 3252 */ 3253 static int __init liquidio_init(void) 3254 { 3255 int i; 3256 struct handshake *hs; 3257 3258 init_completion(&first_stage); 3259 3260 octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT); 3261 3262 if (liquidio_init_pci()) 3263 return -EINVAL; 3264 3265 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000)); 3266 3267 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3268 hs = &handshake[i]; 3269 if (hs->pci_dev) { 3270 wait_for_completion(&hs->init); 3271 if (!hs->init_ok) { 3272 /* init handshake failed */ 3273 dev_err(&hs->pci_dev->dev, 3274 "Failed to init device\n"); 3275 liquidio_deinit_pci(); 3276 return -EIO; 3277 } 3278 } 3279 } 3280 3281 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3282 hs = &handshake[i]; 3283 if (hs->pci_dev) { 3284 wait_for_completion_timeout(&hs->started, 3285 msecs_to_jiffies(30000)); 3286 if (!hs->started_ok) { 3287 /* starter handshake failed */ 3288 dev_err(&hs->pci_dev->dev, 3289 "Firmware failed to start\n"); 3290 liquidio_deinit_pci(); 3291 return -EIO; 3292 } 3293 } 3294 } 3295 3296 return 0; 3297 } 3298 3299 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf) 3300 { 3301 struct octeon_device *oct = (struct octeon_device *)buf; 3302 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3303 int gmxport = 0; 3304 union oct_link_status *ls; 3305 int i; 3306 3307 if (recv_pkt->buffer_size[0] != (sizeof(*ls) + OCT_DROQ_INFO_SIZE)) { 3308 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n", 3309 recv_pkt->buffer_size[0], 3310 recv_pkt->rh.r_nic_info.gmxport); 3311 goto nic_info_err; 3312 } 3313 3314 gmxport = recv_pkt->rh.r_nic_info.gmxport; 3315 ls = (union oct_link_status *)(get_rbd(recv_pkt->buffer_ptr[0]) + 3316 OCT_DROQ_INFO_SIZE); 3317 3318 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3); 3319 for (i = 0; i < oct->ifcount; i++) { 3320 if (oct->props[i].gmxport == gmxport) { 3321 update_link_status(oct->props[i].netdev, ls); 3322 break; 3323 } 3324 } 3325 3326 nic_info_err: 3327 for (i = 0; i < recv_pkt->buffer_count; i++) 3328 recv_buffer_free(recv_pkt->buffer_ptr[i]); 3329 octeon_free_recv_info(recv_info); 3330 return 0; 3331 } 3332 3333 /** 3334 * setup_nic_devices - Setup network interfaces 3335 * @octeon_dev: octeon device 3336 * 3337 * Called during init time for each device. It assumes the NIC 3338 * is already up and running. The link information for each 3339 * interface is passed in link_info. 3340 */ 3341 static int setup_nic_devices(struct octeon_device *octeon_dev) 3342 { 3343 struct lio *lio = NULL; 3344 struct net_device *netdev; 3345 u8 mac[6], i, j, *fw_ver, *micro_ver; 3346 unsigned long micro; 3347 u32 cur_ver; 3348 struct octeon_soft_command *sc; 3349 struct liquidio_if_cfg_resp *resp; 3350 struct octdev_props *props; 3351 int retval, num_iqueues, num_oqueues; 3352 int max_num_queues = 0; 3353 union oct_nic_if_cfg if_cfg; 3354 unsigned int base_queue; 3355 unsigned int gmx_port_id; 3356 u32 resp_size, data_size; 3357 u32 ifidx_or_pfnum; 3358 struct lio_version *vdata; 3359 struct devlink *devlink; 3360 struct lio_devlink_priv *lio_devlink; 3361 3362 /* This is to handle link status changes */ 3363 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 3364 OPCODE_NIC_INFO, 3365 lio_nic_info, octeon_dev); 3366 3367 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions. 3368 * They are handled directly. 3369 */ 3370 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET, 3371 free_netbuf); 3372 3373 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG, 3374 free_netsgbuf); 3375 3376 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG, 3377 free_netsgbuf_with_resp); 3378 3379 for (i = 0; i < octeon_dev->ifcount; i++) { 3380 resp_size = sizeof(struct liquidio_if_cfg_resp); 3381 data_size = sizeof(struct lio_version); 3382 sc = (struct octeon_soft_command *) 3383 octeon_alloc_soft_command(octeon_dev, data_size, 3384 resp_size, 0); 3385 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; 3386 vdata = (struct lio_version *)sc->virtdptr; 3387 3388 *((u64 *)vdata) = 0; 3389 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION); 3390 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION); 3391 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION); 3392 3393 if (OCTEON_CN23XX_PF(octeon_dev)) { 3394 num_iqueues = octeon_dev->sriov_info.num_pf_rings; 3395 num_oqueues = octeon_dev->sriov_info.num_pf_rings; 3396 base_queue = octeon_dev->sriov_info.pf_srn; 3397 3398 gmx_port_id = octeon_dev->pf_num; 3399 ifidx_or_pfnum = octeon_dev->pf_num; 3400 } else { 3401 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF( 3402 octeon_get_conf(octeon_dev), i); 3403 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF( 3404 octeon_get_conf(octeon_dev), i); 3405 base_queue = CFG_GET_BASE_QUE_NIC_IF( 3406 octeon_get_conf(octeon_dev), i); 3407 gmx_port_id = CFG_GET_GMXID_NIC_IF( 3408 octeon_get_conf(octeon_dev), i); 3409 ifidx_or_pfnum = i; 3410 } 3411 3412 dev_dbg(&octeon_dev->pci_dev->dev, 3413 "requesting config for interface %d, iqs %d, oqs %d\n", 3414 ifidx_or_pfnum, num_iqueues, num_oqueues); 3415 3416 if_cfg.u64 = 0; 3417 if_cfg.s.num_iqueues = num_iqueues; 3418 if_cfg.s.num_oqueues = num_oqueues; 3419 if_cfg.s.base_queue = base_queue; 3420 if_cfg.s.gmx_port_id = gmx_port_id; 3421 3422 sc->iq_no = 0; 3423 3424 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC, 3425 OPCODE_NIC_IF_CFG, 0, 3426 if_cfg.u64, 0); 3427 3428 init_completion(&sc->complete); 3429 sc->sc_status = OCTEON_REQUEST_PENDING; 3430 3431 retval = octeon_send_soft_command(octeon_dev, sc); 3432 if (retval == IQ_SEND_FAILED) { 3433 dev_err(&octeon_dev->pci_dev->dev, 3434 "iq/oq config failed status: %x\n", 3435 retval); 3436 /* Soft instr is freed by driver in case of failure. */ 3437 octeon_free_soft_command(octeon_dev, sc); 3438 return(-EIO); 3439 } 3440 3441 /* Sleep on a wait queue till the cond flag indicates that the 3442 * response arrived or timed-out. 3443 */ 3444 retval = wait_for_sc_completion_timeout(octeon_dev, sc, 0); 3445 if (retval) 3446 return retval; 3447 3448 retval = resp->status; 3449 if (retval) { 3450 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n"); 3451 WRITE_ONCE(sc->caller_is_done, true); 3452 goto setup_nic_dev_done; 3453 } 3454 snprintf(octeon_dev->fw_info.liquidio_firmware_version, 3455 32, "%s", 3456 resp->cfg_info.liquidio_firmware_version); 3457 3458 /* Verify f/w version (in case of 'auto' loading from flash) */ 3459 fw_ver = octeon_dev->fw_info.liquidio_firmware_version; 3460 if (memcmp(LIQUIDIO_BASE_VERSION, 3461 fw_ver, 3462 strlen(LIQUIDIO_BASE_VERSION))) { 3463 dev_err(&octeon_dev->pci_dev->dev, 3464 "Unmatched firmware version. Expected %s.x, got %s.\n", 3465 LIQUIDIO_BASE_VERSION, fw_ver); 3466 WRITE_ONCE(sc->caller_is_done, true); 3467 goto setup_nic_dev_done; 3468 } else if (atomic_read(octeon_dev->adapter_fw_state) == 3469 FW_IS_PRELOADED) { 3470 dev_info(&octeon_dev->pci_dev->dev, 3471 "Using auto-loaded firmware version %s.\n", 3472 fw_ver); 3473 } 3474 3475 /* extract micro version field; point past '<maj>.<min>.' */ 3476 micro_ver = fw_ver + strlen(LIQUIDIO_BASE_VERSION) + 1; 3477 if (kstrtoul(micro_ver, 10, µ) != 0) 3478 micro = 0; 3479 octeon_dev->fw_info.ver.maj = LIQUIDIO_BASE_MAJOR_VERSION; 3480 octeon_dev->fw_info.ver.min = LIQUIDIO_BASE_MINOR_VERSION; 3481 octeon_dev->fw_info.ver.rev = micro; 3482 3483 octeon_swap_8B_data((u64 *)(&resp->cfg_info), 3484 (sizeof(struct liquidio_if_cfg_info)) >> 3); 3485 3486 num_iqueues = hweight64(resp->cfg_info.iqmask); 3487 num_oqueues = hweight64(resp->cfg_info.oqmask); 3488 3489 if (!(num_iqueues) || !(num_oqueues)) { 3490 dev_err(&octeon_dev->pci_dev->dev, 3491 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n", 3492 resp->cfg_info.iqmask, 3493 resp->cfg_info.oqmask); 3494 WRITE_ONCE(sc->caller_is_done, true); 3495 goto setup_nic_dev_done; 3496 } 3497 3498 if (OCTEON_CN6XXX(octeon_dev)) { 3499 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3500 cn6xxx)); 3501 } else if (OCTEON_CN23XX_PF(octeon_dev)) { 3502 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3503 cn23xx_pf)); 3504 } 3505 3506 dev_dbg(&octeon_dev->pci_dev->dev, 3507 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d max_num_queues: %d\n", 3508 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask, 3509 num_iqueues, num_oqueues, max_num_queues); 3510 netdev = alloc_etherdev_mq(LIO_SIZE, max_num_queues); 3511 3512 if (!netdev) { 3513 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n"); 3514 WRITE_ONCE(sc->caller_is_done, true); 3515 goto setup_nic_dev_done; 3516 } 3517 3518 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev); 3519 3520 /* Associate the routines that will handle different 3521 * netdev tasks. 3522 */ 3523 netdev->netdev_ops = &lionetdevops; 3524 3525 retval = netif_set_real_num_rx_queues(netdev, num_oqueues); 3526 if (retval) { 3527 dev_err(&octeon_dev->pci_dev->dev, 3528 "setting real number rx failed\n"); 3529 WRITE_ONCE(sc->caller_is_done, true); 3530 goto setup_nic_dev_free; 3531 } 3532 3533 retval = netif_set_real_num_tx_queues(netdev, num_iqueues); 3534 if (retval) { 3535 dev_err(&octeon_dev->pci_dev->dev, 3536 "setting real number tx failed\n"); 3537 WRITE_ONCE(sc->caller_is_done, true); 3538 goto setup_nic_dev_free; 3539 } 3540 3541 lio = GET_LIO(netdev); 3542 3543 memset(lio, 0, sizeof(struct lio)); 3544 3545 lio->ifidx = ifidx_or_pfnum; 3546 3547 props = &octeon_dev->props[i]; 3548 props->gmxport = resp->cfg_info.linfo.gmxport; 3549 props->netdev = netdev; 3550 3551 lio->linfo.num_rxpciq = num_oqueues; 3552 lio->linfo.num_txpciq = num_iqueues; 3553 for (j = 0; j < num_oqueues; j++) { 3554 lio->linfo.rxpciq[j].u64 = 3555 resp->cfg_info.linfo.rxpciq[j].u64; 3556 } 3557 for (j = 0; j < num_iqueues; j++) { 3558 lio->linfo.txpciq[j].u64 = 3559 resp->cfg_info.linfo.txpciq[j].u64; 3560 } 3561 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr; 3562 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport; 3563 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64; 3564 3565 WRITE_ONCE(sc->caller_is_done, true); 3566 3567 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3568 3569 if (OCTEON_CN23XX_PF(octeon_dev) || 3570 OCTEON_CN6XXX(octeon_dev)) { 3571 lio->dev_capability = NETIF_F_HIGHDMA 3572 | NETIF_F_IP_CSUM 3573 | NETIF_F_IPV6_CSUM 3574 | NETIF_F_SG | NETIF_F_RXCSUM 3575 | NETIF_F_GRO 3576 | NETIF_F_TSO | NETIF_F_TSO6 3577 | NETIF_F_LRO; 3578 } 3579 netif_set_tso_max_size(netdev, OCTNIC_GSO_MAX_SIZE); 3580 3581 /* Copy of transmit encapsulation capabilities: 3582 * TSO, TSO6, Checksums for this device 3583 */ 3584 lio->enc_dev_capability = NETIF_F_IP_CSUM 3585 | NETIF_F_IPV6_CSUM 3586 | NETIF_F_GSO_UDP_TUNNEL 3587 | NETIF_F_HW_CSUM | NETIF_F_SG 3588 | NETIF_F_RXCSUM 3589 | NETIF_F_TSO | NETIF_F_TSO6 3590 | NETIF_F_LRO; 3591 3592 netdev->hw_enc_features = (lio->enc_dev_capability & 3593 ~NETIF_F_LRO); 3594 3595 netdev->udp_tunnel_nic_info = &liquidio_udp_tunnels; 3596 3597 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL; 3598 3599 netdev->vlan_features = lio->dev_capability; 3600 /* Add any unchangeable hw features */ 3601 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER | 3602 NETIF_F_HW_VLAN_CTAG_RX | 3603 NETIF_F_HW_VLAN_CTAG_TX; 3604 3605 netdev->features = (lio->dev_capability & ~NETIF_F_LRO); 3606 3607 netdev->hw_features = lio->dev_capability; 3608 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/ 3609 netdev->hw_features = netdev->hw_features & 3610 ~NETIF_F_HW_VLAN_CTAG_RX; 3611 3612 /* MTU range: 68 - 16000 */ 3613 netdev->min_mtu = LIO_MIN_MTU_SIZE; 3614 netdev->max_mtu = LIO_MAX_MTU_SIZE; 3615 3616 /* Point to the properties for octeon device to which this 3617 * interface belongs. 3618 */ 3619 lio->oct_dev = octeon_dev; 3620 lio->octprops = props; 3621 lio->netdev = netdev; 3622 3623 dev_dbg(&octeon_dev->pci_dev->dev, 3624 "if%d gmx: %d hw_addr: 0x%llx\n", i, 3625 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr)); 3626 3627 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) { 3628 u8 vfmac[ETH_ALEN]; 3629 3630 eth_random_addr(vfmac); 3631 if (__liquidio_set_vf_mac(netdev, j, vfmac, false)) { 3632 dev_err(&octeon_dev->pci_dev->dev, 3633 "Error setting VF%d MAC address\n", 3634 j); 3635 goto setup_nic_dev_free; 3636 } 3637 } 3638 3639 /* 64-bit swap required on LE machines */ 3640 octeon_swap_8B_data(&lio->linfo.hw_addr, 1); 3641 for (j = 0; j < 6; j++) 3642 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j)); 3643 3644 /* Copy MAC Address to OS network device structure */ 3645 3646 eth_hw_addr_set(netdev, mac); 3647 3648 /* By default all interfaces on a single Octeon uses the same 3649 * tx and rx queues 3650 */ 3651 lio->txq = lio->linfo.txpciq[0].s.q_no; 3652 lio->rxq = lio->linfo.rxpciq[0].s.q_no; 3653 if (liquidio_setup_io_queues(octeon_dev, i, 3654 lio->linfo.num_txpciq, 3655 lio->linfo.num_rxpciq)) { 3656 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n"); 3657 goto setup_nic_dev_free; 3658 } 3659 3660 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS); 3661 3662 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq); 3663 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq); 3664 3665 if (lio_setup_glists(octeon_dev, lio, num_iqueues)) { 3666 dev_err(&octeon_dev->pci_dev->dev, 3667 "Gather list allocation failed\n"); 3668 goto setup_nic_dev_free; 3669 } 3670 3671 /* Register ethtool support */ 3672 liquidio_set_ethtool_ops(netdev); 3673 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID) 3674 octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT; 3675 else 3676 octeon_dev->priv_flags = 0x0; 3677 3678 if (netdev->features & NETIF_F_LRO) 3679 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 3680 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 3681 3682 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 3683 OCTNET_CMD_VLAN_FILTER_ENABLE); 3684 3685 if ((debug != -1) && (debug & NETIF_MSG_HW)) 3686 liquidio_set_feature(netdev, 3687 OCTNET_CMD_VERBOSE_ENABLE, 0); 3688 3689 if (setup_link_status_change_wq(netdev)) 3690 goto setup_nic_dev_free; 3691 3692 if ((octeon_dev->fw_info.app_cap_flags & 3693 LIQUIDIO_TIME_SYNC_CAP) && 3694 setup_sync_octeon_time_wq(netdev)) 3695 goto setup_nic_dev_free; 3696 3697 if (setup_rx_oom_poll_fn(netdev)) 3698 goto setup_nic_dev_free; 3699 3700 /* Register the network device with the OS */ 3701 if (register_netdev(netdev)) { 3702 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n"); 3703 goto setup_nic_dev_free; 3704 } 3705 3706 dev_dbg(&octeon_dev->pci_dev->dev, 3707 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n", 3708 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); 3709 netif_carrier_off(netdev); 3710 lio->link_changes++; 3711 3712 ifstate_set(lio, LIO_IFSTATE_REGISTERED); 3713 3714 /* Sending command to firmware to enable Rx checksum offload 3715 * by default at the time of setup of Liquidio driver for 3716 * this device 3717 */ 3718 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 3719 OCTNET_CMD_RXCSUM_ENABLE); 3720 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL, 3721 OCTNET_CMD_TXCSUM_ENABLE); 3722 3723 dev_dbg(&octeon_dev->pci_dev->dev, 3724 "NIC ifidx:%d Setup successful\n", i); 3725 3726 if (octeon_dev->subsystem_id == 3727 OCTEON_CN2350_25GB_SUBSYS_ID || 3728 octeon_dev->subsystem_id == 3729 OCTEON_CN2360_25GB_SUBSYS_ID) { 3730 cur_ver = OCT_FW_VER(octeon_dev->fw_info.ver.maj, 3731 octeon_dev->fw_info.ver.min, 3732 octeon_dev->fw_info.ver.rev); 3733 3734 /* speed control unsupported in f/w older than 1.7.2 */ 3735 if (cur_ver < OCT_FW_VER(1, 7, 2)) { 3736 dev_info(&octeon_dev->pci_dev->dev, 3737 "speed setting not supported by f/w."); 3738 octeon_dev->speed_setting = 25; 3739 octeon_dev->no_speed_setting = 1; 3740 } else { 3741 liquidio_get_speed(lio); 3742 } 3743 3744 if (octeon_dev->speed_setting == 0) { 3745 octeon_dev->speed_setting = 25; 3746 octeon_dev->no_speed_setting = 1; 3747 } 3748 } else { 3749 octeon_dev->no_speed_setting = 1; 3750 octeon_dev->speed_setting = 10; 3751 } 3752 octeon_dev->speed_boot = octeon_dev->speed_setting; 3753 3754 /* don't read FEC setting if unsupported by f/w (see above) */ 3755 if (octeon_dev->speed_boot == 25 && 3756 !octeon_dev->no_speed_setting) { 3757 liquidio_get_fec(lio); 3758 octeon_dev->props[lio->ifidx].fec_boot = 3759 octeon_dev->props[lio->ifidx].fec; 3760 } 3761 } 3762 3763 device_lock(&octeon_dev->pci_dev->dev); 3764 devlink = devlink_alloc(&liquidio_devlink_ops, 3765 sizeof(struct lio_devlink_priv), 3766 &octeon_dev->pci_dev->dev); 3767 if (!devlink) { 3768 device_unlock(&octeon_dev->pci_dev->dev); 3769 dev_err(&octeon_dev->pci_dev->dev, "devlink alloc failed\n"); 3770 goto setup_nic_dev_free; 3771 } 3772 3773 lio_devlink = devlink_priv(devlink); 3774 lio_devlink->oct = octeon_dev; 3775 3776 octeon_dev->devlink = devlink; 3777 octeon_dev->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY; 3778 devlink_register(devlink); 3779 device_unlock(&octeon_dev->pci_dev->dev); 3780 3781 return 0; 3782 3783 setup_nic_dev_free: 3784 3785 while (i--) { 3786 dev_err(&octeon_dev->pci_dev->dev, 3787 "NIC ifidx:%d Setup failed\n", i); 3788 liquidio_destroy_nic_device(octeon_dev, i); 3789 } 3790 3791 setup_nic_dev_done: 3792 3793 return -ENODEV; 3794 } 3795 3796 #ifdef CONFIG_PCI_IOV 3797 static int octeon_enable_sriov(struct octeon_device *oct) 3798 { 3799 unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced; 3800 struct pci_dev *vfdev; 3801 int err; 3802 u32 u; 3803 3804 if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) { 3805 err = pci_enable_sriov(oct->pci_dev, 3806 oct->sriov_info.num_vfs_alloced); 3807 if (err) { 3808 dev_err(&oct->pci_dev->dev, 3809 "OCTEON: Failed to enable PCI sriov: %d\n", 3810 err); 3811 oct->sriov_info.num_vfs_alloced = 0; 3812 return err; 3813 } 3814 oct->sriov_info.sriov_enabled = 1; 3815 3816 /* init lookup table that maps DPI ring number to VF pci_dev 3817 * struct pointer 3818 */ 3819 u = 0; 3820 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3821 OCTEON_CN23XX_VF_VID, NULL); 3822 while (vfdev) { 3823 if (vfdev->is_virtfn && 3824 (vfdev->physfn == oct->pci_dev)) { 3825 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = 3826 vfdev; 3827 u += oct->sriov_info.rings_per_vf; 3828 } 3829 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3830 OCTEON_CN23XX_VF_VID, vfdev); 3831 } 3832 } 3833 3834 return num_vfs_alloced; 3835 } 3836 3837 static int lio_pci_sriov_disable(struct octeon_device *oct) 3838 { 3839 int u; 3840 3841 if (pci_vfs_assigned(oct->pci_dev)) { 3842 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n"); 3843 return -EPERM; 3844 } 3845 3846 pci_disable_sriov(oct->pci_dev); 3847 3848 u = 0; 3849 while (u < MAX_POSSIBLE_VFS) { 3850 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL; 3851 u += oct->sriov_info.rings_per_vf; 3852 } 3853 3854 oct->sriov_info.num_vfs_alloced = 0; 3855 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n", 3856 oct->pf_num); 3857 3858 return 0; 3859 } 3860 3861 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs) 3862 { 3863 struct octeon_device *oct = pci_get_drvdata(dev); 3864 int ret = 0; 3865 3866 if ((num_vfs == oct->sriov_info.num_vfs_alloced) && 3867 (oct->sriov_info.sriov_enabled)) { 3868 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n", 3869 oct->pf_num, num_vfs); 3870 return 0; 3871 } 3872 3873 if (!num_vfs) { 3874 lio_vf_rep_destroy(oct); 3875 ret = lio_pci_sriov_disable(oct); 3876 } else if (num_vfs > oct->sriov_info.max_vfs) { 3877 dev_err(&oct->pci_dev->dev, 3878 "OCTEON: Max allowed VFs:%d user requested:%d", 3879 oct->sriov_info.max_vfs, num_vfs); 3880 ret = -EPERM; 3881 } else { 3882 oct->sriov_info.num_vfs_alloced = num_vfs; 3883 ret = octeon_enable_sriov(oct); 3884 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n", 3885 oct->pf_num, num_vfs); 3886 ret = lio_vf_rep_create(oct); 3887 if (ret) 3888 dev_info(&oct->pci_dev->dev, 3889 "vf representor create failed"); 3890 } 3891 3892 return ret; 3893 } 3894 #endif 3895 3896 /** 3897 * liquidio_init_nic_module - initialize the NIC 3898 * @oct: octeon device 3899 * 3900 * This initialization routine is called once the Octeon device application is 3901 * up and running 3902 */ 3903 static int liquidio_init_nic_module(struct octeon_device *oct) 3904 { 3905 int i, retval = 0; 3906 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct)); 3907 3908 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n"); 3909 3910 /* only default iq and oq were initialized 3911 * initialize the rest as well 3912 */ 3913 /* run port_config command for each port */ 3914 oct->ifcount = num_nic_ports; 3915 3916 memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports); 3917 3918 for (i = 0; i < MAX_OCTEON_LINKS; i++) 3919 oct->props[i].gmxport = -1; 3920 3921 retval = setup_nic_devices(oct); 3922 if (retval) { 3923 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n"); 3924 goto octnet_init_failure; 3925 } 3926 3927 /* Call vf_rep_modinit if the firmware is switchdev capable 3928 * and do it from the first liquidio function probed. 3929 */ 3930 if (!oct->octeon_id && 3931 oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) { 3932 retval = lio_vf_rep_modinit(); 3933 if (retval) { 3934 liquidio_stop_nic_module(oct); 3935 goto octnet_init_failure; 3936 } 3937 } 3938 3939 liquidio_ptp_init(oct); 3940 3941 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n"); 3942 3943 return retval; 3944 3945 octnet_init_failure: 3946 3947 oct->ifcount = 0; 3948 3949 return retval; 3950 } 3951 3952 /** 3953 * nic_starter - finish init 3954 * @work: work struct work_struct 3955 * 3956 * starter callback that invokes the remaining initialization work after the NIC is up and running. 3957 */ 3958 static void nic_starter(struct work_struct *work) 3959 { 3960 struct octeon_device *oct; 3961 struct cavium_wk *wk = (struct cavium_wk *)work; 3962 3963 oct = (struct octeon_device *)wk->ctxptr; 3964 3965 if (atomic_read(&oct->status) == OCT_DEV_RUNNING) 3966 return; 3967 3968 /* If the status of the device is CORE_OK, the core 3969 * application has reported its application type. Call 3970 * any registered handlers now and move to the RUNNING 3971 * state. 3972 */ 3973 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) { 3974 schedule_delayed_work(&oct->nic_poll_work.work, 3975 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 3976 return; 3977 } 3978 3979 atomic_set(&oct->status, OCT_DEV_RUNNING); 3980 3981 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) { 3982 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n"); 3983 3984 if (liquidio_init_nic_module(oct)) 3985 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n"); 3986 else 3987 handshake[oct->octeon_id].started_ok = 1; 3988 } else { 3989 dev_err(&oct->pci_dev->dev, 3990 "Unexpected application running on NIC (%d). Check firmware.\n", 3991 oct->app_mode); 3992 } 3993 3994 complete(&handshake[oct->octeon_id].started); 3995 } 3996 3997 static int 3998 octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf) 3999 { 4000 struct octeon_device *oct = (struct octeon_device *)buf; 4001 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 4002 int i, notice, vf_idx; 4003 bool cores_crashed; 4004 u64 *data, vf_num; 4005 4006 notice = recv_pkt->rh.r.ossp; 4007 data = (u64 *)(get_rbd(recv_pkt->buffer_ptr[0]) + OCT_DROQ_INFO_SIZE); 4008 4009 /* the first 64-bit word of data is the vf_num */ 4010 vf_num = data[0]; 4011 octeon_swap_8B_data(&vf_num, 1); 4012 vf_idx = (int)vf_num - 1; 4013 4014 cores_crashed = READ_ONCE(oct->cores_crashed); 4015 4016 if (notice == VF_DRV_LOADED) { 4017 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) { 4018 oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx); 4019 dev_info(&oct->pci_dev->dev, 4020 "driver for VF%d was loaded\n", vf_idx); 4021 if (!cores_crashed) 4022 try_module_get(THIS_MODULE); 4023 } 4024 } else if (notice == VF_DRV_REMOVED) { 4025 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) { 4026 oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx); 4027 dev_info(&oct->pci_dev->dev, 4028 "driver for VF%d was removed\n", vf_idx); 4029 if (!cores_crashed) 4030 module_put(THIS_MODULE); 4031 } 4032 } else if (notice == VF_DRV_MACADDR_CHANGED) { 4033 u8 *b = (u8 *)&data[1]; 4034 4035 oct->sriov_info.vf_macaddr[vf_idx] = data[1]; 4036 dev_info(&oct->pci_dev->dev, 4037 "VF driver changed VF%d's MAC address to %pM\n", 4038 vf_idx, b + 2); 4039 } 4040 4041 for (i = 0; i < recv_pkt->buffer_count; i++) 4042 recv_buffer_free(recv_pkt->buffer_ptr[i]); 4043 octeon_free_recv_info(recv_info); 4044 4045 return 0; 4046 } 4047 4048 /** 4049 * octeon_device_init - Device initialization for each Octeon device that is probed 4050 * @octeon_dev: octeon device 4051 */ 4052 static int octeon_device_init(struct octeon_device *octeon_dev) 4053 { 4054 int j, ret; 4055 char bootcmd[] = "\n"; 4056 char *dbg_enb = NULL; 4057 enum lio_fw_state fw_state; 4058 struct octeon_device_priv *oct_priv = 4059 (struct octeon_device_priv *)octeon_dev->priv; 4060 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE); 4061 4062 /* Enable access to the octeon device and make its DMA capability 4063 * known to the OS. 4064 */ 4065 if (octeon_pci_os_setup(octeon_dev)) 4066 return 1; 4067 4068 atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE); 4069 4070 /* Identify the Octeon type and map the BAR address space. */ 4071 if (octeon_chip_specific_setup(octeon_dev)) { 4072 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n"); 4073 return 1; 4074 } 4075 4076 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE); 4077 4078 /* Only add a reference after setting status 'OCT_DEV_PCI_MAP_DONE', 4079 * since that is what is required for the reference to be removed 4080 * during de-initialization (see 'octeon_destroy_resources'). 4081 */ 4082 octeon_register_device(octeon_dev, octeon_dev->pci_dev->bus->number, 4083 PCI_SLOT(octeon_dev->pci_dev->devfn), 4084 PCI_FUNC(octeon_dev->pci_dev->devfn), 4085 true); 4086 4087 octeon_dev->app_mode = CVM_DRV_INVALID_APP; 4088 4089 /* CN23XX supports preloaded firmware if the following is true: 4090 * 4091 * The adapter indicates that firmware is currently running AND 4092 * 'fw_type' is 'auto'. 4093 * 4094 * (default state is NEEDS_TO_BE_LOADED, override it if appropriate). 4095 */ 4096 if (OCTEON_CN23XX_PF(octeon_dev) && 4097 cn23xx_fw_loaded(octeon_dev) && fw_type_is_auto()) { 4098 atomic_cmpxchg(octeon_dev->adapter_fw_state, 4099 FW_NEEDS_TO_BE_LOADED, FW_IS_PRELOADED); 4100 } 4101 4102 /* If loading firmware, only first device of adapter needs to do so. */ 4103 fw_state = atomic_cmpxchg(octeon_dev->adapter_fw_state, 4104 FW_NEEDS_TO_BE_LOADED, 4105 FW_IS_BEING_LOADED); 4106 4107 /* Here, [local variable] 'fw_state' is set to one of: 4108 * 4109 * FW_IS_PRELOADED: No firmware is to be loaded (see above) 4110 * FW_NEEDS_TO_BE_LOADED: The driver's first instance will load 4111 * firmware to the adapter. 4112 * FW_IS_BEING_LOADED: The driver's second instance will not load 4113 * firmware to the adapter. 4114 */ 4115 4116 /* Prior to f/w load, perform a soft reset of the Octeon device; 4117 * if error resetting, return w/error. 4118 */ 4119 if (fw_state == FW_NEEDS_TO_BE_LOADED) 4120 if (octeon_dev->fn_list.soft_reset(octeon_dev)) 4121 return 1; 4122 4123 /* Initialize the dispatch mechanism used to push packets arriving on 4124 * Octeon Output queues. 4125 */ 4126 if (octeon_init_dispatch_list(octeon_dev)) 4127 return 1; 4128 4129 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4130 OPCODE_NIC_CORE_DRV_ACTIVE, 4131 octeon_core_drv_init, 4132 octeon_dev); 4133 4134 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4135 OPCODE_NIC_VF_DRV_NOTICE, 4136 octeon_recv_vf_drv_notice, octeon_dev); 4137 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter); 4138 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev; 4139 schedule_delayed_work(&octeon_dev->nic_poll_work.work, 4140 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 4141 4142 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE); 4143 4144 if (octeon_set_io_queues_off(octeon_dev)) { 4145 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n"); 4146 return 1; 4147 } 4148 4149 if (OCTEON_CN23XX_PF(octeon_dev)) { 4150 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4151 if (ret) { 4152 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n"); 4153 return ret; 4154 } 4155 } 4156 4157 /* Initialize soft command buffer pool 4158 */ 4159 if (octeon_setup_sc_buffer_pool(octeon_dev)) { 4160 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n"); 4161 return 1; 4162 } 4163 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE); 4164 4165 /* Setup the data structures that manage this Octeon's Input queues. */ 4166 if (octeon_setup_instr_queues(octeon_dev)) { 4167 dev_err(&octeon_dev->pci_dev->dev, 4168 "instruction queue initialization failed\n"); 4169 return 1; 4170 } 4171 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE); 4172 4173 /* Initialize lists to manage the requests of different types that 4174 * arrive from user & kernel applications for this octeon device. 4175 */ 4176 if (octeon_setup_response_list(octeon_dev)) { 4177 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n"); 4178 return 1; 4179 } 4180 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE); 4181 4182 if (octeon_setup_output_queues(octeon_dev)) { 4183 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n"); 4184 return 1; 4185 } 4186 4187 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE); 4188 4189 if (OCTEON_CN23XX_PF(octeon_dev)) { 4190 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) { 4191 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n"); 4192 return 1; 4193 } 4194 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE); 4195 4196 if (octeon_allocate_ioq_vector 4197 (octeon_dev, 4198 octeon_dev->sriov_info.num_pf_rings)) { 4199 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n"); 4200 return 1; 4201 } 4202 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE); 4203 4204 } else { 4205 /* The input and output queue registers were setup earlier (the 4206 * queues were not enabled). Any additional registers 4207 * that need to be programmed should be done now. 4208 */ 4209 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4210 if (ret) { 4211 dev_err(&octeon_dev->pci_dev->dev, 4212 "Failed to configure device registers\n"); 4213 return ret; 4214 } 4215 } 4216 4217 /* Initialize the tasklet that handles output queue packet processing.*/ 4218 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n"); 4219 tasklet_setup(&oct_priv->droq_tasklet, octeon_droq_bh); 4220 4221 /* Setup the interrupt handler and record the INT SUM register address 4222 */ 4223 if (octeon_setup_interrupt(octeon_dev, 4224 octeon_dev->sriov_info.num_pf_rings)) 4225 return 1; 4226 4227 /* Enable Octeon device interrupts */ 4228 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR); 4229 4230 atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE); 4231 4232 /* Send Credit for Octeon Output queues. Credits are always sent BEFORE 4233 * the output queue is enabled. 4234 * This ensures that we'll receive the f/w CORE DRV_ACTIVE message in 4235 * case we've configured CN23XX_SLI_GBL_CONTROL[NOPTR_D] = 0. 4236 * Otherwise, it is possible that the DRV_ACTIVE message will be sent 4237 * before any credits have been issued, causing the ring to be reset 4238 * (and the f/w appear to never have started). 4239 */ 4240 for (j = 0; j < octeon_dev->num_oqs; j++) 4241 writel(octeon_dev->droq[j]->max_count, 4242 octeon_dev->droq[j]->pkts_credit_reg); 4243 4244 /* Enable the input and output queues for this Octeon device */ 4245 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev); 4246 if (ret) { 4247 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues"); 4248 return ret; 4249 } 4250 4251 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE); 4252 4253 if (fw_state == FW_NEEDS_TO_BE_LOADED) { 4254 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n"); 4255 if (!ddr_timeout) { 4256 dev_info(&octeon_dev->pci_dev->dev, 4257 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n"); 4258 } 4259 4260 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS); 4261 4262 /* Wait for the octeon to initialize DDR after the soft-reset.*/ 4263 while (!ddr_timeout) { 4264 set_current_state(TASK_INTERRUPTIBLE); 4265 if (schedule_timeout(HZ / 10)) { 4266 /* user probably pressed Control-C */ 4267 return 1; 4268 } 4269 } 4270 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout); 4271 if (ret) { 4272 dev_err(&octeon_dev->pci_dev->dev, 4273 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n", 4274 ret); 4275 return 1; 4276 } 4277 4278 if (octeon_wait_for_bootloader(octeon_dev, 1000)) { 4279 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n"); 4280 return 1; 4281 } 4282 4283 /* Divert uboot to take commands from host instead. */ 4284 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50); 4285 4286 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n"); 4287 ret = octeon_init_consoles(octeon_dev); 4288 if (ret) { 4289 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n"); 4290 return 1; 4291 } 4292 /* If console debug enabled, specify empty string to use default 4293 * enablement ELSE specify NULL string for 'disabled'. 4294 */ 4295 dbg_enb = octeon_console_debug_enabled(0) ? "" : NULL; 4296 ret = octeon_add_console(octeon_dev, 0, dbg_enb); 4297 if (ret) { 4298 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n"); 4299 return 1; 4300 } else if (octeon_console_debug_enabled(0)) { 4301 /* If console was added AND we're logging console output 4302 * then set our console print function. 4303 */ 4304 octeon_dev->console[0].print = octeon_dbg_console_print; 4305 } 4306 4307 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE); 4308 4309 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n"); 4310 ret = load_firmware(octeon_dev); 4311 if (ret) { 4312 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n"); 4313 return 1; 4314 } 4315 4316 atomic_set(octeon_dev->adapter_fw_state, FW_HAS_BEEN_LOADED); 4317 } 4318 4319 handshake[octeon_dev->octeon_id].init_ok = 1; 4320 complete(&handshake[octeon_dev->octeon_id].init); 4321 4322 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK); 4323 oct_priv->dev = octeon_dev; 4324 4325 return 0; 4326 } 4327 4328 /** 4329 * octeon_dbg_console_print - Debug console print function 4330 * @oct: octeon device 4331 * @console_num: console number 4332 * @prefix: first portion of line to display 4333 * @suffix: second portion of line to display 4334 * 4335 * The OCTEON debug console outputs entire lines (excluding '\n'). 4336 * Normally, the line will be passed in the 'prefix' parameter. 4337 * However, due to buffering, it is possible for a line to be split into two 4338 * parts, in which case they will be passed as the 'prefix' parameter and 4339 * 'suffix' parameter. 4340 */ 4341 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 4342 char *prefix, char *suffix) 4343 { 4344 if (prefix && suffix) 4345 dev_info(&oct->pci_dev->dev, "%u: %s%s\n", console_num, prefix, 4346 suffix); 4347 else if (prefix) 4348 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, prefix); 4349 else if (suffix) 4350 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, suffix); 4351 4352 return 0; 4353 } 4354 4355 /** 4356 * liquidio_exit - Exits the module 4357 */ 4358 static void __exit liquidio_exit(void) 4359 { 4360 liquidio_deinit_pci(); 4361 4362 pr_info("LiquidIO network module is now unloaded\n"); 4363 } 4364 4365 module_init(liquidio_init); 4366 module_exit(liquidio_exit); 4367