1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/module.h> 19 #include <linux/interrupt.h> 20 #include <linux/pci.h> 21 #include <linux/firmware.h> 22 #include <net/vxlan.h> 23 #include <linux/kthread.h> 24 #include "liquidio_common.h" 25 #include "octeon_droq.h" 26 #include "octeon_iq.h" 27 #include "response_manager.h" 28 #include "octeon_device.h" 29 #include "octeon_nic.h" 30 #include "octeon_main.h" 31 #include "octeon_network.h" 32 #include "cn66xx_regs.h" 33 #include "cn66xx_device.h" 34 #include "cn68xx_device.h" 35 #include "cn23xx_pf_device.h" 36 #include "liquidio_image.h" 37 #include "lio_vf_rep.h" 38 39 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>"); 40 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver"); 41 MODULE_LICENSE("GPL"); 42 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME 43 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 44 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME 45 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 46 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME 47 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 48 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME 49 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 50 51 static int ddr_timeout = 10000; 52 module_param(ddr_timeout, int, 0644); 53 MODULE_PARM_DESC(ddr_timeout, 54 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check"); 55 56 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 57 58 static int debug = -1; 59 module_param(debug, int, 0644); 60 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits"); 61 62 static char fw_type[LIO_MAX_FW_TYPE_LEN] = LIO_FW_NAME_TYPE_AUTO; 63 module_param_string(fw_type, fw_type, sizeof(fw_type), 0444); 64 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded (default is \"auto\"), which uses firmware in flash, if present, else loads \"nic\"."); 65 66 static u32 console_bitmask; 67 module_param(console_bitmask, int, 0644); 68 MODULE_PARM_DESC(console_bitmask, 69 "Bitmask indicating which consoles have debug output redirected to syslog."); 70 71 /** 72 * \brief determines if a given console has debug enabled. 73 * @param console console to check 74 * @returns 1 = enabled. 0 otherwise 75 */ 76 static int octeon_console_debug_enabled(u32 console) 77 { 78 return (console_bitmask >> (console)) & 0x1; 79 } 80 81 /* Polling interval for determining when NIC application is alive */ 82 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100 83 84 /* runtime link query interval */ 85 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000 86 /* update localtime to octeon firmware every 60 seconds. 87 * make firmware to use same time reference, so that it will be easy to 88 * correlate firmware logged events/errors with host events, for debugging. 89 */ 90 #define LIO_SYNC_OCTEON_TIME_INTERVAL_MS 60000 91 92 /* time to wait for possible in-flight requests in milliseconds */ 93 #define WAIT_INFLIGHT_REQUEST msecs_to_jiffies(1000) 94 95 struct lio_trusted_vf_ctx { 96 struct completion complete; 97 int status; 98 }; 99 100 struct oct_link_status_resp { 101 u64 rh; 102 struct oct_link_info link_info; 103 u64 status; 104 }; 105 106 struct oct_timestamp_resp { 107 u64 rh; 108 u64 timestamp; 109 u64 status; 110 }; 111 112 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp)) 113 114 union tx_info { 115 u64 u64; 116 struct { 117 #ifdef __BIG_ENDIAN_BITFIELD 118 u16 gso_size; 119 u16 gso_segs; 120 u32 reserved; 121 #else 122 u32 reserved; 123 u16 gso_segs; 124 u16 gso_size; 125 #endif 126 } s; 127 }; 128 129 /** Octeon device properties to be used by the NIC module. 130 * Each octeon device in the system will be represented 131 * by this structure in the NIC module. 132 */ 133 134 #define OCTNIC_GSO_MAX_HEADER_SIZE 128 135 #define OCTNIC_GSO_MAX_SIZE \ 136 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE) 137 138 struct handshake { 139 struct completion init; 140 struct completion started; 141 struct pci_dev *pci_dev; 142 int init_ok; 143 int started_ok; 144 }; 145 146 #ifdef CONFIG_PCI_IOV 147 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs); 148 #endif 149 150 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 151 char *prefix, char *suffix); 152 153 static int octeon_device_init(struct octeon_device *); 154 static int liquidio_stop(struct net_device *netdev); 155 static void liquidio_remove(struct pci_dev *pdev); 156 static int liquidio_probe(struct pci_dev *pdev, 157 const struct pci_device_id *ent); 158 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 159 int linkstate); 160 161 static struct handshake handshake[MAX_OCTEON_DEVICES]; 162 static struct completion first_stage; 163 164 static void octeon_droq_bh(unsigned long pdev) 165 { 166 int q_no; 167 int reschedule = 0; 168 struct octeon_device *oct = (struct octeon_device *)pdev; 169 struct octeon_device_priv *oct_priv = 170 (struct octeon_device_priv *)oct->priv; 171 172 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { 173 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) 174 continue; 175 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], 176 MAX_PACKET_BUDGET); 177 lio_enable_irq(oct->droq[q_no], NULL); 178 179 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) { 180 /* set time and cnt interrupt thresholds for this DROQ 181 * for NAPI 182 */ 183 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; 184 185 octeon_write_csr64( 186 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no), 187 0x5700000040ULL); 188 octeon_write_csr64( 189 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0); 190 } 191 } 192 193 if (reschedule) 194 tasklet_schedule(&oct_priv->droq_tasklet); 195 } 196 197 static int lio_wait_for_oq_pkts(struct octeon_device *oct) 198 { 199 struct octeon_device_priv *oct_priv = 200 (struct octeon_device_priv *)oct->priv; 201 int retry = 100, pkt_cnt = 0, pending_pkts = 0; 202 int i; 203 204 do { 205 pending_pkts = 0; 206 207 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 208 if (!(oct->io_qmask.oq & BIT_ULL(i))) 209 continue; 210 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); 211 } 212 if (pkt_cnt > 0) { 213 pending_pkts += pkt_cnt; 214 tasklet_schedule(&oct_priv->droq_tasklet); 215 } 216 pkt_cnt = 0; 217 schedule_timeout_uninterruptible(1); 218 219 } while (retry-- && pending_pkts); 220 221 return pkt_cnt; 222 } 223 224 /** 225 * \brief Forces all IO queues off on a given device 226 * @param oct Pointer to Octeon device 227 */ 228 static void force_io_queues_off(struct octeon_device *oct) 229 { 230 if ((oct->chip_id == OCTEON_CN66XX) || 231 (oct->chip_id == OCTEON_CN68XX)) { 232 /* Reset the Enable bits for Input Queues. */ 233 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0); 234 235 /* Reset the Enable bits for Output Queues. */ 236 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0); 237 } 238 } 239 240 /** 241 * \brief Cause device to go quiet so it can be safely removed/reset/etc 242 * @param oct Pointer to Octeon device 243 */ 244 static inline void pcierror_quiesce_device(struct octeon_device *oct) 245 { 246 int i; 247 248 /* Disable the input and output queues now. No more packets will 249 * arrive from Octeon, but we should wait for all packet processing 250 * to finish. 251 */ 252 force_io_queues_off(oct); 253 254 /* To allow for in-flight requests */ 255 schedule_timeout_uninterruptible(WAIT_INFLIGHT_REQUEST); 256 257 if (wait_for_pending_requests(oct)) 258 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 259 260 /* Force all requests waiting to be fetched by OCTEON to complete. */ 261 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 262 struct octeon_instr_queue *iq; 263 264 if (!(oct->io_qmask.iq & BIT_ULL(i))) 265 continue; 266 iq = oct->instr_queue[i]; 267 268 if (atomic_read(&iq->instr_pending)) { 269 spin_lock_bh(&iq->lock); 270 iq->fill_cnt = 0; 271 iq->octeon_read_index = iq->host_write_index; 272 iq->stats.instr_processed += 273 atomic_read(&iq->instr_pending); 274 lio_process_iq_request_list(oct, iq, 0); 275 spin_unlock_bh(&iq->lock); 276 } 277 } 278 279 /* Force all pending ordered list requests to time out. */ 280 lio_process_ordered_list(oct, 1); 281 282 /* We do not need to wait for output queue packets to be processed. */ 283 } 284 285 /** 286 * \brief Cleanup PCI AER uncorrectable error status 287 * @param dev Pointer to PCI device 288 */ 289 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 290 { 291 int pos = 0x100; 292 u32 status, mask; 293 294 pr_info("%s :\n", __func__); 295 296 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); 297 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); 298 if (dev->error_state == pci_channel_io_normal) 299 status &= ~mask; /* Clear corresponding nonfatal bits */ 300 else 301 status &= mask; /* Clear corresponding fatal bits */ 302 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); 303 } 304 305 /** 306 * \brief Stop all PCI IO to a given device 307 * @param dev Pointer to Octeon device 308 */ 309 static void stop_pci_io(struct octeon_device *oct) 310 { 311 /* No more instructions will be forwarded. */ 312 atomic_set(&oct->status, OCT_DEV_IN_RESET); 313 314 pci_disable_device(oct->pci_dev); 315 316 /* Disable interrupts */ 317 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 318 319 pcierror_quiesce_device(oct); 320 321 /* Release the interrupt line */ 322 free_irq(oct->pci_dev->irq, oct); 323 324 if (oct->flags & LIO_FLAG_MSI_ENABLED) 325 pci_disable_msi(oct->pci_dev); 326 327 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 328 lio_get_state_string(&oct->status)); 329 330 /* making it a common function for all OCTEON models */ 331 cleanup_aer_uncorrect_error_status(oct->pci_dev); 332 } 333 334 /** 335 * \brief called when PCI error is detected 336 * @param pdev Pointer to PCI device 337 * @param state The current pci connection state 338 * 339 * This function is called after a PCI bus error affecting 340 * this device has been detected. 341 */ 342 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev, 343 pci_channel_state_t state) 344 { 345 struct octeon_device *oct = pci_get_drvdata(pdev); 346 347 /* Non-correctable Non-fatal errors */ 348 if (state == pci_channel_io_normal) { 349 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n"); 350 cleanup_aer_uncorrect_error_status(oct->pci_dev); 351 return PCI_ERS_RESULT_CAN_RECOVER; 352 } 353 354 /* Non-correctable Fatal errors */ 355 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n"); 356 stop_pci_io(oct); 357 358 /* Always return a DISCONNECT. There is no support for recovery but only 359 * for a clean shutdown. 360 */ 361 return PCI_ERS_RESULT_DISCONNECT; 362 } 363 364 /** 365 * \brief mmio handler 366 * @param pdev Pointer to PCI device 367 */ 368 static pci_ers_result_t liquidio_pcie_mmio_enabled( 369 struct pci_dev *pdev __attribute__((unused))) 370 { 371 /* We should never hit this since we never ask for a reset for a Fatal 372 * Error. We always return DISCONNECT in io_error above. 373 * But play safe and return RECOVERED for now. 374 */ 375 return PCI_ERS_RESULT_RECOVERED; 376 } 377 378 /** 379 * \brief called after the pci bus has been reset. 380 * @param pdev Pointer to PCI device 381 * 382 * Restart the card from scratch, as if from a cold-boot. Implementation 383 * resembles the first-half of the octeon_resume routine. 384 */ 385 static pci_ers_result_t liquidio_pcie_slot_reset( 386 struct pci_dev *pdev __attribute__((unused))) 387 { 388 /* We should never hit this since we never ask for a reset for a Fatal 389 * Error. We always return DISCONNECT in io_error above. 390 * But play safe and return RECOVERED for now. 391 */ 392 return PCI_ERS_RESULT_RECOVERED; 393 } 394 395 /** 396 * \brief called when traffic can start flowing again. 397 * @param pdev Pointer to PCI device 398 * 399 * This callback is called when the error recovery driver tells us that 400 * its OK to resume normal operation. Implementation resembles the 401 * second-half of the octeon_resume routine. 402 */ 403 static void liquidio_pcie_resume(struct pci_dev *pdev __attribute__((unused))) 404 { 405 /* Nothing to be done here. */ 406 } 407 408 #ifdef CONFIG_PM 409 /** 410 * \brief called when suspending 411 * @param pdev Pointer to PCI device 412 * @param state state to suspend to 413 */ 414 static int liquidio_suspend(struct pci_dev *pdev __attribute__((unused)), 415 pm_message_t state __attribute__((unused))) 416 { 417 return 0; 418 } 419 420 /** 421 * \brief called when resuming 422 * @param pdev Pointer to PCI device 423 */ 424 static int liquidio_resume(struct pci_dev *pdev __attribute__((unused))) 425 { 426 return 0; 427 } 428 #endif 429 430 /* For PCI-E Advanced Error Recovery (AER) Interface */ 431 static const struct pci_error_handlers liquidio_err_handler = { 432 .error_detected = liquidio_pcie_error_detected, 433 .mmio_enabled = liquidio_pcie_mmio_enabled, 434 .slot_reset = liquidio_pcie_slot_reset, 435 .resume = liquidio_pcie_resume, 436 }; 437 438 static const struct pci_device_id liquidio_pci_tbl[] = { 439 { /* 68xx */ 440 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 441 }, 442 { /* 66xx */ 443 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 444 }, 445 { /* 23xx pf */ 446 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 447 }, 448 { 449 0, 0, 0, 0, 0, 0, 0 450 } 451 }; 452 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl); 453 454 static struct pci_driver liquidio_pci_driver = { 455 .name = "LiquidIO", 456 .id_table = liquidio_pci_tbl, 457 .probe = liquidio_probe, 458 .remove = liquidio_remove, 459 .err_handler = &liquidio_err_handler, /* For AER */ 460 461 #ifdef CONFIG_PM 462 .suspend = liquidio_suspend, 463 .resume = liquidio_resume, 464 #endif 465 #ifdef CONFIG_PCI_IOV 466 .sriov_configure = liquidio_enable_sriov, 467 #endif 468 }; 469 470 /** 471 * \brief register PCI driver 472 */ 473 static int liquidio_init_pci(void) 474 { 475 return pci_register_driver(&liquidio_pci_driver); 476 } 477 478 /** 479 * \brief unregister PCI driver 480 */ 481 static void liquidio_deinit_pci(void) 482 { 483 pci_unregister_driver(&liquidio_pci_driver); 484 } 485 486 /** 487 * \brief Check Tx queue status, and take appropriate action 488 * @param lio per-network private data 489 * @returns 0 if full, number of queues woken up otherwise 490 */ 491 static inline int check_txq_status(struct lio *lio) 492 { 493 int numqs = lio->netdev->real_num_tx_queues; 494 int ret_val = 0; 495 int q, iq; 496 497 /* check each sub-queue state */ 498 for (q = 0; q < numqs; q++) { 499 iq = lio->linfo.txpciq[q % 500 lio->oct_dev->num_iqs].s.q_no; 501 if (octnet_iq_is_full(lio->oct_dev, iq)) 502 continue; 503 if (__netif_subqueue_stopped(lio->netdev, q)) { 504 netif_wake_subqueue(lio->netdev, q); 505 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, 506 tx_restart, 1); 507 ret_val++; 508 } 509 } 510 511 return ret_val; 512 } 513 514 /** 515 * \brief Print link information 516 * @param netdev network device 517 */ 518 static void print_link_info(struct net_device *netdev) 519 { 520 struct lio *lio = GET_LIO(netdev); 521 522 if (!ifstate_check(lio, LIO_IFSTATE_RESETTING) && 523 ifstate_check(lio, LIO_IFSTATE_REGISTERED)) { 524 struct oct_link_info *linfo = &lio->linfo; 525 526 if (linfo->link.s.link_up) { 527 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n", 528 linfo->link.s.speed, 529 (linfo->link.s.duplex) ? "Full" : "Half"); 530 } else { 531 netif_info(lio, link, lio->netdev, "Link Down\n"); 532 } 533 } 534 } 535 536 /** 537 * \brief Routine to notify MTU change 538 * @param work work_struct data structure 539 */ 540 static void octnet_link_status_change(struct work_struct *work) 541 { 542 struct cavium_wk *wk = (struct cavium_wk *)work; 543 struct lio *lio = (struct lio *)wk->ctxptr; 544 545 /* lio->linfo.link.s.mtu always contains max MTU of the lio interface. 546 * this API is invoked only when new max-MTU of the interface is 547 * less than current MTU. 548 */ 549 rtnl_lock(); 550 dev_set_mtu(lio->netdev, lio->linfo.link.s.mtu); 551 rtnl_unlock(); 552 } 553 554 /** 555 * \brief Sets up the mtu status change work 556 * @param netdev network device 557 */ 558 static inline int setup_link_status_change_wq(struct net_device *netdev) 559 { 560 struct lio *lio = GET_LIO(netdev); 561 struct octeon_device *oct = lio->oct_dev; 562 563 lio->link_status_wq.wq = alloc_workqueue("link-status", 564 WQ_MEM_RECLAIM, 0); 565 if (!lio->link_status_wq.wq) { 566 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n"); 567 return -1; 568 } 569 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work, 570 octnet_link_status_change); 571 lio->link_status_wq.wk.ctxptr = lio; 572 573 return 0; 574 } 575 576 static inline void cleanup_link_status_change_wq(struct net_device *netdev) 577 { 578 struct lio *lio = GET_LIO(netdev); 579 580 if (lio->link_status_wq.wq) { 581 cancel_delayed_work_sync(&lio->link_status_wq.wk.work); 582 destroy_workqueue(lio->link_status_wq.wq); 583 } 584 } 585 586 /** 587 * \brief Update link status 588 * @param netdev network device 589 * @param ls link status structure 590 * 591 * Called on receipt of a link status response from the core application to 592 * update each interface's link status. 593 */ 594 static inline void update_link_status(struct net_device *netdev, 595 union oct_link_status *ls) 596 { 597 struct lio *lio = GET_LIO(netdev); 598 int changed = (lio->linfo.link.u64 != ls->u64); 599 int current_max_mtu = lio->linfo.link.s.mtu; 600 struct octeon_device *oct = lio->oct_dev; 601 602 dev_dbg(&oct->pci_dev->dev, "%s: lio->linfo.link.u64=%llx, ls->u64=%llx\n", 603 __func__, lio->linfo.link.u64, ls->u64); 604 lio->linfo.link.u64 = ls->u64; 605 606 if ((lio->intf_open) && (changed)) { 607 print_link_info(netdev); 608 lio->link_changes++; 609 610 if (lio->linfo.link.s.link_up) { 611 dev_dbg(&oct->pci_dev->dev, "%s: link_up", __func__); 612 netif_carrier_on(netdev); 613 wake_txqs(netdev); 614 } else { 615 dev_dbg(&oct->pci_dev->dev, "%s: link_off", __func__); 616 netif_carrier_off(netdev); 617 stop_txqs(netdev); 618 } 619 if (lio->linfo.link.s.mtu != current_max_mtu) { 620 netif_info(lio, probe, lio->netdev, "Max MTU changed from %d to %d\n", 621 current_max_mtu, lio->linfo.link.s.mtu); 622 netdev->max_mtu = lio->linfo.link.s.mtu; 623 } 624 if (lio->linfo.link.s.mtu < netdev->mtu) { 625 dev_warn(&oct->pci_dev->dev, 626 "Current MTU is higher than new max MTU; Reducing the current mtu from %d to %d\n", 627 netdev->mtu, lio->linfo.link.s.mtu); 628 queue_delayed_work(lio->link_status_wq.wq, 629 &lio->link_status_wq.wk.work, 0); 630 } 631 } 632 } 633 634 /** 635 * lio_sync_octeon_time - send latest localtime to octeon firmware so that 636 * firmware will correct it's time, in case there is a time skew 637 * 638 * @work: work scheduled to send time update to octeon firmware 639 **/ 640 static void lio_sync_octeon_time(struct work_struct *work) 641 { 642 struct cavium_wk *wk = (struct cavium_wk *)work; 643 struct lio *lio = (struct lio *)wk->ctxptr; 644 struct octeon_device *oct = lio->oct_dev; 645 struct octeon_soft_command *sc; 646 struct timespec64 ts; 647 struct lio_time *lt; 648 int ret; 649 650 sc = octeon_alloc_soft_command(oct, sizeof(struct lio_time), 16, 0); 651 if (!sc) { 652 dev_err(&oct->pci_dev->dev, 653 "Failed to sync time to octeon: soft command allocation failed\n"); 654 return; 655 } 656 657 lt = (struct lio_time *)sc->virtdptr; 658 659 /* Get time of the day */ 660 ktime_get_real_ts64(&ts); 661 lt->sec = ts.tv_sec; 662 lt->nsec = ts.tv_nsec; 663 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); 664 665 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 666 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 667 OPCODE_NIC_SYNC_OCTEON_TIME, 0, 0, 0); 668 669 init_completion(&sc->complete); 670 sc->sc_status = OCTEON_REQUEST_PENDING; 671 672 ret = octeon_send_soft_command(oct, sc); 673 if (ret == IQ_SEND_FAILED) { 674 dev_err(&oct->pci_dev->dev, 675 "Failed to sync time to octeon: failed to send soft command\n"); 676 octeon_free_soft_command(oct, sc); 677 } else { 678 WRITE_ONCE(sc->caller_is_done, true); 679 } 680 681 queue_delayed_work(lio->sync_octeon_time_wq.wq, 682 &lio->sync_octeon_time_wq.wk.work, 683 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 684 } 685 686 /** 687 * setup_sync_octeon_time_wq - Sets up the work to periodically update 688 * local time to octeon firmware 689 * 690 * @netdev - network device which should send time update to firmware 691 **/ 692 static inline int setup_sync_octeon_time_wq(struct net_device *netdev) 693 { 694 struct lio *lio = GET_LIO(netdev); 695 struct octeon_device *oct = lio->oct_dev; 696 697 lio->sync_octeon_time_wq.wq = 698 alloc_workqueue("update-octeon-time", WQ_MEM_RECLAIM, 0); 699 if (!lio->sync_octeon_time_wq.wq) { 700 dev_err(&oct->pci_dev->dev, "Unable to create wq to update octeon time\n"); 701 return -1; 702 } 703 INIT_DELAYED_WORK(&lio->sync_octeon_time_wq.wk.work, 704 lio_sync_octeon_time); 705 lio->sync_octeon_time_wq.wk.ctxptr = lio; 706 queue_delayed_work(lio->sync_octeon_time_wq.wq, 707 &lio->sync_octeon_time_wq.wk.work, 708 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 709 710 return 0; 711 } 712 713 /** 714 * cleanup_sync_octeon_time_wq - stop scheduling and destroy the work created 715 * to periodically update local time to octeon firmware 716 * 717 * @netdev - network device which should send time update to firmware 718 **/ 719 static inline void cleanup_sync_octeon_time_wq(struct net_device *netdev) 720 { 721 struct lio *lio = GET_LIO(netdev); 722 struct cavium_wq *time_wq = &lio->sync_octeon_time_wq; 723 724 if (time_wq->wq) { 725 cancel_delayed_work_sync(&time_wq->wk.work); 726 destroy_workqueue(time_wq->wq); 727 } 728 } 729 730 static struct octeon_device *get_other_octeon_device(struct octeon_device *oct) 731 { 732 struct octeon_device *other_oct; 733 734 other_oct = lio_get_device(oct->octeon_id + 1); 735 736 if (other_oct && other_oct->pci_dev) { 737 int oct_busnum, other_oct_busnum; 738 739 oct_busnum = oct->pci_dev->bus->number; 740 other_oct_busnum = other_oct->pci_dev->bus->number; 741 742 if (oct_busnum == other_oct_busnum) { 743 int oct_slot, other_oct_slot; 744 745 oct_slot = PCI_SLOT(oct->pci_dev->devfn); 746 other_oct_slot = PCI_SLOT(other_oct->pci_dev->devfn); 747 748 if (oct_slot == other_oct_slot) 749 return other_oct; 750 } 751 } 752 753 return NULL; 754 } 755 756 static void disable_all_vf_links(struct octeon_device *oct) 757 { 758 struct net_device *netdev; 759 int max_vfs, vf, i; 760 761 if (!oct) 762 return; 763 764 max_vfs = oct->sriov_info.max_vfs; 765 766 for (i = 0; i < oct->ifcount; i++) { 767 netdev = oct->props[i].netdev; 768 if (!netdev) 769 continue; 770 771 for (vf = 0; vf < max_vfs; vf++) 772 liquidio_set_vf_link_state(netdev, vf, 773 IFLA_VF_LINK_STATE_DISABLE); 774 } 775 } 776 777 static int liquidio_watchdog(void *param) 778 { 779 bool err_msg_was_printed[LIO_MAX_CORES]; 780 u16 mask_of_crashed_or_stuck_cores = 0; 781 bool all_vf_links_are_disabled = false; 782 struct octeon_device *oct = param; 783 struct octeon_device *other_oct; 784 #ifdef CONFIG_MODULE_UNLOAD 785 long refcount, vfs_referencing_pf; 786 u64 vfs_mask1, vfs_mask2; 787 #endif 788 int core; 789 790 memset(err_msg_was_printed, 0, sizeof(err_msg_was_printed)); 791 792 while (!kthread_should_stop()) { 793 /* sleep for a couple of seconds so that we don't hog the CPU */ 794 set_current_state(TASK_INTERRUPTIBLE); 795 schedule_timeout(msecs_to_jiffies(2000)); 796 797 mask_of_crashed_or_stuck_cores = 798 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2); 799 800 if (!mask_of_crashed_or_stuck_cores) 801 continue; 802 803 WRITE_ONCE(oct->cores_crashed, true); 804 other_oct = get_other_octeon_device(oct); 805 if (other_oct) 806 WRITE_ONCE(other_oct->cores_crashed, true); 807 808 for (core = 0; core < LIO_MAX_CORES; core++) { 809 bool core_crashed_or_got_stuck; 810 811 core_crashed_or_got_stuck = 812 (mask_of_crashed_or_stuck_cores 813 >> core) & 1; 814 815 if (core_crashed_or_got_stuck && 816 !err_msg_was_printed[core]) { 817 dev_err(&oct->pci_dev->dev, 818 "ERROR: Octeon core %d crashed or got stuck! See oct-fwdump for details.\n", 819 core); 820 err_msg_was_printed[core] = true; 821 } 822 } 823 824 if (all_vf_links_are_disabled) 825 continue; 826 827 disable_all_vf_links(oct); 828 disable_all_vf_links(other_oct); 829 all_vf_links_are_disabled = true; 830 831 #ifdef CONFIG_MODULE_UNLOAD 832 vfs_mask1 = READ_ONCE(oct->sriov_info.vf_drv_loaded_mask); 833 vfs_mask2 = READ_ONCE(other_oct->sriov_info.vf_drv_loaded_mask); 834 835 vfs_referencing_pf = hweight64(vfs_mask1); 836 vfs_referencing_pf += hweight64(vfs_mask2); 837 838 refcount = module_refcount(THIS_MODULE); 839 if (refcount >= vfs_referencing_pf) { 840 while (vfs_referencing_pf) { 841 module_put(THIS_MODULE); 842 vfs_referencing_pf--; 843 } 844 } 845 #endif 846 } 847 848 return 0; 849 } 850 851 /** 852 * \brief PCI probe handler 853 * @param pdev PCI device structure 854 * @param ent unused 855 */ 856 static int 857 liquidio_probe(struct pci_dev *pdev, 858 const struct pci_device_id *ent __attribute__((unused))) 859 { 860 struct octeon_device *oct_dev = NULL; 861 struct handshake *hs; 862 863 oct_dev = octeon_allocate_device(pdev->device, 864 sizeof(struct octeon_device_priv)); 865 if (!oct_dev) { 866 dev_err(&pdev->dev, "Unable to allocate device\n"); 867 return -ENOMEM; 868 } 869 870 if (pdev->device == OCTEON_CN23XX_PF_VID) 871 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED; 872 873 /* Enable PTP for 6XXX Device */ 874 if (((pdev->device == OCTEON_CN66XX) || 875 (pdev->device == OCTEON_CN68XX))) 876 oct_dev->ptp_enable = true; 877 else 878 oct_dev->ptp_enable = false; 879 880 dev_info(&pdev->dev, "Initializing device %x:%x.\n", 881 (u32)pdev->vendor, (u32)pdev->device); 882 883 /* Assign octeon_device for this device to the private data area. */ 884 pci_set_drvdata(pdev, oct_dev); 885 886 /* set linux specific device pointer */ 887 oct_dev->pci_dev = (void *)pdev; 888 889 oct_dev->subsystem_id = pdev->subsystem_vendor | 890 (pdev->subsystem_device << 16); 891 892 hs = &handshake[oct_dev->octeon_id]; 893 init_completion(&hs->init); 894 init_completion(&hs->started); 895 hs->pci_dev = pdev; 896 897 if (oct_dev->octeon_id == 0) 898 /* first LiquidIO NIC is detected */ 899 complete(&first_stage); 900 901 if (octeon_device_init(oct_dev)) { 902 complete(&hs->init); 903 liquidio_remove(pdev); 904 return -ENOMEM; 905 } 906 907 if (OCTEON_CN23XX_PF(oct_dev)) { 908 u8 bus, device, function; 909 910 if (atomic_read(oct_dev->adapter_refcount) == 1) { 911 /* Each NIC gets one watchdog kernel thread. The first 912 * PF (of each NIC) that gets pci_driver->probe()'d 913 * creates that thread. 914 */ 915 bus = pdev->bus->number; 916 device = PCI_SLOT(pdev->devfn); 917 function = PCI_FUNC(pdev->devfn); 918 oct_dev->watchdog_task = kthread_create( 919 liquidio_watchdog, oct_dev, 920 "liowd/%02hhx:%02hhx.%hhx", bus, device, function); 921 if (!IS_ERR(oct_dev->watchdog_task)) { 922 wake_up_process(oct_dev->watchdog_task); 923 } else { 924 oct_dev->watchdog_task = NULL; 925 dev_err(&oct_dev->pci_dev->dev, 926 "failed to create kernel_thread\n"); 927 liquidio_remove(pdev); 928 return -1; 929 } 930 } 931 } 932 933 oct_dev->rx_pause = 1; 934 oct_dev->tx_pause = 1; 935 936 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n"); 937 938 return 0; 939 } 940 941 static bool fw_type_is_auto(void) 942 { 943 return strncmp(fw_type, LIO_FW_NAME_TYPE_AUTO, 944 sizeof(LIO_FW_NAME_TYPE_AUTO)) == 0; 945 } 946 947 /** 948 * \brief PCI FLR for each Octeon device. 949 * @param oct octeon device 950 */ 951 static void octeon_pci_flr(struct octeon_device *oct) 952 { 953 int rc; 954 955 pci_save_state(oct->pci_dev); 956 957 pci_cfg_access_lock(oct->pci_dev); 958 959 /* Quiesce the device completely */ 960 pci_write_config_word(oct->pci_dev, PCI_COMMAND, 961 PCI_COMMAND_INTX_DISABLE); 962 963 rc = __pci_reset_function_locked(oct->pci_dev); 964 965 if (rc != 0) 966 dev_err(&oct->pci_dev->dev, "Error %d resetting PCI function %d\n", 967 rc, oct->pf_num); 968 969 pci_cfg_access_unlock(oct->pci_dev); 970 971 pci_restore_state(oct->pci_dev); 972 } 973 974 /** 975 *\brief Destroy resources associated with octeon device 976 * @param pdev PCI device structure 977 * @param ent unused 978 */ 979 static void octeon_destroy_resources(struct octeon_device *oct) 980 { 981 int i, refcount; 982 struct msix_entry *msix_entries; 983 struct octeon_device_priv *oct_priv = 984 (struct octeon_device_priv *)oct->priv; 985 986 struct handshake *hs; 987 988 switch (atomic_read(&oct->status)) { 989 case OCT_DEV_RUNNING: 990 case OCT_DEV_CORE_OK: 991 992 /* No more instructions will be forwarded. */ 993 atomic_set(&oct->status, OCT_DEV_IN_RESET); 994 995 oct->app_mode = CVM_DRV_INVALID_APP; 996 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 997 lio_get_state_string(&oct->status)); 998 999 schedule_timeout_uninterruptible(HZ / 10); 1000 1001 /* fallthrough */ 1002 case OCT_DEV_HOST_OK: 1003 1004 /* fallthrough */ 1005 case OCT_DEV_CONSOLE_INIT_DONE: 1006 /* Remove any consoles */ 1007 octeon_remove_consoles(oct); 1008 1009 /* fallthrough */ 1010 case OCT_DEV_IO_QUEUES_DONE: 1011 if (lio_wait_for_instr_fetch(oct)) 1012 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); 1013 1014 if (wait_for_pending_requests(oct)) 1015 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 1016 1017 /* Disable the input and output queues now. No more packets will 1018 * arrive from Octeon, but we should wait for all packet 1019 * processing to finish. 1020 */ 1021 oct->fn_list.disable_io_queues(oct); 1022 1023 if (lio_wait_for_oq_pkts(oct)) 1024 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n"); 1025 1026 /* Force all requests waiting to be fetched by OCTEON to 1027 * complete. 1028 */ 1029 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1030 struct octeon_instr_queue *iq; 1031 1032 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1033 continue; 1034 iq = oct->instr_queue[i]; 1035 1036 if (atomic_read(&iq->instr_pending)) { 1037 spin_lock_bh(&iq->lock); 1038 iq->fill_cnt = 0; 1039 iq->octeon_read_index = iq->host_write_index; 1040 iq->stats.instr_processed += 1041 atomic_read(&iq->instr_pending); 1042 lio_process_iq_request_list(oct, iq, 0); 1043 spin_unlock_bh(&iq->lock); 1044 } 1045 } 1046 1047 lio_process_ordered_list(oct, 1); 1048 octeon_free_sc_done_list(oct); 1049 octeon_free_sc_zombie_list(oct); 1050 1051 /* fallthrough */ 1052 case OCT_DEV_INTR_SET_DONE: 1053 /* Disable interrupts */ 1054 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 1055 1056 if (oct->msix_on) { 1057 msix_entries = (struct msix_entry *)oct->msix_entries; 1058 for (i = 0; i < oct->num_msix_irqs - 1; i++) { 1059 if (oct->ioq_vector[i].vector) { 1060 /* clear the affinity_cpumask */ 1061 irq_set_affinity_hint( 1062 msix_entries[i].vector, 1063 NULL); 1064 free_irq(msix_entries[i].vector, 1065 &oct->ioq_vector[i]); 1066 oct->ioq_vector[i].vector = 0; 1067 } 1068 } 1069 /* non-iov vector's argument is oct struct */ 1070 free_irq(msix_entries[i].vector, oct); 1071 1072 pci_disable_msix(oct->pci_dev); 1073 kfree(oct->msix_entries); 1074 oct->msix_entries = NULL; 1075 } else { 1076 /* Release the interrupt line */ 1077 free_irq(oct->pci_dev->irq, oct); 1078 1079 if (oct->flags & LIO_FLAG_MSI_ENABLED) 1080 pci_disable_msi(oct->pci_dev); 1081 } 1082 1083 kfree(oct->irq_name_storage); 1084 oct->irq_name_storage = NULL; 1085 1086 /* fallthrough */ 1087 case OCT_DEV_MSIX_ALLOC_VECTOR_DONE: 1088 if (OCTEON_CN23XX_PF(oct)) 1089 octeon_free_ioq_vector(oct); 1090 1091 /* fallthrough */ 1092 case OCT_DEV_MBOX_SETUP_DONE: 1093 if (OCTEON_CN23XX_PF(oct)) 1094 oct->fn_list.free_mbox(oct); 1095 1096 /* fallthrough */ 1097 case OCT_DEV_IN_RESET: 1098 case OCT_DEV_DROQ_INIT_DONE: 1099 /* Wait for any pending operations */ 1100 mdelay(100); 1101 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 1102 if (!(oct->io_qmask.oq & BIT_ULL(i))) 1103 continue; 1104 octeon_delete_droq(oct, i); 1105 } 1106 1107 /* Force any pending handshakes to complete */ 1108 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 1109 hs = &handshake[i]; 1110 1111 if (hs->pci_dev) { 1112 handshake[oct->octeon_id].init_ok = 0; 1113 complete(&handshake[oct->octeon_id].init); 1114 handshake[oct->octeon_id].started_ok = 0; 1115 complete(&handshake[oct->octeon_id].started); 1116 } 1117 } 1118 1119 /* fallthrough */ 1120 case OCT_DEV_RESP_LIST_INIT_DONE: 1121 octeon_delete_response_list(oct); 1122 1123 /* fallthrough */ 1124 case OCT_DEV_INSTR_QUEUE_INIT_DONE: 1125 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1126 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1127 continue; 1128 octeon_delete_instr_queue(oct, i); 1129 } 1130 #ifdef CONFIG_PCI_IOV 1131 if (oct->sriov_info.sriov_enabled) 1132 pci_disable_sriov(oct->pci_dev); 1133 #endif 1134 /* fallthrough */ 1135 case OCT_DEV_SC_BUFF_POOL_INIT_DONE: 1136 octeon_free_sc_buffer_pool(oct); 1137 1138 /* fallthrough */ 1139 case OCT_DEV_DISPATCH_INIT_DONE: 1140 octeon_delete_dispatch_list(oct); 1141 cancel_delayed_work_sync(&oct->nic_poll_work.work); 1142 1143 /* fallthrough */ 1144 case OCT_DEV_PCI_MAP_DONE: 1145 refcount = octeon_deregister_device(oct); 1146 1147 /* Soft reset the octeon device before exiting. 1148 * However, if fw was loaded from card (i.e. autoboot), 1149 * perform an FLR instead. 1150 * Implementation note: only soft-reset the device 1151 * if it is a CN6XXX OR the LAST CN23XX device. 1152 */ 1153 if (atomic_read(oct->adapter_fw_state) == FW_IS_PRELOADED) 1154 octeon_pci_flr(oct); 1155 else if (OCTEON_CN6XXX(oct) || !refcount) 1156 oct->fn_list.soft_reset(oct); 1157 1158 octeon_unmap_pci_barx(oct, 0); 1159 octeon_unmap_pci_barx(oct, 1); 1160 1161 /* fallthrough */ 1162 case OCT_DEV_PCI_ENABLE_DONE: 1163 pci_clear_master(oct->pci_dev); 1164 /* Disable the device, releasing the PCI INT */ 1165 pci_disable_device(oct->pci_dev); 1166 1167 /* fallthrough */ 1168 case OCT_DEV_BEGIN_STATE: 1169 /* Nothing to be done here either */ 1170 break; 1171 } /* end switch (oct->status) */ 1172 1173 tasklet_kill(&oct_priv->droq_tasklet); 1174 } 1175 1176 /** 1177 * \brief Send Rx control command 1178 * @param lio per-network private data 1179 * @param start_stop whether to start or stop 1180 */ 1181 static void send_rx_ctrl_cmd(struct lio *lio, int start_stop) 1182 { 1183 struct octeon_soft_command *sc; 1184 union octnet_cmd *ncmd; 1185 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1186 int retval; 1187 1188 if (oct->props[lio->ifidx].rx_on == start_stop) 1189 return; 1190 1191 sc = (struct octeon_soft_command *) 1192 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE, 1193 16, 0); 1194 if (!sc) { 1195 netif_info(lio, rx_err, lio->netdev, 1196 "Failed to allocate octeon_soft_command\n"); 1197 return; 1198 } 1199 1200 ncmd = (union octnet_cmd *)sc->virtdptr; 1201 1202 ncmd->u64 = 0; 1203 ncmd->s.cmd = OCTNET_CMD_RX_CTL; 1204 ncmd->s.param1 = start_stop; 1205 1206 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3)); 1207 1208 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 1209 1210 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 1211 OPCODE_NIC_CMD, 0, 0, 0); 1212 1213 init_completion(&sc->complete); 1214 sc->sc_status = OCTEON_REQUEST_PENDING; 1215 1216 retval = octeon_send_soft_command(oct, sc); 1217 if (retval == IQ_SEND_FAILED) { 1218 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n"); 1219 octeon_free_soft_command(oct, sc); 1220 return; 1221 } else { 1222 /* Sleep on a wait queue till the cond flag indicates that the 1223 * response arrived or timed-out. 1224 */ 1225 retval = wait_for_sc_completion_timeout(oct, sc, 0); 1226 if (retval) 1227 return; 1228 1229 oct->props[lio->ifidx].rx_on = start_stop; 1230 WRITE_ONCE(sc->caller_is_done, true); 1231 } 1232 } 1233 1234 /** 1235 * \brief Destroy NIC device interface 1236 * @param oct octeon device 1237 * @param ifidx which interface to destroy 1238 * 1239 * Cleanup associated with each interface for an Octeon device when NIC 1240 * module is being unloaded or if initialization fails during load. 1241 */ 1242 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx) 1243 { 1244 struct net_device *netdev = oct->props[ifidx].netdev; 1245 struct octeon_device_priv *oct_priv = 1246 (struct octeon_device_priv *)oct->priv; 1247 struct napi_struct *napi, *n; 1248 struct lio *lio; 1249 1250 if (!netdev) { 1251 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n", 1252 __func__, ifidx); 1253 return; 1254 } 1255 1256 lio = GET_LIO(netdev); 1257 1258 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n"); 1259 1260 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) 1261 liquidio_stop(netdev); 1262 1263 if (oct->props[lio->ifidx].napi_enabled == 1) { 1264 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1265 napi_disable(napi); 1266 1267 oct->props[lio->ifidx].napi_enabled = 0; 1268 1269 if (OCTEON_CN23XX_PF(oct)) 1270 oct->droq[0]->ops.poll_mode = 0; 1271 } 1272 1273 /* Delete NAPI */ 1274 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1275 netif_napi_del(napi); 1276 1277 tasklet_enable(&oct_priv->droq_tasklet); 1278 1279 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) 1280 unregister_netdev(netdev); 1281 1282 cleanup_sync_octeon_time_wq(netdev); 1283 cleanup_link_status_change_wq(netdev); 1284 1285 cleanup_rx_oom_poll_fn(netdev); 1286 1287 lio_delete_glists(lio); 1288 1289 free_netdev(netdev); 1290 1291 oct->props[ifidx].gmxport = -1; 1292 1293 oct->props[ifidx].netdev = NULL; 1294 } 1295 1296 /** 1297 * \brief Stop complete NIC functionality 1298 * @param oct octeon device 1299 */ 1300 static int liquidio_stop_nic_module(struct octeon_device *oct) 1301 { 1302 int i, j; 1303 struct lio *lio; 1304 1305 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n"); 1306 if (!oct->ifcount) { 1307 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n"); 1308 return 1; 1309 } 1310 1311 spin_lock_bh(&oct->cmd_resp_wqlock); 1312 oct->cmd_resp_state = OCT_DRV_OFFLINE; 1313 spin_unlock_bh(&oct->cmd_resp_wqlock); 1314 1315 lio_vf_rep_destroy(oct); 1316 1317 for (i = 0; i < oct->ifcount; i++) { 1318 lio = GET_LIO(oct->props[i].netdev); 1319 for (j = 0; j < oct->num_oqs; j++) 1320 octeon_unregister_droq_ops(oct, 1321 lio->linfo.rxpciq[j].s.q_no); 1322 } 1323 1324 for (i = 0; i < oct->ifcount; i++) 1325 liquidio_destroy_nic_device(oct, i); 1326 1327 if (oct->devlink) { 1328 devlink_unregister(oct->devlink); 1329 devlink_free(oct->devlink); 1330 oct->devlink = NULL; 1331 } 1332 1333 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n"); 1334 return 0; 1335 } 1336 1337 /** 1338 * \brief Cleans up resources at unload time 1339 * @param pdev PCI device structure 1340 */ 1341 static void liquidio_remove(struct pci_dev *pdev) 1342 { 1343 struct octeon_device *oct_dev = pci_get_drvdata(pdev); 1344 1345 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n"); 1346 1347 if (oct_dev->watchdog_task) 1348 kthread_stop(oct_dev->watchdog_task); 1349 1350 if (!oct_dev->octeon_id && 1351 oct_dev->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) 1352 lio_vf_rep_modexit(); 1353 1354 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP)) 1355 liquidio_stop_nic_module(oct_dev); 1356 1357 /* Reset the octeon device and cleanup all memory allocated for 1358 * the octeon device by driver. 1359 */ 1360 octeon_destroy_resources(oct_dev); 1361 1362 dev_info(&oct_dev->pci_dev->dev, "Device removed\n"); 1363 1364 /* This octeon device has been removed. Update the global 1365 * data structure to reflect this. Free the device structure. 1366 */ 1367 octeon_free_device_mem(oct_dev); 1368 } 1369 1370 /** 1371 * \brief Identify the Octeon device and to map the BAR address space 1372 * @param oct octeon device 1373 */ 1374 static int octeon_chip_specific_setup(struct octeon_device *oct) 1375 { 1376 u32 dev_id, rev_id; 1377 int ret = 1; 1378 char *s; 1379 1380 pci_read_config_dword(oct->pci_dev, 0, &dev_id); 1381 pci_read_config_dword(oct->pci_dev, 8, &rev_id); 1382 oct->rev_id = rev_id & 0xff; 1383 1384 switch (dev_id) { 1385 case OCTEON_CN68XX_PCIID: 1386 oct->chip_id = OCTEON_CN68XX; 1387 ret = lio_setup_cn68xx_octeon_device(oct); 1388 s = "CN68XX"; 1389 break; 1390 1391 case OCTEON_CN66XX_PCIID: 1392 oct->chip_id = OCTEON_CN66XX; 1393 ret = lio_setup_cn66xx_octeon_device(oct); 1394 s = "CN66XX"; 1395 break; 1396 1397 case OCTEON_CN23XX_PCIID_PF: 1398 oct->chip_id = OCTEON_CN23XX_PF_VID; 1399 ret = setup_cn23xx_octeon_pf_device(oct); 1400 if (ret) 1401 break; 1402 #ifdef CONFIG_PCI_IOV 1403 if (!ret) 1404 pci_sriov_set_totalvfs(oct->pci_dev, 1405 oct->sriov_info.max_vfs); 1406 #endif 1407 s = "CN23XX"; 1408 break; 1409 1410 default: 1411 s = "?"; 1412 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n", 1413 dev_id); 1414 } 1415 1416 return ret; 1417 } 1418 1419 /** 1420 * \brief PCI initialization for each Octeon device. 1421 * @param oct octeon device 1422 */ 1423 static int octeon_pci_os_setup(struct octeon_device *oct) 1424 { 1425 /* setup PCI stuff first */ 1426 if (pci_enable_device(oct->pci_dev)) { 1427 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n"); 1428 return 1; 1429 } 1430 1431 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) { 1432 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n"); 1433 pci_disable_device(oct->pci_dev); 1434 return 1; 1435 } 1436 1437 /* Enable PCI DMA Master. */ 1438 pci_set_master(oct->pci_dev); 1439 1440 return 0; 1441 } 1442 1443 /** 1444 * \brief Unmap and free network buffer 1445 * @param buf buffer 1446 */ 1447 static void free_netbuf(void *buf) 1448 { 1449 struct sk_buff *skb; 1450 struct octnet_buf_free_info *finfo; 1451 struct lio *lio; 1452 1453 finfo = (struct octnet_buf_free_info *)buf; 1454 skb = finfo->skb; 1455 lio = finfo->lio; 1456 1457 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len, 1458 DMA_TO_DEVICE); 1459 1460 tx_buffer_free(skb); 1461 } 1462 1463 /** 1464 * \brief Unmap and free gather buffer 1465 * @param buf buffer 1466 */ 1467 static void free_netsgbuf(void *buf) 1468 { 1469 struct octnet_buf_free_info *finfo; 1470 struct sk_buff *skb; 1471 struct lio *lio; 1472 struct octnic_gather *g; 1473 int i, frags, iq; 1474 1475 finfo = (struct octnet_buf_free_info *)buf; 1476 skb = finfo->skb; 1477 lio = finfo->lio; 1478 g = finfo->g; 1479 frags = skb_shinfo(skb)->nr_frags; 1480 1481 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1482 g->sg[0].ptr[0], (skb->len - skb->data_len), 1483 DMA_TO_DEVICE); 1484 1485 i = 1; 1486 while (frags--) { 1487 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1488 1489 pci_unmap_page((lio->oct_dev)->pci_dev, 1490 g->sg[(i >> 2)].ptr[(i & 3)], 1491 skb_frag_size(frag), DMA_TO_DEVICE); 1492 i++; 1493 } 1494 1495 iq = skb_iq(lio->oct_dev, skb); 1496 spin_lock(&lio->glist_lock[iq]); 1497 list_add_tail(&g->list, &lio->glist[iq]); 1498 spin_unlock(&lio->glist_lock[iq]); 1499 1500 tx_buffer_free(skb); 1501 } 1502 1503 /** 1504 * \brief Unmap and free gather buffer with response 1505 * @param buf buffer 1506 */ 1507 static void free_netsgbuf_with_resp(void *buf) 1508 { 1509 struct octeon_soft_command *sc; 1510 struct octnet_buf_free_info *finfo; 1511 struct sk_buff *skb; 1512 struct lio *lio; 1513 struct octnic_gather *g; 1514 int i, frags, iq; 1515 1516 sc = (struct octeon_soft_command *)buf; 1517 skb = (struct sk_buff *)sc->callback_arg; 1518 finfo = (struct octnet_buf_free_info *)&skb->cb; 1519 1520 lio = finfo->lio; 1521 g = finfo->g; 1522 frags = skb_shinfo(skb)->nr_frags; 1523 1524 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1525 g->sg[0].ptr[0], (skb->len - skb->data_len), 1526 DMA_TO_DEVICE); 1527 1528 i = 1; 1529 while (frags--) { 1530 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1531 1532 pci_unmap_page((lio->oct_dev)->pci_dev, 1533 g->sg[(i >> 2)].ptr[(i & 3)], 1534 skb_frag_size(frag), DMA_TO_DEVICE); 1535 i++; 1536 } 1537 1538 iq = skb_iq(lio->oct_dev, skb); 1539 1540 spin_lock(&lio->glist_lock[iq]); 1541 list_add_tail(&g->list, &lio->glist[iq]); 1542 spin_unlock(&lio->glist_lock[iq]); 1543 1544 /* Don't free the skb yet */ 1545 } 1546 1547 /** 1548 * \brief Adjust ptp frequency 1549 * @param ptp PTP clock info 1550 * @param ppb how much to adjust by, in parts-per-billion 1551 */ 1552 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 1553 { 1554 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1555 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1556 u64 comp, delta; 1557 unsigned long flags; 1558 bool neg_adj = false; 1559 1560 if (ppb < 0) { 1561 neg_adj = true; 1562 ppb = -ppb; 1563 } 1564 1565 /* The hardware adds the clock compensation value to the 1566 * PTP clock on every coprocessor clock cycle, so we 1567 * compute the delta in terms of coprocessor clocks. 1568 */ 1569 delta = (u64)ppb << 32; 1570 do_div(delta, oct->coproc_clock_rate); 1571 1572 spin_lock_irqsave(&lio->ptp_lock, flags); 1573 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP); 1574 if (neg_adj) 1575 comp -= delta; 1576 else 1577 comp += delta; 1578 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1579 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1580 1581 return 0; 1582 } 1583 1584 /** 1585 * \brief Adjust ptp time 1586 * @param ptp PTP clock info 1587 * @param delta how much to adjust by, in nanosecs 1588 */ 1589 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 1590 { 1591 unsigned long flags; 1592 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1593 1594 spin_lock_irqsave(&lio->ptp_lock, flags); 1595 lio->ptp_adjust += delta; 1596 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1597 1598 return 0; 1599 } 1600 1601 /** 1602 * \brief Get hardware clock time, including any adjustment 1603 * @param ptp PTP clock info 1604 * @param ts timespec 1605 */ 1606 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp, 1607 struct timespec64 *ts) 1608 { 1609 u64 ns; 1610 unsigned long flags; 1611 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1612 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1613 1614 spin_lock_irqsave(&lio->ptp_lock, flags); 1615 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI); 1616 ns += lio->ptp_adjust; 1617 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1618 1619 *ts = ns_to_timespec64(ns); 1620 1621 return 0; 1622 } 1623 1624 /** 1625 * \brief Set hardware clock time. Reset adjustment 1626 * @param ptp PTP clock info 1627 * @param ts timespec 1628 */ 1629 static int liquidio_ptp_settime(struct ptp_clock_info *ptp, 1630 const struct timespec64 *ts) 1631 { 1632 u64 ns; 1633 unsigned long flags; 1634 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1635 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1636 1637 ns = timespec64_to_ns(ts); 1638 1639 spin_lock_irqsave(&lio->ptp_lock, flags); 1640 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI); 1641 lio->ptp_adjust = 0; 1642 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1643 1644 return 0; 1645 } 1646 1647 /** 1648 * \brief Check if PTP is enabled 1649 * @param ptp PTP clock info 1650 * @param rq request 1651 * @param on is it on 1652 */ 1653 static int 1654 liquidio_ptp_enable(struct ptp_clock_info *ptp __attribute__((unused)), 1655 struct ptp_clock_request *rq __attribute__((unused)), 1656 int on __attribute__((unused))) 1657 { 1658 return -EOPNOTSUPP; 1659 } 1660 1661 /** 1662 * \brief Open PTP clock source 1663 * @param netdev network device 1664 */ 1665 static void oct_ptp_open(struct net_device *netdev) 1666 { 1667 struct lio *lio = GET_LIO(netdev); 1668 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1669 1670 spin_lock_init(&lio->ptp_lock); 1671 1672 snprintf(lio->ptp_info.name, 16, "%s", netdev->name); 1673 lio->ptp_info.owner = THIS_MODULE; 1674 lio->ptp_info.max_adj = 250000000; 1675 lio->ptp_info.n_alarm = 0; 1676 lio->ptp_info.n_ext_ts = 0; 1677 lio->ptp_info.n_per_out = 0; 1678 lio->ptp_info.pps = 0; 1679 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; 1680 lio->ptp_info.adjtime = liquidio_ptp_adjtime; 1681 lio->ptp_info.gettime64 = liquidio_ptp_gettime; 1682 lio->ptp_info.settime64 = liquidio_ptp_settime; 1683 lio->ptp_info.enable = liquidio_ptp_enable; 1684 1685 lio->ptp_adjust = 0; 1686 1687 lio->ptp_clock = ptp_clock_register(&lio->ptp_info, 1688 &oct->pci_dev->dev); 1689 1690 if (IS_ERR(lio->ptp_clock)) 1691 lio->ptp_clock = NULL; 1692 } 1693 1694 /** 1695 * \brief Init PTP clock 1696 * @param oct octeon device 1697 */ 1698 static void liquidio_ptp_init(struct octeon_device *oct) 1699 { 1700 u64 clock_comp, cfg; 1701 1702 clock_comp = (u64)NSEC_PER_SEC << 32; 1703 do_div(clock_comp, oct->coproc_clock_rate); 1704 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1705 1706 /* Enable */ 1707 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG); 1708 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG); 1709 } 1710 1711 /** 1712 * \brief Load firmware to device 1713 * @param oct octeon device 1714 * 1715 * Maps device to firmware filename, requests firmware, and downloads it 1716 */ 1717 static int load_firmware(struct octeon_device *oct) 1718 { 1719 int ret = 0; 1720 const struct firmware *fw; 1721 char fw_name[LIO_MAX_FW_FILENAME_LEN]; 1722 char *tmp_fw_type; 1723 1724 if (fw_type_is_auto()) { 1725 tmp_fw_type = LIO_FW_NAME_TYPE_NIC; 1726 strncpy(fw_type, tmp_fw_type, sizeof(fw_type)); 1727 } else { 1728 tmp_fw_type = fw_type; 1729 } 1730 1731 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME, 1732 octeon_get_conf(oct)->card_name, tmp_fw_type, 1733 LIO_FW_NAME_SUFFIX); 1734 1735 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev); 1736 if (ret) { 1737 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n", 1738 fw_name); 1739 release_firmware(fw); 1740 return ret; 1741 } 1742 1743 ret = octeon_download_firmware(oct, fw->data, fw->size); 1744 1745 release_firmware(fw); 1746 1747 return ret; 1748 } 1749 1750 /** 1751 * \brief Poll routine for checking transmit queue status 1752 * @param work work_struct data structure 1753 */ 1754 static void octnet_poll_check_txq_status(struct work_struct *work) 1755 { 1756 struct cavium_wk *wk = (struct cavium_wk *)work; 1757 struct lio *lio = (struct lio *)wk->ctxptr; 1758 1759 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) 1760 return; 1761 1762 check_txq_status(lio); 1763 queue_delayed_work(lio->txq_status_wq.wq, 1764 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1765 } 1766 1767 /** 1768 * \brief Sets up the txq poll check 1769 * @param netdev network device 1770 */ 1771 static inline int setup_tx_poll_fn(struct net_device *netdev) 1772 { 1773 struct lio *lio = GET_LIO(netdev); 1774 struct octeon_device *oct = lio->oct_dev; 1775 1776 lio->txq_status_wq.wq = alloc_workqueue("txq-status", 1777 WQ_MEM_RECLAIM, 0); 1778 if (!lio->txq_status_wq.wq) { 1779 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n"); 1780 return -1; 1781 } 1782 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work, 1783 octnet_poll_check_txq_status); 1784 lio->txq_status_wq.wk.ctxptr = lio; 1785 queue_delayed_work(lio->txq_status_wq.wq, 1786 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1787 return 0; 1788 } 1789 1790 static inline void cleanup_tx_poll_fn(struct net_device *netdev) 1791 { 1792 struct lio *lio = GET_LIO(netdev); 1793 1794 if (lio->txq_status_wq.wq) { 1795 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work); 1796 destroy_workqueue(lio->txq_status_wq.wq); 1797 } 1798 } 1799 1800 /** 1801 * \brief Net device open for LiquidIO 1802 * @param netdev network device 1803 */ 1804 static int liquidio_open(struct net_device *netdev) 1805 { 1806 struct lio *lio = GET_LIO(netdev); 1807 struct octeon_device *oct = lio->oct_dev; 1808 struct octeon_device_priv *oct_priv = 1809 (struct octeon_device_priv *)oct->priv; 1810 struct napi_struct *napi, *n; 1811 1812 if (oct->props[lio->ifidx].napi_enabled == 0) { 1813 tasklet_disable(&oct_priv->droq_tasklet); 1814 1815 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1816 napi_enable(napi); 1817 1818 oct->props[lio->ifidx].napi_enabled = 1; 1819 1820 if (OCTEON_CN23XX_PF(oct)) 1821 oct->droq[0]->ops.poll_mode = 1; 1822 } 1823 1824 if (oct->ptp_enable) 1825 oct_ptp_open(netdev); 1826 1827 ifstate_set(lio, LIO_IFSTATE_RUNNING); 1828 1829 if (OCTEON_CN23XX_PF(oct)) { 1830 if (!oct->msix_on) 1831 if (setup_tx_poll_fn(netdev)) 1832 return -1; 1833 } else { 1834 if (setup_tx_poll_fn(netdev)) 1835 return -1; 1836 } 1837 1838 netif_tx_start_all_queues(netdev); 1839 1840 /* Ready for link status updates */ 1841 lio->intf_open = 1; 1842 1843 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n"); 1844 1845 /* tell Octeon to start forwarding packets to host */ 1846 send_rx_ctrl_cmd(lio, 1); 1847 1848 /* start periodical statistics fetch */ 1849 INIT_DELAYED_WORK(&lio->stats_wk.work, lio_fetch_stats); 1850 lio->stats_wk.ctxptr = lio; 1851 schedule_delayed_work(&lio->stats_wk.work, msecs_to_jiffies 1852 (LIQUIDIO_NDEV_STATS_POLL_TIME_MS)); 1853 1854 dev_info(&oct->pci_dev->dev, "%s interface is opened\n", 1855 netdev->name); 1856 1857 return 0; 1858 } 1859 1860 /** 1861 * \brief Net device stop for LiquidIO 1862 * @param netdev network device 1863 */ 1864 static int liquidio_stop(struct net_device *netdev) 1865 { 1866 struct lio *lio = GET_LIO(netdev); 1867 struct octeon_device *oct = lio->oct_dev; 1868 struct octeon_device_priv *oct_priv = 1869 (struct octeon_device_priv *)oct->priv; 1870 struct napi_struct *napi, *n; 1871 1872 ifstate_reset(lio, LIO_IFSTATE_RUNNING); 1873 1874 /* Stop any link updates */ 1875 lio->intf_open = 0; 1876 1877 stop_txqs(netdev); 1878 1879 /* Inform that netif carrier is down */ 1880 netif_carrier_off(netdev); 1881 netif_tx_disable(netdev); 1882 1883 lio->linfo.link.s.link_up = 0; 1884 lio->link_changes++; 1885 1886 /* Tell Octeon that nic interface is down. */ 1887 send_rx_ctrl_cmd(lio, 0); 1888 1889 if (OCTEON_CN23XX_PF(oct)) { 1890 if (!oct->msix_on) 1891 cleanup_tx_poll_fn(netdev); 1892 } else { 1893 cleanup_tx_poll_fn(netdev); 1894 } 1895 1896 cancel_delayed_work_sync(&lio->stats_wk.work); 1897 1898 if (lio->ptp_clock) { 1899 ptp_clock_unregister(lio->ptp_clock); 1900 lio->ptp_clock = NULL; 1901 } 1902 1903 /* Wait for any pending Rx descriptors */ 1904 if (lio_wait_for_clean_oq(oct)) 1905 netif_info(lio, rx_err, lio->netdev, 1906 "Proceeding with stop interface after partial RX desc processing\n"); 1907 1908 if (oct->props[lio->ifidx].napi_enabled == 1) { 1909 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1910 napi_disable(napi); 1911 1912 oct->props[lio->ifidx].napi_enabled = 0; 1913 1914 if (OCTEON_CN23XX_PF(oct)) 1915 oct->droq[0]->ops.poll_mode = 0; 1916 1917 tasklet_enable(&oct_priv->droq_tasklet); 1918 } 1919 1920 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name); 1921 1922 return 0; 1923 } 1924 1925 /** 1926 * \brief Converts a mask based on net device flags 1927 * @param netdev network device 1928 * 1929 * This routine generates a octnet_ifflags mask from the net device flags 1930 * received from the OS. 1931 */ 1932 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev) 1933 { 1934 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST; 1935 1936 if (netdev->flags & IFF_PROMISC) 1937 f |= OCTNET_IFFLAG_PROMISC; 1938 1939 if (netdev->flags & IFF_ALLMULTI) 1940 f |= OCTNET_IFFLAG_ALLMULTI; 1941 1942 if (netdev->flags & IFF_MULTICAST) { 1943 f |= OCTNET_IFFLAG_MULTICAST; 1944 1945 /* Accept all multicast addresses if there are more than we 1946 * can handle 1947 */ 1948 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR) 1949 f |= OCTNET_IFFLAG_ALLMULTI; 1950 } 1951 1952 if (netdev->flags & IFF_BROADCAST) 1953 f |= OCTNET_IFFLAG_BROADCAST; 1954 1955 return f; 1956 } 1957 1958 /** 1959 * \brief Net device set_multicast_list 1960 * @param netdev network device 1961 */ 1962 static void liquidio_set_mcast_list(struct net_device *netdev) 1963 { 1964 struct lio *lio = GET_LIO(netdev); 1965 struct octeon_device *oct = lio->oct_dev; 1966 struct octnic_ctrl_pkt nctrl; 1967 struct netdev_hw_addr *ha; 1968 u64 *mc; 1969 int ret; 1970 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR); 1971 1972 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 1973 1974 /* Create a ctrl pkt command to be sent to core app. */ 1975 nctrl.ncmd.u64 = 0; 1976 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST; 1977 nctrl.ncmd.s.param1 = get_new_flags(netdev); 1978 nctrl.ncmd.s.param2 = mc_count; 1979 nctrl.ncmd.s.more = mc_count; 1980 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 1981 nctrl.netpndev = (u64)netdev; 1982 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 1983 1984 /* copy all the addresses into the udd */ 1985 mc = &nctrl.udd[0]; 1986 netdev_for_each_mc_addr(ha, netdev) { 1987 *mc = 0; 1988 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN); 1989 /* no need to swap bytes */ 1990 1991 if (++mc > &nctrl.udd[mc_count]) 1992 break; 1993 } 1994 1995 /* Apparently, any activity in this call from the kernel has to 1996 * be atomic. So we won't wait for response. 1997 */ 1998 1999 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2000 if (ret) { 2001 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n", 2002 ret); 2003 } 2004 } 2005 2006 /** 2007 * \brief Net device set_mac_address 2008 * @param netdev network device 2009 */ 2010 static int liquidio_set_mac(struct net_device *netdev, void *p) 2011 { 2012 int ret = 0; 2013 struct lio *lio = GET_LIO(netdev); 2014 struct octeon_device *oct = lio->oct_dev; 2015 struct sockaddr *addr = (struct sockaddr *)p; 2016 struct octnic_ctrl_pkt nctrl; 2017 2018 if (!is_valid_ether_addr(addr->sa_data)) 2019 return -EADDRNOTAVAIL; 2020 2021 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2022 2023 nctrl.ncmd.u64 = 0; 2024 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2025 nctrl.ncmd.s.param1 = 0; 2026 nctrl.ncmd.s.more = 1; 2027 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2028 nctrl.netpndev = (u64)netdev; 2029 2030 nctrl.udd[0] = 0; 2031 /* The MAC Address is presented in network byte order. */ 2032 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN); 2033 2034 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2035 if (ret < 0) { 2036 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n"); 2037 return -ENOMEM; 2038 } 2039 2040 if (nctrl.sc_status) { 2041 dev_err(&oct->pci_dev->dev, 2042 "%s: MAC Address change failed. sc return=%x\n", 2043 __func__, nctrl.sc_status); 2044 return -EIO; 2045 } 2046 2047 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2048 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN); 2049 2050 return 0; 2051 } 2052 2053 static void 2054 liquidio_get_stats64(struct net_device *netdev, 2055 struct rtnl_link_stats64 *lstats) 2056 { 2057 struct lio *lio = GET_LIO(netdev); 2058 struct octeon_device *oct; 2059 u64 pkts = 0, drop = 0, bytes = 0; 2060 struct oct_droq_stats *oq_stats; 2061 struct oct_iq_stats *iq_stats; 2062 int i, iq_no, oq_no; 2063 2064 oct = lio->oct_dev; 2065 2066 if (ifstate_check(lio, LIO_IFSTATE_RESETTING)) 2067 return; 2068 2069 for (i = 0; i < oct->num_iqs; i++) { 2070 iq_no = lio->linfo.txpciq[i].s.q_no; 2071 iq_stats = &oct->instr_queue[iq_no]->stats; 2072 pkts += iq_stats->tx_done; 2073 drop += iq_stats->tx_dropped; 2074 bytes += iq_stats->tx_tot_bytes; 2075 } 2076 2077 lstats->tx_packets = pkts; 2078 lstats->tx_bytes = bytes; 2079 lstats->tx_dropped = drop; 2080 2081 pkts = 0; 2082 drop = 0; 2083 bytes = 0; 2084 2085 for (i = 0; i < oct->num_oqs; i++) { 2086 oq_no = lio->linfo.rxpciq[i].s.q_no; 2087 oq_stats = &oct->droq[oq_no]->stats; 2088 pkts += oq_stats->rx_pkts_received; 2089 drop += (oq_stats->rx_dropped + 2090 oq_stats->dropped_nodispatch + 2091 oq_stats->dropped_toomany + 2092 oq_stats->dropped_nomem); 2093 bytes += oq_stats->rx_bytes_received; 2094 } 2095 2096 lstats->rx_bytes = bytes; 2097 lstats->rx_packets = pkts; 2098 lstats->rx_dropped = drop; 2099 2100 lstats->multicast = oct->link_stats.fromwire.fw_total_mcast; 2101 lstats->collisions = oct->link_stats.fromhost.total_collisions; 2102 2103 /* detailed rx_errors: */ 2104 lstats->rx_length_errors = oct->link_stats.fromwire.l2_err; 2105 /* recved pkt with crc error */ 2106 lstats->rx_crc_errors = oct->link_stats.fromwire.fcs_err; 2107 /* recv'd frame alignment error */ 2108 lstats->rx_frame_errors = oct->link_stats.fromwire.frame_err; 2109 /* recv'r fifo overrun */ 2110 lstats->rx_fifo_errors = oct->link_stats.fromwire.fifo_err; 2111 2112 lstats->rx_errors = lstats->rx_length_errors + lstats->rx_crc_errors + 2113 lstats->rx_frame_errors + lstats->rx_fifo_errors; 2114 2115 /* detailed tx_errors */ 2116 lstats->tx_aborted_errors = oct->link_stats.fromhost.fw_err_pko; 2117 lstats->tx_carrier_errors = oct->link_stats.fromhost.fw_err_link; 2118 lstats->tx_fifo_errors = oct->link_stats.fromhost.fifo_err; 2119 2120 lstats->tx_errors = lstats->tx_aborted_errors + 2121 lstats->tx_carrier_errors + 2122 lstats->tx_fifo_errors; 2123 } 2124 2125 /** 2126 * \brief Handler for SIOCSHWTSTAMP ioctl 2127 * @param netdev network device 2128 * @param ifr interface request 2129 * @param cmd command 2130 */ 2131 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 2132 { 2133 struct hwtstamp_config conf; 2134 struct lio *lio = GET_LIO(netdev); 2135 2136 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf))) 2137 return -EFAULT; 2138 2139 if (conf.flags) 2140 return -EINVAL; 2141 2142 switch (conf.tx_type) { 2143 case HWTSTAMP_TX_ON: 2144 case HWTSTAMP_TX_OFF: 2145 break; 2146 default: 2147 return -ERANGE; 2148 } 2149 2150 switch (conf.rx_filter) { 2151 case HWTSTAMP_FILTER_NONE: 2152 break; 2153 case HWTSTAMP_FILTER_ALL: 2154 case HWTSTAMP_FILTER_SOME: 2155 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2156 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2157 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2158 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2159 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2160 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2161 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2162 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2163 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2164 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2165 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2166 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2167 case HWTSTAMP_FILTER_NTP_ALL: 2168 conf.rx_filter = HWTSTAMP_FILTER_ALL; 2169 break; 2170 default: 2171 return -ERANGE; 2172 } 2173 2174 if (conf.rx_filter == HWTSTAMP_FILTER_ALL) 2175 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2176 2177 else 2178 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2179 2180 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0; 2181 } 2182 2183 /** 2184 * \brief ioctl handler 2185 * @param netdev network device 2186 * @param ifr interface request 2187 * @param cmd command 2188 */ 2189 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2190 { 2191 struct lio *lio = GET_LIO(netdev); 2192 2193 switch (cmd) { 2194 case SIOCSHWTSTAMP: 2195 if (lio->oct_dev->ptp_enable) 2196 return hwtstamp_ioctl(netdev, ifr); 2197 /* fall through */ 2198 default: 2199 return -EOPNOTSUPP; 2200 } 2201 } 2202 2203 /** 2204 * \brief handle a Tx timestamp response 2205 * @param status response status 2206 * @param buf pointer to skb 2207 */ 2208 static void handle_timestamp(struct octeon_device *oct, 2209 u32 status, 2210 void *buf) 2211 { 2212 struct octnet_buf_free_info *finfo; 2213 struct octeon_soft_command *sc; 2214 struct oct_timestamp_resp *resp; 2215 struct lio *lio; 2216 struct sk_buff *skb = (struct sk_buff *)buf; 2217 2218 finfo = (struct octnet_buf_free_info *)skb->cb; 2219 lio = finfo->lio; 2220 sc = finfo->sc; 2221 oct = lio->oct_dev; 2222 resp = (struct oct_timestamp_resp *)sc->virtrptr; 2223 2224 if (status != OCTEON_REQUEST_DONE) { 2225 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n", 2226 CVM_CAST64(status)); 2227 resp->timestamp = 0; 2228 } 2229 2230 octeon_swap_8B_data(&resp->timestamp, 1); 2231 2232 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) { 2233 struct skb_shared_hwtstamps ts; 2234 u64 ns = resp->timestamp; 2235 2236 netif_info(lio, tx_done, lio->netdev, 2237 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n", 2238 skb, (unsigned long long)ns); 2239 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust); 2240 skb_tstamp_tx(skb, &ts); 2241 } 2242 2243 octeon_free_soft_command(oct, sc); 2244 tx_buffer_free(skb); 2245 } 2246 2247 /* \brief Send a data packet that will be timestamped 2248 * @param oct octeon device 2249 * @param ndata pointer to network data 2250 * @param finfo pointer to private network data 2251 */ 2252 static inline int send_nic_timestamp_pkt(struct octeon_device *oct, 2253 struct octnic_data_pkt *ndata, 2254 struct octnet_buf_free_info *finfo, 2255 int xmit_more) 2256 { 2257 int retval; 2258 struct octeon_soft_command *sc; 2259 struct lio *lio; 2260 int ring_doorbell; 2261 u32 len; 2262 2263 lio = finfo->lio; 2264 2265 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd, 2266 sizeof(struct oct_timestamp_resp)); 2267 finfo->sc = sc; 2268 2269 if (!sc) { 2270 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n"); 2271 return IQ_SEND_FAILED; 2272 } 2273 2274 if (ndata->reqtype == REQTYPE_NORESP_NET) 2275 ndata->reqtype = REQTYPE_RESP_NET; 2276 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG) 2277 ndata->reqtype = REQTYPE_RESP_NET_SG; 2278 2279 sc->callback = handle_timestamp; 2280 sc->callback_arg = finfo->skb; 2281 sc->iq_no = ndata->q_no; 2282 2283 if (OCTEON_CN23XX_PF(oct)) 2284 len = (u32)((struct octeon_instr_ih3 *) 2285 (&sc->cmd.cmd3.ih3))->dlengsz; 2286 else 2287 len = (u32)((struct octeon_instr_ih2 *) 2288 (&sc->cmd.cmd2.ih2))->dlengsz; 2289 2290 ring_doorbell = !xmit_more; 2291 2292 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd, 2293 sc, len, ndata->reqtype); 2294 2295 if (retval == IQ_SEND_FAILED) { 2296 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n", 2297 retval); 2298 octeon_free_soft_command(oct, sc); 2299 } else { 2300 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n"); 2301 } 2302 2303 return retval; 2304 } 2305 2306 /** \brief Transmit networks packets to the Octeon interface 2307 * @param skbuff skbuff struct to be passed to network layer. 2308 * @param netdev pointer to network device 2309 * @returns whether the packet was transmitted to the device okay or not 2310 * (NETDEV_TX_OK or NETDEV_TX_BUSY) 2311 */ 2312 static netdev_tx_t liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) 2313 { 2314 struct lio *lio; 2315 struct octnet_buf_free_info *finfo; 2316 union octnic_cmd_setup cmdsetup; 2317 struct octnic_data_pkt ndata; 2318 struct octeon_device *oct; 2319 struct oct_iq_stats *stats; 2320 struct octeon_instr_irh *irh; 2321 union tx_info *tx_info; 2322 int status = 0; 2323 int q_idx = 0, iq_no = 0; 2324 int j, xmit_more = 0; 2325 u64 dptr = 0; 2326 u32 tag = 0; 2327 2328 lio = GET_LIO(netdev); 2329 oct = lio->oct_dev; 2330 2331 q_idx = skb_iq(oct, skb); 2332 tag = q_idx; 2333 iq_no = lio->linfo.txpciq[q_idx].s.q_no; 2334 2335 stats = &oct->instr_queue[iq_no]->stats; 2336 2337 /* Check for all conditions in which the current packet cannot be 2338 * transmitted. 2339 */ 2340 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) || 2341 (!lio->linfo.link.s.link_up) || 2342 (skb->len <= 0)) { 2343 netif_info(lio, tx_err, lio->netdev, 2344 "Transmit failed link_status : %d\n", 2345 lio->linfo.link.s.link_up); 2346 goto lio_xmit_failed; 2347 } 2348 2349 /* Use space in skb->cb to store info used to unmap and 2350 * free the buffers. 2351 */ 2352 finfo = (struct octnet_buf_free_info *)skb->cb; 2353 finfo->lio = lio; 2354 finfo->skb = skb; 2355 finfo->sc = NULL; 2356 2357 /* Prepare the attributes for the data to be passed to OSI. */ 2358 memset(&ndata, 0, sizeof(struct octnic_data_pkt)); 2359 2360 ndata.buf = (void *)finfo; 2361 2362 ndata.q_no = iq_no; 2363 2364 if (octnet_iq_is_full(oct, ndata.q_no)) { 2365 /* defer sending if queue is full */ 2366 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", 2367 ndata.q_no); 2368 stats->tx_iq_busy++; 2369 return NETDEV_TX_BUSY; 2370 } 2371 2372 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n", 2373 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no); 2374 */ 2375 2376 ndata.datasize = skb->len; 2377 2378 cmdsetup.u64 = 0; 2379 cmdsetup.s.iq_no = iq_no; 2380 2381 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2382 if (skb->encapsulation) { 2383 cmdsetup.s.tnl_csum = 1; 2384 stats->tx_vxlan++; 2385 } else { 2386 cmdsetup.s.transport_csum = 1; 2387 } 2388 } 2389 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { 2390 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2391 cmdsetup.s.timestamp = 1; 2392 } 2393 2394 if (skb_shinfo(skb)->nr_frags == 0) { 2395 cmdsetup.s.u.datasize = skb->len; 2396 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2397 2398 /* Offload checksum calculation for TCP/UDP packets */ 2399 dptr = dma_map_single(&oct->pci_dev->dev, 2400 skb->data, 2401 skb->len, 2402 DMA_TO_DEVICE); 2403 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { 2404 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n", 2405 __func__); 2406 stats->tx_dmamap_fail++; 2407 return NETDEV_TX_BUSY; 2408 } 2409 2410 if (OCTEON_CN23XX_PF(oct)) 2411 ndata.cmd.cmd3.dptr = dptr; 2412 else 2413 ndata.cmd.cmd2.dptr = dptr; 2414 finfo->dptr = dptr; 2415 ndata.reqtype = REQTYPE_NORESP_NET; 2416 2417 } else { 2418 int i, frags; 2419 skb_frag_t *frag; 2420 struct octnic_gather *g; 2421 2422 spin_lock(&lio->glist_lock[q_idx]); 2423 g = (struct octnic_gather *) 2424 lio_list_delete_head(&lio->glist[q_idx]); 2425 spin_unlock(&lio->glist_lock[q_idx]); 2426 2427 if (!g) { 2428 netif_info(lio, tx_err, lio->netdev, 2429 "Transmit scatter gather: glist null!\n"); 2430 goto lio_xmit_failed; 2431 } 2432 2433 cmdsetup.s.gather = 1; 2434 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1); 2435 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2436 2437 memset(g->sg, 0, g->sg_size); 2438 2439 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev, 2440 skb->data, 2441 (skb->len - skb->data_len), 2442 DMA_TO_DEVICE); 2443 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) { 2444 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n", 2445 __func__); 2446 stats->tx_dmamap_fail++; 2447 return NETDEV_TX_BUSY; 2448 } 2449 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0); 2450 2451 frags = skb_shinfo(skb)->nr_frags; 2452 i = 1; 2453 while (frags--) { 2454 frag = &skb_shinfo(skb)->frags[i - 1]; 2455 2456 g->sg[(i >> 2)].ptr[(i & 3)] = 2457 skb_frag_dma_map(&oct->pci_dev->dev, 2458 frag, 0, skb_frag_size(frag), 2459 DMA_TO_DEVICE); 2460 2461 if (dma_mapping_error(&oct->pci_dev->dev, 2462 g->sg[i >> 2].ptr[i & 3])) { 2463 dma_unmap_single(&oct->pci_dev->dev, 2464 g->sg[0].ptr[0], 2465 skb->len - skb->data_len, 2466 DMA_TO_DEVICE); 2467 for (j = 1; j < i; j++) { 2468 frag = &skb_shinfo(skb)->frags[j - 1]; 2469 dma_unmap_page(&oct->pci_dev->dev, 2470 g->sg[j >> 2].ptr[j & 3], 2471 skb_frag_size(frag), 2472 DMA_TO_DEVICE); 2473 } 2474 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n", 2475 __func__); 2476 return NETDEV_TX_BUSY; 2477 } 2478 2479 add_sg_size(&g->sg[(i >> 2)], skb_frag_size(frag), 2480 (i & 3)); 2481 i++; 2482 } 2483 2484 dptr = g->sg_dma_ptr; 2485 2486 if (OCTEON_CN23XX_PF(oct)) 2487 ndata.cmd.cmd3.dptr = dptr; 2488 else 2489 ndata.cmd.cmd2.dptr = dptr; 2490 finfo->dptr = dptr; 2491 finfo->g = g; 2492 2493 ndata.reqtype = REQTYPE_NORESP_NET_SG; 2494 } 2495 2496 if (OCTEON_CN23XX_PF(oct)) { 2497 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh; 2498 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0]; 2499 } else { 2500 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh; 2501 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0]; 2502 } 2503 2504 if (skb_shinfo(skb)->gso_size) { 2505 tx_info->s.gso_size = skb_shinfo(skb)->gso_size; 2506 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs; 2507 stats->tx_gso++; 2508 } 2509 2510 /* HW insert VLAN tag */ 2511 if (skb_vlan_tag_present(skb)) { 2512 irh->priority = skb_vlan_tag_get(skb) >> 13; 2513 irh->vlan = skb_vlan_tag_get(skb) & 0xfff; 2514 } 2515 2516 xmit_more = netdev_xmit_more(); 2517 2518 if (unlikely(cmdsetup.s.timestamp)) 2519 status = send_nic_timestamp_pkt(oct, &ndata, finfo, xmit_more); 2520 else 2521 status = octnet_send_nic_data_pkt(oct, &ndata, xmit_more); 2522 if (status == IQ_SEND_FAILED) 2523 goto lio_xmit_failed; 2524 2525 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n"); 2526 2527 if (status == IQ_SEND_STOP) 2528 netif_stop_subqueue(netdev, q_idx); 2529 2530 netif_trans_update(netdev); 2531 2532 if (tx_info->s.gso_segs) 2533 stats->tx_done += tx_info->s.gso_segs; 2534 else 2535 stats->tx_done++; 2536 stats->tx_tot_bytes += ndata.datasize; 2537 2538 return NETDEV_TX_OK; 2539 2540 lio_xmit_failed: 2541 stats->tx_dropped++; 2542 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n", 2543 iq_no, stats->tx_dropped); 2544 if (dptr) 2545 dma_unmap_single(&oct->pci_dev->dev, dptr, 2546 ndata.datasize, DMA_TO_DEVICE); 2547 2548 octeon_ring_doorbell_locked(oct, iq_no); 2549 2550 tx_buffer_free(skb); 2551 return NETDEV_TX_OK; 2552 } 2553 2554 /** \brief Network device Tx timeout 2555 * @param netdev pointer to network device 2556 */ 2557 static void liquidio_tx_timeout(struct net_device *netdev, unsigned int txqueue) 2558 { 2559 struct lio *lio; 2560 2561 lio = GET_LIO(netdev); 2562 2563 netif_info(lio, tx_err, lio->netdev, 2564 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n", 2565 netdev->stats.tx_dropped); 2566 netif_trans_update(netdev); 2567 wake_txqs(netdev); 2568 } 2569 2570 static int liquidio_vlan_rx_add_vid(struct net_device *netdev, 2571 __be16 proto __attribute__((unused)), 2572 u16 vid) 2573 { 2574 struct lio *lio = GET_LIO(netdev); 2575 struct octeon_device *oct = lio->oct_dev; 2576 struct octnic_ctrl_pkt nctrl; 2577 int ret = 0; 2578 2579 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2580 2581 nctrl.ncmd.u64 = 0; 2582 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2583 nctrl.ncmd.s.param1 = vid; 2584 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2585 nctrl.netpndev = (u64)netdev; 2586 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2587 2588 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2589 if (ret) { 2590 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", 2591 ret); 2592 if (ret > 0) 2593 ret = -EIO; 2594 } 2595 2596 return ret; 2597 } 2598 2599 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev, 2600 __be16 proto __attribute__((unused)), 2601 u16 vid) 2602 { 2603 struct lio *lio = GET_LIO(netdev); 2604 struct octeon_device *oct = lio->oct_dev; 2605 struct octnic_ctrl_pkt nctrl; 2606 int ret = 0; 2607 2608 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2609 2610 nctrl.ncmd.u64 = 0; 2611 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2612 nctrl.ncmd.s.param1 = vid; 2613 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2614 nctrl.netpndev = (u64)netdev; 2615 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2616 2617 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2618 if (ret) { 2619 dev_err(&oct->pci_dev->dev, "Del VLAN filter failed in core (ret: 0x%x)\n", 2620 ret); 2621 if (ret > 0) 2622 ret = -EIO; 2623 } 2624 return ret; 2625 } 2626 2627 /** Sending command to enable/disable RX checksum offload 2628 * @param netdev pointer to network device 2629 * @param command OCTNET_CMD_TNL_RX_CSUM_CTL 2630 * @param rx_cmd_bit OCTNET_CMD_RXCSUM_ENABLE/ 2631 * OCTNET_CMD_RXCSUM_DISABLE 2632 * @returns SUCCESS or FAILURE 2633 */ 2634 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command, 2635 u8 rx_cmd) 2636 { 2637 struct lio *lio = GET_LIO(netdev); 2638 struct octeon_device *oct = lio->oct_dev; 2639 struct octnic_ctrl_pkt nctrl; 2640 int ret = 0; 2641 2642 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2643 2644 nctrl.ncmd.u64 = 0; 2645 nctrl.ncmd.s.cmd = command; 2646 nctrl.ncmd.s.param1 = rx_cmd; 2647 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2648 nctrl.netpndev = (u64)netdev; 2649 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2650 2651 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2652 if (ret) { 2653 dev_err(&oct->pci_dev->dev, 2654 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n", 2655 ret); 2656 if (ret > 0) 2657 ret = -EIO; 2658 } 2659 return ret; 2660 } 2661 2662 /** Sending command to add/delete VxLAN UDP port to firmware 2663 * @param netdev pointer to network device 2664 * @param command OCTNET_CMD_VXLAN_PORT_CONFIG 2665 * @param vxlan_port VxLAN port to be added or deleted 2666 * @param vxlan_cmd_bit OCTNET_CMD_VXLAN_PORT_ADD, 2667 * OCTNET_CMD_VXLAN_PORT_DEL 2668 * @returns SUCCESS or FAILURE 2669 */ 2670 static int liquidio_vxlan_port_command(struct net_device *netdev, int command, 2671 u16 vxlan_port, u8 vxlan_cmd_bit) 2672 { 2673 struct lio *lio = GET_LIO(netdev); 2674 struct octeon_device *oct = lio->oct_dev; 2675 struct octnic_ctrl_pkt nctrl; 2676 int ret = 0; 2677 2678 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2679 2680 nctrl.ncmd.u64 = 0; 2681 nctrl.ncmd.s.cmd = command; 2682 nctrl.ncmd.s.more = vxlan_cmd_bit; 2683 nctrl.ncmd.s.param1 = vxlan_port; 2684 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2685 nctrl.netpndev = (u64)netdev; 2686 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2687 2688 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2689 if (ret) { 2690 dev_err(&oct->pci_dev->dev, 2691 "VxLAN port add/delete failed in core (ret:0x%x)\n", 2692 ret); 2693 if (ret > 0) 2694 ret = -EIO; 2695 } 2696 return ret; 2697 } 2698 2699 /** \brief Net device fix features 2700 * @param netdev pointer to network device 2701 * @param request features requested 2702 * @returns updated features list 2703 */ 2704 static netdev_features_t liquidio_fix_features(struct net_device *netdev, 2705 netdev_features_t request) 2706 { 2707 struct lio *lio = netdev_priv(netdev); 2708 2709 if ((request & NETIF_F_RXCSUM) && 2710 !(lio->dev_capability & NETIF_F_RXCSUM)) 2711 request &= ~NETIF_F_RXCSUM; 2712 2713 if ((request & NETIF_F_HW_CSUM) && 2714 !(lio->dev_capability & NETIF_F_HW_CSUM)) 2715 request &= ~NETIF_F_HW_CSUM; 2716 2717 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO)) 2718 request &= ~NETIF_F_TSO; 2719 2720 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6)) 2721 request &= ~NETIF_F_TSO6; 2722 2723 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO)) 2724 request &= ~NETIF_F_LRO; 2725 2726 /*Disable LRO if RXCSUM is off */ 2727 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) && 2728 (lio->dev_capability & NETIF_F_LRO)) 2729 request &= ~NETIF_F_LRO; 2730 2731 if ((request & NETIF_F_HW_VLAN_CTAG_FILTER) && 2732 !(lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER)) 2733 request &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 2734 2735 return request; 2736 } 2737 2738 /** \brief Net device set features 2739 * @param netdev pointer to network device 2740 * @param features features to enable/disable 2741 */ 2742 static int liquidio_set_features(struct net_device *netdev, 2743 netdev_features_t features) 2744 { 2745 struct lio *lio = netdev_priv(netdev); 2746 2747 if ((features & NETIF_F_LRO) && 2748 (lio->dev_capability & NETIF_F_LRO) && 2749 !(netdev->features & NETIF_F_LRO)) 2750 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 2751 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2752 else if (!(features & NETIF_F_LRO) && 2753 (lio->dev_capability & NETIF_F_LRO) && 2754 (netdev->features & NETIF_F_LRO)) 2755 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE, 2756 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2757 2758 /* Sending command to firmware to enable/disable RX checksum 2759 * offload settings using ethtool 2760 */ 2761 if (!(netdev->features & NETIF_F_RXCSUM) && 2762 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2763 (features & NETIF_F_RXCSUM)) 2764 liquidio_set_rxcsum_command(netdev, 2765 OCTNET_CMD_TNL_RX_CSUM_CTL, 2766 OCTNET_CMD_RXCSUM_ENABLE); 2767 else if ((netdev->features & NETIF_F_RXCSUM) && 2768 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2769 !(features & NETIF_F_RXCSUM)) 2770 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 2771 OCTNET_CMD_RXCSUM_DISABLE); 2772 2773 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2774 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2775 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2776 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2777 OCTNET_CMD_VLAN_FILTER_ENABLE); 2778 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2779 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2780 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2781 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2782 OCTNET_CMD_VLAN_FILTER_DISABLE); 2783 2784 return 0; 2785 } 2786 2787 static void liquidio_add_vxlan_port(struct net_device *netdev, 2788 struct udp_tunnel_info *ti) 2789 { 2790 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2791 return; 2792 2793 liquidio_vxlan_port_command(netdev, 2794 OCTNET_CMD_VXLAN_PORT_CONFIG, 2795 htons(ti->port), 2796 OCTNET_CMD_VXLAN_PORT_ADD); 2797 } 2798 2799 static void liquidio_del_vxlan_port(struct net_device *netdev, 2800 struct udp_tunnel_info *ti) 2801 { 2802 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2803 return; 2804 2805 liquidio_vxlan_port_command(netdev, 2806 OCTNET_CMD_VXLAN_PORT_CONFIG, 2807 htons(ti->port), 2808 OCTNET_CMD_VXLAN_PORT_DEL); 2809 } 2810 2811 static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx, 2812 u8 *mac, bool is_admin_assigned) 2813 { 2814 struct lio *lio = GET_LIO(netdev); 2815 struct octeon_device *oct = lio->oct_dev; 2816 struct octnic_ctrl_pkt nctrl; 2817 int ret = 0; 2818 2819 if (!is_valid_ether_addr(mac)) 2820 return -EINVAL; 2821 2822 if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs) 2823 return -EINVAL; 2824 2825 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2826 2827 nctrl.ncmd.u64 = 0; 2828 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2829 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 2830 nctrl.ncmd.s.param1 = vfidx + 1; 2831 nctrl.ncmd.s.more = 1; 2832 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2833 nctrl.netpndev = (u64)netdev; 2834 if (is_admin_assigned) { 2835 nctrl.ncmd.s.param2 = true; 2836 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2837 } 2838 2839 nctrl.udd[0] = 0; 2840 /* The MAC Address is presented in network byte order. */ 2841 ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac); 2842 2843 oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0]; 2844 2845 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2846 if (ret > 0) 2847 ret = -EIO; 2848 2849 return ret; 2850 } 2851 2852 static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac) 2853 { 2854 struct lio *lio = GET_LIO(netdev); 2855 struct octeon_device *oct = lio->oct_dev; 2856 int retval; 2857 2858 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2859 return -EINVAL; 2860 2861 retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true); 2862 if (!retval) 2863 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac); 2864 2865 return retval; 2866 } 2867 2868 static int liquidio_set_vf_spoofchk(struct net_device *netdev, int vfidx, 2869 bool enable) 2870 { 2871 struct lio *lio = GET_LIO(netdev); 2872 struct octeon_device *oct = lio->oct_dev; 2873 struct octnic_ctrl_pkt nctrl; 2874 int retval; 2875 2876 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SPOOFCHK_CAP)) { 2877 netif_info(lio, drv, lio->netdev, 2878 "firmware does not support spoofchk\n"); 2879 return -EOPNOTSUPP; 2880 } 2881 2882 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 2883 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 2884 return -EINVAL; 2885 } 2886 2887 if (enable) { 2888 if (oct->sriov_info.vf_spoofchk[vfidx]) 2889 return 0; 2890 } else { 2891 /* Clear */ 2892 if (!oct->sriov_info.vf_spoofchk[vfidx]) 2893 return 0; 2894 } 2895 2896 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2897 nctrl.ncmd.s.cmdgroup = OCTNET_CMD_GROUP1; 2898 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_SPOOFCHK; 2899 nctrl.ncmd.s.param1 = 2900 vfidx + 1; /* vfidx is 0 based, 2901 * but vf_num (param1) is 1 based 2902 */ 2903 nctrl.ncmd.s.param2 = enable; 2904 nctrl.ncmd.s.more = 0; 2905 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2906 nctrl.cb_fn = NULL; 2907 2908 retval = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2909 2910 if (retval) { 2911 netif_info(lio, drv, lio->netdev, 2912 "Failed to set VF %d spoofchk %s\n", vfidx, 2913 enable ? "on" : "off"); 2914 return -1; 2915 } 2916 2917 oct->sriov_info.vf_spoofchk[vfidx] = enable; 2918 netif_info(lio, drv, lio->netdev, "VF %u spoofchk is %s\n", vfidx, 2919 enable ? "on" : "off"); 2920 2921 return 0; 2922 } 2923 2924 static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx, 2925 u16 vlan, u8 qos, __be16 vlan_proto) 2926 { 2927 struct lio *lio = GET_LIO(netdev); 2928 struct octeon_device *oct = lio->oct_dev; 2929 struct octnic_ctrl_pkt nctrl; 2930 u16 vlantci; 2931 int ret = 0; 2932 2933 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2934 return -EINVAL; 2935 2936 if (vlan_proto != htons(ETH_P_8021Q)) 2937 return -EPROTONOSUPPORT; 2938 2939 if (vlan >= VLAN_N_VID || qos > 7) 2940 return -EINVAL; 2941 2942 if (vlan) 2943 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT; 2944 else 2945 vlantci = 0; 2946 2947 if (oct->sriov_info.vf_vlantci[vfidx] == vlantci) 2948 return 0; 2949 2950 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2951 2952 if (vlan) 2953 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2954 else 2955 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2956 2957 nctrl.ncmd.s.param1 = vlantci; 2958 nctrl.ncmd.s.param2 = 2959 vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */ 2960 nctrl.ncmd.s.more = 0; 2961 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2962 nctrl.cb_fn = NULL; 2963 2964 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2965 if (ret) { 2966 if (ret > 0) 2967 ret = -EIO; 2968 return ret; 2969 } 2970 2971 oct->sriov_info.vf_vlantci[vfidx] = vlantci; 2972 2973 return ret; 2974 } 2975 2976 static int liquidio_get_vf_config(struct net_device *netdev, int vfidx, 2977 struct ifla_vf_info *ivi) 2978 { 2979 struct lio *lio = GET_LIO(netdev); 2980 struct octeon_device *oct = lio->oct_dev; 2981 u8 *macaddr; 2982 2983 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2984 return -EINVAL; 2985 2986 memset(ivi, 0, sizeof(struct ifla_vf_info)); 2987 2988 ivi->vf = vfidx; 2989 macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx]; 2990 ether_addr_copy(&ivi->mac[0], macaddr); 2991 ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK; 2992 ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT; 2993 if (oct->sriov_info.trusted_vf.active && 2994 oct->sriov_info.trusted_vf.id == vfidx) 2995 ivi->trusted = true; 2996 else 2997 ivi->trusted = false; 2998 ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx]; 2999 ivi->spoofchk = oct->sriov_info.vf_spoofchk[vfidx]; 3000 ivi->max_tx_rate = lio->linfo.link.s.speed; 3001 ivi->min_tx_rate = 0; 3002 3003 return 0; 3004 } 3005 3006 static int liquidio_send_vf_trust_cmd(struct lio *lio, int vfidx, bool trusted) 3007 { 3008 struct octeon_device *oct = lio->oct_dev; 3009 struct octeon_soft_command *sc; 3010 int retval; 3011 3012 sc = octeon_alloc_soft_command(oct, 0, 16, 0); 3013 if (!sc) 3014 return -ENOMEM; 3015 3016 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 3017 3018 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3019 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 3020 OPCODE_NIC_SET_TRUSTED_VF, 0, vfidx + 1, 3021 trusted); 3022 3023 init_completion(&sc->complete); 3024 sc->sc_status = OCTEON_REQUEST_PENDING; 3025 3026 retval = octeon_send_soft_command(oct, sc); 3027 if (retval == IQ_SEND_FAILED) { 3028 octeon_free_soft_command(oct, sc); 3029 retval = -1; 3030 } else { 3031 /* Wait for response or timeout */ 3032 retval = wait_for_sc_completion_timeout(oct, sc, 0); 3033 if (retval) 3034 return (retval); 3035 3036 WRITE_ONCE(sc->caller_is_done, true); 3037 } 3038 3039 return retval; 3040 } 3041 3042 static int liquidio_set_vf_trust(struct net_device *netdev, int vfidx, 3043 bool setting) 3044 { 3045 struct lio *lio = GET_LIO(netdev); 3046 struct octeon_device *oct = lio->oct_dev; 3047 3048 if (strcmp(oct->fw_info.liquidio_firmware_version, "1.7.1") < 0) { 3049 /* trusted vf is not supported by firmware older than 1.7.1 */ 3050 return -EOPNOTSUPP; 3051 } 3052 3053 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 3054 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 3055 return -EINVAL; 3056 } 3057 3058 if (setting) { 3059 /* Set */ 3060 3061 if (oct->sriov_info.trusted_vf.active && 3062 oct->sriov_info.trusted_vf.id == vfidx) 3063 return 0; 3064 3065 if (oct->sriov_info.trusted_vf.active) { 3066 netif_info(lio, drv, lio->netdev, "More than one trusted VF is not allowed\n"); 3067 return -EPERM; 3068 } 3069 } else { 3070 /* Clear */ 3071 3072 if (!oct->sriov_info.trusted_vf.active) 3073 return 0; 3074 } 3075 3076 if (!liquidio_send_vf_trust_cmd(lio, vfidx, setting)) { 3077 if (setting) { 3078 oct->sriov_info.trusted_vf.id = vfidx; 3079 oct->sriov_info.trusted_vf.active = true; 3080 } else { 3081 oct->sriov_info.trusted_vf.active = false; 3082 } 3083 3084 netif_info(lio, drv, lio->netdev, "VF %u is %strusted\n", vfidx, 3085 setting ? "" : "not "); 3086 } else { 3087 netif_info(lio, drv, lio->netdev, "Failed to set VF trusted\n"); 3088 return -1; 3089 } 3090 3091 return 0; 3092 } 3093 3094 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 3095 int linkstate) 3096 { 3097 struct lio *lio = GET_LIO(netdev); 3098 struct octeon_device *oct = lio->oct_dev; 3099 struct octnic_ctrl_pkt nctrl; 3100 int ret = 0; 3101 3102 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3103 return -EINVAL; 3104 3105 if (oct->sriov_info.vf_linkstate[vfidx] == linkstate) 3106 return 0; 3107 3108 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 3109 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE; 3110 nctrl.ncmd.s.param1 = 3111 vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3112 nctrl.ncmd.s.param2 = linkstate; 3113 nctrl.ncmd.s.more = 0; 3114 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 3115 nctrl.cb_fn = NULL; 3116 3117 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 3118 3119 if (!ret) 3120 oct->sriov_info.vf_linkstate[vfidx] = linkstate; 3121 else if (ret > 0) 3122 ret = -EIO; 3123 3124 return ret; 3125 } 3126 3127 static int 3128 liquidio_eswitch_mode_get(struct devlink *devlink, u16 *mode) 3129 { 3130 struct lio_devlink_priv *priv; 3131 struct octeon_device *oct; 3132 3133 priv = devlink_priv(devlink); 3134 oct = priv->oct; 3135 3136 *mode = oct->eswitch_mode; 3137 3138 return 0; 3139 } 3140 3141 static int 3142 liquidio_eswitch_mode_set(struct devlink *devlink, u16 mode, 3143 struct netlink_ext_ack *extack) 3144 { 3145 struct lio_devlink_priv *priv; 3146 struct octeon_device *oct; 3147 int ret = 0; 3148 3149 priv = devlink_priv(devlink); 3150 oct = priv->oct; 3151 3152 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP)) 3153 return -EINVAL; 3154 3155 if (oct->eswitch_mode == mode) 3156 return 0; 3157 3158 switch (mode) { 3159 case DEVLINK_ESWITCH_MODE_SWITCHDEV: 3160 oct->eswitch_mode = mode; 3161 ret = lio_vf_rep_create(oct); 3162 break; 3163 3164 case DEVLINK_ESWITCH_MODE_LEGACY: 3165 lio_vf_rep_destroy(oct); 3166 oct->eswitch_mode = mode; 3167 break; 3168 3169 default: 3170 ret = -EINVAL; 3171 } 3172 3173 return ret; 3174 } 3175 3176 static const struct devlink_ops liquidio_devlink_ops = { 3177 .eswitch_mode_get = liquidio_eswitch_mode_get, 3178 .eswitch_mode_set = liquidio_eswitch_mode_set, 3179 }; 3180 3181 static int 3182 liquidio_get_port_parent_id(struct net_device *dev, 3183 struct netdev_phys_item_id *ppid) 3184 { 3185 struct lio *lio = GET_LIO(dev); 3186 struct octeon_device *oct = lio->oct_dev; 3187 3188 if (oct->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) 3189 return -EOPNOTSUPP; 3190 3191 ppid->id_len = ETH_ALEN; 3192 ether_addr_copy(ppid->id, (void *)&lio->linfo.hw_addr + 2); 3193 3194 return 0; 3195 } 3196 3197 static int liquidio_get_vf_stats(struct net_device *netdev, int vfidx, 3198 struct ifla_vf_stats *vf_stats) 3199 { 3200 struct lio *lio = GET_LIO(netdev); 3201 struct octeon_device *oct = lio->oct_dev; 3202 struct oct_vf_stats stats; 3203 int ret; 3204 3205 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3206 return -EINVAL; 3207 3208 memset(&stats, 0, sizeof(struct oct_vf_stats)); 3209 ret = cn23xx_get_vf_stats(oct, vfidx, &stats); 3210 if (!ret) { 3211 vf_stats->rx_packets = stats.rx_packets; 3212 vf_stats->tx_packets = stats.tx_packets; 3213 vf_stats->rx_bytes = stats.rx_bytes; 3214 vf_stats->tx_bytes = stats.tx_bytes; 3215 vf_stats->broadcast = stats.broadcast; 3216 vf_stats->multicast = stats.multicast; 3217 } 3218 3219 return ret; 3220 } 3221 3222 static const struct net_device_ops lionetdevops = { 3223 .ndo_open = liquidio_open, 3224 .ndo_stop = liquidio_stop, 3225 .ndo_start_xmit = liquidio_xmit, 3226 .ndo_get_stats64 = liquidio_get_stats64, 3227 .ndo_set_mac_address = liquidio_set_mac, 3228 .ndo_set_rx_mode = liquidio_set_mcast_list, 3229 .ndo_tx_timeout = liquidio_tx_timeout, 3230 3231 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid, 3232 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid, 3233 .ndo_change_mtu = liquidio_change_mtu, 3234 .ndo_do_ioctl = liquidio_ioctl, 3235 .ndo_fix_features = liquidio_fix_features, 3236 .ndo_set_features = liquidio_set_features, 3237 .ndo_udp_tunnel_add = liquidio_add_vxlan_port, 3238 .ndo_udp_tunnel_del = liquidio_del_vxlan_port, 3239 .ndo_set_vf_mac = liquidio_set_vf_mac, 3240 .ndo_set_vf_vlan = liquidio_set_vf_vlan, 3241 .ndo_get_vf_config = liquidio_get_vf_config, 3242 .ndo_set_vf_spoofchk = liquidio_set_vf_spoofchk, 3243 .ndo_set_vf_trust = liquidio_set_vf_trust, 3244 .ndo_set_vf_link_state = liquidio_set_vf_link_state, 3245 .ndo_get_vf_stats = liquidio_get_vf_stats, 3246 .ndo_get_port_parent_id = liquidio_get_port_parent_id, 3247 }; 3248 3249 /** \brief Entry point for the liquidio module 3250 */ 3251 static int __init liquidio_init(void) 3252 { 3253 int i; 3254 struct handshake *hs; 3255 3256 init_completion(&first_stage); 3257 3258 octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT); 3259 3260 if (liquidio_init_pci()) 3261 return -EINVAL; 3262 3263 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000)); 3264 3265 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3266 hs = &handshake[i]; 3267 if (hs->pci_dev) { 3268 wait_for_completion(&hs->init); 3269 if (!hs->init_ok) { 3270 /* init handshake failed */ 3271 dev_err(&hs->pci_dev->dev, 3272 "Failed to init device\n"); 3273 liquidio_deinit_pci(); 3274 return -EIO; 3275 } 3276 } 3277 } 3278 3279 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3280 hs = &handshake[i]; 3281 if (hs->pci_dev) { 3282 wait_for_completion_timeout(&hs->started, 3283 msecs_to_jiffies(30000)); 3284 if (!hs->started_ok) { 3285 /* starter handshake failed */ 3286 dev_err(&hs->pci_dev->dev, 3287 "Firmware failed to start\n"); 3288 liquidio_deinit_pci(); 3289 return -EIO; 3290 } 3291 } 3292 } 3293 3294 return 0; 3295 } 3296 3297 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf) 3298 { 3299 struct octeon_device *oct = (struct octeon_device *)buf; 3300 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3301 int gmxport = 0; 3302 union oct_link_status *ls; 3303 int i; 3304 3305 if (recv_pkt->buffer_size[0] != (sizeof(*ls) + OCT_DROQ_INFO_SIZE)) { 3306 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n", 3307 recv_pkt->buffer_size[0], 3308 recv_pkt->rh.r_nic_info.gmxport); 3309 goto nic_info_err; 3310 } 3311 3312 gmxport = recv_pkt->rh.r_nic_info.gmxport; 3313 ls = (union oct_link_status *)(get_rbd(recv_pkt->buffer_ptr[0]) + 3314 OCT_DROQ_INFO_SIZE); 3315 3316 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3); 3317 for (i = 0; i < oct->ifcount; i++) { 3318 if (oct->props[i].gmxport == gmxport) { 3319 update_link_status(oct->props[i].netdev, ls); 3320 break; 3321 } 3322 } 3323 3324 nic_info_err: 3325 for (i = 0; i < recv_pkt->buffer_count; i++) 3326 recv_buffer_free(recv_pkt->buffer_ptr[i]); 3327 octeon_free_recv_info(recv_info); 3328 return 0; 3329 } 3330 3331 /** 3332 * \brief Setup network interfaces 3333 * @param octeon_dev octeon device 3334 * 3335 * Called during init time for each device. It assumes the NIC 3336 * is already up and running. The link information for each 3337 * interface is passed in link_info. 3338 */ 3339 static int setup_nic_devices(struct octeon_device *octeon_dev) 3340 { 3341 struct lio *lio = NULL; 3342 struct net_device *netdev; 3343 u8 mac[6], i, j, *fw_ver, *micro_ver; 3344 unsigned long micro; 3345 u32 cur_ver; 3346 struct octeon_soft_command *sc; 3347 struct liquidio_if_cfg_resp *resp; 3348 struct octdev_props *props; 3349 int retval, num_iqueues, num_oqueues; 3350 int max_num_queues = 0; 3351 union oct_nic_if_cfg if_cfg; 3352 unsigned int base_queue; 3353 unsigned int gmx_port_id; 3354 u32 resp_size, data_size; 3355 u32 ifidx_or_pfnum; 3356 struct lio_version *vdata; 3357 struct devlink *devlink; 3358 struct lio_devlink_priv *lio_devlink; 3359 3360 /* This is to handle link status changes */ 3361 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 3362 OPCODE_NIC_INFO, 3363 lio_nic_info, octeon_dev); 3364 3365 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions. 3366 * They are handled directly. 3367 */ 3368 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET, 3369 free_netbuf); 3370 3371 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG, 3372 free_netsgbuf); 3373 3374 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG, 3375 free_netsgbuf_with_resp); 3376 3377 for (i = 0; i < octeon_dev->ifcount; i++) { 3378 resp_size = sizeof(struct liquidio_if_cfg_resp); 3379 data_size = sizeof(struct lio_version); 3380 sc = (struct octeon_soft_command *) 3381 octeon_alloc_soft_command(octeon_dev, data_size, 3382 resp_size, 0); 3383 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; 3384 vdata = (struct lio_version *)sc->virtdptr; 3385 3386 *((u64 *)vdata) = 0; 3387 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION); 3388 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION); 3389 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION); 3390 3391 if (OCTEON_CN23XX_PF(octeon_dev)) { 3392 num_iqueues = octeon_dev->sriov_info.num_pf_rings; 3393 num_oqueues = octeon_dev->sriov_info.num_pf_rings; 3394 base_queue = octeon_dev->sriov_info.pf_srn; 3395 3396 gmx_port_id = octeon_dev->pf_num; 3397 ifidx_or_pfnum = octeon_dev->pf_num; 3398 } else { 3399 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF( 3400 octeon_get_conf(octeon_dev), i); 3401 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF( 3402 octeon_get_conf(octeon_dev), i); 3403 base_queue = CFG_GET_BASE_QUE_NIC_IF( 3404 octeon_get_conf(octeon_dev), i); 3405 gmx_port_id = CFG_GET_GMXID_NIC_IF( 3406 octeon_get_conf(octeon_dev), i); 3407 ifidx_or_pfnum = i; 3408 } 3409 3410 dev_dbg(&octeon_dev->pci_dev->dev, 3411 "requesting config for interface %d, iqs %d, oqs %d\n", 3412 ifidx_or_pfnum, num_iqueues, num_oqueues); 3413 3414 if_cfg.u64 = 0; 3415 if_cfg.s.num_iqueues = num_iqueues; 3416 if_cfg.s.num_oqueues = num_oqueues; 3417 if_cfg.s.base_queue = base_queue; 3418 if_cfg.s.gmx_port_id = gmx_port_id; 3419 3420 sc->iq_no = 0; 3421 3422 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC, 3423 OPCODE_NIC_IF_CFG, 0, 3424 if_cfg.u64, 0); 3425 3426 init_completion(&sc->complete); 3427 sc->sc_status = OCTEON_REQUEST_PENDING; 3428 3429 retval = octeon_send_soft_command(octeon_dev, sc); 3430 if (retval == IQ_SEND_FAILED) { 3431 dev_err(&octeon_dev->pci_dev->dev, 3432 "iq/oq config failed status: %x\n", 3433 retval); 3434 /* Soft instr is freed by driver in case of failure. */ 3435 octeon_free_soft_command(octeon_dev, sc); 3436 return(-EIO); 3437 } 3438 3439 /* Sleep on a wait queue till the cond flag indicates that the 3440 * response arrived or timed-out. 3441 */ 3442 retval = wait_for_sc_completion_timeout(octeon_dev, sc, 0); 3443 if (retval) 3444 return retval; 3445 3446 retval = resp->status; 3447 if (retval) { 3448 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n"); 3449 WRITE_ONCE(sc->caller_is_done, true); 3450 goto setup_nic_dev_done; 3451 } 3452 snprintf(octeon_dev->fw_info.liquidio_firmware_version, 3453 32, "%s", 3454 resp->cfg_info.liquidio_firmware_version); 3455 3456 /* Verify f/w version (in case of 'auto' loading from flash) */ 3457 fw_ver = octeon_dev->fw_info.liquidio_firmware_version; 3458 if (memcmp(LIQUIDIO_BASE_VERSION, 3459 fw_ver, 3460 strlen(LIQUIDIO_BASE_VERSION))) { 3461 dev_err(&octeon_dev->pci_dev->dev, 3462 "Unmatched firmware version. Expected %s.x, got %s.\n", 3463 LIQUIDIO_BASE_VERSION, fw_ver); 3464 WRITE_ONCE(sc->caller_is_done, true); 3465 goto setup_nic_dev_done; 3466 } else if (atomic_read(octeon_dev->adapter_fw_state) == 3467 FW_IS_PRELOADED) { 3468 dev_info(&octeon_dev->pci_dev->dev, 3469 "Using auto-loaded firmware version %s.\n", 3470 fw_ver); 3471 } 3472 3473 /* extract micro version field; point past '<maj>.<min>.' */ 3474 micro_ver = fw_ver + strlen(LIQUIDIO_BASE_VERSION) + 1; 3475 if (kstrtoul(micro_ver, 10, µ) != 0) 3476 micro = 0; 3477 octeon_dev->fw_info.ver.maj = LIQUIDIO_BASE_MAJOR_VERSION; 3478 octeon_dev->fw_info.ver.min = LIQUIDIO_BASE_MINOR_VERSION; 3479 octeon_dev->fw_info.ver.rev = micro; 3480 3481 octeon_swap_8B_data((u64 *)(&resp->cfg_info), 3482 (sizeof(struct liquidio_if_cfg_info)) >> 3); 3483 3484 num_iqueues = hweight64(resp->cfg_info.iqmask); 3485 num_oqueues = hweight64(resp->cfg_info.oqmask); 3486 3487 if (!(num_iqueues) || !(num_oqueues)) { 3488 dev_err(&octeon_dev->pci_dev->dev, 3489 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n", 3490 resp->cfg_info.iqmask, 3491 resp->cfg_info.oqmask); 3492 WRITE_ONCE(sc->caller_is_done, true); 3493 goto setup_nic_dev_done; 3494 } 3495 3496 if (OCTEON_CN6XXX(octeon_dev)) { 3497 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3498 cn6xxx)); 3499 } else if (OCTEON_CN23XX_PF(octeon_dev)) { 3500 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3501 cn23xx_pf)); 3502 } 3503 3504 dev_dbg(&octeon_dev->pci_dev->dev, 3505 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d max_num_queues: %d\n", 3506 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask, 3507 num_iqueues, num_oqueues, max_num_queues); 3508 netdev = alloc_etherdev_mq(LIO_SIZE, max_num_queues); 3509 3510 if (!netdev) { 3511 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n"); 3512 WRITE_ONCE(sc->caller_is_done, true); 3513 goto setup_nic_dev_done; 3514 } 3515 3516 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev); 3517 3518 /* Associate the routines that will handle different 3519 * netdev tasks. 3520 */ 3521 netdev->netdev_ops = &lionetdevops; 3522 3523 retval = netif_set_real_num_rx_queues(netdev, num_oqueues); 3524 if (retval) { 3525 dev_err(&octeon_dev->pci_dev->dev, 3526 "setting real number rx failed\n"); 3527 WRITE_ONCE(sc->caller_is_done, true); 3528 goto setup_nic_dev_free; 3529 } 3530 3531 retval = netif_set_real_num_tx_queues(netdev, num_iqueues); 3532 if (retval) { 3533 dev_err(&octeon_dev->pci_dev->dev, 3534 "setting real number tx failed\n"); 3535 WRITE_ONCE(sc->caller_is_done, true); 3536 goto setup_nic_dev_free; 3537 } 3538 3539 lio = GET_LIO(netdev); 3540 3541 memset(lio, 0, sizeof(struct lio)); 3542 3543 lio->ifidx = ifidx_or_pfnum; 3544 3545 props = &octeon_dev->props[i]; 3546 props->gmxport = resp->cfg_info.linfo.gmxport; 3547 props->netdev = netdev; 3548 3549 lio->linfo.num_rxpciq = num_oqueues; 3550 lio->linfo.num_txpciq = num_iqueues; 3551 for (j = 0; j < num_oqueues; j++) { 3552 lio->linfo.rxpciq[j].u64 = 3553 resp->cfg_info.linfo.rxpciq[j].u64; 3554 } 3555 for (j = 0; j < num_iqueues; j++) { 3556 lio->linfo.txpciq[j].u64 = 3557 resp->cfg_info.linfo.txpciq[j].u64; 3558 } 3559 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr; 3560 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport; 3561 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64; 3562 3563 WRITE_ONCE(sc->caller_is_done, true); 3564 3565 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3566 3567 if (OCTEON_CN23XX_PF(octeon_dev) || 3568 OCTEON_CN6XXX(octeon_dev)) { 3569 lio->dev_capability = NETIF_F_HIGHDMA 3570 | NETIF_F_IP_CSUM 3571 | NETIF_F_IPV6_CSUM 3572 | NETIF_F_SG | NETIF_F_RXCSUM 3573 | NETIF_F_GRO 3574 | NETIF_F_TSO | NETIF_F_TSO6 3575 | NETIF_F_LRO; 3576 } 3577 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE); 3578 3579 /* Copy of transmit encapsulation capabilities: 3580 * TSO, TSO6, Checksums for this device 3581 */ 3582 lio->enc_dev_capability = NETIF_F_IP_CSUM 3583 | NETIF_F_IPV6_CSUM 3584 | NETIF_F_GSO_UDP_TUNNEL 3585 | NETIF_F_HW_CSUM | NETIF_F_SG 3586 | NETIF_F_RXCSUM 3587 | NETIF_F_TSO | NETIF_F_TSO6 3588 | NETIF_F_LRO; 3589 3590 netdev->hw_enc_features = (lio->enc_dev_capability & 3591 ~NETIF_F_LRO); 3592 3593 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL; 3594 3595 netdev->vlan_features = lio->dev_capability; 3596 /* Add any unchangeable hw features */ 3597 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER | 3598 NETIF_F_HW_VLAN_CTAG_RX | 3599 NETIF_F_HW_VLAN_CTAG_TX; 3600 3601 netdev->features = (lio->dev_capability & ~NETIF_F_LRO); 3602 3603 netdev->hw_features = lio->dev_capability; 3604 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/ 3605 netdev->hw_features = netdev->hw_features & 3606 ~NETIF_F_HW_VLAN_CTAG_RX; 3607 3608 /* MTU range: 68 - 16000 */ 3609 netdev->min_mtu = LIO_MIN_MTU_SIZE; 3610 netdev->max_mtu = LIO_MAX_MTU_SIZE; 3611 3612 /* Point to the properties for octeon device to which this 3613 * interface belongs. 3614 */ 3615 lio->oct_dev = octeon_dev; 3616 lio->octprops = props; 3617 lio->netdev = netdev; 3618 3619 dev_dbg(&octeon_dev->pci_dev->dev, 3620 "if%d gmx: %d hw_addr: 0x%llx\n", i, 3621 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr)); 3622 3623 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) { 3624 u8 vfmac[ETH_ALEN]; 3625 3626 eth_random_addr(vfmac); 3627 if (__liquidio_set_vf_mac(netdev, j, vfmac, false)) { 3628 dev_err(&octeon_dev->pci_dev->dev, 3629 "Error setting VF%d MAC address\n", 3630 j); 3631 goto setup_nic_dev_free; 3632 } 3633 } 3634 3635 /* 64-bit swap required on LE machines */ 3636 octeon_swap_8B_data(&lio->linfo.hw_addr, 1); 3637 for (j = 0; j < 6; j++) 3638 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j)); 3639 3640 /* Copy MAC Address to OS network device structure */ 3641 3642 ether_addr_copy(netdev->dev_addr, mac); 3643 3644 /* By default all interfaces on a single Octeon uses the same 3645 * tx and rx queues 3646 */ 3647 lio->txq = lio->linfo.txpciq[0].s.q_no; 3648 lio->rxq = lio->linfo.rxpciq[0].s.q_no; 3649 if (liquidio_setup_io_queues(octeon_dev, i, 3650 lio->linfo.num_txpciq, 3651 lio->linfo.num_rxpciq)) { 3652 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n"); 3653 goto setup_nic_dev_free; 3654 } 3655 3656 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS); 3657 3658 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq); 3659 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq); 3660 3661 if (lio_setup_glists(octeon_dev, lio, num_iqueues)) { 3662 dev_err(&octeon_dev->pci_dev->dev, 3663 "Gather list allocation failed\n"); 3664 goto setup_nic_dev_free; 3665 } 3666 3667 /* Register ethtool support */ 3668 liquidio_set_ethtool_ops(netdev); 3669 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID) 3670 octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT; 3671 else 3672 octeon_dev->priv_flags = 0x0; 3673 3674 if (netdev->features & NETIF_F_LRO) 3675 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 3676 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 3677 3678 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 3679 OCTNET_CMD_VLAN_FILTER_ENABLE); 3680 3681 if ((debug != -1) && (debug & NETIF_MSG_HW)) 3682 liquidio_set_feature(netdev, 3683 OCTNET_CMD_VERBOSE_ENABLE, 0); 3684 3685 if (setup_link_status_change_wq(netdev)) 3686 goto setup_nic_dev_free; 3687 3688 if ((octeon_dev->fw_info.app_cap_flags & 3689 LIQUIDIO_TIME_SYNC_CAP) && 3690 setup_sync_octeon_time_wq(netdev)) 3691 goto setup_nic_dev_free; 3692 3693 if (setup_rx_oom_poll_fn(netdev)) 3694 goto setup_nic_dev_free; 3695 3696 /* Register the network device with the OS */ 3697 if (register_netdev(netdev)) { 3698 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n"); 3699 goto setup_nic_dev_free; 3700 } 3701 3702 dev_dbg(&octeon_dev->pci_dev->dev, 3703 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n", 3704 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); 3705 netif_carrier_off(netdev); 3706 lio->link_changes++; 3707 3708 ifstate_set(lio, LIO_IFSTATE_REGISTERED); 3709 3710 /* Sending command to firmware to enable Rx checksum offload 3711 * by default at the time of setup of Liquidio driver for 3712 * this device 3713 */ 3714 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 3715 OCTNET_CMD_RXCSUM_ENABLE); 3716 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL, 3717 OCTNET_CMD_TXCSUM_ENABLE); 3718 3719 dev_dbg(&octeon_dev->pci_dev->dev, 3720 "NIC ifidx:%d Setup successful\n", i); 3721 3722 if (octeon_dev->subsystem_id == 3723 OCTEON_CN2350_25GB_SUBSYS_ID || 3724 octeon_dev->subsystem_id == 3725 OCTEON_CN2360_25GB_SUBSYS_ID) { 3726 cur_ver = OCT_FW_VER(octeon_dev->fw_info.ver.maj, 3727 octeon_dev->fw_info.ver.min, 3728 octeon_dev->fw_info.ver.rev); 3729 3730 /* speed control unsupported in f/w older than 1.7.2 */ 3731 if (cur_ver < OCT_FW_VER(1, 7, 2)) { 3732 dev_info(&octeon_dev->pci_dev->dev, 3733 "speed setting not supported by f/w."); 3734 octeon_dev->speed_setting = 25; 3735 octeon_dev->no_speed_setting = 1; 3736 } else { 3737 liquidio_get_speed(lio); 3738 } 3739 3740 if (octeon_dev->speed_setting == 0) { 3741 octeon_dev->speed_setting = 25; 3742 octeon_dev->no_speed_setting = 1; 3743 } 3744 } else { 3745 octeon_dev->no_speed_setting = 1; 3746 octeon_dev->speed_setting = 10; 3747 } 3748 octeon_dev->speed_boot = octeon_dev->speed_setting; 3749 3750 /* don't read FEC setting if unsupported by f/w (see above) */ 3751 if (octeon_dev->speed_boot == 25 && 3752 !octeon_dev->no_speed_setting) { 3753 liquidio_get_fec(lio); 3754 octeon_dev->props[lio->ifidx].fec_boot = 3755 octeon_dev->props[lio->ifidx].fec; 3756 } 3757 } 3758 3759 devlink = devlink_alloc(&liquidio_devlink_ops, 3760 sizeof(struct lio_devlink_priv)); 3761 if (!devlink) { 3762 dev_err(&octeon_dev->pci_dev->dev, "devlink alloc failed\n"); 3763 goto setup_nic_dev_free; 3764 } 3765 3766 lio_devlink = devlink_priv(devlink); 3767 lio_devlink->oct = octeon_dev; 3768 3769 if (devlink_register(devlink, &octeon_dev->pci_dev->dev)) { 3770 devlink_free(devlink); 3771 dev_err(&octeon_dev->pci_dev->dev, 3772 "devlink registration failed\n"); 3773 goto setup_nic_dev_free; 3774 } 3775 3776 octeon_dev->devlink = devlink; 3777 octeon_dev->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY; 3778 3779 return 0; 3780 3781 setup_nic_dev_free: 3782 3783 while (i--) { 3784 dev_err(&octeon_dev->pci_dev->dev, 3785 "NIC ifidx:%d Setup failed\n", i); 3786 liquidio_destroy_nic_device(octeon_dev, i); 3787 } 3788 3789 setup_nic_dev_done: 3790 3791 return -ENODEV; 3792 } 3793 3794 #ifdef CONFIG_PCI_IOV 3795 static int octeon_enable_sriov(struct octeon_device *oct) 3796 { 3797 unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced; 3798 struct pci_dev *vfdev; 3799 int err; 3800 u32 u; 3801 3802 if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) { 3803 err = pci_enable_sriov(oct->pci_dev, 3804 oct->sriov_info.num_vfs_alloced); 3805 if (err) { 3806 dev_err(&oct->pci_dev->dev, 3807 "OCTEON: Failed to enable PCI sriov: %d\n", 3808 err); 3809 oct->sriov_info.num_vfs_alloced = 0; 3810 return err; 3811 } 3812 oct->sriov_info.sriov_enabled = 1; 3813 3814 /* init lookup table that maps DPI ring number to VF pci_dev 3815 * struct pointer 3816 */ 3817 u = 0; 3818 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3819 OCTEON_CN23XX_VF_VID, NULL); 3820 while (vfdev) { 3821 if (vfdev->is_virtfn && 3822 (vfdev->physfn == oct->pci_dev)) { 3823 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = 3824 vfdev; 3825 u += oct->sriov_info.rings_per_vf; 3826 } 3827 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3828 OCTEON_CN23XX_VF_VID, vfdev); 3829 } 3830 } 3831 3832 return num_vfs_alloced; 3833 } 3834 3835 static int lio_pci_sriov_disable(struct octeon_device *oct) 3836 { 3837 int u; 3838 3839 if (pci_vfs_assigned(oct->pci_dev)) { 3840 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n"); 3841 return -EPERM; 3842 } 3843 3844 pci_disable_sriov(oct->pci_dev); 3845 3846 u = 0; 3847 while (u < MAX_POSSIBLE_VFS) { 3848 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL; 3849 u += oct->sriov_info.rings_per_vf; 3850 } 3851 3852 oct->sriov_info.num_vfs_alloced = 0; 3853 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n", 3854 oct->pf_num); 3855 3856 return 0; 3857 } 3858 3859 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs) 3860 { 3861 struct octeon_device *oct = pci_get_drvdata(dev); 3862 int ret = 0; 3863 3864 if ((num_vfs == oct->sriov_info.num_vfs_alloced) && 3865 (oct->sriov_info.sriov_enabled)) { 3866 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n", 3867 oct->pf_num, num_vfs); 3868 return 0; 3869 } 3870 3871 if (!num_vfs) { 3872 lio_vf_rep_destroy(oct); 3873 ret = lio_pci_sriov_disable(oct); 3874 } else if (num_vfs > oct->sriov_info.max_vfs) { 3875 dev_err(&oct->pci_dev->dev, 3876 "OCTEON: Max allowed VFs:%d user requested:%d", 3877 oct->sriov_info.max_vfs, num_vfs); 3878 ret = -EPERM; 3879 } else { 3880 oct->sriov_info.num_vfs_alloced = num_vfs; 3881 ret = octeon_enable_sriov(oct); 3882 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n", 3883 oct->pf_num, num_vfs); 3884 ret = lio_vf_rep_create(oct); 3885 if (ret) 3886 dev_info(&oct->pci_dev->dev, 3887 "vf representor create failed"); 3888 } 3889 3890 return ret; 3891 } 3892 #endif 3893 3894 /** 3895 * \brief initialize the NIC 3896 * @param oct octeon device 3897 * 3898 * This initialization routine is called once the Octeon device application is 3899 * up and running 3900 */ 3901 static int liquidio_init_nic_module(struct octeon_device *oct) 3902 { 3903 int i, retval = 0; 3904 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct)); 3905 3906 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n"); 3907 3908 /* only default iq and oq were initialized 3909 * initialize the rest as well 3910 */ 3911 /* run port_config command for each port */ 3912 oct->ifcount = num_nic_ports; 3913 3914 memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports); 3915 3916 for (i = 0; i < MAX_OCTEON_LINKS; i++) 3917 oct->props[i].gmxport = -1; 3918 3919 retval = setup_nic_devices(oct); 3920 if (retval) { 3921 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n"); 3922 goto octnet_init_failure; 3923 } 3924 3925 /* Call vf_rep_modinit if the firmware is switchdev capable 3926 * and do it from the first liquidio function probed. 3927 */ 3928 if (!oct->octeon_id && 3929 oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) { 3930 retval = lio_vf_rep_modinit(); 3931 if (retval) { 3932 liquidio_stop_nic_module(oct); 3933 goto octnet_init_failure; 3934 } 3935 } 3936 3937 liquidio_ptp_init(oct); 3938 3939 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n"); 3940 3941 return retval; 3942 3943 octnet_init_failure: 3944 3945 oct->ifcount = 0; 3946 3947 return retval; 3948 } 3949 3950 /** 3951 * \brief starter callback that invokes the remaining initialization work after 3952 * the NIC is up and running. 3953 * @param octptr work struct work_struct 3954 */ 3955 static void nic_starter(struct work_struct *work) 3956 { 3957 struct octeon_device *oct; 3958 struct cavium_wk *wk = (struct cavium_wk *)work; 3959 3960 oct = (struct octeon_device *)wk->ctxptr; 3961 3962 if (atomic_read(&oct->status) == OCT_DEV_RUNNING) 3963 return; 3964 3965 /* If the status of the device is CORE_OK, the core 3966 * application has reported its application type. Call 3967 * any registered handlers now and move to the RUNNING 3968 * state. 3969 */ 3970 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) { 3971 schedule_delayed_work(&oct->nic_poll_work.work, 3972 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 3973 return; 3974 } 3975 3976 atomic_set(&oct->status, OCT_DEV_RUNNING); 3977 3978 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) { 3979 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n"); 3980 3981 if (liquidio_init_nic_module(oct)) 3982 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n"); 3983 else 3984 handshake[oct->octeon_id].started_ok = 1; 3985 } else { 3986 dev_err(&oct->pci_dev->dev, 3987 "Unexpected application running on NIC (%d). Check firmware.\n", 3988 oct->app_mode); 3989 } 3990 3991 complete(&handshake[oct->octeon_id].started); 3992 } 3993 3994 static int 3995 octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf) 3996 { 3997 struct octeon_device *oct = (struct octeon_device *)buf; 3998 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3999 int i, notice, vf_idx; 4000 bool cores_crashed; 4001 u64 *data, vf_num; 4002 4003 notice = recv_pkt->rh.r.ossp; 4004 data = (u64 *)(get_rbd(recv_pkt->buffer_ptr[0]) + OCT_DROQ_INFO_SIZE); 4005 4006 /* the first 64-bit word of data is the vf_num */ 4007 vf_num = data[0]; 4008 octeon_swap_8B_data(&vf_num, 1); 4009 vf_idx = (int)vf_num - 1; 4010 4011 cores_crashed = READ_ONCE(oct->cores_crashed); 4012 4013 if (notice == VF_DRV_LOADED) { 4014 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) { 4015 oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx); 4016 dev_info(&oct->pci_dev->dev, 4017 "driver for VF%d was loaded\n", vf_idx); 4018 if (!cores_crashed) 4019 try_module_get(THIS_MODULE); 4020 } 4021 } else if (notice == VF_DRV_REMOVED) { 4022 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) { 4023 oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx); 4024 dev_info(&oct->pci_dev->dev, 4025 "driver for VF%d was removed\n", vf_idx); 4026 if (!cores_crashed) 4027 module_put(THIS_MODULE); 4028 } 4029 } else if (notice == VF_DRV_MACADDR_CHANGED) { 4030 u8 *b = (u8 *)&data[1]; 4031 4032 oct->sriov_info.vf_macaddr[vf_idx] = data[1]; 4033 dev_info(&oct->pci_dev->dev, 4034 "VF driver changed VF%d's MAC address to %pM\n", 4035 vf_idx, b + 2); 4036 } 4037 4038 for (i = 0; i < recv_pkt->buffer_count; i++) 4039 recv_buffer_free(recv_pkt->buffer_ptr[i]); 4040 octeon_free_recv_info(recv_info); 4041 4042 return 0; 4043 } 4044 4045 /** 4046 * \brief Device initialization for each Octeon device that is probed 4047 * @param octeon_dev octeon device 4048 */ 4049 static int octeon_device_init(struct octeon_device *octeon_dev) 4050 { 4051 int j, ret; 4052 char bootcmd[] = "\n"; 4053 char *dbg_enb = NULL; 4054 enum lio_fw_state fw_state; 4055 struct octeon_device_priv *oct_priv = 4056 (struct octeon_device_priv *)octeon_dev->priv; 4057 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE); 4058 4059 /* Enable access to the octeon device and make its DMA capability 4060 * known to the OS. 4061 */ 4062 if (octeon_pci_os_setup(octeon_dev)) 4063 return 1; 4064 4065 atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE); 4066 4067 /* Identify the Octeon type and map the BAR address space. */ 4068 if (octeon_chip_specific_setup(octeon_dev)) { 4069 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n"); 4070 return 1; 4071 } 4072 4073 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE); 4074 4075 /* Only add a reference after setting status 'OCT_DEV_PCI_MAP_DONE', 4076 * since that is what is required for the reference to be removed 4077 * during de-initialization (see 'octeon_destroy_resources'). 4078 */ 4079 octeon_register_device(octeon_dev, octeon_dev->pci_dev->bus->number, 4080 PCI_SLOT(octeon_dev->pci_dev->devfn), 4081 PCI_FUNC(octeon_dev->pci_dev->devfn), 4082 true); 4083 4084 octeon_dev->app_mode = CVM_DRV_INVALID_APP; 4085 4086 /* CN23XX supports preloaded firmware if the following is true: 4087 * 4088 * The adapter indicates that firmware is currently running AND 4089 * 'fw_type' is 'auto'. 4090 * 4091 * (default state is NEEDS_TO_BE_LOADED, override it if appropriate). 4092 */ 4093 if (OCTEON_CN23XX_PF(octeon_dev) && 4094 cn23xx_fw_loaded(octeon_dev) && fw_type_is_auto()) { 4095 atomic_cmpxchg(octeon_dev->adapter_fw_state, 4096 FW_NEEDS_TO_BE_LOADED, FW_IS_PRELOADED); 4097 } 4098 4099 /* If loading firmware, only first device of adapter needs to do so. */ 4100 fw_state = atomic_cmpxchg(octeon_dev->adapter_fw_state, 4101 FW_NEEDS_TO_BE_LOADED, 4102 FW_IS_BEING_LOADED); 4103 4104 /* Here, [local variable] 'fw_state' is set to one of: 4105 * 4106 * FW_IS_PRELOADED: No firmware is to be loaded (see above) 4107 * FW_NEEDS_TO_BE_LOADED: The driver's first instance will load 4108 * firmware to the adapter. 4109 * FW_IS_BEING_LOADED: The driver's second instance will not load 4110 * firmware to the adapter. 4111 */ 4112 4113 /* Prior to f/w load, perform a soft reset of the Octeon device; 4114 * if error resetting, return w/error. 4115 */ 4116 if (fw_state == FW_NEEDS_TO_BE_LOADED) 4117 if (octeon_dev->fn_list.soft_reset(octeon_dev)) 4118 return 1; 4119 4120 /* Initialize the dispatch mechanism used to push packets arriving on 4121 * Octeon Output queues. 4122 */ 4123 if (octeon_init_dispatch_list(octeon_dev)) 4124 return 1; 4125 4126 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4127 OPCODE_NIC_CORE_DRV_ACTIVE, 4128 octeon_core_drv_init, 4129 octeon_dev); 4130 4131 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4132 OPCODE_NIC_VF_DRV_NOTICE, 4133 octeon_recv_vf_drv_notice, octeon_dev); 4134 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter); 4135 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev; 4136 schedule_delayed_work(&octeon_dev->nic_poll_work.work, 4137 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 4138 4139 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE); 4140 4141 if (octeon_set_io_queues_off(octeon_dev)) { 4142 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n"); 4143 return 1; 4144 } 4145 4146 if (OCTEON_CN23XX_PF(octeon_dev)) { 4147 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4148 if (ret) { 4149 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n"); 4150 return ret; 4151 } 4152 } 4153 4154 /* Initialize soft command buffer pool 4155 */ 4156 if (octeon_setup_sc_buffer_pool(octeon_dev)) { 4157 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n"); 4158 return 1; 4159 } 4160 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE); 4161 4162 /* Setup the data structures that manage this Octeon's Input queues. */ 4163 if (octeon_setup_instr_queues(octeon_dev)) { 4164 dev_err(&octeon_dev->pci_dev->dev, 4165 "instruction queue initialization failed\n"); 4166 return 1; 4167 } 4168 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE); 4169 4170 /* Initialize lists to manage the requests of different types that 4171 * arrive from user & kernel applications for this octeon device. 4172 */ 4173 if (octeon_setup_response_list(octeon_dev)) { 4174 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n"); 4175 return 1; 4176 } 4177 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE); 4178 4179 if (octeon_setup_output_queues(octeon_dev)) { 4180 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n"); 4181 return 1; 4182 } 4183 4184 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE); 4185 4186 if (OCTEON_CN23XX_PF(octeon_dev)) { 4187 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) { 4188 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n"); 4189 return 1; 4190 } 4191 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE); 4192 4193 if (octeon_allocate_ioq_vector 4194 (octeon_dev, 4195 octeon_dev->sriov_info.num_pf_rings)) { 4196 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n"); 4197 return 1; 4198 } 4199 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE); 4200 4201 } else { 4202 /* The input and output queue registers were setup earlier (the 4203 * queues were not enabled). Any additional registers 4204 * that need to be programmed should be done now. 4205 */ 4206 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4207 if (ret) { 4208 dev_err(&octeon_dev->pci_dev->dev, 4209 "Failed to configure device registers\n"); 4210 return ret; 4211 } 4212 } 4213 4214 /* Initialize the tasklet that handles output queue packet processing.*/ 4215 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n"); 4216 tasklet_init(&oct_priv->droq_tasklet, octeon_droq_bh, 4217 (unsigned long)octeon_dev); 4218 4219 /* Setup the interrupt handler and record the INT SUM register address 4220 */ 4221 if (octeon_setup_interrupt(octeon_dev, 4222 octeon_dev->sriov_info.num_pf_rings)) 4223 return 1; 4224 4225 /* Enable Octeon device interrupts */ 4226 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR); 4227 4228 atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE); 4229 4230 /* Send Credit for Octeon Output queues. Credits are always sent BEFORE 4231 * the output queue is enabled. 4232 * This ensures that we'll receive the f/w CORE DRV_ACTIVE message in 4233 * case we've configured CN23XX_SLI_GBL_CONTROL[NOPTR_D] = 0. 4234 * Otherwise, it is possible that the DRV_ACTIVE message will be sent 4235 * before any credits have been issued, causing the ring to be reset 4236 * (and the f/w appear to never have started). 4237 */ 4238 for (j = 0; j < octeon_dev->num_oqs; j++) 4239 writel(octeon_dev->droq[j]->max_count, 4240 octeon_dev->droq[j]->pkts_credit_reg); 4241 4242 /* Enable the input and output queues for this Octeon device */ 4243 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev); 4244 if (ret) { 4245 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues"); 4246 return ret; 4247 } 4248 4249 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE); 4250 4251 if (fw_state == FW_NEEDS_TO_BE_LOADED) { 4252 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n"); 4253 if (!ddr_timeout) { 4254 dev_info(&octeon_dev->pci_dev->dev, 4255 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n"); 4256 } 4257 4258 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS); 4259 4260 /* Wait for the octeon to initialize DDR after the soft-reset.*/ 4261 while (!ddr_timeout) { 4262 set_current_state(TASK_INTERRUPTIBLE); 4263 if (schedule_timeout(HZ / 10)) { 4264 /* user probably pressed Control-C */ 4265 return 1; 4266 } 4267 } 4268 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout); 4269 if (ret) { 4270 dev_err(&octeon_dev->pci_dev->dev, 4271 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n", 4272 ret); 4273 return 1; 4274 } 4275 4276 if (octeon_wait_for_bootloader(octeon_dev, 1000)) { 4277 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n"); 4278 return 1; 4279 } 4280 4281 /* Divert uboot to take commands from host instead. */ 4282 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50); 4283 4284 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n"); 4285 ret = octeon_init_consoles(octeon_dev); 4286 if (ret) { 4287 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n"); 4288 return 1; 4289 } 4290 /* If console debug enabled, specify empty string to use default 4291 * enablement ELSE specify NULL string for 'disabled'. 4292 */ 4293 dbg_enb = octeon_console_debug_enabled(0) ? "" : NULL; 4294 ret = octeon_add_console(octeon_dev, 0, dbg_enb); 4295 if (ret) { 4296 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n"); 4297 return 1; 4298 } else if (octeon_console_debug_enabled(0)) { 4299 /* If console was added AND we're logging console output 4300 * then set our console print function. 4301 */ 4302 octeon_dev->console[0].print = octeon_dbg_console_print; 4303 } 4304 4305 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE); 4306 4307 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n"); 4308 ret = load_firmware(octeon_dev); 4309 if (ret) { 4310 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n"); 4311 return 1; 4312 } 4313 4314 atomic_set(octeon_dev->adapter_fw_state, FW_HAS_BEEN_LOADED); 4315 } 4316 4317 handshake[octeon_dev->octeon_id].init_ok = 1; 4318 complete(&handshake[octeon_dev->octeon_id].init); 4319 4320 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK); 4321 4322 return 0; 4323 } 4324 4325 /** 4326 * \brief Debug console print function 4327 * @param octeon_dev octeon device 4328 * @param console_num console number 4329 * @param prefix first portion of line to display 4330 * @param suffix second portion of line to display 4331 * 4332 * The OCTEON debug console outputs entire lines (excluding '\n'). 4333 * Normally, the line will be passed in the 'prefix' parameter. 4334 * However, due to buffering, it is possible for a line to be split into two 4335 * parts, in which case they will be passed as the 'prefix' parameter and 4336 * 'suffix' parameter. 4337 */ 4338 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 4339 char *prefix, char *suffix) 4340 { 4341 if (prefix && suffix) 4342 dev_info(&oct->pci_dev->dev, "%u: %s%s\n", console_num, prefix, 4343 suffix); 4344 else if (prefix) 4345 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, prefix); 4346 else if (suffix) 4347 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, suffix); 4348 4349 return 0; 4350 } 4351 4352 /** 4353 * \brief Exits the module 4354 */ 4355 static void __exit liquidio_exit(void) 4356 { 4357 liquidio_deinit_pci(); 4358 4359 pr_info("LiquidIO network module is now unloaded\n"); 4360 } 4361 4362 module_init(liquidio_init); 4363 module_exit(liquidio_exit); 4364