1 /********************************************************************** 2 * Author: Cavium, Inc. 3 * 4 * Contact: support@cavium.com 5 * Please include "LiquidIO" in the subject. 6 * 7 * Copyright (c) 2003-2016 Cavium, Inc. 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more details. 17 ***********************************************************************/ 18 #include <linux/module.h> 19 #include <linux/interrupt.h> 20 #include <linux/pci.h> 21 #include <linux/firmware.h> 22 #include <net/vxlan.h> 23 #include <linux/kthread.h> 24 #include "liquidio_common.h" 25 #include "octeon_droq.h" 26 #include "octeon_iq.h" 27 #include "response_manager.h" 28 #include "octeon_device.h" 29 #include "octeon_nic.h" 30 #include "octeon_main.h" 31 #include "octeon_network.h" 32 #include "cn66xx_regs.h" 33 #include "cn66xx_device.h" 34 #include "cn68xx_device.h" 35 #include "cn23xx_pf_device.h" 36 #include "liquidio_image.h" 37 #include "lio_vf_rep.h" 38 39 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>"); 40 MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Driver"); 41 MODULE_LICENSE("GPL"); 42 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210SV_NAME 43 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 44 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_210NV_NAME 45 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 46 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_410NV_NAME 47 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 48 MODULE_FIRMWARE(LIO_FW_DIR LIO_FW_BASE_NAME LIO_23XX_NAME 49 "_" LIO_FW_NAME_TYPE_NIC LIO_FW_NAME_SUFFIX); 50 51 static int ddr_timeout = 10000; 52 module_param(ddr_timeout, int, 0644); 53 MODULE_PARM_DESC(ddr_timeout, 54 "Number of milliseconds to wait for DDR initialization. 0 waits for ddr_timeout to be set to non-zero value before starting to check"); 55 56 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 57 58 static int debug = -1; 59 module_param(debug, int, 0644); 60 MODULE_PARM_DESC(debug, "NETIF_MSG debug bits"); 61 62 static char fw_type[LIO_MAX_FW_TYPE_LEN] = LIO_FW_NAME_TYPE_AUTO; 63 module_param_string(fw_type, fw_type, sizeof(fw_type), 0444); 64 MODULE_PARM_DESC(fw_type, "Type of firmware to be loaded (default is \"auto\"), which uses firmware in flash, if present, else loads \"nic\"."); 65 66 static u32 console_bitmask; 67 module_param(console_bitmask, int, 0644); 68 MODULE_PARM_DESC(console_bitmask, 69 "Bitmask indicating which consoles have debug output redirected to syslog."); 70 71 /** 72 * \brief determines if a given console has debug enabled. 73 * @param console console to check 74 * @returns 1 = enabled. 0 otherwise 75 */ 76 static int octeon_console_debug_enabled(u32 console) 77 { 78 return (console_bitmask >> (console)) & 0x1; 79 } 80 81 /* Polling interval for determining when NIC application is alive */ 82 #define LIQUIDIO_STARTER_POLL_INTERVAL_MS 100 83 84 /* runtime link query interval */ 85 #define LIQUIDIO_LINK_QUERY_INTERVAL_MS 1000 86 /* update localtime to octeon firmware every 60 seconds. 87 * make firmware to use same time reference, so that it will be easy to 88 * correlate firmware logged events/errors with host events, for debugging. 89 */ 90 #define LIO_SYNC_OCTEON_TIME_INTERVAL_MS 60000 91 92 /* time to wait for possible in-flight requests in milliseconds */ 93 #define WAIT_INFLIGHT_REQUEST msecs_to_jiffies(1000) 94 95 struct lio_trusted_vf_ctx { 96 struct completion complete; 97 int status; 98 }; 99 100 struct oct_link_status_resp { 101 u64 rh; 102 struct oct_link_info link_info; 103 u64 status; 104 }; 105 106 struct oct_timestamp_resp { 107 u64 rh; 108 u64 timestamp; 109 u64 status; 110 }; 111 112 #define OCT_TIMESTAMP_RESP_SIZE (sizeof(struct oct_timestamp_resp)) 113 114 union tx_info { 115 u64 u64; 116 struct { 117 #ifdef __BIG_ENDIAN_BITFIELD 118 u16 gso_size; 119 u16 gso_segs; 120 u32 reserved; 121 #else 122 u32 reserved; 123 u16 gso_segs; 124 u16 gso_size; 125 #endif 126 } s; 127 }; 128 129 /** Octeon device properties to be used by the NIC module. 130 * Each octeon device in the system will be represented 131 * by this structure in the NIC module. 132 */ 133 134 #define OCTNIC_GSO_MAX_HEADER_SIZE 128 135 #define OCTNIC_GSO_MAX_SIZE \ 136 (CN23XX_DEFAULT_INPUT_JABBER - OCTNIC_GSO_MAX_HEADER_SIZE) 137 138 struct handshake { 139 struct completion init; 140 struct completion started; 141 struct pci_dev *pci_dev; 142 int init_ok; 143 int started_ok; 144 }; 145 146 #ifdef CONFIG_PCI_IOV 147 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs); 148 #endif 149 150 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 151 char *prefix, char *suffix); 152 153 static int octeon_device_init(struct octeon_device *); 154 static int liquidio_stop(struct net_device *netdev); 155 static void liquidio_remove(struct pci_dev *pdev); 156 static int liquidio_probe(struct pci_dev *pdev, 157 const struct pci_device_id *ent); 158 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 159 int linkstate); 160 161 static struct handshake handshake[MAX_OCTEON_DEVICES]; 162 static struct completion first_stage; 163 164 static void octeon_droq_bh(unsigned long pdev) 165 { 166 int q_no; 167 int reschedule = 0; 168 struct octeon_device *oct = (struct octeon_device *)pdev; 169 struct octeon_device_priv *oct_priv = 170 (struct octeon_device_priv *)oct->priv; 171 172 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { 173 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) 174 continue; 175 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], 176 MAX_PACKET_BUDGET); 177 lio_enable_irq(oct->droq[q_no], NULL); 178 179 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) { 180 /* set time and cnt interrupt thresholds for this DROQ 181 * for NAPI 182 */ 183 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; 184 185 octeon_write_csr64( 186 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no), 187 0x5700000040ULL); 188 octeon_write_csr64( 189 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0); 190 } 191 } 192 193 if (reschedule) 194 tasklet_schedule(&oct_priv->droq_tasklet); 195 } 196 197 static int lio_wait_for_oq_pkts(struct octeon_device *oct) 198 { 199 struct octeon_device_priv *oct_priv = 200 (struct octeon_device_priv *)oct->priv; 201 int retry = 100, pkt_cnt = 0, pending_pkts = 0; 202 int i; 203 204 do { 205 pending_pkts = 0; 206 207 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 208 if (!(oct->io_qmask.oq & BIT_ULL(i))) 209 continue; 210 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); 211 } 212 if (pkt_cnt > 0) { 213 pending_pkts += pkt_cnt; 214 tasklet_schedule(&oct_priv->droq_tasklet); 215 } 216 pkt_cnt = 0; 217 schedule_timeout_uninterruptible(1); 218 219 } while (retry-- && pending_pkts); 220 221 return pkt_cnt; 222 } 223 224 /** 225 * \brief Forces all IO queues off on a given device 226 * @param oct Pointer to Octeon device 227 */ 228 static void force_io_queues_off(struct octeon_device *oct) 229 { 230 if ((oct->chip_id == OCTEON_CN66XX) || 231 (oct->chip_id == OCTEON_CN68XX)) { 232 /* Reset the Enable bits for Input Queues. */ 233 octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0); 234 235 /* Reset the Enable bits for Output Queues. */ 236 octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0); 237 } 238 } 239 240 /** 241 * \brief Cause device to go quiet so it can be safely removed/reset/etc 242 * @param oct Pointer to Octeon device 243 */ 244 static inline void pcierror_quiesce_device(struct octeon_device *oct) 245 { 246 int i; 247 248 /* Disable the input and output queues now. No more packets will 249 * arrive from Octeon, but we should wait for all packet processing 250 * to finish. 251 */ 252 force_io_queues_off(oct); 253 254 /* To allow for in-flight requests */ 255 schedule_timeout_uninterruptible(WAIT_INFLIGHT_REQUEST); 256 257 if (wait_for_pending_requests(oct)) 258 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 259 260 /* Force all requests waiting to be fetched by OCTEON to complete. */ 261 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 262 struct octeon_instr_queue *iq; 263 264 if (!(oct->io_qmask.iq & BIT_ULL(i))) 265 continue; 266 iq = oct->instr_queue[i]; 267 268 if (atomic_read(&iq->instr_pending)) { 269 spin_lock_bh(&iq->lock); 270 iq->fill_cnt = 0; 271 iq->octeon_read_index = iq->host_write_index; 272 iq->stats.instr_processed += 273 atomic_read(&iq->instr_pending); 274 lio_process_iq_request_list(oct, iq, 0); 275 spin_unlock_bh(&iq->lock); 276 } 277 } 278 279 /* Force all pending ordered list requests to time out. */ 280 lio_process_ordered_list(oct, 1); 281 282 /* We do not need to wait for output queue packets to be processed. */ 283 } 284 285 /** 286 * \brief Cleanup PCI AER uncorrectable error status 287 * @param dev Pointer to PCI device 288 */ 289 static void cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 290 { 291 int pos = 0x100; 292 u32 status, mask; 293 294 pr_info("%s :\n", __func__); 295 296 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status); 297 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask); 298 if (dev->error_state == pci_channel_io_normal) 299 status &= ~mask; /* Clear corresponding nonfatal bits */ 300 else 301 status &= mask; /* Clear corresponding fatal bits */ 302 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status); 303 } 304 305 /** 306 * \brief Stop all PCI IO to a given device 307 * @param dev Pointer to Octeon device 308 */ 309 static void stop_pci_io(struct octeon_device *oct) 310 { 311 /* No more instructions will be forwarded. */ 312 atomic_set(&oct->status, OCT_DEV_IN_RESET); 313 314 pci_disable_device(oct->pci_dev); 315 316 /* Disable interrupts */ 317 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 318 319 pcierror_quiesce_device(oct); 320 321 /* Release the interrupt line */ 322 free_irq(oct->pci_dev->irq, oct); 323 324 if (oct->flags & LIO_FLAG_MSI_ENABLED) 325 pci_disable_msi(oct->pci_dev); 326 327 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 328 lio_get_state_string(&oct->status)); 329 330 /* making it a common function for all OCTEON models */ 331 cleanup_aer_uncorrect_error_status(oct->pci_dev); 332 } 333 334 /** 335 * \brief called when PCI error is detected 336 * @param pdev Pointer to PCI device 337 * @param state The current pci connection state 338 * 339 * This function is called after a PCI bus error affecting 340 * this device has been detected. 341 */ 342 static pci_ers_result_t liquidio_pcie_error_detected(struct pci_dev *pdev, 343 pci_channel_state_t state) 344 { 345 struct octeon_device *oct = pci_get_drvdata(pdev); 346 347 /* Non-correctable Non-fatal errors */ 348 if (state == pci_channel_io_normal) { 349 dev_err(&oct->pci_dev->dev, "Non-correctable non-fatal error reported:\n"); 350 cleanup_aer_uncorrect_error_status(oct->pci_dev); 351 return PCI_ERS_RESULT_CAN_RECOVER; 352 } 353 354 /* Non-correctable Fatal errors */ 355 dev_err(&oct->pci_dev->dev, "Non-correctable FATAL reported by PCI AER driver\n"); 356 stop_pci_io(oct); 357 358 /* Always return a DISCONNECT. There is no support for recovery but only 359 * for a clean shutdown. 360 */ 361 return PCI_ERS_RESULT_DISCONNECT; 362 } 363 364 /** 365 * \brief mmio handler 366 * @param pdev Pointer to PCI device 367 */ 368 static pci_ers_result_t liquidio_pcie_mmio_enabled( 369 struct pci_dev *pdev __attribute__((unused))) 370 { 371 /* We should never hit this since we never ask for a reset for a Fatal 372 * Error. We always return DISCONNECT in io_error above. 373 * But play safe and return RECOVERED for now. 374 */ 375 return PCI_ERS_RESULT_RECOVERED; 376 } 377 378 /** 379 * \brief called after the pci bus has been reset. 380 * @param pdev Pointer to PCI device 381 * 382 * Restart the card from scratch, as if from a cold-boot. Implementation 383 * resembles the first-half of the octeon_resume routine. 384 */ 385 static pci_ers_result_t liquidio_pcie_slot_reset( 386 struct pci_dev *pdev __attribute__((unused))) 387 { 388 /* We should never hit this since we never ask for a reset for a Fatal 389 * Error. We always return DISCONNECT in io_error above. 390 * But play safe and return RECOVERED for now. 391 */ 392 return PCI_ERS_RESULT_RECOVERED; 393 } 394 395 /** 396 * \brief called when traffic can start flowing again. 397 * @param pdev Pointer to PCI device 398 * 399 * This callback is called when the error recovery driver tells us that 400 * its OK to resume normal operation. Implementation resembles the 401 * second-half of the octeon_resume routine. 402 */ 403 static void liquidio_pcie_resume(struct pci_dev *pdev __attribute__((unused))) 404 { 405 /* Nothing to be done here. */ 406 } 407 408 #ifdef CONFIG_PM 409 /** 410 * \brief called when suspending 411 * @param pdev Pointer to PCI device 412 * @param state state to suspend to 413 */ 414 static int liquidio_suspend(struct pci_dev *pdev __attribute__((unused)), 415 pm_message_t state __attribute__((unused))) 416 { 417 return 0; 418 } 419 420 /** 421 * \brief called when resuming 422 * @param pdev Pointer to PCI device 423 */ 424 static int liquidio_resume(struct pci_dev *pdev __attribute__((unused))) 425 { 426 return 0; 427 } 428 #endif 429 430 /* For PCI-E Advanced Error Recovery (AER) Interface */ 431 static const struct pci_error_handlers liquidio_err_handler = { 432 .error_detected = liquidio_pcie_error_detected, 433 .mmio_enabled = liquidio_pcie_mmio_enabled, 434 .slot_reset = liquidio_pcie_slot_reset, 435 .resume = liquidio_pcie_resume, 436 }; 437 438 static const struct pci_device_id liquidio_pci_tbl[] = { 439 { /* 68xx */ 440 PCI_VENDOR_ID_CAVIUM, 0x91, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 441 }, 442 { /* 66xx */ 443 PCI_VENDOR_ID_CAVIUM, 0x92, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 444 }, 445 { /* 23xx pf */ 446 PCI_VENDOR_ID_CAVIUM, 0x9702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 447 }, 448 { 449 0, 0, 0, 0, 0, 0, 0 450 } 451 }; 452 MODULE_DEVICE_TABLE(pci, liquidio_pci_tbl); 453 454 static struct pci_driver liquidio_pci_driver = { 455 .name = "LiquidIO", 456 .id_table = liquidio_pci_tbl, 457 .probe = liquidio_probe, 458 .remove = liquidio_remove, 459 .err_handler = &liquidio_err_handler, /* For AER */ 460 461 #ifdef CONFIG_PM 462 .suspend = liquidio_suspend, 463 .resume = liquidio_resume, 464 #endif 465 #ifdef CONFIG_PCI_IOV 466 .sriov_configure = liquidio_enable_sriov, 467 #endif 468 }; 469 470 /** 471 * \brief register PCI driver 472 */ 473 static int liquidio_init_pci(void) 474 { 475 return pci_register_driver(&liquidio_pci_driver); 476 } 477 478 /** 479 * \brief unregister PCI driver 480 */ 481 static void liquidio_deinit_pci(void) 482 { 483 pci_unregister_driver(&liquidio_pci_driver); 484 } 485 486 /** 487 * \brief Check Tx queue status, and take appropriate action 488 * @param lio per-network private data 489 * @returns 0 if full, number of queues woken up otherwise 490 */ 491 static inline int check_txq_status(struct lio *lio) 492 { 493 int numqs = lio->netdev->real_num_tx_queues; 494 int ret_val = 0; 495 int q, iq; 496 497 /* check each sub-queue state */ 498 for (q = 0; q < numqs; q++) { 499 iq = lio->linfo.txpciq[q % 500 lio->oct_dev->num_iqs].s.q_no; 501 if (octnet_iq_is_full(lio->oct_dev, iq)) 502 continue; 503 if (__netif_subqueue_stopped(lio->netdev, q)) { 504 netif_wake_subqueue(lio->netdev, q); 505 INCR_INSTRQUEUE_PKT_COUNT(lio->oct_dev, iq, 506 tx_restart, 1); 507 ret_val++; 508 } 509 } 510 511 return ret_val; 512 } 513 514 /** 515 * \brief Print link information 516 * @param netdev network device 517 */ 518 static void print_link_info(struct net_device *netdev) 519 { 520 struct lio *lio = GET_LIO(netdev); 521 522 if (!ifstate_check(lio, LIO_IFSTATE_RESETTING) && 523 ifstate_check(lio, LIO_IFSTATE_REGISTERED)) { 524 struct oct_link_info *linfo = &lio->linfo; 525 526 if (linfo->link.s.link_up) { 527 netif_info(lio, link, lio->netdev, "%d Mbps %s Duplex UP\n", 528 linfo->link.s.speed, 529 (linfo->link.s.duplex) ? "Full" : "Half"); 530 } else { 531 netif_info(lio, link, lio->netdev, "Link Down\n"); 532 } 533 } 534 } 535 536 /** 537 * \brief Routine to notify MTU change 538 * @param work work_struct data structure 539 */ 540 static void octnet_link_status_change(struct work_struct *work) 541 { 542 struct cavium_wk *wk = (struct cavium_wk *)work; 543 struct lio *lio = (struct lio *)wk->ctxptr; 544 545 /* lio->linfo.link.s.mtu always contains max MTU of the lio interface. 546 * this API is invoked only when new max-MTU of the interface is 547 * less than current MTU. 548 */ 549 rtnl_lock(); 550 dev_set_mtu(lio->netdev, lio->linfo.link.s.mtu); 551 rtnl_unlock(); 552 } 553 554 /** 555 * \brief Sets up the mtu status change work 556 * @param netdev network device 557 */ 558 static inline int setup_link_status_change_wq(struct net_device *netdev) 559 { 560 struct lio *lio = GET_LIO(netdev); 561 struct octeon_device *oct = lio->oct_dev; 562 563 lio->link_status_wq.wq = alloc_workqueue("link-status", 564 WQ_MEM_RECLAIM, 0); 565 if (!lio->link_status_wq.wq) { 566 dev_err(&oct->pci_dev->dev, "unable to create cavium link status wq\n"); 567 return -1; 568 } 569 INIT_DELAYED_WORK(&lio->link_status_wq.wk.work, 570 octnet_link_status_change); 571 lio->link_status_wq.wk.ctxptr = lio; 572 573 return 0; 574 } 575 576 static inline void cleanup_link_status_change_wq(struct net_device *netdev) 577 { 578 struct lio *lio = GET_LIO(netdev); 579 580 if (lio->link_status_wq.wq) { 581 cancel_delayed_work_sync(&lio->link_status_wq.wk.work); 582 destroy_workqueue(lio->link_status_wq.wq); 583 } 584 } 585 586 /** 587 * \brief Update link status 588 * @param netdev network device 589 * @param ls link status structure 590 * 591 * Called on receipt of a link status response from the core application to 592 * update each interface's link status. 593 */ 594 static inline void update_link_status(struct net_device *netdev, 595 union oct_link_status *ls) 596 { 597 struct lio *lio = GET_LIO(netdev); 598 int changed = (lio->linfo.link.u64 != ls->u64); 599 int current_max_mtu = lio->linfo.link.s.mtu; 600 struct octeon_device *oct = lio->oct_dev; 601 602 dev_dbg(&oct->pci_dev->dev, "%s: lio->linfo.link.u64=%llx, ls->u64=%llx\n", 603 __func__, lio->linfo.link.u64, ls->u64); 604 lio->linfo.link.u64 = ls->u64; 605 606 if ((lio->intf_open) && (changed)) { 607 print_link_info(netdev); 608 lio->link_changes++; 609 610 if (lio->linfo.link.s.link_up) { 611 dev_dbg(&oct->pci_dev->dev, "%s: link_up", __func__); 612 netif_carrier_on(netdev); 613 wake_txqs(netdev); 614 } else { 615 dev_dbg(&oct->pci_dev->dev, "%s: link_off", __func__); 616 netif_carrier_off(netdev); 617 stop_txqs(netdev); 618 } 619 if (lio->linfo.link.s.mtu != current_max_mtu) { 620 netif_info(lio, probe, lio->netdev, "Max MTU changed from %d to %d\n", 621 current_max_mtu, lio->linfo.link.s.mtu); 622 netdev->max_mtu = lio->linfo.link.s.mtu; 623 } 624 if (lio->linfo.link.s.mtu < netdev->mtu) { 625 dev_warn(&oct->pci_dev->dev, 626 "Current MTU is higher than new max MTU; Reducing the current mtu from %d to %d\n", 627 netdev->mtu, lio->linfo.link.s.mtu); 628 queue_delayed_work(lio->link_status_wq.wq, 629 &lio->link_status_wq.wk.work, 0); 630 } 631 } 632 } 633 634 /** 635 * lio_sync_octeon_time - send latest localtime to octeon firmware so that 636 * firmware will correct it's time, in case there is a time skew 637 * 638 * @work: work scheduled to send time update to octeon firmware 639 **/ 640 static void lio_sync_octeon_time(struct work_struct *work) 641 { 642 struct cavium_wk *wk = (struct cavium_wk *)work; 643 struct lio *lio = (struct lio *)wk->ctxptr; 644 struct octeon_device *oct = lio->oct_dev; 645 struct octeon_soft_command *sc; 646 struct timespec64 ts; 647 struct lio_time *lt; 648 int ret; 649 650 sc = octeon_alloc_soft_command(oct, sizeof(struct lio_time), 16, 0); 651 if (!sc) { 652 dev_err(&oct->pci_dev->dev, 653 "Failed to sync time to octeon: soft command allocation failed\n"); 654 return; 655 } 656 657 lt = (struct lio_time *)sc->virtdptr; 658 659 /* Get time of the day */ 660 ktime_get_real_ts64(&ts); 661 lt->sec = ts.tv_sec; 662 lt->nsec = ts.tv_nsec; 663 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); 664 665 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 666 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 667 OPCODE_NIC_SYNC_OCTEON_TIME, 0, 0, 0); 668 669 init_completion(&sc->complete); 670 sc->sc_status = OCTEON_REQUEST_PENDING; 671 672 ret = octeon_send_soft_command(oct, sc); 673 if (ret == IQ_SEND_FAILED) { 674 dev_err(&oct->pci_dev->dev, 675 "Failed to sync time to octeon: failed to send soft command\n"); 676 octeon_free_soft_command(oct, sc); 677 } else { 678 WRITE_ONCE(sc->caller_is_done, true); 679 } 680 681 queue_delayed_work(lio->sync_octeon_time_wq.wq, 682 &lio->sync_octeon_time_wq.wk.work, 683 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 684 } 685 686 /** 687 * setup_sync_octeon_time_wq - Sets up the work to periodically update 688 * local time to octeon firmware 689 * 690 * @netdev - network device which should send time update to firmware 691 **/ 692 static inline int setup_sync_octeon_time_wq(struct net_device *netdev) 693 { 694 struct lio *lio = GET_LIO(netdev); 695 struct octeon_device *oct = lio->oct_dev; 696 697 lio->sync_octeon_time_wq.wq = 698 alloc_workqueue("update-octeon-time", WQ_MEM_RECLAIM, 0); 699 if (!lio->sync_octeon_time_wq.wq) { 700 dev_err(&oct->pci_dev->dev, "Unable to create wq to update octeon time\n"); 701 return -1; 702 } 703 INIT_DELAYED_WORK(&lio->sync_octeon_time_wq.wk.work, 704 lio_sync_octeon_time); 705 lio->sync_octeon_time_wq.wk.ctxptr = lio; 706 queue_delayed_work(lio->sync_octeon_time_wq.wq, 707 &lio->sync_octeon_time_wq.wk.work, 708 msecs_to_jiffies(LIO_SYNC_OCTEON_TIME_INTERVAL_MS)); 709 710 return 0; 711 } 712 713 /** 714 * cleanup_sync_octeon_time_wq - stop scheduling and destroy the work created 715 * to periodically update local time to octeon firmware 716 * 717 * @netdev - network device which should send time update to firmware 718 **/ 719 static inline void cleanup_sync_octeon_time_wq(struct net_device *netdev) 720 { 721 struct lio *lio = GET_LIO(netdev); 722 struct cavium_wq *time_wq = &lio->sync_octeon_time_wq; 723 724 if (time_wq->wq) { 725 cancel_delayed_work_sync(&time_wq->wk.work); 726 destroy_workqueue(time_wq->wq); 727 } 728 } 729 730 static struct octeon_device *get_other_octeon_device(struct octeon_device *oct) 731 { 732 struct octeon_device *other_oct; 733 734 other_oct = lio_get_device(oct->octeon_id + 1); 735 736 if (other_oct && other_oct->pci_dev) { 737 int oct_busnum, other_oct_busnum; 738 739 oct_busnum = oct->pci_dev->bus->number; 740 other_oct_busnum = other_oct->pci_dev->bus->number; 741 742 if (oct_busnum == other_oct_busnum) { 743 int oct_slot, other_oct_slot; 744 745 oct_slot = PCI_SLOT(oct->pci_dev->devfn); 746 other_oct_slot = PCI_SLOT(other_oct->pci_dev->devfn); 747 748 if (oct_slot == other_oct_slot) 749 return other_oct; 750 } 751 } 752 753 return NULL; 754 } 755 756 static void disable_all_vf_links(struct octeon_device *oct) 757 { 758 struct net_device *netdev; 759 int max_vfs, vf, i; 760 761 if (!oct) 762 return; 763 764 max_vfs = oct->sriov_info.max_vfs; 765 766 for (i = 0; i < oct->ifcount; i++) { 767 netdev = oct->props[i].netdev; 768 if (!netdev) 769 continue; 770 771 for (vf = 0; vf < max_vfs; vf++) 772 liquidio_set_vf_link_state(netdev, vf, 773 IFLA_VF_LINK_STATE_DISABLE); 774 } 775 } 776 777 static int liquidio_watchdog(void *param) 778 { 779 bool err_msg_was_printed[LIO_MAX_CORES]; 780 u16 mask_of_crashed_or_stuck_cores = 0; 781 bool all_vf_links_are_disabled = false; 782 struct octeon_device *oct = param; 783 struct octeon_device *other_oct; 784 #ifdef CONFIG_MODULE_UNLOAD 785 long refcount, vfs_referencing_pf; 786 u64 vfs_mask1, vfs_mask2; 787 #endif 788 int core; 789 790 memset(err_msg_was_printed, 0, sizeof(err_msg_was_printed)); 791 792 while (!kthread_should_stop()) { 793 /* sleep for a couple of seconds so that we don't hog the CPU */ 794 set_current_state(TASK_INTERRUPTIBLE); 795 schedule_timeout(msecs_to_jiffies(2000)); 796 797 mask_of_crashed_or_stuck_cores = 798 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2); 799 800 if (!mask_of_crashed_or_stuck_cores) 801 continue; 802 803 WRITE_ONCE(oct->cores_crashed, true); 804 other_oct = get_other_octeon_device(oct); 805 if (other_oct) 806 WRITE_ONCE(other_oct->cores_crashed, true); 807 808 for (core = 0; core < LIO_MAX_CORES; core++) { 809 bool core_crashed_or_got_stuck; 810 811 core_crashed_or_got_stuck = 812 (mask_of_crashed_or_stuck_cores 813 >> core) & 1; 814 815 if (core_crashed_or_got_stuck && 816 !err_msg_was_printed[core]) { 817 dev_err(&oct->pci_dev->dev, 818 "ERROR: Octeon core %d crashed or got stuck! See oct-fwdump for details.\n", 819 core); 820 err_msg_was_printed[core] = true; 821 } 822 } 823 824 if (all_vf_links_are_disabled) 825 continue; 826 827 disable_all_vf_links(oct); 828 disable_all_vf_links(other_oct); 829 all_vf_links_are_disabled = true; 830 831 #ifdef CONFIG_MODULE_UNLOAD 832 vfs_mask1 = READ_ONCE(oct->sriov_info.vf_drv_loaded_mask); 833 vfs_mask2 = READ_ONCE(other_oct->sriov_info.vf_drv_loaded_mask); 834 835 vfs_referencing_pf = hweight64(vfs_mask1); 836 vfs_referencing_pf += hweight64(vfs_mask2); 837 838 refcount = module_refcount(THIS_MODULE); 839 if (refcount >= vfs_referencing_pf) { 840 while (vfs_referencing_pf) { 841 module_put(THIS_MODULE); 842 vfs_referencing_pf--; 843 } 844 } 845 #endif 846 } 847 848 return 0; 849 } 850 851 /** 852 * \brief PCI probe handler 853 * @param pdev PCI device structure 854 * @param ent unused 855 */ 856 static int 857 liquidio_probe(struct pci_dev *pdev, 858 const struct pci_device_id *ent __attribute__((unused))) 859 { 860 struct octeon_device *oct_dev = NULL; 861 struct handshake *hs; 862 863 oct_dev = octeon_allocate_device(pdev->device, 864 sizeof(struct octeon_device_priv)); 865 if (!oct_dev) { 866 dev_err(&pdev->dev, "Unable to allocate device\n"); 867 return -ENOMEM; 868 } 869 870 if (pdev->device == OCTEON_CN23XX_PF_VID) 871 oct_dev->msix_on = LIO_FLAG_MSIX_ENABLED; 872 873 /* Enable PTP for 6XXX Device */ 874 if (((pdev->device == OCTEON_CN66XX) || 875 (pdev->device == OCTEON_CN68XX))) 876 oct_dev->ptp_enable = true; 877 else 878 oct_dev->ptp_enable = false; 879 880 dev_info(&pdev->dev, "Initializing device %x:%x.\n", 881 (u32)pdev->vendor, (u32)pdev->device); 882 883 /* Assign octeon_device for this device to the private data area. */ 884 pci_set_drvdata(pdev, oct_dev); 885 886 /* set linux specific device pointer */ 887 oct_dev->pci_dev = (void *)pdev; 888 889 oct_dev->subsystem_id = pdev->subsystem_vendor | 890 (pdev->subsystem_device << 16); 891 892 hs = &handshake[oct_dev->octeon_id]; 893 init_completion(&hs->init); 894 init_completion(&hs->started); 895 hs->pci_dev = pdev; 896 897 if (oct_dev->octeon_id == 0) 898 /* first LiquidIO NIC is detected */ 899 complete(&first_stage); 900 901 if (octeon_device_init(oct_dev)) { 902 complete(&hs->init); 903 liquidio_remove(pdev); 904 return -ENOMEM; 905 } 906 907 if (OCTEON_CN23XX_PF(oct_dev)) { 908 u8 bus, device, function; 909 910 if (atomic_read(oct_dev->adapter_refcount) == 1) { 911 /* Each NIC gets one watchdog kernel thread. The first 912 * PF (of each NIC) that gets pci_driver->probe()'d 913 * creates that thread. 914 */ 915 bus = pdev->bus->number; 916 device = PCI_SLOT(pdev->devfn); 917 function = PCI_FUNC(pdev->devfn); 918 oct_dev->watchdog_task = kthread_create( 919 liquidio_watchdog, oct_dev, 920 "liowd/%02hhx:%02hhx.%hhx", bus, device, function); 921 if (!IS_ERR(oct_dev->watchdog_task)) { 922 wake_up_process(oct_dev->watchdog_task); 923 } else { 924 oct_dev->watchdog_task = NULL; 925 dev_err(&oct_dev->pci_dev->dev, 926 "failed to create kernel_thread\n"); 927 liquidio_remove(pdev); 928 return -1; 929 } 930 } 931 } 932 933 oct_dev->rx_pause = 1; 934 oct_dev->tx_pause = 1; 935 936 dev_dbg(&oct_dev->pci_dev->dev, "Device is ready\n"); 937 938 return 0; 939 } 940 941 static bool fw_type_is_auto(void) 942 { 943 return strncmp(fw_type, LIO_FW_NAME_TYPE_AUTO, 944 sizeof(LIO_FW_NAME_TYPE_AUTO)) == 0; 945 } 946 947 /** 948 * \brief PCI FLR for each Octeon device. 949 * @param oct octeon device 950 */ 951 static void octeon_pci_flr(struct octeon_device *oct) 952 { 953 int rc; 954 955 pci_save_state(oct->pci_dev); 956 957 pci_cfg_access_lock(oct->pci_dev); 958 959 /* Quiesce the device completely */ 960 pci_write_config_word(oct->pci_dev, PCI_COMMAND, 961 PCI_COMMAND_INTX_DISABLE); 962 963 rc = __pci_reset_function_locked(oct->pci_dev); 964 965 if (rc != 0) 966 dev_err(&oct->pci_dev->dev, "Error %d resetting PCI function %d\n", 967 rc, oct->pf_num); 968 969 pci_cfg_access_unlock(oct->pci_dev); 970 971 pci_restore_state(oct->pci_dev); 972 } 973 974 /** 975 *\brief Destroy resources associated with octeon device 976 * @param pdev PCI device structure 977 * @param ent unused 978 */ 979 static void octeon_destroy_resources(struct octeon_device *oct) 980 { 981 int i, refcount; 982 struct msix_entry *msix_entries; 983 struct octeon_device_priv *oct_priv = 984 (struct octeon_device_priv *)oct->priv; 985 986 struct handshake *hs; 987 988 switch (atomic_read(&oct->status)) { 989 case OCT_DEV_RUNNING: 990 case OCT_DEV_CORE_OK: 991 992 /* No more instructions will be forwarded. */ 993 atomic_set(&oct->status, OCT_DEV_IN_RESET); 994 995 oct->app_mode = CVM_DRV_INVALID_APP; 996 dev_dbg(&oct->pci_dev->dev, "Device state is now %s\n", 997 lio_get_state_string(&oct->status)); 998 999 schedule_timeout_uninterruptible(HZ / 10); 1000 1001 /* fallthrough */ 1002 case OCT_DEV_HOST_OK: 1003 1004 /* fallthrough */ 1005 case OCT_DEV_CONSOLE_INIT_DONE: 1006 /* Remove any consoles */ 1007 octeon_remove_consoles(oct); 1008 1009 /* fallthrough */ 1010 case OCT_DEV_IO_QUEUES_DONE: 1011 if (lio_wait_for_instr_fetch(oct)) 1012 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); 1013 1014 if (wait_for_pending_requests(oct)) 1015 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); 1016 1017 /* Disable the input and output queues now. No more packets will 1018 * arrive from Octeon, but we should wait for all packet 1019 * processing to finish. 1020 */ 1021 oct->fn_list.disable_io_queues(oct); 1022 1023 if (lio_wait_for_oq_pkts(oct)) 1024 dev_err(&oct->pci_dev->dev, "OQ had pending packets\n"); 1025 1026 /* Force all requests waiting to be fetched by OCTEON to 1027 * complete. 1028 */ 1029 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1030 struct octeon_instr_queue *iq; 1031 1032 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1033 continue; 1034 iq = oct->instr_queue[i]; 1035 1036 if (atomic_read(&iq->instr_pending)) { 1037 spin_lock_bh(&iq->lock); 1038 iq->fill_cnt = 0; 1039 iq->octeon_read_index = iq->host_write_index; 1040 iq->stats.instr_processed += 1041 atomic_read(&iq->instr_pending); 1042 lio_process_iq_request_list(oct, iq, 0); 1043 spin_unlock_bh(&iq->lock); 1044 } 1045 } 1046 1047 lio_process_ordered_list(oct, 1); 1048 octeon_free_sc_done_list(oct); 1049 octeon_free_sc_zombie_list(oct); 1050 1051 /* fallthrough */ 1052 case OCT_DEV_INTR_SET_DONE: 1053 /* Disable interrupts */ 1054 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); 1055 1056 if (oct->msix_on) { 1057 msix_entries = (struct msix_entry *)oct->msix_entries; 1058 for (i = 0; i < oct->num_msix_irqs - 1; i++) { 1059 if (oct->ioq_vector[i].vector) { 1060 /* clear the affinity_cpumask */ 1061 irq_set_affinity_hint( 1062 msix_entries[i].vector, 1063 NULL); 1064 free_irq(msix_entries[i].vector, 1065 &oct->ioq_vector[i]); 1066 oct->ioq_vector[i].vector = 0; 1067 } 1068 } 1069 /* non-iov vector's argument is oct struct */ 1070 free_irq(msix_entries[i].vector, oct); 1071 1072 pci_disable_msix(oct->pci_dev); 1073 kfree(oct->msix_entries); 1074 oct->msix_entries = NULL; 1075 } else { 1076 /* Release the interrupt line */ 1077 free_irq(oct->pci_dev->irq, oct); 1078 1079 if (oct->flags & LIO_FLAG_MSI_ENABLED) 1080 pci_disable_msi(oct->pci_dev); 1081 } 1082 1083 kfree(oct->irq_name_storage); 1084 oct->irq_name_storage = NULL; 1085 1086 /* fallthrough */ 1087 case OCT_DEV_MSIX_ALLOC_VECTOR_DONE: 1088 if (OCTEON_CN23XX_PF(oct)) 1089 octeon_free_ioq_vector(oct); 1090 1091 /* fallthrough */ 1092 case OCT_DEV_MBOX_SETUP_DONE: 1093 if (OCTEON_CN23XX_PF(oct)) 1094 oct->fn_list.free_mbox(oct); 1095 1096 /* fallthrough */ 1097 case OCT_DEV_IN_RESET: 1098 case OCT_DEV_DROQ_INIT_DONE: 1099 /* Wait for any pending operations */ 1100 mdelay(100); 1101 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { 1102 if (!(oct->io_qmask.oq & BIT_ULL(i))) 1103 continue; 1104 octeon_delete_droq(oct, i); 1105 } 1106 1107 /* Force any pending handshakes to complete */ 1108 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 1109 hs = &handshake[i]; 1110 1111 if (hs->pci_dev) { 1112 handshake[oct->octeon_id].init_ok = 0; 1113 complete(&handshake[oct->octeon_id].init); 1114 handshake[oct->octeon_id].started_ok = 0; 1115 complete(&handshake[oct->octeon_id].started); 1116 } 1117 } 1118 1119 /* fallthrough */ 1120 case OCT_DEV_RESP_LIST_INIT_DONE: 1121 octeon_delete_response_list(oct); 1122 1123 /* fallthrough */ 1124 case OCT_DEV_INSTR_QUEUE_INIT_DONE: 1125 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { 1126 if (!(oct->io_qmask.iq & BIT_ULL(i))) 1127 continue; 1128 octeon_delete_instr_queue(oct, i); 1129 } 1130 #ifdef CONFIG_PCI_IOV 1131 if (oct->sriov_info.sriov_enabled) 1132 pci_disable_sriov(oct->pci_dev); 1133 #endif 1134 /* fallthrough */ 1135 case OCT_DEV_SC_BUFF_POOL_INIT_DONE: 1136 octeon_free_sc_buffer_pool(oct); 1137 1138 /* fallthrough */ 1139 case OCT_DEV_DISPATCH_INIT_DONE: 1140 octeon_delete_dispatch_list(oct); 1141 cancel_delayed_work_sync(&oct->nic_poll_work.work); 1142 1143 /* fallthrough */ 1144 case OCT_DEV_PCI_MAP_DONE: 1145 refcount = octeon_deregister_device(oct); 1146 1147 /* Soft reset the octeon device before exiting. 1148 * However, if fw was loaded from card (i.e. autoboot), 1149 * perform an FLR instead. 1150 * Implementation note: only soft-reset the device 1151 * if it is a CN6XXX OR the LAST CN23XX device. 1152 */ 1153 if (atomic_read(oct->adapter_fw_state) == FW_IS_PRELOADED) 1154 octeon_pci_flr(oct); 1155 else if (OCTEON_CN6XXX(oct) || !refcount) 1156 oct->fn_list.soft_reset(oct); 1157 1158 octeon_unmap_pci_barx(oct, 0); 1159 octeon_unmap_pci_barx(oct, 1); 1160 1161 /* fallthrough */ 1162 case OCT_DEV_PCI_ENABLE_DONE: 1163 pci_clear_master(oct->pci_dev); 1164 /* Disable the device, releasing the PCI INT */ 1165 pci_disable_device(oct->pci_dev); 1166 1167 /* fallthrough */ 1168 case OCT_DEV_BEGIN_STATE: 1169 /* Nothing to be done here either */ 1170 break; 1171 } /* end switch (oct->status) */ 1172 1173 tasklet_kill(&oct_priv->droq_tasklet); 1174 } 1175 1176 /** 1177 * \brief Send Rx control command 1178 * @param lio per-network private data 1179 * @param start_stop whether to start or stop 1180 */ 1181 static void send_rx_ctrl_cmd(struct lio *lio, int start_stop) 1182 { 1183 struct octeon_soft_command *sc; 1184 union octnet_cmd *ncmd; 1185 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1186 int retval; 1187 1188 if (oct->props[lio->ifidx].rx_on == start_stop) 1189 return; 1190 1191 sc = (struct octeon_soft_command *) 1192 octeon_alloc_soft_command(oct, OCTNET_CMD_SIZE, 1193 16, 0); 1194 if (!sc) { 1195 netif_info(lio, rx_err, lio->netdev, 1196 "Failed to allocate octeon_soft_command\n"); 1197 return; 1198 } 1199 1200 ncmd = (union octnet_cmd *)sc->virtdptr; 1201 1202 ncmd->u64 = 0; 1203 ncmd->s.cmd = OCTNET_CMD_RX_CTL; 1204 ncmd->s.param1 = start_stop; 1205 1206 octeon_swap_8B_data((u64 *)ncmd, (OCTNET_CMD_SIZE >> 3)); 1207 1208 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 1209 1210 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 1211 OPCODE_NIC_CMD, 0, 0, 0); 1212 1213 init_completion(&sc->complete); 1214 sc->sc_status = OCTEON_REQUEST_PENDING; 1215 1216 retval = octeon_send_soft_command(oct, sc); 1217 if (retval == IQ_SEND_FAILED) { 1218 netif_info(lio, rx_err, lio->netdev, "Failed to send RX Control message\n"); 1219 octeon_free_soft_command(oct, sc); 1220 return; 1221 } else { 1222 /* Sleep on a wait queue till the cond flag indicates that the 1223 * response arrived or timed-out. 1224 */ 1225 retval = wait_for_sc_completion_timeout(oct, sc, 0); 1226 if (retval) 1227 return; 1228 1229 oct->props[lio->ifidx].rx_on = start_stop; 1230 WRITE_ONCE(sc->caller_is_done, true); 1231 } 1232 } 1233 1234 /** 1235 * \brief Destroy NIC device interface 1236 * @param oct octeon device 1237 * @param ifidx which interface to destroy 1238 * 1239 * Cleanup associated with each interface for an Octeon device when NIC 1240 * module is being unloaded or if initialization fails during load. 1241 */ 1242 static void liquidio_destroy_nic_device(struct octeon_device *oct, int ifidx) 1243 { 1244 struct net_device *netdev = oct->props[ifidx].netdev; 1245 struct octeon_device_priv *oct_priv = 1246 (struct octeon_device_priv *)oct->priv; 1247 struct napi_struct *napi, *n; 1248 struct lio *lio; 1249 1250 if (!netdev) { 1251 dev_err(&oct->pci_dev->dev, "%s No netdevice ptr for index %d\n", 1252 __func__, ifidx); 1253 return; 1254 } 1255 1256 lio = GET_LIO(netdev); 1257 1258 dev_dbg(&oct->pci_dev->dev, "NIC device cleanup\n"); 1259 1260 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) 1261 liquidio_stop(netdev); 1262 1263 if (oct->props[lio->ifidx].napi_enabled == 1) { 1264 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1265 napi_disable(napi); 1266 1267 oct->props[lio->ifidx].napi_enabled = 0; 1268 1269 if (OCTEON_CN23XX_PF(oct)) 1270 oct->droq[0]->ops.poll_mode = 0; 1271 } 1272 1273 /* Delete NAPI */ 1274 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1275 netif_napi_del(napi); 1276 1277 tasklet_enable(&oct_priv->droq_tasklet); 1278 1279 if (atomic_read(&lio->ifstate) & LIO_IFSTATE_REGISTERED) 1280 unregister_netdev(netdev); 1281 1282 cleanup_sync_octeon_time_wq(netdev); 1283 cleanup_link_status_change_wq(netdev); 1284 1285 cleanup_rx_oom_poll_fn(netdev); 1286 1287 lio_delete_glists(lio); 1288 1289 free_netdev(netdev); 1290 1291 oct->props[ifidx].gmxport = -1; 1292 1293 oct->props[ifidx].netdev = NULL; 1294 } 1295 1296 /** 1297 * \brief Stop complete NIC functionality 1298 * @param oct octeon device 1299 */ 1300 static int liquidio_stop_nic_module(struct octeon_device *oct) 1301 { 1302 int i, j; 1303 struct lio *lio; 1304 1305 dev_dbg(&oct->pci_dev->dev, "Stopping network interfaces\n"); 1306 if (!oct->ifcount) { 1307 dev_err(&oct->pci_dev->dev, "Init for Octeon was not completed\n"); 1308 return 1; 1309 } 1310 1311 spin_lock_bh(&oct->cmd_resp_wqlock); 1312 oct->cmd_resp_state = OCT_DRV_OFFLINE; 1313 spin_unlock_bh(&oct->cmd_resp_wqlock); 1314 1315 lio_vf_rep_destroy(oct); 1316 1317 for (i = 0; i < oct->ifcount; i++) { 1318 lio = GET_LIO(oct->props[i].netdev); 1319 for (j = 0; j < oct->num_oqs; j++) 1320 octeon_unregister_droq_ops(oct, 1321 lio->linfo.rxpciq[j].s.q_no); 1322 } 1323 1324 for (i = 0; i < oct->ifcount; i++) 1325 liquidio_destroy_nic_device(oct, i); 1326 1327 if (oct->devlink) { 1328 devlink_unregister(oct->devlink); 1329 devlink_free(oct->devlink); 1330 oct->devlink = NULL; 1331 } 1332 1333 dev_dbg(&oct->pci_dev->dev, "Network interfaces stopped\n"); 1334 return 0; 1335 } 1336 1337 /** 1338 * \brief Cleans up resources at unload time 1339 * @param pdev PCI device structure 1340 */ 1341 static void liquidio_remove(struct pci_dev *pdev) 1342 { 1343 struct octeon_device *oct_dev = pci_get_drvdata(pdev); 1344 1345 dev_dbg(&oct_dev->pci_dev->dev, "Stopping device\n"); 1346 1347 if (oct_dev->watchdog_task) 1348 kthread_stop(oct_dev->watchdog_task); 1349 1350 if (!oct_dev->octeon_id && 1351 oct_dev->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) 1352 lio_vf_rep_modexit(); 1353 1354 if (oct_dev->app_mode && (oct_dev->app_mode == CVM_DRV_NIC_APP)) 1355 liquidio_stop_nic_module(oct_dev); 1356 1357 /* Reset the octeon device and cleanup all memory allocated for 1358 * the octeon device by driver. 1359 */ 1360 octeon_destroy_resources(oct_dev); 1361 1362 dev_info(&oct_dev->pci_dev->dev, "Device removed\n"); 1363 1364 /* This octeon device has been removed. Update the global 1365 * data structure to reflect this. Free the device structure. 1366 */ 1367 octeon_free_device_mem(oct_dev); 1368 } 1369 1370 /** 1371 * \brief Identify the Octeon device and to map the BAR address space 1372 * @param oct octeon device 1373 */ 1374 static int octeon_chip_specific_setup(struct octeon_device *oct) 1375 { 1376 u32 dev_id, rev_id; 1377 int ret = 1; 1378 1379 pci_read_config_dword(oct->pci_dev, 0, &dev_id); 1380 pci_read_config_dword(oct->pci_dev, 8, &rev_id); 1381 oct->rev_id = rev_id & 0xff; 1382 1383 switch (dev_id) { 1384 case OCTEON_CN68XX_PCIID: 1385 oct->chip_id = OCTEON_CN68XX; 1386 ret = lio_setup_cn68xx_octeon_device(oct); 1387 break; 1388 1389 case OCTEON_CN66XX_PCIID: 1390 oct->chip_id = OCTEON_CN66XX; 1391 ret = lio_setup_cn66xx_octeon_device(oct); 1392 break; 1393 1394 case OCTEON_CN23XX_PCIID_PF: 1395 oct->chip_id = OCTEON_CN23XX_PF_VID; 1396 ret = setup_cn23xx_octeon_pf_device(oct); 1397 if (ret) 1398 break; 1399 #ifdef CONFIG_PCI_IOV 1400 if (!ret) 1401 pci_sriov_set_totalvfs(oct->pci_dev, 1402 oct->sriov_info.max_vfs); 1403 #endif 1404 break; 1405 1406 default: 1407 dev_err(&oct->pci_dev->dev, "Unknown device found (dev_id: %x)\n", 1408 dev_id); 1409 } 1410 1411 return ret; 1412 } 1413 1414 /** 1415 * \brief PCI initialization for each Octeon device. 1416 * @param oct octeon device 1417 */ 1418 static int octeon_pci_os_setup(struct octeon_device *oct) 1419 { 1420 /* setup PCI stuff first */ 1421 if (pci_enable_device(oct->pci_dev)) { 1422 dev_err(&oct->pci_dev->dev, "pci_enable_device failed\n"); 1423 return 1; 1424 } 1425 1426 if (dma_set_mask_and_coherent(&oct->pci_dev->dev, DMA_BIT_MASK(64))) { 1427 dev_err(&oct->pci_dev->dev, "Unexpected DMA device capability\n"); 1428 pci_disable_device(oct->pci_dev); 1429 return 1; 1430 } 1431 1432 /* Enable PCI DMA Master. */ 1433 pci_set_master(oct->pci_dev); 1434 1435 return 0; 1436 } 1437 1438 /** 1439 * \brief Unmap and free network buffer 1440 * @param buf buffer 1441 */ 1442 static void free_netbuf(void *buf) 1443 { 1444 struct sk_buff *skb; 1445 struct octnet_buf_free_info *finfo; 1446 struct lio *lio; 1447 1448 finfo = (struct octnet_buf_free_info *)buf; 1449 skb = finfo->skb; 1450 lio = finfo->lio; 1451 1452 dma_unmap_single(&lio->oct_dev->pci_dev->dev, finfo->dptr, skb->len, 1453 DMA_TO_DEVICE); 1454 1455 tx_buffer_free(skb); 1456 } 1457 1458 /** 1459 * \brief Unmap and free gather buffer 1460 * @param buf buffer 1461 */ 1462 static void free_netsgbuf(void *buf) 1463 { 1464 struct octnet_buf_free_info *finfo; 1465 struct sk_buff *skb; 1466 struct lio *lio; 1467 struct octnic_gather *g; 1468 int i, frags, iq; 1469 1470 finfo = (struct octnet_buf_free_info *)buf; 1471 skb = finfo->skb; 1472 lio = finfo->lio; 1473 g = finfo->g; 1474 frags = skb_shinfo(skb)->nr_frags; 1475 1476 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1477 g->sg[0].ptr[0], (skb->len - skb->data_len), 1478 DMA_TO_DEVICE); 1479 1480 i = 1; 1481 while (frags--) { 1482 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1483 1484 pci_unmap_page((lio->oct_dev)->pci_dev, 1485 g->sg[(i >> 2)].ptr[(i & 3)], 1486 skb_frag_size(frag), DMA_TO_DEVICE); 1487 i++; 1488 } 1489 1490 iq = skb_iq(lio->oct_dev, skb); 1491 spin_lock(&lio->glist_lock[iq]); 1492 list_add_tail(&g->list, &lio->glist[iq]); 1493 spin_unlock(&lio->glist_lock[iq]); 1494 1495 tx_buffer_free(skb); 1496 } 1497 1498 /** 1499 * \brief Unmap and free gather buffer with response 1500 * @param buf buffer 1501 */ 1502 static void free_netsgbuf_with_resp(void *buf) 1503 { 1504 struct octeon_soft_command *sc; 1505 struct octnet_buf_free_info *finfo; 1506 struct sk_buff *skb; 1507 struct lio *lio; 1508 struct octnic_gather *g; 1509 int i, frags, iq; 1510 1511 sc = (struct octeon_soft_command *)buf; 1512 skb = (struct sk_buff *)sc->callback_arg; 1513 finfo = (struct octnet_buf_free_info *)&skb->cb; 1514 1515 lio = finfo->lio; 1516 g = finfo->g; 1517 frags = skb_shinfo(skb)->nr_frags; 1518 1519 dma_unmap_single(&lio->oct_dev->pci_dev->dev, 1520 g->sg[0].ptr[0], (skb->len - skb->data_len), 1521 DMA_TO_DEVICE); 1522 1523 i = 1; 1524 while (frags--) { 1525 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 1526 1527 pci_unmap_page((lio->oct_dev)->pci_dev, 1528 g->sg[(i >> 2)].ptr[(i & 3)], 1529 skb_frag_size(frag), DMA_TO_DEVICE); 1530 i++; 1531 } 1532 1533 iq = skb_iq(lio->oct_dev, skb); 1534 1535 spin_lock(&lio->glist_lock[iq]); 1536 list_add_tail(&g->list, &lio->glist[iq]); 1537 spin_unlock(&lio->glist_lock[iq]); 1538 1539 /* Don't free the skb yet */ 1540 } 1541 1542 /** 1543 * \brief Adjust ptp frequency 1544 * @param ptp PTP clock info 1545 * @param ppb how much to adjust by, in parts-per-billion 1546 */ 1547 static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) 1548 { 1549 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1550 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1551 u64 comp, delta; 1552 unsigned long flags; 1553 bool neg_adj = false; 1554 1555 if (ppb < 0) { 1556 neg_adj = true; 1557 ppb = -ppb; 1558 } 1559 1560 /* The hardware adds the clock compensation value to the 1561 * PTP clock on every coprocessor clock cycle, so we 1562 * compute the delta in terms of coprocessor clocks. 1563 */ 1564 delta = (u64)ppb << 32; 1565 do_div(delta, oct->coproc_clock_rate); 1566 1567 spin_lock_irqsave(&lio->ptp_lock, flags); 1568 comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP); 1569 if (neg_adj) 1570 comp -= delta; 1571 else 1572 comp += delta; 1573 lio_pci_writeq(oct, comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1574 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1575 1576 return 0; 1577 } 1578 1579 /** 1580 * \brief Adjust ptp time 1581 * @param ptp PTP clock info 1582 * @param delta how much to adjust by, in nanosecs 1583 */ 1584 static int liquidio_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 1585 { 1586 unsigned long flags; 1587 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1588 1589 spin_lock_irqsave(&lio->ptp_lock, flags); 1590 lio->ptp_adjust += delta; 1591 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1592 1593 return 0; 1594 } 1595 1596 /** 1597 * \brief Get hardware clock time, including any adjustment 1598 * @param ptp PTP clock info 1599 * @param ts timespec 1600 */ 1601 static int liquidio_ptp_gettime(struct ptp_clock_info *ptp, 1602 struct timespec64 *ts) 1603 { 1604 u64 ns; 1605 unsigned long flags; 1606 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1607 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1608 1609 spin_lock_irqsave(&lio->ptp_lock, flags); 1610 ns = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_HI); 1611 ns += lio->ptp_adjust; 1612 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1613 1614 *ts = ns_to_timespec64(ns); 1615 1616 return 0; 1617 } 1618 1619 /** 1620 * \brief Set hardware clock time. Reset adjustment 1621 * @param ptp PTP clock info 1622 * @param ts timespec 1623 */ 1624 static int liquidio_ptp_settime(struct ptp_clock_info *ptp, 1625 const struct timespec64 *ts) 1626 { 1627 u64 ns; 1628 unsigned long flags; 1629 struct lio *lio = container_of(ptp, struct lio, ptp_info); 1630 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1631 1632 ns = timespec64_to_ns(ts); 1633 1634 spin_lock_irqsave(&lio->ptp_lock, flags); 1635 lio_pci_writeq(oct, ns, CN6XXX_MIO_PTP_CLOCK_HI); 1636 lio->ptp_adjust = 0; 1637 spin_unlock_irqrestore(&lio->ptp_lock, flags); 1638 1639 return 0; 1640 } 1641 1642 /** 1643 * \brief Check if PTP is enabled 1644 * @param ptp PTP clock info 1645 * @param rq request 1646 * @param on is it on 1647 */ 1648 static int 1649 liquidio_ptp_enable(struct ptp_clock_info *ptp __attribute__((unused)), 1650 struct ptp_clock_request *rq __attribute__((unused)), 1651 int on __attribute__((unused))) 1652 { 1653 return -EOPNOTSUPP; 1654 } 1655 1656 /** 1657 * \brief Open PTP clock source 1658 * @param netdev network device 1659 */ 1660 static void oct_ptp_open(struct net_device *netdev) 1661 { 1662 struct lio *lio = GET_LIO(netdev); 1663 struct octeon_device *oct = (struct octeon_device *)lio->oct_dev; 1664 1665 spin_lock_init(&lio->ptp_lock); 1666 1667 snprintf(lio->ptp_info.name, 16, "%s", netdev->name); 1668 lio->ptp_info.owner = THIS_MODULE; 1669 lio->ptp_info.max_adj = 250000000; 1670 lio->ptp_info.n_alarm = 0; 1671 lio->ptp_info.n_ext_ts = 0; 1672 lio->ptp_info.n_per_out = 0; 1673 lio->ptp_info.pps = 0; 1674 lio->ptp_info.adjfreq = liquidio_ptp_adjfreq; 1675 lio->ptp_info.adjtime = liquidio_ptp_adjtime; 1676 lio->ptp_info.gettime64 = liquidio_ptp_gettime; 1677 lio->ptp_info.settime64 = liquidio_ptp_settime; 1678 lio->ptp_info.enable = liquidio_ptp_enable; 1679 1680 lio->ptp_adjust = 0; 1681 1682 lio->ptp_clock = ptp_clock_register(&lio->ptp_info, 1683 &oct->pci_dev->dev); 1684 1685 if (IS_ERR(lio->ptp_clock)) 1686 lio->ptp_clock = NULL; 1687 } 1688 1689 /** 1690 * \brief Init PTP clock 1691 * @param oct octeon device 1692 */ 1693 static void liquidio_ptp_init(struct octeon_device *oct) 1694 { 1695 u64 clock_comp, cfg; 1696 1697 clock_comp = (u64)NSEC_PER_SEC << 32; 1698 do_div(clock_comp, oct->coproc_clock_rate); 1699 lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); 1700 1701 /* Enable */ 1702 cfg = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_CFG); 1703 lio_pci_writeq(oct, cfg | 0x01, CN6XXX_MIO_PTP_CLOCK_CFG); 1704 } 1705 1706 /** 1707 * \brief Load firmware to device 1708 * @param oct octeon device 1709 * 1710 * Maps device to firmware filename, requests firmware, and downloads it 1711 */ 1712 static int load_firmware(struct octeon_device *oct) 1713 { 1714 int ret = 0; 1715 const struct firmware *fw; 1716 char fw_name[LIO_MAX_FW_FILENAME_LEN]; 1717 char *tmp_fw_type; 1718 1719 if (fw_type_is_auto()) { 1720 tmp_fw_type = LIO_FW_NAME_TYPE_NIC; 1721 strncpy(fw_type, tmp_fw_type, sizeof(fw_type)); 1722 } else { 1723 tmp_fw_type = fw_type; 1724 } 1725 1726 sprintf(fw_name, "%s%s%s_%s%s", LIO_FW_DIR, LIO_FW_BASE_NAME, 1727 octeon_get_conf(oct)->card_name, tmp_fw_type, 1728 LIO_FW_NAME_SUFFIX); 1729 1730 ret = request_firmware(&fw, fw_name, &oct->pci_dev->dev); 1731 if (ret) { 1732 dev_err(&oct->pci_dev->dev, "Request firmware failed. Could not find file %s.\n", 1733 fw_name); 1734 release_firmware(fw); 1735 return ret; 1736 } 1737 1738 ret = octeon_download_firmware(oct, fw->data, fw->size); 1739 1740 release_firmware(fw); 1741 1742 return ret; 1743 } 1744 1745 /** 1746 * \brief Poll routine for checking transmit queue status 1747 * @param work work_struct data structure 1748 */ 1749 static void octnet_poll_check_txq_status(struct work_struct *work) 1750 { 1751 struct cavium_wk *wk = (struct cavium_wk *)work; 1752 struct lio *lio = (struct lio *)wk->ctxptr; 1753 1754 if (!ifstate_check(lio, LIO_IFSTATE_RUNNING)) 1755 return; 1756 1757 check_txq_status(lio); 1758 queue_delayed_work(lio->txq_status_wq.wq, 1759 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1760 } 1761 1762 /** 1763 * \brief Sets up the txq poll check 1764 * @param netdev network device 1765 */ 1766 static inline int setup_tx_poll_fn(struct net_device *netdev) 1767 { 1768 struct lio *lio = GET_LIO(netdev); 1769 struct octeon_device *oct = lio->oct_dev; 1770 1771 lio->txq_status_wq.wq = alloc_workqueue("txq-status", 1772 WQ_MEM_RECLAIM, 0); 1773 if (!lio->txq_status_wq.wq) { 1774 dev_err(&oct->pci_dev->dev, "unable to create cavium txq status wq\n"); 1775 return -1; 1776 } 1777 INIT_DELAYED_WORK(&lio->txq_status_wq.wk.work, 1778 octnet_poll_check_txq_status); 1779 lio->txq_status_wq.wk.ctxptr = lio; 1780 queue_delayed_work(lio->txq_status_wq.wq, 1781 &lio->txq_status_wq.wk.work, msecs_to_jiffies(1)); 1782 return 0; 1783 } 1784 1785 static inline void cleanup_tx_poll_fn(struct net_device *netdev) 1786 { 1787 struct lio *lio = GET_LIO(netdev); 1788 1789 if (lio->txq_status_wq.wq) { 1790 cancel_delayed_work_sync(&lio->txq_status_wq.wk.work); 1791 destroy_workqueue(lio->txq_status_wq.wq); 1792 } 1793 } 1794 1795 /** 1796 * \brief Net device open for LiquidIO 1797 * @param netdev network device 1798 */ 1799 static int liquidio_open(struct net_device *netdev) 1800 { 1801 struct lio *lio = GET_LIO(netdev); 1802 struct octeon_device *oct = lio->oct_dev; 1803 struct octeon_device_priv *oct_priv = 1804 (struct octeon_device_priv *)oct->priv; 1805 struct napi_struct *napi, *n; 1806 1807 if (oct->props[lio->ifidx].napi_enabled == 0) { 1808 tasklet_disable(&oct_priv->droq_tasklet); 1809 1810 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1811 napi_enable(napi); 1812 1813 oct->props[lio->ifidx].napi_enabled = 1; 1814 1815 if (OCTEON_CN23XX_PF(oct)) 1816 oct->droq[0]->ops.poll_mode = 1; 1817 } 1818 1819 if (oct->ptp_enable) 1820 oct_ptp_open(netdev); 1821 1822 ifstate_set(lio, LIO_IFSTATE_RUNNING); 1823 1824 if (OCTEON_CN23XX_PF(oct)) { 1825 if (!oct->msix_on) 1826 if (setup_tx_poll_fn(netdev)) 1827 return -1; 1828 } else { 1829 if (setup_tx_poll_fn(netdev)) 1830 return -1; 1831 } 1832 1833 netif_tx_start_all_queues(netdev); 1834 1835 /* Ready for link status updates */ 1836 lio->intf_open = 1; 1837 1838 netif_info(lio, ifup, lio->netdev, "Interface Open, ready for traffic\n"); 1839 1840 /* tell Octeon to start forwarding packets to host */ 1841 send_rx_ctrl_cmd(lio, 1); 1842 1843 /* start periodical statistics fetch */ 1844 INIT_DELAYED_WORK(&lio->stats_wk.work, lio_fetch_stats); 1845 lio->stats_wk.ctxptr = lio; 1846 schedule_delayed_work(&lio->stats_wk.work, msecs_to_jiffies 1847 (LIQUIDIO_NDEV_STATS_POLL_TIME_MS)); 1848 1849 dev_info(&oct->pci_dev->dev, "%s interface is opened\n", 1850 netdev->name); 1851 1852 return 0; 1853 } 1854 1855 /** 1856 * \brief Net device stop for LiquidIO 1857 * @param netdev network device 1858 */ 1859 static int liquidio_stop(struct net_device *netdev) 1860 { 1861 struct lio *lio = GET_LIO(netdev); 1862 struct octeon_device *oct = lio->oct_dev; 1863 struct octeon_device_priv *oct_priv = 1864 (struct octeon_device_priv *)oct->priv; 1865 struct napi_struct *napi, *n; 1866 1867 ifstate_reset(lio, LIO_IFSTATE_RUNNING); 1868 1869 /* Stop any link updates */ 1870 lio->intf_open = 0; 1871 1872 stop_txqs(netdev); 1873 1874 /* Inform that netif carrier is down */ 1875 netif_carrier_off(netdev); 1876 netif_tx_disable(netdev); 1877 1878 lio->linfo.link.s.link_up = 0; 1879 lio->link_changes++; 1880 1881 /* Tell Octeon that nic interface is down. */ 1882 send_rx_ctrl_cmd(lio, 0); 1883 1884 if (OCTEON_CN23XX_PF(oct)) { 1885 if (!oct->msix_on) 1886 cleanup_tx_poll_fn(netdev); 1887 } else { 1888 cleanup_tx_poll_fn(netdev); 1889 } 1890 1891 cancel_delayed_work_sync(&lio->stats_wk.work); 1892 1893 if (lio->ptp_clock) { 1894 ptp_clock_unregister(lio->ptp_clock); 1895 lio->ptp_clock = NULL; 1896 } 1897 1898 /* Wait for any pending Rx descriptors */ 1899 if (lio_wait_for_clean_oq(oct)) 1900 netif_info(lio, rx_err, lio->netdev, 1901 "Proceeding with stop interface after partial RX desc processing\n"); 1902 1903 if (oct->props[lio->ifidx].napi_enabled == 1) { 1904 list_for_each_entry_safe(napi, n, &netdev->napi_list, dev_list) 1905 napi_disable(napi); 1906 1907 oct->props[lio->ifidx].napi_enabled = 0; 1908 1909 if (OCTEON_CN23XX_PF(oct)) 1910 oct->droq[0]->ops.poll_mode = 0; 1911 1912 tasklet_enable(&oct_priv->droq_tasklet); 1913 } 1914 1915 dev_info(&oct->pci_dev->dev, "%s interface is stopped\n", netdev->name); 1916 1917 return 0; 1918 } 1919 1920 /** 1921 * \brief Converts a mask based on net device flags 1922 * @param netdev network device 1923 * 1924 * This routine generates a octnet_ifflags mask from the net device flags 1925 * received from the OS. 1926 */ 1927 static inline enum octnet_ifflags get_new_flags(struct net_device *netdev) 1928 { 1929 enum octnet_ifflags f = OCTNET_IFFLAG_UNICAST; 1930 1931 if (netdev->flags & IFF_PROMISC) 1932 f |= OCTNET_IFFLAG_PROMISC; 1933 1934 if (netdev->flags & IFF_ALLMULTI) 1935 f |= OCTNET_IFFLAG_ALLMULTI; 1936 1937 if (netdev->flags & IFF_MULTICAST) { 1938 f |= OCTNET_IFFLAG_MULTICAST; 1939 1940 /* Accept all multicast addresses if there are more than we 1941 * can handle 1942 */ 1943 if (netdev_mc_count(netdev) > MAX_OCTEON_MULTICAST_ADDR) 1944 f |= OCTNET_IFFLAG_ALLMULTI; 1945 } 1946 1947 if (netdev->flags & IFF_BROADCAST) 1948 f |= OCTNET_IFFLAG_BROADCAST; 1949 1950 return f; 1951 } 1952 1953 /** 1954 * \brief Net device set_multicast_list 1955 * @param netdev network device 1956 */ 1957 static void liquidio_set_mcast_list(struct net_device *netdev) 1958 { 1959 struct lio *lio = GET_LIO(netdev); 1960 struct octeon_device *oct = lio->oct_dev; 1961 struct octnic_ctrl_pkt nctrl; 1962 struct netdev_hw_addr *ha; 1963 u64 *mc; 1964 int ret; 1965 int mc_count = min(netdev_mc_count(netdev), MAX_OCTEON_MULTICAST_ADDR); 1966 1967 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 1968 1969 /* Create a ctrl pkt command to be sent to core app. */ 1970 nctrl.ncmd.u64 = 0; 1971 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_MULTI_LIST; 1972 nctrl.ncmd.s.param1 = get_new_flags(netdev); 1973 nctrl.ncmd.s.param2 = mc_count; 1974 nctrl.ncmd.s.more = mc_count; 1975 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 1976 nctrl.netpndev = (u64)netdev; 1977 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 1978 1979 /* copy all the addresses into the udd */ 1980 mc = &nctrl.udd[0]; 1981 netdev_for_each_mc_addr(ha, netdev) { 1982 *mc = 0; 1983 memcpy(((u8 *)mc) + 2, ha->addr, ETH_ALEN); 1984 /* no need to swap bytes */ 1985 1986 if (++mc > &nctrl.udd[mc_count]) 1987 break; 1988 } 1989 1990 /* Apparently, any activity in this call from the kernel has to 1991 * be atomic. So we won't wait for response. 1992 */ 1993 1994 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 1995 if (ret) { 1996 dev_err(&oct->pci_dev->dev, "DEVFLAGS change failed in core (ret: 0x%x)\n", 1997 ret); 1998 } 1999 } 2000 2001 /** 2002 * \brief Net device set_mac_address 2003 * @param netdev network device 2004 */ 2005 static int liquidio_set_mac(struct net_device *netdev, void *p) 2006 { 2007 int ret = 0; 2008 struct lio *lio = GET_LIO(netdev); 2009 struct octeon_device *oct = lio->oct_dev; 2010 struct sockaddr *addr = (struct sockaddr *)p; 2011 struct octnic_ctrl_pkt nctrl; 2012 2013 if (!is_valid_ether_addr(addr->sa_data)) 2014 return -EADDRNOTAVAIL; 2015 2016 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2017 2018 nctrl.ncmd.u64 = 0; 2019 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2020 nctrl.ncmd.s.param1 = 0; 2021 nctrl.ncmd.s.more = 1; 2022 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2023 nctrl.netpndev = (u64)netdev; 2024 2025 nctrl.udd[0] = 0; 2026 /* The MAC Address is presented in network byte order. */ 2027 memcpy((u8 *)&nctrl.udd[0] + 2, addr->sa_data, ETH_ALEN); 2028 2029 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2030 if (ret < 0) { 2031 dev_err(&oct->pci_dev->dev, "MAC Address change failed\n"); 2032 return -ENOMEM; 2033 } 2034 2035 if (nctrl.sc_status) { 2036 dev_err(&oct->pci_dev->dev, 2037 "%s: MAC Address change failed. sc return=%x\n", 2038 __func__, nctrl.sc_status); 2039 return -EIO; 2040 } 2041 2042 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2043 memcpy(((u8 *)&lio->linfo.hw_addr) + 2, addr->sa_data, ETH_ALEN); 2044 2045 return 0; 2046 } 2047 2048 static void 2049 liquidio_get_stats64(struct net_device *netdev, 2050 struct rtnl_link_stats64 *lstats) 2051 { 2052 struct lio *lio = GET_LIO(netdev); 2053 struct octeon_device *oct; 2054 u64 pkts = 0, drop = 0, bytes = 0; 2055 struct oct_droq_stats *oq_stats; 2056 struct oct_iq_stats *iq_stats; 2057 int i, iq_no, oq_no; 2058 2059 oct = lio->oct_dev; 2060 2061 if (ifstate_check(lio, LIO_IFSTATE_RESETTING)) 2062 return; 2063 2064 for (i = 0; i < oct->num_iqs; i++) { 2065 iq_no = lio->linfo.txpciq[i].s.q_no; 2066 iq_stats = &oct->instr_queue[iq_no]->stats; 2067 pkts += iq_stats->tx_done; 2068 drop += iq_stats->tx_dropped; 2069 bytes += iq_stats->tx_tot_bytes; 2070 } 2071 2072 lstats->tx_packets = pkts; 2073 lstats->tx_bytes = bytes; 2074 lstats->tx_dropped = drop; 2075 2076 pkts = 0; 2077 drop = 0; 2078 bytes = 0; 2079 2080 for (i = 0; i < oct->num_oqs; i++) { 2081 oq_no = lio->linfo.rxpciq[i].s.q_no; 2082 oq_stats = &oct->droq[oq_no]->stats; 2083 pkts += oq_stats->rx_pkts_received; 2084 drop += (oq_stats->rx_dropped + 2085 oq_stats->dropped_nodispatch + 2086 oq_stats->dropped_toomany + 2087 oq_stats->dropped_nomem); 2088 bytes += oq_stats->rx_bytes_received; 2089 } 2090 2091 lstats->rx_bytes = bytes; 2092 lstats->rx_packets = pkts; 2093 lstats->rx_dropped = drop; 2094 2095 lstats->multicast = oct->link_stats.fromwire.fw_total_mcast; 2096 lstats->collisions = oct->link_stats.fromhost.total_collisions; 2097 2098 /* detailed rx_errors: */ 2099 lstats->rx_length_errors = oct->link_stats.fromwire.l2_err; 2100 /* recved pkt with crc error */ 2101 lstats->rx_crc_errors = oct->link_stats.fromwire.fcs_err; 2102 /* recv'd frame alignment error */ 2103 lstats->rx_frame_errors = oct->link_stats.fromwire.frame_err; 2104 /* recv'r fifo overrun */ 2105 lstats->rx_fifo_errors = oct->link_stats.fromwire.fifo_err; 2106 2107 lstats->rx_errors = lstats->rx_length_errors + lstats->rx_crc_errors + 2108 lstats->rx_frame_errors + lstats->rx_fifo_errors; 2109 2110 /* detailed tx_errors */ 2111 lstats->tx_aborted_errors = oct->link_stats.fromhost.fw_err_pko; 2112 lstats->tx_carrier_errors = oct->link_stats.fromhost.fw_err_link; 2113 lstats->tx_fifo_errors = oct->link_stats.fromhost.fifo_err; 2114 2115 lstats->tx_errors = lstats->tx_aborted_errors + 2116 lstats->tx_carrier_errors + 2117 lstats->tx_fifo_errors; 2118 } 2119 2120 /** 2121 * \brief Handler for SIOCSHWTSTAMP ioctl 2122 * @param netdev network device 2123 * @param ifr interface request 2124 * @param cmd command 2125 */ 2126 static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr) 2127 { 2128 struct hwtstamp_config conf; 2129 struct lio *lio = GET_LIO(netdev); 2130 2131 if (copy_from_user(&conf, ifr->ifr_data, sizeof(conf))) 2132 return -EFAULT; 2133 2134 if (conf.flags) 2135 return -EINVAL; 2136 2137 switch (conf.tx_type) { 2138 case HWTSTAMP_TX_ON: 2139 case HWTSTAMP_TX_OFF: 2140 break; 2141 default: 2142 return -ERANGE; 2143 } 2144 2145 switch (conf.rx_filter) { 2146 case HWTSTAMP_FILTER_NONE: 2147 break; 2148 case HWTSTAMP_FILTER_ALL: 2149 case HWTSTAMP_FILTER_SOME: 2150 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 2151 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 2152 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 2153 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 2154 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 2155 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 2156 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 2157 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 2158 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 2159 case HWTSTAMP_FILTER_PTP_V2_EVENT: 2160 case HWTSTAMP_FILTER_PTP_V2_SYNC: 2161 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 2162 case HWTSTAMP_FILTER_NTP_ALL: 2163 conf.rx_filter = HWTSTAMP_FILTER_ALL; 2164 break; 2165 default: 2166 return -ERANGE; 2167 } 2168 2169 if (conf.rx_filter == HWTSTAMP_FILTER_ALL) 2170 ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2171 2172 else 2173 ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED); 2174 2175 return copy_to_user(ifr->ifr_data, &conf, sizeof(conf)) ? -EFAULT : 0; 2176 } 2177 2178 /** 2179 * \brief ioctl handler 2180 * @param netdev network device 2181 * @param ifr interface request 2182 * @param cmd command 2183 */ 2184 static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 2185 { 2186 struct lio *lio = GET_LIO(netdev); 2187 2188 switch (cmd) { 2189 case SIOCSHWTSTAMP: 2190 if (lio->oct_dev->ptp_enable) 2191 return hwtstamp_ioctl(netdev, ifr); 2192 /* fall through */ 2193 default: 2194 return -EOPNOTSUPP; 2195 } 2196 } 2197 2198 /** 2199 * \brief handle a Tx timestamp response 2200 * @param status response status 2201 * @param buf pointer to skb 2202 */ 2203 static void handle_timestamp(struct octeon_device *oct, 2204 u32 status, 2205 void *buf) 2206 { 2207 struct octnet_buf_free_info *finfo; 2208 struct octeon_soft_command *sc; 2209 struct oct_timestamp_resp *resp; 2210 struct lio *lio; 2211 struct sk_buff *skb = (struct sk_buff *)buf; 2212 2213 finfo = (struct octnet_buf_free_info *)skb->cb; 2214 lio = finfo->lio; 2215 sc = finfo->sc; 2216 oct = lio->oct_dev; 2217 resp = (struct oct_timestamp_resp *)sc->virtrptr; 2218 2219 if (status != OCTEON_REQUEST_DONE) { 2220 dev_err(&oct->pci_dev->dev, "Tx timestamp instruction failed. Status: %llx\n", 2221 CVM_CAST64(status)); 2222 resp->timestamp = 0; 2223 } 2224 2225 octeon_swap_8B_data(&resp->timestamp, 1); 2226 2227 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) != 0)) { 2228 struct skb_shared_hwtstamps ts; 2229 u64 ns = resp->timestamp; 2230 2231 netif_info(lio, tx_done, lio->netdev, 2232 "Got resulting SKBTX_HW_TSTAMP skb=%p ns=%016llu\n", 2233 skb, (unsigned long long)ns); 2234 ts.hwtstamp = ns_to_ktime(ns + lio->ptp_adjust); 2235 skb_tstamp_tx(skb, &ts); 2236 } 2237 2238 octeon_free_soft_command(oct, sc); 2239 tx_buffer_free(skb); 2240 } 2241 2242 /* \brief Send a data packet that will be timestamped 2243 * @param oct octeon device 2244 * @param ndata pointer to network data 2245 * @param finfo pointer to private network data 2246 */ 2247 static inline int send_nic_timestamp_pkt(struct octeon_device *oct, 2248 struct octnic_data_pkt *ndata, 2249 struct octnet_buf_free_info *finfo, 2250 int xmit_more) 2251 { 2252 int retval; 2253 struct octeon_soft_command *sc; 2254 struct lio *lio; 2255 int ring_doorbell; 2256 u32 len; 2257 2258 lio = finfo->lio; 2259 2260 sc = octeon_alloc_soft_command_resp(oct, &ndata->cmd, 2261 sizeof(struct oct_timestamp_resp)); 2262 finfo->sc = sc; 2263 2264 if (!sc) { 2265 dev_err(&oct->pci_dev->dev, "No memory for timestamped data packet\n"); 2266 return IQ_SEND_FAILED; 2267 } 2268 2269 if (ndata->reqtype == REQTYPE_NORESP_NET) 2270 ndata->reqtype = REQTYPE_RESP_NET; 2271 else if (ndata->reqtype == REQTYPE_NORESP_NET_SG) 2272 ndata->reqtype = REQTYPE_RESP_NET_SG; 2273 2274 sc->callback = handle_timestamp; 2275 sc->callback_arg = finfo->skb; 2276 sc->iq_no = ndata->q_no; 2277 2278 if (OCTEON_CN23XX_PF(oct)) 2279 len = (u32)((struct octeon_instr_ih3 *) 2280 (&sc->cmd.cmd3.ih3))->dlengsz; 2281 else 2282 len = (u32)((struct octeon_instr_ih2 *) 2283 (&sc->cmd.cmd2.ih2))->dlengsz; 2284 2285 ring_doorbell = !xmit_more; 2286 2287 retval = octeon_send_command(oct, sc->iq_no, ring_doorbell, &sc->cmd, 2288 sc, len, ndata->reqtype); 2289 2290 if (retval == IQ_SEND_FAILED) { 2291 dev_err(&oct->pci_dev->dev, "timestamp data packet failed status: %x\n", 2292 retval); 2293 octeon_free_soft_command(oct, sc); 2294 } else { 2295 netif_info(lio, tx_queued, lio->netdev, "Queued timestamp packet\n"); 2296 } 2297 2298 return retval; 2299 } 2300 2301 /** \brief Transmit networks packets to the Octeon interface 2302 * @param skbuff skbuff struct to be passed to network layer. 2303 * @param netdev pointer to network device 2304 * @returns whether the packet was transmitted to the device okay or not 2305 * (NETDEV_TX_OK or NETDEV_TX_BUSY) 2306 */ 2307 static netdev_tx_t liquidio_xmit(struct sk_buff *skb, struct net_device *netdev) 2308 { 2309 struct lio *lio; 2310 struct octnet_buf_free_info *finfo; 2311 union octnic_cmd_setup cmdsetup; 2312 struct octnic_data_pkt ndata; 2313 struct octeon_device *oct; 2314 struct oct_iq_stats *stats; 2315 struct octeon_instr_irh *irh; 2316 union tx_info *tx_info; 2317 int status = 0; 2318 int q_idx = 0, iq_no = 0; 2319 int j, xmit_more = 0; 2320 u64 dptr = 0; 2321 u32 tag = 0; 2322 2323 lio = GET_LIO(netdev); 2324 oct = lio->oct_dev; 2325 2326 q_idx = skb_iq(oct, skb); 2327 tag = q_idx; 2328 iq_no = lio->linfo.txpciq[q_idx].s.q_no; 2329 2330 stats = &oct->instr_queue[iq_no]->stats; 2331 2332 /* Check for all conditions in which the current packet cannot be 2333 * transmitted. 2334 */ 2335 if (!(atomic_read(&lio->ifstate) & LIO_IFSTATE_RUNNING) || 2336 (!lio->linfo.link.s.link_up) || 2337 (skb->len <= 0)) { 2338 netif_info(lio, tx_err, lio->netdev, 2339 "Transmit failed link_status : %d\n", 2340 lio->linfo.link.s.link_up); 2341 goto lio_xmit_failed; 2342 } 2343 2344 /* Use space in skb->cb to store info used to unmap and 2345 * free the buffers. 2346 */ 2347 finfo = (struct octnet_buf_free_info *)skb->cb; 2348 finfo->lio = lio; 2349 finfo->skb = skb; 2350 finfo->sc = NULL; 2351 2352 /* Prepare the attributes for the data to be passed to OSI. */ 2353 memset(&ndata, 0, sizeof(struct octnic_data_pkt)); 2354 2355 ndata.buf = (void *)finfo; 2356 2357 ndata.q_no = iq_no; 2358 2359 if (octnet_iq_is_full(oct, ndata.q_no)) { 2360 /* defer sending if queue is full */ 2361 netif_info(lio, tx_err, lio->netdev, "Transmit failed iq:%d full\n", 2362 ndata.q_no); 2363 stats->tx_iq_busy++; 2364 return NETDEV_TX_BUSY; 2365 } 2366 2367 /* pr_info(" XMIT - valid Qs: %d, 1st Q no: %d, cpu: %d, q_no:%d\n", 2368 * lio->linfo.num_txpciq, lio->txq, cpu, ndata.q_no); 2369 */ 2370 2371 ndata.datasize = skb->len; 2372 2373 cmdsetup.u64 = 0; 2374 cmdsetup.s.iq_no = iq_no; 2375 2376 if (skb->ip_summed == CHECKSUM_PARTIAL) { 2377 if (skb->encapsulation) { 2378 cmdsetup.s.tnl_csum = 1; 2379 stats->tx_vxlan++; 2380 } else { 2381 cmdsetup.s.transport_csum = 1; 2382 } 2383 } 2384 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { 2385 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2386 cmdsetup.s.timestamp = 1; 2387 } 2388 2389 if (skb_shinfo(skb)->nr_frags == 0) { 2390 cmdsetup.s.u.datasize = skb->len; 2391 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2392 2393 /* Offload checksum calculation for TCP/UDP packets */ 2394 dptr = dma_map_single(&oct->pci_dev->dev, 2395 skb->data, 2396 skb->len, 2397 DMA_TO_DEVICE); 2398 if (dma_mapping_error(&oct->pci_dev->dev, dptr)) { 2399 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 1\n", 2400 __func__); 2401 stats->tx_dmamap_fail++; 2402 return NETDEV_TX_BUSY; 2403 } 2404 2405 if (OCTEON_CN23XX_PF(oct)) 2406 ndata.cmd.cmd3.dptr = dptr; 2407 else 2408 ndata.cmd.cmd2.dptr = dptr; 2409 finfo->dptr = dptr; 2410 ndata.reqtype = REQTYPE_NORESP_NET; 2411 2412 } else { 2413 int i, frags; 2414 skb_frag_t *frag; 2415 struct octnic_gather *g; 2416 2417 spin_lock(&lio->glist_lock[q_idx]); 2418 g = (struct octnic_gather *) 2419 lio_list_delete_head(&lio->glist[q_idx]); 2420 spin_unlock(&lio->glist_lock[q_idx]); 2421 2422 if (!g) { 2423 netif_info(lio, tx_err, lio->netdev, 2424 "Transmit scatter gather: glist null!\n"); 2425 goto lio_xmit_failed; 2426 } 2427 2428 cmdsetup.s.gather = 1; 2429 cmdsetup.s.u.gatherptrs = (skb_shinfo(skb)->nr_frags + 1); 2430 octnet_prepare_pci_cmd(oct, &ndata.cmd, &cmdsetup, tag); 2431 2432 memset(g->sg, 0, g->sg_size); 2433 2434 g->sg[0].ptr[0] = dma_map_single(&oct->pci_dev->dev, 2435 skb->data, 2436 (skb->len - skb->data_len), 2437 DMA_TO_DEVICE); 2438 if (dma_mapping_error(&oct->pci_dev->dev, g->sg[0].ptr[0])) { 2439 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 2\n", 2440 __func__); 2441 stats->tx_dmamap_fail++; 2442 return NETDEV_TX_BUSY; 2443 } 2444 add_sg_size(&g->sg[0], (skb->len - skb->data_len), 0); 2445 2446 frags = skb_shinfo(skb)->nr_frags; 2447 i = 1; 2448 while (frags--) { 2449 frag = &skb_shinfo(skb)->frags[i - 1]; 2450 2451 g->sg[(i >> 2)].ptr[(i & 3)] = 2452 skb_frag_dma_map(&oct->pci_dev->dev, 2453 frag, 0, skb_frag_size(frag), 2454 DMA_TO_DEVICE); 2455 2456 if (dma_mapping_error(&oct->pci_dev->dev, 2457 g->sg[i >> 2].ptr[i & 3])) { 2458 dma_unmap_single(&oct->pci_dev->dev, 2459 g->sg[0].ptr[0], 2460 skb->len - skb->data_len, 2461 DMA_TO_DEVICE); 2462 for (j = 1; j < i; j++) { 2463 frag = &skb_shinfo(skb)->frags[j - 1]; 2464 dma_unmap_page(&oct->pci_dev->dev, 2465 g->sg[j >> 2].ptr[j & 3], 2466 skb_frag_size(frag), 2467 DMA_TO_DEVICE); 2468 } 2469 dev_err(&oct->pci_dev->dev, "%s DMA mapping error 3\n", 2470 __func__); 2471 return NETDEV_TX_BUSY; 2472 } 2473 2474 add_sg_size(&g->sg[(i >> 2)], skb_frag_size(frag), 2475 (i & 3)); 2476 i++; 2477 } 2478 2479 dptr = g->sg_dma_ptr; 2480 2481 if (OCTEON_CN23XX_PF(oct)) 2482 ndata.cmd.cmd3.dptr = dptr; 2483 else 2484 ndata.cmd.cmd2.dptr = dptr; 2485 finfo->dptr = dptr; 2486 finfo->g = g; 2487 2488 ndata.reqtype = REQTYPE_NORESP_NET_SG; 2489 } 2490 2491 if (OCTEON_CN23XX_PF(oct)) { 2492 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd3.irh; 2493 tx_info = (union tx_info *)&ndata.cmd.cmd3.ossp[0]; 2494 } else { 2495 irh = (struct octeon_instr_irh *)&ndata.cmd.cmd2.irh; 2496 tx_info = (union tx_info *)&ndata.cmd.cmd2.ossp[0]; 2497 } 2498 2499 if (skb_shinfo(skb)->gso_size) { 2500 tx_info->s.gso_size = skb_shinfo(skb)->gso_size; 2501 tx_info->s.gso_segs = skb_shinfo(skb)->gso_segs; 2502 stats->tx_gso++; 2503 } 2504 2505 /* HW insert VLAN tag */ 2506 if (skb_vlan_tag_present(skb)) { 2507 irh->priority = skb_vlan_tag_get(skb) >> 13; 2508 irh->vlan = skb_vlan_tag_get(skb) & 0xfff; 2509 } 2510 2511 xmit_more = netdev_xmit_more(); 2512 2513 if (unlikely(cmdsetup.s.timestamp)) 2514 status = send_nic_timestamp_pkt(oct, &ndata, finfo, xmit_more); 2515 else 2516 status = octnet_send_nic_data_pkt(oct, &ndata, xmit_more); 2517 if (status == IQ_SEND_FAILED) 2518 goto lio_xmit_failed; 2519 2520 netif_info(lio, tx_queued, lio->netdev, "Transmit queued successfully\n"); 2521 2522 if (status == IQ_SEND_STOP) 2523 netif_stop_subqueue(netdev, q_idx); 2524 2525 netif_trans_update(netdev); 2526 2527 if (tx_info->s.gso_segs) 2528 stats->tx_done += tx_info->s.gso_segs; 2529 else 2530 stats->tx_done++; 2531 stats->tx_tot_bytes += ndata.datasize; 2532 2533 return NETDEV_TX_OK; 2534 2535 lio_xmit_failed: 2536 stats->tx_dropped++; 2537 netif_info(lio, tx_err, lio->netdev, "IQ%d Transmit dropped:%llu\n", 2538 iq_no, stats->tx_dropped); 2539 if (dptr) 2540 dma_unmap_single(&oct->pci_dev->dev, dptr, 2541 ndata.datasize, DMA_TO_DEVICE); 2542 2543 octeon_ring_doorbell_locked(oct, iq_no); 2544 2545 tx_buffer_free(skb); 2546 return NETDEV_TX_OK; 2547 } 2548 2549 /** \brief Network device Tx timeout 2550 * @param netdev pointer to network device 2551 */ 2552 static void liquidio_tx_timeout(struct net_device *netdev, unsigned int txqueue) 2553 { 2554 struct lio *lio; 2555 2556 lio = GET_LIO(netdev); 2557 2558 netif_info(lio, tx_err, lio->netdev, 2559 "Transmit timeout tx_dropped:%ld, waking up queues now!!\n", 2560 netdev->stats.tx_dropped); 2561 netif_trans_update(netdev); 2562 wake_txqs(netdev); 2563 } 2564 2565 static int liquidio_vlan_rx_add_vid(struct net_device *netdev, 2566 __be16 proto __attribute__((unused)), 2567 u16 vid) 2568 { 2569 struct lio *lio = GET_LIO(netdev); 2570 struct octeon_device *oct = lio->oct_dev; 2571 struct octnic_ctrl_pkt nctrl; 2572 int ret = 0; 2573 2574 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2575 2576 nctrl.ncmd.u64 = 0; 2577 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2578 nctrl.ncmd.s.param1 = vid; 2579 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2580 nctrl.netpndev = (u64)netdev; 2581 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2582 2583 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2584 if (ret) { 2585 dev_err(&oct->pci_dev->dev, "Add VLAN filter failed in core (ret: 0x%x)\n", 2586 ret); 2587 if (ret > 0) 2588 ret = -EIO; 2589 } 2590 2591 return ret; 2592 } 2593 2594 static int liquidio_vlan_rx_kill_vid(struct net_device *netdev, 2595 __be16 proto __attribute__((unused)), 2596 u16 vid) 2597 { 2598 struct lio *lio = GET_LIO(netdev); 2599 struct octeon_device *oct = lio->oct_dev; 2600 struct octnic_ctrl_pkt nctrl; 2601 int ret = 0; 2602 2603 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2604 2605 nctrl.ncmd.u64 = 0; 2606 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2607 nctrl.ncmd.s.param1 = vid; 2608 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2609 nctrl.netpndev = (u64)netdev; 2610 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2611 2612 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2613 if (ret) { 2614 dev_err(&oct->pci_dev->dev, "Del VLAN filter failed in core (ret: 0x%x)\n", 2615 ret); 2616 if (ret > 0) 2617 ret = -EIO; 2618 } 2619 return ret; 2620 } 2621 2622 /** Sending command to enable/disable RX checksum offload 2623 * @param netdev pointer to network device 2624 * @param command OCTNET_CMD_TNL_RX_CSUM_CTL 2625 * @param rx_cmd_bit OCTNET_CMD_RXCSUM_ENABLE/ 2626 * OCTNET_CMD_RXCSUM_DISABLE 2627 * @returns SUCCESS or FAILURE 2628 */ 2629 static int liquidio_set_rxcsum_command(struct net_device *netdev, int command, 2630 u8 rx_cmd) 2631 { 2632 struct lio *lio = GET_LIO(netdev); 2633 struct octeon_device *oct = lio->oct_dev; 2634 struct octnic_ctrl_pkt nctrl; 2635 int ret = 0; 2636 2637 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2638 2639 nctrl.ncmd.u64 = 0; 2640 nctrl.ncmd.s.cmd = command; 2641 nctrl.ncmd.s.param1 = rx_cmd; 2642 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2643 nctrl.netpndev = (u64)netdev; 2644 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2645 2646 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2647 if (ret) { 2648 dev_err(&oct->pci_dev->dev, 2649 "DEVFLAGS RXCSUM change failed in core(ret:0x%x)\n", 2650 ret); 2651 if (ret > 0) 2652 ret = -EIO; 2653 } 2654 return ret; 2655 } 2656 2657 /** Sending command to add/delete VxLAN UDP port to firmware 2658 * @param netdev pointer to network device 2659 * @param command OCTNET_CMD_VXLAN_PORT_CONFIG 2660 * @param vxlan_port VxLAN port to be added or deleted 2661 * @param vxlan_cmd_bit OCTNET_CMD_VXLAN_PORT_ADD, 2662 * OCTNET_CMD_VXLAN_PORT_DEL 2663 * @returns SUCCESS or FAILURE 2664 */ 2665 static int liquidio_vxlan_port_command(struct net_device *netdev, int command, 2666 u16 vxlan_port, u8 vxlan_cmd_bit) 2667 { 2668 struct lio *lio = GET_LIO(netdev); 2669 struct octeon_device *oct = lio->oct_dev; 2670 struct octnic_ctrl_pkt nctrl; 2671 int ret = 0; 2672 2673 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2674 2675 nctrl.ncmd.u64 = 0; 2676 nctrl.ncmd.s.cmd = command; 2677 nctrl.ncmd.s.more = vxlan_cmd_bit; 2678 nctrl.ncmd.s.param1 = vxlan_port; 2679 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2680 nctrl.netpndev = (u64)netdev; 2681 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2682 2683 ret = octnet_send_nic_ctrl_pkt(lio->oct_dev, &nctrl); 2684 if (ret) { 2685 dev_err(&oct->pci_dev->dev, 2686 "VxLAN port add/delete failed in core (ret:0x%x)\n", 2687 ret); 2688 if (ret > 0) 2689 ret = -EIO; 2690 } 2691 return ret; 2692 } 2693 2694 /** \brief Net device fix features 2695 * @param netdev pointer to network device 2696 * @param request features requested 2697 * @returns updated features list 2698 */ 2699 static netdev_features_t liquidio_fix_features(struct net_device *netdev, 2700 netdev_features_t request) 2701 { 2702 struct lio *lio = netdev_priv(netdev); 2703 2704 if ((request & NETIF_F_RXCSUM) && 2705 !(lio->dev_capability & NETIF_F_RXCSUM)) 2706 request &= ~NETIF_F_RXCSUM; 2707 2708 if ((request & NETIF_F_HW_CSUM) && 2709 !(lio->dev_capability & NETIF_F_HW_CSUM)) 2710 request &= ~NETIF_F_HW_CSUM; 2711 2712 if ((request & NETIF_F_TSO) && !(lio->dev_capability & NETIF_F_TSO)) 2713 request &= ~NETIF_F_TSO; 2714 2715 if ((request & NETIF_F_TSO6) && !(lio->dev_capability & NETIF_F_TSO6)) 2716 request &= ~NETIF_F_TSO6; 2717 2718 if ((request & NETIF_F_LRO) && !(lio->dev_capability & NETIF_F_LRO)) 2719 request &= ~NETIF_F_LRO; 2720 2721 /*Disable LRO if RXCSUM is off */ 2722 if (!(request & NETIF_F_RXCSUM) && (netdev->features & NETIF_F_LRO) && 2723 (lio->dev_capability & NETIF_F_LRO)) 2724 request &= ~NETIF_F_LRO; 2725 2726 if ((request & NETIF_F_HW_VLAN_CTAG_FILTER) && 2727 !(lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER)) 2728 request &= ~NETIF_F_HW_VLAN_CTAG_FILTER; 2729 2730 return request; 2731 } 2732 2733 /** \brief Net device set features 2734 * @param netdev pointer to network device 2735 * @param features features to enable/disable 2736 */ 2737 static int liquidio_set_features(struct net_device *netdev, 2738 netdev_features_t features) 2739 { 2740 struct lio *lio = netdev_priv(netdev); 2741 2742 if ((features & NETIF_F_LRO) && 2743 (lio->dev_capability & NETIF_F_LRO) && 2744 !(netdev->features & NETIF_F_LRO)) 2745 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 2746 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2747 else if (!(features & NETIF_F_LRO) && 2748 (lio->dev_capability & NETIF_F_LRO) && 2749 (netdev->features & NETIF_F_LRO)) 2750 liquidio_set_feature(netdev, OCTNET_CMD_LRO_DISABLE, 2751 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 2752 2753 /* Sending command to firmware to enable/disable RX checksum 2754 * offload settings using ethtool 2755 */ 2756 if (!(netdev->features & NETIF_F_RXCSUM) && 2757 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2758 (features & NETIF_F_RXCSUM)) 2759 liquidio_set_rxcsum_command(netdev, 2760 OCTNET_CMD_TNL_RX_CSUM_CTL, 2761 OCTNET_CMD_RXCSUM_ENABLE); 2762 else if ((netdev->features & NETIF_F_RXCSUM) && 2763 (lio->enc_dev_capability & NETIF_F_RXCSUM) && 2764 !(features & NETIF_F_RXCSUM)) 2765 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 2766 OCTNET_CMD_RXCSUM_DISABLE); 2767 2768 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2769 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2770 !(netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2771 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2772 OCTNET_CMD_VLAN_FILTER_ENABLE); 2773 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && 2774 (lio->dev_capability & NETIF_F_HW_VLAN_CTAG_FILTER) && 2775 (netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER)) 2776 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 2777 OCTNET_CMD_VLAN_FILTER_DISABLE); 2778 2779 return 0; 2780 } 2781 2782 static void liquidio_add_vxlan_port(struct net_device *netdev, 2783 struct udp_tunnel_info *ti) 2784 { 2785 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2786 return; 2787 2788 liquidio_vxlan_port_command(netdev, 2789 OCTNET_CMD_VXLAN_PORT_CONFIG, 2790 htons(ti->port), 2791 OCTNET_CMD_VXLAN_PORT_ADD); 2792 } 2793 2794 static void liquidio_del_vxlan_port(struct net_device *netdev, 2795 struct udp_tunnel_info *ti) 2796 { 2797 if (ti->type != UDP_TUNNEL_TYPE_VXLAN) 2798 return; 2799 2800 liquidio_vxlan_port_command(netdev, 2801 OCTNET_CMD_VXLAN_PORT_CONFIG, 2802 htons(ti->port), 2803 OCTNET_CMD_VXLAN_PORT_DEL); 2804 } 2805 2806 static int __liquidio_set_vf_mac(struct net_device *netdev, int vfidx, 2807 u8 *mac, bool is_admin_assigned) 2808 { 2809 struct lio *lio = GET_LIO(netdev); 2810 struct octeon_device *oct = lio->oct_dev; 2811 struct octnic_ctrl_pkt nctrl; 2812 int ret = 0; 2813 2814 if (!is_valid_ether_addr(mac)) 2815 return -EINVAL; 2816 2817 if (vfidx < 0 || vfidx >= oct->sriov_info.max_vfs) 2818 return -EINVAL; 2819 2820 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2821 2822 nctrl.ncmd.u64 = 0; 2823 nctrl.ncmd.s.cmd = OCTNET_CMD_CHANGE_MACADDR; 2824 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 2825 nctrl.ncmd.s.param1 = vfidx + 1; 2826 nctrl.ncmd.s.more = 1; 2827 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2828 nctrl.netpndev = (u64)netdev; 2829 if (is_admin_assigned) { 2830 nctrl.ncmd.s.param2 = true; 2831 nctrl.cb_fn = liquidio_link_ctrl_cmd_completion; 2832 } 2833 2834 nctrl.udd[0] = 0; 2835 /* The MAC Address is presented in network byte order. */ 2836 ether_addr_copy((u8 *)&nctrl.udd[0] + 2, mac); 2837 2838 oct->sriov_info.vf_macaddr[vfidx] = nctrl.udd[0]; 2839 2840 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2841 if (ret > 0) 2842 ret = -EIO; 2843 2844 return ret; 2845 } 2846 2847 static int liquidio_set_vf_mac(struct net_device *netdev, int vfidx, u8 *mac) 2848 { 2849 struct lio *lio = GET_LIO(netdev); 2850 struct octeon_device *oct = lio->oct_dev; 2851 int retval; 2852 2853 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2854 return -EINVAL; 2855 2856 retval = __liquidio_set_vf_mac(netdev, vfidx, mac, true); 2857 if (!retval) 2858 cn23xx_tell_vf_its_macaddr_changed(oct, vfidx, mac); 2859 2860 return retval; 2861 } 2862 2863 static int liquidio_set_vf_spoofchk(struct net_device *netdev, int vfidx, 2864 bool enable) 2865 { 2866 struct lio *lio = GET_LIO(netdev); 2867 struct octeon_device *oct = lio->oct_dev; 2868 struct octnic_ctrl_pkt nctrl; 2869 int retval; 2870 2871 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SPOOFCHK_CAP)) { 2872 netif_info(lio, drv, lio->netdev, 2873 "firmware does not support spoofchk\n"); 2874 return -EOPNOTSUPP; 2875 } 2876 2877 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 2878 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 2879 return -EINVAL; 2880 } 2881 2882 if (enable) { 2883 if (oct->sriov_info.vf_spoofchk[vfidx]) 2884 return 0; 2885 } else { 2886 /* Clear */ 2887 if (!oct->sriov_info.vf_spoofchk[vfidx]) 2888 return 0; 2889 } 2890 2891 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2892 nctrl.ncmd.s.cmdgroup = OCTNET_CMD_GROUP1; 2893 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_SPOOFCHK; 2894 nctrl.ncmd.s.param1 = 2895 vfidx + 1; /* vfidx is 0 based, 2896 * but vf_num (param1) is 1 based 2897 */ 2898 nctrl.ncmd.s.param2 = enable; 2899 nctrl.ncmd.s.more = 0; 2900 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2901 nctrl.cb_fn = NULL; 2902 2903 retval = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2904 2905 if (retval) { 2906 netif_info(lio, drv, lio->netdev, 2907 "Failed to set VF %d spoofchk %s\n", vfidx, 2908 enable ? "on" : "off"); 2909 return -1; 2910 } 2911 2912 oct->sriov_info.vf_spoofchk[vfidx] = enable; 2913 netif_info(lio, drv, lio->netdev, "VF %u spoofchk is %s\n", vfidx, 2914 enable ? "on" : "off"); 2915 2916 return 0; 2917 } 2918 2919 static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx, 2920 u16 vlan, u8 qos, __be16 vlan_proto) 2921 { 2922 struct lio *lio = GET_LIO(netdev); 2923 struct octeon_device *oct = lio->oct_dev; 2924 struct octnic_ctrl_pkt nctrl; 2925 u16 vlantci; 2926 int ret = 0; 2927 2928 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2929 return -EINVAL; 2930 2931 if (vlan_proto != htons(ETH_P_8021Q)) 2932 return -EPROTONOSUPPORT; 2933 2934 if (vlan >= VLAN_N_VID || qos > 7) 2935 return -EINVAL; 2936 2937 if (vlan) 2938 vlantci = vlan | (u16)qos << VLAN_PRIO_SHIFT; 2939 else 2940 vlantci = 0; 2941 2942 if (oct->sriov_info.vf_vlantci[vfidx] == vlantci) 2943 return 0; 2944 2945 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 2946 2947 if (vlan) 2948 nctrl.ncmd.s.cmd = OCTNET_CMD_ADD_VLAN_FILTER; 2949 else 2950 nctrl.ncmd.s.cmd = OCTNET_CMD_DEL_VLAN_FILTER; 2951 2952 nctrl.ncmd.s.param1 = vlantci; 2953 nctrl.ncmd.s.param2 = 2954 vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */ 2955 nctrl.ncmd.s.more = 0; 2956 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 2957 nctrl.cb_fn = NULL; 2958 2959 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 2960 if (ret) { 2961 if (ret > 0) 2962 ret = -EIO; 2963 return ret; 2964 } 2965 2966 oct->sriov_info.vf_vlantci[vfidx] = vlantci; 2967 2968 return ret; 2969 } 2970 2971 static int liquidio_get_vf_config(struct net_device *netdev, int vfidx, 2972 struct ifla_vf_info *ivi) 2973 { 2974 struct lio *lio = GET_LIO(netdev); 2975 struct octeon_device *oct = lio->oct_dev; 2976 u8 *macaddr; 2977 2978 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 2979 return -EINVAL; 2980 2981 memset(ivi, 0, sizeof(struct ifla_vf_info)); 2982 2983 ivi->vf = vfidx; 2984 macaddr = 2 + (u8 *)&oct->sriov_info.vf_macaddr[vfidx]; 2985 ether_addr_copy(&ivi->mac[0], macaddr); 2986 ivi->vlan = oct->sriov_info.vf_vlantci[vfidx] & VLAN_VID_MASK; 2987 ivi->qos = oct->sriov_info.vf_vlantci[vfidx] >> VLAN_PRIO_SHIFT; 2988 if (oct->sriov_info.trusted_vf.active && 2989 oct->sriov_info.trusted_vf.id == vfidx) 2990 ivi->trusted = true; 2991 else 2992 ivi->trusted = false; 2993 ivi->linkstate = oct->sriov_info.vf_linkstate[vfidx]; 2994 ivi->spoofchk = oct->sriov_info.vf_spoofchk[vfidx]; 2995 ivi->max_tx_rate = lio->linfo.link.s.speed; 2996 ivi->min_tx_rate = 0; 2997 2998 return 0; 2999 } 3000 3001 static int liquidio_send_vf_trust_cmd(struct lio *lio, int vfidx, bool trusted) 3002 { 3003 struct octeon_device *oct = lio->oct_dev; 3004 struct octeon_soft_command *sc; 3005 int retval; 3006 3007 sc = octeon_alloc_soft_command(oct, 0, 16, 0); 3008 if (!sc) 3009 return -ENOMEM; 3010 3011 sc->iq_no = lio->linfo.txpciq[0].s.q_no; 3012 3013 /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3014 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, 3015 OPCODE_NIC_SET_TRUSTED_VF, 0, vfidx + 1, 3016 trusted); 3017 3018 init_completion(&sc->complete); 3019 sc->sc_status = OCTEON_REQUEST_PENDING; 3020 3021 retval = octeon_send_soft_command(oct, sc); 3022 if (retval == IQ_SEND_FAILED) { 3023 octeon_free_soft_command(oct, sc); 3024 retval = -1; 3025 } else { 3026 /* Wait for response or timeout */ 3027 retval = wait_for_sc_completion_timeout(oct, sc, 0); 3028 if (retval) 3029 return (retval); 3030 3031 WRITE_ONCE(sc->caller_is_done, true); 3032 } 3033 3034 return retval; 3035 } 3036 3037 static int liquidio_set_vf_trust(struct net_device *netdev, int vfidx, 3038 bool setting) 3039 { 3040 struct lio *lio = GET_LIO(netdev); 3041 struct octeon_device *oct = lio->oct_dev; 3042 3043 if (strcmp(oct->fw_info.liquidio_firmware_version, "1.7.1") < 0) { 3044 /* trusted vf is not supported by firmware older than 1.7.1 */ 3045 return -EOPNOTSUPP; 3046 } 3047 3048 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) { 3049 netif_info(lio, drv, lio->netdev, "Invalid vfidx %d\n", vfidx); 3050 return -EINVAL; 3051 } 3052 3053 if (setting) { 3054 /* Set */ 3055 3056 if (oct->sriov_info.trusted_vf.active && 3057 oct->sriov_info.trusted_vf.id == vfidx) 3058 return 0; 3059 3060 if (oct->sriov_info.trusted_vf.active) { 3061 netif_info(lio, drv, lio->netdev, "More than one trusted VF is not allowed\n"); 3062 return -EPERM; 3063 } 3064 } else { 3065 /* Clear */ 3066 3067 if (!oct->sriov_info.trusted_vf.active) 3068 return 0; 3069 } 3070 3071 if (!liquidio_send_vf_trust_cmd(lio, vfidx, setting)) { 3072 if (setting) { 3073 oct->sriov_info.trusted_vf.id = vfidx; 3074 oct->sriov_info.trusted_vf.active = true; 3075 } else { 3076 oct->sriov_info.trusted_vf.active = false; 3077 } 3078 3079 netif_info(lio, drv, lio->netdev, "VF %u is %strusted\n", vfidx, 3080 setting ? "" : "not "); 3081 } else { 3082 netif_info(lio, drv, lio->netdev, "Failed to set VF trusted\n"); 3083 return -1; 3084 } 3085 3086 return 0; 3087 } 3088 3089 static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx, 3090 int linkstate) 3091 { 3092 struct lio *lio = GET_LIO(netdev); 3093 struct octeon_device *oct = lio->oct_dev; 3094 struct octnic_ctrl_pkt nctrl; 3095 int ret = 0; 3096 3097 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3098 return -EINVAL; 3099 3100 if (oct->sriov_info.vf_linkstate[vfidx] == linkstate) 3101 return 0; 3102 3103 memset(&nctrl, 0, sizeof(struct octnic_ctrl_pkt)); 3104 nctrl.ncmd.s.cmd = OCTNET_CMD_SET_VF_LINKSTATE; 3105 nctrl.ncmd.s.param1 = 3106 vfidx + 1; /* vfidx is 0 based, but vf_num (param1) is 1 based */ 3107 nctrl.ncmd.s.param2 = linkstate; 3108 nctrl.ncmd.s.more = 0; 3109 nctrl.iq_no = lio->linfo.txpciq[0].s.q_no; 3110 nctrl.cb_fn = NULL; 3111 3112 ret = octnet_send_nic_ctrl_pkt(oct, &nctrl); 3113 3114 if (!ret) 3115 oct->sriov_info.vf_linkstate[vfidx] = linkstate; 3116 else if (ret > 0) 3117 ret = -EIO; 3118 3119 return ret; 3120 } 3121 3122 static int 3123 liquidio_eswitch_mode_get(struct devlink *devlink, u16 *mode) 3124 { 3125 struct lio_devlink_priv *priv; 3126 struct octeon_device *oct; 3127 3128 priv = devlink_priv(devlink); 3129 oct = priv->oct; 3130 3131 *mode = oct->eswitch_mode; 3132 3133 return 0; 3134 } 3135 3136 static int 3137 liquidio_eswitch_mode_set(struct devlink *devlink, u16 mode, 3138 struct netlink_ext_ack *extack) 3139 { 3140 struct lio_devlink_priv *priv; 3141 struct octeon_device *oct; 3142 int ret = 0; 3143 3144 priv = devlink_priv(devlink); 3145 oct = priv->oct; 3146 3147 if (!(oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP)) 3148 return -EINVAL; 3149 3150 if (oct->eswitch_mode == mode) 3151 return 0; 3152 3153 switch (mode) { 3154 case DEVLINK_ESWITCH_MODE_SWITCHDEV: 3155 oct->eswitch_mode = mode; 3156 ret = lio_vf_rep_create(oct); 3157 break; 3158 3159 case DEVLINK_ESWITCH_MODE_LEGACY: 3160 lio_vf_rep_destroy(oct); 3161 oct->eswitch_mode = mode; 3162 break; 3163 3164 default: 3165 ret = -EINVAL; 3166 } 3167 3168 return ret; 3169 } 3170 3171 static const struct devlink_ops liquidio_devlink_ops = { 3172 .eswitch_mode_get = liquidio_eswitch_mode_get, 3173 .eswitch_mode_set = liquidio_eswitch_mode_set, 3174 }; 3175 3176 static int 3177 liquidio_get_port_parent_id(struct net_device *dev, 3178 struct netdev_phys_item_id *ppid) 3179 { 3180 struct lio *lio = GET_LIO(dev); 3181 struct octeon_device *oct = lio->oct_dev; 3182 3183 if (oct->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) 3184 return -EOPNOTSUPP; 3185 3186 ppid->id_len = ETH_ALEN; 3187 ether_addr_copy(ppid->id, (void *)&lio->linfo.hw_addr + 2); 3188 3189 return 0; 3190 } 3191 3192 static int liquidio_get_vf_stats(struct net_device *netdev, int vfidx, 3193 struct ifla_vf_stats *vf_stats) 3194 { 3195 struct lio *lio = GET_LIO(netdev); 3196 struct octeon_device *oct = lio->oct_dev; 3197 struct oct_vf_stats stats; 3198 int ret; 3199 3200 if (vfidx < 0 || vfidx >= oct->sriov_info.num_vfs_alloced) 3201 return -EINVAL; 3202 3203 memset(&stats, 0, sizeof(struct oct_vf_stats)); 3204 ret = cn23xx_get_vf_stats(oct, vfidx, &stats); 3205 if (!ret) { 3206 vf_stats->rx_packets = stats.rx_packets; 3207 vf_stats->tx_packets = stats.tx_packets; 3208 vf_stats->rx_bytes = stats.rx_bytes; 3209 vf_stats->tx_bytes = stats.tx_bytes; 3210 vf_stats->broadcast = stats.broadcast; 3211 vf_stats->multicast = stats.multicast; 3212 } 3213 3214 return ret; 3215 } 3216 3217 static const struct net_device_ops lionetdevops = { 3218 .ndo_open = liquidio_open, 3219 .ndo_stop = liquidio_stop, 3220 .ndo_start_xmit = liquidio_xmit, 3221 .ndo_get_stats64 = liquidio_get_stats64, 3222 .ndo_set_mac_address = liquidio_set_mac, 3223 .ndo_set_rx_mode = liquidio_set_mcast_list, 3224 .ndo_tx_timeout = liquidio_tx_timeout, 3225 3226 .ndo_vlan_rx_add_vid = liquidio_vlan_rx_add_vid, 3227 .ndo_vlan_rx_kill_vid = liquidio_vlan_rx_kill_vid, 3228 .ndo_change_mtu = liquidio_change_mtu, 3229 .ndo_do_ioctl = liquidio_ioctl, 3230 .ndo_fix_features = liquidio_fix_features, 3231 .ndo_set_features = liquidio_set_features, 3232 .ndo_udp_tunnel_add = liquidio_add_vxlan_port, 3233 .ndo_udp_tunnel_del = liquidio_del_vxlan_port, 3234 .ndo_set_vf_mac = liquidio_set_vf_mac, 3235 .ndo_set_vf_vlan = liquidio_set_vf_vlan, 3236 .ndo_get_vf_config = liquidio_get_vf_config, 3237 .ndo_set_vf_spoofchk = liquidio_set_vf_spoofchk, 3238 .ndo_set_vf_trust = liquidio_set_vf_trust, 3239 .ndo_set_vf_link_state = liquidio_set_vf_link_state, 3240 .ndo_get_vf_stats = liquidio_get_vf_stats, 3241 .ndo_get_port_parent_id = liquidio_get_port_parent_id, 3242 }; 3243 3244 /** \brief Entry point for the liquidio module 3245 */ 3246 static int __init liquidio_init(void) 3247 { 3248 int i; 3249 struct handshake *hs; 3250 3251 init_completion(&first_stage); 3252 3253 octeon_init_device_list(OCTEON_CONFIG_TYPE_DEFAULT); 3254 3255 if (liquidio_init_pci()) 3256 return -EINVAL; 3257 3258 wait_for_completion_timeout(&first_stage, msecs_to_jiffies(1000)); 3259 3260 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3261 hs = &handshake[i]; 3262 if (hs->pci_dev) { 3263 wait_for_completion(&hs->init); 3264 if (!hs->init_ok) { 3265 /* init handshake failed */ 3266 dev_err(&hs->pci_dev->dev, 3267 "Failed to init device\n"); 3268 liquidio_deinit_pci(); 3269 return -EIO; 3270 } 3271 } 3272 } 3273 3274 for (i = 0; i < MAX_OCTEON_DEVICES; i++) { 3275 hs = &handshake[i]; 3276 if (hs->pci_dev) { 3277 wait_for_completion_timeout(&hs->started, 3278 msecs_to_jiffies(30000)); 3279 if (!hs->started_ok) { 3280 /* starter handshake failed */ 3281 dev_err(&hs->pci_dev->dev, 3282 "Firmware failed to start\n"); 3283 liquidio_deinit_pci(); 3284 return -EIO; 3285 } 3286 } 3287 } 3288 3289 return 0; 3290 } 3291 3292 static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf) 3293 { 3294 struct octeon_device *oct = (struct octeon_device *)buf; 3295 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3296 int gmxport = 0; 3297 union oct_link_status *ls; 3298 int i; 3299 3300 if (recv_pkt->buffer_size[0] != (sizeof(*ls) + OCT_DROQ_INFO_SIZE)) { 3301 dev_err(&oct->pci_dev->dev, "Malformed NIC_INFO, len=%d, ifidx=%d\n", 3302 recv_pkt->buffer_size[0], 3303 recv_pkt->rh.r_nic_info.gmxport); 3304 goto nic_info_err; 3305 } 3306 3307 gmxport = recv_pkt->rh.r_nic_info.gmxport; 3308 ls = (union oct_link_status *)(get_rbd(recv_pkt->buffer_ptr[0]) + 3309 OCT_DROQ_INFO_SIZE); 3310 3311 octeon_swap_8B_data((u64 *)ls, (sizeof(union oct_link_status)) >> 3); 3312 for (i = 0; i < oct->ifcount; i++) { 3313 if (oct->props[i].gmxport == gmxport) { 3314 update_link_status(oct->props[i].netdev, ls); 3315 break; 3316 } 3317 } 3318 3319 nic_info_err: 3320 for (i = 0; i < recv_pkt->buffer_count; i++) 3321 recv_buffer_free(recv_pkt->buffer_ptr[i]); 3322 octeon_free_recv_info(recv_info); 3323 return 0; 3324 } 3325 3326 /** 3327 * \brief Setup network interfaces 3328 * @param octeon_dev octeon device 3329 * 3330 * Called during init time for each device. It assumes the NIC 3331 * is already up and running. The link information for each 3332 * interface is passed in link_info. 3333 */ 3334 static int setup_nic_devices(struct octeon_device *octeon_dev) 3335 { 3336 struct lio *lio = NULL; 3337 struct net_device *netdev; 3338 u8 mac[6], i, j, *fw_ver, *micro_ver; 3339 unsigned long micro; 3340 u32 cur_ver; 3341 struct octeon_soft_command *sc; 3342 struct liquidio_if_cfg_resp *resp; 3343 struct octdev_props *props; 3344 int retval, num_iqueues, num_oqueues; 3345 int max_num_queues = 0; 3346 union oct_nic_if_cfg if_cfg; 3347 unsigned int base_queue; 3348 unsigned int gmx_port_id; 3349 u32 resp_size, data_size; 3350 u32 ifidx_or_pfnum; 3351 struct lio_version *vdata; 3352 struct devlink *devlink; 3353 struct lio_devlink_priv *lio_devlink; 3354 3355 /* This is to handle link status changes */ 3356 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 3357 OPCODE_NIC_INFO, 3358 lio_nic_info, octeon_dev); 3359 3360 /* REQTYPE_RESP_NET and REQTYPE_SOFT_COMMAND do not have free functions. 3361 * They are handled directly. 3362 */ 3363 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET, 3364 free_netbuf); 3365 3366 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_NORESP_NET_SG, 3367 free_netsgbuf); 3368 3369 octeon_register_reqtype_free_fn(octeon_dev, REQTYPE_RESP_NET_SG, 3370 free_netsgbuf_with_resp); 3371 3372 for (i = 0; i < octeon_dev->ifcount; i++) { 3373 resp_size = sizeof(struct liquidio_if_cfg_resp); 3374 data_size = sizeof(struct lio_version); 3375 sc = (struct octeon_soft_command *) 3376 octeon_alloc_soft_command(octeon_dev, data_size, 3377 resp_size, 0); 3378 resp = (struct liquidio_if_cfg_resp *)sc->virtrptr; 3379 vdata = (struct lio_version *)sc->virtdptr; 3380 3381 *((u64 *)vdata) = 0; 3382 vdata->major = cpu_to_be16(LIQUIDIO_BASE_MAJOR_VERSION); 3383 vdata->minor = cpu_to_be16(LIQUIDIO_BASE_MINOR_VERSION); 3384 vdata->micro = cpu_to_be16(LIQUIDIO_BASE_MICRO_VERSION); 3385 3386 if (OCTEON_CN23XX_PF(octeon_dev)) { 3387 num_iqueues = octeon_dev->sriov_info.num_pf_rings; 3388 num_oqueues = octeon_dev->sriov_info.num_pf_rings; 3389 base_queue = octeon_dev->sriov_info.pf_srn; 3390 3391 gmx_port_id = octeon_dev->pf_num; 3392 ifidx_or_pfnum = octeon_dev->pf_num; 3393 } else { 3394 num_iqueues = CFG_GET_NUM_TXQS_NIC_IF( 3395 octeon_get_conf(octeon_dev), i); 3396 num_oqueues = CFG_GET_NUM_RXQS_NIC_IF( 3397 octeon_get_conf(octeon_dev), i); 3398 base_queue = CFG_GET_BASE_QUE_NIC_IF( 3399 octeon_get_conf(octeon_dev), i); 3400 gmx_port_id = CFG_GET_GMXID_NIC_IF( 3401 octeon_get_conf(octeon_dev), i); 3402 ifidx_or_pfnum = i; 3403 } 3404 3405 dev_dbg(&octeon_dev->pci_dev->dev, 3406 "requesting config for interface %d, iqs %d, oqs %d\n", 3407 ifidx_or_pfnum, num_iqueues, num_oqueues); 3408 3409 if_cfg.u64 = 0; 3410 if_cfg.s.num_iqueues = num_iqueues; 3411 if_cfg.s.num_oqueues = num_oqueues; 3412 if_cfg.s.base_queue = base_queue; 3413 if_cfg.s.gmx_port_id = gmx_port_id; 3414 3415 sc->iq_no = 0; 3416 3417 octeon_prepare_soft_command(octeon_dev, sc, OPCODE_NIC, 3418 OPCODE_NIC_IF_CFG, 0, 3419 if_cfg.u64, 0); 3420 3421 init_completion(&sc->complete); 3422 sc->sc_status = OCTEON_REQUEST_PENDING; 3423 3424 retval = octeon_send_soft_command(octeon_dev, sc); 3425 if (retval == IQ_SEND_FAILED) { 3426 dev_err(&octeon_dev->pci_dev->dev, 3427 "iq/oq config failed status: %x\n", 3428 retval); 3429 /* Soft instr is freed by driver in case of failure. */ 3430 octeon_free_soft_command(octeon_dev, sc); 3431 return(-EIO); 3432 } 3433 3434 /* Sleep on a wait queue till the cond flag indicates that the 3435 * response arrived or timed-out. 3436 */ 3437 retval = wait_for_sc_completion_timeout(octeon_dev, sc, 0); 3438 if (retval) 3439 return retval; 3440 3441 retval = resp->status; 3442 if (retval) { 3443 dev_err(&octeon_dev->pci_dev->dev, "iq/oq config failed\n"); 3444 WRITE_ONCE(sc->caller_is_done, true); 3445 goto setup_nic_dev_done; 3446 } 3447 snprintf(octeon_dev->fw_info.liquidio_firmware_version, 3448 32, "%s", 3449 resp->cfg_info.liquidio_firmware_version); 3450 3451 /* Verify f/w version (in case of 'auto' loading from flash) */ 3452 fw_ver = octeon_dev->fw_info.liquidio_firmware_version; 3453 if (memcmp(LIQUIDIO_BASE_VERSION, 3454 fw_ver, 3455 strlen(LIQUIDIO_BASE_VERSION))) { 3456 dev_err(&octeon_dev->pci_dev->dev, 3457 "Unmatched firmware version. Expected %s.x, got %s.\n", 3458 LIQUIDIO_BASE_VERSION, fw_ver); 3459 WRITE_ONCE(sc->caller_is_done, true); 3460 goto setup_nic_dev_done; 3461 } else if (atomic_read(octeon_dev->adapter_fw_state) == 3462 FW_IS_PRELOADED) { 3463 dev_info(&octeon_dev->pci_dev->dev, 3464 "Using auto-loaded firmware version %s.\n", 3465 fw_ver); 3466 } 3467 3468 /* extract micro version field; point past '<maj>.<min>.' */ 3469 micro_ver = fw_ver + strlen(LIQUIDIO_BASE_VERSION) + 1; 3470 if (kstrtoul(micro_ver, 10, µ) != 0) 3471 micro = 0; 3472 octeon_dev->fw_info.ver.maj = LIQUIDIO_BASE_MAJOR_VERSION; 3473 octeon_dev->fw_info.ver.min = LIQUIDIO_BASE_MINOR_VERSION; 3474 octeon_dev->fw_info.ver.rev = micro; 3475 3476 octeon_swap_8B_data((u64 *)(&resp->cfg_info), 3477 (sizeof(struct liquidio_if_cfg_info)) >> 3); 3478 3479 num_iqueues = hweight64(resp->cfg_info.iqmask); 3480 num_oqueues = hweight64(resp->cfg_info.oqmask); 3481 3482 if (!(num_iqueues) || !(num_oqueues)) { 3483 dev_err(&octeon_dev->pci_dev->dev, 3484 "Got bad iqueues (%016llx) or oqueues (%016llx) from firmware.\n", 3485 resp->cfg_info.iqmask, 3486 resp->cfg_info.oqmask); 3487 WRITE_ONCE(sc->caller_is_done, true); 3488 goto setup_nic_dev_done; 3489 } 3490 3491 if (OCTEON_CN6XXX(octeon_dev)) { 3492 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3493 cn6xxx)); 3494 } else if (OCTEON_CN23XX_PF(octeon_dev)) { 3495 max_num_queues = CFG_GET_IQ_MAX_Q(CHIP_CONF(octeon_dev, 3496 cn23xx_pf)); 3497 } 3498 3499 dev_dbg(&octeon_dev->pci_dev->dev, 3500 "interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d max_num_queues: %d\n", 3501 i, resp->cfg_info.iqmask, resp->cfg_info.oqmask, 3502 num_iqueues, num_oqueues, max_num_queues); 3503 netdev = alloc_etherdev_mq(LIO_SIZE, max_num_queues); 3504 3505 if (!netdev) { 3506 dev_err(&octeon_dev->pci_dev->dev, "Device allocation failed\n"); 3507 WRITE_ONCE(sc->caller_is_done, true); 3508 goto setup_nic_dev_done; 3509 } 3510 3511 SET_NETDEV_DEV(netdev, &octeon_dev->pci_dev->dev); 3512 3513 /* Associate the routines that will handle different 3514 * netdev tasks. 3515 */ 3516 netdev->netdev_ops = &lionetdevops; 3517 3518 retval = netif_set_real_num_rx_queues(netdev, num_oqueues); 3519 if (retval) { 3520 dev_err(&octeon_dev->pci_dev->dev, 3521 "setting real number rx failed\n"); 3522 WRITE_ONCE(sc->caller_is_done, true); 3523 goto setup_nic_dev_free; 3524 } 3525 3526 retval = netif_set_real_num_tx_queues(netdev, num_iqueues); 3527 if (retval) { 3528 dev_err(&octeon_dev->pci_dev->dev, 3529 "setting real number tx failed\n"); 3530 WRITE_ONCE(sc->caller_is_done, true); 3531 goto setup_nic_dev_free; 3532 } 3533 3534 lio = GET_LIO(netdev); 3535 3536 memset(lio, 0, sizeof(struct lio)); 3537 3538 lio->ifidx = ifidx_or_pfnum; 3539 3540 props = &octeon_dev->props[i]; 3541 props->gmxport = resp->cfg_info.linfo.gmxport; 3542 props->netdev = netdev; 3543 3544 lio->linfo.num_rxpciq = num_oqueues; 3545 lio->linfo.num_txpciq = num_iqueues; 3546 for (j = 0; j < num_oqueues; j++) { 3547 lio->linfo.rxpciq[j].u64 = 3548 resp->cfg_info.linfo.rxpciq[j].u64; 3549 } 3550 for (j = 0; j < num_iqueues; j++) { 3551 lio->linfo.txpciq[j].u64 = 3552 resp->cfg_info.linfo.txpciq[j].u64; 3553 } 3554 lio->linfo.hw_addr = resp->cfg_info.linfo.hw_addr; 3555 lio->linfo.gmxport = resp->cfg_info.linfo.gmxport; 3556 lio->linfo.link.u64 = resp->cfg_info.linfo.link.u64; 3557 3558 WRITE_ONCE(sc->caller_is_done, true); 3559 3560 lio->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE); 3561 3562 if (OCTEON_CN23XX_PF(octeon_dev) || 3563 OCTEON_CN6XXX(octeon_dev)) { 3564 lio->dev_capability = NETIF_F_HIGHDMA 3565 | NETIF_F_IP_CSUM 3566 | NETIF_F_IPV6_CSUM 3567 | NETIF_F_SG | NETIF_F_RXCSUM 3568 | NETIF_F_GRO 3569 | NETIF_F_TSO | NETIF_F_TSO6 3570 | NETIF_F_LRO; 3571 } 3572 netif_set_gso_max_size(netdev, OCTNIC_GSO_MAX_SIZE); 3573 3574 /* Copy of transmit encapsulation capabilities: 3575 * TSO, TSO6, Checksums for this device 3576 */ 3577 lio->enc_dev_capability = NETIF_F_IP_CSUM 3578 | NETIF_F_IPV6_CSUM 3579 | NETIF_F_GSO_UDP_TUNNEL 3580 | NETIF_F_HW_CSUM | NETIF_F_SG 3581 | NETIF_F_RXCSUM 3582 | NETIF_F_TSO | NETIF_F_TSO6 3583 | NETIF_F_LRO; 3584 3585 netdev->hw_enc_features = (lio->enc_dev_capability & 3586 ~NETIF_F_LRO); 3587 3588 lio->dev_capability |= NETIF_F_GSO_UDP_TUNNEL; 3589 3590 netdev->vlan_features = lio->dev_capability; 3591 /* Add any unchangeable hw features */ 3592 lio->dev_capability |= NETIF_F_HW_VLAN_CTAG_FILTER | 3593 NETIF_F_HW_VLAN_CTAG_RX | 3594 NETIF_F_HW_VLAN_CTAG_TX; 3595 3596 netdev->features = (lio->dev_capability & ~NETIF_F_LRO); 3597 3598 netdev->hw_features = lio->dev_capability; 3599 /*HW_VLAN_RX and HW_VLAN_FILTER is always on*/ 3600 netdev->hw_features = netdev->hw_features & 3601 ~NETIF_F_HW_VLAN_CTAG_RX; 3602 3603 /* MTU range: 68 - 16000 */ 3604 netdev->min_mtu = LIO_MIN_MTU_SIZE; 3605 netdev->max_mtu = LIO_MAX_MTU_SIZE; 3606 3607 /* Point to the properties for octeon device to which this 3608 * interface belongs. 3609 */ 3610 lio->oct_dev = octeon_dev; 3611 lio->octprops = props; 3612 lio->netdev = netdev; 3613 3614 dev_dbg(&octeon_dev->pci_dev->dev, 3615 "if%d gmx: %d hw_addr: 0x%llx\n", i, 3616 lio->linfo.gmxport, CVM_CAST64(lio->linfo.hw_addr)); 3617 3618 for (j = 0; j < octeon_dev->sriov_info.max_vfs; j++) { 3619 u8 vfmac[ETH_ALEN]; 3620 3621 eth_random_addr(vfmac); 3622 if (__liquidio_set_vf_mac(netdev, j, vfmac, false)) { 3623 dev_err(&octeon_dev->pci_dev->dev, 3624 "Error setting VF%d MAC address\n", 3625 j); 3626 goto setup_nic_dev_free; 3627 } 3628 } 3629 3630 /* 64-bit swap required on LE machines */ 3631 octeon_swap_8B_data(&lio->linfo.hw_addr, 1); 3632 for (j = 0; j < 6; j++) 3633 mac[j] = *((u8 *)(((u8 *)&lio->linfo.hw_addr) + 2 + j)); 3634 3635 /* Copy MAC Address to OS network device structure */ 3636 3637 ether_addr_copy(netdev->dev_addr, mac); 3638 3639 /* By default all interfaces on a single Octeon uses the same 3640 * tx and rx queues 3641 */ 3642 lio->txq = lio->linfo.txpciq[0].s.q_no; 3643 lio->rxq = lio->linfo.rxpciq[0].s.q_no; 3644 if (liquidio_setup_io_queues(octeon_dev, i, 3645 lio->linfo.num_txpciq, 3646 lio->linfo.num_rxpciq)) { 3647 dev_err(&octeon_dev->pci_dev->dev, "I/O queues creation failed\n"); 3648 goto setup_nic_dev_free; 3649 } 3650 3651 ifstate_set(lio, LIO_IFSTATE_DROQ_OPS); 3652 3653 lio->tx_qsize = octeon_get_tx_qsize(octeon_dev, lio->txq); 3654 lio->rx_qsize = octeon_get_rx_qsize(octeon_dev, lio->rxq); 3655 3656 if (lio_setup_glists(octeon_dev, lio, num_iqueues)) { 3657 dev_err(&octeon_dev->pci_dev->dev, 3658 "Gather list allocation failed\n"); 3659 goto setup_nic_dev_free; 3660 } 3661 3662 /* Register ethtool support */ 3663 liquidio_set_ethtool_ops(netdev); 3664 if (lio->oct_dev->chip_id == OCTEON_CN23XX_PF_VID) 3665 octeon_dev->priv_flags = OCT_PRIV_FLAG_DEFAULT; 3666 else 3667 octeon_dev->priv_flags = 0x0; 3668 3669 if (netdev->features & NETIF_F_LRO) 3670 liquidio_set_feature(netdev, OCTNET_CMD_LRO_ENABLE, 3671 OCTNIC_LROIPV4 | OCTNIC_LROIPV6); 3672 3673 liquidio_set_feature(netdev, OCTNET_CMD_VLAN_FILTER_CTL, 3674 OCTNET_CMD_VLAN_FILTER_ENABLE); 3675 3676 if ((debug != -1) && (debug & NETIF_MSG_HW)) 3677 liquidio_set_feature(netdev, 3678 OCTNET_CMD_VERBOSE_ENABLE, 0); 3679 3680 if (setup_link_status_change_wq(netdev)) 3681 goto setup_nic_dev_free; 3682 3683 if ((octeon_dev->fw_info.app_cap_flags & 3684 LIQUIDIO_TIME_SYNC_CAP) && 3685 setup_sync_octeon_time_wq(netdev)) 3686 goto setup_nic_dev_free; 3687 3688 if (setup_rx_oom_poll_fn(netdev)) 3689 goto setup_nic_dev_free; 3690 3691 /* Register the network device with the OS */ 3692 if (register_netdev(netdev)) { 3693 dev_err(&octeon_dev->pci_dev->dev, "Device registration failed\n"); 3694 goto setup_nic_dev_free; 3695 } 3696 3697 dev_dbg(&octeon_dev->pci_dev->dev, 3698 "Setup NIC ifidx:%d mac:%02x%02x%02x%02x%02x%02x\n", 3699 i, mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); 3700 netif_carrier_off(netdev); 3701 lio->link_changes++; 3702 3703 ifstate_set(lio, LIO_IFSTATE_REGISTERED); 3704 3705 /* Sending command to firmware to enable Rx checksum offload 3706 * by default at the time of setup of Liquidio driver for 3707 * this device 3708 */ 3709 liquidio_set_rxcsum_command(netdev, OCTNET_CMD_TNL_RX_CSUM_CTL, 3710 OCTNET_CMD_RXCSUM_ENABLE); 3711 liquidio_set_feature(netdev, OCTNET_CMD_TNL_TX_CSUM_CTL, 3712 OCTNET_CMD_TXCSUM_ENABLE); 3713 3714 dev_dbg(&octeon_dev->pci_dev->dev, 3715 "NIC ifidx:%d Setup successful\n", i); 3716 3717 if (octeon_dev->subsystem_id == 3718 OCTEON_CN2350_25GB_SUBSYS_ID || 3719 octeon_dev->subsystem_id == 3720 OCTEON_CN2360_25GB_SUBSYS_ID) { 3721 cur_ver = OCT_FW_VER(octeon_dev->fw_info.ver.maj, 3722 octeon_dev->fw_info.ver.min, 3723 octeon_dev->fw_info.ver.rev); 3724 3725 /* speed control unsupported in f/w older than 1.7.2 */ 3726 if (cur_ver < OCT_FW_VER(1, 7, 2)) { 3727 dev_info(&octeon_dev->pci_dev->dev, 3728 "speed setting not supported by f/w."); 3729 octeon_dev->speed_setting = 25; 3730 octeon_dev->no_speed_setting = 1; 3731 } else { 3732 liquidio_get_speed(lio); 3733 } 3734 3735 if (octeon_dev->speed_setting == 0) { 3736 octeon_dev->speed_setting = 25; 3737 octeon_dev->no_speed_setting = 1; 3738 } 3739 } else { 3740 octeon_dev->no_speed_setting = 1; 3741 octeon_dev->speed_setting = 10; 3742 } 3743 octeon_dev->speed_boot = octeon_dev->speed_setting; 3744 3745 /* don't read FEC setting if unsupported by f/w (see above) */ 3746 if (octeon_dev->speed_boot == 25 && 3747 !octeon_dev->no_speed_setting) { 3748 liquidio_get_fec(lio); 3749 octeon_dev->props[lio->ifidx].fec_boot = 3750 octeon_dev->props[lio->ifidx].fec; 3751 } 3752 } 3753 3754 devlink = devlink_alloc(&liquidio_devlink_ops, 3755 sizeof(struct lio_devlink_priv)); 3756 if (!devlink) { 3757 dev_err(&octeon_dev->pci_dev->dev, "devlink alloc failed\n"); 3758 goto setup_nic_dev_free; 3759 } 3760 3761 lio_devlink = devlink_priv(devlink); 3762 lio_devlink->oct = octeon_dev; 3763 3764 if (devlink_register(devlink, &octeon_dev->pci_dev->dev)) { 3765 devlink_free(devlink); 3766 dev_err(&octeon_dev->pci_dev->dev, 3767 "devlink registration failed\n"); 3768 goto setup_nic_dev_free; 3769 } 3770 3771 octeon_dev->devlink = devlink; 3772 octeon_dev->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY; 3773 3774 return 0; 3775 3776 setup_nic_dev_free: 3777 3778 while (i--) { 3779 dev_err(&octeon_dev->pci_dev->dev, 3780 "NIC ifidx:%d Setup failed\n", i); 3781 liquidio_destroy_nic_device(octeon_dev, i); 3782 } 3783 3784 setup_nic_dev_done: 3785 3786 return -ENODEV; 3787 } 3788 3789 #ifdef CONFIG_PCI_IOV 3790 static int octeon_enable_sriov(struct octeon_device *oct) 3791 { 3792 unsigned int num_vfs_alloced = oct->sriov_info.num_vfs_alloced; 3793 struct pci_dev *vfdev; 3794 int err; 3795 u32 u; 3796 3797 if (OCTEON_CN23XX_PF(oct) && num_vfs_alloced) { 3798 err = pci_enable_sriov(oct->pci_dev, 3799 oct->sriov_info.num_vfs_alloced); 3800 if (err) { 3801 dev_err(&oct->pci_dev->dev, 3802 "OCTEON: Failed to enable PCI sriov: %d\n", 3803 err); 3804 oct->sriov_info.num_vfs_alloced = 0; 3805 return err; 3806 } 3807 oct->sriov_info.sriov_enabled = 1; 3808 3809 /* init lookup table that maps DPI ring number to VF pci_dev 3810 * struct pointer 3811 */ 3812 u = 0; 3813 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3814 OCTEON_CN23XX_VF_VID, NULL); 3815 while (vfdev) { 3816 if (vfdev->is_virtfn && 3817 (vfdev->physfn == oct->pci_dev)) { 3818 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = 3819 vfdev; 3820 u += oct->sriov_info.rings_per_vf; 3821 } 3822 vfdev = pci_get_device(PCI_VENDOR_ID_CAVIUM, 3823 OCTEON_CN23XX_VF_VID, vfdev); 3824 } 3825 } 3826 3827 return num_vfs_alloced; 3828 } 3829 3830 static int lio_pci_sriov_disable(struct octeon_device *oct) 3831 { 3832 int u; 3833 3834 if (pci_vfs_assigned(oct->pci_dev)) { 3835 dev_err(&oct->pci_dev->dev, "VFs are still assigned to VMs.\n"); 3836 return -EPERM; 3837 } 3838 3839 pci_disable_sriov(oct->pci_dev); 3840 3841 u = 0; 3842 while (u < MAX_POSSIBLE_VFS) { 3843 oct->sriov_info.dpiring_to_vfpcidev_lut[u] = NULL; 3844 u += oct->sriov_info.rings_per_vf; 3845 } 3846 3847 oct->sriov_info.num_vfs_alloced = 0; 3848 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d disabled VFs\n", 3849 oct->pf_num); 3850 3851 return 0; 3852 } 3853 3854 static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs) 3855 { 3856 struct octeon_device *oct = pci_get_drvdata(dev); 3857 int ret = 0; 3858 3859 if ((num_vfs == oct->sriov_info.num_vfs_alloced) && 3860 (oct->sriov_info.sriov_enabled)) { 3861 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d already enabled num_vfs:%d\n", 3862 oct->pf_num, num_vfs); 3863 return 0; 3864 } 3865 3866 if (!num_vfs) { 3867 lio_vf_rep_destroy(oct); 3868 ret = lio_pci_sriov_disable(oct); 3869 } else if (num_vfs > oct->sriov_info.max_vfs) { 3870 dev_err(&oct->pci_dev->dev, 3871 "OCTEON: Max allowed VFs:%d user requested:%d", 3872 oct->sriov_info.max_vfs, num_vfs); 3873 ret = -EPERM; 3874 } else { 3875 oct->sriov_info.num_vfs_alloced = num_vfs; 3876 ret = octeon_enable_sriov(oct); 3877 dev_info(&oct->pci_dev->dev, "oct->pf_num:%d num_vfs:%d\n", 3878 oct->pf_num, num_vfs); 3879 ret = lio_vf_rep_create(oct); 3880 if (ret) 3881 dev_info(&oct->pci_dev->dev, 3882 "vf representor create failed"); 3883 } 3884 3885 return ret; 3886 } 3887 #endif 3888 3889 /** 3890 * \brief initialize the NIC 3891 * @param oct octeon device 3892 * 3893 * This initialization routine is called once the Octeon device application is 3894 * up and running 3895 */ 3896 static int liquidio_init_nic_module(struct octeon_device *oct) 3897 { 3898 int i, retval = 0; 3899 int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct)); 3900 3901 dev_dbg(&oct->pci_dev->dev, "Initializing network interfaces\n"); 3902 3903 /* only default iq and oq were initialized 3904 * initialize the rest as well 3905 */ 3906 /* run port_config command for each port */ 3907 oct->ifcount = num_nic_ports; 3908 3909 memset(oct->props, 0, sizeof(struct octdev_props) * num_nic_ports); 3910 3911 for (i = 0; i < MAX_OCTEON_LINKS; i++) 3912 oct->props[i].gmxport = -1; 3913 3914 retval = setup_nic_devices(oct); 3915 if (retval) { 3916 dev_err(&oct->pci_dev->dev, "Setup NIC devices failed\n"); 3917 goto octnet_init_failure; 3918 } 3919 3920 /* Call vf_rep_modinit if the firmware is switchdev capable 3921 * and do it from the first liquidio function probed. 3922 */ 3923 if (!oct->octeon_id && 3924 oct->fw_info.app_cap_flags & LIQUIDIO_SWITCHDEV_CAP) { 3925 retval = lio_vf_rep_modinit(); 3926 if (retval) { 3927 liquidio_stop_nic_module(oct); 3928 goto octnet_init_failure; 3929 } 3930 } 3931 3932 liquidio_ptp_init(oct); 3933 3934 dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n"); 3935 3936 return retval; 3937 3938 octnet_init_failure: 3939 3940 oct->ifcount = 0; 3941 3942 return retval; 3943 } 3944 3945 /** 3946 * \brief starter callback that invokes the remaining initialization work after 3947 * the NIC is up and running. 3948 * @param octptr work struct work_struct 3949 */ 3950 static void nic_starter(struct work_struct *work) 3951 { 3952 struct octeon_device *oct; 3953 struct cavium_wk *wk = (struct cavium_wk *)work; 3954 3955 oct = (struct octeon_device *)wk->ctxptr; 3956 3957 if (atomic_read(&oct->status) == OCT_DEV_RUNNING) 3958 return; 3959 3960 /* If the status of the device is CORE_OK, the core 3961 * application has reported its application type. Call 3962 * any registered handlers now and move to the RUNNING 3963 * state. 3964 */ 3965 if (atomic_read(&oct->status) != OCT_DEV_CORE_OK) { 3966 schedule_delayed_work(&oct->nic_poll_work.work, 3967 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 3968 return; 3969 } 3970 3971 atomic_set(&oct->status, OCT_DEV_RUNNING); 3972 3973 if (oct->app_mode && oct->app_mode == CVM_DRV_NIC_APP) { 3974 dev_dbg(&oct->pci_dev->dev, "Starting NIC module\n"); 3975 3976 if (liquidio_init_nic_module(oct)) 3977 dev_err(&oct->pci_dev->dev, "NIC initialization failed\n"); 3978 else 3979 handshake[oct->octeon_id].started_ok = 1; 3980 } else { 3981 dev_err(&oct->pci_dev->dev, 3982 "Unexpected application running on NIC (%d). Check firmware.\n", 3983 oct->app_mode); 3984 } 3985 3986 complete(&handshake[oct->octeon_id].started); 3987 } 3988 3989 static int 3990 octeon_recv_vf_drv_notice(struct octeon_recv_info *recv_info, void *buf) 3991 { 3992 struct octeon_device *oct = (struct octeon_device *)buf; 3993 struct octeon_recv_pkt *recv_pkt = recv_info->recv_pkt; 3994 int i, notice, vf_idx; 3995 bool cores_crashed; 3996 u64 *data, vf_num; 3997 3998 notice = recv_pkt->rh.r.ossp; 3999 data = (u64 *)(get_rbd(recv_pkt->buffer_ptr[0]) + OCT_DROQ_INFO_SIZE); 4000 4001 /* the first 64-bit word of data is the vf_num */ 4002 vf_num = data[0]; 4003 octeon_swap_8B_data(&vf_num, 1); 4004 vf_idx = (int)vf_num - 1; 4005 4006 cores_crashed = READ_ONCE(oct->cores_crashed); 4007 4008 if (notice == VF_DRV_LOADED) { 4009 if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) { 4010 oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx); 4011 dev_info(&oct->pci_dev->dev, 4012 "driver for VF%d was loaded\n", vf_idx); 4013 if (!cores_crashed) 4014 try_module_get(THIS_MODULE); 4015 } 4016 } else if (notice == VF_DRV_REMOVED) { 4017 if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) { 4018 oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx); 4019 dev_info(&oct->pci_dev->dev, 4020 "driver for VF%d was removed\n", vf_idx); 4021 if (!cores_crashed) 4022 module_put(THIS_MODULE); 4023 } 4024 } else if (notice == VF_DRV_MACADDR_CHANGED) { 4025 u8 *b = (u8 *)&data[1]; 4026 4027 oct->sriov_info.vf_macaddr[vf_idx] = data[1]; 4028 dev_info(&oct->pci_dev->dev, 4029 "VF driver changed VF%d's MAC address to %pM\n", 4030 vf_idx, b + 2); 4031 } 4032 4033 for (i = 0; i < recv_pkt->buffer_count; i++) 4034 recv_buffer_free(recv_pkt->buffer_ptr[i]); 4035 octeon_free_recv_info(recv_info); 4036 4037 return 0; 4038 } 4039 4040 /** 4041 * \brief Device initialization for each Octeon device that is probed 4042 * @param octeon_dev octeon device 4043 */ 4044 static int octeon_device_init(struct octeon_device *octeon_dev) 4045 { 4046 int j, ret; 4047 char bootcmd[] = "\n"; 4048 char *dbg_enb = NULL; 4049 enum lio_fw_state fw_state; 4050 struct octeon_device_priv *oct_priv = 4051 (struct octeon_device_priv *)octeon_dev->priv; 4052 atomic_set(&octeon_dev->status, OCT_DEV_BEGIN_STATE); 4053 4054 /* Enable access to the octeon device and make its DMA capability 4055 * known to the OS. 4056 */ 4057 if (octeon_pci_os_setup(octeon_dev)) 4058 return 1; 4059 4060 atomic_set(&octeon_dev->status, OCT_DEV_PCI_ENABLE_DONE); 4061 4062 /* Identify the Octeon type and map the BAR address space. */ 4063 if (octeon_chip_specific_setup(octeon_dev)) { 4064 dev_err(&octeon_dev->pci_dev->dev, "Chip specific setup failed\n"); 4065 return 1; 4066 } 4067 4068 atomic_set(&octeon_dev->status, OCT_DEV_PCI_MAP_DONE); 4069 4070 /* Only add a reference after setting status 'OCT_DEV_PCI_MAP_DONE', 4071 * since that is what is required for the reference to be removed 4072 * during de-initialization (see 'octeon_destroy_resources'). 4073 */ 4074 octeon_register_device(octeon_dev, octeon_dev->pci_dev->bus->number, 4075 PCI_SLOT(octeon_dev->pci_dev->devfn), 4076 PCI_FUNC(octeon_dev->pci_dev->devfn), 4077 true); 4078 4079 octeon_dev->app_mode = CVM_DRV_INVALID_APP; 4080 4081 /* CN23XX supports preloaded firmware if the following is true: 4082 * 4083 * The adapter indicates that firmware is currently running AND 4084 * 'fw_type' is 'auto'. 4085 * 4086 * (default state is NEEDS_TO_BE_LOADED, override it if appropriate). 4087 */ 4088 if (OCTEON_CN23XX_PF(octeon_dev) && 4089 cn23xx_fw_loaded(octeon_dev) && fw_type_is_auto()) { 4090 atomic_cmpxchg(octeon_dev->adapter_fw_state, 4091 FW_NEEDS_TO_BE_LOADED, FW_IS_PRELOADED); 4092 } 4093 4094 /* If loading firmware, only first device of adapter needs to do so. */ 4095 fw_state = atomic_cmpxchg(octeon_dev->adapter_fw_state, 4096 FW_NEEDS_TO_BE_LOADED, 4097 FW_IS_BEING_LOADED); 4098 4099 /* Here, [local variable] 'fw_state' is set to one of: 4100 * 4101 * FW_IS_PRELOADED: No firmware is to be loaded (see above) 4102 * FW_NEEDS_TO_BE_LOADED: The driver's first instance will load 4103 * firmware to the adapter. 4104 * FW_IS_BEING_LOADED: The driver's second instance will not load 4105 * firmware to the adapter. 4106 */ 4107 4108 /* Prior to f/w load, perform a soft reset of the Octeon device; 4109 * if error resetting, return w/error. 4110 */ 4111 if (fw_state == FW_NEEDS_TO_BE_LOADED) 4112 if (octeon_dev->fn_list.soft_reset(octeon_dev)) 4113 return 1; 4114 4115 /* Initialize the dispatch mechanism used to push packets arriving on 4116 * Octeon Output queues. 4117 */ 4118 if (octeon_init_dispatch_list(octeon_dev)) 4119 return 1; 4120 4121 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4122 OPCODE_NIC_CORE_DRV_ACTIVE, 4123 octeon_core_drv_init, 4124 octeon_dev); 4125 4126 octeon_register_dispatch_fn(octeon_dev, OPCODE_NIC, 4127 OPCODE_NIC_VF_DRV_NOTICE, 4128 octeon_recv_vf_drv_notice, octeon_dev); 4129 INIT_DELAYED_WORK(&octeon_dev->nic_poll_work.work, nic_starter); 4130 octeon_dev->nic_poll_work.ctxptr = (void *)octeon_dev; 4131 schedule_delayed_work(&octeon_dev->nic_poll_work.work, 4132 LIQUIDIO_STARTER_POLL_INTERVAL_MS); 4133 4134 atomic_set(&octeon_dev->status, OCT_DEV_DISPATCH_INIT_DONE); 4135 4136 if (octeon_set_io_queues_off(octeon_dev)) { 4137 dev_err(&octeon_dev->pci_dev->dev, "setting io queues off failed\n"); 4138 return 1; 4139 } 4140 4141 if (OCTEON_CN23XX_PF(octeon_dev)) { 4142 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4143 if (ret) { 4144 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Failed to configure device registers\n"); 4145 return ret; 4146 } 4147 } 4148 4149 /* Initialize soft command buffer pool 4150 */ 4151 if (octeon_setup_sc_buffer_pool(octeon_dev)) { 4152 dev_err(&octeon_dev->pci_dev->dev, "sc buffer pool allocation failed\n"); 4153 return 1; 4154 } 4155 atomic_set(&octeon_dev->status, OCT_DEV_SC_BUFF_POOL_INIT_DONE); 4156 4157 /* Setup the data structures that manage this Octeon's Input queues. */ 4158 if (octeon_setup_instr_queues(octeon_dev)) { 4159 dev_err(&octeon_dev->pci_dev->dev, 4160 "instruction queue initialization failed\n"); 4161 return 1; 4162 } 4163 atomic_set(&octeon_dev->status, OCT_DEV_INSTR_QUEUE_INIT_DONE); 4164 4165 /* Initialize lists to manage the requests of different types that 4166 * arrive from user & kernel applications for this octeon device. 4167 */ 4168 if (octeon_setup_response_list(octeon_dev)) { 4169 dev_err(&octeon_dev->pci_dev->dev, "Response list allocation failed\n"); 4170 return 1; 4171 } 4172 atomic_set(&octeon_dev->status, OCT_DEV_RESP_LIST_INIT_DONE); 4173 4174 if (octeon_setup_output_queues(octeon_dev)) { 4175 dev_err(&octeon_dev->pci_dev->dev, "Output queue initialization failed\n"); 4176 return 1; 4177 } 4178 4179 atomic_set(&octeon_dev->status, OCT_DEV_DROQ_INIT_DONE); 4180 4181 if (OCTEON_CN23XX_PF(octeon_dev)) { 4182 if (octeon_dev->fn_list.setup_mbox(octeon_dev)) { 4183 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: Mailbox setup failed\n"); 4184 return 1; 4185 } 4186 atomic_set(&octeon_dev->status, OCT_DEV_MBOX_SETUP_DONE); 4187 4188 if (octeon_allocate_ioq_vector 4189 (octeon_dev, 4190 octeon_dev->sriov_info.num_pf_rings)) { 4191 dev_err(&octeon_dev->pci_dev->dev, "OCTEON: ioq vector allocation failed\n"); 4192 return 1; 4193 } 4194 atomic_set(&octeon_dev->status, OCT_DEV_MSIX_ALLOC_VECTOR_DONE); 4195 4196 } else { 4197 /* The input and output queue registers were setup earlier (the 4198 * queues were not enabled). Any additional registers 4199 * that need to be programmed should be done now. 4200 */ 4201 ret = octeon_dev->fn_list.setup_device_regs(octeon_dev); 4202 if (ret) { 4203 dev_err(&octeon_dev->pci_dev->dev, 4204 "Failed to configure device registers\n"); 4205 return ret; 4206 } 4207 } 4208 4209 /* Initialize the tasklet that handles output queue packet processing.*/ 4210 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing droq tasklet\n"); 4211 tasklet_init(&oct_priv->droq_tasklet, octeon_droq_bh, 4212 (unsigned long)octeon_dev); 4213 4214 /* Setup the interrupt handler and record the INT SUM register address 4215 */ 4216 if (octeon_setup_interrupt(octeon_dev, 4217 octeon_dev->sriov_info.num_pf_rings)) 4218 return 1; 4219 4220 /* Enable Octeon device interrupts */ 4221 octeon_dev->fn_list.enable_interrupt(octeon_dev, OCTEON_ALL_INTR); 4222 4223 atomic_set(&octeon_dev->status, OCT_DEV_INTR_SET_DONE); 4224 4225 /* Send Credit for Octeon Output queues. Credits are always sent BEFORE 4226 * the output queue is enabled. 4227 * This ensures that we'll receive the f/w CORE DRV_ACTIVE message in 4228 * case we've configured CN23XX_SLI_GBL_CONTROL[NOPTR_D] = 0. 4229 * Otherwise, it is possible that the DRV_ACTIVE message will be sent 4230 * before any credits have been issued, causing the ring to be reset 4231 * (and the f/w appear to never have started). 4232 */ 4233 for (j = 0; j < octeon_dev->num_oqs; j++) 4234 writel(octeon_dev->droq[j]->max_count, 4235 octeon_dev->droq[j]->pkts_credit_reg); 4236 4237 /* Enable the input and output queues for this Octeon device */ 4238 ret = octeon_dev->fn_list.enable_io_queues(octeon_dev); 4239 if (ret) { 4240 dev_err(&octeon_dev->pci_dev->dev, "Failed to enable input/output queues"); 4241 return ret; 4242 } 4243 4244 atomic_set(&octeon_dev->status, OCT_DEV_IO_QUEUES_DONE); 4245 4246 if (fw_state == FW_NEEDS_TO_BE_LOADED) { 4247 dev_dbg(&octeon_dev->pci_dev->dev, "Waiting for DDR initialization...\n"); 4248 if (!ddr_timeout) { 4249 dev_info(&octeon_dev->pci_dev->dev, 4250 "WAITING. Set ddr_timeout to non-zero value to proceed with initialization.\n"); 4251 } 4252 4253 schedule_timeout_uninterruptible(HZ * LIO_RESET_SECS); 4254 4255 /* Wait for the octeon to initialize DDR after the soft-reset.*/ 4256 while (!ddr_timeout) { 4257 set_current_state(TASK_INTERRUPTIBLE); 4258 if (schedule_timeout(HZ / 10)) { 4259 /* user probably pressed Control-C */ 4260 return 1; 4261 } 4262 } 4263 ret = octeon_wait_for_ddr_init(octeon_dev, &ddr_timeout); 4264 if (ret) { 4265 dev_err(&octeon_dev->pci_dev->dev, 4266 "DDR not initialized. Please confirm that board is configured to boot from Flash, ret: %d\n", 4267 ret); 4268 return 1; 4269 } 4270 4271 if (octeon_wait_for_bootloader(octeon_dev, 1000)) { 4272 dev_err(&octeon_dev->pci_dev->dev, "Board not responding\n"); 4273 return 1; 4274 } 4275 4276 /* Divert uboot to take commands from host instead. */ 4277 ret = octeon_console_send_cmd(octeon_dev, bootcmd, 50); 4278 4279 dev_dbg(&octeon_dev->pci_dev->dev, "Initializing consoles\n"); 4280 ret = octeon_init_consoles(octeon_dev); 4281 if (ret) { 4282 dev_err(&octeon_dev->pci_dev->dev, "Could not access board consoles\n"); 4283 return 1; 4284 } 4285 /* If console debug enabled, specify empty string to use default 4286 * enablement ELSE specify NULL string for 'disabled'. 4287 */ 4288 dbg_enb = octeon_console_debug_enabled(0) ? "" : NULL; 4289 ret = octeon_add_console(octeon_dev, 0, dbg_enb); 4290 if (ret) { 4291 dev_err(&octeon_dev->pci_dev->dev, "Could not access board console\n"); 4292 return 1; 4293 } else if (octeon_console_debug_enabled(0)) { 4294 /* If console was added AND we're logging console output 4295 * then set our console print function. 4296 */ 4297 octeon_dev->console[0].print = octeon_dbg_console_print; 4298 } 4299 4300 atomic_set(&octeon_dev->status, OCT_DEV_CONSOLE_INIT_DONE); 4301 4302 dev_dbg(&octeon_dev->pci_dev->dev, "Loading firmware\n"); 4303 ret = load_firmware(octeon_dev); 4304 if (ret) { 4305 dev_err(&octeon_dev->pci_dev->dev, "Could not load firmware to board\n"); 4306 return 1; 4307 } 4308 4309 atomic_set(octeon_dev->adapter_fw_state, FW_HAS_BEEN_LOADED); 4310 } 4311 4312 handshake[octeon_dev->octeon_id].init_ok = 1; 4313 complete(&handshake[octeon_dev->octeon_id].init); 4314 4315 atomic_set(&octeon_dev->status, OCT_DEV_HOST_OK); 4316 4317 return 0; 4318 } 4319 4320 /** 4321 * \brief Debug console print function 4322 * @param octeon_dev octeon device 4323 * @param console_num console number 4324 * @param prefix first portion of line to display 4325 * @param suffix second portion of line to display 4326 * 4327 * The OCTEON debug console outputs entire lines (excluding '\n'). 4328 * Normally, the line will be passed in the 'prefix' parameter. 4329 * However, due to buffering, it is possible for a line to be split into two 4330 * parts, in which case they will be passed as the 'prefix' parameter and 4331 * 'suffix' parameter. 4332 */ 4333 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num, 4334 char *prefix, char *suffix) 4335 { 4336 if (prefix && suffix) 4337 dev_info(&oct->pci_dev->dev, "%u: %s%s\n", console_num, prefix, 4338 suffix); 4339 else if (prefix) 4340 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, prefix); 4341 else if (suffix) 4342 dev_info(&oct->pci_dev->dev, "%u: %s\n", console_num, suffix); 4343 4344 return 0; 4345 } 4346 4347 /** 4348 * \brief Exits the module 4349 */ 4350 static void __exit liquidio_exit(void) 4351 { 4352 liquidio_deinit_pci(); 4353 4354 pr_info("LiquidIO network module is now unloaded\n"); 4355 } 4356 4357 module_init(liquidio_init); 4358 module_exit(liquidio_exit); 4359