1e86b1ab6SRaghu Vatsavayi /********************************************************************** 2e86b1ab6SRaghu Vatsavayi * Author: Cavium, Inc. 3e86b1ab6SRaghu Vatsavayi * 4e86b1ab6SRaghu Vatsavayi * Contact: support@cavium.com 5e86b1ab6SRaghu Vatsavayi * Please include "LiquidIO" in the subject. 6e86b1ab6SRaghu Vatsavayi * 750579d3dSRaghu Vatsavayi * Copyright (c) 2003-2016 Cavium, Inc. 8e86b1ab6SRaghu Vatsavayi * 9e86b1ab6SRaghu Vatsavayi * This file is free software; you can redistribute it and/or modify 10e86b1ab6SRaghu Vatsavayi * it under the terms of the GNU General Public License, Version 2, as 11e86b1ab6SRaghu Vatsavayi * published by the Free Software Foundation. 12e86b1ab6SRaghu Vatsavayi * 13e86b1ab6SRaghu Vatsavayi * This file is distributed in the hope that it will be useful, but 14e86b1ab6SRaghu Vatsavayi * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15e86b1ab6SRaghu Vatsavayi * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 1650579d3dSRaghu Vatsavayi * NONINFRINGEMENT. See the GNU General Public License for more details. 1750579d3dSRaghu Vatsavayi ***********************************************************************/ 18e86b1ab6SRaghu Vatsavayi /*! \file cn23xx_device.h 19e86b1ab6SRaghu Vatsavayi * \brief Host Driver: Routines that perform CN23XX specific operations. 20e86b1ab6SRaghu Vatsavayi */ 21e86b1ab6SRaghu Vatsavayi 22e86b1ab6SRaghu Vatsavayi #ifndef __CN23XX_PF_DEVICE_H__ 23e86b1ab6SRaghu Vatsavayi #define __CN23XX_PF_DEVICE_H__ 24e86b1ab6SRaghu Vatsavayi 25e86b1ab6SRaghu Vatsavayi #include "cn23xx_pf_regs.h" 26e86b1ab6SRaghu Vatsavayi 27e86b1ab6SRaghu Vatsavayi /* Register address and configuration for a CN23XX devices. 28e86b1ab6SRaghu Vatsavayi * If device specific changes need to be made then add a struct to include 29e86b1ab6SRaghu Vatsavayi * device specific fields as shown in the commented section 30e86b1ab6SRaghu Vatsavayi */ 31e86b1ab6SRaghu Vatsavayi struct octeon_cn23xx_pf { 32e86b1ab6SRaghu Vatsavayi /** PCI interrupt summary register */ 33e86b1ab6SRaghu Vatsavayi u8 __iomem *intr_sum_reg64; 34e86b1ab6SRaghu Vatsavayi 35e86b1ab6SRaghu Vatsavayi /** PCI interrupt enable register */ 36e86b1ab6SRaghu Vatsavayi u8 __iomem *intr_enb_reg64; 37e86b1ab6SRaghu Vatsavayi 38e86b1ab6SRaghu Vatsavayi /** The PCI interrupt mask used by interrupt handler */ 39e86b1ab6SRaghu Vatsavayi u64 intr_mask64; 40e86b1ab6SRaghu Vatsavayi 41e86b1ab6SRaghu Vatsavayi struct octeon_config *conf; 42e86b1ab6SRaghu Vatsavayi }; 4372c00912SRaghu Vatsavayi 44031d4f12SSatanand Burla #define CN23XX_SLI_DEF_BP 0x40 45031d4f12SSatanand Burla 46cea395acSIntiyaz Basha struct oct_vf_stats { 47cea395acSIntiyaz Basha u64 rx_packets; 48cea395acSIntiyaz Basha u64 tx_packets; 49cea395acSIntiyaz Basha u64 rx_bytes; 50cea395acSIntiyaz Basha u64 tx_bytes; 51cea395acSIntiyaz Basha u64 broadcast; 52cea395acSIntiyaz Basha u64 multicast; 53cea395acSIntiyaz Basha }; 54cea395acSIntiyaz Basha 5572c00912SRaghu Vatsavayi int setup_cn23xx_octeon_pf_device(struct octeon_device *oct); 5672c00912SRaghu Vatsavayi 5772c00912SRaghu Vatsavayi int validate_cn23xx_pf_config_info(struct octeon_device *oct, 5872c00912SRaghu Vatsavayi struct octeon_config *conf23xx); 5972c00912SRaghu Vatsavayi 60dc3abcbeSRaghu Vatsavayi u32 cn23xx_pf_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us); 61dc3abcbeSRaghu Vatsavayi 6272c00912SRaghu Vatsavayi void cn23xx_dump_pf_initialized_regs(struct octeon_device *oct); 63c0eab5b3SRaghu Vatsavayi 64c33c9973SIntiyaz Basha int cn23xx_sriov_config(struct octeon_device *oct); 65c33c9973SIntiyaz Basha 66c0eab5b3SRaghu Vatsavayi int cn23xx_fw_loaded(struct octeon_device *oct); 6786dea55bSRaghu Vatsavayi 6886dea55bSRaghu Vatsavayi void cn23xx_tell_vf_its_macaddr_changed(struct octeon_device *oct, int vfidx, 6986dea55bSRaghu Vatsavayi u8 *mac); 70cea395acSIntiyaz Basha 71cea395acSIntiyaz Basha int cn23xx_get_vf_stats(struct octeon_device *oct, int ifidx, 72cea395acSIntiyaz Basha struct oct_vf_stats *stats); 73e86b1ab6SRaghu Vatsavayi #endif 74