1ab91f0a9SRafal Ozieblo /** 2ab91f0a9SRafal Ozieblo * 1588 PTP support for Cadence GEM device. 3ab91f0a9SRafal Ozieblo * 4ab91f0a9SRafal Ozieblo * Copyright (C) 2017 Cadence Design Systems - http://www.cadence.com 5ab91f0a9SRafal Ozieblo * 6ab91f0a9SRafal Ozieblo * Authors: Rafal Ozieblo <rafalo@cadence.com> 7ab91f0a9SRafal Ozieblo * Bartosz Folta <bfolta@cadence.com> 8ab91f0a9SRafal Ozieblo * 9ab91f0a9SRafal Ozieblo * This program is free software: you can redistribute it and/or modify 10ab91f0a9SRafal Ozieblo * it under the terms of the GNU General Public License version 2 of 11ab91f0a9SRafal Ozieblo * the License as published by the Free Software Foundation. 12ab91f0a9SRafal Ozieblo * 13ab91f0a9SRafal Ozieblo * This program is distributed in the hope that it will be useful, 14ab91f0a9SRafal Ozieblo * but WITHOUT ANY WARRANTY; without even the implied warranty of 15ab91f0a9SRafal Ozieblo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16ab91f0a9SRafal Ozieblo * GNU General Public License for more details. 17ab91f0a9SRafal Ozieblo * 18ab91f0a9SRafal Ozieblo * You should have received a copy of the GNU General Public License 19ab91f0a9SRafal Ozieblo * along with this program. If not, see <http://www.gnu.org/licenses/>. 20ab91f0a9SRafal Ozieblo */ 21ab91f0a9SRafal Ozieblo #include <linux/kernel.h> 22ab91f0a9SRafal Ozieblo #include <linux/types.h> 23ab91f0a9SRafal Ozieblo #include <linux/clk.h> 24ab91f0a9SRafal Ozieblo #include <linux/device.h> 25ab91f0a9SRafal Ozieblo #include <linux/etherdevice.h> 26ab91f0a9SRafal Ozieblo #include <linux/platform_device.h> 27ab91f0a9SRafal Ozieblo #include <linux/time64.h> 28ab91f0a9SRafal Ozieblo #include <linux/ptp_classify.h> 29ab91f0a9SRafal Ozieblo #include <linux/if_ether.h> 30ab91f0a9SRafal Ozieblo #include <linux/if_vlan.h> 31ab91f0a9SRafal Ozieblo #include <linux/net_tstamp.h> 32ab91f0a9SRafal Ozieblo #include <linux/circ_buf.h> 33ab91f0a9SRafal Ozieblo #include <linux/spinlock.h> 34ab91f0a9SRafal Ozieblo 35ab91f0a9SRafal Ozieblo #include "macb.h" 36ab91f0a9SRafal Ozieblo 37ab91f0a9SRafal Ozieblo #define GEM_PTP_TIMER_NAME "gem-ptp-timer" 38ab91f0a9SRafal Ozieblo 39ab91f0a9SRafal Ozieblo static struct macb_dma_desc_ptp *macb_ptp_desc(struct macb *bp, 40ab91f0a9SRafal Ozieblo struct macb_dma_desc *desc) 41ab91f0a9SRafal Ozieblo { 42ab91f0a9SRafal Ozieblo if (bp->hw_dma_cap == HW_DMA_CAP_PTP) 43ab91f0a9SRafal Ozieblo return (struct macb_dma_desc_ptp *) 44ab91f0a9SRafal Ozieblo ((u8 *)desc + sizeof(struct macb_dma_desc)); 45ab91f0a9SRafal Ozieblo if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP) 46ab91f0a9SRafal Ozieblo return (struct macb_dma_desc_ptp *) 47ab91f0a9SRafal Ozieblo ((u8 *)desc + sizeof(struct macb_dma_desc) 48ab91f0a9SRafal Ozieblo + sizeof(struct macb_dma_desc_64)); 49ab91f0a9SRafal Ozieblo return NULL; 50ab91f0a9SRafal Ozieblo } 51ab91f0a9SRafal Ozieblo 52ab91f0a9SRafal Ozieblo static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts) 53ab91f0a9SRafal Ozieblo { 54ab91f0a9SRafal Ozieblo struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); 55ab91f0a9SRafal Ozieblo unsigned long flags; 56ab91f0a9SRafal Ozieblo long first, second; 57ab91f0a9SRafal Ozieblo u32 secl, sech; 58ab91f0a9SRafal Ozieblo 59ab91f0a9SRafal Ozieblo spin_lock_irqsave(&bp->tsu_clk_lock, flags); 60ab91f0a9SRafal Ozieblo first = gem_readl(bp, TN); 61ab91f0a9SRafal Ozieblo secl = gem_readl(bp, TSL); 62ab91f0a9SRafal Ozieblo sech = gem_readl(bp, TSH); 63ab91f0a9SRafal Ozieblo second = gem_readl(bp, TN); 64ab91f0a9SRafal Ozieblo 65ab91f0a9SRafal Ozieblo /* test for nsec rollover */ 66ab91f0a9SRafal Ozieblo if (first > second) { 67ab91f0a9SRafal Ozieblo /* if so, use later read & re-read seconds 68ab91f0a9SRafal Ozieblo * (assume all done within 1s) 69ab91f0a9SRafal Ozieblo */ 70ab91f0a9SRafal Ozieblo ts->tv_nsec = gem_readl(bp, TN); 71ab91f0a9SRafal Ozieblo secl = gem_readl(bp, TSL); 72ab91f0a9SRafal Ozieblo sech = gem_readl(bp, TSH); 73ab91f0a9SRafal Ozieblo } else { 74ab91f0a9SRafal Ozieblo ts->tv_nsec = first; 75ab91f0a9SRafal Ozieblo } 76ab91f0a9SRafal Ozieblo 77ab91f0a9SRafal Ozieblo spin_unlock_irqrestore(&bp->tsu_clk_lock, flags); 78ab91f0a9SRafal Ozieblo ts->tv_sec = (((u64)sech << GEM_TSL_SIZE) | secl) 79ab91f0a9SRafal Ozieblo & TSU_SEC_MAX_VAL; 80ab91f0a9SRafal Ozieblo return 0; 81ab91f0a9SRafal Ozieblo } 82ab91f0a9SRafal Ozieblo 83ab91f0a9SRafal Ozieblo static int gem_tsu_set_time(struct ptp_clock_info *ptp, 84ab91f0a9SRafal Ozieblo const struct timespec64 *ts) 85ab91f0a9SRafal Ozieblo { 86ab91f0a9SRafal Ozieblo struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); 87ab91f0a9SRafal Ozieblo unsigned long flags; 88ab91f0a9SRafal Ozieblo u32 ns, sech, secl; 89ab91f0a9SRafal Ozieblo 90ab91f0a9SRafal Ozieblo secl = (u32)ts->tv_sec; 91ab91f0a9SRafal Ozieblo sech = (ts->tv_sec >> GEM_TSL_SIZE) & ((1 << GEM_TSH_SIZE) - 1); 92ab91f0a9SRafal Ozieblo ns = ts->tv_nsec; 93ab91f0a9SRafal Ozieblo 94ab91f0a9SRafal Ozieblo spin_lock_irqsave(&bp->tsu_clk_lock, flags); 95ab91f0a9SRafal Ozieblo 96ab91f0a9SRafal Ozieblo /* TSH doesn't latch the time and no atomicity! */ 97ab91f0a9SRafal Ozieblo gem_writel(bp, TN, 0); /* clear to avoid overflow */ 98ab91f0a9SRafal Ozieblo gem_writel(bp, TSH, sech); 99ab91f0a9SRafal Ozieblo /* write lower bits 2nd, for synchronized secs update */ 100ab91f0a9SRafal Ozieblo gem_writel(bp, TSL, secl); 101ab91f0a9SRafal Ozieblo gem_writel(bp, TN, ns); 102ab91f0a9SRafal Ozieblo 103ab91f0a9SRafal Ozieblo spin_unlock_irqrestore(&bp->tsu_clk_lock, flags); 104ab91f0a9SRafal Ozieblo 105ab91f0a9SRafal Ozieblo return 0; 106ab91f0a9SRafal Ozieblo } 107ab91f0a9SRafal Ozieblo 108ab91f0a9SRafal Ozieblo static int gem_tsu_incr_set(struct macb *bp, struct tsu_incr *incr_spec) 109ab91f0a9SRafal Ozieblo { 110ab91f0a9SRafal Ozieblo unsigned long flags; 111ab91f0a9SRafal Ozieblo 112ab91f0a9SRafal Ozieblo /* tsu_timer_incr register must be written after 113ab91f0a9SRafal Ozieblo * the tsu_timer_incr_sub_ns register and the write operation 114ab91f0a9SRafal Ozieblo * will cause the value written to the tsu_timer_incr_sub_ns register 115ab91f0a9SRafal Ozieblo * to take effect. 116ab91f0a9SRafal Ozieblo */ 117ab91f0a9SRafal Ozieblo spin_lock_irqsave(&bp->tsu_clk_lock, flags); 118ab91f0a9SRafal Ozieblo gem_writel(bp, TISUBN, GEM_BF(SUBNSINCR, incr_spec->sub_ns)); 119ab91f0a9SRafal Ozieblo gem_writel(bp, TI, GEM_BF(NSINCR, incr_spec->ns)); 120ab91f0a9SRafal Ozieblo spin_unlock_irqrestore(&bp->tsu_clk_lock, flags); 121ab91f0a9SRafal Ozieblo 122ab91f0a9SRafal Ozieblo return 0; 123ab91f0a9SRafal Ozieblo } 124ab91f0a9SRafal Ozieblo 125ab91f0a9SRafal Ozieblo static int gem_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 126ab91f0a9SRafal Ozieblo { 127ab91f0a9SRafal Ozieblo struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); 128ab91f0a9SRafal Ozieblo struct tsu_incr incr_spec; 129ab91f0a9SRafal Ozieblo bool neg_adj = false; 130ab91f0a9SRafal Ozieblo u32 word; 131ab91f0a9SRafal Ozieblo u64 adj; 132ab91f0a9SRafal Ozieblo 133ab91f0a9SRafal Ozieblo if (scaled_ppm < 0) { 134ab91f0a9SRafal Ozieblo neg_adj = true; 135ab91f0a9SRafal Ozieblo scaled_ppm = -scaled_ppm; 136ab91f0a9SRafal Ozieblo } 137ab91f0a9SRafal Ozieblo 138ab91f0a9SRafal Ozieblo /* Adjustment is relative to base frequency */ 139ab91f0a9SRafal Ozieblo incr_spec.sub_ns = bp->tsu_incr.sub_ns; 140ab91f0a9SRafal Ozieblo incr_spec.ns = bp->tsu_incr.ns; 141ab91f0a9SRafal Ozieblo 142ab91f0a9SRafal Ozieblo /* scaling: unused(8bit) | ns(8bit) | fractions(16bit) */ 143ab91f0a9SRafal Ozieblo word = ((u64)incr_spec.ns << GEM_SUBNSINCR_SIZE) + incr_spec.sub_ns; 144ab91f0a9SRafal Ozieblo adj = (u64)scaled_ppm * word; 145ab91f0a9SRafal Ozieblo /* Divide with rounding, equivalent to floating dividing: 146ab91f0a9SRafal Ozieblo * (temp / USEC_PER_SEC) + 0.5 147ab91f0a9SRafal Ozieblo */ 148ab91f0a9SRafal Ozieblo adj += (USEC_PER_SEC >> 1); 149ab91f0a9SRafal Ozieblo adj >>= GEM_SUBNSINCR_SIZE; /* remove fractions */ 150ab91f0a9SRafal Ozieblo adj = div_u64(adj, USEC_PER_SEC); 151ab91f0a9SRafal Ozieblo adj = neg_adj ? (word - adj) : (word + adj); 152ab91f0a9SRafal Ozieblo 153ab91f0a9SRafal Ozieblo incr_spec.ns = (adj >> GEM_SUBNSINCR_SIZE) 154ab91f0a9SRafal Ozieblo & ((1 << GEM_NSINCR_SIZE) - 1); 155ab91f0a9SRafal Ozieblo incr_spec.sub_ns = adj & ((1 << GEM_SUBNSINCR_SIZE) - 1); 156ab91f0a9SRafal Ozieblo gem_tsu_incr_set(bp, &incr_spec); 157ab91f0a9SRafal Ozieblo return 0; 158ab91f0a9SRafal Ozieblo } 159ab91f0a9SRafal Ozieblo 160ab91f0a9SRafal Ozieblo static int gem_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) 161ab91f0a9SRafal Ozieblo { 162ab91f0a9SRafal Ozieblo struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); 163ab91f0a9SRafal Ozieblo struct timespec64 now, then = ns_to_timespec64(delta); 164ab91f0a9SRafal Ozieblo u32 adj, sign = 0; 165ab91f0a9SRafal Ozieblo 166ab91f0a9SRafal Ozieblo if (delta < 0) { 167ab91f0a9SRafal Ozieblo sign = 1; 168ab91f0a9SRafal Ozieblo delta = -delta; 169ab91f0a9SRafal Ozieblo } 170ab91f0a9SRafal Ozieblo 171ab91f0a9SRafal Ozieblo if (delta > TSU_NSEC_MAX_VAL) { 172ab91f0a9SRafal Ozieblo gem_tsu_get_time(&bp->ptp_clock_info, &now); 173ab91f0a9SRafal Ozieblo if (sign) 174ab91f0a9SRafal Ozieblo now = timespec64_sub(now, then); 175ab91f0a9SRafal Ozieblo else 176ab91f0a9SRafal Ozieblo now = timespec64_add(now, then); 177ab91f0a9SRafal Ozieblo 178ab91f0a9SRafal Ozieblo gem_tsu_set_time(&bp->ptp_clock_info, 179ab91f0a9SRafal Ozieblo (const struct timespec64 *)&now); 180ab91f0a9SRafal Ozieblo } else { 181ab91f0a9SRafal Ozieblo adj = (sign << GEM_ADDSUB_OFFSET) | delta; 182ab91f0a9SRafal Ozieblo 183ab91f0a9SRafal Ozieblo gem_writel(bp, TA, adj); 184ab91f0a9SRafal Ozieblo } 185ab91f0a9SRafal Ozieblo 186ab91f0a9SRafal Ozieblo return 0; 187ab91f0a9SRafal Ozieblo } 188ab91f0a9SRafal Ozieblo 189ab91f0a9SRafal Ozieblo static int gem_ptp_enable(struct ptp_clock_info *ptp, 190ab91f0a9SRafal Ozieblo struct ptp_clock_request *rq, int on) 191ab91f0a9SRafal Ozieblo { 192ab91f0a9SRafal Ozieblo return -EOPNOTSUPP; 193ab91f0a9SRafal Ozieblo } 194ab91f0a9SRafal Ozieblo 195ab91f0a9SRafal Ozieblo static struct ptp_clock_info gem_ptp_caps_template = { 196ab91f0a9SRafal Ozieblo .owner = THIS_MODULE, 197ab91f0a9SRafal Ozieblo .name = GEM_PTP_TIMER_NAME, 198ab91f0a9SRafal Ozieblo .max_adj = 0, 199ab91f0a9SRafal Ozieblo .n_alarm = 0, 200ab91f0a9SRafal Ozieblo .n_ext_ts = 0, 201ab91f0a9SRafal Ozieblo .n_per_out = 0, 202ab91f0a9SRafal Ozieblo .n_pins = 0, 203ab91f0a9SRafal Ozieblo .pps = 1, 204ab91f0a9SRafal Ozieblo .adjfine = gem_ptp_adjfine, 205ab91f0a9SRafal Ozieblo .adjtime = gem_ptp_adjtime, 206ab91f0a9SRafal Ozieblo .gettime64 = gem_tsu_get_time, 207ab91f0a9SRafal Ozieblo .settime64 = gem_tsu_set_time, 208ab91f0a9SRafal Ozieblo .enable = gem_ptp_enable, 209ab91f0a9SRafal Ozieblo }; 210ab91f0a9SRafal Ozieblo 211ab91f0a9SRafal Ozieblo static void gem_ptp_init_timer(struct macb *bp) 212ab91f0a9SRafal Ozieblo { 213ab91f0a9SRafal Ozieblo u32 rem = 0; 214ab91f0a9SRafal Ozieblo u64 adj; 215ab91f0a9SRafal Ozieblo 216ab91f0a9SRafal Ozieblo bp->tsu_incr.ns = div_u64_rem(NSEC_PER_SEC, bp->tsu_rate, &rem); 217ab91f0a9SRafal Ozieblo if (rem) { 218ab91f0a9SRafal Ozieblo adj = rem; 219ab91f0a9SRafal Ozieblo adj <<= GEM_SUBNSINCR_SIZE; 220ab91f0a9SRafal Ozieblo bp->tsu_incr.sub_ns = div_u64(adj, bp->tsu_rate); 221ab91f0a9SRafal Ozieblo } else { 222ab91f0a9SRafal Ozieblo bp->tsu_incr.sub_ns = 0; 223ab91f0a9SRafal Ozieblo } 224ab91f0a9SRafal Ozieblo } 225ab91f0a9SRafal Ozieblo 226ab91f0a9SRafal Ozieblo static void gem_ptp_init_tsu(struct macb *bp) 227ab91f0a9SRafal Ozieblo { 228ab91f0a9SRafal Ozieblo struct timespec64 ts; 229ab91f0a9SRafal Ozieblo 230ab91f0a9SRafal Ozieblo /* 1. get current system time */ 231ab91f0a9SRafal Ozieblo ts = ns_to_timespec64(ktime_to_ns(ktime_get_real())); 232ab91f0a9SRafal Ozieblo 233ab91f0a9SRafal Ozieblo /* 2. set ptp timer */ 234ab91f0a9SRafal Ozieblo gem_tsu_set_time(&bp->ptp_clock_info, &ts); 235ab91f0a9SRafal Ozieblo 236ab91f0a9SRafal Ozieblo /* 3. set PTP timer increment value to BASE_INCREMENT */ 237ab91f0a9SRafal Ozieblo gem_tsu_incr_set(bp, &bp->tsu_incr); 238ab91f0a9SRafal Ozieblo 239ab91f0a9SRafal Ozieblo gem_writel(bp, TA, 0); 240ab91f0a9SRafal Ozieblo } 241ab91f0a9SRafal Ozieblo 242ab91f0a9SRafal Ozieblo static void gem_ptp_clear_timer(struct macb *bp) 243ab91f0a9SRafal Ozieblo { 244ab91f0a9SRafal Ozieblo bp->tsu_incr.sub_ns = 0; 245ab91f0a9SRafal Ozieblo bp->tsu_incr.ns = 0; 246ab91f0a9SRafal Ozieblo 247ab91f0a9SRafal Ozieblo gem_writel(bp, TISUBN, GEM_BF(SUBNSINCR, 0)); 248ab91f0a9SRafal Ozieblo gem_writel(bp, TI, GEM_BF(NSINCR, 0)); 249ab91f0a9SRafal Ozieblo gem_writel(bp, TA, 0); 250ab91f0a9SRafal Ozieblo } 251ab91f0a9SRafal Ozieblo 252ab91f0a9SRafal Ozieblo static int gem_hw_timestamp(struct macb *bp, u32 dma_desc_ts_1, 253ab91f0a9SRafal Ozieblo u32 dma_desc_ts_2, struct timespec64 *ts) 254ab91f0a9SRafal Ozieblo { 255ab91f0a9SRafal Ozieblo struct timespec64 tsu; 256ab91f0a9SRafal Ozieblo 257ab91f0a9SRafal Ozieblo ts->tv_sec = (GEM_BFEXT(DMA_SECH, dma_desc_ts_2) << GEM_DMA_SECL_SIZE) | 258ab91f0a9SRafal Ozieblo GEM_BFEXT(DMA_SECL, dma_desc_ts_1); 259ab91f0a9SRafal Ozieblo ts->tv_nsec = GEM_BFEXT(DMA_NSEC, dma_desc_ts_1); 260ab91f0a9SRafal Ozieblo 261ab91f0a9SRafal Ozieblo /* TSU overlapping workaround 262ab91f0a9SRafal Ozieblo * The timestamp only contains lower few bits of seconds, 263ab91f0a9SRafal Ozieblo * so add value from 1588 timer 264ab91f0a9SRafal Ozieblo */ 265ab91f0a9SRafal Ozieblo gem_tsu_get_time(&bp->ptp_clock_info, &tsu); 266ab91f0a9SRafal Ozieblo 267ab91f0a9SRafal Ozieblo /* If the top bit is set in the timestamp, 268ab91f0a9SRafal Ozieblo * but not in 1588 timer, it has rolled over, 269ab91f0a9SRafal Ozieblo * so subtract max size 270ab91f0a9SRafal Ozieblo */ 271ab91f0a9SRafal Ozieblo if ((ts->tv_sec & (GEM_DMA_SEC_TOP >> 1)) && 272ab91f0a9SRafal Ozieblo !(tsu.tv_sec & (GEM_DMA_SEC_TOP >> 1))) 273ab91f0a9SRafal Ozieblo ts->tv_sec -= GEM_DMA_SEC_TOP; 274ab91f0a9SRafal Ozieblo 275ab91f0a9SRafal Ozieblo ts->tv_sec += ((~GEM_DMA_SEC_MASK) & tsu.tv_sec); 276ab91f0a9SRafal Ozieblo 277ab91f0a9SRafal Ozieblo return 0; 278ab91f0a9SRafal Ozieblo } 279ab91f0a9SRafal Ozieblo 280ab91f0a9SRafal Ozieblo void gem_ptp_rxstamp(struct macb *bp, struct sk_buff *skb, 281ab91f0a9SRafal Ozieblo struct macb_dma_desc *desc) 282ab91f0a9SRafal Ozieblo { 283ab91f0a9SRafal Ozieblo struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb); 284ab91f0a9SRafal Ozieblo struct macb_dma_desc_ptp *desc_ptp; 285ab91f0a9SRafal Ozieblo struct timespec64 ts; 286ab91f0a9SRafal Ozieblo 287ab91f0a9SRafal Ozieblo if (GEM_BFEXT(DMA_RXVALID, desc->addr)) { 288ab91f0a9SRafal Ozieblo desc_ptp = macb_ptp_desc(bp, desc); 289ab91f0a9SRafal Ozieblo gem_hw_timestamp(bp, desc_ptp->ts_1, desc_ptp->ts_2, &ts); 290ab91f0a9SRafal Ozieblo memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps)); 291ab91f0a9SRafal Ozieblo shhwtstamps->hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 292ab91f0a9SRafal Ozieblo } 293ab91f0a9SRafal Ozieblo } 294ab91f0a9SRafal Ozieblo 295ab91f0a9SRafal Ozieblo static void gem_tstamp_tx(struct macb *bp, struct sk_buff *skb, 296ab91f0a9SRafal Ozieblo struct macb_dma_desc_ptp *desc_ptp) 297ab91f0a9SRafal Ozieblo { 298ab91f0a9SRafal Ozieblo struct skb_shared_hwtstamps shhwtstamps; 299ab91f0a9SRafal Ozieblo struct timespec64 ts; 300ab91f0a9SRafal Ozieblo 301ab91f0a9SRafal Ozieblo gem_hw_timestamp(bp, desc_ptp->ts_1, desc_ptp->ts_2, &ts); 302ab91f0a9SRafal Ozieblo memset(&shhwtstamps, 0, sizeof(shhwtstamps)); 303ab91f0a9SRafal Ozieblo shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec); 304ab91f0a9SRafal Ozieblo skb_tstamp_tx(skb, &shhwtstamps); 305ab91f0a9SRafal Ozieblo } 306ab91f0a9SRafal Ozieblo 307ab91f0a9SRafal Ozieblo int gem_ptp_txstamp(struct macb_queue *queue, struct sk_buff *skb, 308ab91f0a9SRafal Ozieblo struct macb_dma_desc *desc) 309ab91f0a9SRafal Ozieblo { 310ab91f0a9SRafal Ozieblo unsigned long tail = READ_ONCE(queue->tx_ts_tail); 311ab91f0a9SRafal Ozieblo unsigned long head = queue->tx_ts_head; 312ab91f0a9SRafal Ozieblo struct macb_dma_desc_ptp *desc_ptp; 313ab91f0a9SRafal Ozieblo struct gem_tx_ts *tx_timestamp; 314ab91f0a9SRafal Ozieblo 315ab91f0a9SRafal Ozieblo if (!GEM_BFEXT(DMA_TXVALID, desc->ctrl)) 316ab91f0a9SRafal Ozieblo return -EINVAL; 317ab91f0a9SRafal Ozieblo 318ab91f0a9SRafal Ozieblo if (CIRC_SPACE(head, tail, PTP_TS_BUFFER_SIZE) == 0) 319ab91f0a9SRafal Ozieblo return -ENOMEM; 320ab91f0a9SRafal Ozieblo 321ab91f0a9SRafal Ozieblo skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 322ab91f0a9SRafal Ozieblo desc_ptp = macb_ptp_desc(queue->bp, desc); 323ab91f0a9SRafal Ozieblo tx_timestamp = &queue->tx_timestamps[head]; 324ab91f0a9SRafal Ozieblo tx_timestamp->skb = skb; 325ab91f0a9SRafal Ozieblo tx_timestamp->desc_ptp.ts_1 = desc_ptp->ts_1; 326ab91f0a9SRafal Ozieblo tx_timestamp->desc_ptp.ts_2 = desc_ptp->ts_2; 327ab91f0a9SRafal Ozieblo /* move head */ 328ab91f0a9SRafal Ozieblo smp_store_release(&queue->tx_ts_head, 329ab91f0a9SRafal Ozieblo (head + 1) & (PTP_TS_BUFFER_SIZE - 1)); 330ab91f0a9SRafal Ozieblo 331ab91f0a9SRafal Ozieblo schedule_work(&queue->tx_ts_task); 332ab91f0a9SRafal Ozieblo return 0; 333ab91f0a9SRafal Ozieblo } 334ab91f0a9SRafal Ozieblo 335ab91f0a9SRafal Ozieblo static void gem_tx_timestamp_flush(struct work_struct *work) 336ab91f0a9SRafal Ozieblo { 337ab91f0a9SRafal Ozieblo struct macb_queue *queue = 338ab91f0a9SRafal Ozieblo container_of(work, struct macb_queue, tx_ts_task); 339ab91f0a9SRafal Ozieblo unsigned long head, tail; 340ab91f0a9SRafal Ozieblo struct gem_tx_ts *tx_ts; 341ab91f0a9SRafal Ozieblo 342ab91f0a9SRafal Ozieblo /* take current head */ 343ab91f0a9SRafal Ozieblo head = smp_load_acquire(&queue->tx_ts_head); 344ab91f0a9SRafal Ozieblo tail = queue->tx_ts_tail; 345ab91f0a9SRafal Ozieblo 346ab91f0a9SRafal Ozieblo while (CIRC_CNT(head, tail, PTP_TS_BUFFER_SIZE)) { 347ab91f0a9SRafal Ozieblo tx_ts = &queue->tx_timestamps[tail]; 348ab91f0a9SRafal Ozieblo gem_tstamp_tx(queue->bp, tx_ts->skb, &tx_ts->desc_ptp); 349ab91f0a9SRafal Ozieblo /* cleanup */ 350ab91f0a9SRafal Ozieblo dev_kfree_skb_any(tx_ts->skb); 351ab91f0a9SRafal Ozieblo /* remove old tail */ 352ab91f0a9SRafal Ozieblo smp_store_release(&queue->tx_ts_tail, 353ab91f0a9SRafal Ozieblo (tail + 1) & (PTP_TS_BUFFER_SIZE - 1)); 354ab91f0a9SRafal Ozieblo tail = queue->tx_ts_tail; 355ab91f0a9SRafal Ozieblo } 356ab91f0a9SRafal Ozieblo } 357ab91f0a9SRafal Ozieblo 358ab91f0a9SRafal Ozieblo void gem_ptp_init(struct net_device *dev) 359ab91f0a9SRafal Ozieblo { 360ab91f0a9SRafal Ozieblo struct macb *bp = netdev_priv(dev); 361ab91f0a9SRafal Ozieblo struct macb_queue *queue; 362ab91f0a9SRafal Ozieblo unsigned int q; 363ab91f0a9SRafal Ozieblo 364ab91f0a9SRafal Ozieblo bp->ptp_clock_info = gem_ptp_caps_template; 365ab91f0a9SRafal Ozieblo 366ab91f0a9SRafal Ozieblo /* nominal frequency and maximum adjustment in ppb */ 367ab91f0a9SRafal Ozieblo bp->tsu_rate = bp->ptp_info->get_tsu_rate(bp); 368ab91f0a9SRafal Ozieblo bp->ptp_clock_info.max_adj = bp->ptp_info->get_ptp_max_adj(); 369ab91f0a9SRafal Ozieblo gem_ptp_init_timer(bp); 370ab91f0a9SRafal Ozieblo bp->ptp_clock = ptp_clock_register(&bp->ptp_clock_info, &dev->dev); 371ab91f0a9SRafal Ozieblo if (IS_ERR(bp->ptp_clock)) { 372ab91f0a9SRafal Ozieblo pr_err("ptp clock register failed: %ld\n", 373ab91f0a9SRafal Ozieblo PTR_ERR(bp->ptp_clock)); 374ab91f0a9SRafal Ozieblo bp->ptp_clock = NULL; 375ab91f0a9SRafal Ozieblo return; 376ab91f0a9SRafal Ozieblo } else if (bp->ptp_clock == NULL) { 377ab91f0a9SRafal Ozieblo pr_err("ptp clock register failed\n"); 378ab91f0a9SRafal Ozieblo return; 379ab91f0a9SRafal Ozieblo } 380ab91f0a9SRafal Ozieblo 381ab91f0a9SRafal Ozieblo spin_lock_init(&bp->tsu_clk_lock); 382ab91f0a9SRafal Ozieblo for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { 383ab91f0a9SRafal Ozieblo queue->tx_ts_head = 0; 384ab91f0a9SRafal Ozieblo queue->tx_ts_tail = 0; 385ab91f0a9SRafal Ozieblo INIT_WORK(&queue->tx_ts_task, gem_tx_timestamp_flush); 386ab91f0a9SRafal Ozieblo } 387ab91f0a9SRafal Ozieblo 388ab91f0a9SRafal Ozieblo gem_ptp_init_tsu(bp); 389ab91f0a9SRafal Ozieblo 390ab91f0a9SRafal Ozieblo dev_info(&bp->pdev->dev, "%s ptp clock registered.\n", 391ab91f0a9SRafal Ozieblo GEM_PTP_TIMER_NAME); 392ab91f0a9SRafal Ozieblo } 393ab91f0a9SRafal Ozieblo 394ab91f0a9SRafal Ozieblo void gem_ptp_remove(struct net_device *ndev) 395ab91f0a9SRafal Ozieblo { 396ab91f0a9SRafal Ozieblo struct macb *bp = netdev_priv(ndev); 397ab91f0a9SRafal Ozieblo 398ab91f0a9SRafal Ozieblo if (bp->ptp_clock) 399ab91f0a9SRafal Ozieblo ptp_clock_unregister(bp->ptp_clock); 400ab91f0a9SRafal Ozieblo 401ab91f0a9SRafal Ozieblo gem_ptp_clear_timer(bp); 402ab91f0a9SRafal Ozieblo 403ab91f0a9SRafal Ozieblo dev_info(&bp->pdev->dev, "%s ptp clock unregistered.\n", 404ab91f0a9SRafal Ozieblo GEM_PTP_TIMER_NAME); 405ab91f0a9SRafal Ozieblo } 406ab91f0a9SRafal Ozieblo 407ab91f0a9SRafal Ozieblo static int gem_ptp_set_ts_mode(struct macb *bp, 408ab91f0a9SRafal Ozieblo enum macb_bd_control tx_bd_control, 409ab91f0a9SRafal Ozieblo enum macb_bd_control rx_bd_control) 410ab91f0a9SRafal Ozieblo { 411ab91f0a9SRafal Ozieblo gem_writel(bp, TXBDCTRL, GEM_BF(TXTSMODE, tx_bd_control)); 412ab91f0a9SRafal Ozieblo gem_writel(bp, RXBDCTRL, GEM_BF(RXTSMODE, rx_bd_control)); 413ab91f0a9SRafal Ozieblo 414ab91f0a9SRafal Ozieblo return 0; 415ab91f0a9SRafal Ozieblo } 416ab91f0a9SRafal Ozieblo 417ab91f0a9SRafal Ozieblo int gem_get_hwtst(struct net_device *dev, struct ifreq *rq) 418ab91f0a9SRafal Ozieblo { 419ab91f0a9SRafal Ozieblo struct hwtstamp_config *tstamp_config; 420ab91f0a9SRafal Ozieblo struct macb *bp = netdev_priv(dev); 421ab91f0a9SRafal Ozieblo 422ab91f0a9SRafal Ozieblo tstamp_config = &bp->tstamp_config; 423ab91f0a9SRafal Ozieblo if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0) 424ab91f0a9SRafal Ozieblo return -EOPNOTSUPP; 425ab91f0a9SRafal Ozieblo 426ab91f0a9SRafal Ozieblo if (copy_to_user(rq->ifr_data, tstamp_config, sizeof(*tstamp_config))) 427ab91f0a9SRafal Ozieblo return -EFAULT; 428ab91f0a9SRafal Ozieblo else 429ab91f0a9SRafal Ozieblo return 0; 430ab91f0a9SRafal Ozieblo } 431ab91f0a9SRafal Ozieblo 432ab91f0a9SRafal Ozieblo static int gem_ptp_set_one_step_sync(struct macb *bp, u8 enable) 433ab91f0a9SRafal Ozieblo { 434ab91f0a9SRafal Ozieblo u32 reg_val; 435ab91f0a9SRafal Ozieblo 436ab91f0a9SRafal Ozieblo reg_val = macb_readl(bp, NCR); 437ab91f0a9SRafal Ozieblo 438ab91f0a9SRafal Ozieblo if (enable) 439ab91f0a9SRafal Ozieblo macb_writel(bp, NCR, reg_val | MACB_BIT(OSSMODE)); 440ab91f0a9SRafal Ozieblo else 441ab91f0a9SRafal Ozieblo macb_writel(bp, NCR, reg_val & ~MACB_BIT(OSSMODE)); 442ab91f0a9SRafal Ozieblo 443ab91f0a9SRafal Ozieblo return 0; 444ab91f0a9SRafal Ozieblo } 445ab91f0a9SRafal Ozieblo 446ab91f0a9SRafal Ozieblo int gem_set_hwtst(struct net_device *dev, struct ifreq *ifr, int cmd) 447ab91f0a9SRafal Ozieblo { 448ab91f0a9SRafal Ozieblo enum macb_bd_control tx_bd_control = TSTAMP_DISABLED; 449ab91f0a9SRafal Ozieblo enum macb_bd_control rx_bd_control = TSTAMP_DISABLED; 450ab91f0a9SRafal Ozieblo struct hwtstamp_config *tstamp_config; 451ab91f0a9SRafal Ozieblo struct macb *bp = netdev_priv(dev); 452ab91f0a9SRafal Ozieblo u32 regval; 453ab91f0a9SRafal Ozieblo 454ab91f0a9SRafal Ozieblo tstamp_config = &bp->tstamp_config; 455ab91f0a9SRafal Ozieblo if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0) 456ab91f0a9SRafal Ozieblo return -EOPNOTSUPP; 457ab91f0a9SRafal Ozieblo 458ab91f0a9SRafal Ozieblo if (copy_from_user(tstamp_config, ifr->ifr_data, 459ab91f0a9SRafal Ozieblo sizeof(*tstamp_config))) 460ab91f0a9SRafal Ozieblo return -EFAULT; 461ab91f0a9SRafal Ozieblo 462ab91f0a9SRafal Ozieblo /* reserved for future extensions */ 463ab91f0a9SRafal Ozieblo if (tstamp_config->flags) 464ab91f0a9SRafal Ozieblo return -EINVAL; 465ab91f0a9SRafal Ozieblo 466ab91f0a9SRafal Ozieblo switch (tstamp_config->tx_type) { 467ab91f0a9SRafal Ozieblo case HWTSTAMP_TX_OFF: 468ab91f0a9SRafal Ozieblo break; 469ab91f0a9SRafal Ozieblo case HWTSTAMP_TX_ONESTEP_SYNC: 470ab91f0a9SRafal Ozieblo if (gem_ptp_set_one_step_sync(bp, 1) != 0) 471ab91f0a9SRafal Ozieblo return -ERANGE; 472ab91f0a9SRafal Ozieblo case HWTSTAMP_TX_ON: 473ab91f0a9SRafal Ozieblo tx_bd_control = TSTAMP_ALL_FRAMES; 474ab91f0a9SRafal Ozieblo break; 475ab91f0a9SRafal Ozieblo default: 476ab91f0a9SRafal Ozieblo return -ERANGE; 477ab91f0a9SRafal Ozieblo } 478ab91f0a9SRafal Ozieblo 479ab91f0a9SRafal Ozieblo switch (tstamp_config->rx_filter) { 480ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_NONE: 481ab91f0a9SRafal Ozieblo break; 482ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: 483ab91f0a9SRafal Ozieblo break; 484ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: 485ab91f0a9SRafal Ozieblo break; 486ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_EVENT: 487ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: 488ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: 489ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_SYNC: 490ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: 491ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: 492ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: 493ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: 494ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: 495ab91f0a9SRafal Ozieblo rx_bd_control = TSTAMP_ALL_PTP_FRAMES; 496ab91f0a9SRafal Ozieblo tstamp_config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; 497ab91f0a9SRafal Ozieblo regval = macb_readl(bp, NCR); 498ab91f0a9SRafal Ozieblo macb_writel(bp, NCR, (regval | MACB_BIT(SRTSM))); 499ab91f0a9SRafal Ozieblo break; 500ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: 501ab91f0a9SRafal Ozieblo case HWTSTAMP_FILTER_ALL: 502ab91f0a9SRafal Ozieblo rx_bd_control = TSTAMP_ALL_FRAMES; 503ab91f0a9SRafal Ozieblo tstamp_config->rx_filter = HWTSTAMP_FILTER_ALL; 504ab91f0a9SRafal Ozieblo break; 505ab91f0a9SRafal Ozieblo default: 506ab91f0a9SRafal Ozieblo tstamp_config->rx_filter = HWTSTAMP_FILTER_NONE; 507ab91f0a9SRafal Ozieblo return -ERANGE; 508ab91f0a9SRafal Ozieblo } 509ab91f0a9SRafal Ozieblo 510ab91f0a9SRafal Ozieblo if (gem_ptp_set_ts_mode(bp, tx_bd_control, rx_bd_control) != 0) 511ab91f0a9SRafal Ozieblo return -ERANGE; 512ab91f0a9SRafal Ozieblo 513ab91f0a9SRafal Ozieblo if (copy_to_user(ifr->ifr_data, tstamp_config, sizeof(*tstamp_config))) 514ab91f0a9SRafal Ozieblo return -EFAULT; 515ab91f0a9SRafal Ozieblo else 516ab91f0a9SRafal Ozieblo return 0; 517ab91f0a9SRafal Ozieblo } 518ab91f0a9SRafal Ozieblo 519