1f844a0eaSJeff Kirsher /* 2f844a0eaSJeff Kirsher * Linux network driver for Brocade Converged Network Adapter. 3f844a0eaSJeff Kirsher * 4f844a0eaSJeff Kirsher * This program is free software; you can redistribute it and/or modify it 5f844a0eaSJeff Kirsher * under the terms of the GNU General Public License (GPL) Version 2 as 6f844a0eaSJeff Kirsher * published by the Free Software Foundation 7f844a0eaSJeff Kirsher * 8f844a0eaSJeff Kirsher * This program is distributed in the hope that it will be useful, but 9f844a0eaSJeff Kirsher * WITHOUT ANY WARRANTY; without even the implied warranty of 10f844a0eaSJeff Kirsher * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11f844a0eaSJeff Kirsher * General Public License for more details. 12f844a0eaSJeff Kirsher */ 13f844a0eaSJeff Kirsher /* 14f844a0eaSJeff Kirsher * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 15f844a0eaSJeff Kirsher * All rights reserved 16f844a0eaSJeff Kirsher * www.brocade.com 17f844a0eaSJeff Kirsher */ 18f844a0eaSJeff Kirsher #ifndef __BNAD_H__ 19f844a0eaSJeff Kirsher #define __BNAD_H__ 20f844a0eaSJeff Kirsher 21f844a0eaSJeff Kirsher #include <linux/rtnetlink.h> 22f844a0eaSJeff Kirsher #include <linux/workqueue.h> 23f844a0eaSJeff Kirsher #include <linux/ipv6.h> 24f844a0eaSJeff Kirsher #include <linux/etherdevice.h> 25f844a0eaSJeff Kirsher #include <linux/mutex.h> 26f844a0eaSJeff Kirsher #include <linux/firmware.h> 27f844a0eaSJeff Kirsher #include <linux/if_vlan.h> 28f844a0eaSJeff Kirsher 29f844a0eaSJeff Kirsher /* Fix for IA64 */ 30f844a0eaSJeff Kirsher #include <asm/checksum.h> 31f844a0eaSJeff Kirsher #include <net/ip6_checksum.h> 32f844a0eaSJeff Kirsher 33f844a0eaSJeff Kirsher #include <net/ip.h> 34f844a0eaSJeff Kirsher #include <net/tcp.h> 35f844a0eaSJeff Kirsher 36f844a0eaSJeff Kirsher #include "bna.h" 37f844a0eaSJeff Kirsher 38f844a0eaSJeff Kirsher #define BNAD_TXQ_DEPTH 2048 39f844a0eaSJeff Kirsher #define BNAD_RXQ_DEPTH 2048 40f844a0eaSJeff Kirsher 41f844a0eaSJeff Kirsher #define BNAD_MAX_TXS 1 42f844a0eaSJeff Kirsher #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */ 43f844a0eaSJeff Kirsher #define BNAD_TXQ_NUM 1 44f844a0eaSJeff Kirsher 45f844a0eaSJeff Kirsher #define BNAD_MAX_RXS 1 46f844a0eaSJeff Kirsher #define BNAD_MAX_RXPS_PER_RX 16 47f844a0eaSJeff Kirsher 48f844a0eaSJeff Kirsher /* 49f844a0eaSJeff Kirsher * Control structure pointed to ccb->ctrl, which 50f844a0eaSJeff Kirsher * determines the NAPI / LRO behavior CCB 51f844a0eaSJeff Kirsher * There is 1:1 corres. between ccb & ctrl 52f844a0eaSJeff Kirsher */ 53f844a0eaSJeff Kirsher struct bnad_rx_ctrl { 54f844a0eaSJeff Kirsher struct bna_ccb *ccb; 55f844a0eaSJeff Kirsher unsigned long flags; 56f844a0eaSJeff Kirsher struct napi_struct napi; 57f844a0eaSJeff Kirsher }; 58f844a0eaSJeff Kirsher 59f844a0eaSJeff Kirsher #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC 60f844a0eaSJeff Kirsher 61f844a0eaSJeff Kirsher #define BNAD_GET_TX_ID(_skb) (0) 62f844a0eaSJeff Kirsher 63f844a0eaSJeff Kirsher /* 64f844a0eaSJeff Kirsher * GLOBAL #defines (CONSTANTS) 65f844a0eaSJeff Kirsher */ 66f844a0eaSJeff Kirsher #define BNAD_NAME "bna" 67f844a0eaSJeff Kirsher #define BNAD_NAME_LEN 64 68f844a0eaSJeff Kirsher 69f844a0eaSJeff Kirsher #define BNAD_VERSION "2.3.2.3" 70f844a0eaSJeff Kirsher 71f844a0eaSJeff Kirsher #define BNAD_MAILBOX_MSIX_INDEX 0 72f844a0eaSJeff Kirsher #define BNAD_MAILBOX_MSIX_VECTORS 1 73f844a0eaSJeff Kirsher #define BNAD_INTX_TX_IB_BITMASK 0x1 74f844a0eaSJeff Kirsher #define BNAD_INTX_RX_IB_BITMASK 0x2 75f844a0eaSJeff Kirsher 76f844a0eaSJeff Kirsher #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */ 77f844a0eaSJeff Kirsher #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */ 78f844a0eaSJeff Kirsher 79f844a0eaSJeff Kirsher #define BNAD_MAX_Q_DEPTH 0x10000 80f844a0eaSJeff Kirsher #define BNAD_MIN_Q_DEPTH 0x200 81f844a0eaSJeff Kirsher 82f844a0eaSJeff Kirsher #define BNAD_JUMBO_MTU 9000 83f844a0eaSJeff Kirsher 84f844a0eaSJeff Kirsher #define BNAD_NETIF_WAKE_THRESHOLD 8 85f844a0eaSJeff Kirsher 86f844a0eaSJeff Kirsher #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3 87f844a0eaSJeff Kirsher 88f844a0eaSJeff Kirsher /* Bit positions for tcb->flags */ 89f844a0eaSJeff Kirsher #define BNAD_TXQ_FREE_SENT 0 90f844a0eaSJeff Kirsher #define BNAD_TXQ_TX_STARTED 1 91f844a0eaSJeff Kirsher 92f844a0eaSJeff Kirsher /* Bit positions for rcb->flags */ 93f844a0eaSJeff Kirsher #define BNAD_RXQ_REFILL 0 94f844a0eaSJeff Kirsher #define BNAD_RXQ_STARTED 1 95f844a0eaSJeff Kirsher 96f844a0eaSJeff Kirsher /* 97f844a0eaSJeff Kirsher * DATA STRUCTURES 98f844a0eaSJeff Kirsher */ 99f844a0eaSJeff Kirsher 100f844a0eaSJeff Kirsher /* enums */ 101f844a0eaSJeff Kirsher enum bnad_intr_source { 102f844a0eaSJeff Kirsher BNAD_INTR_TX = 1, 103f844a0eaSJeff Kirsher BNAD_INTR_RX = 2 104f844a0eaSJeff Kirsher }; 105f844a0eaSJeff Kirsher 106f844a0eaSJeff Kirsher enum bnad_link_state { 107f844a0eaSJeff Kirsher BNAD_LS_DOWN = 0, 108f844a0eaSJeff Kirsher BNAD_LS_UP = 1 109f844a0eaSJeff Kirsher }; 110f844a0eaSJeff Kirsher 111f844a0eaSJeff Kirsher struct bnad_completion { 112f844a0eaSJeff Kirsher struct completion ioc_comp; 113f844a0eaSJeff Kirsher struct completion ucast_comp; 114f844a0eaSJeff Kirsher struct completion mcast_comp; 115f844a0eaSJeff Kirsher struct completion tx_comp; 116f844a0eaSJeff Kirsher struct completion rx_comp; 117f844a0eaSJeff Kirsher struct completion stats_comp; 118f844a0eaSJeff Kirsher struct completion port_comp; 119f844a0eaSJeff Kirsher 120f844a0eaSJeff Kirsher u8 ioc_comp_status; 121f844a0eaSJeff Kirsher u8 ucast_comp_status; 122f844a0eaSJeff Kirsher u8 mcast_comp_status; 123f844a0eaSJeff Kirsher u8 tx_comp_status; 124f844a0eaSJeff Kirsher u8 rx_comp_status; 125f844a0eaSJeff Kirsher u8 stats_comp_status; 126f844a0eaSJeff Kirsher u8 port_comp_status; 127f844a0eaSJeff Kirsher }; 128f844a0eaSJeff Kirsher 129f844a0eaSJeff Kirsher /* Tx Rx Control Stats */ 130f844a0eaSJeff Kirsher struct bnad_drv_stats { 131f844a0eaSJeff Kirsher u64 netif_queue_stop; 132f844a0eaSJeff Kirsher u64 netif_queue_wakeup; 133f844a0eaSJeff Kirsher u64 netif_queue_stopped; 134f844a0eaSJeff Kirsher u64 tso4; 135f844a0eaSJeff Kirsher u64 tso6; 136f844a0eaSJeff Kirsher u64 tso_err; 137f844a0eaSJeff Kirsher u64 tcpcsum_offload; 138f844a0eaSJeff Kirsher u64 udpcsum_offload; 139f844a0eaSJeff Kirsher u64 csum_help; 140f844a0eaSJeff Kirsher u64 csum_help_err; 141f844a0eaSJeff Kirsher 142f844a0eaSJeff Kirsher u64 hw_stats_updates; 143f844a0eaSJeff Kirsher u64 netif_rx_schedule; 144f844a0eaSJeff Kirsher u64 netif_rx_complete; 145f844a0eaSJeff Kirsher u64 netif_rx_dropped; 146f844a0eaSJeff Kirsher 147f844a0eaSJeff Kirsher u64 link_toggle; 148f844a0eaSJeff Kirsher u64 cee_up; 149f844a0eaSJeff Kirsher 150f844a0eaSJeff Kirsher u64 rxp_info_alloc_failed; 151f844a0eaSJeff Kirsher u64 mbox_intr_disabled; 152f844a0eaSJeff Kirsher u64 mbox_intr_enabled; 153f844a0eaSJeff Kirsher u64 tx_unmap_q_alloc_failed; 154f844a0eaSJeff Kirsher u64 rx_unmap_q_alloc_failed; 155f844a0eaSJeff Kirsher 156f844a0eaSJeff Kirsher u64 rxbuf_alloc_failed; 157f844a0eaSJeff Kirsher }; 158f844a0eaSJeff Kirsher 159f844a0eaSJeff Kirsher /* Complete driver stats */ 160f844a0eaSJeff Kirsher struct bnad_stats { 161f844a0eaSJeff Kirsher struct bnad_drv_stats drv_stats; 162f844a0eaSJeff Kirsher struct bna_stats *bna_stats; 163f844a0eaSJeff Kirsher }; 164f844a0eaSJeff Kirsher 165f844a0eaSJeff Kirsher /* Tx / Rx Resources */ 166f844a0eaSJeff Kirsher struct bnad_tx_res_info { 167f844a0eaSJeff Kirsher struct bna_res_info res_info[BNA_TX_RES_T_MAX]; 168f844a0eaSJeff Kirsher }; 169f844a0eaSJeff Kirsher 170f844a0eaSJeff Kirsher struct bnad_rx_res_info { 171f844a0eaSJeff Kirsher struct bna_res_info res_info[BNA_RX_RES_T_MAX]; 172f844a0eaSJeff Kirsher }; 173f844a0eaSJeff Kirsher 174f844a0eaSJeff Kirsher struct bnad_tx_info { 175f844a0eaSJeff Kirsher struct bna_tx *tx; /* 1:1 between tx_info & tx */ 176f844a0eaSJeff Kirsher struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX]; 177f844a0eaSJeff Kirsher } ____cacheline_aligned; 178f844a0eaSJeff Kirsher 179f844a0eaSJeff Kirsher struct bnad_rx_info { 180f844a0eaSJeff Kirsher struct bna_rx *rx; /* 1:1 between rx_info & rx */ 181f844a0eaSJeff Kirsher 182f844a0eaSJeff Kirsher struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXPS_PER_RX]; 183f844a0eaSJeff Kirsher } ____cacheline_aligned; 184f844a0eaSJeff Kirsher 185f844a0eaSJeff Kirsher /* Unmap queues for Tx / Rx cleanup */ 186f844a0eaSJeff Kirsher struct bnad_skb_unmap { 187f844a0eaSJeff Kirsher struct sk_buff *skb; 188f844a0eaSJeff Kirsher DEFINE_DMA_UNMAP_ADDR(dma_addr); 189f844a0eaSJeff Kirsher }; 190f844a0eaSJeff Kirsher 191f844a0eaSJeff Kirsher struct bnad_unmap_q { 192f844a0eaSJeff Kirsher u32 producer_index; 193f844a0eaSJeff Kirsher u32 consumer_index; 194f844a0eaSJeff Kirsher u32 q_depth; 195f844a0eaSJeff Kirsher /* This should be the last one */ 196f844a0eaSJeff Kirsher struct bnad_skb_unmap unmap_array[1]; 197f844a0eaSJeff Kirsher }; 198f844a0eaSJeff Kirsher 199f844a0eaSJeff Kirsher /* Bit mask values for bnad->cfg_flags */ 200f844a0eaSJeff Kirsher #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */ 201f844a0eaSJeff Kirsher #define BNAD_CF_PROMISC 0x02 202f844a0eaSJeff Kirsher #define BNAD_CF_ALLMULTI 0x04 203f844a0eaSJeff Kirsher #define BNAD_CF_MSIX 0x08 /* If in MSIx mode */ 204f844a0eaSJeff Kirsher 205f844a0eaSJeff Kirsher /* Defines for run_flags bit-mask */ 206f844a0eaSJeff Kirsher /* Set, tested & cleared using xxx_bit() functions */ 207f844a0eaSJeff Kirsher /* Values indicated bit positions */ 208f844a0eaSJeff Kirsher #define BNAD_RF_CEE_RUNNING 1 209f844a0eaSJeff Kirsher #define BNAD_RF_MBOX_IRQ_DISABLED 2 210f844a0eaSJeff Kirsher #define BNAD_RF_RX_STARTED 3 211f844a0eaSJeff Kirsher #define BNAD_RF_DIM_TIMER_RUNNING 4 212f844a0eaSJeff Kirsher #define BNAD_RF_STATS_TIMER_RUNNING 5 213f844a0eaSJeff Kirsher #define BNAD_RF_TX_SHUTDOWN_DELAYED 6 214f844a0eaSJeff Kirsher #define BNAD_RF_RX_SHUTDOWN_DELAYED 7 215f844a0eaSJeff Kirsher 216f844a0eaSJeff Kirsher struct bnad { 217f844a0eaSJeff Kirsher struct net_device *netdev; 218f844a0eaSJeff Kirsher 219f844a0eaSJeff Kirsher /* Data path */ 220f844a0eaSJeff Kirsher struct bnad_tx_info tx_info[BNAD_MAX_TXS]; 221f844a0eaSJeff Kirsher struct bnad_rx_info rx_info[BNAD_MAX_RXS]; 222f844a0eaSJeff Kirsher 223f844a0eaSJeff Kirsher unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 224f844a0eaSJeff Kirsher /* 225f844a0eaSJeff Kirsher * These q numbers are global only because 226f844a0eaSJeff Kirsher * they are used to calculate MSIx vectors. 227f844a0eaSJeff Kirsher * Actually the exact # of queues are per Tx/Rx 228f844a0eaSJeff Kirsher * object. 229f844a0eaSJeff Kirsher */ 230f844a0eaSJeff Kirsher u32 num_tx; 231f844a0eaSJeff Kirsher u32 num_rx; 232f844a0eaSJeff Kirsher u32 num_txq_per_tx; 233f844a0eaSJeff Kirsher u32 num_rxp_per_rx; 234f844a0eaSJeff Kirsher 235f844a0eaSJeff Kirsher u32 txq_depth; 236f844a0eaSJeff Kirsher u32 rxq_depth; 237f844a0eaSJeff Kirsher 238f844a0eaSJeff Kirsher u8 tx_coalescing_timeo; 239f844a0eaSJeff Kirsher u8 rx_coalescing_timeo; 240f844a0eaSJeff Kirsher 241f844a0eaSJeff Kirsher struct bna_rx_config rx_config[BNAD_MAX_RXS]; 242f844a0eaSJeff Kirsher struct bna_tx_config tx_config[BNAD_MAX_TXS]; 243f844a0eaSJeff Kirsher 244f844a0eaSJeff Kirsher void __iomem *bar0; /* BAR0 address */ 245f844a0eaSJeff Kirsher 246f844a0eaSJeff Kirsher struct bna bna; 247f844a0eaSJeff Kirsher 248f844a0eaSJeff Kirsher u32 cfg_flags; 249f844a0eaSJeff Kirsher unsigned long run_flags; 250f844a0eaSJeff Kirsher 251f844a0eaSJeff Kirsher struct pci_dev *pcidev; 252f844a0eaSJeff Kirsher u64 mmio_start; 253f844a0eaSJeff Kirsher u64 mmio_len; 254f844a0eaSJeff Kirsher 255f844a0eaSJeff Kirsher u32 msix_num; 256f844a0eaSJeff Kirsher struct msix_entry *msix_table; 257f844a0eaSJeff Kirsher 258f844a0eaSJeff Kirsher struct mutex conf_mutex; 259f844a0eaSJeff Kirsher spinlock_t bna_lock ____cacheline_aligned; 260f844a0eaSJeff Kirsher 261f844a0eaSJeff Kirsher /* Timers */ 262f844a0eaSJeff Kirsher struct timer_list ioc_timer; 263f844a0eaSJeff Kirsher struct timer_list dim_timer; 264f844a0eaSJeff Kirsher struct timer_list stats_timer; 265f844a0eaSJeff Kirsher 266f844a0eaSJeff Kirsher /* Control path resources, memory & irq */ 267f844a0eaSJeff Kirsher struct bna_res_info res_info[BNA_RES_T_MAX]; 268f844a0eaSJeff Kirsher struct bnad_tx_res_info tx_res_info[BNAD_MAX_TXS]; 269f844a0eaSJeff Kirsher struct bnad_rx_res_info rx_res_info[BNAD_MAX_RXS]; 270f844a0eaSJeff Kirsher 271f844a0eaSJeff Kirsher struct bnad_completion bnad_completions; 272f844a0eaSJeff Kirsher 273f844a0eaSJeff Kirsher /* Burnt in MAC address */ 274f844a0eaSJeff Kirsher mac_t perm_addr; 275f844a0eaSJeff Kirsher 276f844a0eaSJeff Kirsher struct tasklet_struct tx_free_tasklet; 277f844a0eaSJeff Kirsher 278f844a0eaSJeff Kirsher /* Statistics */ 279f844a0eaSJeff Kirsher struct bnad_stats stats; 280f844a0eaSJeff Kirsher 281f844a0eaSJeff Kirsher struct bnad_diag *diag; 282f844a0eaSJeff Kirsher 283f844a0eaSJeff Kirsher char adapter_name[BNAD_NAME_LEN]; 284f844a0eaSJeff Kirsher char port_name[BNAD_NAME_LEN]; 285f844a0eaSJeff Kirsher char mbox_irq_name[BNAD_NAME_LEN]; 286f844a0eaSJeff Kirsher }; 287f844a0eaSJeff Kirsher 288f844a0eaSJeff Kirsher /* 289f844a0eaSJeff Kirsher * EXTERN VARIABLES 290f844a0eaSJeff Kirsher */ 291f844a0eaSJeff Kirsher extern struct firmware *bfi_fw; 292f844a0eaSJeff Kirsher extern u32 bnad_rxqs_per_cq; 293f844a0eaSJeff Kirsher 294f844a0eaSJeff Kirsher /* 295f844a0eaSJeff Kirsher * EXTERN PROTOTYPES 296f844a0eaSJeff Kirsher */ 297f844a0eaSJeff Kirsher extern u32 *cna_get_firmware_buf(struct pci_dev *pdev); 298f844a0eaSJeff Kirsher /* Netdev entry point prototypes */ 299f844a0eaSJeff Kirsher extern void bnad_set_ethtool_ops(struct net_device *netdev); 300f844a0eaSJeff Kirsher 301f844a0eaSJeff Kirsher /* Configuration & setup */ 302f844a0eaSJeff Kirsher extern void bnad_tx_coalescing_timeo_set(struct bnad *bnad); 303f844a0eaSJeff Kirsher extern void bnad_rx_coalescing_timeo_set(struct bnad *bnad); 304f844a0eaSJeff Kirsher 305f844a0eaSJeff Kirsher extern int bnad_setup_rx(struct bnad *bnad, uint rx_id); 306f844a0eaSJeff Kirsher extern int bnad_setup_tx(struct bnad *bnad, uint tx_id); 307f844a0eaSJeff Kirsher extern void bnad_cleanup_tx(struct bnad *bnad, uint tx_id); 308f844a0eaSJeff Kirsher extern void bnad_cleanup_rx(struct bnad *bnad, uint rx_id); 309f844a0eaSJeff Kirsher 310f844a0eaSJeff Kirsher /* Timer start/stop protos */ 311f844a0eaSJeff Kirsher extern void bnad_dim_timer_start(struct bnad *bnad); 312f844a0eaSJeff Kirsher 313f844a0eaSJeff Kirsher /* Statistics */ 314f844a0eaSJeff Kirsher extern void bnad_netdev_qstats_fill(struct bnad *bnad, 315f844a0eaSJeff Kirsher struct rtnl_link_stats64 *stats); 316f844a0eaSJeff Kirsher extern void bnad_netdev_hwstats_fill(struct bnad *bnad, 317f844a0eaSJeff Kirsher struct rtnl_link_stats64 *stats); 318f844a0eaSJeff Kirsher 319f844a0eaSJeff Kirsher /** 320f844a0eaSJeff Kirsher * MACROS 321f844a0eaSJeff Kirsher */ 322f844a0eaSJeff Kirsher /* To set & get the stats counters */ 323f844a0eaSJeff Kirsher #define BNAD_UPDATE_CTR(_bnad, _ctr) \ 324f844a0eaSJeff Kirsher (((_bnad)->stats.drv_stats._ctr)++) 325f844a0eaSJeff Kirsher 326f844a0eaSJeff Kirsher #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr) 327f844a0eaSJeff Kirsher 328f844a0eaSJeff Kirsher #define bnad_enable_rx_irq_unsafe(_ccb) \ 329f844a0eaSJeff Kirsher { \ 330f844a0eaSJeff Kirsher if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))) {\ 331f844a0eaSJeff Kirsher bna_ib_coalescing_timer_set((_ccb)->i_dbell, \ 332f844a0eaSJeff Kirsher (_ccb)->rx_coalescing_timeo); \ 333f844a0eaSJeff Kirsher bna_ib_ack((_ccb)->i_dbell, 0); \ 334f844a0eaSJeff Kirsher } \ 335f844a0eaSJeff Kirsher } 336f844a0eaSJeff Kirsher 337f844a0eaSJeff Kirsher #define bnad_dim_timer_running(_bnad) \ 338f844a0eaSJeff Kirsher (((_bnad)->cfg_flags & BNAD_CF_DIM_ENABLED) && \ 339f844a0eaSJeff Kirsher (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &((_bnad)->run_flags)))) 340f844a0eaSJeff Kirsher 341f844a0eaSJeff Kirsher #endif /* __BNAD_H__ */ 342