1 /* 2 * Linux network driver for Brocade Converged Network Adapter. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License (GPL) Version 2 as 6 * published by the Free Software Foundation 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * General Public License for more details. 12 */ 13 /* 14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 15 * All rights reserved 16 * www.brocade.com 17 */ 18 19 #ifndef __BFI_H__ 20 #define __BFI_H__ 21 22 #include "bfa_defs.h" 23 24 #pragma pack(1) 25 26 /** 27 * BFI FW image type 28 */ 29 #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */ 30 #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) 31 enum { 32 BFI_IMAGE_CB_FC, 33 BFI_IMAGE_CT_FC, 34 BFI_IMAGE_CT_CNA, 35 BFI_IMAGE_MAX, 36 }; 37 38 /** 39 * Msg header common to all msgs 40 */ 41 struct bfi_mhdr { 42 u8 msg_class; /*!< @ref enum bfi_mclass */ 43 u8 msg_id; /*!< msg opcode with in the class */ 44 union { 45 struct { 46 u8 qid; 47 u8 fn_lpu; /*!< msg destination */ 48 } h2i; 49 u16 i2htok; /*!< token in msgs to host */ 50 } mtag; 51 }; 52 53 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu)) 54 #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1) 55 #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid) 56 57 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \ 58 (_mh).msg_class = (_mc); \ 59 (_mh).msg_id = (_op); \ 60 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \ 61 } while (0) 62 63 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \ 64 (_mh).msg_class = (_mc); \ 65 (_mh).msg_id = (_op); \ 66 (_mh).mtag.i2htok = (_i2htok); \ 67 } while (0) 68 69 /* 70 * Message opcodes: 0-127 to firmware, 128-255 to host 71 */ 72 #define BFI_I2H_OPCODE_BASE 128 73 #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE) 74 75 /** 76 **************************************************************************** 77 * 78 * Scatter Gather Element and Page definition 79 * 80 **************************************************************************** 81 */ 82 83 #define BFI_SGE_INLINE 1 84 #define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1) 85 86 /** 87 * SG Flags 88 */ 89 enum { 90 BFI_SGE_DATA = 0, /*!< data address, not last */ 91 BFI_SGE_DATA_CPL = 1, /*!< data addr, last in current page */ 92 BFI_SGE_DATA_LAST = 3, /*!< data address, last */ 93 BFI_SGE_LINK = 2, /*!< link address */ 94 BFI_SGE_PGDLEN = 2, /*!< cumulative data length for page */ 95 }; 96 97 /** 98 * DMA addresses 99 */ 100 union bfi_addr_u { 101 struct { 102 u32 addr_lo; 103 u32 addr_hi; 104 } a32; 105 }; 106 107 /** 108 * Scatter Gather Element 109 */ 110 struct bfi_sge { 111 #ifdef __BIGENDIAN 112 u32 flags:2, 113 rsvd:2, 114 sg_len:28; 115 #else 116 u32 sg_len:28, 117 rsvd:2, 118 flags:2; 119 #endif 120 union bfi_addr_u sga; 121 }; 122 123 /** 124 * Scatter Gather Page 125 */ 126 #define BFI_SGPG_DATA_SGES 7 127 #define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1) 128 #define BFI_SGPG_RSVD_WD_LEN 8 129 struct bfi_sgpg { 130 struct bfi_sge sges[BFI_SGPG_SGES_MAX]; 131 u32 rsvd[BFI_SGPG_RSVD_WD_LEN]; 132 }; 133 134 /* 135 * Large Message structure - 128 Bytes size Msgs 136 */ 137 #define BFI_LMSG_SZ 128 138 #define BFI_LMSG_PL_WSZ \ 139 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4) 140 141 struct bfi_msg { 142 struct bfi_mhdr mhdr; 143 u32 pl[BFI_LMSG_PL_WSZ]; 144 }; 145 146 /** 147 * Mailbox message structure 148 */ 149 #define BFI_MBMSG_SZ 7 150 struct bfi_mbmsg { 151 struct bfi_mhdr mh; 152 u32 pl[BFI_MBMSG_SZ]; 153 }; 154 155 /** 156 * Supported PCI function class codes (personality) 157 */ 158 enum bfi_pcifn_class { 159 BFI_PCIFN_CLASS_FC = 0x0c04, 160 BFI_PCIFN_CLASS_ETH = 0x0200, 161 }; 162 163 /** 164 * Message Classes 165 */ 166 enum bfi_mclass { 167 BFI_MC_IOC = 1, /*!< IO Controller (IOC) */ 168 BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */ 169 BFI_MC_FLASH = 3, /*!< Flash message class */ 170 BFI_MC_CEE = 4, /*!< CEE */ 171 BFI_MC_FCPORT = 5, /*!< FC port */ 172 BFI_MC_IOCFC = 6, /*!< FC - IO Controller (IOC) */ 173 BFI_MC_LL = 7, /*!< Link Layer */ 174 BFI_MC_UF = 8, /*!< Unsolicited frame receive */ 175 BFI_MC_FCXP = 9, /*!< FC Transport */ 176 BFI_MC_LPS = 10, /*!< lport fc login services */ 177 BFI_MC_RPORT = 11, /*!< Remote port */ 178 BFI_MC_ITNIM = 12, /*!< I-T nexus (Initiator mode) */ 179 BFI_MC_IOIM_READ = 13, /*!< read IO (Initiator mode) */ 180 BFI_MC_IOIM_WRITE = 14, /*!< write IO (Initiator mode) */ 181 BFI_MC_IOIM_IO = 15, /*!< IO (Initiator mode) */ 182 BFI_MC_IOIM = 16, /*!< IO (Initiator mode) */ 183 BFI_MC_IOIM_IOCOM = 17, /*!< good IO completion */ 184 BFI_MC_TSKIM = 18, /*!< Initiator Task management */ 185 BFI_MC_SBOOT = 19, /*!< SAN boot services */ 186 BFI_MC_IPFC = 20, /*!< IP over FC Msgs */ 187 BFI_MC_PORT = 21, /*!< Physical port */ 188 BFI_MC_SFP = 22, /*!< SFP module */ 189 BFI_MC_MSGQ = 23, /*!< MSGQ */ 190 BFI_MC_ENET = 24, /*!< ENET commands/responses */ 191 BFI_MC_MAX = 32 192 }; 193 194 #define BFI_IOC_MAX_CQS 4 195 #define BFI_IOC_MAX_CQS_ASIC 8 196 #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */ 197 198 #define BFI_BOOT_TYPE_OFF 8 199 #define BFI_BOOT_LOADER_OFF 12 200 201 #define BFI_BOOT_TYPE_NORMAL 0 202 #define BFI_BOOT_TYPE_FLASH 1 203 #define BFI_BOOT_TYPE_MEMTEST 2 204 205 #define BFI_BOOT_LOADER_OS 0 206 207 #define BFI_FWBOOT_ENV_OS 0 208 209 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900 210 #define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3 211 212 /** 213 *---------------------------------------------------------------------- 214 * IOC 215 *---------------------------------------------------------------------- 216 */ 217 218 /** 219 * Different asic generations 220 */ 221 enum bfi_asic_gen { 222 BFI_ASIC_GEN_CB = 1, 223 BFI_ASIC_GEN_CT = 2, 224 }; 225 226 enum bfi_asic_mode { 227 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */ 228 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */ 229 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */ 230 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */ 231 }; 232 233 enum bfi_ioc_h2i_msgs { 234 BFI_IOC_H2I_ENABLE_REQ = 1, 235 BFI_IOC_H2I_DISABLE_REQ = 2, 236 BFI_IOC_H2I_GETATTR_REQ = 3, 237 BFI_IOC_H2I_DBG_SYNC = 4, 238 BFI_IOC_H2I_DBG_DUMP = 5, 239 }; 240 241 enum bfi_ioc_i2h_msgs { 242 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1), 243 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2), 244 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3), 245 BFI_IOC_I2H_HBEAT = BFA_I2HM(4), 246 }; 247 248 /** 249 * BFI_IOC_H2I_GETATTR_REQ message 250 */ 251 struct bfi_ioc_getattr_req { 252 struct bfi_mhdr mh; 253 union bfi_addr_u attr_addr; 254 }; 255 256 struct bfi_ioc_attr { 257 u64 mfg_pwwn; /*!< Mfg port wwn */ 258 u64 mfg_nwwn; /*!< Mfg node wwn */ 259 mac_t mfg_mac; /*!< Mfg mac */ 260 u8 port_mode; /* enum bfi_port_mode */ 261 u8 rsvd_a; 262 u64 pwwn; 263 u64 nwwn; 264 mac_t mac; /*!< PBC or Mfg mac */ 265 u16 rsvd_b; 266 mac_t fcoe_mac; 267 u16 rsvd_c; 268 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 269 u8 pcie_gen; 270 u8 pcie_lanes_orig; 271 u8 pcie_lanes; 272 u8 rx_bbcredit; /*!< receive buffer credits */ 273 u32 adapter_prop; /*!< adapter properties */ 274 u16 maxfrsize; /*!< max receive frame size */ 275 char asic_rev; 276 u8 rsvd_d; 277 char fw_version[BFA_VERSION_LEN]; 278 char optrom_version[BFA_VERSION_LEN]; 279 struct bfa_mfg_vpd vpd; 280 u32 card_type; /*!< card type */ 281 }; 282 283 /** 284 * BFI_IOC_I2H_GETATTR_REPLY message 285 */ 286 struct bfi_ioc_getattr_reply { 287 struct bfi_mhdr mh; /*!< Common msg header */ 288 u8 status; /*!< cfg reply status */ 289 u8 rsvd[3]; 290 }; 291 292 /** 293 * Firmware memory page offsets 294 */ 295 #define BFI_IOC_SMEM_PG0_CB (0x40) 296 #define BFI_IOC_SMEM_PG0_CT (0x180) 297 298 /** 299 * Firmware statistic offset 300 */ 301 #define BFI_IOC_FWSTATS_OFF (0x6B40) 302 #define BFI_IOC_FWSTATS_SZ (4096) 303 304 /** 305 * Firmware trace offset 306 */ 307 #define BFI_IOC_TRC_OFF (0x4b00) 308 #define BFI_IOC_TRC_ENTS 256 309 310 #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) 311 #define BFI_IOC_MD5SUM_SZ 4 312 struct bfi_ioc_image_hdr { 313 u32 signature; /*!< constant signature */ 314 u8 asic_gen; /*!< asic generation */ 315 u8 asic_mode; 316 u8 port0_mode; /*!< device mode for port 0 */ 317 u8 port1_mode; /*!< device mode for port 1 */ 318 u32 exec; /*!< exec vector */ 319 u32 bootenv; /*!< firmware boot env */ 320 u32 rsvd_b[4]; 321 u32 md5sum[BFI_IOC_MD5SUM_SZ]; 322 }; 323 324 #define BFI_FWBOOT_DEVMODE_OFF 4 325 #define BFI_FWBOOT_TYPE_OFF 8 326 #define BFI_FWBOOT_ENV_OFF 12 327 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \ 328 (((u32)(__asic_gen)) << 24 | \ 329 ((u32)(__asic_mode)) << 16 | \ 330 ((u32)(__p0_mode)) << 8 | \ 331 ((u32)(__p1_mode))) 332 333 enum bfi_fwboot_type { 334 BFI_FWBOOT_TYPE_NORMAL = 0, 335 BFI_FWBOOT_TYPE_FLASH = 1, 336 BFI_FWBOOT_TYPE_MEMTEST = 2, 337 }; 338 339 enum bfi_port_mode { 340 BFI_PORT_MODE_FC = 1, 341 BFI_PORT_MODE_ETH = 2, 342 }; 343 344 /** 345 * BFI_IOC_I2H_READY_EVENT message 346 */ 347 struct bfi_ioc_rdy_event { 348 struct bfi_mhdr mh; /*!< common msg header */ 349 u8 init_status; /*!< init event status */ 350 u8 rsvd[3]; 351 }; 352 353 struct bfi_ioc_hbeat { 354 struct bfi_mhdr mh; /*!< common msg header */ 355 u32 hb_count; /*!< current heart beat count */ 356 }; 357 358 /** 359 * IOC hardware/firmware state 360 */ 361 enum bfi_ioc_state { 362 BFI_IOC_UNINIT = 0, /*!< not initialized */ 363 BFI_IOC_INITING = 1, /*!< h/w is being initialized */ 364 BFI_IOC_HWINIT = 2, /*!< h/w is initialized */ 365 BFI_IOC_CFG = 3, /*!< IOC configuration in progress */ 366 BFI_IOC_OP = 4, /*!< IOC is operational */ 367 BFI_IOC_DISABLING = 5, /*!< IOC is being disabled */ 368 BFI_IOC_DISABLED = 6, /*!< IOC is disabled */ 369 BFI_IOC_CFG_DISABLED = 7, /*!< IOC is being disabled;transient */ 370 BFI_IOC_FAIL = 8, /*!< IOC heart-beat failure */ 371 BFI_IOC_MEMTEST = 9, /*!< IOC is doing memtest */ 372 }; 373 374 #define BFI_IOC_ENDIAN_SIG 0x12345678 375 376 enum { 377 BFI_ADAPTER_TYPE_FC = 0x01, /*!< FC adapters */ 378 BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask */ 379 BFI_ADAPTER_TYPE_SH = 16, /*!< adapter type shift */ 380 BFI_ADAPTER_NPORTS_MK = 0xff00, /*!< number of ports mask */ 381 BFI_ADAPTER_NPORTS_SH = 8, /*!< number of ports shift */ 382 BFI_ADAPTER_SPEED_MK = 0xff, /*!< adapter speed mask */ 383 BFI_ADAPTER_SPEED_SH = 0, /*!< adapter speed shift */ 384 BFI_ADAPTER_PROTO = 0x100000, /*!< prototype adapaters */ 385 BFI_ADAPTER_TTV = 0x200000, /*!< TTV debug capable */ 386 BFI_ADAPTER_UNSUPP = 0x400000, /*!< unknown adapter type */ 387 }; 388 389 #define BFI_ADAPTER_GETP(__prop, __adap_prop) \ 390 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \ 391 BFI_ADAPTER_ ## __prop ## _SH) 392 #define BFI_ADAPTER_SETP(__prop, __val) \ 393 ((__val) << BFI_ADAPTER_ ## __prop ## _SH) 394 #define BFI_ADAPTER_IS_PROTO(__adap_type) \ 395 ((__adap_type) & BFI_ADAPTER_PROTO) 396 #define BFI_ADAPTER_IS_TTV(__adap_type) \ 397 ((__adap_type) & BFI_ADAPTER_TTV) 398 #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \ 399 ((__adap_type) & BFI_ADAPTER_UNSUPP) 400 #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \ 401 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \ 402 BFI_ADAPTER_UNSUPP)) 403 404 /** 405 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages 406 */ 407 struct bfi_ioc_ctrl_req { 408 struct bfi_mhdr mh; 409 u16 clscode; 410 u16 rsvd; 411 u32 tv_sec; 412 }; 413 414 /** 415 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages 416 */ 417 struct bfi_ioc_ctrl_reply { 418 struct bfi_mhdr mh; /*!< Common msg header */ 419 u8 status; /*!< enable/disable status */ 420 u8 port_mode; /*!< enum bfa_mode */ 421 u8 cap_bm; /*!< capability bit mask */ 422 u8 rsvd; 423 }; 424 425 #define BFI_IOC_MSGSZ 8 426 /** 427 * H2I Messages 428 */ 429 union bfi_ioc_h2i_msg_u { 430 struct bfi_mhdr mh; 431 struct bfi_ioc_ctrl_req enable_req; 432 struct bfi_ioc_ctrl_req disable_req; 433 struct bfi_ioc_getattr_req getattr_req; 434 u32 mboxmsg[BFI_IOC_MSGSZ]; 435 }; 436 437 /** 438 * I2H Messages 439 */ 440 union bfi_ioc_i2h_msg_u { 441 struct bfi_mhdr mh; 442 struct bfi_ioc_ctrl_reply fw_event; 443 u32 mboxmsg[BFI_IOC_MSGSZ]; 444 }; 445 446 /** 447 *---------------------------------------------------------------------- 448 * MSGQ 449 *---------------------------------------------------------------------- 450 */ 451 452 enum bfi_msgq_h2i_msgs { 453 BFI_MSGQ_H2I_INIT_REQ = 1, 454 BFI_MSGQ_H2I_DOORBELL_PI = 2, 455 BFI_MSGQ_H2I_DOORBELL_CI = 3, 456 BFI_MSGQ_H2I_CMDQ_COPY_RSP = 4, 457 }; 458 459 enum bfi_msgq_i2h_msgs { 460 BFI_MSGQ_I2H_INIT_RSP = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ), 461 BFI_MSGQ_I2H_DOORBELL_PI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI), 462 BFI_MSGQ_I2H_DOORBELL_CI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI), 463 BFI_MSGQ_I2H_CMDQ_COPY_REQ = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP), 464 }; 465 466 /* Messages(commands/responsed/AENS will have the following header */ 467 struct bfi_msgq_mhdr { 468 u8 msg_class; 469 u8 msg_id; 470 u16 msg_token; 471 u16 num_entries; 472 u8 enet_id; 473 u8 rsvd[1]; 474 }; 475 476 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \ 477 (_mh).msg_class = (_mc); \ 478 (_mh).msg_id = (_mid); \ 479 (_mh).msg_token = (_tok); \ 480 (_mh).enet_id = (_enet_id); \ 481 } while (0) 482 483 /* 484 * Mailbox for messaging interface 485 */ 486 #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */ 487 #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */ 488 489 #define bfi_msgq_num_cmd_entries(_size) \ 490 (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE) 491 492 struct bfi_msgq { 493 union bfi_addr_u addr; 494 u16 q_depth; /* Total num of entries in the queue */ 495 u8 rsvd[2]; 496 }; 497 498 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */ 499 struct bfi_msgq_cfg_req { 500 struct bfi_mhdr mh; 501 struct bfi_msgq cmdq; 502 struct bfi_msgq rspq; 503 }; 504 505 /* BFI_ENET_MSGQ_CFG_RSP */ 506 struct bfi_msgq_cfg_rsp { 507 struct bfi_mhdr mh; 508 u8 cmd_status; 509 u8 rsvd[3]; 510 }; 511 512 /* BFI_MSGQ_H2I_DOORBELL */ 513 struct bfi_msgq_h2i_db { 514 struct bfi_mhdr mh; 515 union { 516 u16 cmdq_pi; 517 u16 rspq_ci; 518 } idx; 519 }; 520 521 /* BFI_MSGQ_I2H_DOORBELL */ 522 struct bfi_msgq_i2h_db { 523 struct bfi_mhdr mh; 524 union { 525 u16 rspq_pi; 526 u16 cmdq_ci; 527 } idx; 528 }; 529 530 #define BFI_CMD_COPY_SZ 28 531 532 /* BFI_MSGQ_H2I_CMD_COPY_RSP */ 533 struct bfi_msgq_h2i_cmdq_copy_rsp { 534 struct bfi_mhdr mh; 535 u8 data[BFI_CMD_COPY_SZ]; 536 }; 537 538 /* BFI_MSGQ_I2H_CMD_COPY_REQ */ 539 struct bfi_msgq_i2h_cmdq_copy_req { 540 struct bfi_mhdr mh; 541 u16 offset; 542 u16 len; 543 }; 544 545 #pragma pack() 546 547 #endif /* __BFI_H__ */ 548