1 /* 2 * Linux network driver for QLogic BR-series Converged Network Adapter. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License (GPL) Version 2 as 6 * published by the Free Software Foundation 7 * 8 * This program is distributed in the hope that it will be useful, but 9 * WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11 * General Public License for more details. 12 */ 13 /* 14 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc. 15 * Copyright (c) 2014-2015 QLogic Corporation 16 * All rights reserved 17 * www.qlogic.com 18 */ 19 20 #ifndef __BFA_DEFS_H__ 21 #define __BFA_DEFS_H__ 22 23 #include "cna.h" 24 #include "bfa_defs_status.h" 25 #include "bfa_defs_mfg_comm.h" 26 27 #define BFA_VERSION_LEN 64 28 29 /* ---------------------- adapter definitions ------------ */ 30 31 /* BFA adapter level attributes. */ 32 enum { 33 BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE), 34 /* 35 *!< adapter serial num length 36 */ 37 BFA_ADAPTER_MODEL_NAME_LEN = 16, /*!< model name length */ 38 BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*!< model description length */ 39 BFA_ADAPTER_MFG_NAME_LEN = 8, /*!< manufacturer name length */ 40 BFA_ADAPTER_SYM_NAME_LEN = 64, /*!< adapter symbolic name length */ 41 BFA_ADAPTER_OS_TYPE_LEN = 64, /*!< adapter os type length */ 42 }; 43 44 struct bfa_adapter_attr { 45 char manufacturer[BFA_ADAPTER_MFG_NAME_LEN]; 46 char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; 47 u32 card_type; 48 char model[BFA_ADAPTER_MODEL_NAME_LEN]; 49 char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN]; 50 u64 pwwn; 51 char node_symname[FC_SYMNAME_MAX]; 52 char hw_ver[BFA_VERSION_LEN]; 53 char fw_ver[BFA_VERSION_LEN]; 54 char optrom_ver[BFA_VERSION_LEN]; 55 char os_type[BFA_ADAPTER_OS_TYPE_LEN]; 56 struct bfa_mfg_vpd vpd; 57 u8 mac[ETH_ALEN]; 58 59 u8 nports; 60 u8 max_speed; 61 u8 prototype; 62 char asic_rev; 63 64 u8 pcie_gen; 65 u8 pcie_lanes_orig; 66 u8 pcie_lanes; 67 u8 cna_capable; 68 69 u8 is_mezz; 70 u8 trunk_capable; 71 }; 72 73 /* ---------------------- IOC definitions ------------ */ 74 75 enum { 76 BFA_IOC_DRIVER_LEN = 16, 77 BFA_IOC_CHIP_REV_LEN = 8, 78 }; 79 80 /* Driver and firmware versions. */ 81 struct bfa_ioc_driver_attr { 82 char driver[BFA_IOC_DRIVER_LEN]; /*!< driver name */ 83 char driver_ver[BFA_VERSION_LEN]; /*!< driver version */ 84 char fw_ver[BFA_VERSION_LEN]; /*!< firmware version */ 85 char bios_ver[BFA_VERSION_LEN]; /*!< bios version */ 86 char efi_ver[BFA_VERSION_LEN]; /*!< EFI version */ 87 char ob_ver[BFA_VERSION_LEN]; /*!< openboot version */ 88 }; 89 90 /* IOC PCI device attributes */ 91 struct bfa_ioc_pci_attr { 92 u16 vendor_id; /*!< PCI vendor ID */ 93 u16 device_id; /*!< PCI device ID */ 94 u16 ssid; /*!< subsystem ID */ 95 u16 ssvid; /*!< subsystem vendor ID */ 96 u32 pcifn; /*!< PCI device function */ 97 u32 rsvd; /* padding */ 98 char chip_rev[BFA_IOC_CHIP_REV_LEN]; /*!< chip revision */ 99 }; 100 101 /* IOC states */ 102 enum bfa_ioc_state { 103 BFA_IOC_UNINIT = 1, /*!< IOC is in uninit state */ 104 BFA_IOC_RESET = 2, /*!< IOC is in reset state */ 105 BFA_IOC_SEMWAIT = 3, /*!< Waiting for IOC h/w semaphore */ 106 BFA_IOC_HWINIT = 4, /*!< IOC h/w is being initialized */ 107 BFA_IOC_GETATTR = 5, /*!< IOC is being configured */ 108 BFA_IOC_OPERATIONAL = 6, /*!< IOC is operational */ 109 BFA_IOC_INITFAIL = 7, /*!< IOC hardware failure */ 110 BFA_IOC_FAIL = 8, /*!< IOC heart-beat failure */ 111 BFA_IOC_DISABLING = 9, /*!< IOC is being disabled */ 112 BFA_IOC_DISABLED = 10, /*!< IOC is disabled */ 113 BFA_IOC_FWMISMATCH = 11, /*!< IOC f/w different from drivers */ 114 BFA_IOC_ENABLING = 12, /*!< IOC is being enabled */ 115 BFA_IOC_HWFAIL = 13, /*!< PCI mapping doesn't exist */ 116 }; 117 118 /* IOC firmware stats */ 119 struct bfa_fw_ioc_stats { 120 u32 enable_reqs; 121 u32 disable_reqs; 122 u32 get_attr_reqs; 123 u32 dbg_sync; 124 u32 dbg_dump; 125 u32 unknown_reqs; 126 }; 127 128 /* IOC driver stats */ 129 struct bfa_ioc_drv_stats { 130 u32 ioc_isrs; 131 u32 ioc_enables; 132 u32 ioc_disables; 133 u32 ioc_hbfails; 134 u32 ioc_boots; 135 u32 stats_tmos; 136 u32 hb_count; 137 u32 disable_reqs; 138 u32 enable_reqs; 139 u32 disable_replies; 140 u32 enable_replies; 141 u32 rsvd; 142 }; 143 144 /* IOC statistics */ 145 struct bfa_ioc_stats { 146 struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */ 147 struct bfa_fw_ioc_stats fw_stats; /*!< firmware IOC stats */ 148 }; 149 150 enum bfa_ioc_type { 151 BFA_IOC_TYPE_FC = 1, 152 BFA_IOC_TYPE_FCoE = 2, 153 BFA_IOC_TYPE_LL = 3, 154 }; 155 156 /* IOC attributes returned in queries */ 157 struct bfa_ioc_attr { 158 enum bfa_ioc_type ioc_type; 159 enum bfa_ioc_state state; /*!< IOC state */ 160 struct bfa_adapter_attr adapter_attr; /*!< HBA attributes */ 161 struct bfa_ioc_driver_attr driver_attr; /*!< driver attr */ 162 struct bfa_ioc_pci_attr pci_attr; 163 u8 port_id; /*!< port number */ 164 u8 port_mode; /*!< enum bfa_mode */ 165 u8 cap_bm; /*!< capability */ 166 u8 port_mode_cfg; /*!< enum bfa_mode */ 167 u8 def_fn; /*!< 1 if default fn */ 168 u8 rsvd[3]; /*!< 64bit align */ 169 }; 170 171 /* Adapter capability mask definition */ 172 enum { 173 BFA_CM_HBA = 0x01, 174 BFA_CM_CNA = 0x02, 175 BFA_CM_NIC = 0x04, 176 }; 177 178 /* ---------------------- mfg definitions ------------ */ 179 180 /* Checksum size */ 181 #define BFA_MFG_CHKSUM_SIZE 16 182 183 #define BFA_MFG_PARTNUM_SIZE 14 184 #define BFA_MFG_SUPPLIER_ID_SIZE 10 185 #define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20 186 #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20 187 #define BFA_MFG_SUPPLIER_REVISION_SIZE 4 188 189 /* BFA adapter manufacturing block definition. 190 * 191 * All numerical fields are in big-endian format. 192 */ 193 struct bfa_mfg_block { 194 u8 version; /* manufacturing block version */ 195 u8 mfg_sig[3]; /* characters 'M', 'F', 'G' */ 196 u16 mfgsize; /* mfg block size */ 197 u16 u16_chksum; /* old u16 checksum */ 198 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 199 char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)]; 200 u8 mfg_day; /* manufacturing day */ 201 u8 mfg_month; /* manufacturing month */ 202 u16 mfg_year; /* manufacturing year */ 203 u64 mfg_wwn; /* wwn base for this adapter */ 204 u8 num_wwn; /* number of wwns assigned */ 205 u8 mfg_speeds; /* speeds allowed for this adapter */ 206 u8 rsv[2]; 207 char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)]; 208 char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)]; 209 char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)]; 210 char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)]; 211 u8 mfg_mac[ETH_ALEN]; /* base mac address */ 212 u8 num_mac; /* number of mac addresses */ 213 u8 rsv2; 214 u32 card_type; /* card type */ 215 char cap_nic; /* capability nic */ 216 char cap_cna; /* capability cna */ 217 char cap_hba; /* capability hba */ 218 char cap_fc16g; /* capability fc 16g */ 219 char cap_sriov; /* capability sriov */ 220 char cap_mezz; /* capability mezz */ 221 u8 rsv3; 222 u8 mfg_nports; /* number of ports */ 223 char media[8]; /* xfi/xaui */ 224 char initial_mode[8]; /* initial mode: hba/cna/nic */ 225 u8 rsv4[84]; 226 u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /* md5 checksum */ 227 } __packed; 228 229 /* ---------------------- pci definitions ------------ */ 230 231 /* 232 * PCI device ID information 233 */ 234 enum { 235 BFA_PCI_DEVICE_ID_CT2 = 0x22, 236 }; 237 238 #define bfa_asic_id_ct(device) \ 239 ((device) == PCI_DEVICE_ID_BROCADE_CT || \ 240 (device) == PCI_DEVICE_ID_BROCADE_CT_FC) 241 #define bfa_asic_id_ct2(device) \ 242 ((device) == BFA_PCI_DEVICE_ID_CT2) 243 #define bfa_asic_id_ctc(device) \ 244 (bfa_asic_id_ct(device) || bfa_asic_id_ct2(device)) 245 246 /* PCI sub-system device and vendor ID information */ 247 enum { 248 BFA_PCI_FCOE_SSDEVICE_ID = 0x14, 249 BFA_PCI_CT2_SSID_FCoE = 0x22, 250 BFA_PCI_CT2_SSID_ETH = 0x23, 251 BFA_PCI_CT2_SSID_FC = 0x24, 252 }; 253 254 enum bfa_mode { 255 BFA_MODE_HBA = 1, 256 BFA_MODE_CNA = 2, 257 BFA_MODE_NIC = 3 258 }; 259 260 /* 261 * Flash module specific 262 */ 263 #define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */ 264 #define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */ 265 #define BFA_TOTAL_FLASH_SIZE 0x400000 266 #define BFA_FLASH_PART_FWIMG 2 267 #define BFA_FLASH_PART_MFG 7 268 269 /* 270 * flash partition attributes 271 */ 272 struct bfa_flash_part_attr { 273 u32 part_type; /* partition type */ 274 u32 part_instance; /* partition instance */ 275 u32 part_off; /* partition offset */ 276 u32 part_size; /* partition size */ 277 u32 part_len; /* partition content length */ 278 u32 part_status; /* partition status */ 279 char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24]; 280 }; 281 282 /* 283 * flash attributes 284 */ 285 struct bfa_flash_attr { 286 u32 status; /* flash overall status */ 287 u32 npart; /* num of partitions */ 288 struct bfa_flash_part_attr part[BFA_FLASH_PART_MAX]; 289 }; 290 291 #endif /* __BFA_DEFS_H__ */ 292