1 /*
2  * Linux network driver for QLogic BR-series Converged Network Adapter.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License (GPL) Version 2 as
6  * published by the Free Software Foundation
7  *
8  * This program is distributed in the hope that it will be useful, but
9  * WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
11  * General Public License for more details.
12  */
13 /*
14  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
15  * Copyright (c) 2014-2015 QLogic Corporation
16  * All rights reserved
17  * www.qlogic.com
18  */
19 
20 #ifndef __BFA_DEFS_H__
21 #define __BFA_DEFS_H__
22 
23 #include "cna.h"
24 #include "bfa_defs_status.h"
25 #include "bfa_defs_mfg_comm.h"
26 
27 #define BFA_STRING_32	32
28 #define BFA_VERSION_LEN 64
29 
30 /* ---------------------- adapter definitions ------------ */
31 
32 /* BFA adapter level attributes. */
33 enum {
34 	BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
35 					/*
36 					 *!< adapter serial num length
37 					 */
38 	BFA_ADAPTER_MODEL_NAME_LEN  = 16,  /*!< model name length */
39 	BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*!< model description length */
40 	BFA_ADAPTER_MFG_NAME_LEN    = 8,   /*!< manufacturer name length */
41 	BFA_ADAPTER_SYM_NAME_LEN    = 64,  /*!< adapter symbolic name length */
42 	BFA_ADAPTER_OS_TYPE_LEN	    = 64,  /*!< adapter os type length */
43 };
44 
45 struct bfa_adapter_attr {
46 	char		manufacturer[BFA_ADAPTER_MFG_NAME_LEN];
47 	char		serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
48 	u32	card_type;
49 	char		model[BFA_ADAPTER_MODEL_NAME_LEN];
50 	char		model_descr[BFA_ADAPTER_MODEL_DESCR_LEN];
51 	u64		pwwn;
52 	char		node_symname[FC_SYMNAME_MAX];
53 	char		hw_ver[BFA_VERSION_LEN];
54 	char		fw_ver[BFA_VERSION_LEN];
55 	char		optrom_ver[BFA_VERSION_LEN];
56 	char		os_type[BFA_ADAPTER_OS_TYPE_LEN];
57 	struct bfa_mfg_vpd vpd;
58 	struct mac mac;
59 
60 	u8		nports;
61 	u8		max_speed;
62 	u8		prototype;
63 	char	        asic_rev;
64 
65 	u8		pcie_gen;
66 	u8		pcie_lanes_orig;
67 	u8		pcie_lanes;
68 	u8	        cna_capable;
69 
70 	u8		is_mezz;
71 	u8		trunk_capable;
72 };
73 
74 /* ---------------------- IOC definitions ------------ */
75 
76 enum {
77 	BFA_IOC_DRIVER_LEN	= 16,
78 	BFA_IOC_CHIP_REV_LEN	= 8,
79 };
80 
81 /* Driver and firmware versions. */
82 struct bfa_ioc_driver_attr {
83 	char		driver[BFA_IOC_DRIVER_LEN];	/*!< driver name */
84 	char		driver_ver[BFA_VERSION_LEN];	/*!< driver version */
85 	char		fw_ver[BFA_VERSION_LEN];	/*!< firmware version */
86 	char		bios_ver[BFA_VERSION_LEN];	/*!< bios version */
87 	char		efi_ver[BFA_VERSION_LEN];	/*!< EFI version */
88 	char		ob_ver[BFA_VERSION_LEN];	/*!< openboot version */
89 };
90 
91 /* IOC PCI device attributes */
92 struct bfa_ioc_pci_attr {
93 	u16	vendor_id;	/*!< PCI vendor ID */
94 	u16	device_id;	/*!< PCI device ID */
95 	u16	ssid;		/*!< subsystem ID */
96 	u16	ssvid;		/*!< subsystem vendor ID */
97 	u32	pcifn;		/*!< PCI device function */
98 	u32	rsvd;		/* padding */
99 	char		chip_rev[BFA_IOC_CHIP_REV_LEN];	 /*!< chip revision */
100 };
101 
102 /* IOC states */
103 enum bfa_ioc_state {
104 	BFA_IOC_UNINIT		= 1,	/*!< IOC is in uninit state */
105 	BFA_IOC_RESET		= 2,	/*!< IOC is in reset state */
106 	BFA_IOC_SEMWAIT		= 3,	/*!< Waiting for IOC h/w semaphore */
107 	BFA_IOC_HWINIT		= 4,	/*!< IOC h/w is being initialized */
108 	BFA_IOC_GETATTR		= 5,	/*!< IOC is being configured */
109 	BFA_IOC_OPERATIONAL	= 6,	/*!< IOC is operational */
110 	BFA_IOC_INITFAIL	= 7,	/*!< IOC hardware failure */
111 	BFA_IOC_FAIL		= 8,	/*!< IOC heart-beat failure */
112 	BFA_IOC_DISABLING	= 9,	/*!< IOC is being disabled */
113 	BFA_IOC_DISABLED	= 10,	/*!< IOC is disabled */
114 	BFA_IOC_FWMISMATCH	= 11,	/*!< IOC f/w different from drivers */
115 	BFA_IOC_ENABLING	= 12,	/*!< IOC is being enabled */
116 	BFA_IOC_HWFAIL		= 13,	/*!< PCI mapping doesn't exist */
117 };
118 
119 /* IOC firmware stats */
120 struct bfa_fw_ioc_stats {
121 	u32	enable_reqs;
122 	u32	disable_reqs;
123 	u32	get_attr_reqs;
124 	u32	dbg_sync;
125 	u32	dbg_dump;
126 	u32	unknown_reqs;
127 };
128 
129 /* IOC driver stats */
130 struct bfa_ioc_drv_stats {
131 	u32	ioc_isrs;
132 	u32	ioc_enables;
133 	u32	ioc_disables;
134 	u32	ioc_hbfails;
135 	u32	ioc_boots;
136 	u32	stats_tmos;
137 	u32	hb_count;
138 	u32	disable_reqs;
139 	u32	enable_reqs;
140 	u32	disable_replies;
141 	u32	enable_replies;
142 	u32	rsvd;
143 };
144 
145 /* IOC statistics */
146 struct bfa_ioc_stats {
147 	struct bfa_ioc_drv_stats drv_stats; /*!< driver IOC stats */
148 	struct bfa_fw_ioc_stats fw_stats;  /*!< firmware IOC stats */
149 };
150 
151 enum bfa_ioc_type {
152 	BFA_IOC_TYPE_FC		= 1,
153 	BFA_IOC_TYPE_FCoE	= 2,
154 	BFA_IOC_TYPE_LL		= 3,
155 };
156 
157 /* IOC attributes returned in queries */
158 struct bfa_ioc_attr {
159 	enum bfa_ioc_type ioc_type;
160 	enum bfa_ioc_state		state;		/*!< IOC state      */
161 	struct bfa_adapter_attr adapter_attr;	/*!< HBA attributes */
162 	struct bfa_ioc_driver_attr driver_attr;	/*!< driver attr    */
163 	struct bfa_ioc_pci_attr pci_attr;
164 	u8				port_id;	/*!< port number */
165 	u8				port_mode;	/*!< enum bfa_mode */
166 	u8				cap_bm;		/*!< capability */
167 	u8				port_mode_cfg;	/*!< enum bfa_mode */
168 	u8				def_fn;		/*!< 1 if default fn */
169 	u8				rsvd[3];	/*!< 64bit align */
170 };
171 
172 /* Adapter capability mask definition */
173 enum {
174 	BFA_CM_HBA	=	0x01,
175 	BFA_CM_CNA	=	0x02,
176 	BFA_CM_NIC	=	0x04,
177 };
178 
179 /* ---------------------- mfg definitions ------------ */
180 
181 /* Checksum size */
182 #define BFA_MFG_CHKSUM_SIZE			16
183 
184 #define BFA_MFG_PARTNUM_SIZE			14
185 #define BFA_MFG_SUPPLIER_ID_SIZE		10
186 #define BFA_MFG_SUPPLIER_PARTNUM_SIZE		20
187 #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE		20
188 #define BFA_MFG_SUPPLIER_REVISION_SIZE		4
189 
190 #pragma pack(1)
191 
192 /* BFA adapter manufacturing block definition.
193  *
194  * All numerical fields are in big-endian format.
195  */
196 struct bfa_mfg_block {
197 	u8	version;	/* manufacturing block version */
198 	u8	mfg_sig[3];	/* characters 'M', 'F', 'G' */
199 	u16	mfgsize;	/* mfg block size */
200 	u16	u16_chksum;	/* old u16 checksum */
201 	char	brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
202 	char	brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)];
203 	u8	mfg_day;	/* manufacturing day */
204 	u8	mfg_month;	/* manufacturing month */
205 	u16	mfg_year;	/* manufacturing year */
206 	u64	mfg_wwn;	/* wwn base for this adapter */
207 	u8	num_wwn;	/* number of wwns assigned */
208 	u8	mfg_speeds;	/* speeds allowed for this adapter */
209 	u8	rsv[2];
210 	char	supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)];
211 	char	supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)];
212 	char	supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)];
213 	char	supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)];
214 	mac_t	mfg_mac;	/* base mac address */
215 	u8	num_mac;	/* number of mac addresses */
216 	u8	rsv2;
217 	u32	card_type;	/* card type          */
218 	char	cap_nic;	/* capability nic     */
219 	char	cap_cna;	/* capability cna     */
220 	char	cap_hba;	/* capability hba     */
221 	char	cap_fc16g;	/* capability fc 16g      */
222 	char	cap_sriov;	/* capability sriov       */
223 	char	cap_mezz;	/* capability mezz        */
224 	u8	rsv3;
225 	u8	mfg_nports;	/* number of ports        */
226 	char	media[8];	/* xfi/xaui           */
227 	char	initial_mode[8]; /* initial mode: hba/cna/nic */
228 	u8	rsv4[84];
229 	u8	md5_chksum[BFA_MFG_CHKSUM_SIZE]; /* md5 checksum */
230 };
231 
232 #pragma pack()
233 
234 /* ---------------------- pci definitions ------------ */
235 
236 /*
237  * PCI device ID information
238  */
239 enum {
240 	BFA_PCI_DEVICE_ID_CT2		= 0x22,
241 };
242 
243 #define bfa_asic_id_ct(device)			\
244 	((device) == PCI_DEVICE_ID_BROCADE_CT ||	\
245 	 (device) == PCI_DEVICE_ID_BROCADE_CT_FC)
246 #define bfa_asic_id_ct2(device)			\
247 	((device) == BFA_PCI_DEVICE_ID_CT2)
248 #define bfa_asic_id_ctc(device)			\
249 	(bfa_asic_id_ct(device) || bfa_asic_id_ct2(device))
250 
251 /* PCI sub-system device and vendor ID information */
252 enum {
253 	BFA_PCI_FCOE_SSDEVICE_ID	= 0x14,
254 	BFA_PCI_CT2_SSID_FCoE		= 0x22,
255 	BFA_PCI_CT2_SSID_ETH		= 0x23,
256 	BFA_PCI_CT2_SSID_FC		= 0x24,
257 };
258 
259 enum bfa_mode {
260 	BFA_MODE_HBA		= 1,
261 	BFA_MODE_CNA		= 2,
262 	BFA_MODE_NIC		= 3
263 };
264 
265 /*
266  *	Flash module specific
267  */
268 #define BFA_FLASH_PART_ENTRY_SIZE	32	/* partition entry size */
269 #define BFA_FLASH_PART_MAX		32	/* maximal # of partitions */
270 #define BFA_TOTAL_FLASH_SIZE		0x400000
271 #define BFA_FLASH_PART_FWIMG		2
272 #define BFA_FLASH_PART_MFG		7
273 
274 /*
275  * flash partition attributes
276  */
277 struct bfa_flash_part_attr {
278 	u32	part_type;	/* partition type */
279 	u32	part_instance;	/* partition instance */
280 	u32	part_off;	/* partition offset */
281 	u32	part_size;	/* partition size */
282 	u32	part_len;	/* partition content length */
283 	u32	part_status;	/* partition status */
284 	char	rsv[BFA_FLASH_PART_ENTRY_SIZE - 24];
285 };
286 
287 /*
288  * flash attributes
289  */
290 struct bfa_flash_attr {
291 	u32	status;	/* flash overall status */
292 	u32	npart;  /* num of partitions */
293 	struct bfa_flash_part_attr part[BFA_FLASH_PART_MAX];
294 };
295 
296 #endif /* __BFA_DEFS_H__ */
297