1 /* cnic_if.h: QLogic cnic core network driver.
2  *
3  * Copyright (c) 2006-2014 Broadcom Corporation
4  * Copyright (c) 2014-2015 QLogic Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation.
9  *
10  */
11 
12 
13 #ifndef CNIC_IF_H
14 #define CNIC_IF_H
15 
16 #include "bnx2x/bnx2x_mfw_req.h"
17 
18 #define CNIC_MODULE_VERSION	"2.5.22"
19 #define CNIC_MODULE_RELDATE	"July 20, 2015"
20 
21 #define CNIC_ULP_RDMA		0
22 #define CNIC_ULP_ISCSI		1
23 #define CNIC_ULP_FCOE		2
24 #define CNIC_ULP_L4		3
25 #define MAX_CNIC_ULP_TYPE_EXT	3
26 #define MAX_CNIC_ULP_TYPE	4
27 
28 /* Use CPU native page size up to 16K for cnic ring sizes.  */
29 #if (PAGE_SHIFT > 14)
30 #define CNIC_PAGE_BITS	14
31 #else
32 #define CNIC_PAGE_BITS	PAGE_SHIFT
33 #endif
34 #define CNIC_PAGE_SIZE	(1 << (CNIC_PAGE_BITS))
35 #define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE)
36 #define CNIC_PAGE_MASK	(~((CNIC_PAGE_SIZE) - 1))
37 
38 struct kwqe {
39 	u32 kwqe_op_flag;
40 
41 #define KWQE_QID_SHIFT		8
42 #define KWQE_OPCODE_MASK	0x00ff0000
43 #define KWQE_OPCODE_SHIFT	16
44 #define KWQE_OPCODE(x)		((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
45 #define KWQE_LAYER_MASK			0x70000000
46 #define KWQE_LAYER_SHIFT		28
47 #define KWQE_FLAGS_LAYER_MASK_L2	(2<<28)
48 #define KWQE_FLAGS_LAYER_MASK_L3	(3<<28)
49 #define KWQE_FLAGS_LAYER_MASK_L4	(4<<28)
50 #define KWQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28)
51 #define KWQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28)
52 #define KWQE_FLAGS_LAYER_MASK_L5_FCOE	(7<<28)
53 
54 	u32 kwqe_info0;
55 	u32 kwqe_info1;
56 	u32 kwqe_info2;
57 	u32 kwqe_info3;
58 	u32 kwqe_info4;
59 	u32 kwqe_info5;
60 	u32 kwqe_info6;
61 };
62 
63 struct kwqe_16 {
64 	u32 kwqe_info0;
65 	u32 kwqe_info1;
66 	u32 kwqe_info2;
67 	u32 kwqe_info3;
68 };
69 
70 struct kcqe {
71 	u32 kcqe_info0;
72 	u32 kcqe_info1;
73 	u32 kcqe_info2;
74 	u32 kcqe_info3;
75 	u32 kcqe_info4;
76 	u32 kcqe_info5;
77 	u32 kcqe_info6;
78 	u32 kcqe_op_flag;
79 		#define KCQE_RAMROD_COMPLETION		(0x1<<27) /* Everest */
80 		#define KCQE_FLAGS_LAYER_MASK		(0x7<<28)
81 		#define KCQE_FLAGS_LAYER_MASK_MISC	(0<<28)
82 		#define KCQE_FLAGS_LAYER_MASK_L2	(2<<28)
83 		#define KCQE_FLAGS_LAYER_MASK_L3	(3<<28)
84 		#define KCQE_FLAGS_LAYER_MASK_L4	(4<<28)
85 		#define KCQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28)
86 		#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28)
87 		#define KCQE_FLAGS_LAYER_MASK_L5_FCOE	(7<<28)
88 		#define KCQE_FLAGS_NEXT 		(1<<31)
89 		#define KCQE_FLAGS_OPCODE_MASK		(0xff<<16)
90 		#define KCQE_FLAGS_OPCODE_SHIFT		(16)
91 		#define KCQE_OPCODE(op)			\
92 		(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
93 };
94 
95 #define MAX_CNIC_CTL_DATA	64
96 #define MAX_DRV_CTL_DATA	64
97 
98 #define CNIC_CTL_STOP_CMD		1
99 #define CNIC_CTL_START_CMD		2
100 #define CNIC_CTL_COMPLETION_CMD		3
101 #define CNIC_CTL_STOP_ISCSI_CMD		4
102 #define CNIC_CTL_FCOE_STATS_GET_CMD	5
103 #define CNIC_CTL_ISCSI_STATS_GET_CMD	6
104 
105 #define DRV_CTL_IO_WR_CMD		0x101
106 #define DRV_CTL_IO_RD_CMD		0x102
107 #define DRV_CTL_CTX_WR_CMD		0x103
108 #define DRV_CTL_CTXTBL_WR_CMD		0x104
109 #define DRV_CTL_RET_L5_SPQ_CREDIT_CMD	0x105
110 #define DRV_CTL_START_L2_CMD		0x106
111 #define DRV_CTL_STOP_L2_CMD		0x107
112 #define DRV_CTL_RET_L2_SPQ_CREDIT_CMD	0x10c
113 #define DRV_CTL_ISCSI_STOPPED_CMD	0x10d
114 #define DRV_CTL_ULP_REGISTER_CMD	0x10e
115 #define DRV_CTL_ULP_UNREGISTER_CMD	0x10f
116 
117 struct cnic_ctl_completion {
118 	u32	cid;
119 	u8	opcode;
120 	u8	error;
121 };
122 
123 struct cnic_ctl_info {
124 	int	cmd;
125 	union {
126 		struct cnic_ctl_completion comp;
127 		char bytes[MAX_CNIC_CTL_DATA];
128 	} data;
129 };
130 
131 struct drv_ctl_spq_credit {
132 	u32	credit_count;
133 };
134 
135 struct drv_ctl_io {
136 	u32		cid_addr;
137 	u32		offset;
138 	u32		data;
139 	dma_addr_t	dma_addr;
140 };
141 
142 struct drv_ctl_l2_ring {
143 	u32		client_id;
144 	u32		cid;
145 };
146 
147 struct drv_ctl_register_data {
148 	int ulp_type;
149 	struct fcoe_capabilities fcoe_features;
150 };
151 
152 struct drv_ctl_info {
153 	int	cmd;
154 	int     drv_state;
155 #define DRV_NOP		0
156 #define DRV_ACTIVE	1
157 #define DRV_INACTIVE	2
158 #define DRV_UNLOADED	3
159 	union {
160 		struct drv_ctl_spq_credit credit;
161 		struct drv_ctl_io io;
162 		struct drv_ctl_l2_ring ring;
163 		int ulp_type;
164 		struct drv_ctl_register_data register_data;
165 		char bytes[MAX_DRV_CTL_DATA];
166 	} data;
167 };
168 
169 #define MAX_NPIV_ENTRIES 64
170 #define FC_NPIV_WWN_SIZE 8
171 
172 struct cnic_fc_npiv_tbl {
173 	u8 wwpn[MAX_NPIV_ENTRIES][FC_NPIV_WWN_SIZE];
174 	u8 wwnn[MAX_NPIV_ENTRIES][FC_NPIV_WWN_SIZE];
175 	u32 count;
176 };
177 
178 struct cnic_ops {
179 	struct module	*cnic_owner;
180 	/* Calls to these functions are protected by RCU.  When
181 	 * unregistering, we wait for any calls to complete before
182 	 * continuing.
183 	 */
184 	int		(*cnic_handler)(void *, void *);
185 	int		(*cnic_ctl)(void *, struct cnic_ctl_info *);
186 };
187 
188 #define MAX_CNIC_VEC	8
189 
190 struct cnic_irq {
191 	unsigned int	vector;
192 	void		*status_blk;
193 	u32		status_blk_num;
194 	u32		status_blk_num2;
195 	u32		irq_flags;
196 #define CNIC_IRQ_FL_MSIX		0x00000001
197 };
198 
199 struct cnic_eth_dev {
200 	struct module	*drv_owner;
201 	u32		drv_state;
202 #define CNIC_DRV_STATE_REGD		0x00000001
203 #define CNIC_DRV_STATE_USING_MSIX	0x00000002
204 #define CNIC_DRV_STATE_NO_ISCSI_OOO	0x00000004
205 #define CNIC_DRV_STATE_NO_ISCSI		0x00000008
206 #define CNIC_DRV_STATE_NO_FCOE		0x00000010
207 #define CNIC_DRV_STATE_HANDLES_IRQ	0x00000020
208 	u32		chip_id;
209 	u32		max_kwqe_pending;
210 	struct pci_dev	*pdev;
211 	void __iomem	*io_base;
212 	void __iomem	*io_base2;
213 	const void	*iro_arr;
214 
215 	u32		ctx_tbl_offset;
216 	u32		ctx_tbl_len;
217 	int		ctx_blk_size;
218 	u32		starting_cid;
219 	u32		max_iscsi_conn;
220 	u32		max_fcoe_conn;
221 	u32		max_rdma_conn;
222 	u32		fcoe_init_cid;
223 	u32		max_fcoe_exchanges;
224 	u32		fcoe_wwn_port_name_hi;
225 	u32		fcoe_wwn_port_name_lo;
226 	u32		fcoe_wwn_node_name_hi;
227 	u32		fcoe_wwn_node_name_lo;
228 
229 	u16		iscsi_l2_client_id;
230 	u16		iscsi_l2_cid;
231 	u8		iscsi_mac[ETH_ALEN];
232 
233 	int		num_irq;
234 	struct cnic_irq	irq_arr[MAX_CNIC_VEC];
235 	int		(*drv_register_cnic)(struct net_device *,
236 					     struct cnic_ops *, void *);
237 	int		(*drv_unregister_cnic)(struct net_device *);
238 	int		(*drv_submit_kwqes_32)(struct net_device *,
239 					       struct kwqe *[], u32);
240 	int		(*drv_submit_kwqes_16)(struct net_device *,
241 					       struct kwqe_16 *[], u32);
242 	int		(*drv_ctl)(struct net_device *, struct drv_ctl_info *);
243 	int		(*drv_get_fc_npiv_tbl)(struct net_device *,
244 					       struct cnic_fc_npiv_tbl *);
245 	unsigned long	reserved1[2];
246 	union drv_info_to_mcp	*addr_drv_info_to_mcp;
247 };
248 
249 struct cnic_sockaddr {
250 	union {
251 		struct sockaddr_in	v4;
252 		struct sockaddr_in6	v6;
253 	} local;
254 	union {
255 		struct sockaddr_in	v4;
256 		struct sockaddr_in6	v6;
257 	} remote;
258 };
259 
260 struct cnic_sock {
261 	struct cnic_dev *dev;
262 	void	*context;
263 	u32	src_ip[4];
264 	u32	dst_ip[4];
265 	u16	src_port;
266 	u16	dst_port;
267 	u16	vlan_id;
268 	unsigned char old_ha[ETH_ALEN];
269 	unsigned char ha[ETH_ALEN];
270 	u32	mtu;
271 	u32	cid;
272 	u32	l5_cid;
273 	u32	pg_cid;
274 	int	ulp_type;
275 
276 	u32	ka_timeout;
277 	u32	ka_interval;
278 	u8	ka_max_probe_count;
279 	u8	tos;
280 	u8	ttl;
281 	u8	snd_seq_scale;
282 	u32	rcv_buf;
283 	u32	snd_buf;
284 	u32	seed;
285 
286 	unsigned long	tcp_flags;
287 #define SK_TCP_NO_DELAY_ACK	0x1
288 #define SK_TCP_KEEP_ALIVE	0x2
289 #define SK_TCP_NAGLE		0x4
290 #define SK_TCP_TIMESTAMP	0x8
291 #define SK_TCP_SACK		0x10
292 #define SK_TCP_SEG_SCALING	0x20
293 	unsigned long	flags;
294 #define SK_F_INUSE		0
295 #define SK_F_OFFLD_COMPLETE	1
296 #define SK_F_OFFLD_SCHED	2
297 #define SK_F_PG_OFFLD_COMPLETE	3
298 #define SK_F_CONNECT_START	4
299 #define SK_F_IPV6		5
300 #define SK_F_CLOSING		7
301 #define SK_F_HW_ERR		8
302 
303 	atomic_t ref_count;
304 	u32 state;
305 	struct kwqe kwqe1;
306 	struct kwqe kwqe2;
307 	struct kwqe kwqe3;
308 };
309 
310 struct cnic_dev {
311 	struct net_device	*netdev;
312 	struct pci_dev		*pcidev;
313 	void __iomem		*regview;
314 	struct list_head	list;
315 
316 	int (*register_device)(struct cnic_dev *dev, int ulp_type,
317 			       void *ulp_ctx);
318 	int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
319 	int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
320 				u32 num_wqes);
321 	int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
322 				u32 num_wqes);
323 
324 	int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
325 			 void *);
326 	int (*cm_destroy)(struct cnic_sock *);
327 	int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
328 	int (*cm_abort)(struct cnic_sock *);
329 	int (*cm_close)(struct cnic_sock *);
330 	struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
331 	int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
332 				 char *data, u16 data_size);
333 	int (*get_fc_npiv_tbl)(struct cnic_dev *, struct cnic_fc_npiv_tbl *);
334 	unsigned long	flags;
335 #define CNIC_F_CNIC_UP		1
336 #define CNIC_F_BNX2_CLASS	3
337 #define CNIC_F_BNX2X_CLASS	4
338 	atomic_t	ref_count;
339 	u8		mac_addr[ETH_ALEN];
340 
341 	int		max_iscsi_conn;
342 	int		max_fcoe_conn;
343 	int		max_rdma_conn;
344 
345 	int		max_fcoe_exchanges;
346 
347 	union drv_info_to_mcp	*stats_addr;
348 	struct fcoe_capabilities	*fcoe_cap;
349 
350 	void		*cnic_priv;
351 };
352 
353 #define CNIC_WR(dev, off, val)		writel(val, dev->regview + off)
354 #define CNIC_WR16(dev, off, val)	writew(val, dev->regview + off)
355 #define CNIC_WR8(dev, off, val)		writeb(val, dev->regview + off)
356 #define CNIC_RD(dev, off)		readl(dev->regview + off)
357 #define CNIC_RD16(dev, off)		readw(dev->regview + off)
358 
359 struct cnic_ulp_ops {
360 	/* Calls to these functions are protected by RCU.  When
361 	 * unregistering, we wait for any calls to complete before
362 	 * continuing.
363 	 */
364 
365 	void (*cnic_init)(struct cnic_dev *dev);
366 	void (*cnic_exit)(struct cnic_dev *dev);
367 	void (*cnic_start)(void *ulp_ctx);
368 	void (*cnic_stop)(void *ulp_ctx);
369 	void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
370 				u32 num_cqes);
371 	void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
372 	void (*cm_connect_complete)(struct cnic_sock *);
373 	void (*cm_close_complete)(struct cnic_sock *);
374 	void (*cm_abort_complete)(struct cnic_sock *);
375 	void (*cm_remote_close)(struct cnic_sock *);
376 	void (*cm_remote_abort)(struct cnic_sock *);
377 	int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
378 				  char *data, u16 data_size);
379 	int (*cnic_get_stats)(void *ulp_ctx);
380 	struct module *owner;
381 	atomic_t ref_count;
382 };
383 
384 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
385 
386 int cnic_unregister_driver(int ulp_type);
387 
388 #endif
389